diff --git a/.claude/scheduled_tasks.lock b/.claude/scheduled_tasks.lock index 90a9167..3e5c308 100644 --- a/.claude/scheduled_tasks.lock +++ b/.claude/scheduled_tasks.lock @@ -1 +1 @@ -{"sessionId":"7df840c3-ba5a-42e3-bbe6-19e8a578a1b2","pid":2591198,"procStart":"89849917","acquiredAt":1780384810094} \ No newline at end of file +{"sessionId":"7df840c3-ba5a-42e3-bbe6-19e8a578a1b2","pid":1635590,"procStart":"118103053","acquiredAt":1783156758224} \ No newline at end of file diff --git a/.gitignore b/.gitignore index 3b5b5a3..f2e5a3e 100644 --- a/.gitignore +++ b/.gitignore @@ -25,6 +25,16 @@ manifest.hex *sh3*.hex *sh3*.dat sh3_*.mem +# Ch356/Ch357 epoch descriptor tables — dump-derived (dump indices + texture CRCs). Exact +# paths only (a broad *sh3*.txt would wrongly ignore legitimate docs like *_sh3_notes.txt). +/sim/data/top_psmct32_raster_demo/sh3_sched_epochs.txt +/sim/data/top_psmct32_raster_demo/sh3_s640_epochs.txt +/sim/data/top_psmct32_raster_demo/sh3_zsched_epochs.txt +/sim/data/top_psmct32_raster_demo/sh3_ztrio_epochs.txt +/sim/data/top_psmct32_raster_demo/sh3_zs640_epochs.txt +/sim/data/top_psmct32_raster_demo/sh3_zs640c6_epochs.txt +# dump-derived reference/board-FB images (render copyrighted game frames) +/sim/data/top_psmct32_raster_demo/sh3_*.png # ---- python cache ---- __pycache__/ @@ -40,6 +50,9 @@ __pycache__/ /synth/**/dni/ /synth/**/qdb/ /synth/**/.qsys_edit/ +/synth/**/tmp-clearbox/ +/synth/**/sta_*.txt +*.tdf /synth/de25_nano/top_psmct32_raster_demo/baseline_*/ /synth/de25_nano/experiments/ *.sof diff --git a/docs/ch353_audit_log.md b/docs/ch353_audit_log.md new file mode 100644 index 0000000..214c7c5 --- /dev/null +++ b/docs/ch353_audit_log.md @@ -0,0 +1,352 @@ +# Ch353 audit log — full SH3 draw on an LPDDR-only direct PSMCT32 framebuffer + +Purpose: complete, auditable trail of every change + verification for Codex review. +Scope (Codex-approved): **Path A — LPDDR-only direct PSMCT32 framebuffer**, replacing the 256×120 BRAM crop with +the full 256×334 draw bounding box rendered to LPDDR and scanned out. Path B (tile-spill) deferred. +Labeling note (Codex): this is the **uncropped draw bounding box at origin**, NOT the full SH3 game framebuffer. + +## Numbers (pre-edit, reported to Codex) +- dump 224139, `full_h = 334`; full frame **256 × 334 PSMCT32** = 342,016 B = **334 KiB** (0x53800) = **10,688** 256-bit beats. +- row stride 1024 B. LPDDR ranges (disjoint): **FB 0x000000..0x053800 (334 KiB)**; **TEX 0x200000..0x240000 (256 KiB)**. +- 334 KiB > 128 KiB BRAM and > 256 KiB read2 cap → LPDDR required. + +--- + +## Brick 1a — widen `gs_lpddr_axi_master` to PSMCT32 + end-of-scene flush [DONE, verified] + +RTL: `rtl/gif_gs/gs_lpddr_axi_master.sv` +- Added `parameter int PIX_BYTES = 2` (2 = PSMCT16 default, byte-identical to Ch318; 4 = PSMCT32). +- Derived: `PIX_BITS = PIX_BYTES*8`, `LANE_LO = (PIX_BYTES==4)?2:1`, `STRB1 = '1` (per-pixel byte-strobe mask). +- Generalized the packer: `lane = px_addr[4:0]>>LANE_LO`; data shift `lane*PIX_BITS`; strobe `lane*PIX_BYTES` wide. + The `&ns` beat-complete test is UNCHANGED (a full 32-byte beat is always 32 strobe bits either way). +- Port `px_pix16[15:0]` → `px_pix32[31:0]` (PSMCT16 callers drive `{16'd0, pix16}`). +- New input `flush`: end-of-scene partial-beat flush — sparse triangle coverage won't fill every beat; pulse it + after the last `px_emit` to push the dangling partial beat. PSMCT16 tile path ties it to 0 (tile-rows always + complete beats). Branch: `else if (enable && arm_gs && flush && has_data)` pushes `{cur_addr,cur_data,cur_strb}`. + +Callers updated: `rtl/top/de25_nano_psmct32_raster_demo_top.sv` (2 instantiations) → `.px_pix32({16'd0, demo_flush_pix16}), .flush(1'b0)`. + +TB: `sim/tb/gif_gs/tb_gs_lpddr_axi_master.sv` — PSMCT16 instantiations updated; added a PSMCT32 DUT (`PIX_BYTES=4`) +with an always-ready capturing slave + tests: 8 px → 1 full beat; 5 px + flush → 1 partial beat; unstrobed lanes 5–7 +untouched. Result: `[axi32] PSMCT32 ok ...`, `[axi] DISARMED/CANARY/STABILITY ok` (PSMCT16 byte-identical), **PASS**. + +**Verification:** full regression **272 PASS / 0 FAIL** (writer touches the de25 top, so regression confirms nothing broke). + +--- + +## Brick 1c — LPDDR-only direct-FB proof [DONE, verified] + +Recon finding (big de-risk): the bram-top ALREADY has the pieces — no new bram-top logic: +- `FB_LPDDR_ONLY` (Ch326, `top_psmct32_raster_demo_bram.sv:1170`): `vram_we_pre = xfer_busy ? xfer_we : (raster_pixel_emit && !FB_LPDDR_ONLY)` — suppresses the BRAM raster mirror, keeps xfer/CLUT writes. = Codex's "suppress raster, keep CLUT". +- `flush_color32_o`/`flush_addr_o`/`flush_emit_o`/`flush_psm_o` (Ch323): the full PSMCT32 raster stream, already exposed. +- `feeder_ready_o` (C_READY): render-done, for the flush pulse. + +TB: `sim/tb/top/tb_top_psmct32_sh3_lpddr_fb.sv` (NEW; Makefile target added; dump-derived, NOT in regression): +- bram-top with `FB_LPDDR_ONLY=1`; the exposed PSMCT32 stream (gated `flush_psm_o==6'h00`) drives + `gs_lpddr_axi_master#(.FIFO_DEPTH(64),.PIX_BYTES(4))` → a behavioral, strobe-honouring LPDDR FB. +- Separate faster `axi_clk2` (#2 vs design #5) models the board's emif_clk and exercises the real async-FIFO CDC. +- "ideal" frame captured straight off the raster stream; PROOF asserts LPDDR == ideal for every emitted pixel. +- End-of-scene `flush` pulse + a STABLE-idle drain gate before asserting. + +**Verification:** `[fbproof] covered=14730 words, mismatches=0, writer beats=5572` → **PASS** (cropped 256×120 data; +full-frame is a fixture swap, Brick 1b). + +Two findings worth auditing: +1. Same-clock drain can't keep up with line-change-flush bursts → use a faster AXI clock (board emif_clk is ~12× + faster, drains fine) + `FIFO_DEPTH=64`. (No RTL backpressure added; the board clock ratio makes it unnecessary.) +2. **Drain gate must be STABLE-idle**: a single `idle` sample RACES the async-FIFO CDC (flush-pushed beat's gray + pointer needs ~2 axi cycles to cross; `fifo_rempty` reads empty meanwhile) → asserted before the last overdraw + pixel drained (1 stranded pixel). Fix: settle + require idle for 8 consecutive cycles. **This validates Codex's + "gate scanout on render-done AND writer-drained/B-response" — the board gate must be stable-idle, not transient.** + +--- + +## Brick 1b — full-frame fixture (256×334) + re-run proof [DONE, verified] + +Tooling: `tools/gs_make_sh3_real_draw_fixture.py` — added `--full-frame`: +- `global CH`; after the crop search, `if full_frame: CH=full_h; CY0=0; CX0=0` (render the whole 256×334 bounding box). +- Crop-dependent outputs written with a `tag` (`full` vs `real`): `feeder_sh3_{tag}.mem`, `sh3_{tag}_params.vh`, + `sh3_{tag}_refmap*.mem`, `bios_sh3_{tag}.mem`, `payload_sh3_{tag}.mem`. Shared texture/CLUT/idx/pal stay `sh3_real_*`. + → the Ch352 cropped build (`sh3_real_*`) is byte-untouched. +- CBP stays 480 (CLUT in BRAM; with FB_LPDDR_ONLY the FB is in LPDDR so it doesn't collide). CLUT→0 relocation is + deferred to Brick 3 (a fit-side BRAM-shrink optimization, not needed for the sim proof). + +Verification: +- default run → `sh3_real_*` FBH=120/CY0=188 (unchanged); `--full-frame` → `sh3_full_*` FBH=334/CY0=0. +- **Cropped oracle still bit-identical: `tb_top_psmct32_sh3_real_draw_demo` 96.2% PASS** (Ch352 build intact). +- proof TB: `\`ifdef SH3_FULL_FRAME` selects `sh3_full_params.vh`; Makefile target `tb_top_psmct32_sh3_lpddr_fb_full` + points BIOS/PAYLOAD/FEEDER at the `_full` files. +- **Full-frame proof: `[fbproof] covered=16571 words, mismatches=0, writer beats=6502` → PASS.** + +## Status: Brick 1 (render to LPDDR) COMPLETE + verified at full frame (16571 px, 0 mismatches). + +--- + +## Codex audit corrections (all 5 resolved before Brick 2) + +**#1 (High) — full-frame oracle distinction.** The transport proof (LPDDR == raster-captured ideal) proves *transport*, +not *render correctness*. Added the full-frame equivalent of the bounded oracle to the proof TB: loads the reference +texel map (`sh3_{tag}_refmap.mem`) + palette/indices, scores the rendered frame `<=1 texel` (same acceptance as +`tb_top_psmct32_sh3_real_draw_demo`). Cropped reads **96.2% / INT 97.5% / clut_bad=0 — EXACTLY matching the standalone +oracle**; full-frame **96.1% / INT 97.6% / clut_bad=0**. (Also init `ideal[]`=0 to model the Brick-3 FB preclear, so +refmap-covered-but-unrendered edge pixels read as the cleared color, not X.) + +**#2 (High) — production-safe drain ack (replaces the stable-idle heuristic).** `gs_lpddr_axi_master`: FIFO word +widened to 321 (marker bit). A `flush` now pushes any partial beat **then an ordered EOF marker**; the AXI FSM sets a +new `frame_drained` output when it POPS the marker — which, by the in-order FIFO + per-beat B handshake, happens only +AFTER the last data beat's BRESP. Coherent in the axi domain (no GS-domain `idle` sampling, no pointer-in-flight race). +The proof TB now waits on `frame_drained` (a stable level), not the heuristic. PSMCT16 path byte-identical (flush tied 0). + +**#3 (Medium) — PSMCT32 AXI backpressure.** `tb_gs_lpddr_axi_master`: the PSMCT32 DUT now has LFSR AW/W backpressure + +a delayed B response; asserts full beat + partial-flush survive stalls, **ovf=0, bresp_err=0**, and the ordered drain +ack fires. PASS. + +**#4 (Medium) — tagged generated PNGs.** `gs_make_sh3_real_draw_fixture.py` now writes `sh3_{tag}_ref.png`; the stale +idx8 recip render is written as `STALE_idx8_sh3_{tag}_ref_recip.png` (clearly marked). A `--full-frame` run no longer +clobbers crop references; restored the crop `sh3_real_ref.png` (256×120) and created `sh3_full_ref.png` (256×334). + +**#5 (Hygiene) — gitignore.** Added `/synth/**/tmp-clearbox/`, `/synth/**/sta_*.txt`, `*.tdf` so STA scratch + +clearbox temp are excluded from the next commit (the committed tmp-clearbox is already pending-deleted on disk). + +## Verification (post-corrections) +- `tb_gs_lpddr_axi_master` PASS (PSMCT16 byte-identical, PSMCT32 + backpressure, ordered ack). +- `tb_top_psmct32_sh3_lpddr_fb` (cropped) PASS: transport 0 mism + oracle 96.2%/97.5%/clut_bad=0. +- `tb_top_psmct32_sh3_lpddr_fb_full` (256×334) PASS: transport 0 mism + oracle 96.1%/97.6%/clut_bad=0. +- Cropped oracle `tb_top_psmct32_sh3_real_draw_demo` still 96.2% PASS (Ch352 build intact). +- Full regression: re-running to confirm the writer-width/marker change stays green. + +## Codex audit round 2 (two real items + integration note) + +**(High) EOF/partial dropped when FIFO full.** The flush branches cleared `has_data`/`flush_pending` on scheduling +`fifo_wr`, but the FIFO write is `fifo_wr && !fifo_wfull` — if full, the partial/marker vanished. Fix in +`gs_lpddr_axi_master`: (a) gate the flush branches on `!fifo_wfull` so state is RETAINED (retried) until accepted; +(b) `fifo_wfull` is REGISTERED (asserts 1 cycle after the FIFO fills), so the partial push could make the FIFO full +while the marker branch still saw stale `!wfull` and fired early → its write then dropped. Added a 1-cycle `flush_gap` +between the partial and marker pushes so `wfull` reflects the partial's write first. **Saturation test added** +(`tb_gs_lpddr_axi_master`): hold AXI fully off until the FIFO is full, flush, release → asserts the partial beat +survives, `frame_drained` asserts only after release/BRESP, EOF never popped while stalled. PASS. + +**(Hygiene) tracked tmp-clearbox deletions.** `git rm --cached` on the 51 tracked `tmp-clearbox/*.tdf` files (gitignore +only affects untracked) → now 0 tracked, 51 staged deletions; the next commit removes them. No other STA/tdf scratch +tracked. + +**Integration note (Codex, for Brick 2).** `frame_drained` is coherent in the AXI/EMIF domain — Brick 2's scanout +gate must consume it THERE (gs_lpddr_scanout* run on emif_clk). Any design-clock use needs a synchronizer. The proof +TB's direct cross-domain poll of `frame_drained`/`fbw_idle` is sim convenience, not a hardware CDC. + +## Codex audit round 3 (enqueue edge case) + +**(High) a prior NORMAL `fifo_wr` leaves `fifo_wfull` stale at a flush branch.** Cases: a scene ending on a full +beat (no partial), or a partial right after a line-change push — the previous registered `fifo_wr` is consuming the +final slot, so the flush branch's `!fifo_wfull` check is stale. The round-2 `flush_gap` only covered partial→marker. +Fix: gate BOTH flush enqueue branches on **`!fifo_wr && !fifo_wfull`** — no push in flight AND not full, so the +`!wfull` check is accurate; state is retained/retried until accepted. This also subsumes the partial→marker gap +(the marker waits for the partial's `fifo_wr` to clear and `wfull` to settle), so `flush_gap` was removed. + +**NEAR-FULL test added** (`tb_gs_lpddr_axi_master`): scene ends on a FULL beat, no partial, flush immediately after the +final normal beat under a saturated FIFO → the EOF marker survives and `frame_drained` asserts only after release/BRESP. +PASS (alongside the saturation test). + +## Verification (round 2) +- `tb_gs_lpddr_axi_master` PASS (+ saturation: FIFO-full flush, partial+EOF retained, frame_drained after BRESP). +- both proofs still PASS (cropped 96.2%/clut_bad=0; full-frame 96.1%/clut_bad=0; transport 0 mism). +- full regression re-running (writer gap fix). + +Remaining (Brick 2 / 3): PSMCT32 line-buffer scanout proof (`gs_lpddr_scanout_lb` already PSMCT32, reads the LPDDR FB +back out, gated on `frame_drained` IN THE EMIF DOMAIN); board (HPS preclear, static line-buffer scanout, CLUT→CBP 0 to +shrink BRAM, fit). + +## Brick 2 — PSMCT32 LPDDR-FB line-buffer scanout proof (`tb_gs_lpddr_scanout_fb`) + +Full write→read loop: the Ch353 writer (`gs_lpddr_axi_master #(.PIX_BYTES(4))`) fills a behavioral 256×334 PSMCT32 FB +(STRIDE=1024B, ROW_BEATS=32, BEATS_PER_FRAME=10688) → `frame_drained` → `gs_lpddr_scanout_lb #(.STRIDE_BYTES(1024), +.ROW_BEATS(32),.N_ROWS(334),.PSMCT32(1))` with `enable=frame_drained` reads the FB back → video raster serves r/g/b → +compared against `exp_word(x,y)`. Three independent clocks (gs #5 / emif #2 / video #7). Real cadence: H_BP=32/H_FP=8, +V_BP=16/V_FP=8; active-relative px/py; `in_win`/`vsync` gating. FB precleared to 0 (models HPS preclear). Read model +has variable AR/R latency (LFSR). All 256×334 pixels compared **including the x≥128 black half**. + +Codex acceptance gates — all met: +- **All pixels correct incl. black**: `errors=0` (checked=105968 ≥ 256×334 active). +- **underflow=0** (row always ready before its pixel — required the vertical/horizontal back porch so the prefetch + leads the display; the first run without a back porch raced and asserted underflow). +- **rd_errs=0** (no read-response errors). +- **valid through the final row**: `checked ≥ H_ACT*V_ACT`. +- **frame_drained gate consumed in the EMIF domain** (scanout runs on emif_clk). + +Read-beats/frame: measured in the **EMIF domain** per prefetch frame (counter reset on the emif-synced vsync rising +edge) = **10720 = 334 rows + 1 row re-fetched at the vblank boundary**. Root cause (a real scanout behavior, not a TB +bug): the scanout's `fs_edge_e` is a *both-edge* detector, so a 1-cycle vsync pulse fires two prefetch resets +(rising+falling), re-fetching row 0 once. Harmless — every row is read correctly (pixels match). The TB accepts 10688 +(ideal) OR 10720 (+1 boundary row) and hard-fails anything else. **FLAG FOR CODEX:** is the exact-10688 gate strict, or +is the ~1-row/frame vblank-boundary re-fetch acceptable (it wastes 32 beats/frame ≈ 0.3% of read bandwidth)? If it must +be exactly 10688, the fix is on the scanout/top side (drive frame_start so the both-edge doesn't double-reset), not the +proof. + +Result: `tb_gs_lpddr_scanout_fb` **PASS**; added to both `sim/Makefile` master run lists. + +Remaining (Brick 3 / board): HPS preclear FB, static line-buffer scanout wired at the de25 top, CLUT→CBP 0 to shrink +BRAM, fit. + +## Codex round 4 — beat-count fix (production RTL) + Brick 3 start-ordering gate + +**(Resolved) both-edge → rising-edge in `gs_lpddr_scanout_lb`.** The 10720-vs-10688 was a real production-RTL issue, +not test noise. Both frame-start edge detectors were both-edge: +- `fs_edge_v` (video domain, line 88): `fs_sync_v[2] != fs_sync_v[1]` → `fs_sync_v[1] && !fs_sync_v[2]` +- `fs_edge_e` (emif domain, line 132): `fs_sync_e[2] != fs_sync_e[1]` → `fs_sync_e[1] && !fs_sync_e[2]` +A 1-cycle `frame_start` pulse fired rising+falling → two prefetch resets → row 0 re-fetched once. Rising-edge only = +exactly one reset per frame. TB assertion tightened back to **exactly 10688** (`!== BEATS_PER_FRAME` is a hard fail). + +Verification: `tb_gs_lpddr_scanout_fb` → **10688/frame, underflow=0, rd_errs=0, errors=0, PASS**. Focused scanout +suite all PASS (scanout_lb, scanout_lb_psm32, scanout_lb_psm32_256, scanout_concurrency, scanout, scanout_psm32). +Full regression re-run for the RTL change. + +## Brick 3 — start-ordering gate (Codex, mandatory sequence) + +The de25 top must enforce this host-start order; the boot CLUT payload must NOT auto-start rendering before 1–4: +1. HPS preclears the framebuffer. +2. HPS uploads the texture. +3. Texture cache fill completes successfully. +4. CLUT boot upload/load completes. +5. Arm the PSMCT32 writer. +6. Start the feeder render. +7. Send EOF; await EMIF-domain `frame_drained`. +8. Enable the static LPDDR scanout. + +## Codex round 5 — Brick 3 build rulings (board path) + +1. **No hardware preclear engine for v1.** Extend the HPS write-probe (`ps2_sh3_tex_upload.c`) to zero + 0x000000–0x0537FF (85,504 words) — only ~30% more traffic than the proven 65,536-word texture upload — polling + `write_pending` and checking BRESP. A new AXI engine + arbiter are unjustified before measuring this path. +2. **Dedicated `GS_SH3_LPDDR_FB` profile**, separate from `GS_TILE_SPILL`, static PSMCT32 line-buffer scanout, + profile-specific geometry (256×334). +3. **`frame_drained` as a HARD gate, no timeout.** A timeout can display a partial FB — recreating the bug the + handshake fixes. Failure stays BLACK with diagnostics; a manual debug override is acceptable only if explicit. +4. **Feeder auto-start-once correction (CRITICAL).** `top_psmct32_raster_demo_bram.sv:807` C_SETUP asserts `fdr_start` + when the boot upload finishes → the disarmed boot render leaves a pending EOF that would assert `frame_drained` the + instant the host later arms the writer. Fix: **`FEEDER_AUTOSTART` param (default 1'b1), 0 only for this profile** → + C_SETUP goes straight to C_READY (no boot render); every render then waits for an explicit 0x0E8 GO. +5. **Expose `frame_drained` as a host-readable diagnostic** if a spare status bit exists. + +Required host sequence (GS_SH3_LPDDR_FB): (1) wait setup/CLUT complete + feeder ready → (2) preclear LPDDR FB → +(3) upload texture → (4) fill + verify texture cache → (5) configure base 0, full mode, arm writer → (6) issue 0x0E8 GO +→ (7) await ordered `frame_drained` → (8) enable scanout automatically from that ack. + +### Landed this round +- **`FEEDER_AUTOSTART` param + FSM** in `top_psmct32_raster_demo_bram.sv` (param after FEEDER_STG_WORDS; C_SETUP + branches on it → auto boot render when 1, straight to C_READY when 0). Additive, default 1'b1. Verified + byte-identical: tb_top_psmct32_sh3_lpddr_fb / feeder_runtime_demo / feeder_scene_retrigger_demo all PASS. + +### Design clarification (derived) +`GS_SH3_LPDDR_FB` is a **feeder-based** profile: the host streams the SH3 draw list into the feeder (0x0DC/0x0E4) and +GOes (0x0E8) — matching Codex's host sequence. So its inner-instance config mirrors `GS_SH3_REAL_DRAW_DEMO` +(FEEDER_ENABLE=1, CLUT_CSM1_ENABLE=1, PERSPECTIVE_CORRECT=1, PERSP_RECIP_IDX_BITS=11, GS_LPDDR_TEX cache) but with: +FEEDER_AUTOSTART=0, FB_LPDDR_ONLY=1 (Ch326, suppress BRAM FB mirror), the full 256×334 PSMCT32 FB in LPDDR (not the +128 KiB crop), and the line-buffer scanout at 256×334. + +### Remaining Brick 3 build (precise) +- **(RTL, board top)** add `elsif GS_SH3_LPDDR_FB` inner-instance param block (SH3 config + FEEDER_AUTOSTART=0 + + FB_LPDDR_ONLY=1); activate the GS_LPDDR4B_FB writer/scanout blocks for this profile; reconfigure the writer instance + to PIX_BYTES=4 / px_pix32=demo_flush_color32 / px_emit on psm==6'h00 / flush=end-of-scene / route `frame_drained`; + set scanout geometry (STRIDE=1024, ROW_BEATS=32, N_ROWS=334, PSMCT32); `frame_ready_emif = frame_drained` (hard gate, + no timeout). +- **(RTL, bridge)** expose `frame_drained` as a status bit (mind the `.*`-port-add trap: update every bridge + instantiation/TB). +- **(host)** `ps2_sh3_tex_upload.c` FB-preclear loop (zero 0x000000–0x0537FF via write-probe, poll write_pending + BRESP). +- **(build)** add the `GS_SH3_LPDDR_FB` profile to `select_de25_profile.sh` + QSF VERILOG_MACRO (also defines + GS_LPDDR4B_FB + GS_LPDDR_TEX + the SH3 fixture macros). +- **(sim, MANDATORY before fit)** integration sim proving the sequence: FEEDER_AUTOSTART=0 → no boot render → arm → + GO → EOF → `frame_drained` fires exactly once (NOT prematurely from a boot render) → scanout serves the correct + full-frame. This is the correctness proof for Codex's round-5 item 4. + +## Brick 3 — host-start SEQUENCE proof (integration sim) — PASS + +`sim/tb/top/tb_top_psmct32_sh3_lpddr_fb_seq.sv` (full-frame fixtures; the mandatory pre-fit gate). Instantiates the +bram-top with **FEEDER_AUTOSTART=0** + FB_LPDDR_ONLY + the SH3 feeder config, the PSMCT32 writer, the behavioral +(precleared) LPDDR FB, and `gs_lpddr_scanout_lb` reading it back to a real video raster — with the **render-epoch** +flush logic (Codex round 5) driving the writer's EOF. Clocks: design/gs #5, emif #2, video #7, bridge #11. + +Render epoch (mirrors what wires into the board top): `render_inflight` set by an accepted host GO (feeder_go while +ready); `flush = render_inflight && feeder_ready_rise`; cleared on flush. So the FEEDER_AUTOSTART=0 setup→C_READY edge +(render_inflight=0) can NOT enqueue a false EOF. + +Codex acceptance — ALL met on the first run: +- Boot setup reaches C_READY. **Before GO: raster_emits=0, writer_beats=0, eof=0, frame_drained=0** (no boot render). +- Texture fill verifies (fill_crc=fbdeaa32, tex_rd_errs=0). FB precleared to 0; idle BRESP errors=0. +- Host sets base 0 / canary off / arms writer (latched via ctrl_commit). +- **GO → feeder_ready drops then re-rises** after render+drain. +- **Exactly ONE EOF → exactly ONE frame_drained.** Writer beats=6502, FIFO overflow=0, BRESP errors=0. +- Synchronized `frame_drained` reaches the bridge domain. +- Scanout auto-enabled from the ack: **exactly 10688 read beats/frame**, all 256×334 pixels match (incl. black), + underflow=0, rd_errs=0. +- Bounded oracle: 96.1% ≤1-texel ALL / 97.6% interior / clut_bad=0 (correct SH3 render). +- `errors=0` → **PASS**. + +The SH3 fixture TBs are dump-derived/LOCAL, so this is run manually (like its siblings) — NOT added to the master +`run:` list. Full regression re-run for the widely-used inner-module FEEDER_AUTOSTART change (additive, default 1'b1). + +REMAINING Brick 3 (board plumbing, then owner fit): board-top GS_SH3_LPDDR_FB profile (param block + writer reconfig + +scanout geom + frame_ready_emif=frame_drained + the render-epoch logic wired in design_clk); bridge frame_drained +status bit; host preclear loop in ps2_sh3_tex_upload.c; select_de25_profile.sh + QSF profile. No fit until the board +build compiles clean under the profile and this sequence proof stays green. + +## Brick 3 board plumbing — COMPLETE (awaiting owner fit) + +All board-side wiring for GS_SH3_LPDDR_FB is landed and verified in sim; the fit itself is owner-gated. + +**Board top (`de25_nano_psmct32_raster_demo_top.sv`), all gated on `GS_SH3_LPDDR_FB` (inert for every other profile):** +- Inner-instance param block `elsif GS_SH3_LPDDR_FB` — mirrors GS_SH3_REAL_DRAW_DEMO (FEEDER_ENABLE, CLUT_CSM1, + PERSPECTIVE_CORRECT, PERSP_RECIP=11, VRAM 128 KiB, GRAD_SEQ_DIVIDER=0) + **FEEDER_AUTOSTART=0** + **FB_LPDDR_ONLY=1**. +- TEXC block: `elsif GS_SH3_LPDDR_FB` → the same 512×512 PSMT8 LPDDR texture geometry as the crop. +- Render epoch (design_clk): `sh3_render_inflight` set by an accepted feeder GO; `sh3_fb_flush = inflight && feeder_ready + rise`; cleared on flush → exactly one EOF per render (Codex round 5 — the setup→C_READY edge can't leak an EOF). +- frame_ready gate: `frame_ready_emif = sh3_frame_drained` (EMIF prefetch enable) + `frame_ready_r` = design-synced + sh3_frame_drained (HDMI mux blanks black until drained). HARD gate, no timeout. +- Writer (u_lpddr_axi, the active GS_LPDDR4B_FB instance): `PIX_BYTES(4)`, `px_emit` on psm==6'h00, + `px_pix32=demo_flush_color32`, `flush=sh3_fb_flush`, `.frame_drained(sh3_frame_drained)`. +- Scanout: `SCANOUT_LB_NROWS=334` (STRIDE 1024 / ROW_BEATS 32), `SCANOUT_FB_BASE=0`, `SCANOUT_PSMCT32=1`, + `scanout_lb_eff` forced 1 (line-buffer; a 256×334 frame-cache would be 334 KiB). +- Verified: patched-copy iverilog elaboration under GS_SH3_LPDDR_FB+GS_LPDDR4B_FB+GS_LPDDR_TEX = exit 0 (the only + standalone-sim gap is the Quartus-only EMIF_Qsys IP + a pre-existing `lpddr_ctrl_commit_w` forward-ref, both + fit-proven). Default board-top TB still builds+passes (edits inert for non-SH3). + +**Drain diagnostic:** used existing `LPDDR_STATUS 0x02C[0]` (writer idle, stable post-render) + `LPDDR_BYTES 0x030` +(beats!=0) — the narrowest path (Codex), avoiding a bridge port-add that would break 4 `.*` regression TBs. +`frame_drained` still gates the scanout internally. + +**Build profile:** `scripts/select_de25_profile.sh sh3_lpddr_fb` case added (SCENE = GS_SH3_LPDDR_FB + GS_LPDDR_TEX + +feeder_sh3_full; FIXTURE = bios/payload_sh3_full). Ran it myself + verified the QSF: SCENE/FIXTURE blocks correct, +markers balanced (2×), static GS_LPDDR4B_FB=1 / GS_LPDDR_FB=1 / USE_QSYS_TOP=1 / EMIF IP intact. + +**Host app:** `tools/ps2_sh3_tex_upload.c` extended with `--lpddr-fb` mode (Codex's no-hw-clear path): wait feeder +ready → PRECLEAR FB 0x000000..0x0537FF (85504 words) via the write-probe (poll write_pending, check BRESP) → upload +texture → fill+verify cache → set base 0 / canary off / arm writer → feeder GO → await drain (idle + bytes!=0) → +raise video_src. Compiles clean (-Wall); dry-run OK (tex sum32=fbdeaa32). Crop path byte-unchanged. + +**Verification:** seq proof `tb_top_psmct32_sh3_lpddr_fb_seq` still PASS (10688 beats, 1 EOF→1 frame_drained, oracle +96.1%). Regression re-running after the board-top edits. + +**Owner fit order:** (1) `python3 tools/gs_make_sh3_real_draw_fixture.py --full-frame` (regenerate LOCAL fixtures if +absent); (2) `./scripts/select_de25_profile.sh sh3_lpddr_fb` (DONE — QSF already set); (3) fit in Quartus; (4) on the +board: `gcc -O2 -o ps2_sh3_tex_upload tools/ps2_sh3_tex_upload.c && sudo ./ps2_sh3_tex_upload sh3_real_tex_lpddr.mem +--lpddr-fb`. + +## Ch353 follow-up — host-visible frame_drained diagnostic bit (Codex-approved after silicon) + +Silicon showed the host's `idle`-based drain confirmation reads a mid-render count (idle pulses between the feeder's +render batches → the board printed "beats=44"). The DISPLAY was correct (scanout gated on the ordered frame_drained), +but the host couldn't READ a stable drain signal. Added it (the `.*`-port-add done carefully): + +- **Bridge (`ps2_hps_bridge.sv`):** new `input frame_drained_i` + `frame_drained_sync` (2-FF into the bridge clock) + + **LPDDR_STATUS 0x02C[6] = frame_drained_sync[1]** (STABLE — asserts only after the EOF marker's last BRESP). +- **Board top:** `sh3_frame_drained` now defined in both ifdef branches (driven by the writer under GS_SH3_LPDDR_FB, + tied 0 otherwise); bridge `.frame_drained_i(sh3_frame_drained)`. +- **`.*`-trap handled:** the 4 `.*` bridge TBs (tb_ps2_hps_bridge, tb_bridge_iop_pad_input, tb_pad_state_via_sif_to_ee, + tb_ee_pad_buffer_branch) each got a tied `logic frame_drained_i = 1'b0;` (matched by name). tb_lpddr_tex_staging is + explicit/partial — the new input floats like its other unconnected inputs (no change). null bridge unaffected + (its port list is a strict subset). All 5 bridge TBs PASS. +- **Host (`ps2_sh3_tex_upload.c --lpddr-fb`):** step 7 now polls **0x02C[6] frame_drained** (not [0]idle) and reports + `frame_drained=1, FB beats written=~6500`. Compiles clean (-Wall). + +Verified: board top elaborates clean under GS_SH3_LPDDR_FB+GS_LPDDR4B_FB+GS_LPDDR_TEX (exit 0); seq proof still PASS +(10688, 1 EOF→1 frame_drained); full regression re-running. This is a diagnostic-only change — the functional path +(silicon-verified) is unchanged; it re-fits into the same profile. diff --git a/docs/ch354_audit_log.md b/docs/ch354_audit_log.md new file mode 100644 index 0000000..efa4818 --- /dev/null +++ b/docs/ch354_audit_log.md @@ -0,0 +1,45 @@ +# Ch354 audit log — draw-list expansion: multiple SH3 draws composited into one LPDDR framebuffer + +Purpose: auditable trail for Codex. Builds directly on Ch353 (the LPDDR-only PSMCT32 framebuffer, silicon-verified). +Brick 1 scope (Codex, conservative): the SAME-TEXTURE trio idx89548/89761/89974 (tbp=9216/cbp=13952, frame f1) +composited into one FB — ONE new variable: multiple authentic draws accumulating into one LPDDR framebuffer. NOT in +Brick 1: multi-texture residency, full 640x480, large Z-buffer. + +## Fixture generator (tools/gs_make_sh3_multidraw_fixture.py) — all guardrails fail-CLOSED +- #4 mechanical: the trio is one frame (f1), one texture key (9216,0x13,8,TRI_STRIP,tme=1,abe=0), ascending dump order. +- #2 ALL feeder-visible state identical: TEX0(all fields), PRIM/fst/tme/abe, TEST, ZBUF, CLAMP, ALPHA, TEXA. +- #3 CONTENT (epoch-aware): texture @tbp=9216 (256 KB) + CLUT @cbp=13952 (1 KB) byte-identical across all three + (per-draw local-memory reconstruction; a same-byte re-upload passes, a changed payload FAILS). +- #1 capacity: 204 clipped tris -> 1843 staging words. Correctly fail-closed at 768; Codex approved FEEDER_STG_WORDS + =2048 (16-bit tri count + 12-bit staging addr cover it). Feeder .mem padded to 2048. +- #3 union bbox: origin (243,52), 248x338 -> FB 256x338, stride 1024B, size 0x54800 (338 KiB). +- #5 INDEPENDENT oracle from reconstructed GS local memory (not feeder records); #6 overlap scored: 10370 overlap px. + +## Integration sim (tb_top_psmct32_sh3_multidraw) — PASS on the accumulation acceptance +Combined list through the SAME Ch353 LPDDR-FB path (FEEDER_AUTOSTART=0 + render-epoch EOF + frame_drained hard gate + +line-buffer scanout). PASS: records_emitted=204, ONE frame_drained after all batches, writer overflow/BRESP=0, +raster_overflow=0, scanout 256x338 = 10816 beats/frame exact, underflow=0, transport exact, clut_bad=0, overlap +exercised (10370 px). Fidelity is REPORTED, not gated (Codex: not part of accumulation acceptance). + +## Codex diagnostic branch — RESOLVED (two SEPARATE claims) +Isolation + per-draw + RTL-composition (tool --tag/--only/owner-map; TB +TAG/+FBDUMP; scratch compose_check.py): +- **89761 isolated through the new path: INTERIOR 97.5%** == Ch353's 97.6% -> the multidraw tool/origin translation + is CORRECT (not the source of the drop). +- Per-draw <=1-texel INTERIOR: 89761=97.5%, 89548=95.6%, 89974=93.2% (draw-dependent). +- **RTL-paint-order composition: combined RTL == overlay of the three isolated single RTL renders, 0/86528 px differ.** + +**CLAIM 1 (accumulation/order/coalescing): bit-exact — 0/86528 px different from RTL-composed singles.** +**CLAIM 2 (authentic-reference fidelity): draw-dependent (97.5/95.6/93.2%), the EXISTING perspective-sampling +fidelity limitation — NOT part of the accumulation acceptance, NOT independently attributed to the reciprocal curve.** +The combined interior (94.4%) is the coverage-weighted mix; the overlap region is dominated by the least-accurate +draw (89974 owns the most covered pixels), which is why OVERLAP-INTERIOR looks lowest. + +## Board prep (Codex-directed) — verified in sim, owner-gated for the fit +- Board top: `GS_SH3_LPDDR_FB_MULTI` overrides FEEDER_STG_WORDS 768->2048 and SCANOUT_LB_NROWS 334->338; everything + else shared with GS_SH3_LPDDR_FB. Elaborates clean (exit 0) under GS_SH3_LPDDR_FB+_MULTI+GS_LPDDR4B_FB+GS_LPDDR_TEX. +- Framebuffer 256x338, stride 1024, size 0x54800; scanout 10816 beats/frame. +- Host ps2_sh3_tex_upload.c: `--fb-rows N` -> preclears the exact 256xN range (338 => 0..0x54800). -Wall clean. +- frame_drained diagnostic (0x02C[6], Ch353 follow-up) is BUNDLED into this fit. +- Build profile `sh3_lpddr_fb_multi` (select_de25_profile.sh + QSF): SCENE GS_SH3_LPDDR_FB + GS_SH3_LPDDR_FB_MULTI + + GS_LPDDR_TEX + feeder_sh3_multi; FIXTURE bios/payload_sh3_multi. Ran profile-select + verified the QSF. +- BOARD RUN: `sudo ./ps2_sh3_tex_upload sh3_real_tex_lpddr.mem --lpddr-fb --fb-rows 338`. diff --git a/docs/ch355_audit_log.md b/docs/ch355_audit_log.md new file mode 100644 index 0000000..c568c0b --- /dev/null +++ b/docs/ch355_audit_log.md @@ -0,0 +1,101 @@ +# Ch355 audit log — MULTI-TEXTURE composition (different-texture draws accumulate into one LPDDR framebuffer) + +Codex rung after Ch354. Brick 1 (narrow): TWO authentic SH3 draws with DIFFERENT TEX0/CLUT composited into one FB via +SCENE-LEVEL texture rebind + staged-list retriggering. Dump order (authentic): A=idx19562 (tbp=11264/cbp=14080) THEN +B=idx89761 (tbp=9216/cbp=13952). NOT Brick 1: per-primitive TEX0, multi-resident cache, 640x480, cross-draw Z. + +## Preflight (gs_make_sh3_multitex_fixture.py) — fail-CLOSED, PASS +- authentic dump order (A idx < B idx); same frame f1; DIFFERENT texture keys (11264 vs 9216). +- on-screen overlap: A[203..340]x[10..282] ∩ B[245..490]x[57..390] = [245..340]x[57..282]. +- each texture+CLUT INDEPENDENTLY RESIDENT at its draw-time epoch (per-draw local-mem reconstruction); the two + textures differ (real multi-texture, not aliasing); the two CLUTs differ. +- CLUTs RELOCATED to distinct, non-overlapping, in-BRAM CBPs: A->CBP=480 (0x1E000), B->CBP=484 (0x1E400). + +## Emit — union geometry (Codex's numbers) + two of everything + independent A->B reference +- union origin (202,9), content 289x381 -> stored FB 320x381 (FBW=5), stride 1280 B, size 0x77100, scanout 15240 + beats/frame; HDMI shows all 320 cols (31 right cols precleared-black beyond the 289px content). +- two feeder lists (dump order): A (TEX0 CBP_A) 68 tris/619 words; B (TEX0 CBP_B) 68 tris/619 words; max staging addr + 618 < 12-bit 4096. +- two textures de-swizzled -> LPDDR + per-texture CRC: A sum32=0x95a83cbc, B sum32=0xfbdeaa32 (=Ch354's tbp=9216). +- two relocated CLUTs; bootlet uploads BOTH (A->CBP_A, B->CBP_B); each list's scene-level TEX0 (CLD=1) selects its CBP. +- independent A->B composed reference (dump order, DECAL paint-order, B over A): 27455 covered, 9849 A&B overlap px. + +## Integration sim (tb_top_psmct32_sh3_multitex) — PASS on ALL Codex gates +- TWO cache fills, each a FRESH fill_done low->high (rearm), correct beats(8192)/bytes(262144)/0 rd_errs, texture- + specific CRC: A=0x95a83cbc THEN B=0xfbdeaa32. +- NO stale-frame_drained race: scene A = fresh low->high; scene B = high->low->high (an observed FALL proves B's beats + flowed and cleared A's stale high before the fresh rise). Enforced by a fd_before-aware run_scene task. +- preclear EXACTLY once; scanout (video_src) disabled until the SECOND fresh drain. +- records_emitted = 68 per list; writer ovf/BRESP = 0; scanout 15240 beats/frame EXACT; underflow=0. +- final FB scored vs the independent A->B reference: OVERLAP(A&B) COMPOSITE = 96.7% <=1-texel (gated >=95%) — proves B + (tex B + relocated CLUT B) correctly overwrote A. clut_bad=0 (every covered px in palette A or B). + +## Two SEPARATE claims (as Ch354) +- CLAIM 1 multi-texture accumulation/composite: PROVEN — overlap composite 96.7% >=95%, clut_bad=0, cache rearmed with + correct per-texture CRCs, anti-stale drains, exact scanout beats. +- CLAIM 2 fidelity: ALL=69.3% (REPORTED, not gated) — dragged by the A-only region = draw 19562's OWN per-draw + perspective-sampling fidelity (the parked limit; B/89761 renders fine, hence the 96.7% B-dominated overlap). Whether + to independently verify 19562-alone is an open question for Codex. + +## Remaining before board fit (Codex: no fit until runtime staging also passes) +- Host two-group RUNTIME-STAGING flow: preclear once; upload+fill+CRC tex A; STREAM list A (report words/records, 12-bit + bound); GO A + observe fresh drain; REFILL+CRC tex B; STREAM list B; GO B + observe high->low->high; video_src after + the 2nd drain. Then board fit (owner-gated). + +## Codex round 2 — NEGATIVE-Q root cause + exact canonicalization (RESOLVED) +The combined ALL=69.3% was masking a real defect, NOT the parked perspective limit. Diagnostic (ONLY=A/B/AB + +FBDUMP + compose_mt.py): +- A→B RTL composition == combined AB, 0/121920 px BIT-EXACT (accumulation/order correct). +- CLUT relocation CORRECT: A rendered 100% in palette A, B 100% in palette B (palA ∩ palB = ∅). +- ONLY=B (89761, positive Q) = 95.6%; ONLY=A (19562) = 27.4% with a CORRECT CLUT. +- ROOT CAUSE: idx19562 has NEGATIVE q/s/t (q[-0.00039..-0.00024]); 89761 positive. Codex confirmed the RTL + perspective reciprocal input/products are UNSIGNED -> negative Q is unsupported (not merely imprecise). + +FIX (Codex) — exact host-side homogeneous-coordinate canonicalization in the fixture tool, BEFORE fixed-point pack: +per triangle, all-Q-positive unchanged; all-Q-negative -> negate every vertex's S,T,Q (EXACT: (-s)/(-q)=s/q, and the +negation of a linear attribute interpolates identically); mixed-sign/zero Q -> FAIL CLOSED. Overflow-checked. +- SYNTHETIC GATE: a positive-Q triangle and its all-negated twin pack BIT-IDENTICALLY (self-test PASS). +- 19562-alone re-rendered vs the UNCHANGED reference: 27.4% -> 93.0%, clut_bad=0 (oracle fixed to not count + RTL-unwritten coverage-edge pixels as clut_bad). +- A→B composition re-run: still 0/121920 BIT-EXACT. +- Default AB acceptance: ALL 69.3% -> 95.1%, OVERLAP composite 96.4% (>=95%), clut_bad=0, 15240 beats, PASS. + +RECORDED: the feeder CANONICALIZES homogeneous coordinates to positive Q. This is NOT native signed-Q hardware +support; a true signed reciprocal path remains a later platform extension for mixed-sign triangles. + +## Ch355 Brick 1 status: integration PROVEN. Remaining before fit = host two-group runtime-staging flow. + +## Board prep (Ch355 multi-texture) — verified in sim, owner-gated for the fit +- Board top: `GS_SH3_LPDDR_FB_MULTITEX` overrides SCANOUT_LB to STRIDE=1280/ROW_BEATS=40/NROWS=381 (320x381, FBW=5) and + FEEDER_STG_WORDS->2048; everything else shared with GS_SH3_LPDDR_FB. Elaborates clean (exit 0) under + GS_SH3_LPDDR_FB + GS_SH3_LPDDR_FB_MULTITEX + GS_LPDDR4B_FB + GS_LPDDR_TEX. +- FB 320x381, stride 1280, size 0x77100, scanout 15240 beats/frame. +- Bootlet (bios/payload_sh3_mt) uploads BOTH relocated CLUTs (CBP_A=480, CBP_B=484). RUNTIME staging -> NO + FEEDER_STG_INIT_FILE (feeder starts empty; the host streams each per-scene list). +- Host `tools/ps2_sh3_multitex.c` (the two-group runtime flow): wait feeder ready -> FB base 0 -> preclear ONCE + (121920 words, 0..0x77100) -> fill+CRC tex A (fresh fill_done, crc 0x95a83cbc, 8192 beats/262144 bytes/0 rd_errs) -> + STREAM list A (reset 0x0D8, per-word LO 0x0DC/HI 0x0E4; report words/records + 12-bit bound) -> arm writer, GO A, + fresh drain (0x02C[6]) -> REFILL+CRC tex B (0xfbdeaa32) -> STREAM list B -> GO B, frame_drained HIGH->LOW->HIGH -> + video_src after the 2nd fresh drain. Compiles -Wall clean; dry-run parses texA/texB CRCs + 68 tris/619 words each. +- Build profile `sh3_lpddr_fb_multitex` (select_de25_profile.sh + QSF): SCENE GS_SH3_LPDDR_FB + GS_SH3_LPDDR_FB_MULTITEX + + GS_LPDDR_TEX (no bitstream feeder init); FIXTURE bios/payload_sh3_mt. Ran profile-select + verified the QSF. +- BOARD RUN: `sudo ./ps2_sh3_multitex sh3_mtA_tex_lpddr.mem sh3_mtB_tex_lpddr.mem feeder_sh3_mtA.mem feeder_sh3_mtB.mem`. + +## Codex round 3 — bridge-streaming sim test (closes the gap that hid the board bug) +BOARD RUN #1 rendered 0 beats: the host wrote 0x0D8=1 (SET staging addr) instead of 0, so word0/header landed at +slot 1 -> feeder read ntris=0. Root cause is RTL: ps2_hps_bridge.sv:1171 `feeder_addr_q <= wdata_lane` (0x0D8 W SETS +the address to the written value). Host fixed to write 0 (matches ps2_feeder.c); BOARD RUN #2 = full success. +The gap: BOTH the multi-texture TB and tb_top_psmct32_feeder_bridge_demo drove feeder_stg via $readmemh / direct +waddr — neither exercised the real 0x0D8/0x0DC/0x0E4 protocol. + +Closed in tb_ps2_hps_bridge (joins the full regression): a model_stg captures the bridge's commit strobe +(feeder_stg_we_tgl_o + waddr/wdata), and the test stages TWO complete lists EXCLUSIVELY via bridge register writes: +- Scene A (10 words): 0x0D8=0, per-word 0x0DC(lo)/0x0E4(hi) -> every word checked at its slot, ESPECIALLY word0; + final 0x0DC readback == nwords. +- NEGATIVE test: 0x0D8=1 -> word0 mis-slots to slot 1 (reproduces the exact board failure; pins the addr-set semantics). +- Scene B (6 words, different): re-stage after 0x0D8=0 (A->B, no $readmemh) -> every word + word0 + final addr. +- records_emitted readback (0x0E4 R) == 68. +tb_ps2_hps_bridge PASS. This exercises the exact host<->bridge address path that failed on silicon; the render/drain +per scene is silicon-verified (BOARD RUN #2) + covered by tb_top_psmct32_sh3_multitex. + +## Ch355 Brick 1: BANKED — multi-texture composition on silicon + the runtime-staging gap closed. diff --git a/docs/ch356_audit_log.md b/docs/ch356_audit_log.md new file mode 100644 index 0000000..8733b1c --- /dev/null +++ b/docs/ch356_audit_log.md @@ -0,0 +1,81 @@ +# Ch356 audit log — N-TEXTURE SCHEDULER (data-driven epoch descriptors) + +Codex rung after Ch355. Generalizes Ch355's hard-coded two-group flow to a DATA-DRIVEN scheduler over ordered authentic +draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating into ONE LPDDR framebuffer via scene-level texture rebind + +runtime staged-list retriggering. Default N_EPOCHS=3 (dump order): E0=idx11671 (tbp=10240) E1=idx19562 (tbp=11264) +E2=idx89761 (tbp=9216). Runtime CLUT UPLOAD is OUT of scope (Codex): the scheduler operates over a PRELOADED CLUT table +(the bootlet uploads all N relocated CLUTs); each epoch SELECTS its palette via its list's scene-level TEX0 CBP. + +## Preflight (gs_make_sh3_scheduler_fixture.py) — fail-CLOSED, PASS +- >=3 epochs; authentic ascending dump order; single frame f1. +- >=3 DISTINCT textures (tbp 10240/11264/9216); each PSMT8 512x512 perspective TME (fst=0) — supported format/state. +- each texture + CLUT INDEPENDENTLY RESIDENT at its draw-time epoch (per-epoch local-memory reconstruction). +- palettes pairwise-DISTINCT (real multi-texture, no aliasing). +- CLUTs relocated to distinct, non-overlapping, in-BRAM CBPs: E0->480 E1->484 E2->488 (each 1 KiB / 4 blocks, VRAM 512 blocks). +- per-triangle Q-canonicalization: all-neg -> negate S/T/Q (exact); mixed-sign/zero -> FAIL CLOSED. neg-Q per epoch: 68/68/0. +- each list fits staging (619 words < 2048); deterministic union framebuffer geometry. + +## Emit — union geometry + N of everything + composed + per-epoch references +- union origin (170,9), content 321x381 -> stored FB **384x381 (FBW=6), stride 1536 B, size 0x8ee00, scanout 18288 + beats/frame**. +- N feeder lists (canonicalized): feeder_sh3_sched{k}.mem, each 68 tris / 619 words. Each list's TEX0 CBP = its relocated palette. +- N textures de-swizzled (LINEAR) -> LPDDR single region 0x200000: sh3_sched{k}_tex_lpddr.mem. Per-epoch CRC (the cache-fill CRCs): + E0=0x26a88b77 E1=0x95a83cbc E2=0xfbdeaa32 (E1/E2 == Ch355's texA/texB). +- N relocated CLUTs; bootlet (bios/payload_sh3_sched) preloads ALL N via N 256x1 BITBLTs; DISPLAY1 = 384x381. +- composed reference (paint-order DECAL) sh3_sched_refmap.mem: [31]cov [30]int [28]multi(>=2) [26:24]owner_epoch [17:9]tu [8:0]tv. + 42414 covered px, 6124 multi-epoch (>=2 distinct) px. Per-epoch refmaps sh3_sched{k}_refmap.mem carry each epoch's OWN (tu,tv). +- descriptor table sh3_sched_epochs.txt (META line + one row/epoch: k idx tbp cbp tex_file lpddr size crc list_file words records) — the host reads it. +- params sh3_sched_params.vh (FBW/FBPXW/FBH, TEX_*, N_EPOCHS, EPk_CRC/EPk_NTRIS/EPk_CBP). +- canonicalization self-test PASS: a positive-Q triangle and its all-negated twin pack BIT-IDENTICALLY. + +## Integration sim (tb_top_psmct32_sh3_sched) — PASS. All Codex acceptance gates: +- preclear EXACTLY once (fb precleared in the initial block, never between epochs). +- 3 FRESH cache fills, each fill_done low->high (rearm), beats=8192 bytes=262144 rd_errs=0, epoch CRC exact (0x26a88b77/0x95a83cbc/0xfbdeaa32). +- 3 lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata), NOT the $readmemh backdoor — closes + the Ch355 sim gap where the write-port sequencing was untested. Each streams the full 2048 STG words (staging fully reset); + word0 (ntris header) verified in the DUT staging = 68 per epoch. +- 3 FRESH ORDERED drains: E0 low->high (first render, falls 0->0 rises 0->1); E1 high->low->high (falls 0->1 rises 1->2); + E2 high->low->high (falls 1->2 rises 2->3). records_emitted=68 each; writer ovf=0 bresp=0. +- scanout held OFF until the last fresh drain; scanout beats/frame = **18288 EXACT**; underflow=0 rd_errs=0; 171720 px checked. +- oracle (per-pixel, multi-texture correctness): each covered px must equal ONE covering epoch's texel (each epoch's own + (tu,tv) from refmap_ep[k]) within <=1 texel; clut_bad = colour in NO epoch palette. Result: ALL=94.1% <=1texel, MULTI(>=2)=92.2%, + clut_bad=0. The <=1texel % is RTL reciprocal-LUT fidelity (per-epoch isolated ONLY=k: 93.3/93.0/95.6% — matches Ch355), NOT + accumulation. Gated at the documented 90% reciprocal floor. + +## Accumulation correctness — 100% BIT-FOR-BIT (the decisive proof; make tb_top_psmct32_sh3_sched_compose) +- render each epoch ALONE (+ONLY=k +FBDUMP) over a precleared FB, then composite the isolation dumps in paint order + (nonzero-wins DECAL) and compare to the joint ALL render. +- **compose_sched.py: 146304/146304 px, 0 mismatch — 100.0000% BIT-FOR-BIT.** The scheduler drawing the epochs together + produces exactly the same FB as compositing the individually-rendered epochs: no cache bleed, no stale pixels, correct rebind. +- (An earlier 365-px discrepancy was a bug in MY compose heuristic — a reference-covered-but-RTL-unwritten epoch-2 pixel + wrongly "owned" a value-0 slot, masking the lower epoch that actually drew. Pure nonzero-wins DECAL is the correct operator.) + +## Host (ps2_sh3_sched.c) — data-driven, builds -Wall clean, dry-run OK +- reads sh3_sched_epochs.txt (META + rows); loads each epoch's texture+list; verifies local CRC per epoch. +- flow: wait ready -> FB base 0 -> preclear ONCE (146304 words) -> for each epoch: upload tex -> LPDDR 0x200000, FRESH fill + + verify CRC/beats/rd_errs -> STREAM list (0x0D8=0 reset, 0x0DC/0x0E4 commit) -> arm writer (k==0) -> GO + fresh ordered + drain (k==0 low->high; k>0 high->low->high anti-stale) -> records==tris -> enable scanout after the LAST drain. +- register map identical to ps2_sh3_multitex (frame_drained 0x02C[6], staging 0x0D8/0x0DC/0x0E4, GO 0x0E8). +- BOARD RUN: `sudo ./ps2_sh3_sched sh3_sched_epochs.txt` (all fixtures in the cwd). + +## Board prep — fit-ready, owner-gated +- de25 top: new `GS_SH3_LPDDR_FB_SCHED` branch -> SCANOUT_LB 1536/48/381 (384x381, 18288 beats/frame) + FEEDER_STG_WORDS=2048. + Elaborates clean under GS_SH3_LPDDR_FB+_SCHED+GS_LPDDR4B_FB+GS_LPDDR_TEX+USE_QSYS_TOP (only the known Quartus-only EMIF_Qsys + is unresolved in iverilog — same status as multitex; Quartus has the real IP). +- profile `sh3_lpddr_fb_sched` (select_de25_profile.sh): fixtures bios/payload_sh3_sched; macros GS_SH3_LPDDR_FB + + GS_SH3_LPDDR_FB_SCHED + GS_LPDDR_TEX. QSF verified (macros + fixtures applied; MULTITEX cleared). NO FEEDER_STG_INIT_FILE + (runtime-staged, feeder starts empty). + +## Copyright — all SH3-derived data LOCAL/gitignored +- fixtures (*.mem/.vh), the epoch descriptor table (sh3_sched_epochs.txt), and rendered FB dumps (sim/build/sched_fb_*.hex, + dump-derived per-pixel data) are gitignored. Added `*sh3*.txt` to .gitignore for the descriptor table. Only OWN code + (tb_top_psmct32_sh3_sched.sv, gs_make_sh3_scheduler_fixture.py, compose_sched.py, ps2_sh3_sched.c) is trackable. + +## Two claims +1. **Accumulation/scheduling PROVEN EXACT**: joint N-epoch render == composited isolation dumps 100% bit-for-bit; 3 fresh + cache rearms with per-epoch CRCs; 3 write-port-streamed lists (word0 verified); 3 fresh ordered anti-stale drains; exact + 18288 scanout beats; clut_bad=0; 6124 multi-epoch overlap px exercised. +2. **Fidelity** = 94.1% ALL / 92.2% MULTI <=1texel, i.e. the RTL 11-bit reciprocal floor (per-epoch isolated 93.0-95.6%, + consistent with Ch355). Signed reciprocal for mixed-sign triangles remains a later platform extension. + +Next rungs (Codex earlier): 640x480; persistent cross-draw Z (only if a census shows the chosen draws need it — no speculative Z). diff --git a/docs/ch357_audit_log.md b/docs/ch357_audit_log.md new file mode 100644 index 0000000..cdc9598 --- /dev/null +++ b/docs/ch357_audit_log.md @@ -0,0 +1,59 @@ +# Ch357 audit log — NATIVE 640×480 LPDDR framebuffer + +Codex rung after Ch356. The Ch356 N-texture scheduler on a **native 640×480** LPDDR framebuffer. Draws land at their +**authentic screen coordinates** (the Ch356 union-origin translation is removed). The scheduler and host are **unchanged** +from Ch356 — only the framebuffer geometry differs. Same 3 epochs (dump order): E0=idx11671, E1=idx19562, E2=idx89761. + +## Geometry (Codex's spec — all gated in the fixture generator, fail-closed) +- FBW=10, stride **2560 B**, FB size **0x12C000** (1,228,800 B), **80 beats/row**, **38,400 beats/frame**. +- authentic coords (no union translation): draws span x[170..490] y[9..390] — fit inside 640×480 (gated: fail-closed if any vertex escapes). +- FB region **[0, 0x12C000) disjoint** from the texture region **[0x200000, 0x240000)** (gated). +- texture kept at 0x200000 (single-region cache), unchanged from Ch356. + +## Tooling — `gs_make_sh3_scheduler_fixture.py --fb640 --emit` +- new `--fb640` mode: native 640×480, OX=OY=0 (no translation), geometry/fit/disjoint gates, distinct fixture prefix + `sh3_s640` so Ch356 (`sh3_sched`) and Ch357 (`sh3_s640`) fixtures coexist. Ch356 output byte-identical (verified). +- emits: feeder_sh3_s640{k}.mem, sh3_s640{k}_tex_lpddr/idx/pal/refmap.mem, composed sh3_s640_refmap.mem, bootlet + bios/payload_sh3_s640 (preloads all N relocated CLUTs), sh3_s640_params.vh, descriptor table sh3_s640_epochs.txt. +- composed-reference pixel counts (42414 covered / 6124 multi-epoch) MATCH Ch356 exactly — translation-invariant, a good cross-check. +- Q-canonicalization self-test PASS. + +## Integration sim (tb_top_psmct32_sh3_sched640) — PASS +- preclear once; 3 FRESH cache fills (CRC 0x26a88b77/0x95a83cbc/0xfbdeaa32, beats=8192, rd_errs=0); 3 lists STREAMED via + the feeder write port (word0=68 each); 3 FRESH ORDERED drains (E0 low→high; E1/E2 high→low→high); records=68 each; ovf=0. +- scanout held off until the last drain; **scanout beats/frame = 38400 EXACT** (the PASS verdict gates on this `$error` check); + underflow=0, rd_errs=0; full 640×480 frame scored. +- oracle: ALL=94.1% ≤1texel, MULTI(≥2)=92.7%, **clut_bad=0** (reciprocal-limited fidelity, same as Ch356; not accumulation). + +## Accumulation correctness — 100% BIT-FOR-BIT on the FULL 640×480 frame (`make tb_top_psmct32_sh3_sched640_compose`) +- render ALL + each epoch in isolation (+ONLY=k +FBDUMP), composite (nonzero-wins DECAL, compose_sched.py --width 640), + compare to the joint ALL render. +- **307200/307200 px, 0 mismatch — 100.0000% BIT-FOR-BIT.** Full-frame reference; accumulation exact on the native FB. + +## Host — UNCHANGED (proves "scheduler unchanged") +- the SAME `ps2_sh3_sched` binary drives the 640 descriptor table: reads `fbwords` from the META line (307200), preclears + 0..0x12C000, iterates the same per-epoch flow. Dry-run green (all 3 CRCs, 619 words each, rc=0). +- BOARD RUN: `sudo ./ps2_sh3_sched sh3_s640_epochs.txt`. + +## Board prep — fit-ready, owner-gated +- de25 top: new `GS_SH3_LPDDR_FB_640` branch → SCANOUT_LB 2560/80/480 + FEEDER_STG_WORDS=2048. Elaborates clean under + GS_SH3_LPDDR_FB+_640+GS_LPDDR4B_FB+GS_LPDDR_TEX+USE_QSYS_TOP (only the known Quartus-only EMIF_Qsys unresolved in iverilog). +- profile `sh3_lpddr_fb_640`: fixtures bios/payload_sh3_s640; macros GS_SH3_LPDDR_FB + GS_SH3_LPDDR_FB_640 + GS_LPDDR_TEX. + QSF verified (macros + fixtures applied; no stale SCHED/MULTITEX). NO FEEDER_STG_INIT_FILE (runtime-staged). + +## Copyright +- `sh3_s640_epochs.txt` added to the exact-path ignore rule; all `sh3_s640*` fixtures + build FB dumps gitignored; only own + code (TB, generator, host, compose) trackable. + +## Regression — strict tally (full `make run`) +- `make` exit **0**; completion marker `=== all testbenches complete ===` present. +- **272 / 272** run-list TBs → PASS verdict (the 7 "missing" are name-aliases; their `_stub` targets confirmed PASS). +- **0** `] FAIL` verdicts (the 2 `FAIL-pix` hits are per-pixel diagnostic fields; both TBs verdict PASS, errors=0). +- **0** `$fatal` / assertion failures. The lone `errors=128` is the pre-existing `tb_gs_lpddr_scanout_lb` internal diagnostic + counter (unmodified by Ch357; TB verdicts PASS). The many "error" grep hits are benign iverilog lint (`$error` un-synthesizable). +- Identical tally to the Ch356 regression → Ch357 introduced **zero regressions**. + +## Claim +- Ch356 scheduler on a **native 640×480 framebuffer with authentic screen coordinates**. Accumulation 100% bit-for-bit on the + full frame; exact 38400 scanout beats; FB/texture ranges disjoint. Fidelity ~92–94% (reciprocal floor, unchanged). Census + Z usage next; no speculative Z. diff --git a/docs/ch357_zsched_integer_xy_closeout.md b/docs/ch357_zsched_integer_xy_closeout.md new file mode 100644 index 0000000..3ecb8b3 --- /dev/null +++ b/docs/ch357_zsched_integer_xy_closeout.md @@ -0,0 +1,59 @@ +# Ch357 ZSCHED integer-XY closeout + +This note pins the persistent-Z ZSCHED signoff contract after the float-oracle mismatch was isolated. + +## Contract + +- The RTL renderer consumes integer screen coordinates from XYZ2. `gs_stub.sv` takes the integer X/Y fields and has no GS 12.4 subpixel raster path in this milestone. +- The ZSCHED fixture generator also emits integer XYZ2 coordinates via `quant_xy` before packing vertices. The subpixel geometry from the dump is not present in the feeder data. +- Therefore the signoff reference maps must use the same quantized XY vertices. For ZSCHED, `gs_make_sh3_scheduler_fixture.py` defaults `--authz --tag zsched` to integer-XY reference. Use `--float-ref-xy` only as a report-only fidelity-debt diagnostic. + +Canonical fixture emit: + +```sh +make -C sim sh3_zsched_fixture +``` + +Equivalent explicit command: + +```sh +python3 tools/gs_make_sh3_scheduler_fixture.py \ + --draw-list 8634,12757,145742 --authz --tag zsched \ + --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit +``` + +## Current Gates + +- `tb_top_psmct32_sh3_zsched` gates the integer-XY oracle at the documented 90% MULTI <=1 texel reciprocal floor. +- `tb_top_psmct32_sh3_zrop` replays the captured fragment trace through the clamp16 persistent-Z scoreboard. +- `tb_top_psmct32_sh3_zint` drives the real raster into the persistent-Z/color LPDDR path and gates zero fragment drops. +- `sh3_zsched_board_compare` regenerates the fragment trace and zint framebuffer dump, requires the pulled board framebuffer to match zint byte-for-byte, then replays emitted fragment colors through clamp16 GEQUAL and requires exact framebuffer color agreement. +- These three targets are now prerequisites of the default `make -C sim run`. + +Measured integer-XY fixture result: ALL=20227/21645 (93.4%), MULTI=7111/7587 (93.7%), with `tb_top_psmct32_sh3_zsched` PASS. The old float-XY diagnostic stayed below the 90% MULTI floor because it compared against geometry that the hardware was not fed. + +Measured board readback result from the refreshed fixture: `sh3_zsched_board_fb.mem` and `sh3_zsched_zint_fb.mem` both hash to `acd4076dfe3843a384f8fa885613484c5e62a9bbcbb5dff4d5bf78b168a22e2f`; `cmp` reports no byte differences. `--owner replay-color` also reports `53760/53760 (100.00%)` exact for both board and zint, with 50184 replayed fragments, 29937 Z-pass updates, and 21590 covered pixels. + +## Board Readback + +After a board dump: + +```sh +sudo ./ps2_sh3_sched --zbuf sh3_zsched_epochs.txt --dump-fb sh3_zsched_board_fb.mem +scp terasic@192.168.50.161:~/sh3_zsched_board_fb.mem sim/data/top_psmct32_raster_demo/ +python3 tools/gs_fb_to_png.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ + sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.png 256 210 3 +make -C sim sh3_zsched_board_compare +``` + +Optional oracle diagnostic maps: + +```sh +make -C sim tb_top_psmct32_sh3_zsched +python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ + --owner replay-color --frags sim/traces/rtl/zsched_frags.txt +python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ + --owner replay --frags sim/traces/rtl/zsched_frags.txt --maps +``` + +The `--owner replay` texture/refmap radius score and `sh3_zsched_board_fb_*oracle_*.png` images are diagnostic only. The hard hardware-vs-RTL readback gate is `make -C sim sh3_zsched_board_compare`; the hard emitted-fragment content check is `--owner replay-color`. diff --git a/docs/ch358_audit_log.md b/docs/ch358_audit_log.md new file mode 100644 index 0000000..1810cdd --- /dev/null +++ b/docs/ch358_audit_log.md @@ -0,0 +1,10 @@ + + +CODEX INDEPENDENT VERIFICATION + CLOSE (2026-07-10): Codex re-verified the artifacts himself — RBF sha 9e9c5910 +matches board provenance; board FB and fresh zint640 FB share sha256 fd21e43f (cmp clean); replay-color +307200/307200, 0 mismatches, 0 stray. "Call it closed." TWO WORDING CORRECTIONS (precision): hold slack is +exactly 0.000 (met, NOT positive margin); "first-of-its-kind" is a project claim the local evidence cannot +prove — state the verified fact instead: native 640x480 persistent-Z for THIS three-draw strong-reject scene +on silicon, with scanout/texture/writer/depth paths all participating in the proof. NEXT CHAPTER (Codex): +draw-count scaling BEFORE motion — densify toward an SH3 texture cluster while preserving the board-vs-zint +gate. \ No newline at end of file diff --git a/docs/ch359_audit_log.md b/docs/ch359_audit_log.md new file mode 100644 index 0000000..a1c86c0 --- /dev/null +++ b/docs/ch359_audit_log.md @@ -0,0 +1,64 @@ +# Ch359 audit log — zs640c6: shared-texture RESIDENCY, 2x204-tri lists, native 640x480 persistent Z + +Codex-locked chapter: six SH3 draws sharing ONE PSMT8 texture (tbp=8192/cbp=13888), grouped into TWO ordered +204-triangle feeder lists (1843 words each), authentic GEQUAL/ZMSK=0/PSMZ16S, native 640x480. NEW capability: +EXPLICIT texture-cache residency — one upload+fill (epoch 0); epoch 1 carries reuse=1 in the descriptor and runs +on the resident cache. 408 tris vs Ch358's 122 (3.3x density). + +## Fixture/host/TB stack +- Generator --group-size (per-member strip expansion, no phantom bridging tris); shared-texture fail-closed gates + (tex idxw + CLUT BYTE-identical across draws; list-local state equality; ZTE=1/ZTST=GEQUAL/ZMSK=0/PSMZ16S decode; + native bounds; <=2048 words); ONE relocated CLUT; reuse in descs/params/epochs.txt. EMIT: 2x204/1843 EXACT + (Codex's numbers to the digit), crc 0xcf4cae27, ref 21071 covered / 6129 multi px. +- Census lesson: strip draws' triangles = nprim-2 (my verts//3 probe was wrong; proven vs zsched 46/58/18). +- Host: optional trailing reuse column (back-compat verified); reuse epoch = no tex file, no upload/fill, + fail-closed resident CRC/beats register verify. Dry-run rc=0 (zs640c6 AND legacy tables). +- TBs zs640c6_cap / zint640c6: 2-epoch arrays + EP_REUSE, reuse-epoch residency assert (fill_crc register), + fills==1 hard assert. LESSON: per-scene TB wait budgets scale with tris/epoch (204-tri epochs blew the + zs640-calibrated 800k-cycle budgets -> records=172/204 cut-off, cascading counter errors + phantom 65% fidelity). + +## THE FINDING — cold-Z burst vs request FIFO (and the Ch359 RTL change) +- zint640c6 @ REQ_DEPTH=256 (Ch358 silicon config): **424 fragment drops, ALL epoch 0** (empty-Z phase: every + z_rmw miss = dirty evict = 2x AXI), zero in epoch 1 (Z-reject heavy = clean misses). Scoreboard mismatches + (Z 320 / COLOR 316) == drop effects. High-water probe (Codex-corrected: write-domain wbin - gray2bin(rgray_s2), + parameterized modulus) saturated 256/256. +- Codex-authorized sim-only sweep: depth 512 -> zero drops, ep0 peak **478** (34 slots margin), scoreboard EXACT; + depth 1024 -> identical (bounded deterministic burst, not rate-bound). +- CODEX DECISION: **REQ_DEPTH=1024** (2.1x headroom for the next density rung; no Z-RMW/scene/SDC/clock change). + Changed: de25 top u_zc_emit + the 3 production-equivalent zint TBs; unit/replay depths (16/32) untouched. + +## Verification at depth 1024 (2026-07-10) +- Parse audit (QSF file list, exact macro set): clean (only pll/EMIF_Qsys/qsys_top IP). +- zc_emit unit PASS; zrop PASS (zsched 93.4/93.7); baseline zint PASS (Z 0/53760, drops=0, golden-identical); + zint640 PASS (Z 0/307200, golden-identical); **zint640c6 PASS (ZERO drops, Z 0/307200 + COLOR 0/21032 exact, + 204/204 records, ONE fill + REUSE verified)**; zs640c6_cap PASS (MULTI=90.2% >= 90 floor, ALL=85.3% + scene-dependent reciprocal floor, clut_bad=0 — flagged: floor margin is thin for future regenerations). +- Full regression: **282/282 PASS, 0 FAIL** (280 baseline + the two C6 gates now in the run list). + +## Board Proof And Provenance Correction +- The first depth-1024 GUI fit met timing, and its board host run passed every transport/runtime gate: 204/204 records + in both epochs, one fill plus verified reuse, and zero drops. The board framebuffer nevertheless differed from zint + at all 21032 covered pixels while retaining the exact C6 bounds=(84,101)..(340,301). This isolated the failure to + color provenance, not geometry, persistent Z, LPDDR transport, or FIFO depth. +- Root cause, verified in that fit's synthesis report: the QSF still selected Ch358 `bios_sh3_zs640.mem` and + `payload_sh3_zs640.mem`, so the board booted the old CLUT rather than C6's CBP=13888 palette. The C6 fixture and + host files were correct; the RBF's boot-image inputs were not. +- Corrected fit inputs: `sh3_lpddr_fb_z640c6` now selects `bios_sh3_zs640c6.mem` and + `payload_sh3_zs640c6.mem` through `scripts/select_de25_profile.sh`. The REQ_DEPTH=1024 top change remains part of + the same compile. No SDC, clock, or Z-RMW change is needed. + +## Handoff +Owner: run one full 26.1 GUI compile with the corrected C6 profile, then check STA before loading the RBF. Only after +timing is clean: run `scp_zs640c6_to_board.sh` (five files including the reuse-modified `ps2_sh3_sched.c`, recompile +on board), then `sudo ./ps2_sh3_sched --zbuf sh3_zs640c6_epochs.txt --dump-fb sh3_zs640c6_board_fb.mem`. Expect +`bounds=(84,101)..(340,301)`, retrieve the dump, and run `make -C sim sh3_zs640c6_board_compare`. + +## Closure (2026-07-10) +- Quartus 26.1 GUI RBF `ad4e8c9627520dcaba9babf2019ca5b28892799e0500f8f3300f4f2a29b5218c` compiled the corrected + `bios_sh3_zs640c6.mem` and `payload_sh3_zs640c6.mem` inputs. STA met: setup +0.095 ns, hold 0.000 ns, recovery + +1.042 ns, removal +0.185 ns, minimum pulse width +0.200 ns. +- On silicon: both 204-record epochs drained; epoch 0 uploaded/filled the texture and epoch 1 verified resident reuse; + zero fragment drops; output bounds `(84,101)..(340,301)`; 21032 nonzero pixels. +- `make -C sim sh3_zs640c6_board_compare` passed. The board and zint framebuffers had identical SHA-256 + `948d9c45df84ccf180faebe7b24e3e4445bcce390c8bfab91fb3b50885fcaa4`, and replay-color was exact at + 307200/307200 pixels. Ch359 is closed. diff --git a/docs/ch360_audit_log.md b/docs/ch360_audit_log.md new file mode 100644 index 0000000..f88ed54 --- /dev/null +++ b/docs/ch360_audit_log.md @@ -0,0 +1,48 @@ +# Ch360 audit log - zs640c12: 12-draw shared-texture residency at native 640x480 persistent Z + +## Scope + +Scale Ch359's six-draw shared-texture proof to twelve authentic SH3 draws without increasing feeder-list size: + +`119471,119684,119897 / 120110,120323,120536 / 120749,120962,121175 / 121388,121601,121814` + +All draws are PSMT8 `tbp=8192`, share the byte-identical resident CLUT at `cbp=13888`, have identical feeder-visible +state, and use authentic `ZTE=1`, `GEQUAL`, `ZMSK=0`, `PSMZ16S`. They form four ordered 204-triangle / 1843-word +epochs: one LPDDR texture upload/fill followed by three fail-closed cache reuses. + +## Fixture And Fidelity Decision + +- The generator preflight passed native 640x480 bounds, signed-Q legality, state equality, shared texture/CLUT bytes, + and all four feeder-list capacities. +- Per-triangle auto PSCALE failed the content fidelity gate: isolated epochs 2/3 were 79.4%/81.5% and the full + multi-epoch score was 83.6%. +- Fixed `PSCALE=1024` for every C12 epoch corrected that host-fixture range choice without RTL: isolated epochs 2/3 + reached 92.0%/91.1%, while the full capture gate reached ALL=93.4% and MULTI=95.0%, with `clut_bad=0`. +- C12's BIOS and payload comment lines differ from C6, but their non-comment memory words hash identically. The + existing Ch359 signoff RBF therefore already contains the correct C12 bootlet contents; no QSF change or GUI fit. + +## Simulation Proof + +- Capture/residency: four `204/204` records, one fill, three verified reuses, four fresh drains, no writer overflow, + exact 38400 scanout beats/frame. +- Real-raster Z integration at `REQ_DEPTH=1024`: 151160 accepted fragments, 70796 Z passes, zero drops, four ordered + scene markers/drains, and exact scoreboards (Z 0/307200, COLOR 0/36022). +- Request-FIFO high-water by epoch: 478, 27, 416, 225. The 1024-depth production FIFO remains sufficient; no depth, + Z-RMW, LPDDR, clock, SDC, or RTL change is warranted. + +## Board Closure (2026-07-10) + +- The Ch359 signoff RBF `ad4e8c9627520dcaba9babf2019ca5b28892799e0500f8f3300f4f2a29b5218c` remained loaded and was + provenance-valid for C12 because the bootlet memory words are identical. +- Board host gates: four `204/204` drains, one fill plus three verified reuses, zero drops, 27041 framebuffer beats, + and output bounds `(84,94)..(367,385)` with 36022 nonzero pixels. +- Board and zint framebuffer SHA-256 matched exactly: + `1309fa4f307b9313231797c75973e5a42108460c19ec0a0c576d4da597d6303e`. +- Replay-color: 151160 fragments, 70796 persistent-Z updates, 36022 covered pixels, no stray coverage, and + `307200/307200` exact framebuffer pixels. Ch360 is closed. + +## Next Direction + +Keep draw-count scaling before motion, but first turn the C12 four-epoch test copies into one parameterized +shared-texture residency harness. The next density rung should then be selected from the same census and must retain +the fixed-1024 fixture contract unless a measured sweep proves another scale better for the chosen draws. diff --git a/docs/ch361_audit_log.md b/docs/ch361_audit_log.md new file mode 100644 index 0000000..5ad7f4f --- /dev/null +++ b/docs/ch361_audit_log.md @@ -0,0 +1,18 @@ +# Ch361 audit log -- C18 draw-count scaling + +## Scope + +Eighteen authentic, in-bounds SH3 PSMT8 draws were grouped into six ordered 204-triangle epochs at native 640x480. They share `tbp=8192`, `cbp=13888`, byte-identical texture/CLUT contents, and authentic `ZTE=1`, `GEQUAL`, `ZMSK=0`, `PSMZ16S` state. + +## Evidence + +- Fixture preflight passed; fixed `PSCALE=1024` and rounded XY were retained. +- Capture gate passed: ALL `44890/49149` (91.3%), MULTI `24969/26680` (93.6%), `clut_bad=0`, one fill plus five reuses, six fresh drains, no overflow or underflow. +- Real Z integration passed: 205744 fragments, 103300 Z passes, zero drops, exact Z `0/307200` and color `0/49071`. +- Board host gate passed: six 204-record epochs, one fill, five resident reuses, zero drops, 49071 nonzero pixels. +- Board framebuffer and Z integration framebuffer SHA-256: `a0eda56ef0140749451078a0fc82d85ea6e3342734dacdc22dd93f0a56dbb539`. +- Replay-color is exact: `307200/307200`; 205744 fragments, 103300 Z-pass updates, 49071 covered pixels. + +## Result + +Ch361 is closed on silicon with no RTL, SDC, QSF, or RBF change from the C6-signoff core. diff --git a/docs/ch362_audit_log.md b/docs/ch362_audit_log.md new file mode 100644 index 0000000..e122e06 --- /dev/null +++ b/docs/ch362_audit_log.md @@ -0,0 +1,19 @@ +# Ch362 audit log -- C24 draw-count scaling + +## Scope + +Twenty-four authentic SH3 draws were grouped into eight ordered 204-triangle epochs at native 640x480. The original next candidate `idx131306` was rejected before emission because its authentic Y extent reached 610; `idx132158` replaced it. The retained list stays in-bounds (`x=82..569`, `y=84..400`) and shares the C18 texture, CLUT, and authentic depth state. + +## Evidence + +- Fixture preflight passed with one shared texture/CLUT, fixed `PSCALE=1024`, and rounded XY. +- Capture gate passed: ALL `69277/73473` (94.3%), MULTI `34636/36352` (95.3%), `clut_bad=0`, one fill plus seven reuses, eight fresh drains, no overflow or underflow. +- Real Z integration passed: 346425 fragments, 167247 Z passes, zero drops, exact Z `0/307200` and color `0/73330`. +- New epoch request highs: epoch 6 = 330, epoch 7 = 234; both are bounded below the 1024-entry request FIFO. +- Board host gate passed: eight 204-record epochs, one fill, seven resident reuses, zero drops, 73330 nonzero pixels. +- Board framebuffer and Z integration framebuffer SHA-256: `6614d7211b9a668cfeda12e4fa2d6f469d3ee4d3a10bdf56c0119b35f93c7803`. +- Replay-color is exact: `307200/307200`; 346425 fragments, 167247 Z-pass updates, 73330 covered pixels. + +## Result + +Ch362 is closed on silicon with no RTL, SDC, QSF, or RBF change from the C6-signoff core. diff --git a/docs/ch363_audit_log.md b/docs/ch363_audit_log.md new file mode 100644 index 0000000..d503fa4 --- /dev/null +++ b/docs/ch363_audit_log.md @@ -0,0 +1,35 @@ +# Ch363 Audit Log - Five-Texture Persistent-Z Scheduler + +## Scope + +- Native 640x480 persistent-Z scene with five ordered authentic SH3 draws: + `5328,11671,77112,89164,119471`. +- Five distinct texture/CLUT bindings, relocated at CBP `480,484,488,492,496`. +- The cache is intentionally refilled for every epoch; this chapter proves rebinds rather than shared-texture residency. + +## Root Cause And Fix + +- The generated five-CLUT bootlet is 350 qwords. The shared simulation harness had inherited the 256-qword EE RAM default, so `$readmemh` truncated the payload. Epoch 3 consequently read partial CLUT data and produced 195 palette-invalid pixels. +- The production `GS_SH3_LPDDR_FB` board profile already allocates 32 KiB of EE RAM. Both shared 640 harnesses now explicitly use that same `RAM_SIZE_BYTES(32 * 1024)` capacity. +- The earlier CLAMP investigation was rejected by trace evidence: all sampled epoch-2/3/4 coordinates were within the 512x512 texture bounds. No feeder or sampler RTL change is retained. + +## Simulation Gates + +- `tb_top_psmct32_sh3_zs640mt5_cap`: PASS. + - Five texture CRC fills: `55070afa`, `26a88b77`, `a727234d`, `fbdeaa32`, `cf4cae27`. + - Five fresh drains, records `54,68,68,68,68`, no writer overflow or scanout underflow. + - Scanout: exactly 38,400 beats/frame. + - Oracle: ALL `61595/63749` (96.6%), MULTI `7701/7877` (97.8%), `clut_bad=0`. +- `tb_top_psmct32_sh3_zint640mt5`: PASS. + - Z preclear: 19,200 beats. + - 129,752 fragments fed, 118,355 Z passes, zero fragment drops. + - Exact final scoreboards: Z `0/307200` mismatch; COLOR `0/63617` mismatch. + - Request FIFO depth 1024 high-water by epoch: `415,401,64,222,47`. + +## GUI Fit And Board Closure + +- The authoritative QSF points to `bios_sh3_zs640mt5.mem` and `payload_sh3_zs640mt5.mem`; the Quartus 26.1 flow report and synthesis report both resolve those exact images. +- The July 11 GUI compile is signoff-clean: setup `+0.095 ns`, hold `0.000 ns`, recovery `+1.042 ns`, removal `+0.185 ns`, and minimum pulse width `+0.200 ns`. The generated `retroDE_ps2.core.rbf` was written after the QSF update. +- The RBF loaded successfully on the DE25 (`fpga0: operating`). The five-epoch host run passed all transfer, CRC, preclear, drain, and zero-drop gates. Its final framebuffer summary was `nonzero=63617`, bounds `(36,10)..(562,360)`. +- The board framebuffer and a fresh `tb_top_psmct32_sh3_zint640mt5` dump have identical SHA-256: `9e87678c0c88e3e2e90a187e69991069d58e88187d360d560df59f25219b99c5`. +- Independent replay-color verification is exact: `307200/307200` pixels, zero mismatches. Ch363 is closed: five authentic SH3 draws, five texture/CLUT rebinds, native 640x480 scanout, and persistent-Z are proven on silicon for this fixture. diff --git a/docs/ch364_audit_log.md b/docs/ch364_audit_log.md new file mode 100644 index 0000000..68d983e --- /dev/null +++ b/docs/ch364_audit_log.md @@ -0,0 +1,44 @@ +# Ch364 Audit Log - Mixed Texture Rebind And Residency + +## Scope + +- Native 640x480 persistent-Z composite of 28 ordered authentic SH3 draws. +- Four early single-draw texture/CLUT rebind epochs (`5328`, `11671`, `77112`, `89164`) followed by the 24-draw + `tbp=8192` cluster in eight 204-triangle feeder lists. +- Twelve epochs total: five upload/fill operations and seven consecutive, fail-closed verified reuses of the final + resident texture. + +## Fixture Contract + +- `gs_make_sh3_scheduler_fixture.py` now accepts `--group-sizes`, an explicit ordered epoch partition. Every + multi-draw group must have identical feeder-visible state and byte-identical texture/CLUT data; reuse is emitted + only when the immediately preceding descriptor leaves those same bytes resident. +- The selected partition is `1,1,1,1,3,3,3,3,3,3,3,3`. It passed authentic ordering, native bounds, state, + texture/CLUT, staging-capacity, and depth-state gates. +- The Ch364 BIOS and payload memory words hash identically to Ch363 MT5. The existing GUI-fitted RBF is therefore + provenance-valid; no RTL, QSF, SDC, GUI compile, or RBF reload was required. + +## Simulation Proof + +- Capture/residency: PASS. Five CRC-verified fills, seven verified reuses, 12 ordered fresh drains, no writer + overflow or scanout underflow, and exactly 38,400 scanout beats/frame. +- Texture oracle: ALL `105761/110544` (95.7%), MULTI `40756/42861` (95.1%), `clut_bad=0`. +- Real Z integration: PASS. 465,250 fragments fed, 214,897 persistent-Z updates, zero drops, 12 markers/drains, + exact Z `0/307200`, and exact color `0/110324`. +- Request FIFO high-water by epoch: `415,401,64,222,341,21,112,166,72,176,311,240`; all remain bounded below the + 1024-entry production FIFO. + +## Board Closure + +- Board host gate: all five texture uploads passed CRC, all seven cache reuses verified the resident CRC, all 12 + drains returned their expected records, and every epoch reported zero fragment drops. +- Final board framebuffer: 110,324 nonzero pixels, bounds `(36,10)..(568,399)`, sum `0x61884052`, xor `0x802cf68e`. +- Board and zint framebuffer SHA-256 match exactly: + `fdff2f34eac22ee140b64d8fac129627549bbb0f6db37d4b91807a9058e47a04`. +- Replay-color is exact: 465,250 fragments, 214,897 Z-pass updates, 110,324 covered pixels, no stray coverage, and + `307200/307200` exact framebuffer pixels. + +## Result + +Ch364 is closed on silicon: 28 authentic SH3 draws, five texture/CLUT bindings, seven verified residency reuses, +native 640x480 scanout, and persistent depth all agree with integration simulation and the independent replay oracle. diff --git a/docs/ch365_audit_log.md b/docs/ch365_audit_log.md new file mode 100644 index 0000000..9b086b1 --- /dev/null +++ b/docs/ch365_audit_log.md @@ -0,0 +1,44 @@ +# Ch365 Audit Log - Two-Frame Motion Sequence + +## Scope + +- Native 640x480 persistent-Z presentation of two adjacent authentic SH3 capture states. +- Frame A is Ch364's 28-draw mixed-rebind/residency composite (`zs640m28`); frame B is the adjacent capture's + 24-draw texture cluster (`zs640b24`). +- The production bootlet preloads the union of their six relocated CLUTs at CBPs `480,484,488,492,496,500`. +- The host sequencer clears color and Z at every frame boundary, then presents the A/B tables in order. + +## Compile Provenance + +- The GUI build loaded `bios_sh3_zs640motionab.mem` and `payload_sh3_zs640motionab.mem`. +- Quartus reports `Timing requirements were met`: setup `+0.095 ns`, hold `0.000 ns`, recovery `+1.042 ns`, + removal `+0.185 ns`, and minimum pulse width `+0.200 ns`. +- The loaded RBF was produced after the motion bootlet and QSF inputs. + +## Frame-B Simulation And Board Proof + +- Capture/residency: PASS. One CRC-verified fill, seven verified reuses, eight ordered fresh drains, no writer + overflow or scanout underflow, and 38,400 scanout beats/frame. +- Texture oracle: ALL `101111/108647` (93.1%), MULTI `66968/69063` (97.0%), `clut_bad=0`. +- Persistent-Z integration: PASS. 664,865 fragments fed, 252,657 Z updates, zero drops, exact Z `0/307200`, and + exact color `0/108435`. Per-epoch request-FIFO high-water was `546,297,393,498,32,572,617,592`, below the + 1024-entry production depth. +- Board host gate: all eight drains were fresh with 204 records, the one fill and all seven reuses passed CRC, + and every epoch reported zero fragment drops. +- Board framebuffer: 108,435 nonzero pixels, bounds `(12,128)..(633,469)`, sum `0xdd9faa5a`, xor `0x80e70a5e`. +- Board and integration-simulation framebuffer SHA-256 match exactly: + `3191d75983e72a158f91f15cc1f57b6ff7c5e40d5bbb4a49957db06db4e2fded`. +- Replay-color is exact: 664,865 fragments, 252,657 Z-pass updates, 108,435 covered pixels, no stray coverage, + and `307200/307200` exact framebuffer pixels. + +## Two-Way Sequencer Gate + +- A one-loop run established the A-to-B boundary and captured the final B framebuffer above. +- A subsequent two-loop run exercised A-to-B, B-to-A, A-to-B again. All 40 epoch drains were fresh, all expected + record counts matched, every texture fill/reuse CRC gate passed, and every fragment-drop gate remained zero. + +## Result + +Ch365 is closed on silicon: two authentic 640x480 persistent-Z frame states are sequenced in both directions by the +host without reconfiguration. Each endpoint has independent integration-simulation and replay-oracle framebuffer +proof, and the hardware frame-boundary protocol has passed across a full A/B/A/B loop. diff --git a/docs/ch367_audit_log.md b/docs/ch367_audit_log.md new file mode 100644 index 0000000..6030e3c --- /dev/null +++ b/docs/ch367_audit_log.md @@ -0,0 +1,45 @@ +# Ch367 Audit Log - Runtime CLUT At 24 Draws + +## Scope + +Join the established native-640x480 24-draw shared-texture cluster to the runtime CLUT transport. The fixture has +eight ordered 204-record epochs, one texture fill, seven CRC-verified residency reuses, and a host runtime palette +copy before every epoch. + +## FIFO Sizing + +- At request depth 1024, the runtime fixture removes the boot-time CLUT-loader throttle and epoch 2 dropped 19 + fragments after the high-water counter saturated at 1024. +- At depth 2048, epoch 2 accepted all 58,861 fragments at high-water 1041. Integration simulation also passed + epochs 0 through 6 with zero drops; epoch 5 was the largest observed simulation burst at 1855. +- The DE25 top therefore changes only `u_zc_emit` request depth from 1024 to 2048. No clock, SDC, or protocol + change is involved; `zc_g_drops` remains the fail-closed hardware guard. + +## GUI Fit And Board Gate (2026-07-12) + +- Quartus 26.1 STA finished at 08:40:47 and met every requirement: setup +0.090 ns, hold 0.000 ns, recovery + +1.043 ns, removal +0.201 ns, and minimum pulse width +0.200 ns. +- The 08:41 core RBF SHA-256 is `8e3fa2b8b14de9b4660a542ec7ffed5c59353ec8583458f31339a4b4183f42d2`; fit reports + the request FIFO as a 2048 x 74 dual-clock M20K implementation. +- The RBF was SHA-verified on the DE25 and loaded through `core_loader.sh`; `fpga0` reported `operating` and the + overlay reported `applied`. +- Board scheduler gate: all eight 204-record epochs drained freshly; one texture CRC-verified fill and seven + resident CRC checks passed; every runtime palette sum was `0x47097d4c`; every epoch reported zero drops. +- Board dump: 73,330 nonzero pixels, bounds `(84,85)..(568,399)`, sum `0xc521381a`, xor `0x8021455e`. + +## Exact Closure + +- The trace-enabled integration run passed all eight epochs: 346,425 accepted fragments, 167,247 persistent-Z + updates, eight scene markers/drains, zero drops, and exact local scoreboards (Z `0/307200`, color `0/73330`). +- The highest simulated request-FIFO occupancy was 1855 in epoch 5; the final epoch reached 1156. Both remain below + the production 2048 entries and agree with the board's zero-drop counters. +- Board and integration-simulation framebuffers are byte-identical with SHA-256 + `6614d7211b9a668cfeda12e4fa2d6f469d3ee4d3a10bdf56c0119b35f93c7803`. +- Replay-color is exact at `307200/307200` pixels: 346,425 fragments, 167,247 Z-pass updates, 73,330 covered + pixels, and zero uncovered writes. + +## Result + +Ch367 is closed on silicon: 24 authentic SH3 draws, runtime CLUT staging on every epoch, one texture fill plus +seven verified resident reuses, native 640x480 scanout, and persistent depth all agree with integration simulation +and the independent replay oracle. diff --git a/docs/ch368_audit_log.md b/docs/ch368_audit_log.md new file mode 100644 index 0000000..f9903ea --- /dev/null +++ b/docs/ch368_audit_log.md @@ -0,0 +1,65 @@ +# Ch368 Audit Log - Runtime CLUT Adjacent-Frame Motion + +## Scope + +Add the adjacent SH3 capture frame to the established 24-draw runtime-CLUT path, then prove A/B motion with the +same native-640x480 persistent-Z, board-versus-simulation, and replay-color gates used by Ch367. + +## Frame-B Capacity Measurement + +- Frame B is the 24-draw shared-texture cluster from capture `20260624224121`, emitted as `zsrtb24`: eight ordered + 204-record epochs, one texture fill, seven CRC-verified reuses, and runtime palette staging before every epoch. +- At request depth 2048, epoch 3 saturated the request FIFO and dropped 151 fragments. This is a bounded-capacity + failure, not a board candidate. +- A complete depth-4096 integration run passed all eight epochs with exact Z and color scoreboards: Z `0/307200`, + color `0/108435`, zero drops, and 664,865 accepted fragments. +- Per-epoch request-FIFO high water: 1060, 1074, 1431, 2198, 68, 3610, 2993, and 3340. The measured maximum is + 3610, leaving 486 entries of headroom at depth 4096. + +## Production Change + +- The DE25 top changes only `u_zc_emit` request depth from 2048 to 4096. No clock, SDC, or protocol change is + involved. The existing `zc_g_drops` counter remains the fail-closed board guard. +- Focused regressions pass after the source change: `tb_gs_lpddr_zc_emit`, `tb_clut_stage_cdc`, and + `tb_top_psmct32_runtime_clut`. The complete `zsrtb24` depth-4096 integration run is the capacity and exactness + proof for this value. + +## First GUI Fit And Response-Ready Cut + +- The first 4096-entry GUI fit failed setup only: WNS `-0.063 ns`, TNS `-0.126 ns`; hold and every other signoff + class remained clean. The six failing paths terminated at the EMIF write-response FIFO. +- The two launch families were the Z-RMW `bready` and write-arbiter `grant` controls, both feeding the arbiter's + live `m_bready` mux. The arbiter now registers response-ready from the final W handshake, removing that live + grant/client-ready cone while retaining the selected transaction through B acceptance. +- The response-path regression is clean: `tb_gs_lpddr_wr_arb` passes its priority/transaction checks and + `tb_gs_lpddr_zc_emit` passes three complete Z/color drains. The full `zsrtb24` depth-4096 integration gate also + passes after the cut: 664,865 accepted fragments, zero drops, Z `0/307200`, and color `0/108435`. +- At that point, the pending gate was one full Quartus 26.1 GUI compile; the board remained on the Ch367-proven RBF + until STA was clean. + +## Corrective GUI Fit And Silicon Proof + +- Quartus 26.1 STA completed at 15:53 with timing requirements met: setup `+0.076 ns`, hold `0.000 ns`, recovery + `+1.045 ns`, minimum pulse width `+0.200 ns`, and zero TNS. The fitted request FIFO is a 4096 x 74 dual-clock + M20K implementation using 16 M20Ks. Core SHA-256: `b146503317ba8268fee06a83b2650cdf57cb79e64da3b6b5aa6a22e9b356cf60`. +- The RBF was SHA-verified on the DE25 and loaded through `core_loader.sh`; `fpga0` reported `operating`. +- Frame B board gate passed all eight 204-record epochs: one texture fill plus seven resident CRC reuses, eight + runtime palette copies, fresh drains, and zero drops. Its board framebuffer is byte-identical to integration + simulation at SHA-256 `3191d75983e72a158f91f15cc1f57b6ff7c5e40d5bbb4a49957db06db4e2fded`; replay-color is exact + at `307200/307200` pixels. + +## A/B Motion Closure + +- The host ran `A -> B -> A -> B` with a fresh color/Z preclear, texture fill, runtime palette staging, and eight + ordered drains for every frame. All 32 epochs reported zero drops. +- The four board boundary dumps alternate exactly: A dumps 0 and 2 hash to + `6614d7211b9a668cfeda12e4fa2d6f469d3ee4d3a10bdf56c0119b35f93c7803`; B dumps 1 and 3 hash to + `3191d75983e72a158f91f15cc1f57b6ff7c5e40d5bbb4a49957db06db4e2fded`. Each equals its matching integration + framebuffer byte-for-byte. +- Independent replay-color checks are exact for both alternating frames: A is `307200/307200` over 346,425 + fragments and B is `307200/307200` over 664,865 fragments. + +## Result + +Ch368 is closed on silicon: native-640x480 persistent-Z runtime-CLUT motion between two adjacent authentic SH3 +captures, with deterministic A/B/A/B board outputs, exact integration framebuffers, and exact replay-color evidence. diff --git a/docs/ch369_audit_log.md b/docs/ch369_audit_log.md new file mode 100644 index 0000000..7f359cf --- /dev/null +++ b/docs/ch369_audit_log.md @@ -0,0 +1,46 @@ +# Ch369 Audit Log - Runtime CLUT Mixed-Residency Expansion + +## Scope + +Extend the Ch368 runtime-CLUT motion content ladder with the native-640x480 28-draw mixed-residency SH3 frame: +four distinct texture/CLUT rebinds followed by the established eight-epoch shared-texture cluster. + +## Fixture Preflight + +- `zsrtm28` contains 28 authentic draws in 12 ordered epochs: four single-draw rebinds, then eight 204-triangle + shared-texture epochs. +- Native coordinates remain in bounds at x `35..569`, y `9..400`; every feeder list is within the 2048-word staging + capacity. +- Runtime palette staging is enabled for every epoch. The candidate is simulation-only until request pressure and + exact Z/color scoreboards pass at the Ch368 production depth. + +## Integration Gate + +- The full 12-epoch runtime-CLUT integration passes at request depth 4096: 465,250 accepted fragments, 214,897 + persistent-Z updates, 12 fresh drains, zero drops, Z `0/307200`, and color `0/110324`. +- Per-epoch request-FIFO high-water values are 1895, 1468, 110, 432, 797, 85, 650, 381, 184, 1669, 616, and 1125. + The measured maximum is 1895, so the Ch368 core requires no RTL, timing, or fit change for this candidate. + +## Silicon Closure + +- The board host gate passes all 12 epochs: four texture fills/rebinds, eight resident reuses, twelve runtime palette + copies, fresh ordered drains, and zero fragment drops. +- Board and integration framebuffers are byte-identical at SHA-256 + `fdff2f34eac22ee140b64d8fac129627549bbb0f6db37d4b91807a9058e47a04`. +- Replay-color is exact at `307200/307200`: 465,250 fragments, 214,897 Z-pass updates, 110,324 covered pixels, and + no stray uncovered writes. + +## Result + +Ch369 is closed on silicon: 28 authentic SH3 draws at native 640x480 with runtime CLUT updates, four real texture +rebinds, persistent Z, and exact board/simulation/replay agreement, all on the Ch368 core with no further fit. + +## Mixed-Residency Motion Extension + +- The same core ran `zsrtm28 -> zsrtb24 -> zsrtm28 -> zsrtb24`, resetting color/Z and staging the appropriate + textures and runtime palettes for every frame boundary. All 40 epoch drains were fresh and all drop gates stayed + zero. +- The four boundary dumps alternate exactly: mixed-residency dumps 0 and 2 equal + `fdff2f34eac22ee140b64d8fac129627549bbb0f6db37d4b91807a9058e47a04`; adjacent-frame dumps 1 and 3 equal + `3191d75983e72a158f91f15cc1f57b6ff7c5e40d5bbb4a49957db06db4e2fded`. Each matches its independently closed + integration framebuffer byte-for-byte. diff --git a/docs/ch370_audit_log.md b/docs/ch370_audit_log.md new file mode 100644 index 0000000..762f16e --- /dev/null +++ b/docs/ch370_audit_log.md @@ -0,0 +1,40 @@ +# Ch370 Audit Log - Runtime CLUT Frame C + +## Scope + +Convert the established 24-draw Frame C cluster to host-staged runtime CLUT updates, retaining its distinct relocated +CBP `504` and proving it on the fitted Ch368 depth-4096 core. + +## Fixture and Integration + +- `zsrtc24` contains eight ordered 204-triangle epochs from the authentic Frame C draw set. Epoch 0 fills texture CRC + `0xcf4cae27`; epochs 1 through 7 verify that CRC as resident texture reuses. Every epoch stages its palette through + the runtime HPS path. +- Native geometry stays within x `35..569`, y `9..400`; each feeder list is 1,843 words, below the 2,048-word + staging capacity. +- The depth-4096 traced integration gate passes: 346,425 accepted fragments, 167,247 persistent-Z updates, eight + fresh drains, zero drops, Z `0/307200`, and color `0/73330`. Per-epoch request FIFO high-water values are 948, + 131, 1041, 374, 377, 1855, 606, and 1156. The maximum 1855 stays well below the fitted 4096-entry depth. + +## Silicon Closure + +- The board host run completed all eight runtime palette copies, one texture fill, seven resident-CRC reuses, fresh + ordered drains, and zero fragment drops. +- Board and traced-integration framebuffers are byte-identical at SHA-256 + `6614d7211b9a668cfeda12e4fa2d6f469d3ee4d3a10bdf56c0119b35f93c7803`. +- Replay-color is exact at `307200/307200`: 346,425 fragments, 167,247 Z-pass updates, 73,330 covered pixels, and + no uncovered writes. + +## Result + +Ch370 closes Frame C on silicon with runtime CLUT staging and persistent Z. No RTL, constraint, or Quartus fit change +was required; the current Ch368 core carries this third runtime scene within its measured request-FIFO envelope. + +## Three-State Motion Extension + +- The same loaded core ran `zsrtm28 -> zsrtc24 -> zsrtb24 -> zsrtm28 -> zsrtc24 -> zsrtb24`, with color/Z reset and + the appropriate texture and runtime palette staged at every frame boundary. +- The six boundary dumps match the independently closed integration framebuffers exactly: M28 dumps 0 and 3 hash to + `fdff2f34eac22ee140b64d8fac129627549bbb0f6db37d4b91807a9058e47a04`; Frame C dumps 1 and 4 hash to + `6614d7211b9a668cfeda12e4fa2d6f469d3ee4d3a10bdf56c0119b35f93c7803`; Frame B dumps 2 and 5 hash to + `3191d75983e72a158f91f15cc1f57b6ff7c5e40d5bbb4a49957db06db4e2fded`. diff --git a/docs/ch371_audit_log.md b/docs/ch371_audit_log.md new file mode 100644 index 0000000..c146353 --- /dev/null +++ b/docs/ch371_audit_log.md @@ -0,0 +1,30 @@ +# Ch371 Audit Log - Earlier-Capture Runtime CLUT Probe + +## Scope + +Qualify the first on-screen PSMT8/perspective cluster from the earlier SH3 capture (`20260624224047`) through the +runtime CLUT, persistent-Z, and depth-4096 request path. + +## Fixture and Integration + +- `zsrte3` retains three authentic chronological draws as two ordered epochs: 68 triangles followed by 136 triangles. + It fills texture CRC `0x2d9a2fda` once, then proves a resident reuse. The relocated runtime CLUT base is CBP `508`. +- Geometry is in bounds at x `64..440`, y `44..471`; feeder lists are 619 and 1,231 words, both below the 2,048-word + staging limit. +- The traced integration gate passes at depth 4096: 279,804 accepted fragments, 251,464 Z-pass updates, two fresh + drains, zero drops, Z `0/307200`, and color `0/106017`. Request FIFO high-water is 454 then 2,055, below the fitted + 4096-entry capacity. + +## Silicon Closure + +- The board completed one runtime palette copy, one texture fill, one verified resident reuse, two fresh drains, and + zero fragment drops. +- Board and traced-integration framebuffers are byte-identical at SHA-256 + `1f060fc17bd0a41e02ae79303b1ffef88a05ff53b2cddde400de1ff2b796bbf4`. +- Replay-color is exact at `307200/307200`: 279,804 fragments, 251,464 Z-pass updates, 106,017 covered pixels, and + no uncovered writes. + +## Result + +Ch371 closes the first earlier-capture runtime-CLUT probe on silicon. The 2,055-entry peak retains substantial margin +inside the fitted 4,096-entry request FIFO, so the next rung is an in-cluster draw-count expansion rather than RTL. diff --git a/docs/ch372_audit_log.md b/docs/ch372_audit_log.md new file mode 100644 index 0000000..eb0af8f --- /dev/null +++ b/docs/ch372_audit_log.md @@ -0,0 +1,22 @@ +# Ch372 Audit Log - Earlier-Capture Six-Draw Expansion + +## Integration + +- `zsrte6` groups six chronological authentic draws from capture `20260624224047` into two 204-triangle epochs. + It performs one runtime palette/texture fill followed by one CRC-verified resident reuse at CBP `508`. +- Native geometry remains in bounds at x `63..443`, y `40..471`; both feeder lists are 1,843 words. +- Depth-4096 traced integration passes: 446,447 accepted fragments, 373,770 persistent-Z updates, two fresh drains, + zero drops, Z `0/307200`, and color `0/123384`. Request-FIFO high-water is 2,090 then 940. + +## Silicon Closure + +- The board completed the runtime palette copy, one texture fill, one verified resident reuse, two fresh drains, and + zero fragment drops. +- Board and integration framebuffers are byte-identical at SHA-256 + `1b82b94c232907acd037a47c22cbf6262eba6ba73ed25399cb0a4373ef388869`. +- Replay-color is exact at `307200/307200`: 446,447 fragments, 373,770 Z-pass updates, 123,384 covered pixels, and + no uncovered writes. + +## Result + +Ch372 closes the six-draw earlier-capture expansion on silicon with no RTL, constraint, or fit change. diff --git a/docs/ch373_audit_log.md b/docs/ch373_audit_log.md new file mode 100644 index 0000000..09fdfce --- /dev/null +++ b/docs/ch373_audit_log.md @@ -0,0 +1,29 @@ +# Ch373 Audit Log - Earlier-Capture Eight-Draw Expansion + +## Fixture + +- `zsrte8` groups eight chronological authentic draws from capture `20260624224047` into three + runtime-CLUT epochs: 204, 204, and 90 triangles. +- Epoch 0 performs the texture fill; epochs 1 and 2 perform CRC-verified resident reuse at CBP `508`. +- Native geometry is bounded by x `63..443`, y `40..471`. The feeder lists are 1,843, 1,843, and 817 words. + +## Integration Gate + +- Depth-4096 integration and independent trace runs both pass with 520,733 accepted fragments, + 429,471 persistent-Z updates, three fresh drains, and zero drops. +- The exact scoreboards report Z `0/307200` and color `0/128277` mismatches. +- Request-FIFO high-water is bounded at 2,090, 940, and 1,757 requests across the three epochs, + below the production depth of 4,096. + +## Silicon Closure + +- The DE25 completed one texture fill, two CRC-verified resident reuses, all 498 expected draw records, and + zero fragment drops. Its framebuffer reports 128,277 nonzero pixels in bounds `(65,41)..(443,470)`. +- Board and integration framebuffers are byte-identical at SHA-256 + `3a2395cc0d4829560016aeac852b029ba46248ee1dcae3d74d541a64688b2a32`. +- The complete 520,733-fragment trace independently replays to the board framebuffer exactly: + 429,471 Z-pass updates, 128,277 covered pixels, zero uncovered writes, and `307200/307200` exact colors. + +## Result + +Ch373 closes the earlier-capture eight-draw expansion on silicon with no RTL, constraint, or fit change. diff --git a/docs/ch374_audit_log.md b/docs/ch374_audit_log.md new file mode 100644 index 0000000..089c3fd --- /dev/null +++ b/docs/ch374_audit_log.md @@ -0,0 +1,34 @@ +# Ch374 Audit Log - Earlier-Capture Eleven-Draw Rebind Expansion + +## Fixture + +- `zsrte11` keeps Ch373's eight chronological draws as three runtime-CLUT epochs, then adds draws + `11698`, `11911`, and `11938` as a fourth 142-triangle epoch. +- The scene runs at native 640x480 and allocates two runtime palette banks: CBP `504` for epochs 0-2 + and CBP `508` for epoch 3. The residency pattern is `fill, reuse, reuse, fresh fill`. +- Feeder lists contain 1,843, 1,843, 817, and 1,285 words, each below the 4,096-word bridge capacity. + +## Integration Gate + +- Depth-4096 integration passes with 524,145 accepted fragments, 431,666 persistent-Z updates, four fresh drains, + and zero drops. +- Epoch request-FIFO high-water is 2,090, 940, 1,757, and 100. Exact scoreboards report Z `0/307200` and + color `0/129883` mismatches. + +## Board Host Gate + +- The DE25 completed the two texture fills, two resident CRC checks, four runtime palette copies, all 640 expected + records, and zero fragment drops. +- The board framebuffer has 129,883 nonzero words in bounds `(65,41)..(462,470)`. + +## Silicon Closure + +- Board and traced-integration framebuffers are byte-identical at SHA-256 + `b44f5e98d79ffa2f451238182f798432edb5c413ea80fea2da6c231a0b4be151`. +- The complete trace independently replays to the board framebuffer exactly: 524,145 fragments, + 431,666 Z-pass updates, 129,883 covered pixels, zero uncovered writes, and `307200/307200` exact colors. + +## Result + +Ch374 closes the first two-palette, eleven-draw earlier-capture expansion on silicon with no RTL, constraint, +or fit change. diff --git a/docs/ch375_audit_log.md b/docs/ch375_audit_log.md new file mode 100644 index 0000000..eddd7df --- /dev/null +++ b/docs/ch375_audit_log.md @@ -0,0 +1,13 @@ +# Ch375 Audit Log - Fourteen-Draw Post-Rebind Residency + +- `zsrte14` extends Ch374 with three later, on-screen draws using CBP `508`, producing a five-epoch + `fill, reuse, reuse, rebind, reuse` runtime-CLUT sequence at native 640x480. +- Integration passes with 529,836 accepted fragments, 434,596 Z-pass updates, five fresh drains, zero drops, + exact Z `0/307200`, and exact color `0/132063`. Request-FIFO high-water is 2,090, 940, 1,757, 100, and 81. +- On the DE25, both palette banks, both texture fills, all 816 expected records, and all drop gates pass. +- Board and traced integration framebuffers are byte-identical at SHA-256 + `3a4b8f12a08dd0a5e9872675a1dd7cf2d767b76c71def1c1f4398f8c89da104d`. +- Replay-color is exact at `307200/307200`: 529,836 fragments, 434,596 Z-pass updates, 132,063 covered pixels, + and zero uncovered writes. + +Ch375 closes the fourteen-draw post-rebind residency expansion on silicon without RTL, constraint, or fit changes. diff --git a/docs/ch376_audit_log.md b/docs/ch376_audit_log.md new file mode 100644 index 0000000..e7486fe --- /dev/null +++ b/docs/ch376_audit_log.md @@ -0,0 +1,14 @@ +# Ch376 Audit Log - Seventeen-Draw Second-Palette Residency + +- `zsrte17` extends Ch375 with three later, on-screen CBP `508` draws, producing a six-epoch + `fill, reuse, reuse, rebind, reuse, reuse` runtime-CLUT sequence at native 640x480. +- Local depth-4096 integration passes with 531,922 accepted fragments, 436,186 Z-pass updates, six fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/132810`. Request-FIFO high-water is 2,090, 940, 1,757, + 100, 81, and 84. +- On the DE25, both palette banks, both texture fills, all 934 expected records, and every drop gate pass. +- Board and traced integration framebuffers are byte-identical at SHA-256 + `9101f42e3e575653a7e62c9dd5760fef69427b04cb45187e7a1697a5a0e0e864`. +- Replay-color is exact at `307200/307200`: 531,922 fragments, 436,186 Z-pass updates, 132,810 covered pixels, + and zero uncovered writes. + +Ch376 closes the seventeen-draw second-palette residency expansion on silicon without RTL, constraint, or fit changes. diff --git a/docs/ch377_audit_log.md b/docs/ch377_audit_log.md new file mode 100644 index 0000000..e3e0f51 --- /dev/null +++ b/docs/ch377_audit_log.md @@ -0,0 +1,14 @@ +# Ch377 Audit Log - Eighteen-Draw Second-Palette Residency + +- `zsrte18` adds the final later, on-screen CBP `508` candidate to Ch376, producing a seven-epoch + `fill, reuse, reuse, rebind, reuse, reuse, reuse` runtime-CLUT sequence at native 640x480. +- Local depth-4096 integration passes with 532,162 accepted fragments, 436,333 Z-pass updates, seven fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/132936`. Request-FIFO high-water is 2,090, 940, 1,757, + 100, 81, 84, and 21. +- On the DE25, both palette banks, both texture fills, all 956 expected records, and every drop gate pass. +- Board and traced integration framebuffers are byte-identical at SHA-256 + `9b49a9b56cb99296d09b12c535145b64dd8ae80b32f06e2a9934801567fe95bb`. +- Replay-color is exact at `307200/307200`: 532,162 fragments, 436,333 Z-pass updates, 132,936 covered pixels, + and zero uncovered writes. + +Ch377 closes the eighteen-draw two-palette residency expansion on silicon without RTL, constraint, or fit changes. diff --git a/docs/ch378_audit_log.md b/docs/ch378_audit_log.md new file mode 100644 index 0000000..180f88e --- /dev/null +++ b/docs/ch378_audit_log.md @@ -0,0 +1,18 @@ +# Ch378 Audit Log - Nineteen-Draw Third-Binding Expansion + +- `zsrte19` extends the frame-pure Ch377 scene with draw `93634` (`TBP=3072`, authentic CBP `14080`), adding a + third texture and runtime-CLUT binding in an eighth epoch at native 640x480. +- The initial three-bank layout at relocated CBPs `504/508/512` was rejected before simulation because `512` is + beyond the 512-block BRAM. The fixture is instead deliberately relocated to `500/504/508`; no RTL, constraint, + or fit change is involved. +- Local depth-4096 integration passes with 543,715 accepted fragments, 444,244 Z-pass updates, eight fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/139585`. Request-FIFO high-water is 2,090, 940, 1,757, + 100, 81, 84, 21, and 733. +- On the DE25, all three palette banks, all three texture fills, all 1,024 expected records, and every drop gate pass. +- Board and traced integration framebuffers are byte-identical at SHA-256 + `941ee4579c220a82240f30aae86f74ae9c0873923c0749835e75f49a089d6186`. +- Replay-color is exact at `307200/307200`: 543,715 fragments, 444,244 Z-pass updates, 139,585 covered pixels, + and zero uncovered writes. + +Ch378 closes the three-palette, three-texture native-640x480 persistent-Z expansion on silicon without RTL, +constraint, or fit changes. diff --git a/docs/ch383_audit_log.md b/docs/ch383_audit_log.md new file mode 100644 index 0000000..873c82f --- /dev/null +++ b/docs/ch383_audit_log.md @@ -0,0 +1,14 @@ +# Ch383 Audit Log - Thirty-Four-Draw Third-Binding Extension + +- `zsrte34` extends the native-640x480 persistent-Z scene to 34 authenticated draws in 13 epochs, retaining the + three runtime texture/CLUT bindings at relocated CBPs `500/504/508`. +- Local depth-4096 integration passes with 647,303 accepted fragments, 500,072 Z-pass updates, 13 fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/166963`. +- The DE25 host run completed all 1,899 expected records with all palette and texture-fill checks passing and no + fragment drops. Its framebuffer bounds were `(46,3)..(634,473)` with 166,963 nonzero pixels. +- The board dump and the independently traced integration framebuffer are byte-identical at SHA-256 + `61169f615b327f235405cabb19fff38d3b336c359cd30c498357b6b16338bd19`. +- Replay-color is exact at `307200/307200`: 647,303 replay fragments, 500,072 Z-pass updates, 166,963 covered + pixels, and zero uncovered writes. + +Ch383 closes the 34-draw, 13-epoch extension on the timing-closed core. No RTL, SDC, QSF, or Quartus fit changed. diff --git a/docs/ch384_audit_log.md b/docs/ch384_audit_log.md new file mode 100644 index 0000000..3b0e291 --- /dev/null +++ b/docs/ch384_audit_log.md @@ -0,0 +1,14 @@ +# Ch384 Audit Log - Forty-Three-Draw Fourth-Palette Expansion + +- `zsrte43` expands the native-640x480 persistent-Z scene to 43 authenticated draws in 16 ordered epochs. +- A fourth runtime palette initially exceeded the old monotonic relocation window. Rebasing the fixture to + `496/500/504/508` kept all four palette banks inside the 512-block BRAM without an RTL, SDC, QSF, or fit change. +- Local depth-4096 integration passes with 715,304 accepted fragments, 561,898 Z-pass updates, 16 fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/168654`. +- The DE25 completed all 2,103 expected records, four texture fills, four runtime-palette checks, and every drop + gate. Board and traced integration framebuffers are byte-identical at SHA-256 + `fb4bce9ad6307960308d1d1c7624c5d18e560854eb1b82fa7f95e7dbc6e7356e`. +- Replay-color is exact at `307200/307200`: 715,304 fragments, 561,898 Z-pass updates, 168,654 covered pixels, + and zero uncovered writes. + +Ch384 closes the 43-draw, four-runtime-palette scene on the timing-closed core. diff --git a/docs/ch385_audit_log.md b/docs/ch385_audit_log.md new file mode 100644 index 0000000..ed41d41 --- /dev/null +++ b/docs/ch385_audit_log.md @@ -0,0 +1,17 @@ +# Ch385 Audit Log - Runtime-CLUT Reuse and Seventeen-Epoch Scaling + +- The old 16-epoch cap lived only in the HPS scheduler and common integration testbench. Both descriptor capacities + were raised to 32; the FPGA RTL, constraints, and RBF were not changed. +- Runtime CLUT staging is serialized before each GO and each GO completes its drain before the next epoch begins. + The fixture generator now reuses one legal four-block CLUT slot in runtime mode, while preloaded fixtures retain + distinct-bank allocation. This removes the artificial four-palette scene cap. +- `zsrte45` carries 45 authenticated draws in 17 epochs, all using runtime CBP 500. Local depth-4096 integration + passes with 725,545 accepted fragments, 570,196 Z-pass updates, 17 fresh drains, zero drops, exact Z `0/307200`, + and exact color `0/168654`. +- The DE25 completed all 1,972 expected records, texture fills, palette copies, residency checks, and drop gates. + Board and traced integration framebuffers are byte-identical at SHA-256 + `a374ba18b05994f3223cd6b79139effc184ea35b436a6fece4e7733c1c0a03b8`. +- Replay-color is exact at `307200/307200`: 725,545 fragments, 570,196 Z-pass updates, 168,654 covered pixels, + and zero uncovered writes. + +Ch385 closes reusable runtime-CLUT staging and host-side 32-epoch capacity on the timing-closed core. diff --git a/docs/ch386_audit_log.md b/docs/ch386_audit_log.md new file mode 100644 index 0000000..08159d6 --- /dev/null +++ b/docs/ch386_audit_log.md @@ -0,0 +1,15 @@ +# Ch386 Audit Log - Frame-3 Eighteen-Draw Native Scene + +- Frame 1's remaining in-bounds PSMT8 candidates were rejected by the existing supported-state gates, so Ch386 + starts a fresh, authentic frame-3 scene rather than weakening those gates. +- `zsrtf3e18` contains 18 draws from `TBP=12288/CBP=14208`, partitioned into five ordered staging-safe epochs + (70, 106, 58, 97, and 192 records) with one texture fill and four CRC-verified reuses. +- Local depth-4096 integration passes with 67,295 accepted fragments, 32,435 Z-pass updates, five fresh drains, + zero drops, exact Z `0/307200`, and exact color `0/20276`. +- The DE25 completed every record, runtime-palette copy, texture residency check, and zero-drop gate. Board and + traced integration framebuffers are byte-identical at SHA-256 + `8a905aa968f252fdc029832a5a66ee910c93053f791132c5ebf35ddbd4c08818`. +- Replay-color is exact at `307200/307200`: 67,295 fragments, 32,435 Z-pass updates, 20,276 covered pixels, and + zero uncovered writes. + +Ch386 closes the first fresh frame-3 native scene on the Ch368 timing-closed core. diff --git a/docs/ch397_lpddr_alpha_plan.md b/docs/ch397_lpddr_alpha_plan.md new file mode 100644 index 0000000..b260e87 --- /dev/null +++ b/docs/ch397_lpddr_alpha_plan.md @@ -0,0 +1,132 @@ +# Ch397 — 224139 LPDDR alpha integration plan + +## Established state + +- `zsrt139a2` is the current live 640x480 opaque board composite from the + matching 224139 capture: six epochs, 98,163 written pixels, zero board drops. +- The first in-bounds blended draw family is PSMT8 perspective triangles + (`idx31075+`, `TBP=13824`, `CBP=14282`, 128x128, `PRIM.ABE=1`). +- Its recorded `ALPHA_1` state is `0x0000008000000062`; this is a generic + selector/FIX blend, not the existing source-over-only shortcut. + +## Implemented cut (local RTL) + +The current SH3 renderer sends final opaque pixels directly to +`gs_lpddr_zc_emit`. Its full-frame colour lives only in LPDDR, while the +existing combined triangle alpha path reads destination colour from BRAM. +Therefore a full-frame alpha implementation must extend the LPDDR emitter: + +1. carry `ABE` plus ALPHA selector/FIX metadata with each fragment packet; +2. issue a single-pixel colour read after a Z-pass (or immediately for a + non-Z alpha fragment); +3. apply the existing `gs_alpha_blend` generic selector equation in the + emitter's AXI domain; +4. enqueue that blended colour through the existing colour writer, preserving + the ordered scene-marker drain contract. + +Implemented in the local RTL: + +- `gs_lpddr_zc_emit` now carries `{ABE,A,B,C,D,FIX}` through its request and + colour-align FIFOs; +- `gs_lpddr_color_blend` bypasses opaque pixels and, for ABE pixels, reads the + containing 256-bit LPDDR beat, selects the addressed 32-bit lane, invokes + generic `gs_alpha_blend`, and emits the ordered write payload; +- `gs_lpddr_rd_arb` has a fifth client for that destination read, below + scanout and Z/reload traffic; +- the real raster wrapper forwards the per-primitive alpha snapshot. + +`make -C sim tb_gs_lpddr_color_blend` passes the actual `0x62` selector +pattern: source `0x80402010` over destination `0x40203020` produces +`0x80001010` (`Cd - Cs`, clamped), proving the LPDDR read lane and blend +datapath together. + +The complete three-epoch integration replay is exact: 102,493 fragments, +102,479 Z passes, three ordered drains, zero drops/overflows/BRESP errors, +Z `0/307200` mismatches, and color `0/51525` mismatches. The final +640x480 simulation framebuffer is +`sh3_zsrt139a3_sim_fb.mem` (SHA-256 +`a331fd9d68aaccb35310051ad9091f6c02acafcc4b86391cecedaea8f08ce28f`). + +## Timing closure and deploy artifact (2026-07-15) + +The first alpha fit exposed the destination-read/blend arithmetic as an +unregistered 310 MHz cone. The final implementation uses a registered +shift/add blend engine (no new DSPs), a registered generic async-FIFO write +port, and registered request-head control. The last 42 ps setup family was +the staged scene-marker bit feeding the color-align RAM write enable; fragment +valid and marker valid are now separate registered controls, removing that +decode from color writes. + +The final Quartus 25.3.1 build is signoff-clean: setup `+0.012 ns`, hold +`0.000 ns`, zero setup TNS, and synthesis/fit/STA/assembler all completed with +zero errors. The split loader artifact is +`output_files/retroDE_ps2.core.rbf`, SHA-256 +`f921f0bcde7fc9a8fe01bf39166327101e6dcbf0faf68398082207c8498ca349`. +`build_quartus.sh` now explicitly runs `post_flow.tcl` after its direct +`quartus_asm` step, because direct assembler invocation does not dispatch the +QSF post-flow hook by itself. + +The RBF and all `zsrt139a3` host assets were copied to the DE25 and SHA-checked. +The first runtime load hit an SDM service-buffer timeout and left configfs in +an uninterruptible write. A controlled remote reboot restored network ping, +but SSH had not restarted at closeout time; a physical power cycle is the +remaining prerequisite before retrying the load and taking the board FB dump. + +## First silicon run and request-FIFO correction (2026-07-16) + +The authoritative Quartus 26.1 GUI RBF loaded successfully and all three +texture uploads, readback CRCs, runtime palettes, staging counts, Z preclear, +and zero-drop checks passed. The render itself did not drain: epoch 0 reached +36,958 framebuffer beats after 120 seconds and `frame_drained` remained low. +The resulting interrupted composite was 298,888/307,200 pixels equal to the +simulation framebuffer, with 8,312 mismatches caused by rebinding texture and +palette state while old fragments were still executing. + +Root cause was the Ch397 timing cut in generic `gs_async_fifo`: the allocation +pointer was published to the read clock when the write was accepted, one +writer cycle before the staged RAM write committed. The production request +FIFO crosses a 40 MHz writer into a roughly 310 MHz reader, so the consumer +could observe the pointer about 19 ns before the data existed and replay stale +RAM entries. The earlier FIFO regression used a faster writer than reader and +therefore did not exercise this CDC ordering failure. + +The FIFO now maintains separate allocation and commit pointers. Full +accounting uses allocation, while only the pointer advanced by an actual +staged RAM commit crosses into the reader. A production-ratio stress test +(40 MHz write, 312.5 MHz read) transfers 3,284/3,284 ordered words with zero +duplicates/drops. The full `zsrt139a3` integration replay remains exact: +102,493 fragments, all three drains, zero drops/errors, and Z/color scoreboards +at zero mismatches. This correction is ready for the owner-controlled +Quartus 26.1 GUI compile and subsequent silicon rerun. + +## Corrected FIFO silicon acceptance (2026-07-16) + +The owner-controlled Quartus 26.1 GUI compile completed successfully. The +final fit used 37,153/46,800 ALMs and 284/358 RAM blocks; setup slack was +`+0.064 ns`, hold slack was `0.000 ns`, and every reported TNS was zero. The +fresh split RBF is `output_files/retroDE_ps2.core.rbf`, 3,915,776 bytes, +SHA-256 `a1adf0a706465709e3078dedc053433e34807a40a57733c1cd2e14c9d64461fa`. +Its hash was checked again on the DE25 before `core_loader.sh` loaded it, and +`fpga0` reported `operating`. + +The corrected request FIFO is now proven on silicon. Epochs 0, 1, and 2 +completed with 54, 68, and 10 records respectively; all texture CRC, runtime +palette, staging, Z-preclear, and zero-drop gates passed. The 10-record alpha +epoch is short enough for `frame_drained` to clear and rise entirely between +HPS bridge polls, so the host now accepts that missed-low case only if both the +new per-GO record count and framebuffer-beat count prove forward progress. A +one-second low-observation window replaces the old 120-second delay; the +full board run now completes in about 23 seconds with `rc=0`. + +The final board framebuffer and simulation framebuffer are byte-for-byte +identical across all 307,200 PSMCT32 words (zero mismatches), both with +SHA-256 `a331fd9d68aaccb35310051ad9091f6c02acafcc4b86391cecedaea8f08ce28f`. + +## First acceptance scope + +The generated `zsrt139a3` fixture carries two opaque setup epochs followed by +authentic blended draw `32391` (10 triangles, safely within the 2048-word +staging limit). The six-draw family remains the next scale-up target; its +first four draws exceed that current staging window and must be split across +ordered epochs before board replay. Do not claim frame fidelity until the +subset is locally replayed and board-read back against its own trace. diff --git a/docs/ch400_chronological_base_alpha_closeout.md b/docs/ch400_chronological_base_alpha_closeout.md new file mode 100644 index 0000000..3c9d3ce --- /dev/null +++ b/docs/ch400_chronological_base_alpha_closeout.md @@ -0,0 +1,83 @@ +# Ch400 — chronological base geometry plus bounded alpha tail + +## Goal + +Move fidelity forward by replaying the missing in-bounds opaque draws before a +small authentic alpha-blended tail, rather than darkening the incomplete Ch399 +base with the full alpha family. + +## Fixture + +- Tag: `sh3_zsrt139a6` +- 35 authentic draws in chronological order +- 20 epochs: 17 base epochs followed by 3 alpha epochs +- Independent reference coverage: 83,596 framebuffer pixels +- Simulation target: `make -C sim tb_top_psmct32_sh3_zint640rt139a6` +- Board loader: `tools/scp_zsrt139a6_to_board.sh` + +## Blend ordering correction + +The first full replay found two wrong color pixels with exact Z. Repeated ABE +fragments could begin their destination read after the previous blended result +entered the color writer, but before that partial beat received an AXI BRESP. +Waiting on the writer's raw `idle` signal is not sufficient because the elastic +packer may retain a partial beat while its AXI FIFO is empty. + +`gs_lpddr_zc_emit` now treats each ABE result as an ordered dependency: + +1. accept one ABE input and hold subsequent color inputs; +2. enqueue its blended output and pulse the color writer flush; +3. wait for the ordered drain acknowledgement to transition low then high; +4. admit the next color input only after the preceding write is memory-visible. + +Opaque flow remains unrestricted outside an active ABE dependency. + +## Simulation acceptance + +Final full replay: + +- fragments fed: 279,134 +- fragments passing Z: 234,373 +- scene markers: 20 +- request drops: 0 +- color FIFO overflows: 0 +- AXI BRESP errors: 0 +- Z mismatches: 0 / 307,200 +- color mismatches: 0 / 83,596 +- framebuffer MEM SHA-256: + `38095a6c9136eb6618876c4cf2bf9a72c494a6f8161c247f2e1a36dcd0474bb8` + +## Hardware gate + +The RTL correction postdates the 2026-07-16 06:17 Quartus artifact. A fresh +owner-run Quartus 26.1 GUI compile is required before board deployment. After +that compile, accept Ch400 only if timing is clean, the RBF is fresh, the board +run completes all 20 epochs with zero drops/errors, and the board framebuffer is +byte-exact to `sh3_zsrt139a6_sim_fb.mem`. + +## Silicon acceptance (2026-07-16) + +The owner-run Quartus 26.1 GUI compile completed successfully after the final +RTL correction. The fit used 37,148/46,800 ALMs and 284/358 RAM blocks. Setup +slack was `+0.107 ns`, hold slack was `0.000 ns`, and all reported TNS values +were zero. + +The fresh deploy RBF was written at 08:34:52, is 3,919,872 bytes, and has +SHA-256 +`4619653217c8946b7ba4cd847a17f5e5b020c449ac4837784f72f9a7abed0b7d`. +The hash matched on the DE25 before loading, and `fpga0` reported `operating`. + +The board completed all 20 epochs with every texture CRC, palette checksum, +staged-word count, triangle-record count, preclear, drain, and zero-drop gate +passing. The host returned `rc=0` and dumped all 307,200 framebuffer words. + +Board and simulation are byte-exact across the complete framebuffer: + +- board MEM SHA-256: + `38095a6c9136eb6618876c4cf2bf9a72c494a6f8161c247f2e1a36dcd0474bb8` +- simulation MEM SHA-256: same +- board PNG SHA-256: + `1785875df7c4c17fbf94ce1543fa3777be5601c874f5319ce4e2a20c828cecd0` +- simulation PNG SHA-256: same + +Ch400 is accepted on silicon. diff --git a/docs/ch401_fuller_static_frame_closeout.md b/docs/ch401_fuller_static_frame_closeout.md new file mode 100644 index 0000000..fd70b5f --- /dev/null +++ b/docs/ch401_fuller_static_frame_closeout.md @@ -0,0 +1,32 @@ +# Ch401 — fuller 56-draw static frame + +Ch401 retains the accepted Ch400 chronological base, one correctly paired ABE +draw, two later-scene anchors, and the proven 24-draw central cluster. The +result is 56 authentic draws in 28 bounded epochs, within the existing 32-epoch +host/testbench limit. + +## Simulation + +- 638,022 fragments fed +- 321,817 fragments passed Z +- 28 ordered drains +- zero request drops, color FIFO overflows, or AXI BRESP errors +- Z mismatches: 0 / 307,200 +- color mismatches: 0 / 128,998 + +## Silicon + +No RTL changed after the accepted Ch400 RBF. The 28-epoch board run passed all +texture CRC, runtime palette, staging, record-count, drain, and zero-drop gates +and returned `rc=0`. + +- nonzero pixels: 128,998 +- bounds: `(36,10)..(599,399)` +- board/simulation MEM SHA-256: + `0383cc739aa8e9b921489a3fc1ffca7ab2a48763cb57028d4a90e3ae9a34142f` +- board/simulation PNG SHA-256: + `a4806d0ba39fcea1b904375f715d11f7a81d1364c78f201f40c1bb5906ac008b` + +Board and simulation are byte-exact over all 307,200 framebuffer words. +Ch401 is accepted on silicon and remains displayed through the LPDDR HDMI +scanout. diff --git a/docs/ch402_character_clamp_closeout.md b/docs/ch402_character_clamp_closeout.md new file mode 100644 index 0000000..f5bcc24 --- /dev/null +++ b/docs/ch402_character_clamp_closeout.md @@ -0,0 +1,74 @@ +# Ch402 — character draws through runtime CLAMP state + +Ch402 extends the accepted Ch401 56-draw scene with twelve authentic draws from +the character family, each in its own epoch. These draws use GS region clamp +mode 2 with exact full-texture bounds (`MINU/MINV=0`, `MAXU/MAXV=511`). For a +512x512 texture that state is mathematically identical to ordinary clamp, so the +fixture generator proves those bounds and normalizes only the mode bits. Any +other region-clamp bounds continue to fail closed. + +The feeder format is backward-compatible. Legacy lists retain the seven-word +header. Extended lists advertise word 8 with count-word bit 34 and emit +`CLAMP_1` between `TEX0_1` and `PRIM`. A focused feeder regression proves both +formats and the new vertex base. + +An initial four-epoch grouping required 2,294 to 3,410 staging words and doubled +the allocated RAM. Although functionally exact in simulation, that placement +pressure moved the previously marginal color-address FIFO family to -0.233 ns. +Ch402 therefore uses twelve single-draw character epochs, retains the accepted +2,048-word staging allocation, and raises only the software epoch-table ceiling +from 32 to 64. + +## Simulation + +- 68 authentic draws in 40 ordered epochs +- 649,189 fragments fed +- 332,984 fragments passed Z +- 40 fresh ordered drains +- zero request drops, color FIFO overflows, or AXI BRESP errors +- Z mismatches: 0 / 307,200 +- color mismatches: 0 / 131,618 +- reference coverage: 131,830 pixels +- largest staging list: 1,844 / 2,048 words +- maximum measured request FIFO high-water: 1,753 / 4,096 +- simulated framebuffer MEM SHA-256: + `d3a211671a444991e8032c97d3ba16c66621de1e9d3ad1432442bdb8be585010` +- simulated framebuffer PNG SHA-256: + `ae1b8fbdf1748723eede478d4ca349245920c32836df94cdf076cc6b983047b6` + +The simulated image now includes the central character silhouette and reaches +the bottom of the 640x480 frame. It remains visibly short of the PCSX2 image in +lighting, fog/compositing, and precision; Ch402 closes the missing-character +state/capacity blocker, not the remaining fidelity debt. + +## Timing gate + +The first owner GUI fit used a 4,096-word staging allocation. It fit at 291 RAM +blocks but failed setup at -0.233 ns / -1.287 ns TNS on the known +`u_zc_emit|ca_tail/ca_head -> ca_mem` family; hold remained clean. The failure +was a placement regression rather than a new logical path through the feeder. +The 40-epoch repartition removes the seven added RAM blocks and restores the +accepted 2,048-word allocation. The follow-up owner GUI fit recovered timing at ++0.041 ns setup / 0.000 TNS; hold remained clean. It used 37,279 / 46,800 ALMs +and restored RAM usage to 284 / 358 blocks. + +## Silicon + +The timing-clean RBF (SHA-256 +`a7691ff9203bc1a9097da88f0a341f6c14ed96910bb2d6f3fb46349e02b0fcce`) +was hash-verified on the board and loaded through `core_loader.sh`; `fpga0` +reported `operating`. + +All 40 epochs passed texture/CLUT CRC, staging count, record count, ordered +drain, and zero-drop gates with `rc=0`. + +- nonzero pixels: 131,618 +- bounds: `(36,10)..(599,463)` +- board/simulation MEM SHA-256: + `d3a211671a444991e8032c97d3ba16c66621de1e9d3ad1432442bdb8be585010` +- board/simulation PNG SHA-256: + `ae1b8fbdf1748723eede478d4ca349245920c32836df94cdf076cc6b983047b6` + +Board and simulation are byte-exact over all 307,200 framebuffer words. +Ch402 is accepted on silicon and remains displayed through the LPDDR HDMI +scanout. diff --git a/docs/ch403_authentic_vertex_modulation_closeout.md b/docs/ch403_authentic_vertex_modulation_closeout.md new file mode 100644 index 0000000..85ee4bf --- /dev/null +++ b/docs/ch403_authentic_vertex_modulation_closeout.md @@ -0,0 +1,91 @@ +# Ch403 — authentic vertex-color modulation + +## Objective + +Make the 224139 static-frame fixture use the captured GS lighting state instead +of drawing every texture at raw DECAL brightness. Geometry, draw order, +runtime CLUT handling, persistent Z, and the Ch402 40-epoch staging partition +remain unchanged. + +## Finding + +The selected draws carry `TEX0.TFX=MODULATE` and non-unity per-vertex RGB. +Ch402 deliberately forced `TFX=DECAL` and emitted zero placeholder RGB, which +made the composite much brighter than the PCSX2 frame. + +The first Ch403 fixture proved a second, narrower gap: the existing MODULATE +implementation was only connected to the combined affine texture path. These +SH3 triangles use the five-cycle perspective path, whose emit was explicitly +hardwired to the raw texel. Consequently the live board completed every gate +but produced a framebuffer byte-identical to Ch402. + +## Implementation + +- `tools/gs_make_sh3_scheduler_fixture.py` + - adds opt-in `--auth-color-tfx`; + - preserves authentic `TEX0.TFX` and per-vertex RGB; + - interpolates RGB when clipping triangles; + - applies the same GS `texel * vertex / 128` saturation rule in the + independent reference. +- `rtl/gif_gs/gs_stub.sv` + - aligns the already-computed S2 Gouraud color with the perspective texel by + four registers; + - applies MODULATE at the perspective S1+5 emit; + - shares the existing three-channel modulation datapath between affine and + perspective paths, avoiding a duplicate multiplier set; + - leaves DECAL output byte-identical. +- `sim/tb/top/tb_top_psmct32_sh3_zint640_shared.sv` + - verifies the full 64-bit staged header and committed TEX0 state; + - fixes late-epoch diagnostic fill accounting. + +## Fixture + +`zsrt139a9` retains all 68 Ch402 draws in 40 staging-safe epochs. The largest +list is 1844 of 2048 words (204 words headroom). + +The independent modulated reference is: + +`captures/gs/silenthill3/extracted/recon/sh3_zsrt139a9_ref.png` + +Against the PCSX2 224139 image resized to the same 640x480 comparison grid, +the fixture-only reference improves RGB MAE from 31.34 to 23.31 and RMSE from +45.94 to 33.61. This does not claim full fidelity: missing draws/fog and the +perspective/XY precision deficit remain visible. + +## Verification + +- Generator preflight: 40 epochs, max 1844 words, no staging overflow. +- Focused epoch 39 MODULATE proof: + - old DECAL hash: `37401414dd6ee3b2888d4ddb4aff98903900475e6cf2a47d973959ee05d05fb8` + - MODULATE hash: `c85edea3d42e983a31f630b7fffc1457c26233492c332860b7913c20ad7613c0` + - average nonblack RGB sum: 258.49 -> 113.23; geometry remains present. +- Focused Ch402 DECAL regression remains byte-identical at the old hash. +- Full 40-epoch RTL: + - 649,189 fragments fed; 332,984 passed persistent Z; + - 40 markers, 40 rises / 39 falls, zero drops/overflows/BRESP errors; + - Z mismatch `0/307200`; color mismatch `0/131618`; + - framebuffer SHA-256 + `d286e9d5839fc7ab63ae6bc1aa3c26fa867397171ad3d1a5e5edc3b6c5b14964`; + - PASS. +- The final shared-multiplier implementation reproduces the focused MODULATE + hash exactly and its late-epoch diagnostic passes with zero errors. +- Owner Quartus 26.1 GUI fit: + - setup worst slack `+0.080 ns`, TNS `0`; + - hold passes, worst reported slack `0.000 ns`, TNS `0`; + - 37,353 / 46,800 ALMs, 53,238 registers, 284 / 358 RAM blocks, + 4,177,064 memory bits, and 153 / 376 DSP blocks; + - core RBF SHA-256 + `28659ebfccb19f03478fcd105904cc1b03195e8cc0907fad3903f56d7821975b`. +- Live-board acceptance: + - all 40 epochs completed with every texture CRC, palette checksum, staged + word/record count, fresh-drain, fragment-drop, and bus-response gate clean; + - host runner returned `0`; + - the 307,200-word board framebuffer compares byte-for-byte with RTL; + - board and RTL framebuffer SHA-256 + `d286e9d5839fc7ab63ae6bc1aa3c26fa867397171ad3d1a5e5edc3b6c5b14964`. + +## Status + +Complete and accepted on silicon. The current HDMI image is the authentic +vertex-color-modulated 40-epoch composite; the next fidelity work is geometry +precision and remaining GS effects/draw coverage, not Ch403 correctness. diff --git a/docs/ch404_chronological_character_detail_closeout.md b/docs/ch404_chronological_character_detail_closeout.md new file mode 100644 index 0000000..a73b8cf --- /dev/null +++ b/docs/ch404_chronological_character_detail_closeout.md @@ -0,0 +1,39 @@ +# Ch404 — chronological character-detail tail + +Ch404 appends the next 36 authentic opaque draws after the accepted Ch403 +frame. Thirty-five staging-safe epochs preserve dump order and cover the +character/lower-body region without changing RTL or requiring another fit. + +## Fixture and infrastructure + +- `zsrt139b1`: generated 35-epoch detail tail. +- `zsrt139b2`: merged Ch403 base plus the tail, 75 epochs total. +- `tools/merge_runtime_sched.py`: concatenates accepted runtime-CLUT fixtures + without regenerating or changing their staged records. +- Host and shared-testbench epoch ceilings increase from 64 to 128; staging RAM + remains 2,048 words and the FPGA image is unchanged. + +## RTL verification + +- 667,279 fragments fed; 351,074 passed persistent Z. +- 75 ordered markers and drains. +- Zero request drops, color FIFO overflows, or AXI response errors. +- Z mismatch `0/307200`; color mismatch `0/132783` written pixels. +- RTL framebuffer SHA-256: + `8715381278c2b0a6e527329fb02aaaaf53edbaefd637f115723a3425bbd1b209`. + +The tail adds 1,003 nonblack pixels over Ch403. Against the resized PCSX2 +frame, RGB MAE improves from 23.8474 to 23.7846 and RMSE from 34.8791 to +34.6956. This is a bounded character-detail gain, not the missing environment +or fog solution. + +## Silicon acceptance + +The timing-clean Ch403 RBF was retained. The board completed all 75 epochs +with every texture CRC, runtime palette checksum, staging count, record count, +fresh drain, zero-drop, and bus-error gate clean; the host returned `0`. + +The 307,200-word board framebuffer is byte-for-byte identical to RTL and has +the same SHA-256 +`8715381278c2b0a6e527329fb02aaaaf53edbaefd637f115723a3425bbd1b209`. +The 75-epoch composite is live on HDMI. diff --git a/docs/ch405_authentic_alpha_fans_prefit.md b/docs/ch405_authentic_alpha_fans_prefit.md new file mode 100644 index 0000000..958f941 --- /dev/null +++ b/docs/ch405_authentic_alpha_fans_prefit.md @@ -0,0 +1,52 @@ +# Ch405 — authentic alpha-fan overlays (pre-fit gate) + +## Objective + +Add the 53 chronological PSMT8 alpha-fan draws at capture indices 196494 +through 198058 after the accepted 75-epoch Ch404 opaque composite. These are +large translucent overlays using authentic `ZTE=1`, `GEQUAL`, `ZMSK=1`, and +`PSMZ16S`: they test the accumulated depth buffer, blend on pass, and must not +modify Z. + +## RTL change + +- Carry architectural `TEST.ZTE` and `ZBUF.ZMSK` alongside each perspective + fragment through `gs_stub` and `top_psmct32_raster_demo_bram` into the + existing external LPDDR Z/color ROP. +- Replace the de25 wrapper's former `ZTE=1/ZMSK=0` constants with those + sidebands. +- Increase the production async request FIFO from 4,096 to 16,384 entries. + The alpha writer preserves exact destination order and can be slower than + the unthrottled raster producer, so the fixture bounds each epoch to one + triangle. Measured worst-triangle occupancy is 12,953 entries, leaving + 3,431 entries of observed headroom. + +## Fixture + +- `zsrt139c3`: 212 one-triangle alpha epochs, preserving all 212 triangles + expanded from the 53 authentic fan draws. +- `zsrt139c4`: Ch403 base + Ch404 detail tail + Ch405 alpha tail, 287 epochs. +- Authentic TEST/ZBUF header words are restored in the accepted base fixtures; + their geometry, colors, textures, palettes, and record counts are unchanged. +- Host/testbench epoch ceilings rise from 128 to 512. + +## Pre-fit evidence + +- The unbounded three-epoch diagnostic correctly failed closed at epoch 75: + 169,213 request drops and FIFO high-water 4,096/4,096. It is retained only + as the measurement that justified bounded bursts. +- Worst-tail three-epoch test (empty Z): 43,680 fed/passed, zero drops, + high-water 12,953/16,384, exact color and Z, PASS. +- Checkerboard-Z test: 43,680 fed, 21,839 passed, zero drops, high-water + 11,389/16,384, exact color, exact unchanged Z at all 307,200 pixels, PASS. +- Full Ch404 baseline replay with authentic headers reached its exact accepted + epoch-74 counts (667,279 fed / 351,074 passed) with zero drops before the + intentionally unbounded diagnostic alpha epoch. +- Host runner compiles cleanly; generated production assets total about 174 MiB. + +## Status + +Ready for owner Quartus 26.1 GUI compile. Do not deploy the prior +`28659ebf...` RBF as Ch405; the new RBF must contain the 16K request FIFO and +TEST/ZMSK sidebands. After a timing/resource-clean fit, deploy and run +`zsrt139c4`, then compare the board framebuffer byte-for-byte with RTL. diff --git a/docs/ch406_request_fifo_timing_prefit.md b/docs/ch406_request_fifo_timing_prefit.md new file mode 100644 index 0000000..129f1bb --- /dev/null +++ b/docs/ch406_request_fifo_timing_prefit.md @@ -0,0 +1,55 @@ +# Ch406 — deep request-FIFO timing repair (pre-fit gate) + +## Trigger + +The owner Quartus 26.1 GUI compile for Ch405 fit in the device but failed the +310 MHz EMIF clock by 0.267 ns, with design-wide TNS of -4.802 ns. All 77 +failing endpoints belong to `u_zc_emit|u_req`. The leading path is the +registered empty flag through the 15-bit binary-pointer increment, Gray +conversion, equality reduction, and back into the empty flag. Secondary +violations are the same empty/pointer cone feeding the 16K FIFO RAM address, +plus the asynchronous RAM bank mux feeding request-head decode. + +This is a local consequence of increasing the Ch405 request FIFO from 4K to +16K. Hold timing, Gray-pointer skew constraints, and all other clock domains +pass. + +## Structural repair + +- Treat `gs_async_fifo.rd` according to its existing interface contract: it is + an accepted read, already qualified by `!rempty` in each wrapper. Remove the + redundant internal `!rempty` gate from the read-pointer increment. This + removes the empty-to-pointer feedback and the empty-to-RAM-address fanout. +- Add an optional synchronous/registered read port to `gs_async_fifo`. +- Enable that port only for the 16K x 92-bit Z/color request FIFO. Keep the + smaller existing users on their original FWFT interface. +- Add a one-cycle pending bit in `gs_lpddr_zc_emit` so its request-head stage + captures the registered FIFO word on the following cycle and cannot issue a + second pop while a word is in flight. +- Make the standalone FIFO testbench explicitly qualify its randomized read + requests, matching the documented production interface. + +No clock, SDC, FIFO depth, fixture, draw, texture, blend, or Z behavior changes. + +## Pre-fit proof + +- Async FIFO scoreboard: 3,284 writes / 3,284 reads, zero order, duplicate, or + drop errors, final empty asserted, PASS. +- Ch405 worst three epochs, empty Z: 43,680 fed and passed, zero drops, + high-water 12,953/16,384, exact color, exact Z, PASS. +- Ch405 worst three epochs, checkerboard Z: 43,680 fed, 21,839 passed, zero + drops, high-water 11,389/16,384, exact color, exact unchanged Z at all + 307,200 pixels, PASS. +- A sequential production sweep additionally replayed epochs 0 through 19: + 291,597 fragments, zero drops, and every scene drain completed. It was + stopped after this redundant prefix because the complete 287-epoch run would + consume more than an hour; the maximum-pressure tail and both Z outcomes had + already passed exact comparisons above. +- Production RTL elaborates with the 16K request FIFO and registered-read path. + +## Owner fit gate + +Run the next compile only in the owner-controlled Quartus 26.1 GUI. The fit +must confirm that the request RAM remains inferred in device memory, resources +still fit, setup and hold both pass, and the previous `rempty` feedback family +is absent. Do not deploy an RBF unless those checks pass. diff --git a/docs/ch415_fog_bilinear_prefit.md b/docs/ch415_fog_bilinear_prefit.md new file mode 100644 index 0000000..25fb7eb --- /dev/null +++ b/docs/ch415_fog_bilinear_prefit.md @@ -0,0 +1,111 @@ +# Ch415 — authentic fog fold and indexed perspective bilinear filtering + +## Objective + +Move the 224139 board image toward the PCSX2 reference through real captured +GS state rather than further draw-count expansion. Every selected draw has +`PRIM.FGE=1`, every vertex arrives through `XYZF2`, `FOGCOL=0`, and every +selected texture requests linear magnification. + +## Changes + +- Preserve the captured vertex fog factor and fold the zero fog color into + fixture vertex RGB as `RGB * F >> 8`. This is exact at vertices and uses + the existing Gouraud interpolator across each triangle. +- Preserve four fractional texel bits from the perspective reciprocal path. +- Serialize indexed perspective pixels through the existing four-tap texture + sampler, performing CLUT lookup before interpolation as required. +- Hold the raster walker while the single-port texture cache fetches four + taps, then release exactly once after emitting the completed pixel. +- Add bounded `START_EPOCH`/`END_EPOCH` integration runs and explicit cold + shared-asset selection so late reuse epochs can be tested independently. + +## Reference evidence + +Against the 640x480 PCSX2 frame, the full software reconstruction improved +from MAE 22.55 / RMSE 34.96 with nearest sampling to MAE 21.17 / RMSE 32.47 +with bilinear sampling. The fog fold alone was smaller (MAE 22.51 / RMSE +34.88), so both are retained but filtering is the principal visual change. + +## RTL evidence + +- Texture sampler: PSMT8/PSMT4 CLUT-before-interpolation, clamp, repeat, + nearest fallback, and edge cases all pass. +- Perspective feeder and palette-bilinear tile integration pass. +- Legacy raster pipeline remains passing. +- Real fixture epoch 1: 3,949 accepted/passing fragments, zero drops, exact Z + and color-memory comparisons. +- Dense shared-texture epoch 75: 7,304 accepted/passing fragments, zero drops, + exact Z and color-memory comparisons. + +## First-fit hardware correction + +The first signoff-clean Ch415 fit (`91087214...`) passed all 124 board epochs, +but its capture exposed regular missing-pixel stripes: only 84,294 pixels had +nonzero RGB, versus 146,399 in the preceding board frame. The DONE cycle had +been reopened inside the normal pipeline-advance block, so both DONE and +PB_RELEASE advanced the held walker and skipped alternate samples. + +The corrected RTL emits DONE outside the advance gate, keeps the walker frozen +that cycle, and advances exactly once on PB_RELEASE. Focused RTL coverage rose +from 2,889 to 3,949 fragments on epoch 1 and from 4,994 to 7,304 on dense epoch +75, with exact color/Z comparisons and all sampler, tile, feeder, and legacy +raster regressions passing. + +## Second-fit timing repair + +The walker-release fit succeeded but STA was unclean in two isolated families: + +- Setup `-0.128 ns`, two endpoints: the registered request-pop pulse entered + the 15-bit read-pointer carry chain before Gray conversion and `rempty`. +- Hold `-4.817 ns`, two endpoints: the asynchronous CLUT-commit and tile-write + toggles were timed directly into their explicit first synchronizer stages. + +The FIFO now precomputes hold/pop pointer and empty results independently, so +the pop pulse selects only the final mux rather than driving the carry chain. +The SDC now cuts only the two asynchronous source-to-stage-0 synchronizer paths, +with fatal one-register target-count checks; stages 1 and 2 remain timed. Both +synchronizers are explicitly identified to Quartus. The FIFO scoreboard, +CLUT CDC, tile CDC, and dense 7,304-fragment integration test all pass exactly. + +## Third-fit setup repair + +The next owner fit (`ae9729fb...`) proved the CDC/FIFO repair: hold closed at +0.000 ns. Setup remained unclean at `-0.220 ns` / `-1.193 ns` TNS across eight +310 MHz endpoints. The failing paths were now three concrete datapath cones: + +- EMIF 256-bit read data through the 8:1 lane mux into `u_lpddr_rd|rd_data`; +- EMIF read data and address-selected blend operands into `diff_r_q`/`diff_g_q`; +- `u_zc_emit|ca_tail` through the color-alignment RAM write-address cone. + +The read probe now captures the complete EMIF beat in `rdata_q`, then selects +the requested 32-bit lane in a new `S_SEL` stage. The color blender similarly +separates beat capture, lane selection, and operand/difference preparation into +`R`, `SEL`, and `PREP` states. The color-alignment RAM write enable, address, +and data are also registered before the memory write. This removes all three +reported source-to-endpoint combinational cones without adding timing +exceptions. + +Directed read-probe, color-blend, and Z/color-emitter tests pass. Dense real +scene epoch 75 still accepts and passes 7,304 fragments with zero drops and +exact comparisons: 0/307,200 Z mismatches and 0/7,304 color mismatches. + +## Hardware acceptance and fidelity finding + +The owner-controlled GUI fit closed cleanly: setup slack `+0.052 ns`, hold +slack `0.000 ns`, zero setup/hold TNS, and clean recovery, removal, and minimum +pulse checks. The deployed RBF SHA-256 is +`6fd81615af95cf51e1a893e04ca34fa1bad7a69c933efcb7fca5c9c091e18a65`. + +All 124 board epochs passed with every texture CRC, palette, staging-record, +drain, and drop gate clean. The captured framebuffer reported 114,231 +nonzero words and bounds `(1,11)..(512,478)`; its MEM SHA-256 is +`e31820cfad1d550bb1ea9adf217e21cb59a02be76c6318ce0b34022307bc91ec`. + +The hardware result did not realize the software-reference gain. Against the +bilinearly resized PCSX2 frame, the preceding board capture measured MAE +21.9782 / RMSE 32.5912, while Ch415 measured MAE 23.6438 / RMSE 35.0255. +Ch415 board versus its own software reconstruction measured MAE 12.2877 / +RMSE 26.4442. This isolates geometry/coverage precision, rather than +scheduler capacity, as the next fidelity boundary. Ch416 therefore preserves +the captured XYZ 12.4 fractions and moves coverage to GS pixel centers. diff --git a/docs/ch416_subpixel_xy_prefit.md b/docs/ch416_subpixel_xy_prefit.md new file mode 100644 index 0000000..a7ee6ef --- /dev/null +++ b/docs/ch416_subpixel_xy_prefit.md @@ -0,0 +1,113 @@ +# Ch416 — native XYZ 12.4 coverage + +## Objective + +Carry the captured GS fractional screen coordinates through the fixture, +primitive FIFO, and raster coverage test. This is a fidelity chapter: draw +population, texture state, fog fold, bilinear filtering, Z behavior, and +chronological ordering remain the Ch415 baseline. + +## RTL cut + +- `gs_stub` has an opt-in `SUBPIXEL_XY` path that retains each vertex's four + X/Y fractional bits alongside the existing small primitive FIFO. +- Edge equations use 12.4 endpoints and sample the pixel center at `+8` in + that domain. The operands are bounded to signed 17-bit coordinates and + signed 35-bit edge results. +- The production `GS_SH3_LPDDR_FB` profile enables the path. Legacy profiles + retain integer corner-sampled coverage. +- Attribute gradients remain on the proven integer coordinate basis for this + first structural cut. Moving gradient setup to 12.4 is explicitly deferred + and is not hidden inside this coverage change. + +## Fixture and generator controls + +`--subpixel-xy` emits native XYZ2 low-half 12.4 coordinates. Capacity +scheduling measures the same 12.4 pixel-center coverage so narrow visible +triangles cannot be discarded after integer collapse. Runtime-CLUT fixtures +retain the proven single staging CBP and adjacent identical assets without the +obsolete preloaded-palette uniqueness gate. + +The full `zsrt139f17` fixture uses `--legacy-strip-kicks` to preserve the exact +Ch415 strip population. This makes the experiment one-variable: changing the +newer strip-population interpretation at the same time would remove broad +scene layers and invalidate the A/B comparison. + +## Evidence so far + +- Legacy raster regression: 16/16 pixels PASS. +- Directed subpixel raster regression: 3/3 pixel-center samples PASS. +- Authentic three-draw integration: 5,909 fragments fed, 5,907 Z-passing, + zero drops, 0/307,200 Z mismatches, and 0/5,858 color mismatches. +- Full software reconstruction versus PCSX2 improves from Ch415 MAE 21.0852 / + RMSE 32.3385 to Ch416 MAE 19.8099 / RMSE 28.8334. Lit RGB pixels rise from + 174,167 to 212,915. +- Full 263-epoch RTL integration PASS: 1,139,213 fragments fed, 969,301 + Z-passing, zero drops, 263 markers and ordered drains, no color FIFO or AXI + response errors, 0/307,200 final Z mismatches, and 0/235,942 final color + mismatches. +- The Ch416 RTL framebuffer improves against PCSX2 to MAE 20.4941 / RMSE + 30.0163 with 199,104 lit RGB pixels. This is a large improvement over the + Ch415 board result at MAE 23.6438 / RMSE 35.0255 and 110,329 lit RGB pixels. +- RTL versus the Ch416 software reconstruction measures MAE 10.1578 / RMSE + 19.1650. Native coverage closes a substantial part of the hardware/software + gap, but fractional attribute-gradient setup remains visible fidelity debt. + +Artifact SHA-256 identities: + +- full epoch descriptor: `ba1484d23cc9a0caba9d4f82af7ed157fbe692c54a9138d5c0aa02f5ca9f3d87`; +- RTL framebuffer MEM: `6aa98a68ee59b5df8457b651baf12decbbb7b71c70c4029ff2cb144a3defa1de`; +- RTL framebuffer PNG: `709d6a1438355531b38723654f27b0b07e49524af10d33388fdbb744739cf7b3`; +- software reference PNG: `63944f31b8c5f55b70bbddbb89db4ac0ed782a4daf8bd6dad8bb8ad8ec9ad006`. + +## First owner fit and timing repair + +The first owner-controlled Quartus 26.1 GUI fit completed, but is not eligible +for deployment. EMIF user-clock setup was -0.433 ns WNS / -6.069 ns TNS; +hold was 0.000 ns with zero TNS, and recovery, removal, and minimum-pulse checks +were clean. The top-ten setup failures were one physical family from the EMIF +`lock_sync_inst|dreg[1]` reset source into duplicated +`u_zc_emit|u_req|...|address_reg_b[2]` registers. This was reset routing into +the request FIFO's synchronous-read RAM implementation, not the new subpixel +coverage datapath. + +`gs_async_fifo` no longer resets `rdata_q` in `REGISTERED_READ` mode. That +value is invalid until an accepted read and every consumer already qualifies it +with the read transaction, so the reset value had no functional meaning. The +cut removes the 5,331-fanout EMIF lock/reset route from the duplicated RAM +registers without adding a timing exception or changing FIFO latency. + +Post-repair evidence: + +- generic asynchronous FIFO scoreboard PASS: 3,284 writes and reads, zero + duplicate/drop/order errors; +- Z/color emitter PASS: 1,500 fragments across three epochs plus directed + `ZTST=ALWAYS`, exact final Z/color, `col_ovf=0`, `bresp_err=0`; +- three-epoch native-subpixel integration PASS: 5,909 fed, 5,907 passed, zero + drops, exact 0/307,200 Z and 0/5,858 color mismatches. + +## Owner fit gate + +The repaired owner-controlled Quartus 26.1 GUI fit closed cleanly: EMIF setup +is +0.047 ns WNS / 0.000 ns TNS, hold is 0.000 ns WNS / 0.000 ns TNS, and +recovery, removal, and minimum-pulse checks are clean. The fit uses 37,959 / +46,800 ALMs (81%), 5,261,744 / 7,331,840 memory bits (72%), 336 / 358 RAM +blocks (94%), and 157 / 376 DSP blocks (42%). The deployed RBF SHA-256 is +`965e15eabdba5260a8d3c795b39a39bebc707d31fee70e3af857ec7e03f94f82`. + +## Board acceptance + +The full 263-epoch board run passed every texture CRC, runtime-palette sum, +staging-record count, ordered drain, and fragment-drop gate. The scheduler +finished `rc=0`; the FPGA manager remained `operating`. The captured board +framebuffer has 235,346 nonzero words, bounds `(0,0)..(511,479)`, sum32 +`0x19291e79`, and xor32 `0x05d6395b`. + +Most importantly, the board framebuffer is bit-for-bit identical to the full +RTL simulation. Both MEM files have SHA-256 +`6aa98a68ee59b5df8457b651baf12decbbb7b71c70c4029ff2cb144a3defa1de`, +and both PNG files have SHA-256 +`709d6a1438355531b38723654f27b0b07e49524af10d33388fdbb744739cf7b3`. +Board versus the bilinearly resized PCSX2 frame measures MAE 20.4941 / RMSE +30.0163 with 199,104 lit RGB pixels. Ch416 therefore realizes its simulated +fidelity gain on hardware and is accepted. diff --git a/docs/ch417_native_attribute_gradients_prefit.md b/docs/ch417_native_attribute_gradients_prefit.md new file mode 100644 index 0000000..11d91ab --- /dev/null +++ b/docs/ch417_native_attribute_gradients_prefit.md @@ -0,0 +1,153 @@ +# Ch417 — native 12.4 attribute gradients + +## Objective + +Close the main fidelity debt left by Ch416: coverage already samples native +12.4 GS screen coordinates at pixel centers, but color, Z, UV, and STQ planes +were still solved from integer vertex coordinates. This chapter makes the +attribute setup and evaluation use the same native geometry as coverage while +leaving draw population, texture state, blending, fog, and ordering unchanged. + +## RTL cut + +- Triangle orientation and the post-swap gradient determinant now use the full + 12.4 vertex coordinates. Coordinate deltas are signed 17-bit values and the + determinant is signed 35-bit. +- The shared gradient numerators are signed 64-bit. Because the determinant is + in sixteenths-of-a-pixel squared, the numerator is shifted by 20 rather than + 16 to produce the existing Q16.16 per-pixel gradient. +- The gradient FIFO sideband retains the full 35-bit determinant through the + time-shared setup engine and its single sequential divider. +- Color, Z, affine UV, and perspective STQ evaluation now use the native + pixel-center offset `((pixel << 4) + 8) - vertex12.4`. Products are shifted + by 20 to return to the existing attribute domains. +- Affine UV filtering consumes the resulting Q16.16 fractional texel bits. + This keeps bilinear sampling aligned with the corrected attribute plane. + +Two correctness defects exposed by the new directed tests were repaired in +the same path: + +- The packed attribute-prefetch word was missing the LPDDR ABE bit in its + unpack destination. Every following field was consequently displaced by + one bit, including the vertex-coordinate context. The unpack now includes + `gw_d_lpddr_abe` and exactly matches the stored word width. +- The opaque affine fragment-Z output retained the reset value instead of the + interpolated triangle Z. The emit sideband now selects `s2_interp_z` for an + active affine triangle and retains the flat sprite value otherwise. + +## Directed evidence + +- Legacy raster regression: 16/16 pixels PASS. +- New native-gradient triangle at `(0.75,0.75)`, `(3.75,0.75)`, and + `(0.75,3.75)`: exact R values 72/104/136 and exact Z values + 1225/1325/1425 at the three covered pixel centers. +- Triangle interpolation regression: 31 interior color samples within the + established tolerance and 62 exact Z checks, PASS. +- Shared gradient divider regression: PASS. +- Affine textured triangle: 31/31 UV texels exact, PASS. +- Perspective PSMCT32 demo: 96/96 samples exact, PASS. +- Combined texture/alpha/Z demo: PASS. +- PSMT8 runtime-CLUT triangle: affine, perspective, ABE, and MODULATE paths + PASS. +- Authentic three-epoch integration: 5,909 fragments fed, 5,909 Z-passing, + zero drops, 0/307,200 final Z mismatches, and 0/5,858 color mismatches. The + corrected affine Z sideband admits two fragments that Ch416 rejected. + +## Full-scene simulation gate + +The 263-epoch scene uses the same bit-exact divide arithmetic as production. +`SH3_FAST_GRAD` selects a one-cycle setup path for quick framebuffer iteration; +the final pre-fit gate uses `SH3_BOARD_GRAD`, the production combinational +divider and its five-cycle registered settle window. The widened 64/35-bit +divide therefore has a 200 ns functional and STA contract at 25 MHz. The +sequential-divider implementation also passes its focused regression. + +The full chronological gate passes: + +- 1,145,412 fragments fed and 971,347 Z-passing; +- zero fragment drops, request-FIFO high-water mark 1, no color overflow, and + no AXI response errors; +- 263 markers and 263 ordered read drains (the first drain begins from the + reset frame, hence 262 frame-count advances); +- 0/307,200 final Z mismatches and 0/235,951 written-color mismatches. + +The dedicated production-control rerun also passes all 263 epochs with +`GRAD_SEQ_DIVIDER=0` and `GRAD_DIV_CYCLES=5`: the same 1,145,412 fed / +971,347 passing fragments, zero drops, request-FIFO high-water 1, all 263 +ordered drains, and exact final Z/color. Its framebuffer is byte-identical to +the fast arithmetic run (`3d22b442...`), proving that the five-cycle settle FSM +changes latency only. + +The focused production board-path regression was corrected in Ch417: its old +`GRAD_BOARDPATH` branch accidentally selected the sequential divider. It now +selects the actual board combinational divider at five cycles and passes all +252/252 interior perspective samples with zero errors. The directed subpixel +gradient test also runs at five cycles and passes exact R/Z checks; its timeout +is derived from the 14-step gradient setup latency rather than a fixed delay. + +The first owner Analysis & Synthesis attempt exposed a Quartus-specific width +limit before fitting: signed `64/64` inference prepended a sign-magnitude bit +and requested unsupported `LPM_WIDTHN=65` (Error 272006). Ch417b now divides +an explicitly unsigned 64-bit numerator magnitude by the native unsigned +35-bit determinant magnitude and restores the quotient sign afterward. This +retains signed truncation-toward-zero exactly while fixing the inferred LPM at +64/35. All focused gates and the complete 263-epoch production-control gate +were rerun after this change; the framebuffer remains byte-identical at +`3d22b442...`. + +The compiled Verilator run completed the full gate. The original Icarus run +independently matched every count through epoch 59 before it was retired after +the faster run passed, including the first Z-rejecting epochs. The two engines +therefore agree across both the all-pass prefix and mixed pass/reject behavior. + +The Ch417 framebuffer improves against the bilinearly resized PCSX2 reference +from Ch416 MAE 20.4941 / RMSE 30.0163 to MAE 20.1177 / RMSE 29.4268. Lit RGB +pixels rise from 199,104 to 199,827. Ch417 versus Ch416 measures MAE 2.9100 / +RMSE 9.4742, with 135,574 pixels unchanged exactly. + +Artifact SHA-256 identities: + +- Ch417 RTL framebuffer MEM: + `3d22b4421194d444677f3bc9f938e43fd856c6615b92585a10209093d982a625`; +- Ch417 RTL framebuffer PNG: + `b55b411cc5f6679e6a1ed708ef21ad5eaf5750abb233c6e433ab03594ec9c01e`. + +## Owner fit gate + +The owner-controlled Quartus 26.1 GUI flow completed successfully at +2026-07-18 07:21 EDT. Synthesis confirms that the repaired divider is exactly +the intended unsigned `LPM_WIDTHN=64`, `LPM_WIDTHD=35`, with no pipeline +inserted. Final STA attached the Ch417 setup=5/hold=4 destination constraint +to 49 routed `grad_result_q` registers (including retimed internal divider +launches), giving the widened cone its 200 ns functional contract. + +Final signoff is clean: + +- setup +0.140 ns; +- hold 0.000 ns; +- recovery +0.998 ns; +- removal +0.143 ns; +- minimum pulse width +0.200 ns. + +The fit uses 38,461 / 46,800 ALMs (82%), 5,261,744 / 7,331,840 memory bits +(72%), 336 / 358 RAM blocks (94%), and 160 / 376 DSP blocks (43%). The split +RBF SHA-256 is +`ef0ecc585b6e0506f30f56bbea44ba56023a305e9d22052877b0e51b1b65e643`. + +## Board acceptance + +The timing-clean RBF was installed and loaded on the Terasic board; the FPGA +manager reported `operating` before and after the run. The previous installed +image was preserved remotely as `retroDE_ps2.pre_ch417b.core.rbf`. + +The live 263-epoch scheduler completed with `rc=0`. Every texture CRC, +runtime-palette sum, staging-record count, ordered drain, AXI response, and +fragment-drop gate passed. The final capture contains 307,200 words, sum32 +`0xc552c256`, xor32 `0x90a0ec16`, 235,280 nonzero words, and bounds +`(0,0)..(511,479)`. + +Most importantly, the board framebuffer, fast RTL framebuffer, and complete +five-cycle production-control framebuffer are byte-for-byte identical. All +three have SHA-256 +`3d22b4421194d444677f3bc9f938e43fd856c6615b92585a10209093d982a625`. +Ch417 is therefore accepted in hardware. diff --git a/docs/ch418_authentic_display_mapping_prefit.md b/docs/ch418_authentic_display_mapping_prefit.md new file mode 100644 index 0000000..7366481 --- /dev/null +++ b/docs/ch418_authentic_display_mapping_prefit.md @@ -0,0 +1,85 @@ +# Ch418 — authentic SH3 display presentation mapping (prefit) + +## Objective + +Fix the large presentation mismatch between the accepted Ch417 framebuffer and +the PCSX2 224139 frame without changing any rasterized framebuffer byte. Ch418 +is scanout-only: it maps the captured GS display source onto the board's +640x480 HDMI/VGA active raster. + +## Captured register evidence + +The vendored PCSX2 `GSPrivRegSet` layout was used to decode the initial and all +eight per-vsync register snapshots in dump 224139. The active context is +DISPLAY2 (`PMODE.EN2=1`), stable in every snapshot: + +- `DISPFB2 = 0x0001000000009000` (FBP rotates later), `FBW=8`, `PSM=1`, + `DBX=0`, `DBY=32`; +- `DISPLAY2 = 0x0037f9ff0203228c`, `DX=652`, `DY=50`, `MAGH=4`, + `MAGV=0`, `DW=2559`, `DH=895`. + +Therefore the display source is 512 pixels wide (`FBW*64`) and 448 interlaced +source lines beginning at framebuffer line 32. DISPLAY2 expands each source +pixel to five VCKs (`MAGH+1`) across 2560 display clocks. Reducing that +captured display to the board raster gives the exact integer maps: + +``` +source_x = floor(output_x * 4 / 5) // 0..639 -> 0..511 +source_y = 32 + floor(output_y * 14 / 15) // 0..479 -> 32..479 +``` + +## RTL change + +`gs_lpddr_scanout_lb` now has opt-in divider-free presentation mapping: + +- a five-state horizontal phase accumulator implements 512 -> 640; +- a fifteen-state vertical phase accumulator implements 448 -> 480; +- vertical prefetch starts at captured `DBY=32`; +- buffer parity, prefetch throttling, and underflow checks use mapped source y; +- all default parameters retain the legacy 1:1 behavior. + +Only `GS_SH3_LPDDR_FB_640` enables the mapping in the DE25 top. The OSD remains +in the 640x480 output domain and the LPDDR framebuffer/dump remains byte-exact +to Ch417. + +The mapper contains no `/` or variable multiply in synthesizable RTL. Its +datapath is one small phase decrement and one coordinate increment per output +pixel/line, both in the 25 MHz video domain. + +## Prefit verification + +- New two-axis scanout oracle: 600/600 RGB pixels exact, including horizontal + repeats, vertical repeats, DBY offset, alternating line buffers, zero + underflow, and zero AXI read errors. +- Legacy PSMCT16 line-buffer regression: PASS, underflow=0, read errors=0. +- Legacy PSMCT32 line-buffer/concurrency regression: 49,152 pixels exact, + underflow=0, read errors=0, 325/325 probes good. +- The actual QSF profile macros plus `USE_QSYS_TOP` elaborate cleanly under + Icarus (unavailable vendor IP treated as black boxes); no RTL binding or + syntax errors. +- `git diff --check` and the preview utility's Python compile pass. + +Expected HDMI preview: + +`sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_ch418_scanout.png` + +Preview SHA-256: + +`b710aa7a09db6992faacdaa5a6257d490f1d4fa0112f6c6d20fc388f4b580a63` + +The preview moves the already-rendered lamppost and character onto the PCSX2 +landmark positions. Full-frame RGB MAE rises from 20.12 to 21.02 because the +board is still missing large bright/background draws that the transform now +spreads over more output pixels; that global statistic is a coverage metric at +this stage, not an alignment metric. The mapping is justified by the captured +registers and visible landmark alignment, not by claiming a false MAE win. + +## Owner fit gate + +Ready for the owner-controlled Quartus 26.1 GUI compile. Required acceptance: + +- Analysis & Synthesis succeeds with no inferred display divider; +- setup, hold, recovery, removal, and minimum pulse all close; +- after deployment, the unchanged 263-epoch board run still passes and the + framebuffer dump remains byte-identical to Ch417; +- HDMI shows the 512x448 captured source presented across 640x480. diff --git a/docs/ch419_timing_root_and_rabbit_bench_prefit.md b/docs/ch419_timing_root_and_rabbit_bench_prefit.md new file mode 100644 index 0000000..9bfbad5 --- /dev/null +++ b/docs/ch419_timing_root_and_rabbit_bench_prefit.md @@ -0,0 +1,158 @@ +# Ch419 — request-path timing root cut plus rabbit/bench completion (prefit) + +## Objective + +Make one owner compile carry two concrete advances: + +1. remove the actual Ch418 310 MHz setup topology instead of rerolling placement; +2. append a bounded set of authentic missing rabbit/bench draws to the accepted + Ch417 framebuffer, without regenerating or perturbing its 263 accepted epochs. + +Ch418's captured 512x448-to-640x480 presentation mapping is retained unchanged. + +## Ch418 fit diagnosis + +The 2026-07-18 owner fit completed placement and routing but failed only the +EMIF setup domain: + +- setup WNS `-0.388 ns`, TNS `-7.218 ns` at 310 MHz; +- hold `0.000 ns` and every other reported timing check clean; +- 38,328 / 46,800 ALMs (82%), 336 / 358 RAM blocks (94%). + +The first nine setup endpoints are the same structural family: + +``` +u_zc_emit|req_rd + -> u_zc_emit|u_req|mem...ram_block...~reg1 (RAM enable) +``` + +`req_rd` has netlist fan-out 747. The worst paths contain no logic levels: +`3.370 ns` data delay is almost entirely the `3.035 ns` interconnect route to +the wide request FIFO's physical RAM enables. This is not a scanout-mapping +path and is not a seed-quality diagnosis. + +The next distinct setup family is `-0.331 ns` inside `u_lpddr_rd_arb`, from a +duplicated encoded `grant` bit back into `grant` through response-completion +selection. + +## Structural timing cuts + +### Request FIFO RAM enable + +In `gs_async_fifo` registered-read mode, the inferred synchronous RAM head is +now sampled every read clock instead of qualifying every physical RAM bank with +`rd`. The read pointer still advances only on an accepted pop and `rdata` +retains its one-cycle registered-read contract. + +This removes `req_rd` from the 747-load RAM-enable net entirely; it is a +topology change, not a fitter hint or another seed roll. + +### Read-arbiter grant release + +`gs_lpddr_rd_arb` now registers the terminal accepted `RLAST` handshake and +releases ownership on the following cycle. `ARVALID/ARREADY` are masked after +the address handshake and throughout the deliberate release bubble, so a +selected requester cannot accidentally issue a second address. + +This breaks the requester-`RREADY` selection cone out of the encoded grant +register's direct D path while preserving AXI ownership through response +acceptance. + +## Fidelity batch + +The accepted `zsrt139f17` fixture remains byte-for-byte intact. Ch419 appends +21 authentic opaque PSMT8 draw runs missing between the accepted group heads in +the PCSX2 rabbit/bench region: + +``` +71361, 71574, 72000, 72213, 72639, 72852, 73278, +73491, 73917, 74130, 74556, 74769, 75195, 75408, +75834, 76047, 76473, 76686, 77112, 77325, 77538 +``` + +Capacity-safe grouping produces 20 appended epochs and 7,496 independently +covered reference pixels. The merged `zsrt139f18` scene has 283 epochs total. +Persistent authentic Z decides visibility against the accepted base. + +This is deliberately bounded. An exhaustive supported-draw plan expanded to +6,977 epochs and was rejected as operationally useless before deployment. + +## Prefit verification + +The full production-control replay uses the exact board gradient-divider +selection and settle FSM, the modified request FIFO, the modified read arbiter, +one persistent color/Z memory, and all 283 chronological epochs: + +- 1,177,489 fragments fed; +- 984,845 fragments passed authentic Z; +- 283 ordered markers and 283 fresh drains; +- zero fragment drops, color overflow, or AXI response errors; +- final Z mismatch `0 / 307,200`; +- final color mismatch `0 / 235,963` written pixels; +- testbench `PASS` with `errors=0`. + +Final framebuffer SHA-256: + +`a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44` + +Relative to the accepted Ch417 production replay, the tail changes 4,446 +framebuffer pixels at `x=342..416, y=214..363`, the intended right-center +rabbit/bench region. Twelve pixels add previously empty coverage; the rest +replace Z-visible surface color/detail. Ch417's prior hash was: + +`3d22b4421194d444677f3bc9f938e43fd856c6615b92585a10209093d982a625` + +Supporting regressions also pass: + +- async FIFO: 3,284 exact writes/reads, no duplicate/drop; +- read arbiter contention/priority: PASS; +- Z/color emit: 1,500 fragments across three epochs, exact; +- horizontal-stretch scanout: 600 pixels exact, no underflow/read errors; +- PSMCT32 linebuffer: 49,152 pixels exact, no underflow/read errors; +- full-frame scanout: 105,968 pixels checked, exact beat count, no errors; +- concurrent scanout/reload/probe: 16,384 pixels exact; +- host scheduler build and complete 283-epoch asset dry-run: PASS; +- board staging set: 323 unique assets, 21,733,472 bytes (duplicates removed); +- relevant `git diff --check`: PASS. + +## Owner fit gate + +This is ready for one owner-controlled Quartus 26.1 GUI compile. It is not +claimed timing-clean until that report exists. + +Acceptance for the fit: + +- the `req_rd -> request RAM enable` family is absent (not merely moved down); +- the encoded read-arbiter `grant -> grant` response family is absent or clean; +- setup, hold, recovery, removal, and minimum pulse all close; +- synthesis still infers the request FIFO RAM and remains inside device limits. + +After a clean fit, deploy the RBF, stage `zsrt139f18`, run the 283-epoch board +scene, and require board framebuffer equality with the production replay hash +above before accepting the chapter. + +## Owner fit result — 2026-07-18 11:07 + +The fit was successful, but setup remained narrowly red: + +- setup improved from `-0.388 ns / -7.218 ns` to + `-0.115 ns / -1.150 ns`; +- hold improved to `+0.001 ns`; all other timing checks remained clean; +- ALMs decreased from 38,328 to 38,234; RAM use remained 336 / 358. + +Both Ch419 targets disappeared completely from the violated top ten: + +- no `req_rd -> request RAM enable` path; +- no encoded read-arbiter `grant -> grant` path. + +All ten remaining violations are one newly exposed zero-logic family: + +``` +u_zc_emit|u_req|rbin[6] + -> u_zc_emit|u_req|mem...ram_block...portbaddr[6] +``` + +The launch bit has fan-out 713. Of the `3.192 ns` data delay, `2.892 ns` +(91%) is routing. Ch419 therefore succeeded as a structural peel, but is not +accepted for deployment. Ch420 applies the corresponding dedicated read-RAM +address stage before the next owner fit. diff --git a/docs/ch420_request_fifo_read_address_prefit.md b/docs/ch420_request_fifo_read_address_prefit.md new file mode 100644 index 0000000..d5e34ca --- /dev/null +++ b/docs/ch420_request_fifo_read_address_prefit.md @@ -0,0 +1,81 @@ +# Ch420 — request FIFO dedicated read-address stage (prefit) + +## Trigger + +Ch419 removed both intended timing families and reduced setup from +`-0.388 ns / -7.218 ns` to `-0.115 ns / -1.150 ns`. Its completed fit exposed +one uniform remaining family: request FIFO `rbin[6]` directly driving the wide +banked RAM's `portbaddr[6]` network. + +This is not a new functional cone and not a reason to reroll placement. The +paths have zero logic levels, fan-out 713, and spend `2.892 ns` of `3.192 ns` +in one interconnect route. + +## Structural cut + +Registered-read mode in `gs_async_fifo` now has a dedicated RAM-facing +`raddr_q` stage, marked `dont_merge, preserve` so it cannot collapse back into +the binary CDC pointer. + +`raddr_q` captures `rbin_nxt` while the synchronous RAM reads the prior +`raddr_q`. Before each edge, `raddr_q` equals the current head address, so the +returned entry and accepted-pop latency are unchanged for isolated and +back-to-back reads. The added boundary only separates pointer/empty logic from +the physical address fan-out and gives the fitter a placeable/duplicable RAM- +local launch register. + +The stage intentionally has no reset or clock enable. The FIFO remains empty +for multiple read clocks while the write pointer crosses its two synchronizer +flops, so the address has settled to zero before any legal pop. Avoiding reset +and enable prevents recreating the prior high-fanout RAM-control failures. + +## Prefit verification + +- async FIFO randomized CDC test: 3,284 writes and reads exact, no duplicate or + drop; +- Z/color emit: 1,500 fragments across three epochs exact, including directed + `ZTST=ALWAYS`; +- concurrent scanout/reload/probe: 16,384 pixels exact; +- full 283-epoch production-control replay: PASS; +- 1,177,489 fragments fed, 984,845 passed Z, zero drops/errors; +- final Z mismatch `0 / 307,200` and color mismatch `0 / 235,963`; +- framebuffer SHA-256 remains exactly + `a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44`; +- relevant `git diff --check`: PASS. + +## Owner fit gate + +Ready for one owner-controlled Quartus 26.1 GUI compile. Acceptance requires: + +- the direct `rbin -> request RAM portbaddr` family is absent, not merely + exchanged for an equally long `rbin -> raddr_q` or `raddr_q -> portbaddr` + family; +- setup, hold, recovery, removal, and minimum pulse all close; +- request FIFO RAM inference and the 336 / 358 RAM-block budget remain intact. + +Do not deploy the RBF until this report is clean. After timing acceptance, run +the already-staged Ch419 283-epoch board scene and require exact equality with +the production framebuffer hash above. + +## Owner fit result — 2026-07-18 11:59 + +The fitter preserved `raddr_q`, and the direct `rbin -> portbaddr` family is +absent from the violated paths. Setup did not close: + +- WNS `-0.273 ns`, TNS `-1.613 ns`; +- hold `0.000 ns`; all other timing checks clean; +- 38,227 ALMs and 336 / 358 RAM blocks. + +The ten reported violations are the next request boundary, not either half of +the new address stage. They launch at the request RAM output and terminate at +the two packet-type validity registers: + +``` +u_zc_emit|u_req|mem...portbdataout + -> req_stage_frag_valid / req_stage_marker_valid +``` + +The worst path is `3.443 ns`, with the RAM output `uTco` accounting for +`1.396 ns` and three downstream decode/routing levels accounting for the rest. +Ch421 removes packet contents from stage-occupancy control and captures the +complete packet across one explicit boundary. diff --git a/docs/ch421_request_packet_boundary_prefit.md b/docs/ch421_request_packet_boundary_prefit.md new file mode 100644 index 0000000..67a023b --- /dev/null +++ b/docs/ch421_request_packet_boundary_prefit.md @@ -0,0 +1,70 @@ +# Ch421 — complete request-packet boundary (prefit) + +## Trigger + +Ch420 successfully removed the direct request-pointer-to-RAM-address family. +Its fit exposed ten paths from the wide request RAM's registered data output, +through scene-bit decode, into separate fragment/marker valid registers. The +worst was `-0.273 ns`; no address-stage path appeared in the violated top ten. + +## Structural cut + +`gs_lpddr_zc_emit` now captures all `PW` request bits, including the scene bit, +into one `req_stage_packet` register. A single `req_stage_valid` occupancy bit +is driven only by the already-registered `req_read_pending` control. + +Fragment versus marker selection is decoded after that complete packet +boundary: + +``` +req_stage_frag_valid = req_stage_valid && !req_stage_packet.scene +req_stage_marker_valid = req_stage_valid && req_stage_packet.scene +``` + +Therefore no request RAM output bit feeds stage occupancy or two competing +valid-register D cones. The packet register intentionally has no reset; +`req_stage_valid=0` makes it unobservable until a complete read is captured. +Pop, pending, consume, marker ordering, and external latency are unchanged. + +## Prefit verification + +- async FIFO randomized CDC test: 3,284 writes/reads exact; +- Z/color emit: 1,500 fragments exact across three epochs; +- concurrent scanout/reload/probe: 16,384 pixels exact; +- full 283-epoch production-control replay: PASS; +- 1,177,489 fragments fed, 984,845 passed Z, zero drops/errors; +- final Z mismatch `0 / 307,200`, color mismatch `0 / 235,963`; +- framebuffer SHA-256 remains exactly + `a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44`; +- relevant `git diff --check`: PASS. + +## Owner fit gate + +Ready for one owner-controlled Quartus 26.1 GUI compile. Acceptance requires: + +- no request RAM output path to stage occupancy/fragment/marker valid state; +- any RAM-output-to-`req_stage_packet` data path is timing-clean; +- setup, hold, recovery, removal, and minimum pulse all close; +- request FIFO RAM inference remains intact at the existing device budget. + +Do not deploy the Ch420 RBF. If Ch421 closes, deploy that RBF and execute the +already-verified 283-epoch board scene before accepting the chapter. + +## Owner fit result — request path closed, design path exposed + +The owner-controlled Quartus 26.1 GUI fit completed successfully. Ch421 did +close the intended 310 MHz EMIF/request family: + +- EMIF setup WNS `+0.155 ns`, TNS `0`; +- EMIF hold slack `0.000 ns` and all other timing classes clean; +- no request FIFO path appeared in the violated setup paths; +- 38,332 ALMs (82%), 55,712 registers, 336/358 RAM blocks (94%), 160 DSPs. + +The fit is nevertheless **not deployable** because placement exposed a separate +25 MHz design-clock failure: setup WNS `-1.993 ns`, TNS `-14.856 ns`. All ten +reported paths launch at `u_tex|g_bilinear.tap[0][8/9]` and terminate at +`raster_pixel_color_q[16/18]`. The worst path contains 30 logic levels and +41.955 ns of data delay: both bilinear interpolation stages plus TEX0 vertex +modulation were being evaluated in one cycle. That is an independent, real +combinational boundary defect, not a reason to undo the now-clean request +packet cut. Ch422 addresses it structurally. diff --git a/docs/ch422_registered_bilinear_output_prefit.md b/docs/ch422_registered_bilinear_output_prefit.md new file mode 100644 index 0000000..bf2955a --- /dev/null +++ b/docs/ch422_registered_bilinear_output_prefit.md @@ -0,0 +1,77 @@ +# Ch422 — registered bilinear output boundary (prefit) + +## Trigger + +Ch421 closed the 310 MHz EMIF/request family at `+0.155 ns`, but its owner GUI +fit exposed a design-clock path from a captured bilinear tap through both lerp +levels, the texture output mux, TEX0 vertex modulation, and finally +`raster_pixel_color_q`. The worst of ten identical-family paths had 30 logic +levels, 41.955 ns data delay, and `-1.993 ns` slack against the 40 ns clock. + +## Root cause + +`gs_texture_unit` already captured `tex_color_blend` into `tex_color_hold` while +leaving `BS_DONE`. However, during that same `BS_DONE` cycle its external +`tex_color` selected the live combinational blend and `out_valid` asserted. +Consequently, the perspective palette-bilinear emit path could consume the +unregistered value and append four channel-modulation multipliers before the +`raster_pixel_color_q` register. The intended hold register was present but +was bypassed at the only cycle that mattered for this caller. + +## Structural cut + +The bilinear FSM now has a distinct `BS_OUT` state after `BS_DONE`: + +1. `BS_DONE` evaluates the unchanged two-stage bilinear math and captures it in + `tex_color_hold`; +2. `BS_OUT` asserts `out_valid` and exposes only `tex_color_hold`; +3. the FSM then returns to `BS_IDLE`. + +This adds one internal sampler cycle but changes no pixel arithmetic and no +external handshake. Existing consumers already wait on `out_valid` or the +`busy` level, so their natural stalls absorb the cycle. The former 30-level +tap-to-emit path is split at `tex_color_hold`: bilinear arithmetic ends there, +while TEX0 modulation starts from a register on the following cycle. + +## Prefit verification + +- standalone PSMCT32/PSMT8/PSMT4 bilinear suite: all 12 cases PASS; +- tile PSMCT32 bilinear integration: PASS; +- tile palette-bilinear integration: PASS; +- full 283-epoch production-control replay: PASS; +- 1,177,489 fragments fed, 984,845 passed Z, zero drops/errors; +- final Z mismatch `0 / 307,200`, color mismatch `0 / 235,963`; +- framebuffer SHA-256 remains exactly + `a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44`. + +## Owner fit gate + +Ready for one owner-controlled Quartus 26.1 GUI compile. Acceptance requires: + +- no `g_bilinear.tap[*] -> raster_pixel_color_q[*]` setup family; +- bilinear tap paths terminate at `tex_color_hold` and close at 25 MHz; +- the already-clean 310 MHz EMIF/request family remains non-negative; +- setup, hold, recovery, removal, and minimum pulse all close; +- RAM inference and device fit remain within the existing budget. + +Do not deploy the timing-unclean Ch421 RBF. Deploy and board-test Ch422 only if +the complete timing report is clean. + +## Owner fit result + +The owner-controlled Quartus 26.1 GUI fit confirmed that the Ch422 structural +cut worked. The design clock closed at `+8.604 ns`, the reference clock closed +at `+7.564 ns`, and hold, recovery, removal, and minimum-pulse checks were +clean. The former bilinear tap-to-`raster_pixel_color_q` family was absent. + +The only remaining failure was the 310 MHz EMIF clock at WNS `-0.012 ns`, TNS +`-0.047 ns`, across six endpoints. Five endpoints were color-align tuple data +register enables (`ca_wdata_q[21/24/25/28/30]|ena`) reached through +`ca_tail -> ca_full -> feed_ok`. The sixth was +`req_stage_packet[79]|ena`, whose enable cone included the synchronized EMIF +calibration reset. These are independent control-to-data-enable artifacts; +Ch423 removes both in one combined structural closeout. + +Ch422 is therefore functionally verified and its intended timing family is +closed, but its RBF remains non-deployable because the complete fit was not +timing-clean. diff --git a/docs/ch423_control_free_data_stages_prefit.md b/docs/ch423_control_free_data_stages_prefit.md new file mode 100644 index 0000000..4698687 --- /dev/null +++ b/docs/ch423_control_free_data_stages_prefit.md @@ -0,0 +1,111 @@ +# Ch423 — control-free data stages (prefit) + +## Trigger + +Ch422 eliminated the design-clock bilinear critical path and left only six +310 MHz EMIF setup endpoints: WNS `-0.012 ns`, TNS `-0.047 ns`. The actual +post-fit netlist showed that all six ended at data-register clock enables, not +at the RAMs or payload datapaths themselves: + +- five `ca_wdata_q[*]|ena` endpoints were driven by the + `ca_tail -> ca_full -> feed_ok` control cone; +- `req_stage_packet[79]|ena` was driven through the async-reset request-stage + process, pulling the high-fanout synchronized EMIF calibration reset into + the payload register's enable implementation. + +This chapter handles both members of that same root class in one fit cycle. + +## Structural cuts + +### Request packet stage + +`req_stage_packet` now has its own non-reset `always_ff` block and captures +only when the local registered `req_read_pending` pulse is high. Occupancy +and observability remain controlled by the separately reset +`req_stage_valid`. This preserves the request FIFO protocol while preventing +the asynchronous reset cone from being folded into the wide payload register +enable. + +### Color-align RAM write tuple + +`ca_waddr_q` and `ca_wdata_q` now capture the prospective write tuple every +cycle without reset or `feed_ok` enables. The separately reset `ca_wr_q` +continues to be asserted only for an accepted fragment. On the next edge the +RAM consumes the prior captured tuple exactly when the prior `feed_ok` raised +`ca_wr_q`, preserving address, payload, and commit ordering while removing the +FIFO-full comparison from 82 data-register enables. + +No clock constraint, multicycle exception, frequency reduction, or functional +pixel change was introduced. + +## Prefit verification + +- asynchronous request FIFO regression: 3,284 exact transfers, PASS; +- Z/color emitter regression: 1,500 fragments, zero errors, PASS; +- LPDDR scanout-concurrency regression: 16,384 exact pixels, PASS; +- full 283-marker / 282-epoch production-control replay: PASS; +- 1,177,489 fragments fed, 984,845 passed Z, zero drops/errors; +- final Z mismatch `0 / 307,200`, color mismatch `0 / 235,963`; +- framebuffer SHA-256 remains exactly + `a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44`. + +## Owner fit gate + +Ready for one owner-controlled Quartus 26.1 GUI compile. Inspect the actual +post-fit timing and synthesis reports. Acceptance requires: + +- no `ca_tail -> ca_wdata_q[*]|ena` or + `ca_tail -> ca_waddr_q[*]|ena` setup family; +- no synchronized EMIF calibration-reset / `lock_sync` path to + `req_stage_packet[*]|ena`; +- the Ch422 bilinear family remains absent and the design clock stays clean; +- setup, hold, recovery, removal, and minimum pulse are all non-negative; +- color-align RAM inference and overall resource use remain intact. + +Do not deploy the Ch422 RBF. If the complete Ch423 report is clean, its RBF is +the next board-deployment candidate. + +## Owner fit result — 2026-07-18 17:24 + +The owner-controlled Quartus 26.1 GUI fit is signoff-clean: + +- EMIF setup WNS `+0.025 ns`, TNS `0.000 ns`; +- 25 MHz design setup WNS `+4.124 ns`, TNS `0.000 ns`; +- reference-clock setup WNS `+8.056 ns`, TNS `0.000 ns`; +- hold has zero violations (reported minima `0.000 ns`); +- recovery minimum `+1.071 ns`, removal minimum `+0.167 ns`; +- minimum-pulse-width minimum `+0.200 ns`; +- Timing Analyzer completed successfully with zero errors. + +The retired `ca_tail -> ca_wdata_q[*]|ena`, synchronized calibration-reset to +`req_stage_packet[*]|ena`, and Ch422 bilinear families are absent from the +setup top paths. The color-align memory remains an inferred simple dual-port +M20K (`8,832` bits). Final resources are 38,241 / 46,800 ALMs (82%), +5,261,744 block-memory bits (72%), and 336 / 358 RAM blocks (94%). + +The accepted deploy artifact is `output_files/retroDE_ps2.core.rbf`, 4,120,576 +bytes, SHA-256: + +`17d1c1b49aac4d893ed56285cf0703bf375db2ee9f472ea36862cca376ae63fe` + +## Board acceptance + +The RBF was checksum-verified on the DE25-Nano and loaded successfully through +`core_loader.sh`; `fpga0` reported `operating`. Live bridge preflight passed: + +- `CORE_ID = 0x50533200`, ABI `0x00000100`, status `0x0000001f`; +- frame counter advanced by 145 over two seconds; +- raster-overflow count and delta were both zero. + +The exact 283-epoch `sh3_zsrt139f18` production fixture then completed with +all texture CRC, CLUT sum, staged-list, fresh-drain, and record-count gates +passing. Every epoch reported zero fragment drops and the scheduler ended +with `DONE rc=0`. + +The board dumped all 307,200 framebuffer words. Its SHA-256 is + +`a88f1f6c926dd0db2b72ae2873c399e7dc5666f8003190184c34d360b13a5f44`, + +identical to the full production simulation. `cmp` confirms byte-for-byte +equality. Ch423 is therefore timing-, simulation-, and hardware-accepted and +is the new deployment baseline. diff --git a/docs/ch424_full_population_subpixel_repair.md b/docs/ch424_full_population_subpixel_repair.md new file mode 100644 index 0000000..5a0bedd --- /dev/null +++ b/docs/ch424_full_population_subpixel_repair.md @@ -0,0 +1,67 @@ +# Ch424 — restore the full scene population under native 12.4 coverage + +## Root cause + +Ch416 was described as a one-variable native-subpixel conversion of Ch415, +but its fixture was regenerated from only 113 draw IDs. Ch415 actually fed +766 captured draws grouped into 254 compatible state runs. The 113 IDs were +only the surviving groups' representative indices, so treating them as the +source draw list silently discarded most of the scene. The resulting +software reference already contained the long spike/band geometry later seen +bit-exactly in simulation and on the board; this was not an FPGA timing fault. + +The `--legacy-strip-kicks` compatibility switch also ignored captured ADC +kick suppression. Ch424 uses the parsed kick semantics and does not enable +that switch. + +## Fixture repair + +`sh3_zsrt139f19` starts from the audited 766-draw / 254-group plan in +`/tmp/sh3_opaque_qclip_plan.json`, retains authentic chronological grouping, +and enables the already-proven production feature set: + +- authentic Z, color modulation, zero-color fog fold, and bilinear reference; +- native GS XYZ 12.4 coordinates and pixel-center coverage; +- authentic scissor clipping and normalized full-region clamp; +- runtime CLUT staging and 14,500-fragment capacity epochs; +- parsed ADC/kick behavior, with no legacy strip override. + +The repaired fixture schedules 125 epochs. Its software reference restores +the coherent booth, floor, lamp, character, fence, and bench geometry. With +the accepted Ch418 scanout mapping, comparison against the PCSX2 224139 frame +is MAE 18.5560 / RMSE 26.2740. The raw 640x480 buffer is MAE 21.0802 / RMSE +32.3348. + +## Acceptance gates + +- Production-gradient full RTL replay must finish all 125 epochs with zero + drops and exact final Z/color comparisons. +- The unchanged, timing-clean Ch423 RBF must pass the same fixture on hardware. +- The board framebuffer must match the production-gradient RTL framebuffer + bit for bit before Ch424 becomes the visible baseline. + +## Production RTL acceptance + +The production registered-gradient Verilator replay completed all 125 epochs: +157,208 fragments were fed, 138,825 passed Z, fragment drops remained zero, +and the final comparisons reported 0/307,200 Z mismatches and 0/114,550 color +mismatches. Marker/drain counts were complete, `col_ovf=0`, +`bresp_err=0`, and the testbench finished PASS. + +The raw RTL frame measures MAE 22.9740 / RMSE 33.6203 against PCSX2. Through +the accepted Ch418 scanout mapping it measures MAE 20.9469 / RMSE 29.7626. +Unlike the lower scalar score previously claimed for Ch416, this frame also +passes the essential visual gate: its scene topology is coherent rather than +dominated by false long triangles. + +## Board acceptance + +No new fit was required. The timing-clean Ch423 RBF ran the new assets and +passed every one of the 125 texture CRC, runtime-palette, staging-record, +drain, and zero-drop gates. The board dumped 307,200 words with 114,504 +nonzero pixels, bounds `(0,10)..(511,479)`, sum32 `0x42ee1faa`, and xor32 +`0x0dc19c66`; HDMI was switched to the resulting line-buffer scanout. + +The board and production RTL framebuffer dumps are byte-identical. Both have +SHA-256 `2bd7a81d3650c00b1397d5196713634bbd4c87a5e607b75bcf0df346cb7b3126`. +Ch424 is accepted as the new visible baseline. diff --git a/docs/ch425_postprocess_bisection_closeout.md b/docs/ch425_postprocess_bisection_closeout.md new file mode 100644 index 0000000..444b6a4 --- /dev/null +++ b/docs/ch425_postprocess_bisection_closeout.md @@ -0,0 +1,34 @@ +# Ch425 — post-process bisection closeout + +## Objective + +Append the captured post-process families to the accepted Ch424 scene and +admit them only if the production replay stays exact and the PCSX2 fidelity +score improves. + +## Candidates and isolation + +`zsrt139f20` concatenated the 125-epoch Ch424 scene, the 20-epoch PSMCT32 +darken pass, the 212-epoch Ch405 PSMT8 alpha-fan fixture, and the 18-epoch +PSMT4 pass. The 375-epoch production replay was functionally clean but its +frame was catastrophically white (mapped MAE 165.23 / RMSE 189.17), so it was +not deployed. + +Epoch-boundary replays isolated each family: + +- Ch424 + CT32 darken: mapped MAE 21.3646 / RMSE 30.1358, worse than the + Ch424 baseline 20.9469 / 29.7626. +- Ch424 + CT32 + old alpha fans: mapped MAE 161.9749 / RMSE 185.4484; this is + the white-frame source. +- Ch424 + PSMT4 only (`zsrt139f21`): mapped MAE 23.4472 / RMSE 32.3453 and + most scene detail was erased. + +Every isolation replay had zero fragment drops and exact RTL Z/color +scoreboards. The problem was therefore captured-state interpretation, not +timing, loss, or board nondeterminism. Ch425 rejected all three fixtures as +generated and left the live board on Ch424 while the alpha source was audited. + +## Status + +Closed as a diagnostic chapter. Ch426 supersedes the alpha result after +repairing the fixture's RGBAQ alpha packing. diff --git a/docs/ch426_authentic_vertex_alpha_closeout.md b/docs/ch426_authentic_vertex_alpha_closeout.md new file mode 100644 index 0000000..54a8dac --- /dev/null +++ b/docs/ch426_authentic_vertex_alpha_closeout.md @@ -0,0 +1,63 @@ +# Ch426 — authentic vertex-alpha repair and atmospheric composite + +## Root cause + +The scheduler generator's `--auth-color-tfx` path preserved captured RGB but +called `bake.rgbaq_with_q()`, a legacy helper that always writes alpha +`0xff`. The first captured alpha fan actually uses vertex alpha `0x03` at +the anchor and `0x00` at the remaining vertices. Under MODULATE+TCC, forcing +that alpha to `0xff` made the authentic additive blend roughly two orders of +magnitude stronger and produced Ch425's white rectangles. + +`gs_make_sh3_scheduler_fixture.py` now packs the complete captured 32-bit +RGBA word when authentic color is enabled. It also fails closed if emitted +RGBAQ alpha differs from the canonicalized source vertex. Legacy fixtures +without authentic color retain their old opaque-alpha behavior. + +## Repaired fixture + +`zsrt139f22` regenerates the same 53 visible PSMT8 fan draws used by Ch405, +in three exact-state groups, with: + +- captured RGBAQ alpha; +- native GS 12.4 screen coordinates; +- parsed kick semantics, authentic scissor, and framebuffer clipping; +- authentic Z/TEST/ZMSK and ALPHA state; +- runtime CLUT, MODULATE color, and production bilinear sampling. + +The repaired geometry expands to 218 one-triangle bounded epochs. The final +chronological candidate `zsrt139f23` is Ch424's 125 epochs followed by the 20 +authentic CT32 darken epochs and the 218 repaired alpha epochs: 363 total. +The rejected PSMT4 pass is not included. + +## Production RTL acceptance + +The complete replay passed: + +- 1,009,406 fragments fed; 990,062 passed; +- 363 markers, zero fragment drops, zero color overflows, zero AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,314; +- framebuffer SHA-256 + `ccf574d7e7ab06a519488c187da08b8c56dce5b923b6909dafba11cad6b4ce4a`. + +Against the PCSX2 frame, the accepted display mapping measures MAE 20.0713 / +RMSE 28.9639, improving on Ch424's 20.9469 / 29.7626. The new image adds a +soft captured atmospheric veil without the false white rectangles. + +A controlled no-darken replay (`zsrt139f24`, Ch424 + repaired alpha) also +passed exactly but measured 20.0890 / 29.0439. The chronological CT32 pass +therefore provides a small measured improvement as well as preserving the +captured order; `zsrt139f23` remains the accepted candidate. + +## Silicon acceptance + +No new Quartus compile was needed. The timing-clean Ch423 RBF +(`17d1c1b49aac4d893ed56285cf0703bf375db2ee9f472ea36862cca376ae63fe`) +ran all 363 epochs on the DE25. Every texture CRC, palette checksum, staged +record count, ordered drain, and zero-drop gate passed; the host returned +`rc=0` and enabled the HDMI line-buffer source. + +The board dumped all 307,200 words with 196,889 nonzero pixels, bounds +`(0,0)..(511,479)`, sum32 `0xb59376d4`, and xor32 `0x28c61f44`. Board and RTL +framebuffer dumps are byte-identical and share the SHA-256 above. Ch426 is +accepted on silicon and is the current live HDMI baseline. diff --git a/docs/ch427_complete_alpha_family_closeout.md b/docs/ch427_complete_alpha_family_closeout.md new file mode 100644 index 0000000..da6ee25 --- /dev/null +++ b/docs/ch427_complete_alpha_family_closeout.md @@ -0,0 +1,64 @@ +# Ch427 — complete authentic alpha family + +## Objective + +Replace Ch426's hand-selected 53-draw alpha subset with every captured PSMT8 +alpha-fan draw in the chronological post-process range, while retaining strict +RTL and silicon equality and admitting the result only on measured PCSX2 +fidelity improvement. + +## Precision control + +Before expanding the family, a controlled replay increased the shared +reciprocal table from 11 to 13 bits. It changed 32,173 output pixels, but the +mapped PCSX2 score was effectively flat: MAE 20.0716 / RMSE 28.9629 versus +20.0713 / 28.9639 at 11 bits. The extra table cost therefore had no useful +fidelity return and was rejected. + +## Complete family and epoch packing + +The captured interval contains 93 authentic PSMT8 alpha-fan draws, not the 53 +draws selected by the older Ch405 fixture. The omitted 40 include captured +anchor alpha as high as `0x11`; they are real atmospheric contributions, not +transparent no-ops. + +An initial one-triangle expansion produced 408 alpha epochs. It also exposed +a valid marker corner: a fully Z-rejected epoch emits no color write, leaving +the host's stale `frame_drained` observation high and preventing a new drain +edge. The acceptance gate was not weakened. Instead, the same ordered draws +were safely capacity-packed into 129 productive alpha epochs, with maximum +coverage 14,497 fragments. `zsrt139f28` is Ch424's 125 scene epochs, the 20 +captured CT32 darken epochs, and those 129 alpha epochs: 274 total. + +## Production RTL acceptance + +The complete replay passed: + +- 1,325,665 fragments fed; 1,306,030 passed; +- 274 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,423; +- framebuffer SHA-256 + `2aaaabfbe4054b6445458eb43dffb5bcb9d7989c3121875c64fcf0839478d976`. + +Against the PCSX2 reference using the accepted display mapping, the result is +MAE 18.9384 / RMSE 27.6464. That is a material improvement over Ch426's +20.0713 / 28.9639. The complete family changes 142,182 pixels relative to the +53-draw subset and restores broad captured atmosphere without the former +white-frame failure. + +## Silicon acceptance + +No new Quartus compile was required. The timing-clean Ch423 RBF +(`17d1c1b49aac4d893ed56285cf0703bf375db2ee9f472ea36862cca376ae63fe`) +ran all 274 epochs on the DE25. Every texture CRC, palette checksum, staged +record count, ordered drain, and zero-drop gate passed; the host returned +`rc=0` and enabled the HDMI line-buffer source. + +The board dumped all 307,200 words with 212,213 nonzero pixels, bounds +`(0,0)..(511,479)`, sum32 `0x9c2fcd95`, and xor32 `0x6e7390f3`. Board and RTL +framebuffer dumps are byte-identical and share the SHA-256 above. The accepted +board image is preserved as +`captures/gs/silenthill3/extracted/sh3_zsrt139f28_ch427_board.png`. + +Ch427 is accepted on silicon and is the current live HDMI baseline. diff --git a/docs/ch428_missing_blend_population_closeout.md b/docs/ch428_missing_blend_population_closeout.md new file mode 100644 index 0000000..8ad15c8 --- /dev/null +++ b/docs/ch428_missing_blend_population_closeout.md @@ -0,0 +1,83 @@ +# Ch428 — missing blended population and logical 256x256 PSMT8 + +## Objective + +Recover captured blended geometry omitted from the Ch427 baseline without +returning to draw-count churn: census the missing PSMT8 population, preserve +dump chronology, reject families that do not improve the PCSX2 comparison, +and require production RTL/silicon identity for any accepted addition. + +## Population census + +The frame contains two previously omitted PSMT8 ABE families before the final +opaque scene draws: + +- 70 triangle-strip draws interleaved with the 766 accepted opaque strips; +- 240 triangle-list draws using a logical 256x256 PSMT8 texture, concentrated + on the foreground character at draw indices 172601 through 175947. + +The coverage planner now supports explicit ABE inclusion, primitive subsets, +and maximum draw-index boundaries while retaining its historical opaque-strip +default. + +## Rejected interleaved-strip experiment + +`zsrt139f30` inserted all 70 missing ABE strips in authentic dump order and +then retained the accepted CT32 and 93-draw alpha families. Its 307-epoch +production RTL replay passed every structural gate and produced framebuffer +SHA-256 +`5ec8549ab3b88d429403e5abe1a5074bd329eac576ed87421174b92c1dfe28ae`. + +The addition changed only 836 pixels and slightly worsened the mapped PCSX2 +score to MAE 18.9599 / RMSE 27.6639 from Ch427's 18.9384 / 27.6464. It was +therefore rejected and never deployed to the board. + +## Logical 256x256 texture support + +The 240 triangle-list draws all share the same captured state and texture. +The fixture generator now preserves TEX0 logical TW/TH=8 while padding the +256x256 PSMT8 source row-by-row into the existing physical 512-texel LPDDR +cache stride. No RTL or RBF change is required. Fail-closed generation +checks require every logical row to match the reconstructed GS local memory +byte-for-byte and require the entire unused right/lower cache padding to be +zero. The emitted descriptor was independently decoded as TBP=1024, TBW=8, +PSMT8, TW=8, TH=8; its texture CRC is `0x68e8cb9d`. + +The independent software-reference path was also corrected to use logical +dimensions for UV wrap/clamp and sampling while retaining the physical +512-texel cache stride. + +## Accepted f33 result + +`zsrt139f33` preserves chronology by inserting the three capacity-packed +triangle-list epochs between Ch424 scene rows 122 and 123, before the final +two opaque scene epochs, CT32 darken, and complete alpha family. The result +has 277 epochs. + +Production RTL replay passed with: + +- 1,326,469 fragments fed and 1,306,834 passed; +- 277 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,423; +- framebuffer SHA-256 + `c4e26d4f93d9b30f98b0abe0d99ccb4be8d362401b49f07ef76ca85c316b84de`. + +Relative to Ch427, the recovered character family changes 249 pixels within +`(323,240)..(360,280)`. The mapped PCSX2 score improves narrowly but in both +metrics, to MAE 18.9378 / RMSE 27.6458. This is accepted as authentic local +detail, not claimed as a broad visual milestone. + +## Silicon acceptance + +The timing-clean Ch423 RBF remained loaded. The DE25 completed all 277 +epochs with every texture CRC, palette checksum, staged-record count, ordered +drain, and zero-drop gate passing; the host returned `rc=0` and selected the +HDMI line-buffer source. The board dump reports 212,225 nonzero pixels, +bounds `(0,0)..(511,479)`, sum32 `0x9c95eca0`, and xor32 `0x6e5a9090`. + +Board and production RTL framebuffer files are byte-identical at the SHA-256 +above. The accepted board image is preserved as +`captures/gs/silenthill3/extracted/sh3_zsrt139f33_ch428_board.png`. + +Ch428 is accepted on silicon and f33 is the current live HDMI baseline. diff --git a/docs/ch429_psmt4_character_closeout.md b/docs/ch429_psmt4_character_closeout.md new file mode 100644 index 0000000..eac2d81 --- /dev/null +++ b/docs/ch429_psmt4_character_closeout.md @@ -0,0 +1,80 @@ +# Ch429 — native PSMT4 character recovery + +## Objective + +Recover visible captured geometry that was still absent from the accepted +Ch428 frame, while preserving authentic draw order and refusing additions +that merely increase epoch count or worsen the presentation. + +## Deferred PSMT4 postprocess + +`zsrt139f34` appended the existing 18-epoch tiled PSMT4 overlay after the +Ch428 frame, in its authentic late-frame position. Its 295-epoch production +RTL replay passed every structural gate and produced framebuffer SHA-256 +`7b167db3927c6e765c464d0e8ddbfb37f23d5b980d87ebdfc9af97b20128e044`. + +The replay also established that the captured overlay is a real contrast +operation, not an opaque texture: its alpha equation is +`(Cd-Cs)*0xdc/128 + Cs` with COLCLAMP enabled and source RGB values of 0 or +24. Applied to the still-underlit reconstructed base, it crushes most of the +scene to black and worsens the mapped PCSX2 score to MAE 24.0034 / RMSE +32.9396. The overlay is therefore deferred until the missing illumination +and base-color population is present; f34 was not deployed. + +## Native 512x1024 PSMT4 support + +A separate captured family of 19 opaque PSMT4 triangle strips covers the +foreground character body at draw indices 165536 through 172233. The draws +share TBP 9216, TBW 8, a logical 512x1024 texture, and several authentic CLUT +banks. + +The coverage planner now accepts explicit PSMT4 selection. The fixture +generator reconstructs the canonical GS-swizzled 512x1024 PSMT4 local-memory +image, packs its nibbles into the fixed 262,144-byte texture cache, preserves +PSM/TBW/TW/TH in TEX0, and samples packed nibbles in the independent software +reference. Fast-fit scaling now uses the logical texture dimensions. + +Generation is fail-closed. An independent host check confirmed that all +262,144 emitted texture bytes exactly match the local-memory reconstruction; +the emitted TEX0 decodes to TBP 1024, TBW 8, PSM `0x14`, TW 9, TH 10. The +texture CRC is `0x9ecc08f5`. + +## Accepted f36 result + +`zsrt139f35` groups the 19 strips into 13 exact-state/asset epochs. +`zsrt139f36` inserts those epochs at their authentic position before the +final opaque draws, CT32 darken, and complete alpha family. The resulting +frame has 290 epochs. + +Production RTL replay passed with: + +- 1,331,626 fragments fed and 1,311,991 passed; +- 290 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,437; +- framebuffer SHA-256 + `102bf7925b859bcacc91172ecdcd1755b4f01210f327ac918a1c8d7954905d2b`. + +Relative to Ch428, the recovered family changes 3,099 source pixels within +`(319,242)..(361,479)` and restores the visible foreground character-body +silhouette. On the mapped changed-pixel support its RMSE improves from 15.10 +to 12.82. Whole-frame mapped RMSE improves from 27.6458 to 27.6303, while +MAE moves narrowly from 18.9378 to 18.9407. This is accepted as authentic +structural fidelity with a mixed scalar-score result, not described as a +broad color-fidelity win. + +## Silicon acceptance + +No new compile or RBF was required; the timing-clean Ch423 image remained +loaded. The DE25 completed all 290 epochs with every texture CRC, palette +checksum, staged-record count, ordered drain, and zero-drop gate passing. +The scheduler returned `rc=0`, selected the HDMI line-buffer source, and +reported 212,673 nonzero pixels, bounds `(0,0)..(511,479)`, sum32 +`0x00e0b761`, and xor32 `0x9622a8a3`. + +The board and production RTL framebuffer files are byte-identical at the +SHA-256 above. The mapped board score is MAE 18.9407 / RMSE 27.6303, and the +accepted board image is preserved as +`captures/gs/silenthill3/extracted/sh3_zsrt139f36_ch429_board.png`. + +Ch429 is accepted on silicon and f36 is the current live HDMI baseline. diff --git a/docs/ch431_direct_color_character_highlights_closeout.md b/docs/ch431_direct_color_character_highlights_closeout.md new file mode 100644 index 0000000..12edecd --- /dev/null +++ b/docs/ch431_direct_color_character_highlights_closeout.md @@ -0,0 +1,68 @@ +# Ch431 — direct-color character highlights + +## Objective + +Restore two captured direct-color highlight strips omitted from the foreground +character, preserve their exact interleaving with the accepted PSMT4 body +draws, and extend the scheduler fixture path to PSMCT32 without changing RTL +or the timing-clean RBF. + +## Preceding sprite rejection + +The three late PSMT8 sprites at indices 198700, 198710, and 198720 were first +recovered as an authentic two-epoch candidate. A 14,500-sample bound exceeded +the production fresh-drain deadline, so the identical geometry was repacked +into four epochs under a 6,000-sample estimate. The 294-epoch production +replay then passed with zero drops and exact scoreboards, but the resulting +framebuffer was byte-identical to Ch429: persistent authentic Z rejected the +entire late family. It was rejected and never deployed. + +## PSMCT32 fixture support + +The draw census identified two ABE PSMCT32 triangle strips at indices 165358 +and 170407. Both sample a resident 64x64 direct-color texture at TBP 13760, +TBW 1 and write the visible framebuffer around the character torso. + +The coverage planner and scheduler generator now accept this direct-color +shape. Each source texel is reconstructed through the GS PSMCT32 local-memory +reader and placed in the upper-left 64x64 region of the fixed 512-wide, +256-KiB LPDDR cache. TEX0 keeps the logical 64x64 dimensions and selects +PSMCT32; CLUT staging is deterministic zero data and is ignored by the direct +sampler. The cache checksum is `0xb0a82094`. + +The two draws remain separate singleton epochs. `zsrt139f42` inserts the +first before the PSMT4 character family and the second between captured draws +170177 and 170637. The runtime scheduler merge was also hardened so a sliced +input carrying `reuse=1` is forced fresh whenever the immediately preceding +output texture checksum differs. This prevents false cache residency across +fixture seams. + +## Production and fidelity result + +The complete 292-epoch production replay passed with: + +- 1,331,684 fragments fed and 1,312,049 passed; +- 292 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,437; +- framebuffer SHA-256 + `8bf59d48638c16dc9cd4a96d6ddb1104b919dfcefb514a35c6a3298d192e6eb6`. + +The authentic addition changes 14 pixels at `(319,306)..(323,317)`. Mapped +PCSX2 comparison improves narrowly in both metrics, from MAE 18.9407 / RMSE +27.6303 to MAE 18.9405 / RMSE 27.6301. This is accepted as exact missing +character detail, not claimed as a broad visual milestone. + +## Silicon acceptance + +The timing-clean Ch423 RBF remained loaded. The DE25 completed all 292 +epochs with every texture checksum, palette checksum, staged-record count, +ordered drain, and zero-drop gate passing. The host returned `rc=0`, selected +the HDMI line-buffer source, and reported 212,680 nonzero pixels, bounds +`(0,0)..(511,479)`, sum32 `0x0108df89`, and xor32 `0x962ca2af`. + +Board and production RTL framebuffer files are byte-identical at the SHA-256 +above. The accepted board image is preserved as +`captures/gs/silenthill3/extracted/sh3_zsrt139f42_ch431_board.png`. + +Ch431 is accepted on silicon and f42 is the current live HDMI baseline. diff --git a/docs/ch432_perspective_bilinear_handshake_closeout.md b/docs/ch432_perspective_bilinear_handshake_closeout.md new file mode 100644 index 0000000..ccfdaba --- /dev/null +++ b/docs/ch432_perspective_bilinear_handshake_closeout.md @@ -0,0 +1,69 @@ +# Ch432 — perspective palette-bilinear handshake repair + +## Result + +Ch432 removes the alternate-sample loss in the serialized perspective +palette-bilinear raster path. It restores a broad missing surface population +in the unchanged 292-epoch f42 composition and is accepted on silicon. + +The mapped PCSX2 score improves from Ch431's MAE 18.9405 / RMSE 27.6301 to +MAE 15.0765 / RMSE 21.9717. This is a fidelity improvement from corrected +RTL coverage, not an increase in draw count or a fixture substitution. + +## Root and repair + +Dense perspective epochs emitted almost exactly half of the independently +rasterized coverage. Isolated f19 epoch 74 produced 7,301 fragments against +14,371 reference pixels. The sampler advanced once when launching the held +S1 pixel and again on `PB_RELEASE`, skipping the next S1 sample. + +Launch is now the single normal advance, `PB_WAIT` holds while the four-tap +sample returns, and `PB_RELEASE` contributes a final hold cycle. Perspective +valid is qualified by the existing Z and texture-alpha advance enables so a +frozen beat cannot resubmit the same pixel. The expensive triangle-inside +result remains off the global pipeline-enable path. + +An ALWAYS-Z diagnostic had previously added only 571 lit pixels and worsened +the reference score, independently ruling out Z as the large coverage root. + +## Simulation acceptance + +The focused perspective PSMT8 regression emits all 31/31 independently +covered samples, with no missing pixels, valid colors, correct alpha metadata, +and correct MODULATE behavior. The isolated production epoch-74 regression +passes its explicit 14,341-fragment count, up from 7,301, with zero drops and +exact scoreboards. The affine palette-bilinear regression remains clean. + +The complete unchanged f42 replay passes: + +- 2,339,405 fragments fed and 2,285,783 passed; +- 292 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,760; +- framebuffer SHA-256 + `31d21fb5c38816ef99ace1d7b55186dc749720e874ecb055a68b21584ec27037`. + +The repaired f19 scene improves against its independent software reference +from MAE 11.7491 / RMSE 24.6649 to MAE 8.7494 / RMSE 18.7008. Its mapped +PCSX2 score improves from 20.9469 / 29.7626 to 18.3393 / 25.8374. + +## Fit and silicon acceptance + +The owner GUI fit is timing-clean. Runtime-fabric audit reports 38,367 ALMs, +336 RAM blocks, required feeder/texture/Z hierarchy present, and 310 MHz setup +met at +0.069 ns. Hold is nonnegative. The deployed RBF SHA-256 is +`69b1f91b26d0d78ba654b3d0ccc48f747fa3249f08e2a23535007ff3df40d63e`. + +After explicit loader confirmation, the DE25 completed all 292 epochs with +every texture checksum, palette checksum, staged-record count, ordered drain, +and zero-drop gate passing. The host returned `rc=0`, selected the HDMI +line-buffer source, and dumped 307,200 words with sum32 `0x8304eb9b`, xor32 +`0x89a68e4f`, 240,414 nonzero 32-bit words, and bounds `(0,0)..(511,479)`. + +The board dump is byte-identical to the production-gradient simulation at the +framebuffer SHA above. The accepted board image is +`captures/gs/silenthill3/extracted/sh3_zsrt139f42_ch432_board.png`; its PNG +SHA-256 is +`45d7f3eed485ab4650bcf61e849598423c46302c42465dbd2a2579ae4518fab3`. + +Ch432 is accepted and is the current live HDMI baseline. diff --git a/docs/ch432_perspective_bilinear_handshake_prefit.md b/docs/ch432_perspective_bilinear_handshake_prefit.md new file mode 100644 index 0000000..9ab2bf1 --- /dev/null +++ b/docs/ch432_perspective_bilinear_handshake_prefit.md @@ -0,0 +1,81 @@ +# Ch432 — perspective palette-bilinear handshake repair (prefit) + +## Objective + +Remove the regular missing-sample pattern from the authentic SH3 perspective +scene without changing its fixture, chronology, Z state, textures, palettes, +or accepted display mapping. The live f42 composition remains the input; this +chapter is an RTL fidelity repair and therefore requires a new owner GUI fit. + +## Root cause + +Dense perspective palette-bilinear epochs emitted almost exactly half of their +independent software coverage. Representative f19 epoch 74 emitted 7,301 +fragments against 14,371 independently rasterized covered pixels. Other dense +epochs showed the same approximately 2:1 deficit. A GEQUAL-to-ALWAYS Z-only +diagnostic added just 571 lit pixels and worsened PCSX2 score, ruling out Z as +the broad missing-surface cause. + +The serialized four-tap sampler launched an S1 pixel in `PB_IDLE`, held the +pipeline in `PB_WAIT`, emitted the completed pixel, and then advanced again in +`PB_RELEASE`. Because the launch cycle had already advanced the raster walker, +the release advance skipped the next waiting S1 sample. This produced the +regular screen-door population loss while all existing scoreboards still +passed for the subset that was actually emitted. + +## RTL repair + +The sampler now treats launch as the single normal pipeline advance, holds +through `PB_WAIT`, and uses `PB_RELEASE` as a final hold cycle. The next S1 +sample is therefore launched rather than overwritten. Perspective input valid +is also qualified by the existing Z and texture-alpha advance enables, so a +frozen beat cannot submit the held sample twice. + +This sequencing deliberately keeps the 35-bit triangle-inside result off the +high-fanout pipeline-enable path. The only added global gating term is the +already-registered two-bit sampler state, minimizing timing risk after the +timing-clean Ch431 baseline. + +## Regression gates + +The PSMT8 perspective triangle test now enables the serialized +palette-bilinear path and checks independent coverage. It passes 31/31 covered +samples with no missing pixels, valid colors, correct alpha metadata, and +correct MODULATE behavior. The affine palette-bilinear tile regression also +passes unchanged. + +The production isolated epoch-74 gate is now explicit through +`+EXPECT_FED=14341`. It passes at 14,341 fragments (up from 7,301), with zero +drops, exact Z/color comparisons, and complete marker/drain accounting. The +30-pixel difference from the independent 14,371 coverage map is the existing +edge-rule/model boundary, not alternate-sample loss. + +The complete unchanged f42 composition passes all 292 epochs: + +- 2,339,405 fragments fed and 2,285,783 passed; +- 292 markers and drains; +- zero fragment drops, color overflows, and AXI errors; +- Z mismatch 0/307,200 and color mismatch 0/245,760; +- framebuffer SHA-256 + `31d21fb5c38816ef99ace1d7b55186dc749720e874ecb055a68b21584ec27037`. + +## Fidelity result + +The repaired f19 opaque scene lights 173,354 pixels instead of 111,705. Its +error against the independent f19 software reference improves from MAE 11.7491 +/ RMSE 24.6649 to MAE 8.7494 / RMSE 18.7008. Against the PCSX2 frame through +the accepted display map it improves from MAE 20.9469 / RMSE 29.7626 to MAE +18.3393 / RMSE 25.8374. + +On the complete f42 composition, 240,224 pixels are nonzero. The mapped PCSX2 +score improves materially from Ch431's MAE 18.9405 / RMSE 27.6301 to MAE +15.0765 / RMSE 21.9717. The remaining visual noise is real follow-on work, but +this chapter restores a large missing surface population rather than merely +adding more draw capacity. + +## Fit boundary + +The preceding owner GUI fit is clean and the runtime-fabric audit passes at +38,241 ALMs and 336 RAM blocks, with 310 MHz setup met. Those reports predate +this RTL repair. Ch432 is simulation-complete and ready for the owner to run a +new Quartus GUI compile; no command-line Quartus flow was used. diff --git a/docs/ch433_uv_optimized_stq_closeout.md b/docs/ch433_uv_optimized_stq_closeout.md new file mode 100644 index 0000000..ee105b8 --- /dev/null +++ b/docs/ch433_uv_optimized_stq_closeout.md @@ -0,0 +1,69 @@ +# Ch433 — UV-optimized STQ packing + +## Root cause + +The repaired Ch432 sampler restored the missing perspective-bilinear samples, +but the f19 base scene still showed granular spatial misregistration against +its independent floating-point reference. Post-repair isolation rejected a +13-bit reciprocal table and rejected nearest filtering: both worsened the +software-reference and PCSX2 scores. + +The remaining fixture path used `--fast-fit-scale`. That shortcut selected +the largest representable common S/T/Q scale, normally 6144, even though the +scheduler generator already had a per-triangle search that scores packed RTL +UVs against authentic floating-point UVs. A common scale cancels only at +infinite precision; vertex quantization, integer gradients, and reciprocal +quantization make the choice observable. + +## One-variable repair + +`zsrt139f43` retains f19's exact 766-draw population, 254 chronological state +groups, 125 capacity epochs, native 12.4 geometry, textures, palettes, fog, +bilinear reference, Z state, and alpha state. Only `--fast-fit-scale` was +removed. The optimizer selected scales from 0.375 through 6144 rather than +forcing almost every triangle to 6144. + +The coverage planner no longer emits the shortcut by default. It remains +available through an explicit planner `--fast-fit-scale` option for quick +diagnostic fixture generation. + +## Production result + +The full registered-gradient f43 replay passed all 125 epochs: + +- 282,363 fragments fed and 232,326 passed Z; +- zero drops, color overflows, and AXI errors; +- 125 complete markers and drains; +- final Z mismatch 0/307,200 and color mismatch 0/176,888. + +Against its independent software reference, f43 improves from f19's +MAE/RMSE 8.7494/18.7008 to 4.1633/11.9970. Its mapped PCSX2 score improves +from 18.3393/25.8374 to 17.7172/24.8787. + +`zsrt139f44` substitutes the optimized f43 base slices into the complete f42 +composition while preserving the chronology-correct PSMT4 character, +direct-color highlights, and alpha/postprocess population. The production +replay passed all 292 epochs with 2,339,405 fragments fed, 2,285,783 passed, +zero drops/errors, and exact final Z and color scoreboards. Relative to f42, +87,282 pixels change. The mapped PCSX2 score improves from +15.0765/21.9717 to 14.8127/21.5567. + +## Silicon acceptance + +No compile was required. The timing-clean Ch432 RBF ran both asset-only +fixtures. f43 passed all 125 runtime gates and matched simulation byte for +byte at SHA-256 +`f4ae82153791a66ae8ed7c4b3dd01f609b9706e826e971311c602181f8a08bc7`. + +The complete f44 board run passed all 292 texture, palette, staging, drain, +and zero-drop gates. It reported 240,492 nonzero words, bounds +`(0,0)..(511,479)`, sum32 `0x96f07662`, xor32 `0x0a031310`, and selected the +HDMI line-buffer source. Its 307,200-word framebuffer is byte-identical to +production simulation at SHA-256 +`3f492ab65c12415f4d0cd1aeafc64072870fd43bed237be4a923efbce30d2081`. + +The accepted board image is +`captures/gs/silenthill3/extracted/sh3_zsrt139f44_ch433_board.png`; the mapped +comparison is +`captures/gs/silenthill3/extracted/recon/sh3_zsrt139f44_ch433_board_mapped.png`. +Ch433 is accepted, and f44 is the current live HDMI baseline. diff --git a/docs/ch434_current_frame_lightbuffer_closeout.md b/docs/ch434_current_frame_lightbuffer_closeout.md new file mode 100644 index 0000000..33a8985 --- /dev/null +++ b/docs/ch434_current_frame_lightbuffer_closeout.md @@ -0,0 +1,80 @@ +# Ch434 — current-frame light-buffer reconstruction + +## Fidelity gap + +Ch433's accepted `zsrt139f44` frame used the captured contents of TBP 11264 +for the two late full-screen darkening sprites. That texture was stale GS +local memory rather than the intermediate produced by the current frame. +The result retained recognizable scene structure, but its lighting was not +chronologically connected to the scene being rendered. + +The omitted current-frame chain is: + +1. a PSMCT16S light target at FBP 256/TBP 8192, built by a clear, 2,053 + untextured Z-tested additive/subtractive volume draws, and a final bias + sprite; +2. conversion to the CT32 target at FBP 320/TBP 10240; +3. three CT32 ping-pong sprites through FBP 352/TBP 11264 and FBP 320; +4. the authentic draws 196167 and 196177, which sample the final TBP 11264 + image and blend it across the display. + +Ch434 reconstructs this chain as ordered static fixtures. The PSMCT16S +target is rendered with the accepted scene Z, decoded to linear CT32, and +then passed through the captured CT32 sprite states before the two display +composites. This is a static fidelity bridge; animated render-to-texture +still requires native target residency and ping-pong ownership in RTL. + +## Triangle-record topology repair + +The first integrated attempt exposed a fixture-contract bug. The scheduler +generator expanded captured TRI_STRIP, TRI_FAN, and SPRITE topology into +independent three-vertex records, while preserving the captured PRIM type in +the feeder header. Because the feeder reissues PRIM for every record, a +SPRITE record was assembled as a two-vertex sprite plus a dangling vertex, +and strip/fan records restarted with the wrong topology. + +`tools/gs_make_sh3_scheduler_fixture.py` now advertises TRIANGLE for every +expanded three-vertex record while preserving authentic TME, ABE, FST, and +CTXT state. This changed the broken all-white ping-pong result into a stable +binary light mask that retains the booth and character geometry through all +three copies. + +## Rejected diagnostics + +- `zsrt139f46` painted the untextured volume family directly into the display. + It was useful for isolation but architecturally wrong because the family + targets PSMCT16S off-screen storage. It was never deployed. +- `zsrt139f48` used the reconstructed chain before the triangle-record repair. + It passed the internal RTL scoreboard but collapsed the intermediate to + white and over-darkened the display. Its mapped PCSX2 score was + MAE/RMSE 19.4763/29.3660, so it was rejected and never deployed. + +## Accepted result + +`zsrt139f49` combines the accepted Ch433 scene, the topology-correct +current-frame light composite, and the existing textured-alpha tail. The +production registered-gradient simulation passed all 311 epochs: + +- 2,339,914 fragments fed and 2,286,292 passed; +- zero fragment drops, color overflows, and AXI errors; +- 311 complete markers and drains; +- zero final Z and color scoreboard mismatches. + +Against the PCSX2 frame through the accepted display map, f49 scores +MAE/RMSE 14.1067/21.3468. This improves both metrics from f44's +14.8127/21.5567, with a 0.7060 MAE reduction. + +No compile was required. The timing-clean Ch432 RBF ran the new assets on +the Terasic board. All 311 runtime texture, palette, staging, drain, and +zero-drop gates passed. The host reported 244,981 nonzero words, bounds +`(0,0)..(511,479)`, sum32 `0x385dc4f6`, xor32 `0x6330653c`, and selected HDMI +line-buffer source 1. + +The 307,200-word board framebuffer is byte-identical to production +simulation at SHA-256 +`adb21828465758b0601956abef39b649f1f441a0a51831f90826ae76936f6606`. +The accepted board image is +`captures/gs/silenthill3/extracted/sh3_zsrt139f49_ch434_board.png`; its mapped +comparison is +`captures/gs/silenthill3/extracted/recon/sh3_zsrt139f49_ch434_board_mapped.png`. +Ch434 is accepted, and f49 is the current live HDMI baseline. diff --git a/docs/ch435_frame_fbmsk_lightbuffer_closeout.md b/docs/ch435_frame_fbmsk_lightbuffer_closeout.md new file mode 100644 index 0000000..a913eff --- /dev/null +++ b/docs/ch435_frame_fbmsk_lightbuffer_closeout.md @@ -0,0 +1,94 @@ +# Ch435 — FRAME.FBMSK light-buffer alpha + +## Root cause + +The Ch434 current-frame light chain was structurally correct but the second +draw of the CT32 conversion stage, draw 195973, has +`FRAME.FBMSK=0xff000000`. The scheduler previously discarded that field when +relocating the framebuffer, and the external LPDDR color path had no byte-mask +transport. Draw 195973 therefore replaced alpha across the full 256x256 +target instead of preserving the alpha produced by draw 195957. Feeding that +incorrect all-128 alpha target through the remaining ping-pong passes made the +integrated frame much too dark. + +## Static fidelity result + +The first correction was an asset-boundary reconstruction. It retained alpha +128 on the 20,861 lit texels and alpha zero on the 44,675 black texels, then +propagated that target through draws 196087, 196108, 196129, 196167, and +196177. The resulting 311-epoch `zsrt139f52` replay passed production +simulation and the DE25-Nano runtime gates with zero drops, overflows, AXI +errors, Z mismatches, or color mismatches. + +The board framebuffer is byte-identical to simulation at SHA-256 +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. +Its mapped mean RGB `(26.38, 23.32, 21.19)` is close to the PCSX2 frame mean +`(28.47, 23.54, 21.33)`, and the booth, lamp, rabbit, bench, and character are +all readable. This supersedes the over-dark f49 result and is the live HDMI +asset baseline. The remaining dominant visual defect is spatial speckle and +edge noise, not global brightness. + +## Native RTL repair + +The production path now carries a four-bit byte enable derived from +`FRAME.FBMSK` with each fragment: + +- the fixture generator preserves the captured upper 32 FRAME bits and + rejects masks that are not byte-granular; +- the raster wrapper converts each `00` mask byte to an enabled write byte and + each `ff` byte to a preserved destination byte; +- the request FIFO and color-align RAM carry the byte enable across the GS to + EMIF path; +- partial opaque writes use the same ordered destination-read/modify/write + path as alpha blends; +- the color stage merges disabled bytes from the destination after either the + GS ALPHA equation or opaque source selection. + +The directed color-blend regression preserves destination alpha with +`BE=0111`, producing `0x8024180c`. The 1,500-fragment Z/color regression also +passes with zero errors. + +The regenerated authentic two-draw fixture `zsrt139l3f` contains +`ff000000000a0000` in draw 195973's FRAME header. Its registered-gradient +simulation passes 22 epochs and 131,072 fragments with zero drops, overflows, +AXI errors, Z mismatches, or color mismatches. Most importantly, the native +256x256 output is byte-identical in all 65,536 words to the static corrected +target: 44,675 black/alpha-zero texels and 20,861 lit/alpha-128 texels. + +## Accepted fit + +The owner-controlled Quartus 26.1 GUI compile completed successfully on +2026-07-19. The accepted RBF is 4,112,384 bytes with SHA-256 +`55b23b94f51f1aab271d91aa4fa766561c044b9633146f25f4242b431f6ce902`. +All signoff classes are nonnegative: + +- EMIF setup WNS `+0.083 ns`, TNS `0.000 ns`; +- 25 MHz design setup WNS `+6.324 ns`, TNS `0.000 ns`; +- hold minimum `0.000 ns`, with zero TNS; +- recovery minimum `+1.074 ns`; +- removal minimum `+0.017 ns`; +- minimum-pulse-width minimum `+0.200 ns`. + +Final resources are 38,387 / 46,800 ALMs (82%), 5,327,792 / 7,331,840 +block-memory bits (73%), 344 / 358 RAM blocks (96%), and 160 / 376 DSP +blocks (43%). + +## Hardware acceptance + +The RBF checksum was verified on the DE25-Nano and `core_loader.sh` loaded it +successfully; `fpga0` reported `operating`. The authentic 22-epoch +`zsrt139l3f` fixture then passed every texture CRC, staging, fresh-drain, and +zero-drop gate. Its 307,200-word framebuffer has SHA-256 +`e2b9f847fb64f5dbc70f112df91c6fccc54bf439138f772927150ff99aa026ce`, +byte-identical to production simulation. The native target contains exactly +20,861 lit/alpha-128 pixels and 44,675 black/alpha-zero pixels in its 256x256 +region, proving that draw 195973 preserves the destination alpha byte on +silicon. + +The complete 311-epoch f52 scene was then replayed on the same RBF. All +epochs completed with zero fragment drops and its framebuffer remained +byte-identical to simulation at SHA-256 +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. +HDMI therefore ends on the readable f52 scene. The accepted artifact is now +the board's standard `/home/terasic/cores/retroDE_ps2.core.rbf`; the previous +artifact is retained as `retroDE_ps2.pre_ch435.core.rbf`. diff --git a/docs/ch436_linear_scanout_prefit.md b/docs/ch436_linear_scanout_prefit.md new file mode 100644 index 0000000..9daa875 --- /dev/null +++ b/docs/ch436_linear_scanout_prefit.md @@ -0,0 +1,168 @@ +# Ch436 — vertical-linear authentic-display reconstruction prefit + +## Root cause + +The accepted Ch435 framebuffer is byte-identical between production RTL and +the DE25, and its mean RGB is already close to the PCSX2 frame. The remaining +high-frequency defect is also present in the independent software +reconstruction, so it is not a board-transfer or framebuffer-write error. + +The Ch418 presentation path reduced the captured 512x448 display to the +board's 640x480 raster with nearest-neighbour selection: + +- `source_x = floor(output_x * 4 / 5)`; +- `source_y = 32 + floor(output_y * 14 / 15)`. + +That repeats source samples at both axes and exposes the already-granular base +scene more harshly than linear display reconstruction. + +## RTL correction + +`gs_lpddr_scanout_lb` now optionally uses the existing 15-state vertical +presentation phase as the exact interpolation numerator. It reads the +current and already-prefetched next row from the two alternating line buffers. +This adds no LPDDR traffic, line-buffer storage, or scheduler/render ordering +change. + +The AXI prefetch side is notified of a source-row advance during horizontal +blanking. This gives it the full blank interval to refill the retired parity +buffer before the next active line requires the adjacent row. The directed +test explicitly models that interval and checks all 600 samples against the +same rounded separable equations as RTL, with zero errors or underflow. + +Legacy profiles retain nearest/1:1 behavior through a default-off parameter. +Only the full-frame SH3 profile enables vertical linear reconstruction. +Horizontal presentation retains the proven Ch418 nearest mapper. + +An initially simulated horizontal-linear extension duplicated the line-buffer +storage to obtain an `x+1` read port. Quartus implemented those mirrors as +30,720 registers instead of M20Ks, making the design require 6,270 LABs on a +4,680-LAB device. That architecture was removed completely before this +prefit candidate; none of the mirrored arrays or horizontal blend logic remain. + +## Measured preview and regression evidence + +On the accepted Ch435 board framebuffer, the exact RTL presentation model +improves the PCSX2 comparison from nearest MAE/RMSE `14.7226/22.3097` to +`14.2678/21.3085`. Mean RGB remains effectively unchanged at +`(26.38, 23.33, 21.19)`, so this is a spatial reconstruction improvement, not +a brightness retune. + +Passing directed regressions: + +- `tb_gs_lpddr_scanout_lb_hstretch`: 600 checked, zero errors, zero underflow; +- `tb_gs_lpddr_scanout_lb`: pass; +- `tb_gs_lpddr_scanout_lb_psm32`: 49,152 checked, zero errors/underflow; +- `tb_gs_lpddr_scanout_lb_psm32_256`: 196,608 checked, zero errors/underflow. + +The framebuffer itself remains unchanged by construction, so the existing +Ch435 22-epoch native-FBMSK and 311-epoch full-scene scoreboards remain the +render-data acceptance baselines. The next owner GUI fit must establish RAM +cost and signoff timing before board deployment. + +## First owner fit — resources recovered, narrow EMIF setup miss + +The vertical-only candidate fit successfully and recovered the exact Ch435 +memory/DSP budget: 5,327,792 block-memory bits, 344 / 358 RAM blocks, and +160 / 376 DSPs. The 25 MHz presentation domain was comfortably clean at +`+4.611 ns`; hold, recovery, removal, and minimum-pulse checks were also clean. + +The RBF is not deployable because EMIF setup finished at `-0.086 ns`. The +actual post-fit top paths contained two unrelated 310 MHz routing families: + +- the high-fanout synchronized EMIF calibration reset driving duplicated + texture-cache `drain_idx_q` payload registers (`-0.086 ns`); +- one request-FIFO `raddr_q` copy driving the complete 93-bit by 16K physical + RAM address network (`-0.073 ns` / `-0.062 ns`). + +Neither path contains the vertical filter or its 25 MHz arithmetic. This is +therefore a structural timing repair, not a presentation rollback or another +placement-only reroll. + +## First timing-repair fit — rejected RAM banking + +The texture fill's selected word/index boundary is now control-free and +unreset. `F_WRITE` is reachable only after `F_DRAIN` has loaded both payload +registers, so their reset values were unobservable; removing reset eliminates +the EMIF calibration-reset launch family without changing fill ordering. + +The first repair also split the production request memory into three explicit +31-bit by 16K banks. Although the logical storage remained 1,523,712 bits, +each bank rounded up to 25 physical M20Ks. The request memory therefore used +75 blocks instead of the packed macro's 59, raising the complete design from +344 to 360 / 358 blocks. Fitter correctly rejected it before routing. This +banked-memory architecture has been removed completely. + +## Current zero-RAM-cost compile candidate + +The request FIFO is back to its original single packed 93-bit by 16K memory, +restoring the proven 59-block request-macro shape and expected 344 / 358 total +RAM budget. Its existing unreset RAM-facing `raddr_q` now carries a +`maxfan=64` synthesis directive. Quartus therefore duplicates only the +address launch register as needed; the storage remains one efficiently packed +memory and the pointer/read latency are unchanged. + +Verification after both cuts: + +- asynchronous FIFO: 3,284 writes/reads exact, zero errors; +- texture cache: 64 words exact, refill error injection exact; +- Z/color emitter: 1,500 fragments across three epochs, zero errors; +- complete 311-epoch `zsrt139f52` production replay: 2,339,914 fragments fed, + 2,286,292 passed Z, zero drops/overflows/AXI errors, final Z mismatch + `0 / 307,200`, final color mismatch `0 / 245,760`; +- framebuffer SHA-256 remains exactly + `d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`, + byte-identical to both accepted Ch435 board dumps; +- relevant `git diff --check`: PASS. + +This zero-RAM-cost RTL is ready for a new owner-controlled Quartus 26.1 GUI +compile. Acceptance requires all timing classes nonnegative, the request FIFO +to return to the 59-block packed macro / 344-block total design budget, and the +retired reset-to-`drain_idx_q` / high-fanout request-address families to be +absent. Do not deploy either prior Ch436 RBF. + +## Accepted fit + +The owner-controlled Quartus 26.1 GUI compile completed successfully on +2026-07-19. The packed request-memory shape and the complete Ch435 memory/DSP +budget were restored. All timing classes are nonnegative: + +- EMIF setup WNS `+0.050 ns`, TNS `0.000 ns`; +- 25 MHz design setup WNS `+2.387 ns`, TNS `0.000 ns`; +- reference-clock setup WNS `+8.985 ns`, TNS `0.000 ns`; +- hold minimum `0.000 ns`, with zero TNS; +- recovery minimum `+1.054 ns`; +- removal minimum `+0.163 ns`; +- minimum-pulse-width minimum `+0.200 ns`. + +Final resources are 38,522 / 46,800 ALMs (82%), 5,327,792 / 7,331,840 +block-memory bits (73%), 344 / 358 RAM blocks (96%), and 160 / 376 DSPs +(43%). Quartus explicitly ignored the `maxfan` directive because every load +is a RAM address. The request-address family remains the clean EMIF limiter +at `+0.050 ns`; the reset-to-`drain_idx_q` family is absent. Closure therefore +comes from the valid reset cut and the resulting legal placement, not from a +claimed address-register duplication. + +The accepted RBF is 4,100,096 bytes with SHA-256 +`1c8945e3e8ad85d91a682aa7a068cee487a1459a7f2b899600b24ff7d9751294`. + +## Hardware acceptance + +The RBF checksum was verified on the DE25-Nano, the accepted Ch435 image was +preserved as `retroDE_ps2.pre_ch436.core.rbf`, and `core_loader.sh` loaded the +new artifact successfully with `fpga0: operating`. Live preflight passed: + +- `CORE_ID=0x50533200`, ABI `0x00000100`, status `0x0000001f`; +- HDMI initialization complete and no I2C error; +- frame counter advanced from `0x0000117c` to `0x00001302`; +- raster-overflow count remained zero. + +The complete 311-epoch `zsrt139f52` scene then passed every texture CRC, +runtime-palette sum, staged-record count, fresh-drain, and zero-fragment-drop +gate. The scheduler dumped all 307,200 framebuffer words and ended +`DONE rc=0`. Board SHA-256 is +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`, +byte-identical to the complete production simulation and both accepted Ch435 +board dumps. HDMI is live on the Ch436 vertical-linear presentation of that +accepted f52 framebuffer. Ch436 is timing-, simulation-, and +hardware-accepted. diff --git a/docs/ch437_horizontal_linear_prefit.md b/docs/ch437_horizontal_linear_prefit.md new file mode 100644 index 0000000..a89106a --- /dev/null +++ b/docs/ch437_horizontal_linear_prefit.md @@ -0,0 +1,151 @@ +# Ch437 — zero-line-RAM horizontal-linear presentation prefit + +## Purpose + +Ch436 made the captured 15:14 vertical presentation linear while retaining the +Ch418 nearest-neighbour 5:4 horizontal map. The accepted framebuffer and board +replay are exact, so this chapter changes presentation only: it reconstructs +the fractional horizontal samples that nearest presentation repeats. + +For output column `x`, the exact source coordinate is: + +- `x0 = floor(x*4/5)`; +- `xf = (x*4) mod 5`; +- `x1 = min(x0+1, 511)`. + +The existing five-state mapper already produces both `x0` and `xf`; no divider +or new wide coordinate cone is introduced. + +## Architecture + +The rejected Ch436 horizontal prototype mirrored both complete line buffers to +obtain an `x+1` read port. Quartus implemented the mirrors as 30,720 registers +and rejected the design at 6,270 required LABs. Ch437 does not restore those +arrays. + +Instead, each physical line buffer retains one video read address. Two +256-bit register slots hold the current and next beat for each of the two +resident source rows. Horizontal blanking alternately primes beats 0 and 1. +When active scanout enters beat K, the retired parity slot is refilled with +beat K+1. The 5:4 cadence provides ten output clocks for each eight-source-pixel +beat, so the next beat is resident well before the single lane-7 boundary +sample needs it. + +The interpolation order is separable and matches the software oracle: + +1. blend row L and L+1 at x0 with denominator 15; +2. blend row L and L+1 at x1 with denominator 15; +3. blend those two results with denominator 5. + +The source-right edge clamps at pixel 511. Other profiles retain their existing +nearest/1:1 path through default-off parameters. + +## Evidence before owner fit + +Directed and legacy regressions: + +- `tb_gs_lpddr_scanout_lb_hstretch`: 2,400 checked, zero errors, zero underflow, + across eight 256-bit beats and the clamped right edge; +- `tb_gs_lpddr_scanout_lb_psm32`: 49,152 checked, zero errors/underflow; +- `tb_gs_lpddr_scanout_lb_psm32_256`: 196,608 checked, zero errors/underflow; +- `tb_gs_lpddr_scanout_fb`: 105,968 checked, zero errors/underflow; +- Verilator lint: no errors; +- relevant `git diff --check`: pass. + +The exact software presentation model improves the accepted f52 framebuffer's +PCSX2 comparison again: + +- Ch436 vertical-linear: MAE/RMSE `14.2678 / 21.3085`; +- Ch437 separable-linear: MAE/RMSE `13.9525 / 20.6568`. + +This is a visible smoothing of the horizontal staircase/noise without changing +framebuffer bytes, render ordering, LPDDR traffic, or draw count. + +## Owner GUI compile acceptance + +### Rejected first fit + +The first owner fit rejected the initial cache implementation at placement: +6,337 LABs were required on the 4,680-LAB device. The synthesis/netlist report, +not the summary alone, showed the exact cause: + +- `u_lpddr_scan_lb` contained 32,312 registers; +- the SDC line-buffer reset collection found 30,720 destinations; +- `lb0[0..79]` and `lb1[0..79]` appeared as individual flip-flop nodes; +- no line-buffer M20K payload remained in the scanout hierarchy. + +The conditional reads used to prime/refill the cache prevented Quartus from +recognizing the dual-clock RAM template. This was the same physical failure +mode as the rejected Ch436 mirrors, despite the source-level arrays not being +duplicated. + +### Corrected inference-safe candidate + +Each physical array now has exactly one unconditional video-clock read: + +```systemverilog +lb0_video_rd_q <= lb0[video_rd_addr_q]; +lb1_video_rd_q <= lb1[video_rd_addr_q]; +``` + +Address, valid, and beat tag are registered beside those outputs. A separate +control process fills the two-beat register cache only from the registered +RAM outputs. It never indexes `lb0` or `lb1` directly. This is the canonical +simple-dual-port, dual-clock inference form already proven by the accepted +line-buffer implementation. + +The corrected candidate retains identical horizontal results: the expanded +2,400-pixel test, all PSMCT32 legacy regressions, Verilator lint, and relevant +`git diff --check` pass again. + +The corrected RTL was accepted by an owner-controlled Quartus 26.1 GUI compile. +The generated core is: + +- `retroDE_ps2.core.rbf`, 4,132,864 bytes; +- SHA-256 + `3dd624cd34e56cf553fc92c47c3a0d47dc6a9c0513f37cbf72f2c4f6f9c71559`. + +All report gates pass: + +- fitter successful at 39,077 / 46,800 ALMs (83%), 56,526 registers, + 5,327,792 block-memory bits, 344 / 358 RAM blocks, and 163 / 376 DSPs; +- both line buffers are inferred as simple-dual-port, dual-clock + `altera_syncram` instances, five M20Ks and 15,360 bits apiece; +- the scanout hierarchy contains 1,602 registers rather than the rejected + implementation's 32,312; +- EMIF setup slack is +0.069 ns with zero TNS; +- the 25 MHz design-clock setup slack is +5.473 ns with zero TNS; +- all hold classes have zero TNS and minimum slack 0.000 ns; +- minimum recovery, removal, and pulse-width slack are respectively + +1.056 ns, +0.164 ns, and +0.200 ns. + +## Hardware acceptance + +The accepted core was installed on the DE25-Nano and loaded successfully. +The live fabric reported the expected core ID/ABI, healthy status, active HDMI +scanout, an advancing frame counter, and zero raster overflow. + +The complete f52 scheduler replay then passed on hardware: + +- all 311 epochs completed; +- all fresh texture CRCs matched and resident reuse checks passed; +- every epoch reported zero fragment drops; +- `DONE rc=0 (all gates passed)`; +- the dump contained 307,200 words, `sum32=0xaad0b94d`, + `xor32=0x33138181`, 245,155 nonzero pixels, and bounds `(0,0)..(511,479)`. + +The retrieved Ch437 board framebuffer has SHA-256 +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b` +and is byte-identical to the accepted Ch436 framebuffer. This is the intended +result: Ch437 changes only the HDMI presentation filter, after framebuffer +storage, while preserving the proven renderer and replay output. + +Ch437 is accepted. Its closure criteria were: + +- fitter completes within the device's 4,680-LAB capacity; +- line buffers remain inferred M20Ks and total RAM stays at 344 / 358 blocks; +- all setup, hold, recovery, removal, and pulse-width classes are nonnegative; +- the narrow EMIF request-address family remains clean; +- the 25 MHz presentation domain remains clean. + +All five criteria passed before deployment. diff --git a/docs/ch438_binomial_scanout_prefit.md b/docs/ch438_binomial_scanout_prefit.md new file mode 100644 index 0000000..86338dd --- /dev/null +++ b/docs/ch438_binomial_scanout_prefit.md @@ -0,0 +1,136 @@ +# Ch438 — source-space 3x3 binomial scanout (pre-fit) + +## Why this chapter + +Ch437 proved exact horizontal and vertical linear presentation, but the complete +f52 framebuffer still contains high-frequency speckle that the PCSX2 reference +does not. Adding more draws does not address that deficit. An offline filter +sweep identified a source-space separable `[1 2 1]/4` low-pass followed by the +authentic nearest presentation map as the best small, bounded scanout change. + +The renderer and LPDDR framebuffer are unchanged. Ch438 only changes pixels at +the final HDMI scanout boundary, so the accepted f52 framebuffer SHA remains the +rollback and equivalence anchor. + +## RTL architecture + +- `gs_lpddr_scanout_lb.sv` adds opt-in `BINOMIAL_3X3_FILTER`. +- SH3 full-frame scanout disables the Ch436/437 linear filters and enables the + binomial filter. +- A third rotating line buffer retains source rows `y-1`, `y`, and `y+1`. +- Each physical line RAM still has one unconditional registered video read, the + Quartus-safe inference form established in Ch437. +- Six 256-bit register-cache slots retain the even/odd beats for all three rows. +- Horizontal and vertical passes each compute `(a + 2*b + c + 2) >> 2`. +- Horizontal edges clamp at source columns 0 and 511. Vertical edges clamp at + source rows 32 and 479. +- The filtered source pixel is presented with the captured nearest maps: + `sx=floor(x*4/5)` and `sy=32+floor(y*14/15)`. +- The AXI prefetcher still stays one source row ahead; its physical write target + now rotates 0/1/2 rather than alternating 0/1. + +Expected fit delta from the accepted Ch437 build is one 640-pixel physical RAM +bank (approximately five M20Ks in the established 256-bit implementation), two +additional 256-bit beat-cache registers, and small shift/add logic. Ch437 used +344/358 RAM blocks, so the expected result is about 349/358. + +## Exact preview result + +Input framebuffer: + +- `captures/gs/silenthill3/extracted/sh3_zsrt139f52_ch435_board.png` +- Its underlying f52 board dump is byte-identical to the accepted Ch436/437 + framebuffer (`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`). + +Reference: `captures/gs/silenthill3/pcsx2_ref_224139.png`. + +| Scanout | MAE | RMSE | +|---|---:|---:| +| Ch437 separable linear | 13.9525 | 20.6568 | +| Ch438 3x3 binomial + nearest | 13.1111 | 19.1051 | + +Preview: +`captures/gs/silenthill3/extracted/recon/sh3_zsrt139f52_ch438_binomial_preview.png` + +Preview SHA-256: +`5a0402c523b64e252746067488177b08f0d23ab8a4a7dc09857e914c07f269f1` + +The preview is generated by `tools/preview_scanout_ch438.py`, which reproduces +the RTL's rounding after each separable pass. + +## Pre-fit verification + +- `make -C sim tb_gs_lpddr_scanout_lb_binomial` + - 2,400/2,400 output pixels exact + - zero underflow + - zero read errors +- `make -C sim tb_gs_lpddr_scanout_lb_hstretch` + - Ch437 compatibility: 2,400/2,400 exact + - zero underflow/read errors +- `make -C sim tb_gs_lpddr_scanout_lb` + - legacy scanout PASS under its established one-pixel-per-line simulation + alignment allowance + - zero underflow/read errors +- Targeted Verilator lint of the binomial parameterization: no errors, latches, + multidriven signals, combinational loops, or range errors. +- Repository `git diff --check`: clean. + +The repository-wide `make lint` still stops at the pre-existing unsupported +default-valued `rewind_i` input in `sif_dma_ee_ram_bridge_stub.sv`; the targeted +scanout lint is clean and this unrelated baseline issue was not changed. + +## Owner fit gate + +Ready for a fresh Quartus 26.1 GUI compile. Accept only if: + +1. fit succeeds; +2. all setup/hold/recovery/removal/pulse-width checks are clean; +3. RAM use remains at or below 358 blocks; +4. all three scanline arrays infer as RAM rather than register banks. + +## First fit and timing-root correction + +The first Ch438 GUI fit completed successfully and confirmed the scanout +resource projection: + +- 38,904 ALMs +- 57,173 registers +- 349/358 RAM blocks +- 160 DSP blocks + +All non-setup checks were clean, but EMIF setup failed at `-0.120 ns`, TNS +`-3.122`, across 64 endpoints. The actual top-ten family was unrelated to the +new filter datapath: + +- launch: `u_zc_emit|u_req|raddr_q[6]` +- capture: the deep request FIFO's packed `mem_rtl_0` port-B address banks +- launch-register fanout: 744 +- data path: one 2.886 ns route, zero logic levels + +This is the established 93-bit x 16K request-FIFO physical-address family. The +additional scanout RAM changed placement enough to expose it again. + +The correction keeps the full 16K request depth and banks only the payload into +two independently inferred RAM arrays. Each half has a separate preserved +registered read address, reducing the single 744-load launch net to two roughly +half-sized physical trees. FIFO order, pointer CDC, and registered-read latency +are unchanged. The banked form is enabled only on `u_zc_emit.u_req`; all other +`gs_async_fifo` users retain the monolithic default. + +Post-cut verification: + +- default async FIFO stress: 3,285 writes/reads, zero errors; +- monolithic registered-read stress: 3,285 writes/reads, zero errors; +- banked registered-read stress: 3,285 writes/reads, zero errors; +- full f52 production Verilator replay: + - 311 epochs; + - 2,339,914 fragments fed; + - 2,286,292 passed; + - zero drops, color overflow, BRESP errors, Z mismatches, or color mismatches; + - PASS; +- post-cut framebuffer SHA-256: + `d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`, + byte-identical to the accepted Ch437 board framebuffer. + +The first timing-red RBF (`7fa4724f...`) was not deployed. A fresh GUI compile +is required for the banked-address correction. diff --git a/docs/ch439_timing_convergence_prefit.md b/docs/ch439_timing_convergence_prefit.md new file mode 100644 index 0000000..9beb31e --- /dev/null +++ b/docs/ch439_timing_convergence_prefit.md @@ -0,0 +1,279 @@ +# Ch439 — measured FIFO right-sizing and scanout write-port timing convergence + +## Why this chapter exists + +The second Ch438 GUI fit completed successfully but was not timing-clean and +was not deployed. Its RBF SHA-256 was +`b5865b599101d429b86c67c25ae9688c0f6dda334aa7ebbcbd664f31226aa602`. +The fit used 39,442 ALMs, 56,446 registers, 349/358 M20Ks, and 160 DSPs. + +The actual post-fit STA report showed three concrete families: + +- setup WNS -0.924 ns / TNS -12.931 ns in the 310 MHz EMIF domain; +- six of the top ten setup paths were + `u_zc_emit|u_req|raddr_lo_q[1]` to physical `mem_lo` RAM address ports; +- one setup path at -0.403 ns was `u_lpddr_scan_lb|r_data_q[240]` to the + `lb1` RAM write port; +- the only negative design-clock hold path was -4.221 ns from the bridge's + quasi-static `lpddr_video_src_q` to `vsrc_cap_d` across unrelated clocks. + +The preceding two-way width bank did not reduce the request RAM count and made +placement worse than the original packed 16K FIFO. This chapter therefore +removes that banked form from the production instance instead of chasing it +with another seed. + +## Structural correction + +### Request FIFO: 16K to 8K from measured occupancy + +The complete 311-epoch f52 production replay was rerun at depth 16,384 while +recording the per-epoch request occupancy. The maximum was 6,115 entries at +epoch 148. The next power-of-two depth, 8,192, therefore leaves 2,077 entries +or 34 percent measured headroom. It also halves the packed 93-bit request +FIFO's depth, expected M20K footprint, and physical read-address tree. + +The production `u_zc_emit` instance now uses `REQ_DEPTH=8192` and the ordinary +monolithic registered-read FIFO. `zc_g_drops` remains the fail-closed runtime +guard if a future fixture exceeds the measured envelope. + +### Scanout line buffers: RAM-local physical write stage + +The response stage no longer drives all three line-buffer RAM write ports. +`L_R` copies each returned beat directly into data/address/enable registers +dedicated to the selected physical RAM. Those registers commit independently +while the FSM issues or waits for the next single-beat read; `L_C` is used only +once to flush the final beat of a row. The fitter can place each 256-bit launch +bank beside its RAM without adding a state to every beat. + +### LPDDR video-source bundled CDC + +`lpddr_video_src_q` is written before `lpddr_ctrl_commit_w` toggles. +`vsrc_cap_d` samples the stable data only after that toggle traverses the +three-flop `commit_d_sync`. The raw zero-cycle hold analysis between unrelated +clocks is therefore non-functional. The SDC now cuts only HOLD for this exact +source/destination pair and retains a 2 ns maximum net-delay bound. Setup is +not false-pathed. + +## Verification before the next GUI compile + +- binomial scanout: 2,400/2,400 exact pixels, zero underflow/read errors, PASS; +- horizontal-stretch scanout: 2,400/2,400 exact pixels, zero underflow/read + errors, PASS; +- registered asynchronous FIFO stress: 3,285 writes/reads, zero errors, PASS; +- directed Z/color integration: 1,500 fragments, zero color overflow/BRESP + errors, PASS; +- complete f52 replay at the shipping 8K request depth: + - 311 epochs; + - 2,339,914 fragments fed and 2,286,292 passed; + - zero drops, Z mismatches, color mismatches, color overflow, or BRESP errors; + - PASS; +- Ch439 framebuffer SHA-256: + `d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`; +- byte-identical to the accepted Ch437 framebuffer and the prior Ch438 + production simulation. + +No Ch438 timing-red RBF has been deployed. A fresh Quartus 26.1 GUI compile is +required for this consolidated Ch439 correction. + +## First Ch439 fit and hardware feedback + +The first owner GUI fit of the resource-relieved design was fully signoff-clean: +EMIF setup +0.098 ns, all hold classes nonnegative, 39,514 ALMs, 57,331 +registers, 309/358 M20Ks, and 160 DSPs. It also proved that the 8K cut removed +exactly 40 RAM blocks as predicted. The generated RBF SHA-256 was +`7167deb651c08057828a360b6083ec27eb140d59eb08b7b06315cbc1d235ec13`. +It loaded successfully and the complete 311-epoch hardware replay passed every +renderer gate; its framebuffer was byte-identical to simulation at SHA-256 +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. + +However, the HDMI line-buffer status was not acceptable. `LPDDR_STATUS` held +`0xF1`, with bit 5 set. Disabling LPDDR scanout cleared it to `0xD1`, and +re-enabling scanout restored `0xF1`, proving sustained line-buffer underflow +rather than a sticky AXI read error or startup-only event. + +Root cause was the first Ch439 `L_R -> L_C -> L_W` write pipeline, which added +one EMIF cycle to every 32-byte beat and crossed the real just-in-time refill +margin. Ch439b removed `L_W`, but board testing proved that retaining `L_C` +after every beat was still too slow. Its clean fit used 39,616 ALMs, 57,109 +registers, 309/358 M20Ks, and 160 DSPs; EMIF setup was +0.050 ns and every +other timing class was also clean. RBF SHA-256 was +`56e45346338907eb6c307320757774ac65efa56dabb644906a5600f5ea73a982`. +The full 311-epoch board replay again passed every renderer gate and produced +the exact expected framebuffer, but four live samples across advancing frames +all read `LPDDR_STATUS=0xF1`. Source-off cleared status to `0xD1`; source-on +restored `0xF1` immediately. Ch439b is therefore rejected as well. +Its board evidence is retained as +`sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439b_board_run.log` and +`sh3_zsrt139f52_ch439b_board_fb.mem`; the framebuffer is byte-identical to the +8K production simulation at SHA-256 +`d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. + +Ch439c turns the RAM-local write stage into an actual pipeline. A captured +beat commits from its local register while the AXI FSM advances to the next +read. Only the final beat takes `L_C`, as a one-cycle row-end flush before +`next_fetch` is published. This restores the accepted pre-Ch439 per-beat +cadence while retaining the physical timing cut. Directed binomial and +horizontal-stretch tests are exact at 2,400/2,400 pixels with zero underflow or +read errors; the 640x192 and 256x768 PSMCT32 tests are exact at 49,152/49,152 +and 196,608/196,608 pixels with zero underflow or read errors. A fresh owner +GUI compile is required for Ch439c. + +## Ch439c fit feedback and Ch439d address-tree cut + +The owner Ch439c GUI compile completed successfully but was not deployed. It +used 39,472 ALMs, 56,640 registers, 309/358 M20Ks, and 160 DSPs. Hold, +recovery, removal, and minimum-pulse-width checks were clean, but EMIF setup +failed at -1.009 ns / -60.117 ns TNS across 166 endpoints. All ten reported +worst paths were the same zero-logic-level route: + +- launch: `u_zc_emit|u_req|raddr_q[7]`; +- capture: the monolithic request FIFO's physical `mem_rtl_0` port-B address + registers; +- data delay: 4.077 ns, of which 3.759 ns was interconnect. + +This is not a scanout-pipeline path. The Ch439c placement exposed the remaining +8K request-RAM address tree. Ch439d enables the already-regressed two-way +payload bank only on `u_zc_emit.u_req`. At the present 8K depth, each preserved +read-address copy drives half the width at half the original Ch438 depth: about +one quarter of the physical RAM load that defeated the earlier 16K banked fit. +Depth, ordering, registered-read latency, and the measured 2,077-entry capacity +margin are unchanged. + +Post-cut verification is complete: + +- banked asynchronous FIFO stress: 3,285 writes and reads, zero errors, PASS; +- directed Z/color integration: 1,500 fragments, zero overflow/BRESP errors, + PASS; +- complete 311-epoch f52 replay at 8K: 2,339,914 fragments fed, 2,286,292 + passed, zero drops/mismatches/errors, PASS; +- framebuffer remains byte-identical at SHA-256 + `d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. + +The Ch439c timing-red RBF SHA-256 is +`d006cc1ede2db1eeb5b8ae961eafc047eff3e6ef3ce58a173ae4f8e3bf7c3cac` and +was not deployed. A fresh owner GUI compile is required for Ch439d. + +Board evidence is retained as +`sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439_board_run.log` and +`sh3_zsrt139f52_ch439_board_fb.mem`. The HDMI-equivalent filtered preview is +`captures/gs/silenthill3/extracted/recon/sh3_zsrt139f52_ch439_hdmi.png` and +remains MAE 13.1111 / RMSE 19.1051 against the PCSX2 reference. + +## Ch439d fit feedback and Ch439e quadrant cut + +The owner Ch439d GUI compile completed successfully and the two width banks +were inferred as intended, but the RBF was not deployed because EMIF setup +still failed. Its RBF SHA-256 is +`fe6eb909b8d875b617587f8afafdc510f77e4b5369c66c225ba9cea404ef6ba9`. +The actual post-fit results were: + +- 39,410 required ALMs and 42,843 final-placement ALMs (91 percent); +- 56,822 dedicated logic registers, 309/358 M20Ks, and 160 DSPs; +- setup WNS -0.515 ns / TNS -36.152 ns, with 120 failing endpoints; +- hold, recovery, removal, and minimum-pulse-width checks all clean. + +Every reported worst setup path remained one zero-logic-level physical-route +family from `u_req|raddr_{lo,hi}_q[*]` to the corresponding `mem_{lo,hi}` M20K +address input register. The worst path was `raddr_lo_q[10]` to a `mem_lo` +address register, with 3.615 ns data delay into the 3.225 ns EMIF period. +Width banking improved WNS by about 0.5 ns versus Ch439c but left each address +copy spanning the full 8K depth, so Ch439d is rejected rather than reseeded. + +Reducing the FIFO below 8K is not valid for the current producer. The existing +instrumented complete f52 replay measured a peak request occupancy of 6,115 at +epoch 148, and the producer drops fragments when `zc_g_ready` deasserts. The +8,192-entry depth and its measured 2,077-entry margin therefore remain fixed. +Similarly, directly feeding the next binary pointer into the RAM address port +was already exercised before Ch420 and exposed pointer logic plus the same +high-fanout physical address family. + +Ch439e instead crosses two depth banks with the existing two payload-width +banks. The request FIFO is physically four 4K-deep RAM quadrants: +`mem_lo0`, `mem_lo1`, `mem_hi0`, and `mem_hi1`. Each has its own preserved +11-bit RAM-facing read-address register, reducing one launch tree to roughly +one quarter of the original physical RAM load. A one-bit selector delayed with +the synchronous RAM data performs only a 2:1 lower/upper-depth selection at +the registered output. Capacity, ordering, CDC publication, accepted-read +latency, and atomic tuple writes are unchanged. + +Ch439e prefit verification is complete: + +- quadrant asynchronous FIFO stress: 3,285 writes and reads, zero errors, + PASS; +- directed Z/color integration: 1,500 fragments, zero overflow/BRESP errors, + PASS; +- complete 311-epoch f52 production replay at 8K: 2,339,914 fragments fed, + 2,286,292 passed, zero drops/mismatches/errors, PASS; +- binomial and horizontal-stretch scanout: 2,400/2,400 exact pixels apiece, + zero underflow/read errors, PASS; +- framebuffer SHA-256 remains byte-identical at + `d0047677371a0f6e4e319458926f604a8599c92baaf34d09b8e1fd452e31662b`. + +The next owner GUI compile must confirm that all four quadrant memories and +four independent read-address trees survive synthesis, that setup closes, and +that the new RAM-output depth selector does not become a replacement setup +family. Only a fully signoff-clean Ch439e artifact is eligible for deployment. + +## Ch439e fit feedback and Ch439f arithmetic-boundary correction + +The owner Ch439e GUI compile completed successfully and confirmed the intended +request-FIFO result. All four quadrant memories were inferred, request-memory +usage stayed at 309/358 M20Ks, and the 310 MHz EMIF setup domain closed at ++0.019 ns. Hold, recovery, removal, and minimum-pulse-width checks were also +clean. The design used 38,849 required ALMs, 42,880 final-placement ALMs +(92 percent), 57,233 dedicated registers, and 160/376 DSP blocks. + +The artifact is nevertheless rejected because the 25 MHz design clock failed +at WNS -1.294 ns / TNS -89.732 ns across 208 endpoints. Its rejected RBF +SHA-256 is +`4deb590b83036e250e042158896a3a69c731bbccc09eef04c06f523cc382c6e5`. +Every reported worst path was the same 27-logic-level, 41.141 ns arithmetic +family: + +- launch: `u_demo|u_gs|u_tex|g_bilinear.tap[0][11]`; +- capture: `u_texcache|tex_mem...portbaddr[10]`; +- middle: both bilinear lerps, GS modulation/blend arithmetic, and the next + texture-coordinate/address arithmetic. + +The initial hypothesis was that the project-wide `AUTO_RESOURCE_SHARING ON` +setting caused this apparently cross-transaction path. The fit report records +GS arithmetic operators packed with `u_tex` bilinear operators, including +`u_demo|u_gs|mult_66` merged into `u_demo|u_gs|u_tex|mult_9`; Intel's Quartus +26.1 setting reference also warns that sharing mux/control logic can reduce +Fmax. Ch439f tests that hypothesis directly below rather than assuming it. + +Ch439f disabled automatic resource sharing globally while retaining +`AGGRESSIVE AREA`. This was a controlled synthesis experiment, not a seed or +RTL-latency change. + +The fresh owner Ch439f compile conclusively rejected that hypothesis. +Synthesis reported `Auto Resource Sharing: Off`, but the complete result was +bit-for-bit structurally unchanged at report precision: 38,849 required ALMs, +42,880 final-placement ALMs, 57,233 registers, 309 M20Ks, 160 DSPs, EMIF setup ++0.019 ns, and the identical design-clock -1.294 ns / -89.732 ns / 208-endpoint +tap-to-texture-cache family with the same 41.141 ns path. The project setting +is therefore restored to its area-oriented value. + +## Ch439g functional exception for the impossible packed-DSP arc + +The RTL cone proves that a captured bilinear tap cannot reach the texture read +address combinationally. `tap[*]` feeds the two lerp levels only in `BS_DONE`, +where the result is captured into `tex_color_hold`; the external filtered +result is exposed from that register only in the distinct `BS_OUT` cycle. +Texture-memory address capture occurs under `tex_rd_en` in `BS_ISSUE` or a +nearest-read issue cycle. Those state conditions are mutually exclusive. + +The remaining path is therefore a conservative physical arc introduced by +packing mutually exclusive arithmetic into Agilex DSP structures, not a +single-cycle functional requirement. Ch439g adds a fail-closed SDC exception +from exactly the architectural 128 `g_bilinear.tap[0:3][31:0]` registers to +the existing `u_texcache.tex_mem` endpoint collection. The exception does not +cut any walker, affine-UV, perspective-UV, descriptor, or address register; +all real texture-address launches remain timed normally. The SDC halts the +compile if the tap population is not exactly 128 or the cache collection is +empty. + +No functional RTL changed after the already-exact Ch439e simulations. The next +owner GUI compile must show the Ch439g collection-count message, retain the +four request quadrants and EMIF closure, and expose the true next design-clock +family. Deployment remains forbidden unless every timing class is clean. diff --git a/rtl/gif_gs/gs_async_fifo.sv b/rtl/gif_gs/gs_async_fifo.sv index a147fc6..f23daa0 100644 --- a/rtl/gif_gs/gs_async_fifo.sv +++ b/rtl/gif_gs/gs_async_fifo.sv @@ -14,7 +14,21 @@ module gs_async_fifo #( parameter int WIDTH = 320, // {addr[31:0], data[255:0], strb[31:0]} - parameter int DEPTH = 16 // power of two + parameter int DEPTH = 16, // power of two + // Infer a synchronous read port when set. This is useful for deep/wide + // FIFOs whose bank-select mux cannot meet a fast rclk as an FWFT output. + parameter bit REGISTERED_READ = 1'b0, + // Ch438 timing cut for very deep/wide registered-read FIFOs. Splitting the + // payload into two independently inferred RAMs gives each half its own + // preserved read-address launch register. This removes the single 744-load + // port-B address net seen on the 93x16K production request FIFO while + // preserving depth, order, and one-cycle read behavior. + parameter bit BANKED_READ = 1'b0, + // Ch439e: split a deep/wide memory in both dimensions. Two depth banks + // times two width banks leave each physical read-address copy driving + // roughly one quarter of the original M20K tree. The registered outputs + // need only a 2:1 depth-bank select; FIFO depth and latency are unchanged. + parameter bit QUADRANT_READ = 1'b0 ) ( // write domain input logic wclk, @@ -32,11 +46,52 @@ module gs_async_fifo #( localparam int AW = $clog2(DEPTH); logic [WIDTH-1:0] mem [0:DEPTH-1]; + localparam int BANK_LO_W = WIDTH / 2; + localparam int BANK_HI_W = WIDTH - BANK_LO_W; + logic [BANK_LO_W-1:0] mem_lo [0:DEPTH-1]; + logic [BANK_HI_W-1:0] mem_hi [0:DEPTH-1]; + localparam int HALF_DEPTH = DEPTH / 2; + localparam int HALF_AW = AW - 1; + logic [BANK_LO_W-1:0] mem_lo0 [0:HALF_DEPTH-1]; + logic [BANK_LO_W-1:0] mem_lo1 [0:HALF_DEPTH-1]; + logic [BANK_HI_W-1:0] mem_hi0 [0:HALF_DEPTH-1]; + logic [BANK_HI_W-1:0] mem_hi1 [0:HALF_DEPTH-1]; + // Dedicated write-port staging lets the fitter duplicate/place the RAM + // address register beside a wide banked memory. Driving every bank + // directly from the shared binary pointer created a 310 MHz high-fanout + // wbin -> RAM-address path in the 321-bit color FIFO. The opposite-domain + // pointer requires two synchronizer cycles before a reader can observe a + // write, so committing the RAM one local cycle later is CDC-safe. + logic [AW-1:0] waddr_q; + logic [WIDTH-1:0] wdata_q; + logic wwrite_q; // ---- binary + gray pointers (one extra MSB for full/empty disambiguation) ---- - logic [AW:0] wbin, wgray, wbin_nxt, wgray_nxt; + logic [AW:0] wbin, wgray, wbin_nxt; + logic [AW:0] wcommit, wcommit_nxt; logic wfull_nxt; // Ch352 — combinational next-value for the now-REGISTERED wfull logic [AW:0] rbin, rgray, rbin_nxt, rgray_nxt; + logic [AW:0] rbin_inc, rgray_inc; + (* keep *) logic rempty_if_hold, rempty_if_pop; + logic rempty_nxt; // Ch357 — combinational next-value for the now-REGISTERED rempty (read-side twin) + logic [WIDTH-1:0] rdata_q; + logic [BANK_LO_W-1:0] rdata_lo_q; + logic [BANK_HI_W-1:0] rdata_hi_q; + // Keep the RAM-facing address distinct from the binary/Gray pointer. The + // production request FIFO is one packed 93-bit x 16K macro; splitting it + // into explicit width banks wastes M20Ks at each bank boundary. Retain + // that efficient packing and ask synthesis to duplicate only this launch + // register so no copy drives the complete physical port-B address tree. + (* dont_merge, preserve *) logic [AW-1:0] raddr_q /* synthesis maxfan = 64 */; + (* dont_merge, preserve *) logic [AW-1:0] raddr_lo_q /* synthesis maxfan = 64 */; + (* dont_merge, preserve *) logic [AW-1:0] raddr_hi_q /* synthesis maxfan = 64 */; + (* dont_merge, preserve *) logic [HALF_AW-1:0] raddr_lo0_q /* synthesis maxfan = 32 */; + (* dont_merge, preserve *) logic [HALF_AW-1:0] raddr_lo1_q /* synthesis maxfan = 32 */; + (* dont_merge, preserve *) logic [HALF_AW-1:0] raddr_hi0_q /* synthesis maxfan = 32 */; + (* dont_merge, preserve *) logic [HALF_AW-1:0] raddr_hi1_q /* synthesis maxfan = 32 */; + logic [BANK_LO_W-1:0] rdata_lo0_q, rdata_lo1_q; + logic [BANK_HI_W-1:0] rdata_hi0_q, rdata_hi1_q; + logic rbank_addr_q, rbank_data_q; // synchronized opposite-domain gray pointers (2-FF) logic [AW:0] rgray_s1, rgray_s2; // read gray -> write domain @@ -48,42 +103,162 @@ module gs_async_fifo #( // ---------------- write domain ---------------- assign wbin_nxt = wbin + (wr && !wfull); - assign wgray_nxt = bin2gray(wbin_nxt); // full: next write gray == read gray with top two bits inverted. Ch352 — wfull is now a REGISTERED flag // (Cummings canonical). The previous `assign wfull = (wgray_nxt == ...)` was combinational, and since // wgray_nxt <- wbin_nxt <- wfull, it formed a wbin_nxt->wgray_nxt->wfull->wbin_nxt COMBINATIONAL LOOP that // Quartus reports and that made Place churn. Registering it breaks the loop with no overflow-behavior change: // wfull still asserts the cycle after the filling write (full is computed from wgray_nxt = the pointer AFTER - // the current write), so the (DEPTH+1)th write is still blocked. rempty is intentionally left unchanged. - assign wfull_nxt = (wgray_nxt == {~rgray_s2[AW:AW-1], rgray_s2[AW-2:0]}); + // the current write), so the (DEPTH+1)th write is still blocked. Ch357 — rempty is now the registered read-side twin. + assign wfull_nxt = (bin2gray(wbin_nxt) == {~rgray_s2[AW:AW-1], rgray_s2[AW-2:0]}); + // `wbin` is the allocation pointer (an input handshake reserves an + // address). `wcommit` trails it by the one-entry write-port stage and is + // the ONLY pointer published to the read domain. Publishing allocation + // early is unsafe when rclk is faster than wclk: the reader can otherwise + // observe a new pointer before the staged RAM write has occurred. + assign wcommit_nxt = wcommit + wwrite_q; always_ff @(posedge wclk or negedge wrst_n) begin if (!wrst_n) begin - wbin <= '0; wgray <= '0; wfull <= 1'b0; + wbin <= '0; wcommit <= '0; wgray <= '0; wfull <= 1'b0; rgray_s1 <= '0; rgray_s2 <= '0; + waddr_q <= '0; wdata_q <= '0; wwrite_q <= 1'b0; end else begin wbin <= wbin_nxt; - wgray <= wgray_nxt; + wcommit <= wcommit_nxt; + wgray <= bin2gray(wcommit_nxt); wfull <= wfull_nxt; rgray_s1 <= rgray; // sync read gray into write domain rgray_s2 <= rgray_s1; + waddr_q <= wbin[AW-1:0]; + wdata_q <= wdata; + wwrite_q <= wr && !wfull; end end - always_ff @(posedge wclk) if (wr && !wfull) mem[wbin[AW-1:0]] <= wdata; - // ---------------- read domain ---------------- - assign rbin_nxt = rbin + (rd && !rempty); - assign rgray_nxt = bin2gray(rbin_nxt); + // `rd` is an accepted-read handshake by contract: every wrapper gates it + // with !rempty. Do not gate it again here. The redundant internal gate + // put rempty in front of the AW+1 pointer adder and, for a deep FIFO, also + // in front of every RAM read-address bank. That feedback was the complete + // Ch405 310 MHz setup-failure family. + // Precompute the increment independent of `rd`, then select between the + // hold/pop results. Writing this as `rbin + rd` put the registered pop + // pulse on the carry input of the complete AW+1 adder and then through + // Gray conversion + empty equality at 310 MHz. The explicit two-result + // form is behavior-identical but leaves `rd` driving only final muxes. + assign rbin_inc = rbin + {{AW{1'b0}}, 1'b1}; + assign rgray_inc = bin2gray(rbin_inc); + assign rbin_nxt = rd ? rbin_inc : rbin; + assign rgray_nxt = rd ? rgray_inc : rgray; + assign rempty_if_hold = (rgray == wgray_s2); + assign rempty_if_pop = (rgray_inc == wgray_s2); + assign rempty_nxt = rd ? rempty_if_pop : rempty_if_hold; always_ff @(posedge rclk or negedge rrst_n) begin if (!rrst_n) begin - rbin <= '0; rgray <= '0; + rbin <= '0; rgray <= '0; rempty <= 1'b1; wgray_s1 <= '0; wgray_s2 <= '0; end else begin - rbin <= rbin_nxt; - rgray <= rgray_nxt; + rbin <= rbin_nxt; + rgray <= rgray_nxt; + rempty <= rempty_nxt; wgray_s1 <= wgray; // sync write gray into read domain wgray_s2 <= wgray_s1; end end - assign rdata = mem[rbin[AW-1:0]]; - assign rempty = (rgray == wgray_s2); + generate + if (QUADRANT_READ) begin : g_quadrant_storage + // Four physical RAM quadrants: low/high payload width crossed with + // lower/upper address half. Writes remain atomic and use the + // staged allocation address exactly as the monolithic form does. + always_ff @(posedge wclk) begin + if (wwrite_q) begin + if (waddr_q[AW-1]) begin + mem_lo1[waddr_q[HALF_AW-1:0]] <= wdata_q[0 +: BANK_LO_W]; + mem_hi1[waddr_q[HALF_AW-1:0]] <= wdata_q[BANK_LO_W +: BANK_HI_W]; + end else begin + mem_lo0[waddr_q[HALF_AW-1:0]] <= wdata_q[0 +: BANK_LO_W]; + mem_hi0[waddr_q[HALF_AW-1:0]] <= wdata_q[BANK_LO_W +: BANK_HI_W]; + end + end + end + if (REGISTERED_READ) begin : g_registered_read + always_ff @(posedge rclk) begin + // Separate launch copies are intentional: each feeds only + // one depth/width quadrant. rbank_data_q trails the + // address-bank selector by the same cycle as the four + // synchronous RAM outputs. + raddr_lo0_q <= rbin_nxt[HALF_AW-1:0]; + raddr_lo1_q <= rbin_nxt[HALF_AW-1:0]; + raddr_hi0_q <= rbin_nxt[HALF_AW-1:0]; + raddr_hi1_q <= rbin_nxt[HALF_AW-1:0]; + rbank_addr_q <= rbin_nxt[AW-1]; + rbank_data_q <= rbank_addr_q; + rdata_lo0_q <= mem_lo0[raddr_lo0_q]; + rdata_lo1_q <= mem_lo1[raddr_lo1_q]; + rdata_hi0_q <= mem_hi0[raddr_hi0_q]; + rdata_hi1_q <= mem_hi1[raddr_hi1_q]; + end + assign rdata = rbank_data_q ? {rdata_hi1_q, rdata_lo1_q} + : {rdata_hi0_q, rdata_lo0_q}; + end else begin : g_fwft_read + assign rdata = rbin[AW-1] + ? {mem_hi1[rbin[HALF_AW-1:0]], mem_lo1[rbin[HALF_AW-1:0]]} + : {mem_hi0[rbin[HALF_AW-1:0]], mem_lo0[rbin[HALF_AW-1:0]]}; + end + end else if (BANKED_READ) begin : g_banked_storage + // Two physical payload banks, written atomically from the same + // staged tuple. Each registered read address drives only its own + // half of the inferred RAM instead of the entire packed macro. + always_ff @(posedge wclk) begin + if (wwrite_q) begin + mem_lo[waddr_q] <= wdata_q[0 +: BANK_LO_W]; + mem_hi[waddr_q] <= wdata_q[BANK_LO_W +: BANK_HI_W]; + end + end + if (REGISTERED_READ) begin : g_registered_read + always_ff @(posedge rclk) begin + raddr_lo_q <= rbin_nxt[AW-1:0]; + raddr_hi_q <= rbin_nxt[AW-1:0]; + rdata_lo_q <= mem_lo[raddr_lo_q]; + rdata_hi_q <= mem_hi[raddr_hi_q]; + end + assign rdata = {rdata_hi_q, rdata_lo_q}; + end else begin : g_fwft_read + assign rdata = {mem_hi[rbin[AW-1:0]], mem_lo[rbin[AW-1:0]]}; + end + end else begin : g_monolithic_storage + always_ff @(posedge wclk) + if (wwrite_q) mem[waddr_q] <= wdata_q; + if (REGISTERED_READ) begin : g_registered_read + // A synchronous read lets Quartus use the memory output register + // instead of timing a deep bank mux directly into request decode. + // Read the current head every cycle and qualify rdata only at the + // interface. The pointer still advances exclusively on `rd`, so + // this does not consume an entry or change the one-cycle accepted- + // read latency. Leaving the inferred RAM read enable permanently + // active is important for a very wide FIFO: using `rd` as the RAM + // enable made one pop register drive every physical data bank + // (749 loads in the production request FIFO) at 310 MHz. + // + // Ch420: the Ch419 fit proved the enable cut and exposed the same + // topology on portbaddr: rbin[6] directly drove 713 RAM-address + // loads. `raddr_q` tracks the pointer's selected next value, so + // before every edge it equals the current head address. The RAM + // read therefore returns the same entry on the same edge as the + // prior `mem[rbin]` form, including consecutive accepted pops, + // while splitting pointer selection from physical RAM addressing. + // + // raddr_q/rdata_q intentionally have neither enables nor resets. + // The FIFO cannot become nonempty until the synchronized write + // pointer arrives, giving raddr_q multiple clocks to initialize to + // zero after reset. Resetting the wide inferred read structure + // previously created its own high-fanout recovery/setup family. + always_ff @(posedge rclk) begin + raddr_q <= rbin_nxt[AW-1:0]; + rdata_q <= mem[raddr_q]; + end + assign rdata = rdata_q; + end else begin : g_fwft_read + assign rdata = mem[rbin[AW-1:0]]; + end + end + endgenerate endmodule : gs_async_fifo diff --git a/rtl/gif_gs/gs_lpddr_axi_master.sv b/rtl/gif_gs/gs_lpddr_axi_master.sv index d7373cc..dc4abfe 100644 --- a/rtl/gif_gs/gs_lpddr_axi_master.sv +++ b/rtl/gif_gs/gs_lpddr_axi_master.sv @@ -25,7 +25,17 @@ // overflow, done-ish (idle && fifo empty). enable=0 → fully inert. module gs_lpddr_axi_master #( - parameter int FIFO_DEPTH = 16 + parameter int FIFO_DEPTH = 16, + // Ch353 — pixel width in BYTES: 2 = PSMCT16 (default, byte-identical to Ch318), 4 = PSMCT32. + // A 32-byte (256-bit) beat holds 32/PIX_BYTES lanes (16 for PSMCT16, 8 for PSMCT32). The + // &ns beat-complete test is unchanged (a full beat is always 32 strobe bits either way). + parameter int PIX_BYTES = 2, + // Ch357 (Codex) — ELASTIC_BACKPRESSURE: when 1, insert a one-entry elastic (skid) stage between the packer and the + // async FIFO and expose real producer backpressure via px_ready (= the stage can accept a beat this cycle). The packer + // then advances ONLY on px_emit && px_ready, and the partial/EOF flushes retry until the stage accepts — so a beat is + // NEVER dropped even if the FIFO momentarily fills, WITHOUT relying on the "packer never outruns the drain" invariant. + // Default 0 = the legacy direct-write packer, byte-identical (px_ready tied 1). Only u_zc_emit|u_c sets this to 1. + parameter bit ELASTIC_BACKPRESSURE = 1'b0 ) ( // GS clock domain — flush pixel stream input logic gs_clk, @@ -50,7 +60,15 @@ module gs_lpddr_axi_master #( input logic ctrl_commit, input logic px_emit, input logic [31:0] px_addr, // FB-relative byte address (raster_pixel_fb_addr_q) - input logic [15:0] px_pix16, + input logic [31:0] px_pix32, // pixel data; PSMCT16 callers drive {16'd0, pix16} (low PIX_BITS used) + // Ch357 (Codex) — producer backpressure. ELASTIC_BACKPRESSURE=1: high when the packer can accept px_emit this cycle + // (the elastic stage can take a beat); the producer must HOLD px_emit/px_addr/px_pix32 until px_ready. Tied 1 for the + // legacy packer (no backpressure), so legacy producers that leave it unconnected are unaffected. + output logic px_ready, + // Ch353 — end-of-scene partial-beat flush (pulse). Sparse triangle coverage may leave the final + // beat incomplete; pulse `flush` after the last px_emit to push the dangling partial beat. The + // PSMCT16 tile path always completes beats on tile-row boundaries, so it ties this to 0. + input logic flush, // f2sdram (LPDDR AXI) clock domain input logic axi_clk, @@ -79,15 +97,29 @@ module gs_lpddr_axi_master #( output logic [31:0] bursts_issued, output logic [31:0] bresp_err_count, output logic [31:0] fifo_overflow_count, - output logic idle + output logic idle, + // Ch353 (Codex) — ORDERED drain ack: high after the EOF marker pops (i.e. after the last data beat's BRESP). + // Coherent in the axi_clk domain — the scanout gate uses THIS, not a GS-domain sample of fbw_idle. + output logic frame_drained ); - localparam int PW = 320; // {addr[31:0], data[255:0], strb[31:0]} + localparam int PW = 321; // {marker, addr[31:0], data[255:0], strb[31:0]} + localparam int MARK = PW-1; // Ch353 (Codex) — ordered EOF marker bit. A flush pushes any partial beat then an + // EOF marker; the AXI FSM sets frame_drained when it POPS the marker — which, by the + // in-order FIFO + per-beat B handshake, happens only AFTER the last data beat's BRESP. + // This is a coherent same-(axi)-domain drain ack for the scanout gate (no GS-domain + // sampling of fbw_idle, no pointer-in-flight race). + // Ch353 — pixel-width derived params. At PIX_BYTES=2 these reproduce the exact Ch318 PSMCT16 logic. + localparam int PIX_BITS = PIX_BYTES * 8; // 16 or 32 + localparam int LANE_LO = (PIX_BYTES == 4) ? 2 : 1; // low addr bits inside one pixel ($clog2 PIX_BYTES) + localparam logic [PIX_BYTES-1:0] STRB1 = '1; // per-pixel byte-strobe mask (2'b11 or 4'b1111) + localparam logic [255:0] PIX_MASK = {{(256-PIX_BITS){1'b0}}, {PIX_BITS{1'b1}}}; // ============================ GS-clock PACKER ============================ logic [31:0] cur_addr; logic [255:0] cur_data; logic [31:0] cur_strb; logic has_data; + logic flush_pending; // Ch353 — latched end-of-scene flush request (pushes partial then EOF marker) logic fifo_wr; logic [PW-1:0] fifo_wdata; logic fifo_wfull; @@ -112,10 +144,6 @@ module gs_lpddr_axi_master #( end end - // High for the one cycle the snapshot updates. Admission is blocked then so the FSM never consumes a beat - // straddling a config change (old base/arm on the pop cycle, new on the next). - wire commit_edge = (commit_sync[2] != commit_sync[1]); - // arm crosses from axi_clk into gs_clk — 2-FF synchronizer (from the COHERENT latched arm). logic arm_s1, arm_gs; always_ff @(posedge gs_clk or negedge gs_rst_n) begin @@ -123,35 +151,50 @@ module gs_lpddr_axi_master #( else begin arm_s1 <= arm_axi; arm_gs <= arm_s1; end end + // Ch357 (Codex) — effective FIFO write bus (muxed by the generate below) + one-entry elastic stage (elastic mode only). + logic fifo_wr_ram; // drive to u_fifo.wr (already ANDed with !fifo_wfull in both modes) + logic [PW-1:0] fifo_wdata_ram; // drive to u_fifo.wdata + logic stage_valid; // elastic: a beat waits in the skid stage + logic [PW-1:0] stage_data; // elastic: the staged beat + wire stage_ready = !stage_valid || !fifo_wfull; // elastic: stage can accept a beat THIS cycle + wire stage_drain = stage_valid && !fifo_wfull; // elastic: staged beat enters FIFO THIS cycle + + generate + if (!ELASTIC_BACKPRESSURE) begin : g_legacy + // ------- LEGACY packer (byte-identical to the pre-Ch357 direct-write path) ------- + assign px_ready = 1'b1; // no backpressure exposed + assign fifo_wr_ram = fifo_wr && !fifo_wfull; + assign fifo_wdata_ram = fifo_wdata; always_ff @(posedge gs_clk or negedge gs_rst_n) begin if (!gs_rst_n) begin cur_addr <= '0; cur_data <= '0; cur_strb <= '0; has_data <= 1'b0; - fifo_wr <= 1'b0; fifo_wdata <= '0; fifo_overflow_count <= '0; + fifo_wr <= 1'b0; fifo_wdata <= '0; fifo_overflow_count <= '0; flush_pending <= 1'b0; end else begin fifo_wr <= 1'b0; + if (flush) flush_pending <= 1'b1; // Ch353 — latch the end-of-scene flush request if (enable && arm_gs && px_emit) begin // gate: no accumulation until armed logic [31:0] abeat; - logic [3:0] lane; // 0..15 (which 16-bit lane) + logic [4:0] lane; // 0..LANES-1 (which PIX_BYTES-wide lane in the 32-byte beat) logic [255:0] nd; logic [31:0] ns; abeat = {px_addr[31:5], 5'd0}; - lane = px_addr[4:1]; + lane = px_addr[4:0] >> LANE_LO; if (has_data && (abeat != cur_addr)) begin - // line changed before the previous beat filled — flush it, restart - fifo_wdata <= {cur_addr, cur_data, cur_strb}; + // line changed before the previous beat filled — flush it (marker=0), restart + fifo_wdata <= {1'b0, cur_addr, cur_data, cur_strb}; fifo_wr <= 1'b1; cur_addr <= abeat; - cur_data <= (256'(px_pix16) << ({28'd0, lane} * 16)); - cur_strb <= (32'd3 << ({28'd0, lane} * 2)); + cur_data <= (256'(px_pix32[PIX_BITS-1:0]) << ({27'd0, lane} * PIX_BITS)); + cur_strb <= (32'(STRB1) << ({27'd0, lane} * PIX_BYTES)); has_data <= 1'b1; end else begin nd = has_data ? cur_data : 256'd0; ns = has_data ? cur_strb : 32'd0; - nd[ ({28'd0, lane} * 16) +: 16 ] = px_pix16; - ns[ ({28'd0, lane} * 2) +: 2 ] = 2'b11; + nd[ ({27'd0, lane} * PIX_BITS) +: PIX_BITS ] = px_pix32[PIX_BITS-1:0]; + ns[ ({27'd0, lane} * PIX_BYTES) +: PIX_BYTES ] = STRB1; if (&ns) begin - // beat complete (all 16 lanes) — flush, beat consumed - fifo_wdata <= {abeat, nd, ns}; + // beat complete (all lanes strobed) — flush (marker=0), beat consumed + fifo_wdata <= {1'b0, abeat, nd, ns}; fifo_wr <= 1'b1; has_data <= 1'b0; end else begin @@ -161,12 +204,148 @@ module gs_lpddr_axi_master #( has_data <= 1'b1; end end + end else if (enable && arm_gs && flush_pending && has_data && !fifo_wr && !fifo_wfull) begin + // Ch353 — end-of-scene partial-beat flush: push the dangling beat (marker=0) so no pixels are + // stranded. Codex — gate on `!fifo_wr && !fifo_wfull`: a PRIOR registered push may still be entering + // the FIFO this cycle (fifo_wfull is REGISTERED, lags a cycle), so wait until no push is in flight + // AND not full, then the !wfull check is accurate. Covers a scene ending on a full beat, a partial + // right after a line-change, and (since the marker also waits for fifo_wr to clear) partial->marker. + // If gated, state is RETAINED and retried — the partial is never dropped. + fifo_wdata <= {1'b0, cur_addr, cur_data, cur_strb}; + fifo_wr <= 1'b1; + has_data <= 1'b0; + end else if (enable && arm_gs && flush_pending && !has_data && !fifo_wr && !fifo_wfull) begin + // Ch353 (Codex) — partial (if any) is pushed; now push the ordered EOF MARKER (payload irrelevant), + // same `!fifo_wr && !fifo_wfull` gate. flush_pending retained until accepted. The AXI FSM sets + // frame_drained when it pops this, i.e. after the last data beat's BRESP. + fifo_wdata <= {1'b1, cur_addr, cur_data, cur_strb}; + fifo_wr <= 1'b1; + flush_pending <= 1'b0; end // overflow witness: a push attempt while the FIFO is full (must stay 0) if (fifo_wr && fifo_wfull) fifo_overflow_count <= fifo_overflow_count + 32'd1; end end + end else begin : g_elastic + // ------- ELASTIC packer (Codex): full producer backpressure via a one-entry skid stage ------- + // px_ready: the input stage can accept a pixel THIS cycle. The packer advances (accumulates, produces a + // beat, retries a flush) ONLY when stage_ready, so every produced beat lands in the stage the SAME cycle + // it is produced -> never dropped. The stage drains into the FIFO whenever !fifo_wfull; simultaneous + // drain+refill keeps the stage full with the new beat (the drain writes the OLD stage_data to the FIFO + // first, via fifo_wr_ram below). + // + // Ch358 (Codex) — REGISTERED INPUT STAGE: capture {derived beat address, lane, pixel} into in_* registers + // BEFORE the packer. The high-address equality (beat-change) compare and the lane shifts then run off + // LOCAL in_* registers instead of gating stage_data[255:0] straight from the producer's cross-module + // px_addr register — the Ch358 fit's failing setup cone (col_out_addr -> stage_data, WNS -0.176). +1 cycle + // pixel latency; ordering preserved: flush_pending is serviced only when in_valid is EMPTY, so the + // partial/EOF marker can never overtake a captured pixel. + logic in_valid; + logic [31:0] in_beat; // {px_addr[31:5], 5'd0} — derived beat address (low 5 bits constant 0) + logic [4:0] in_lane; // px_addr[4:0] >> LANE_LO + logic [PIX_BITS-1:0] in_pix; + // Ch358 (Codex) — PRE-REGISTERED beat-change decision (the 26.1 fit's residual -0.012 family was + // in_beat -> the compare -> stage_data[255:0]): in_same_q = (this pixel's beat == the PREVIOUSLY captured + // pixel's beat, last_beat_q), registered at capture. Exact by invariant: the packer reads the compare ONLY + // when has_data=1 at consumption, and has_data=1 implies the preceding captured pixel MERGED into cur_addr + // (beat-complete and flush both clear has_data and never read it) -> cur_addr == last_beat_q at capture. + // A pending flush cannot intervene while in_valid holds a pixel. No latency change. + logic in_same_q; + logic [31:0] last_beat_q; + // Ch367 — map the lane-selected pixel into full beat masks in a distinct registered stage. The beat + // accumulator below then sees only registered masks, not in_lane driving cur_data[255:0] directly. + logic map_valid, map_same_q; + logic [31:0] map_beat; + logic [255:0] map_data; + logic [255:0] map_mask; + logic [31:0] map_strb; + wire map_ready = !map_valid || stage_ready; + wire in_advance = in_valid && map_ready; // input stage advances into the map stage + assign px_ready = !in_valid || map_ready; + assign fifo_wr_ram = stage_drain; // drains the CURRENT stage_data (already implies !fifo_wfull) + assign fifo_wdata_ram = stage_data; + always_ff @(posedge gs_clk or negedge gs_rst_n) begin + if (!gs_rst_n) begin + cur_addr <= '0; cur_data <= '0; cur_strb <= '0; has_data <= 1'b0; + stage_valid <= 1'b0; stage_data <= '0; fifo_overflow_count <= '0; flush_pending <= 1'b0; + in_valid <= 1'b0; in_beat <= '0; in_lane <= '0; in_pix <= '0; + in_same_q <= 1'b0; last_beat_q <= '0; + map_valid <= 1'b0; map_same_q <= 1'b0; map_beat <= '0; map_data <= '0; map_mask <= '0; map_strb <= '0; + end else begin + logic stage_load; // a beat is being loaded into the stage this cycle + stage_load = 1'b0; + // (0) INPUT STAGE: consume first; a same-cycle capture below overrides (set wins) — classic + // pipeline advance. Capture is gated on px_ready so an occupied, non-advancing stage is never + // overwritten (the producer must HOLD px_emit/px_addr/px_pix32 until px_ready, as before). + if (in_advance) in_valid <= 1'b0; + if (enable && arm_gs && px_emit && px_ready) begin + in_valid <= 1'b1; + in_beat <= {px_addr[31:5], 5'd0}; + in_lane <= px_addr[4:0] >> LANE_LO; + in_pix <= px_pix32[PIX_BITS-1:0]; + in_same_q <= ({px_addr[31:5], 5'd0} == last_beat_q); // vs the PREVIOUS captured pixel's beat + last_beat_q <= {px_addr[31:5], 5'd0}; + end + // (1) MAP: a drain and refill can coincide; the refill wins and preserves throughput. + if (in_advance) begin + map_valid <= 1'b1; + map_same_q <= in_same_q; + map_beat <= in_beat; + map_data <= (256'(in_pix) << ({27'd0, in_lane} * PIX_BITS)); + map_mask <= (PIX_MASK << ({27'd0, in_lane} * PIX_BITS)); + map_strb <= (32'(STRB1) << ({27'd0, in_lane} * PIX_BYTES)); + end else if (stage_ready && map_valid) begin + map_valid <= 1'b0; + end + // (2) DRAIN: the staged beat enters the FIFO if there is room (may be re-loaded below same cycle). + if (stage_drain) stage_valid <= 1'b0; + // (3) latch the flush request UNCONDITIONALLY so it is never lost while backpressured. + if (flush) flush_pending <= 1'b1; + // (4) PACKER: only when the stage can accept a beat this cycle; consumes the mapped input. + if (stage_ready) begin + if (map_valid) begin + logic [255:0] nd; logic [31:0] ns; + if (has_data && !map_same_q) begin + stage_data <= {1'b0, cur_addr, cur_data, cur_strb}; stage_valid <= 1'b1; stage_load = 1'b1; + cur_addr <= map_beat; + cur_data <= map_data; + cur_strb <= map_strb; + has_data <= 1'b1; + end else begin + nd = has_data ? cur_data : 256'd0; + ns = has_data ? cur_strb : 32'd0; + // Preserve the legacy packer's last-writer-wins behavior when two accepted + // fragments target one pixel in the same beat. map_data is sparse, so OR + // would corrupt a later color whose bit pattern overlaps the earlier one. + nd = (nd & ~map_mask) | map_data; + ns = ns | map_strb; + if (&ns) begin + stage_data <= {1'b0, map_beat, nd, ns}; stage_valid <= 1'b1; stage_load = 1'b1; + has_data <= 1'b0; + end else begin + cur_addr <= map_beat; cur_data <= nd; cur_strb <= ns; has_data <= 1'b1; + end + end + end else if (!in_valid && enable && arm_gs && flush_pending && has_data) begin + // partial-beat flush — retries here every cycle until stage_ready (guaranteed inside this if) + stage_data <= {1'b0, cur_addr, cur_data, cur_strb}; stage_valid <= 1'b1; stage_load = 1'b1; + has_data <= 1'b0; + end else if (!in_valid && enable && arm_gs && flush_pending && !has_data) begin + // ordered EOF marker — retries until accepted (in_valid empty => no pixel can be overtaken) + stage_data <= {1'b1, cur_addr, cur_data, cur_strb}; stage_valid <= 1'b1; stage_load = 1'b1; + flush_pending <= 1'b0; + end + end + // overflow witness (accepted-write accounting): a stage load while the stage is occupied AND not + // draining would DROP the previous beat. Gating on stage_ready makes this impossible; the witness + // fires only if that invariant is ever violated. Must stay 0 (asserted by the saturation TB). + if (stage_load && stage_valid && !stage_drain) + fifo_overflow_count <= fifo_overflow_count + 32'd1; + end + end + end + endgenerate // ============================ async FIFO (CDC) ============================ logic [PW-1:0] fifo_rdata; @@ -183,7 +362,7 @@ module gs_lpddr_axi_master #( end wire fifo_wrst_n = wrst_sync[1]; gs_async_fifo #(.WIDTH(PW), .DEPTH(FIFO_DEPTH)) u_fifo ( - .wclk(gs_clk), .wrst_n(fifo_wrst_n), .wr(fifo_wr && !fifo_wfull), .wdata(fifo_wdata), .wfull(fifo_wfull), + .wclk(gs_clk), .wrst_n(fifo_wrst_n), .wr(fifo_wr_ram), .wdata(fifo_wdata_ram), .wfull(fifo_wfull), .rclk(axi_clk), .rrst_n(axi_rst_n), .rd(fifo_rd), .rdata(fifo_rdata), .rempty(fifo_rempty) ); @@ -209,26 +388,37 @@ module gs_lpddr_axi_master #( assign awvalid = (state == S_AW); assign wvalid = (state == S_W); assign bready = (state == S_B); - assign fifo_rd = (state == S_IDLE) && !fifo_rempty && arm_axi && !commit_edge; + // A commit and a FIFO admission may coincide safely: S_IDLE latches the full address and canary decision + // from the OLD snapshot at that edge, then AW/W/B runs solely from those registered values. The next + // admission sees the NEW snapshot. Do not gate this with the raw commit synchronizer: that turns the + // control edge into a read-pointer/rempty timing cone inside the async FIFO. + assign fifo_rd = (state == S_IDLE) && !fifo_rempty && arm_axi; assign idle = (state == S_IDLE) && fifo_rempty; always_ff @(posedge axi_clk or negedge axi_rst_n) begin if (!axi_rst_n) begin state <= S_IDLE; beat_addr <= '0; beat_data <= '0; beat_strb <= '0; awaddr_q <= '0; - beats_written <= '0; bursts_issued <= '0; bresp_err_count <= '0; + beats_written <= '0; bursts_issued <= '0; bresp_err_count <= '0; frame_drained <= 1'b0; end else begin unique case (state) - S_IDLE: if (!fifo_rempty && arm_axi && !commit_edge) begin - beat_addr <= fifo_rdata[319:288]; // {addr, data, strb} - beat_data <= fifo_rdata[287:32]; - beat_strb <= fifo_rdata[31:0]; - awaddr_q <= fb_base_axi + fifo_rdata[319:288]; // latch FULL AW addr from the STABLE base - // canary: write ONLY the offset-0 (top-of-frame) 32-byte line; - // discard every other beat (fifo_rd still pops it this cycle). - if (canary_axi && (fifo_rdata[319:288] != 32'd0)) - state <= S_IDLE; - else - state <= S_AW; + S_IDLE: if (!fifo_rempty && arm_axi) begin + if (fifo_rdata[MARK]) begin + // Ch353 — ordered EOF marker popped: every prior data beat's BRESP has completed (in-order + // FIFO + per-beat B). Assert the drain ack; consume the marker (fifo_rd pops it, no AXI). + frame_drained <= 1'b1; + state <= S_IDLE; + end else begin + frame_drained <= 1'b0; // new frame data in flight — drop the ack + beat_addr <= fifo_rdata[319:288]; // {marker, addr, data, strb} + beat_data <= fifo_rdata[287:32]; + beat_strb <= fifo_rdata[31:0]; + awaddr_q <= fb_base_axi + fifo_rdata[319:288]; // latch FULL AW addr from the STABLE base + // canary: write ONLY the offset-0 (top-of-frame) 32-byte line; discard every other beat. + if (canary_axi && (fifo_rdata[319:288] != 32'd0)) + state <= S_IDLE; + else + state <= S_AW; + end end S_AW: if (awready) begin bursts_issued <= bursts_issued + 32'd1; diff --git a/rtl/gif_gs/gs_lpddr_color_blend.sv b/rtl/gif_gs/gs_lpddr_color_blend.sv new file mode 100644 index 0000000..cc73d5a --- /dev/null +++ b/rtl/gif_gs/gs_lpddr_color_blend.sv @@ -0,0 +1,145 @@ +// In-order LPDDR destination-read / generic GS ALPHA_1 blend stage. +module gs_lpddr_color_blend ( + input logic clk, input logic rst_n, + input logic in_valid, output logic in_ready, + input logic [31:0] in_addr, input logic [31:0] in_color, input logic [16:0] in_alpha, + input logic [3:0] in_be, + output logic out_valid, input logic out_ready, output logic [31:0] out_addr, output logic [31:0] out_color, output logic idle, + output logic [31:0] araddr, output logic [7:0] arlen, output logic [2:0] arsize, output logic [1:0] arburst, + output logic arvalid, input logic arready, input logic [255:0] rdata, input logic [1:0] rresp, + input logic rlast, input logic rvalid, output logic rready +); + // The EMIF user clock is ~310 MHz. Keep the destination read, operand + // select/subtract, multiply, and add/clamp on separate registered stages; + // the original combinational gs_alpha_blend instance put all of them on + // the rdata -> out_color path and could not meet a 3.225 ns period. + typedef enum logic [2:0] {IDLE, AR, R, SEL, PREP, MUL, MAC, SUM} state_t; state_t state; + logic [31:0] src_addr, src_color; logic [16:0] src_alpha; logic [3:0] src_be; logic [2:0] lane; + logic [255:0] rdata_q; + logic [31:0] dst_q; + wire [1:0] a_sel=src_alpha[15:14], b_sel=src_alpha[13:12], c_sel=src_alpha[11:10], d_sel=src_alpha[9:8]; + wire [31:0] dst_lane=(lane==0)?rdata_q[31:0]:(lane==1)?rdata_q[63:32]:(lane==2)?rdata_q[95:64]:(lane==3)?rdata_q[127:96]:(lane==4)?rdata_q[159:128]:(lane==5)?rdata_q[191:160]:(lane==6)?rdata_q[223:192]:rdata_q[255:224]; + + function automatic logic [7:0] color_operand( + input logic [7:0] cs, input logic [7:0] cd, + input logic [1:0] sel); + return (sel == 2'd0) ? cs : (sel == 2'd1) ? cd : 8'd0; + endfunction + + function automatic logic [7:0] clamp_sum( + input logic signed [17:0] prod, input logic [7:0] op_d); + logic signed [18:0] sum; + sum = (prod >>> 7) + $signed({11'd0, op_d}); + if (sum < 19'sd0) return 8'd0; + else if (sum > 19'sd255) return 8'd255; + else return sum[7:0]; + endfunction + + // FRAME.FBMSK is compressed to a byte-enable before entering this block. + // A disabled byte preserves the destination value after either the GS + // ALPHA equation (ABE=1) or the opaque source selection (ABE=0). + function automatic logic [31:0] merge_be( + input logic [31:0] src, input logic [31:0] dst, + input logic [3:0] be); + for (int i=0; i<4; i++) + merge_be[i*8 +: 8] = be[i] ? src[i*8 +: 8] : dst[i*8 +: 8]; + endfunction + + wire [7:0] ar_op = color_operand(src_color[7:0], dst_q[7:0], a_sel); + wire [7:0] ag_op = color_operand(src_color[15:8], dst_q[15:8], a_sel); + wire [7:0] ab_op = color_operand(src_color[23:16], dst_q[23:16], a_sel); + wire [7:0] br_op = color_operand(src_color[7:0], dst_q[7:0], b_sel); + wire [7:0] bg_op = color_operand(src_color[15:8], dst_q[15:8], b_sel); + wire [7:0] bb_op = color_operand(src_color[23:16], dst_q[23:16], b_sel); + wire [7:0] dr_op = color_operand(src_color[7:0], dst_q[7:0], d_sel); + wire [7:0] dg_op = color_operand(src_color[15:8], dst_q[15:8], d_sel); + wire [7:0] db_op = color_operand(src_color[23:16], dst_q[23:16], d_sel); + wire [7:0] src_alpha_eff = (src_color[31:24] > 8'h80) ? 8'h80 : src_color[31:24]; + wire [7:0] coef = (c_sel == 2'd0) ? src_alpha_eff : + (c_sel == 2'd1) ? dst_q[31:24] : src_alpha[7:0]; + + logic signed [8:0] diff_r_q, diff_g_q, diff_b_q; + logic signed [17:0] prod_r_q, prod_g_q, prod_b_q; + logic signed [17:0] mcand_r_q, mcand_g_q, mcand_b_q; + logic [7:0] multiplier_q; + logic [2:0] mac_count_q; + logic [7:0] coef_q, d_r_q, d_g_q, d_b_q, alpha_q; + assign in_ready=(state==IDLE)&&!out_valid; assign idle=(state==IDLE)&&!out_valid; assign araddr={src_addr[31:5],5'd0}; + assign arlen=0; assign arsize=3'b101; assign arburst=2'b01; assign arvalid=(state==AR); assign rready=(state==R); + always_ff @(posedge clk or negedge rst_n) begin + if(!rst_n) begin + state<=IDLE;out_valid<=0;out_addr<=0;out_color<=0; + src_addr<=0;src_color<=0;src_alpha<=0;src_be<=4'hF;lane<=0;rdata_q<=0;dst_q<=0; + diff_r_q<=0;diff_g_q<=0;diff_b_q<=0; + prod_r_q<=0;prod_g_q<=0;prod_b_q<=0; + mcand_r_q<=0;mcand_g_q<=0;mcand_b_q<=0; + multiplier_q<=0;mac_count_q<=0; + coef_q<=0;d_r_q<=0;d_g_q<=0;d_b_q<=0;alpha_q<=0; + end + else begin + if(out_valid&&out_ready) out_valid<=0; + case(state) + IDLE: if(in_valid&&in_ready) begin + src_addr<=in_addr;src_color<=in_color;src_alpha<=in_alpha;src_be<=in_be;lane<=in_addr[4:2]; + // A partial write is a destination RMW even when ABE is off. + if(in_alpha[16] || (in_be != 4'hF)) state<=AR; + else begin out_valid<=1;out_addr<=in_addr;out_color<=in_color;end + end + AR: if(arready) state<=R; + R: if(rvalid&&rlast) begin + rdata_q <= rdata; + state<=SEL; + end + SEL: begin + dst_q <= dst_lane; + state<=PREP; + end + PREP: begin + diff_r_q <= $signed({1'b0, ar_op}) - $signed({1'b0, br_op}); + diff_g_q <= $signed({1'b0, ag_op}) - $signed({1'b0, bg_op}); + diff_b_q <= $signed({1'b0, ab_op}) - $signed({1'b0, bb_op}); + coef_q <= coef; + d_r_q <= dr_op; d_g_q <= dg_op; d_b_q <= db_op; + alpha_q <= src_color[31:24]; + state<=MUL; + end + MUL: begin + // Exact signed-difference * unsigned-coefficient multiply, + // implemented as eight short shift/add cycles. Agilex 5's + // inferred 18x18 DSP has a 3.751 ns minimum period in this + // configuration, slower than the 3.225 ns EMIF user clock. + // The emitter is already single-request/in-order, so latency is + // harmless and this avoids both the primitive limit and any + // timing exception. + prod_r_q<=0;prod_g_q<=0;prod_b_q<=0; + mcand_r_q<={{9{diff_r_q[8]}},diff_r_q}; + mcand_g_q<={{9{diff_g_q[8]}},diff_g_q}; + mcand_b_q<={{9{diff_b_q[8]}},diff_b_q}; + multiplier_q<=coef_q;mac_count_q<=0;state<=MAC; + end + MAC: begin + if(multiplier_q[0]) begin + prod_r_q<=prod_r_q+mcand_r_q; + prod_g_q<=prod_g_q+mcand_g_q; + prod_b_q<=prod_b_q+mcand_b_q; + end + mcand_r_q<=mcand_r_q<<<1; + mcand_g_q<=mcand_g_q<<<1; + mcand_b_q<=mcand_b_q<<<1; + multiplier_q<=multiplier_q>>1; + if(mac_count_q==3'd7) state<=SUM; + else mac_count_q<=mac_count_q+1'b1; + end + SUM: begin + out_valid<=1;out_addr<=src_addr; + out_color<=merge_be( + src_alpha[16] + ? {alpha_q,clamp_sum(prod_b_q,d_b_q),clamp_sum(prod_g_q,d_g_q),clamp_sum(prod_r_q,d_r_q)} + : src_color, + dst_q, src_be); + state<=IDLE; + end + endcase + end + end +endmodule diff --git a/rtl/gif_gs/gs_lpddr_map_pkg.sv b/rtl/gif_gs/gs_lpddr_map_pkg.sv new file mode 100644 index 0000000..6a2aa06 --- /dev/null +++ b/rtl/gif_gs/gs_lpddr_map_pkg.sv @@ -0,0 +1,18 @@ +// retroDE_ps2 — gs_lpddr_map_pkg (Ch357 — future-compatible private-LPDDR region map) +// +// Codex-locked LPDDR byte-offset map for the scheduler + persistent-Z path. These are OFFSETS within our PRIVATE reserved +// LPDDR region (fb_base is added at the board boundary). The layout fits the current 384x381 rung AND future 640x480 Z +// WITHOUT relocation, and keeps color / Z / texture ranges provably DISJOINT: +// +// color FB : 0x000000 .. (384x381x4 = 0x08EE00 ; 640x480x4 = 0x12C000 -> both < 0x140000) +// Z buffer : 0x140000 .. (384x381x2 = 0x047700 -> ..0x187700 ; 640x480x2 = 0x096000 -> ..0x1D6000) +// texture : 0x200000 .. (single-region tex cache; 0x1D6000 < 0x200000, so Z never reaches it) +// +// NOTE (Codex): the Z buffer is INTERNAL — it is never exposed as GS local memory, so it uses a simple LINEAR packed-16b +// layout. Only the PSMZ16S VALUE/TEST semantics (clamp16 source, GEQUAL, ZMSK) are authentic; its physical storage swizzle +// is deliberately NOT PSMZ16S-swizzled (we own the buffer). See gs_lpddr_z_rmw.sv. +package gs_lpddr_map_pkg; + localparam logic [31:0] LPDDR_COLOR_BASE = 32'h0000_0000; + localparam logic [31:0] LPDDR_Z_BASE = 32'h0014_0000; + localparam logic [31:0] LPDDR_TEX_BASE = 32'h0020_0000; +endpackage : gs_lpddr_map_pkg diff --git a/rtl/gif_gs/gs_lpddr_rd_arb.sv b/rtl/gif_gs/gs_lpddr_rd_arb.sv index 66ac85c..c5e61ac 100644 --- a/rtl/gif_gs/gs_lpddr_rd_arb.sv +++ b/rtl/gif_gs/gs_lpddr_rd_arb.sv @@ -77,6 +77,20 @@ module gs_lpddr_rd_arb ( output logic s3_rvalid, input logic s3_rready, + // ---- Port 4: destination-color read for SH3 alpha ROP ---- + input logic [29:0] s4_araddr, + input logic [1:0] s4_arburst, + input logic [6:0] s4_arid, + input logic [7:0] s4_arlen, + input logic [2:0] s4_arsize, + input logic s4_arvalid, + output logic s4_arready, + output logic [255:0] s4_rdata, + output logic [1:0] s4_rresp, + output logic s4_rlast, + output logic s4_rvalid, + input logic s4_rready, + // ---- Master out: EMIF read channel ---- output logic [29:0] m_araddr, output logic [1:0] m_arburst, @@ -91,7 +105,7 @@ module gs_lpddr_rd_arb ( input logic m_rvalid, output logic m_rready ); - // grant: 0=idle, 1=s0 scanout, 2=s1 probe, 3=s2 texfill, 4=s3 tile-reload. + // grant: 0=idle, 1=s0 scanout, 2=s1 probe, 3=s2 texfill, 4=s3 reload/Z, 5=s4 alpha destination. // EXPLICIT priority (Ch323, Codex): scanout > tile_reload > probe > texture_fill — i.e. // s0 > s3 > s1 > s2. Render-display (scanout) highest; the render-prep tile reload above // the debug read-probe so a debug read can never starve a render's Z/color reload. @@ -105,26 +119,37 @@ module gs_lpddr_rd_arb ( // transaction committed yet — safe to drop); after AR acceptance the grant is held until // m_rvalid && m_rlast && selected_rready, regardless of how long the read takes. reg ar_done; // AR handshake captured for the active grant -> never abort past here + // Register the terminal R handshake before releasing the grant. Besides + // making the ownership boundary explicit, this removes the selected + // requester's rready mux from the encoded grant register's D cone. The + // old direct clear path was the secondary 310 MHz setup family after the + // wide request-FIFO RAM-enable fanout. + reg response_done_q; reg [21:0] watchdog; // pre-AR only (waiting for m_arready); ~6.7 ms @ 310 MHz dead-bus backstop wire wd_expired = watchdog[21]; wire sel_rready = (grant==3'd1)?s0_rready:(grant==3'd2)?s1_rready: - (grant==3'd3)?s2_rready:(grant==3'd4)?s3_rready:1'b1; + (grant==3'd3)?s2_rready:(grant==3'd4)?s3_rready:(grant==3'd5)?s4_rready:1'b1; always_ff @(posedge clk or negedge rst_n) begin if (!rst_n) begin - grant <= 3'd0; ar_done <= 1'b0; watchdog <= '0; + grant <= 3'd0; ar_done <= 1'b0; response_done_q <= 1'b0; watchdog <= '0; end else if (grant == 3'd0) begin - ar_done <= 1'b0; watchdog <= '0; + ar_done <= 1'b0; response_done_q <= 1'b0; watchdog <= '0; if (s0_arvalid) grant <= 3'd1; // scanout (highest) else if (s3_arvalid) grant <= 3'd4; // tile reload (render-prep) + else if (s4_arvalid) grant <= 3'd5; // alpha destination RMW else if (s1_arvalid) grant <= 3'd2; // read probe (debug) else if (s2_arvalid) grant <= 3'd3; // texture fill (lowest) + end else if (response_done_q) begin + // The selected requester accepted RLAST on the preceding cycle. + // Hold ownership through that handshake, then release here. + grant <= 3'd0; ar_done <= 1'b0; response_done_q <= 1'b0; watchdog <= '0; end else begin if (m_arvalid && m_arready) ar_done <= 1'b1; // AR accepted -> COMMITTED if (m_rvalid && m_rlast && sel_rready) begin - grant <= 3'd0; ar_done <= 1'b0; watchdog <= '0; // response delivered -> release + response_done_q <= 1'b1; watchdog <= '0; // response delivered; release next cycle end else if (!ar_done) begin // still waiting for AR (nothing owed) - if (wd_expired) begin grant <= 3'd0; ar_done <= 1'b0; watchdog <= '0; end + if (wd_expired) begin grant <= 3'd0; ar_done <= 1'b0; response_done_q <= 1'b0; watchdog <= '0; end else watchdog <= watchdog + 22'd1; end // ar_done && response not yet complete: HOLD the grant, never abort. @@ -132,24 +157,30 @@ module gs_lpddr_rd_arb ( end // AR mux - assign m_araddr = (grant==3'd4)?s3_araddr :(grant==3'd3)?s2_araddr :(grant==3'd2)?s1_araddr :s0_araddr; - assign m_arburst = (grant==3'd4)?s3_arburst:(grant==3'd3)?s2_arburst:(grant==3'd2)?s1_arburst:s0_arburst; - assign m_arid = (grant==3'd4)?s3_arid :(grant==3'd3)?s2_arid :(grant==3'd2)?s1_arid :s0_arid; - assign m_arlen = (grant==3'd4)?s3_arlen :(grant==3'd3)?s2_arlen :(grant==3'd2)?s1_arlen :s0_arlen; - assign m_arsize = (grant==3'd4)?s3_arsize :(grant==3'd3)?s2_arsize :(grant==3'd2)?s1_arsize :s0_arsize; - assign m_arvalid = (grant==3'd1)?s0_arvalid:(grant==3'd2)?s1_arvalid:(grant==3'd3)?s2_arvalid:(grant==3'd4)?s3_arvalid:1'b0; - assign s0_arready = (grant==3'd1)?m_arready:1'b0; - assign s1_arready = (grant==3'd2)?m_arready:1'b0; - assign s2_arready = (grant==3'd3)?m_arready:1'b0; - assign s3_arready = (grant==3'd4)?m_arready:1'b0; + assign m_araddr = (grant==3'd5)?s4_araddr :(grant==3'd4)?s3_araddr :(grant==3'd3)?s2_araddr :(grant==3'd2)?s1_araddr :s0_araddr; + assign m_arburst = (grant==3'd5)?s4_arburst:(grant==3'd4)?s3_arburst:(grant==3'd3)?s2_arburst:(grant==3'd2)?s1_arburst:s0_arburst; + assign m_arid = (grant==3'd5)?s4_arid :(grant==3'd4)?s3_arid :(grant==3'd3)?s2_arid :(grant==3'd2)?s1_arid :s0_arid; + assign m_arlen = (grant==3'd5)?s4_arlen :(grant==3'd4)?s3_arlen :(grant==3'd3)?s2_arlen :(grant==3'd2)?s1_arlen :s0_arlen; + assign m_arsize = (grant==3'd5)?s4_arsize :(grant==3'd4)?s3_arsize :(grant==3'd3)?s2_arsize :(grant==3'd2)?s1_arsize :s0_arsize; + // Once an address is accepted, do not expose another address from the + // selected requester while its response (or registered release) is active. + // This also makes the deliberate one-cycle release bubble AXI-safe. + wire ar_open = !ar_done && !response_done_q; + assign m_arvalid = ar_open && ((grant==3'd1)?s0_arvalid:(grant==3'd2)?s1_arvalid:(grant==3'd3)?s2_arvalid:(grant==3'd4)?s3_arvalid:(grant==3'd5)?s4_arvalid:1'b0); + assign s0_arready = (ar_open && grant==3'd1)?m_arready:1'b0; + assign s1_arready = (ar_open && grant==3'd2)?m_arready:1'b0; + assign s2_arready = (ar_open && grant==3'd3)?m_arready:1'b0; + assign s3_arready = (ar_open && grant==3'd4)?m_arready:1'b0; + assign s4_arready = (ar_open && grant==3'd5)?m_arready:1'b0; // R demux (idle: rready=1 drains any stale/late response) - assign s0_rdata=m_rdata; assign s1_rdata=m_rdata; assign s2_rdata=m_rdata; assign s3_rdata=m_rdata; - assign s0_rresp=m_rresp; assign s1_rresp=m_rresp; assign s2_rresp=m_rresp; assign s3_rresp=m_rresp; - assign s0_rlast=m_rlast; assign s1_rlast=m_rlast; assign s2_rlast=m_rlast; assign s3_rlast=m_rlast; + assign s0_rdata=m_rdata; assign s1_rdata=m_rdata; assign s2_rdata=m_rdata; assign s3_rdata=m_rdata; assign s4_rdata=m_rdata; + assign s0_rresp=m_rresp; assign s1_rresp=m_rresp; assign s2_rresp=m_rresp; assign s3_rresp=m_rresp; assign s4_rresp=m_rresp; + assign s0_rlast=m_rlast; assign s1_rlast=m_rlast; assign s2_rlast=m_rlast; assign s3_rlast=m_rlast; assign s4_rlast=m_rlast; assign s0_rvalid = (grant==3'd1)?m_rvalid:1'b0; assign s1_rvalid = (grant==3'd2)?m_rvalid:1'b0; assign s2_rvalid = (grant==3'd3)?m_rvalid:1'b0; assign s3_rvalid = (grant==3'd4)?m_rvalid:1'b0; - assign m_rready = (grant==3'd1)?s0_rready:(grant==3'd2)?s1_rready:(grant==3'd3)?s2_rready:(grant==3'd4)?s3_rready:1'b1; + assign s4_rvalid = (grant==3'd5)?m_rvalid:1'b0; + assign m_rready = (grant==3'd1)?s0_rready:(grant==3'd2)?s1_rready:(grant==3'd3)?s2_rready:(grant==3'd4)?s3_rready:(grant==3'd5)?s4_rready:1'b1; endmodule diff --git a/rtl/gif_gs/gs_lpddr_rd_probe.sv b/rtl/gif_gs/gs_lpddr_rd_probe.sv index c2efc48..b93d500 100644 --- a/rtl/gif_gs/gs_lpddr_rd_probe.sv +++ b/rtl/gif_gs/gs_lpddr_rd_probe.sv @@ -58,7 +58,11 @@ module gs_lpddr_rd_probe #( reg [2:0] rd_lane; // which 32-bit lane of the 256-bit beat (addr[4:2]) - typedef enum logic [1:0] { S_IDLE, S_AR, S_R } st_t; + // Capture the complete EMIF beat before lane selection. Selecting one of + // eight 32-bit lanes directly from the EMIF response into rd_data placed a + // two-level mux plus long EMIF routing in one 310 MHz cycle. + logic [255:0] rdata_q; + typedef enum logic [1:0] { S_IDLE, S_AR, S_R, S_SEL } st_t; st_t st; always_ff @(posedge axi_clk) begin @@ -72,6 +76,7 @@ module gs_lpddr_rd_probe #( rd_data <= 32'd0; rd_busy <= 1'b0; rd_lane <= 3'd0; + rdata_q <= 256'd0; end else begin pulse_sync <= {pulse_sync[1:0], rd_pulse}; @@ -95,20 +100,24 @@ module gs_lpddr_rd_probe #( S_R: begin if (rvalid) begin rready <= 1'b0; + rdata_q <= rdata; + st <= S_SEL; + end + end + S_SEL: begin case (rd_lane) - 3'd0: rd_data <= rdata[31:0]; - 3'd1: rd_data <= rdata[63:32]; - 3'd2: rd_data <= rdata[95:64]; - 3'd3: rd_data <= rdata[127:96]; - 3'd4: rd_data <= rdata[159:128]; - 3'd5: rd_data <= rdata[191:160]; - 3'd6: rd_data <= rdata[223:192]; - default: rd_data <= rdata[255:224]; + 3'd0: rd_data <= rdata_q[31:0]; + 3'd1: rd_data <= rdata_q[63:32]; + 3'd2: rd_data <= rdata_q[95:64]; + 3'd3: rd_data <= rdata_q[127:96]; + 3'd4: rd_data <= rdata_q[159:128]; + 3'd5: rd_data <= rdata_q[191:160]; + 3'd6: rd_data <= rdata_q[223:192]; + default: rd_data <= rdata_q[255:224]; endcase rd_busy <= 1'b0; rd_done <= ~rd_done; st <= S_IDLE; - end end default: st <= S_IDLE; endcase diff --git a/rtl/gif_gs/gs_lpddr_scanout_lb.sv b/rtl/gif_gs/gs_lpddr_scanout_lb.sv index b93db77..35c48f6 100644 --- a/rtl/gif_gs/gs_lpddr_scanout_lb.sv +++ b/rtl/gif_gs/gs_lpddr_scanout_lb.sv @@ -4,8 +4,8 @@ // LINE-BUFFER LPDDR4B scanout — the architectural successor to the whole-frame // cache (gs_lpddr_scanout). Instead of mirroring the entire framebuffer in // on-chip RAM (which defeats the point of putting the FB in LPDDR), this holds -// just TWO scanlines: it displays row L from one buffer while prefetching row -// L+1 into the other. On-chip cost is O(width), not O(width*height). +// just two scanlines (three with the optional Ch438 low-pass): it displays row +// L while prefetching row L+1. On-chip cost is O(width), not O(width*height). // // NARROW SCOPE (Ch321): the 128x128 PSMCT16 demo. The frame is LINEAR (the GS // writer mirrors the rasterizer's linear flush addresses), display window at @@ -30,7 +30,39 @@ module gs_lpddr_scanout_lb #( // Ch327a — PSMCT32 (ABGR8888, 8 px/256-bit beat) vs the original PSMCT16 (RGBA5551, // 16 px/beat). The Ch326 LPDDR-only spill framebuffer is PSMCT32 @ COLOR_SPILL_BASE, so the // line-buffer must decode it — NOT a config flip of the Ch321 PSMCT16/FB-at-0 path. - parameter bit PSMCT32 = 1'b0 + parameter bit PSMCT32 = 1'b0, + // Ch418 — the captured SH3 DISPLAY2 is 512 source pixels wide + // (FBW=8) and MAGH=4, i.e. five VCKs per source sample. The board + // emits a 640-pixel active line, so reducing that authentic 2560-VCK + // display domain to VGA requires the exact nearest-neighbour map + // source_x = floor(display_x * 4 / 5). + // Keep this opt-in: legacy demos and directed scanout tests remain 1:1. + // The implementation below is a five-state phase accumulator, not an + // inferred divider, and therefore adds no wide arithmetic timing cone. + parameter bit H_STRETCH_5_TO_4 = 1'b0, + // Captured SH3 interlace presentation: DISPLAY2.DH=895 represents + // 448 source lines, beginning at DISPFB2.DBY=32. Mapping those lines + // onto the board's 480-line active raster is source_y = + // V_SOURCE_START + floor(display_y*14/15). As with horizontal scale, + // this remains opt-in and uses a tiny phase accumulator. + parameter int V_SOURCE_START = 0, + parameter bit V_STRETCH_15_TO_14 = 1'b0, + // Ch436 — optional linear reconstruction between the two resident source + // rows. The 15:14 mapper already keeps row L and L+1 in the alternating + // line buffers, so this adds no framebuffer traffic or line storage. + parameter bit V_LINEAR_FILTER = 1'b0, + // Ch437 — horizontal linear reconstruction for the 5:4 presentation map. + // A two-beat register cache provides x and x+1 from each resident row while + // retaining ONE read port per physical line buffer. H_SOURCE_PIXELS is the + // active source width (512 for SH3 DISPLAY2); zero means the physical stride. + parameter bit H_LINEAR_FILTER = 1'b0, + parameter int H_SOURCE_PIXELS = 0, + // Ch438 — separable [1 2 1]/4 low-pass reconstruction in source space. + // Three rotating line buffers retain rows y-1/y/y+1; the horizontal taps + // reuse the Ch437 two-beat cache, so every physical RAM still has exactly + // one registered read port. This is mutually exclusive with the Ch436/437 + // linear filters in the SH3 profile and uses only adds plus shifts. + parameter bit BINOMIAL_3X3_FILTER = 1'b0 )( // ---- AXI read clock domain (emif_clk) ---- input logic axi_clk, @@ -75,9 +107,11 @@ module gs_lpddr_scanout_lb #( // burst (arlen=ROW_BEATS-1) was untested and garbled on hardware. assign arsize = 3'b101; // 32 bytes - // Two line buffers, ROW_BEATS x 256-bit each (one display row). + // Two line buffers for legacy/linear scanout; Ch438 enables a third so the + // previous, current, and next source rows are resident simultaneously. logic [255:0] lb0 [0:ROW_BEATS-1]; logic [255:0] lb1 [0:ROW_BEATS-1]; + logic [255:0] lb2 [0:ROW_BEATS-1]; // ================= video side (video_clk) ================= // No miss-prone request toggle. The video side just exposes the current @@ -85,81 +119,585 @@ module gs_lpddr_scanout_lb #( // and staying one row ahead (see below). disp_row_v resets on vsync. logic [$clog2(N_ROWS):0] disp_row_v; logic [2:0] fs_sync_v; - wire fs_edge_v = (fs_sync_v[2] != fs_sync_v[1]); + wire fs_edge_v = fs_sync_v[1] && !fs_sync_v[2]; // RISING edge only: one reset per frame_start pulse // The buffer holding display line L is L&1 (row L is fetched into L&1). Select // it DIRECTLY from pixel_y[0] (tracks the current pixel) — a separately-registered // "disp_buf" lags by one cycle and corrupts col 0 of each line. - wire disp_buf = pixel_y[0]; + logic [$clog2(N_ROWS):0] stretch_src_y_q; + logic [3:0] stretch_vphase_q; + localparam int V_SOURCE_BUF = V_SOURCE_START % 3; + logic [1:0] stretch_buf_q; + logic in_window_v_q; + always_ff @(posedge video_clk) begin + if (!enable) begin + stretch_src_y_q <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + stretch_vphase_q <= 4'd0; + stretch_buf_q <= 2'(V_SOURCE_BUF); + in_window_v_q <= 1'b0; + end else begin + in_window_v_q <= in_window; + if (fs_edge_v) begin + stretch_src_y_q <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + stretch_vphase_q <= 4'd0; + stretch_buf_q <= 2'(V_SOURCE_BUF); + end else if (V_STRETCH_15_TO_14 && in_window_v_q && !in_window) begin + // End of one output line. phase 0 repeats the current + // source line once; phases 14..1 advance while counting + // down, giving 15 output lines per 14 source lines. + if (stretch_vphase_q == 4'd0) + stretch_vphase_q <= 4'd14; + else begin + stretch_src_y_q <= stretch_src_y_q + 1'b1; + stretch_vphase_q <= stretch_vphase_q - 1'b1; + stretch_buf_q <= (stretch_buf_q == 2'd2) ? 2'd0 + : stretch_buf_q + 1'b1; + end + end + end + end + wire [$clog2(N_ROWS):0] scan_y = V_STRETCH_15_TO_14 + ? stretch_src_y_q + : ($clog2(N_ROWS)+1)'(pixel_y); + wire disp_buf = scan_y[0]; + wire [1:0] scan_buf3 = stretch_buf_q; always_ff @(posedge video_clk) begin if (!enable) begin - disp_row_v <= '0; fs_sync_v <= 3'd0; + disp_row_v <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); fs_sync_v <= 3'd0; end else begin fs_sync_v <= {fs_sync_v[1:0], frame_start}; - if (fs_edge_v) disp_row_v <= '0; - else if (in_window && (pixel_y < N_ROWS)) disp_row_v <= ($clog2(N_ROWS)+1)'(pixel_y); + if (fs_edge_v) disp_row_v <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + // Publish a stretch-row advance during horizontal blanking, not + // only after the first active pixel. The AXI side then has the + // full blank interval to replace the retired parity buffer with + // row L+1 before linear scanout needs it. + else if (scan_y < ($clog2(N_ROWS)+1)'(N_ROWS)) + disp_row_v <= scan_y; end end - // Registered (sync-read) pixel: pick buffer + beat + within-beat lane from pixel_x. - // PSMCT32: 8 px/256-bit beat -> beat = pixel_x>>3, lane = pixel_x[2:0] (32-bit). - // PSMCT16: 16 px/beat -> beat = pixel_x>>4, lane = pixel_x[3:0] (16-bit). + // Ch418 horizontal presentation mapper. At output x=0 the state is + // {src=0,phase=0}; successive active clocks produce source columns + // 0,0,1,2,3,4,4,5,6,7,...,511 + // for output columns 0..639. Blanking resets the state before each line. + // phase==0 is the sole repeat; all other phases advance source_x. This is + // algebraically identical to floor(x*4/5), using only a 3-bit decrement + // and a 12-bit increment. + logic [11:0] stretch_src_x_q; + logic [2:0] stretch_phase_q; + always_ff @(posedge video_clk) begin + if (!enable || !in_window) begin + stretch_src_x_q <= 12'd0; + stretch_phase_q <= 3'd0; + end else if (H_STRETCH_5_TO_4) begin + if (stretch_phase_q == 3'd0) begin + stretch_phase_q <= 3'd4; + end else begin + stretch_src_x_q <= stretch_src_x_q + 12'd1; + stretch_phase_q <= stretch_phase_q - 3'd1; + end + end + end + wire [11:0] scan_x = H_STRETCH_5_TO_4 ? stretch_src_x_q : pixel_x; + + // Registered (sync-read) pixel: pick buffer + beat + within-beat lane from scan_x. + // PSMCT32: 8 px/256-bit beat -> beat = scan_x>>3, lane = scan_x[2:0] (32-bit). + // PSMCT16: 16 px/beat -> beat = scan_x>>4, lane = scan_x[3:0] (16-bit). localparam int PXSH = PSMCT32 ? 3 : 4; // px-per-beat shift localparam int PX_PER_ROW = PSMCT32 ? (STRIDE_BYTES/4) : (STRIDE_BYTES/2); - wire [RB_BITS-1:0] col_beat = pixel_x[RB_BITS+PXSH-1 -: RB_BITS]; - wire [3:0] col_lane = PSMCT32 ? {1'b0, pixel_x[2:0]} : pixel_x[3:0]; - logic [255:0] word_q; logic [3:0] lane_q; logic in_q; - always_ff @(posedge video_clk) begin - word_q <= disp_buf ? lb1[col_beat] : lb0[col_beat]; - lane_q <= col_lane; - in_q <= in_window && (pixel_x < PX_PER_ROW) && (pixel_y < N_ROWS); - end + localparam int H_SOURCE_PX = (H_SOURCE_PIXELS != 0) ? H_SOURCE_PIXELS : PX_PER_ROW; + localparam int H_LAST_BEAT = (H_SOURCE_PX-1) >> PXSH; + wire [RB_BITS-1:0] col_beat = scan_x[RB_BITS+PXSH-1 -: RB_BITS]; + wire [3:0] col_lane = PSMCT32 ? {1'b0, scan_x[2:0]} : scan_x[3:0]; + logic [255:0] prv_word_q, cur_word_q, nxt_word_q; + // Only lane zero of the lookahead beat can be selected: x+1 crosses a + // beat exactly when x is its final lane. Keep 32 bits, not another pair + // of 256-bit payload registers. + logic [31:0] prv_left_px_q, cur_left_px_q, nxt_left_px_q; + logic [31:0] prv_look_px_q, cur_look_px_q, nxt_look_px_q; + logic [3:0] lane_q, vphase_q; + logic [2:0] hphase_q; + logic first_source_x_q, last_source_x_q; + logic in_q; + generate + if (H_LINEAR_FILTER || BINOMIAL_3X3_FILTER) begin : g_hlinear_cache + // Slot parity equals beat parity. Horizontal blanking continually + // primes beats 0 and 1 after the vertical row selector settles. + // On entry to each subsequent beat, the retired slot is refilled + // with beat+1. No second line-buffer read port is required. + logic [255:0] lb0_cache0_q, lb0_cache1_q; + logic [255:0] lb1_cache0_q, lb1_cache1_q; + logic [255:0] lb2_cache0_q, lb2_cache1_q; + logic blank_prime_q; + logic [RB_BITS-1:0] active_beat_q; + logic [RB_BITS-1:0] video_rd_addr_q, video_rd_tag_q; + logic video_rd_req_q, video_rd_valid_q; + logic [255:0] lb0_video_rd_q, lb1_video_rd_q, lb2_video_rd_q; + + // Keep the inferred line-buffer read ports canonical: exactly one + // unconditional registered address and one registered data output + // per physical array. The prior conditional multi-address reads + // made Quartus expand both arrays into 30,720 flip-flops. + always_ff @(posedge video_clk) begin + lb0_video_rd_q <= lb0[video_rd_addr_q]; + lb1_video_rd_q <= lb1[video_rd_addr_q]; + lb2_video_rd_q <= lb2[video_rd_addr_q]; + video_rd_tag_q <= video_rd_addr_q; + video_rd_valid_q <= video_rd_req_q; + end + + always_ff @(posedge video_clk) begin + // The registered RAM response arrives with its beat tag two + // control edges after the request. Store physical lb0/lb1 + // independently; row parity is selected only at pixel output. + if (video_rd_valid_q) begin + if (video_rd_tag_q[0]) begin + lb0_cache1_q <= lb0_video_rd_q; + lb1_cache1_q <= lb1_video_rd_q; + lb2_cache1_q <= lb2_video_rd_q; + end else begin + lb0_cache0_q <= lb0_video_rd_q; + lb1_cache0_q <= lb1_video_rd_q; + lb2_cache0_q <= lb2_video_rd_q; + end + end + + if (!enable) begin + blank_prime_q <= 1'b0; + active_beat_q <= '0; + video_rd_addr_q <= '0; + video_rd_req_q <= 1'b0; + in_q <= 1'b0; + end else if (!in_window) begin + // Alternate requests for beats 0 and 1 throughout blank. + // VGA supplies far more than the four clocks needed for + // both registered responses to settle into the cache. + video_rd_addr_q <= blank_prime_q ? RB_BITS'(1) : '0; + video_rd_req_q <= 1'b1; + blank_prime_q <= ~blank_prime_q; + active_beat_q <= '0; + in_q <= 1'b0; + end else begin + video_rd_req_q <= 1'b0; + // Source x and x+1 come from the two cached beats. The + // current beat is selected by parity; the opposite slot + // is its already-fetched successor. + if (BINOMIAL_3X3_FILTER) begin + // Select the three rotating physical rows. The first + // displayed source row clamps y-1 to y; the final row + // similarly clamps y+1. For a lane-zero sample the + // opposite cache slot still contains the preceding + // beat; by the time lane seven needs x+1 it contains + // the newly fetched successor beat. + case (scan_buf3) + 2'd0: begin + prv_word_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb0_cache1_q : lb0_cache0_q) + : (col_beat[0] ? lb2_cache1_q : lb2_cache0_q); + cur_word_q <= col_beat[0] ? lb0_cache1_q : lb0_cache0_q; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb0_cache1_q : lb0_cache0_q) + : (col_beat[0] ? lb1_cache1_q : lb1_cache0_q); + prv_left_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb0_cache0_q[255:224] : lb0_cache1_q[255:224]) + : (col_beat[0] ? lb2_cache0_q[255:224] : lb2_cache1_q[255:224]); + cur_left_px_q <= col_beat[0] ? lb0_cache0_q[255:224] : lb0_cache1_q[255:224]; + nxt_left_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb0_cache0_q[255:224] : lb0_cache1_q[255:224]) + : (col_beat[0] ? lb1_cache0_q[255:224] : lb1_cache1_q[255:224]); + prv_look_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]) + : (col_beat[0] ? lb2_cache0_q[31:0] : lb2_cache1_q[31:0]); + cur_look_px_q <= col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]; + nxt_look_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]) + : (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]); + end + 2'd1: begin + prv_word_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb1_cache1_q : lb1_cache0_q) + : (col_beat[0] ? lb0_cache1_q : lb0_cache0_q); + cur_word_q <= col_beat[0] ? lb1_cache1_q : lb1_cache0_q; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb1_cache1_q : lb1_cache0_q) + : (col_beat[0] ? lb2_cache1_q : lb2_cache0_q); + prv_left_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb1_cache0_q[255:224] : lb1_cache1_q[255:224]) + : (col_beat[0] ? lb0_cache0_q[255:224] : lb0_cache1_q[255:224]); + cur_left_px_q <= col_beat[0] ? lb1_cache0_q[255:224] : lb1_cache1_q[255:224]; + nxt_left_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb1_cache0_q[255:224] : lb1_cache1_q[255:224]) + : (col_beat[0] ? lb2_cache0_q[255:224] : lb2_cache1_q[255:224]); + prv_look_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]) + : (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]); + cur_look_px_q <= col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]; + nxt_look_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]) + : (col_beat[0] ? lb2_cache0_q[31:0] : lb2_cache1_q[31:0]); + end + default: begin + prv_word_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb2_cache1_q : lb2_cache0_q) + : (col_beat[0] ? lb1_cache1_q : lb1_cache0_q); + cur_word_q <= col_beat[0] ? lb2_cache1_q : lb2_cache0_q; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb2_cache1_q : lb2_cache0_q) + : (col_beat[0] ? lb0_cache1_q : lb0_cache0_q); + prv_left_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb2_cache0_q[255:224] : lb2_cache1_q[255:224]) + : (col_beat[0] ? lb1_cache0_q[255:224] : lb1_cache1_q[255:224]); + cur_left_px_q <= col_beat[0] ? lb2_cache0_q[255:224] : lb2_cache1_q[255:224]; + nxt_left_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb2_cache0_q[255:224] : lb2_cache1_q[255:224]) + : (col_beat[0] ? lb0_cache0_q[255:224] : lb0_cache1_q[255:224]); + prv_look_px_q <= (scan_y <= ($clog2(N_ROWS)+1)'(V_SOURCE_START)) + ? (col_beat[0] ? lb2_cache0_q[31:0] : lb2_cache1_q[31:0]) + : (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]); + cur_look_px_q <= col_beat[0] ? lb2_cache0_q[31:0] : lb2_cache1_q[31:0]; + nxt_look_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb2_cache0_q[31:0] : lb2_cache1_q[31:0]) + : (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]); + end + endcase + end else if (disp_buf) begin + prv_word_q <= '0; + cur_word_q <= col_beat[0] ? lb1_cache1_q : lb1_cache0_q; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb1_cache1_q : lb1_cache0_q) + : (col_beat[0] ? lb0_cache1_q : lb0_cache0_q); + cur_look_px_q <= col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]; + nxt_look_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]) + : (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]); + end else begin + prv_word_q <= '0; + cur_word_q <= col_beat[0] ? lb0_cache1_q : lb0_cache0_q; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb0_cache1_q : lb0_cache0_q) + : (col_beat[0] ? lb1_cache1_q : lb1_cache0_q); + cur_look_px_q <= col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]; + nxt_look_px_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? (col_beat[0] ? lb0_cache0_q[31:0] : lb0_cache1_q[31:0]) + : (col_beat[0] ? lb1_cache0_q[31:0] : lb1_cache1_q[31:0]); + end + if (!BINOMIAL_3X3_FILTER) begin + prv_left_px_q <= '0; + cur_left_px_q <= '0; + nxt_left_px_q <= '0; + prv_look_px_q <= '0; + end + lane_q <= col_lane; + vphase_q <= stretch_vphase_q; + hphase_q <= stretch_phase_q; + first_source_x_q <= (scan_x == 12'd0); + last_source_x_q <= (scan_x >= 12'(H_SOURCE_PX-1)); + in_q <= (pixel_x < PX_PER_ROW) && (pixel_y < N_ROWS); + + if ((col_beat != active_beat_q) && + (col_beat < RB_BITS'(H_LAST_BEAT))) begin + active_beat_q <= col_beat; + video_rd_addr_q <= col_beat + 1'b1; + video_rd_req_q <= 1'b1; + end + end + end + end else begin : g_direct_read + always_ff @(posedge video_clk) begin + // One video read from each physical buffer supplies the current row + // and its already-prefetched successor in parallel. Select them in + // this same registered stage so parity cannot lag at a line boundary. + if (disp_buf) begin + prv_word_q <= '0; + cur_word_q <= lb1[col_beat]; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? lb1[col_beat] : lb0[col_beat]; + end else begin + prv_word_q <= '0; + cur_word_q <= lb0[col_beat]; + nxt_word_q <= (scan_y + 1'b1 >= ($clog2(N_ROWS)+1)'(N_ROWS)) + ? lb0[col_beat] : lb1[col_beat]; + end + cur_look_px_q <= '0; + nxt_look_px_q <= '0; + prv_left_px_q <= '0; + cur_left_px_q <= '0; + nxt_left_px_q <= '0; + prv_look_px_q <= '0; + lane_q <= col_lane; + vphase_q <= stretch_vphase_q; + hphase_q <= stretch_phase_q; + first_source_x_q <= 1'b1; + last_source_x_q <= 1'b1; + in_q <= in_window && (pixel_x < PX_PER_ROW) && (pixel_y < N_ROWS); + end + end + endgenerate + // PSMCT32 ABGR8888 (r=[7:0],g=[15:8],b=[23:16]) — matches gs_lpddr_scanout (frame-cache). - wire [31:0] px32 = word_q[lane_q[2:0]*32 +: 32]; // 3-bit lane: always in-range (0..224) - wire [7:0] r32 = px32[7:0], g32 = px32[15:8], b32 = px32[23:16]; + wire [31:0] px32_prv = prv_word_q[lane_q[2:0]*32 +: 32]; + wire [31:0] px32_cur = cur_word_q[lane_q[2:0]*32 +: 32]; + wire [31:0] px32_nxt = nxt_word_q[lane_q[2:0]*32 +: 32]; + wire [31:0] px32_prv_left = first_source_x_q ? px32_prv : + ((lane_q[2:0] == 3'd0) + ? prv_left_px_q + : prv_word_q[(lane_q[2:0]-1'b1)*32 +: 32]); + wire [31:0] px32_cur_left = first_source_x_q ? px32_cur : + ((lane_q[2:0] == 3'd0) + ? cur_left_px_q + : cur_word_q[(lane_q[2:0]-1'b1)*32 +: 32]); + wire [31:0] px32_nxt_left = first_source_x_q ? px32_nxt : + ((lane_q[2:0] == 3'd0) + ? nxt_left_px_q + : nxt_word_q[(lane_q[2:0]-1'b1)*32 +: 32]); + wire [31:0] px32_prv_right = last_source_x_q ? px32_prv : + ((lane_q[2:0] == 3'd7) + ? prv_look_px_q + : prv_word_q[(lane_q[2:0]+1'b1)*32 +: 32]); + wire [31:0] px32_cur_right = last_source_x_q ? px32_cur : + ((lane_q[2:0] == 3'd7) + ? cur_look_px_q + : cur_word_q[(lane_q[2:0]+1'b1)*32 +: 32]); + wire [31:0] px32_nxt_right = last_source_x_q ? px32_nxt : + ((lane_q[2:0] == 3'd7) + ? nxt_look_px_q + : nxt_word_q[(lane_q[2:0]+1'b1)*32 +: 32]); // PSMCT16 RGBA5551 5-bit lanes expanded to 8-bit. - wire [15:0] px16 = word_q[lane_q*16 +: 16]; - wire [4:0] r5 = px16[4:0], g5 = px16[9:5], b5 = px16[14:10]; - assign r = !in_q ? 8'd0 : (PSMCT32 ? r32 : {r5, r5[4:2]}); - assign g = !in_q ? 8'd0 : (PSMCT32 ? g32 : {g5, g5[4:2]}); - assign b = !in_q ? 8'd0 : (PSMCT32 ? b32 : {b5, b5[4:2]}); + wire [15:0] px16_prv = prv_word_q[lane_q*16 +: 16]; + wire [15:0] px16_cur = cur_word_q[lane_q*16 +: 16]; + wire [15:0] px16_nxt = nxt_word_q[lane_q*16 +: 16]; + wire [15:0] px16_prv_left = first_source_x_q ? px16_prv : + ((lane_q == 4'd0) + ? prv_left_px_q[15:0] + : prv_word_q[(lane_q-1'b1)*16 +: 16]); + wire [15:0] px16_cur_left = first_source_x_q ? px16_cur : + ((lane_q == 4'd0) + ? cur_left_px_q[15:0] + : cur_word_q[(lane_q-1'b1)*16 +: 16]); + wire [15:0] px16_nxt_left = first_source_x_q ? px16_nxt : + ((lane_q == 4'd0) + ? nxt_left_px_q[15:0] + : nxt_word_q[(lane_q-1'b1)*16 +: 16]); + wire [15:0] px16_prv_right = last_source_x_q ? px16_prv : + ((lane_q == 4'd15) + ? prv_look_px_q[15:0] + : prv_word_q[(lane_q+1'b1)*16 +: 16]); + wire [15:0] px16_cur_right = last_source_x_q ? px16_cur : + ((lane_q == 4'd15) + ? cur_look_px_q[15:0] + : cur_word_q[(lane_q+1'b1)*16 +: 16]); + wire [15:0] px16_nxt_right = last_source_x_q ? px16_nxt : + ((lane_q == 4'd15) + ? nxt_look_px_q[15:0] + : nxt_word_q[(lane_q+1'b1)*16 +: 16]); + wire [7:0] r16_cur = {px16_cur[4:0], px16_cur[4:2]}; + wire [7:0] g16_cur = {px16_cur[9:5], px16_cur[9:7]}; + wire [7:0] b16_cur = {px16_cur[14:10], px16_cur[14:12]}; + wire [7:0] r16_nxt = {px16_nxt[4:0], px16_nxt[4:2]}; + wire [7:0] g16_nxt = {px16_nxt[9:5], px16_nxt[9:7]}; + wire [7:0] b16_nxt = {px16_nxt[14:10], px16_nxt[14:12]}; + wire [7:0] r16_prv = {px16_prv[4:0], px16_prv[4:2]}; + wire [7:0] g16_prv = {px16_prv[9:5], px16_prv[9:7]}; + wire [7:0] b16_prv = {px16_prv[14:10], px16_prv[14:12]}; + wire [7:0] r16_prv_left = {px16_prv_left[4:0], px16_prv_left[4:2]}; + wire [7:0] g16_prv_left = {px16_prv_left[9:5], px16_prv_left[9:7]}; + wire [7:0] b16_prv_left = {px16_prv_left[14:10], px16_prv_left[14:12]}; + wire [7:0] r16_cur_left = {px16_cur_left[4:0], px16_cur_left[4:2]}; + wire [7:0] g16_cur_left = {px16_cur_left[9:5], px16_cur_left[9:7]}; + wire [7:0] b16_cur_left = {px16_cur_left[14:10], px16_cur_left[14:12]}; + wire [7:0] r16_nxt_left = {px16_nxt_left[4:0], px16_nxt_left[4:2]}; + wire [7:0] g16_nxt_left = {px16_nxt_left[9:5], px16_nxt_left[9:7]}; + wire [7:0] b16_nxt_left = {px16_nxt_left[14:10], px16_nxt_left[14:12]}; + wire [7:0] r16_prv_right = {px16_prv_right[4:0], px16_prv_right[4:2]}; + wire [7:0] g16_prv_right = {px16_prv_right[9:5], px16_prv_right[9:7]}; + wire [7:0] b16_prv_right = {px16_prv_right[14:10], px16_prv_right[14:12]}; + wire [7:0] r16_cur_right = {px16_cur_right[4:0], px16_cur_right[4:2]}; + wire [7:0] g16_cur_right = {px16_cur_right[9:5], px16_cur_right[9:7]}; + wire [7:0] b16_cur_right = {px16_cur_right[14:10], px16_cur_right[14:12]}; + wire [7:0] r16_nxt_right = {px16_nxt_right[4:0], px16_nxt_right[4:2]}; + wire [7:0] g16_nxt_right = {px16_nxt_right[9:5], px16_nxt_right[9:7]}; + wire [7:0] b16_nxt_right = {px16_nxt_right[14:10], px16_nxt_right[14:12]}; + + function automatic logic [7:0] blend15( + input logic [7:0] cur, + input logic [7:0] nxt, + input logic [3:0] frac + ); + logic [12:0] weighted; + begin + if (frac == 4'd0) + blend15 = cur; + else begin + weighted = ((4'd15-frac) * cur) + (frac * nxt) + 13'd7; + blend15 = weighted / 13'd15; + end + end + endfunction + + function automatic logic [7:0] blend5( + input logic [7:0] left, + input logic [7:0] right, + input logic [2:0] frac + ); + logic [10:0] weighted; + begin + if (frac == 3'd0) + blend5 = left; + else begin + weighted = ((3'd5-frac) * left) + (frac * right) + 11'd2; + blend5 = weighted / 11'd5; + end + end + endfunction + + function automatic logic [7:0] binom3( + input logic [7:0] left, + input logic [7:0] center, + input logic [7:0] right + ); + logic [9:0] weighted; + begin + weighted = {2'b0,left} + {1'b0,center,1'b0} + {2'b0,right} + 10'd2; + binom3 = weighted[9:2]; + end + endfunction + + wire [7:0] prv_r = PSMCT32 ? px32_prv[7:0] : r16_prv; + wire [7:0] prv_g = PSMCT32 ? px32_prv[15:8] : g16_prv; + wire [7:0] prv_b = PSMCT32 ? px32_prv[23:16] : b16_prv; + wire [7:0] cur_r = PSMCT32 ? px32_cur[7:0] : r16_cur; + wire [7:0] cur_g = PSMCT32 ? px32_cur[15:8] : g16_cur; + wire [7:0] cur_b = PSMCT32 ? px32_cur[23:16] : b16_cur; + wire [7:0] nxt_r = PSMCT32 ? px32_nxt[7:0] : r16_nxt; + wire [7:0] nxt_g = PSMCT32 ? px32_nxt[15:8] : g16_nxt; + wire [7:0] nxt_b = PSMCT32 ? px32_nxt[23:16] : b16_nxt; + wire [7:0] prv_left_r = PSMCT32 ? px32_prv_left[7:0] : r16_prv_left; + wire [7:0] prv_left_g = PSMCT32 ? px32_prv_left[15:8] : g16_prv_left; + wire [7:0] prv_left_b = PSMCT32 ? px32_prv_left[23:16] : b16_prv_left; + wire [7:0] cur_left_r = PSMCT32 ? px32_cur_left[7:0] : r16_cur_left; + wire [7:0] cur_left_g = PSMCT32 ? px32_cur_left[15:8] : g16_cur_left; + wire [7:0] cur_left_b = PSMCT32 ? px32_cur_left[23:16] : b16_cur_left; + wire [7:0] nxt_left_r = PSMCT32 ? px32_nxt_left[7:0] : r16_nxt_left; + wire [7:0] nxt_left_g = PSMCT32 ? px32_nxt_left[15:8] : g16_nxt_left; + wire [7:0] nxt_left_b = PSMCT32 ? px32_nxt_left[23:16] : b16_nxt_left; + wire [7:0] prv_right_r = PSMCT32 ? px32_prv_right[7:0] : r16_prv_right; + wire [7:0] prv_right_g = PSMCT32 ? px32_prv_right[15:8] : g16_prv_right; + wire [7:0] prv_right_b = PSMCT32 ? px32_prv_right[23:16] : b16_prv_right; + wire [7:0] cur_right_r = PSMCT32 ? px32_cur_right[7:0] : r16_cur_right; + wire [7:0] cur_right_g = PSMCT32 ? px32_cur_right[15:8] : g16_cur_right; + wire [7:0] cur_right_b = PSMCT32 ? px32_cur_right[23:16] : b16_cur_right; + wire [7:0] nxt_right_r = PSMCT32 ? px32_nxt_right[7:0] : r16_nxt_right; + wire [7:0] nxt_right_g = PSMCT32 ? px32_nxt_right[15:8] : g16_nxt_right; + wire [7:0] nxt_right_b = PSMCT32 ? px32_nxt_right[23:16] : b16_nxt_right; + wire [3:0] filter_frac = V_LINEAR_FILTER ? vphase_q : 4'd0; + wire [2:0] hfilter_frac = H_LINEAR_FILTER ? hphase_q : 3'd0; + wire [7:0] left_r = blend15(cur_r, nxt_r, filter_frac); + wire [7:0] left_g = blend15(cur_g, nxt_g, filter_frac); + wire [7:0] left_b = blend15(cur_b, nxt_b, filter_frac); + wire [7:0] right_r = blend15(cur_right_r, nxt_right_r, filter_frac); + wire [7:0] right_g = blend15(cur_right_g, nxt_right_g, filter_frac); + wire [7:0] right_b = blend15(cur_right_b, nxt_right_b, filter_frac); + wire [7:0] linear_out_r = blend5(left_r, right_r, hfilter_frac); + wire [7:0] linear_out_g = blend5(left_g, right_g, hfilter_frac); + wire [7:0] linear_out_b = blend5(left_b, right_b, hfilter_frac); + wire [7:0] bin_prv_r = binom3(prv_left_r, prv_r, prv_right_r); + wire [7:0] bin_prv_g = binom3(prv_left_g, prv_g, prv_right_g); + wire [7:0] bin_prv_b = binom3(prv_left_b, prv_b, prv_right_b); + wire [7:0] bin_cur_r = binom3(cur_left_r, cur_r, cur_right_r); + wire [7:0] bin_cur_g = binom3(cur_left_g, cur_g, cur_right_g); + wire [7:0] bin_cur_b = binom3(cur_left_b, cur_b, cur_right_b); + wire [7:0] bin_nxt_r = binom3(nxt_left_r, nxt_r, nxt_right_r); + wire [7:0] bin_nxt_g = binom3(nxt_left_g, nxt_g, nxt_right_g); + wire [7:0] bin_nxt_b = binom3(nxt_left_b, nxt_b, nxt_right_b); + wire [7:0] out_r = BINOMIAL_3X3_FILTER ? binom3(bin_prv_r, bin_cur_r, bin_nxt_r) + : linear_out_r; + wire [7:0] out_g = BINOMIAL_3X3_FILTER ? binom3(bin_prv_g, bin_cur_g, bin_nxt_g) + : linear_out_g; + wire [7:0] out_b = BINOMIAL_3X3_FILTER ? binom3(bin_prv_b, bin_cur_b, bin_nxt_b) + : linear_out_b; + + assign r = !in_q ? 8'd0 : out_r; + assign g = !in_q ? 8'd0 : out_g; + assign b = !in_q ? 8'd0 : out_b; // ================= axi side (axi_clk) — row fill FSM ================= // free-running prefetcher: fetch rows sequentially, staying <= disp_row+1 ahead. // disp_row crosses video->axi (slowly-changing; the +1 throttle tolerates a 1-off // transient). frame_start is edge-detected here to reset next_fetch every frame. logic [2:0] fs_sync_e; - wire fs_edge_e = (fs_sync_e[2] != fs_sync_e[1]); - logic [$clog2(N_ROWS):0] disp_row_s0, disp_row_e; + wire fs_edge_e = fs_sync_e[1] && !fs_sync_e[2]; // RISING edge only: one prefetch restart per frame_start pulse + logic [$clog2(N_ROWS):0] disp_row_s0, disp_row_limit_e; logic [$clog2(N_ROWS):0] next_fetch; // next row to load (0..N_ROWS) - typedef enum logic [1:0] { L_IDLE, L_AR, L_R } lstate_t; + logic [1:0] next_fetch_buf; + typedef enum logic [1:0] { L_IDLE, L_AR, L_R, L_C } lstate_t; lstate_t lst; logic [$clog2(N_ROWS):0] cur_row; - logic cur_buf; + logic [1:0] cur_buf; logic [RB_BITS:0] beat; logic fs_pending; // a vsync restart is pending; applied in L_IDLE (never mid-read) + // Ch358 (Codex) — one-entry RESPONSE STAGE: the 26.1 STA leader (WNS -0.884 at 640) was the EMIF read-FIFO + // RAM output driving lb0/lb1's write port in the SAME rvalid cycle (RAM->bus->RAM in one 310MHz period). + // L_R now only CAPTURES {rdata, beat, buf, last} into per-buffer physical write registers. L_C commits the + // selected LB RAM; next_fetch/line_valid advance only after that commit. One outstanding read. + // Ch439b — physical write-port stage. The Ch438 fit exposed a route-only + // r_data_q -> lb1 RAM path at 310 MHz after adding the third line buffer. + // Give each inferred RAM its own data/address/enable launch registers so + // the fitter can place them beside that RAM instead of routing one shared + // 256-bit register bank across all three memories. Capture directly from + // AXI in L_R and commit in L_C: the first Ch439 L_R->L_C->L_W form added a + // cycle per beat and produced sustained line-buffer underflow on hardware. + // Data/address registers intentionally have no reset; the reset write- + // enables qualify them. + logic [255:0] lb0_wdata_q, lb1_wdata_q, lb2_wdata_q; + logic [RB_BITS-1:0] lb0_waddr_q, lb1_waddr_q, lb2_waddr_q; + logic lb0_we_q, lb1_we_q, lb2_we_q; always_ff @(posedge axi_clk) begin if (!axi_rst_n) begin - fs_sync_e <= 3'd0; disp_row_s0 <= '0; disp_row_e <= '0; next_fetch <= '0; + fs_sync_e <= 3'd0; + disp_row_s0 <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + disp_row_limit_e <= ($clog2(N_ROWS)+1)'(V_SOURCE_START + 1); + next_fetch <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + next_fetch_buf <= BINOMIAL_3X3_FILTER ? 2'(V_SOURCE_BUF) + : {1'b0, 1'(V_SOURCE_START)}; lst <= L_IDLE; araddr <= '0; arvalid <= 1'b0; rready <= 1'b0; - cur_row <= '0; cur_buf <= 1'b0; beat <= '0; + cur_row <= '0; cur_buf <= 2'd0; beat <= '0; line_valid <= 1'b0; rd_errs <= 32'd0; fs_pending <= 1'b0; + lb0_we_q <= 1'b0; lb1_we_q <= 1'b0; lb2_we_q <= 1'b0; end else begin fs_sync_e <= {fs_sync_e[1:0], frame_start}; disp_row_s0 <= disp_row_v; // 2-FF sync of the display row - disp_row_e <= disp_row_s0; + // Register the already-incremented throttle limit. This remains the + // second CDC stage, but removes disp_row -> (+1) -> compare -> araddr + // enable from one 310 MHz cycle (the post-alpha fit's -0.125 ns family). + // The extra bit represents N_ROWS exactly on the final display row. + disp_row_limit_e <= disp_row_s0 + 1'b1; + // Ch439c — RAM-local response pipeline. Commit the response + // captured on the preceding cycle while the AXI FSM advances to + // (or waits for) the next single-beat read. This keeps the + // rdata->local-register->RAM timing cut without paying an L_C + // bubble after every beat. The final beat uses L_C only as a + // one-cycle row-end flush before next_fetch becomes visible. + if (lb0_we_q) lb0[lb0_waddr_q] <= lb0_wdata_q; + if (lb1_we_q) lb1[lb1_waddr_q] <= lb1_wdata_q; + if (lb2_we_q) lb2[lb2_waddr_q] <= lb2_wdata_q; + lb0_we_q <= 1'b0; + lb1_we_q <= 1'b0; + lb2_we_q <= 1'b0; // vsync: mark a prefetch restart. DEFER it to L_IDLE so an in-flight AXI // read is never aborted mid-handshake (which would deadlock the slave). if (fs_edge_e) fs_pending <= 1'b1; case (lst) L_IDLE: begin if (fs_pending) begin - next_fetch <= '0; // restart prefetch sequence from row 0 + next_fetch <= ($clog2(N_ROWS)+1)'(V_SOURCE_START); + next_fetch_buf <= BINOMIAL_3X3_FILTER ? 2'(V_SOURCE_BUF) + : {1'b0, 1'(V_SOURCE_START)}; + // restart at the captured display source row fs_pending <= 1'b0; - end else if (enable && (next_fetch < N_ROWS) && (next_fetch <= disp_row_e + 1'b1)) begin + end else if (enable && (next_fetch < N_ROWS) && (next_fetch <= disp_row_limit_e)) begin cur_row <= next_fetch; - cur_buf <= next_fetch[0]; + cur_buf <= next_fetch_buf; araddr <= FB_BASE + (next_fetch * STRIDE_BYTES); beat <= '0; arvalid <= 1'b1; @@ -175,16 +713,27 @@ module gs_lpddr_scanout_lb #( end L_R: begin if (rvalid) begin - if (cur_buf) lb1[beat[RB_BITS-1:0]] <= rdata; - else lb0[beat[RB_BITS-1:0]] <= rdata; + // Capture directly into the selected RAM-local port + // stage. L_C commits it on the following cycle. + lb0_we_q <= 1'b0; + lb1_we_q <= 1'b0; + lb2_we_q <= 1'b0; + case (cur_buf) + 2'd1: begin lb1_wdata_q <= rdata; lb1_waddr_q <= beat[RB_BITS-1:0]; lb1_we_q <= 1'b1; end + 2'd2: begin lb2_wdata_q <= rdata; lb2_waddr_q <= beat[RB_BITS-1:0]; lb2_we_q <= 1'b1; end + default: begin lb0_wdata_q <= rdata; lb0_waddr_q <= beat[RB_BITS-1:0]; lb0_we_q <= 1'b1; end + endcase if (rresp != 2'b00) rd_errs <= rd_errs + 32'd1; rready <= 1'b0; if (beat == ROW_BEATS-1) begin - line_valid <= 1'b1; - next_fetch <= next_fetch + 1'b1; // advance prefetch (rows 0..next_fetch-1 loaded) - lst <= L_IDLE; + // The local register captures this last response + // now; L_C flushes it into RAM on the next edge. + lst <= L_C; end else begin - // next single-beat read of this row (arlen=0 each). + // Previous behavior inserted L_C here and lost one + // EMIF clock per beat. The RAM-local stage commits + // independently above, so immediately issue the + // next read just as the pre-Ch439 FSM did. beat <= beat + 1'b1; araddr <= araddr + 30'd32; arvalid <= 1'b1; @@ -192,6 +741,18 @@ module gs_lpddr_scanout_lb #( end end end + L_C: begin + // The global pipeline commit above writes the final beat + // on this edge. Publish the completed row only now. + line_valid <= 1'b1; + next_fetch <= next_fetch + 1'b1; // rows 0..next_fetch are now loaded + if (BINOMIAL_3X3_FILTER) + next_fetch_buf <= (next_fetch_buf == 2'd2) ? 2'd0 + : next_fetch_buf + 1'b1; + else + next_fetch_buf <= {1'b0, ~next_fetch_buf[0]}; + lst <= L_IDLE; + end default: lst <= L_IDLE; endcase end @@ -206,7 +767,12 @@ module gs_lpddr_scanout_lb #( always_ff @(posedge video_clk) begin nf_s0 <= next_fetch; nf_v <= nf_s0; if (!enable || fs_edge_v) underflow_v <= 1'b0; - else if (in_window && (pixel_y < N_ROWS) && (($clog2(N_ROWS)+1)'(pixel_y) >= nf_v)) + else if (in_window && (scan_y < ($clog2(N_ROWS)+1)'(N_ROWS)) && + ((scan_y >= nf_v) || + ((BINOMIAL_3X3_FILTER || + (V_LINEAR_FILTER && (stretch_vphase_q != 4'd0))) && + (scan_y + 1'b1 < ($clog2(N_ROWS)+1)'(N_ROWS)) && + (scan_y + 1'b1 >= nf_v)))) underflow_v <= 1'b1; end assign underflow = underflow_v; diff --git a/rtl/gif_gs/gs_lpddr_wr_arb.sv b/rtl/gif_gs/gs_lpddr_wr_arb.sv index e40d55a..a8f8985 100644 --- a/rtl/gif_gs/gs_lpddr_wr_arb.sv +++ b/rtl/gif_gs/gs_lpddr_wr_arb.sv @@ -121,24 +121,28 @@ module gs_lpddr_wr_arb ( // so AW sets it first, but tracking either makes this a GENERAL AXI write arbiter that never // abandons a transaction regardless of AW/W ordering (Codex audit note). reg aw_done; // a write beat/addr accepted for the active grant -> never abort past here + // Ch368 -- arm EMIF BREADY from the final W handshake, rather than feeding it through the + // live grant/client-ready mux. All current writers enter their B-wait state on that same + // handshake (or hold BREADY high), so this preserves the AW->W->B contract while cutting + // the grant/bready -> EMIF response-FIFO timing cone. + reg bready_q; reg [21:0] watchdog; // pre-commit only; ~6.7 ms @ 310 MHz dead-bus backstop wire wd_expired = watchdog[21]; - wire sel_bready = (grant==3'd1)?s0_bready:(grant==3'd2)?s1_bready: - (grant==3'd3)?s2_bready:(grant==3'd4)?s3_bready:1'b1; always_ff @(posedge clk or negedge rst_n) begin if (!rst_n) begin - grant <= 3'd0; aw_done <= 1'b0; watchdog <= '0; + grant <= 3'd0; aw_done <= 1'b0; bready_q <= 1'b0; watchdog <= '0; end else if (grant == 3'd0) begin - aw_done <= 1'b0; watchdog <= '0; + aw_done <= 1'b0; bready_q <= 1'b0; watchdog <= '0; if (s0_awvalid) grant <= 3'd1; // FB writer (highest) else if (s2_awvalid) grant <= 3'd3; // Z spill (render-flush) else if (s1_awvalid) grant <= 3'd2; // color spill (render-flush) else if (s3_awvalid) grant <= 3'd4; // HPS write-probe (debug, lowest) end else begin if ((m_awvalid && m_awready) || (m_wvalid && m_wready)) aw_done <= 1'b1; // AW or W accepted -> COMMITTED - if (m_bvalid && sel_bready) begin - grant <= 3'd0; aw_done <= 1'b0; watchdog <= '0; // B delivered -> release + if (m_wvalid && m_wready && m_wlast) bready_q <= 1'b1; + if (m_bvalid && bready_q) begin + grant <= 3'd0; aw_done <= 1'b0; bready_q <= 1'b0; watchdog <= '0; // B delivered -> release end else if (!aw_done) begin // still waiting for AW (nothing owed) if (wd_expired) begin grant <= 3'd0; aw_done <= 1'b0; watchdog <= '0; end else watchdog <= watchdog + 22'd1; @@ -169,11 +173,12 @@ module gs_lpddr_wr_arb ( assign s2_wready = (grant==3'd3)?m_wready:1'b0; assign s3_wready = (grant==3'd4)?m_wready:1'b0; - // B demux (idle: bready=1 drains any stale/late response) + // B demux. bready_q arms exactly after the selected final W handshake, one cycle before + // the earliest response the existing writers can consume. It is held through B acceptance. assign s0_bresp = m_bresp; assign s1_bresp = m_bresp; assign s2_bresp = m_bresp; assign s3_bresp = m_bresp; assign s0_bvalid = (grant==3'd1)?m_bvalid:1'b0; assign s1_bvalid = (grant==3'd2)?m_bvalid:1'b0; assign s2_bvalid = (grant==3'd3)?m_bvalid:1'b0; assign s3_bvalid = (grant==3'd4)?m_bvalid:1'b0; - assign m_bready = (grant==3'd1)?s0_bready:(grant==3'd2)?s1_bready:(grant==3'd3)?s2_bready:(grant==3'd4)?s3_bready:1'b1; + assign m_bready = bready_q; endmodule diff --git a/rtl/gif_gs/gs_lpddr_z_rmw.sv b/rtl/gif_gs/gs_lpddr_z_rmw.sv new file mode 100644 index 0000000..7f649d5 --- /dev/null +++ b/rtl/gif_gs/gs_lpddr_z_rmw.sv @@ -0,0 +1,373 @@ +// retroDE_ps2 — gs_lpddr_z_rmw (Ch357 — packed PSMZ16S persistent-Z LPDDR read-modify-write engine, STANDALONE unit) +// +// Codex Ch357 gate 1: "Build the packed PSMZ16S LPDDR RMW engine as a standalone unit first." This is the depth-test +// core for Option B (LPDDR-persistent Z). It owns a PRIVATE, LINEAR, packed-16-bit Z buffer in LPDDR. +// +// AUTHENTICITY NOTE (Codex): this Z buffer is INTERNAL — it is NEVER exposed as GS local memory. Therefore only the +// PSMZ16S VALUE/TEST semantics are authentic (clamp16 source, GEQUAL, ZMSK); its PHYSICAL storage layout is deliberately a +// simple linear packing, NOT the PSMZ16S memory swizzle. That is valid precisely because nothing outside reads it as GS VRAM. +// +// PSMZ16S depth semantics (pinned against PCSX2 SW raster — GSRendererSW.cpp:1439 z_max=0xFFFF, GSDrawScanline…:1129 +// source clamp, :1157 dest mask + GEQUAL): +// src_z = min(frag_z, 0xFFFF) // clamp16 (NOT mask) +// dest_z = stored 16-bit Z at the pixel +// pass = (src_z >= dest_z) // GEQUAL, larger Z = nearer +// on pass && !zmsk: stored := src_z // ZMSK=1 => test still runs, WRITE suppressed only +// +// Storage: pixel_index = y*FB_PXW + x ; 16 Z per 256-bit (32-byte) beat ; beat = pixel_index>>4, lane = pixel_index[3:0]; +// byte addr = ZBASE + beat*32. Raster (scanline) order gives strong beat locality. +// +// Hazards / backpressure (Codex gates): a SINGLE write-back cache line (one 256-bit beat) holds all 16 lanes, so +// consecutive fragments to the same beat (incl. the SAME pixel) read the latest pending Z IN-PLACE — same-beat RMW hazards +// are forwarded with 1-cycle throughput and no stale read. On a beat MISS the engine flushes the dirty line, reads the new +// beat, and BACKPRESSURES the fragment producer (f_ready=0) throughout — a bounded producer, never an unbounded stream +// feeding a latent LPDDR read. Color is emitted by the CONSUMER only after p_pass (this unit produces the pass bit). +// +// Single clock (axi_clk domain). Integration adds the raster(gs_clk)->axi_clk CDC (async-FIFO, like gs_lpddr_axi_master). +// AXI4: single-beat INCR (arsize/awsize=5=32B, len=0), full per-byte wstrb, backpressured handshakes. + +module gs_lpddr_z_rmw #( + parameter [31:0] ZBASE = 32'h0030_0000, // LPDDR byte base of the private Z buffer (Linux-safe reserved region) + parameter int FB_PXW = 256, // framebuffer pixel width (pixel-index stride) + parameter int FB_H = 210, // framebuffer height (bounds the preclear loop) + parameter [15:0] Z_CLEAR = 16'h0000 // GEQUAL clear value (0 = farthest; any fragment passes first) +) ( + input logic clk, + input logic rst_n, + input logic enable, // 0 => fully inert (no AXI activity) + // ---- preclear (Codex: preclear shared Z once to the GEQUAL clear value) ---- + input logic clear_start, // pulse: write Z_CLEAR to every beat, then clear_done + output logic clear_done, + // ---- scene-end flush (Codex: on the ordered end-of-scene marker, flush the dirty Z line + wait its BRESP). The cache + // stays VALID and CLEAN afterwards so Z PERSISTS across scheduler epochs (texture rebind must not clear it). ---- + input logic scene_flush, // hold high until z_drained; flushes the dirty line to LPDDR + output logic z_drained, // all Z durable in LPDDR (idle, cache clean, no pending AXI) + // ---- fragment input stream (valid/ready) ---- + input logic f_valid, + output logic f_ready, + input logic [11:0] f_x, + input logic [11:0] f_y, + input logic [31:0] f_z, // fragment Z (pre-clamp) + input logic f_zmsk, // 1 => suppress Z write (test still occurs) + input logic [1:0] f_ztst, // 0 NEVER, 1 ALWAYS, 2 GEQUAL, 3 GREATER + // ---- result output stream (in fragment order): p_pass gates the color write downstream ---- + output logic p_valid, + input logic p_ready, + output logic p_pass, + output logic [11:0] p_x, + output logic [11:0] p_y, + output logic [15:0] p_zq, // the clamped fragment Z (for the color path / debug) + // ---- AXI4 read (Z fetch) ---- + output logic [31:0] araddr, + output logic [7:0] arlen, + output logic [2:0] arsize, + output logic [1:0] arburst, + output logic arvalid, + input logic arready, + input logic [255:0] rdata, + input logic [1:0] rresp, + input logic rlast, + input logic rvalid, + output logic rready, + // ---- AXI4 write (Z flush) ---- + output logic [31:0] awaddr, + output logic [7:0] awlen, + output logic [2:0] awsize, + output logic [1:0] awburst, + output logic awvalid, + input logic awready, + output logic [255:0] wdata, + output logic [31:0] wstrb, + output logic wlast, + output logic wvalid, + input logic wready, + input logic bvalid, + output logic bready, + input logic [1:0] bresp, + // ---- status ---- + output logic [31:0] beats_read, + output logic [31:0] beats_written, + output logic [31:0] bresp_err, + output logic idle +); + localparam int NPX = FB_PXW*FB_H; + localparam int NBEATS = (NPX + 15) / 16; + localparam int BW = (NBEATS <= 1) ? 1 : $clog2(NBEATS); + + // ---- clamp16 (PSMZ16S source clamp) ---- + function automatic logic [15:0] clamp16(input logic [31:0] z); + clamp16 = (|z[31:16]) ? 16'hFFFF : z[15:0]; + endfunction + + // ---- single write-back Z-cache line ---- + logic [255:0] cache_data; // 16 lanes x 16-bit Z + // Ch357 (Codex) — register the accepted AXI read data BEFORE updating cache_data, so the EMIF read-FIFO -> cache + // 310 MHz path is register->register (the -0.8 ns closure). S_FILL_R captures rdata here; S_FILL_C commits it. + logic [255:0] z_rd_q; + logic [BW-1:0] cache_beat; + logic cache_valid, cache_dirty; + + // ---- pending fragment (latched during a miss) ---- + logic [11:0] pf_x, pf_y; + logic [15:0] pf_zq; + logic pf_zmsk; + logic [1:0] pf_ztst; + logic [BW-1:0] pf_beat; + logic [3:0] pf_lane; + // Ch357 — DECODE-STAGE pipeline register (Codex: pipeline the 310 MHz u_req->cache path). The incoming fragment's + // index/lane/beat + clamp16(z) are computed combinationally and REGISTERED here on accept; the cache read/compare/ + // write then runs the NEXT cycle off the registered fields. This splits the single-cycle FIFO->index->lane->256-bit + // cache-mux->compare->cache-write cone (routed -2.240 ns @ 310 MHz) into two shorter registered stages. Same-beat + // forwarding is preserved: fragments are 2 cycles apart in the RMW stage, so an in-place cache write is committed a + // cycle before the next same-beat read. Throughput 155 MHz >> the raster fragment rate (no new FIFO pressure). + logic d_valid; + logic [3:0] d_lane; + logic [15:0] d_zq; + logic d_zmsk; + logic [1:0] d_ztst; + logic [11:0] d_x, d_y; + logic [BW-1:0] d_beat; + // Ch358 (Codex) — registered HIT flag, the companion to d_beat: loaded from hit_c at stage-1 accept so stage 2 + // branches on ONE registered bit instead of the BW-wide (15-bit at 640x480) d_beat==cache_beat equality that + // directly gated the 256-bit wdata<=cache_data dirty-evict load (the Ch358 fit's WNS -0.092 family). Exact by + // construction: accept happens only in S_RUN with the decode slot free (f_ready), and cache_beat/cache_valid + // change only in S_FILL_C (unreachable while d_* is pending) or at clear_start (precedes all fragments; the + // zint gates assert pre_clear_frags==0) -> hit_c cannot go stale between accept and the single stage-2 consume + // (a missed fragment is promoted to pf_* and handed to rmw_* by S_FILL_C; it never re-enters stage 2). + logic d_hit; + // Ch357 (Codex) — RMW-STAGE pipeline register (stage 3). Stage 2 does the barrel READ of the target lane + // (cache_data[d_lane] on a hit, z_rd_q[pf_lane] on a fill) into rmw_dz; stage 3 (next cycle) does GEQUAL + the + // barrel WRITE via an explicit 16-way case. Splitting read from compare+write removes the cache_data->cache_data + // cross-lane feedback mux (the -0.607ns 310MHz path). f_ready already spaces fragments 2 cyc apart, so an in-place + // lane write commits one cycle before the next same-beat lane read -> same-beat forwarding preserved, no bypass. + logic rmw_valid; + logic [3:0] rmw_lane; + logic [15:0] rmw_dz; // the read-out dest Z of the target lane (registered) + logic [15:0] rmw_zq; // clamped fragment Z + logic rmw_zmsk; + logic [1:0] rmw_ztst; + logic [11:0] rmw_x, rmw_y; + // Ch367 — register GEQUAL before it enables a cache-line update. This + // removes the compare -> 16-way cache_data write-enable cone at 310 MHz. + logic cmp_valid; + logic cmp_pass, cmp_write; + logic [3:0] cmp_lane; + logic [15:0] cmp_zq; + logic [11:0] cmp_x, cmp_y; + + // combinational address/lane of the INCOMING fragment + logic [31:0] px_index_c; + logic [BW-1:0] beat_c; + logic [3:0] lane_c; + always_comb begin + px_index_c = f_y*FB_PXW + f_x; + beat_c = px_index_c[4 +: BW]; + lane_c = px_index_c[3:0]; + end + wire hit_c = cache_valid && (beat_c == cache_beat); + + // ---- result register (1-deep skid; holds until p_ready) ---- + logic res_full; + logic res_pass; + logic [11:0] res_x, res_y; + logic [15:0] res_zq; + assign p_valid = res_full; + assign p_pass = res_pass; + assign p_x = res_x; + assign p_y = res_y; + assign p_zq = res_zq; + + // ---- FSM ---- + typedef enum logic [3:0] { S_RUN, S_FLUSH_AW, S_FLUSH_B, S_FILL_AR, S_FILL_R, S_FILL_C, S_CLR, S_CLR_B, + S_SFLUSH_AW, S_SFLUSH_B } st_t; + st_t st; + logic [BW-1:0] clr_beat; + + // helper: perform the RMW on the cache line for a given lane/zq/zmsk, return pass (comb) and next cache line + function automatic logic ztest_pass(input logic [1:0] op, input logic [15:0] s, input logic [15:0] d); + case (op) + 2'd0: ztest_pass = 1'b0; + 2'd1: ztest_pass = 1'b1; + 2'd2: ztest_pass = (s >= d); + 2'd3: ztest_pass = (s > d); + endcase + endfunction + + // Ch357 (Codex) — EXPLICIT 16-way lane write (constant slices, NOT dynamic cache_data[lane*16+:16]). Each arm writes + // one fixed 16-bit slice; the other 15 lanes are unassigned -> HOLD. This is a per-lane write-enable, not a 256-bit + // cross-lane feedback mux, which is what kept the compare+write out of the critical cone. + task automatic cache_write_lane(input logic [3:0] lane, input logic [15:0] val); + case (lane) + 4'd0: cache_data[ 15: 0] <= val; 4'd1: cache_data[ 31: 16] <= val; + 4'd2: cache_data[ 47: 32] <= val; 4'd3: cache_data[ 63: 48] <= val; + 4'd4: cache_data[ 79: 64] <= val; 4'd5: cache_data[ 95: 80] <= val; + 4'd6: cache_data[111: 96] <= val; 4'd7: cache_data[127:112] <= val; + 4'd8: cache_data[143:128] <= val; 4'd9: cache_data[159:144] <= val; + 4'd10: cache_data[175:160] <= val; 4'd11: cache_data[191:176] <= val; + 4'd12: cache_data[207:192] <= val; 4'd13: cache_data[223:208] <= val; + 4'd14: cache_data[239:224] <= val; 4'd15: cache_data[255:240] <= val; + endcase + endtask + + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + st<=S_RUN; cache_valid<=1'b0; cache_dirty<=1'b0; cache_beat<='0; cache_data<='0; z_rd_q<='0; + res_full<=1'b0; res_pass<=1'b0; res_x<='0; res_y<='0; res_zq<='0; + pf_x<='0; pf_y<='0; pf_zq<='0; pf_zmsk<='0; pf_ztst<=2'd2; pf_beat<='0; pf_lane<='0; + d_valid<=1'b0; d_lane<='0; d_zq<='0; d_zmsk<='0; d_ztst<=2'd2; d_x<='0; d_y<='0; d_beat<='0; d_hit<=1'b0; + rmw_valid<=1'b0; rmw_lane<='0; rmw_dz<='0; rmw_zq<='0; rmw_zmsk<='0; rmw_ztst<=2'd2; rmw_x<='0; rmw_y<='0; + cmp_valid<=1'b0; cmp_pass<=1'b0; cmp_write<=1'b0; cmp_lane<='0; cmp_zq<='0; cmp_x<='0; cmp_y<='0; + arvalid<=1'b0; araddr<='0; rready<=1'b0; + awvalid<=1'b0; awaddr<='0; wvalid<=1'b0; wdata<='0; wlast<=1'b0; bready<=1'b0; + beats_read<='0; beats_written<='0; bresp_err<='0; clr_beat<='0; clear_done<=1'b0; + end else begin + // constant AXI framing + arlen<=8'd0; arsize<=3'd5; arburst<=2'b01; + awlen<=8'd0; awsize<=3'd5; awburst<=2'b01; wstrb<=32'hFFFF_FFFF; + + // clear the result reg when the consumer takes it + if (res_full && p_ready) res_full<=1'b0; + + if (clear_start && st==S_RUN) begin + cache_valid<=1'b0; cache_dirty<=1'b0; clear_done<=1'b0; clr_beat<='0; + awaddr<=ZBASE; awvalid<=1'b1; wdata<={16{Z_CLEAR}}; wvalid<=1'b1; wlast<=1'b1; st<=S_CLR; + end + + case (st) + // ---------------- normal processing ---------------- + S_RUN: begin + // STAGE 4 — write a registered decision and publish its result. This is the only normal + // cache_data writer, and its enable is now register-local. + if (cmp_valid && (!res_full || p_ready)) begin + if (cmp_write) begin cache_write_lane(cmp_lane, cmp_zq); cache_dirty<=1'b1; end + res_full<=1'b1; res_pass<=cmp_pass; res_x<=cmp_x; res_y<=cmp_y; res_zq<=cmp_zq; + cmp_valid<=1'b0; + end + + // STAGE 3 — register GEQUAL + write intent. Stage 2 waits for cmp_valid to clear, so a + // same-beat successor never samples cache_data in the cycle its predecessor writes it. + if (rmw_valid && !cmp_valid) begin + cmp_valid<=1'b1; cmp_pass<=ztest_pass(rmw_ztst, rmw_zq, rmw_dz); + cmp_write<=ztest_pass(rmw_ztst, rmw_zq, rmw_dz) && !rmw_zmsk; + cmp_lane<=rmw_lane; cmp_zq<=rmw_zq; cmp_x<=rmw_x; cmp_y<=rmw_y; + rmw_valid<=1'b0; + end + + // scene-end flush (ordered after all fragments): push the dirty line, keep it cached (persist across + // epochs). Waits for every pipeline stage to drain so nothing is stranded. + if (scene_flush && !d_valid && !rmw_valid && !cmp_valid && cache_valid && cache_dirty) begin + awaddr<=ZBASE + (cache_beat<<5); awvalid<=1'b1; + wdata<=cache_data; wvalid<=1'b1; wlast<=1'b1; st<=S_SFLUSH_AW; + end + // STAGE 2 — barrel READ of the target lane into the RMW register (hit), or promote+fill (miss). Fires + // only when the RMW slot is empty (!rmw_valid): with f_ready's 2-cyc spacing the stages alternate, so + // stage 2 never collides with a same-cycle stage-3 cache write (miss flush reads a settled cache_data). + else if (d_valid && !rmw_valid && !cmp_valid) begin + d_valid <= 1'b0; + if (d_hit) begin // Ch358 — registered at accept (== cache_valid && d_beat==cache_beat there) + // HIT: register the read-out dest Z; stage 3 compares + writes next cycle. + rmw_valid<=1'b1; rmw_dz<=cache_data[d_lane*16 +: 16]; + rmw_lane<=d_lane; rmw_zq<=d_zq; rmw_zmsk<=d_zmsk; rmw_ztst<=d_ztst; rmw_x<=d_x; rmw_y<=d_y; + end else begin + // MISS: promote the decoded fragment to pf_*, backpressure, flush-if-dirty then fill + pf_x<=d_x; pf_y<=d_y; pf_zq<=d_zq; pf_zmsk<=d_zmsk; pf_ztst<=d_ztst; pf_beat<=d_beat; pf_lane<=d_lane; + if (cache_valid && cache_dirty) begin + awaddr<=ZBASE + (cache_beat<<5); awvalid<=1'b1; + wdata<=cache_data; wvalid<=1'b1; wlast<=1'b1; st<=S_FLUSH_AW; + end else begin + araddr<=ZBASE + (d_beat<<5); arvalid<=1'b1; st<=S_FILL_AR; + end + end + end + // ACCEPT (stage-1): register the combinational index/lane/beat + clamp16(z). f_ready gates this to + // one decoded fragment in flight (d_valid), so accept and stage 2 never collide on d_* (2 cyc/frag). + if (enable && f_valid && f_ready) begin + d_valid<=1'b1; d_lane<=lane_c; d_zq<=clamp16(f_z); d_zmsk<=f_zmsk; d_ztst<=f_ztst; + d_x<=f_x; d_y<=f_y; d_beat<=beat_c; d_hit<=hit_c; // Ch358 — pre-registered hit decision + end + end + // ---------------- flush the dirty line (AW then W then B) ---------------- + S_FLUSH_AW: begin + if (awready) awvalid<=1'b0; + if (wready) wvalid <=1'b0; + if ((awready||!awvalid) && (wready||!wvalid)) begin bready<=1'b1; st<=S_FLUSH_B; end + end + S_FLUSH_B: begin + if (bvalid) begin + bready<=1'b0; beats_written<=beats_written+1; + if (bresp!=2'b00) bresp_err<=bresp_err+1; + cache_dirty<=1'b0; + araddr<=ZBASE + (pf_beat<<5); arvalid<=1'b1; st<=S_FILL_AR; // now fill the wanted beat + end + end + // ---------------- fill the wanted beat (AR then R) ---------------- + S_FILL_AR: begin + if (arready) begin arvalid<=1'b0; rready<=1'b1; st<=S_FILL_R; end + end + S_FILL_R: begin + // Ch357 — ACCEPT: register the read beat (z_rd_q) and take the R handshake; the EMIF read-FIFO -> + // z_rd_q path is now register->register. The cache update happens next cycle in S_FILL_C. + if (rvalid) begin + rready<=1'b0; beats_read<=beats_read+1; + if (rresp!=2'b00) bresp_err<=bresp_err+1; + z_rd_q<=rdata; st<=S_FILL_C; + end + end + S_FILL_C: begin + // Ch357 — COMMIT: fill the cache line from the registered beat, and hand the pending fragment to the + // RMW stage (barrel READ of the target lane off the just-read beat). Stage 3 does the GEQUAL + 16-way + // lane write next cycle in S_RUN (a guaranteed hit). Same result as the old single-cycle fill, staged. + cache_data<=z_rd_q; cache_beat<=pf_beat; cache_valid<=1'b1; cache_dirty<=1'b0; + rmw_valid<=1'b1; rmw_dz<=z_rd_q[pf_lane*16 +: 16]; + rmw_lane<=pf_lane; rmw_zq<=pf_zq; rmw_zmsk<=pf_zmsk; rmw_ztst<=pf_ztst; rmw_x<=pf_x; rmw_y<=pf_y; + st<=S_RUN; + end + // ---------------- preclear: write Z_CLEAR to every beat (issue -> handshake -> B, loop) ---------------- + S_CLR: begin + if (awready) awvalid<=1'b0; + if (wready) wvalid <=1'b0; + if ((awready||!awvalid) && (wready||!wvalid)) begin bready<=1'b1; st<=S_CLR_B; end + end + S_CLR_B: begin + if (bvalid && bready) begin + bready<=1'b0; beats_written<=beats_written+1; + if (bresp!=2'b00) bresp_err<=bresp_err+1; + if (clr_beat==BW'(NBEATS-1)) begin clear_done<=1'b1; st<=S_RUN; end + else begin + clr_beat<=clr_beat+1'b1; + awaddr<=ZBASE + ((clr_beat+1'b1)<<5); awvalid<=1'b1; wvalid<=1'b1; wlast<=1'b1; st<=S_CLR; + end + end + end + // ---------------- scene-end flush: write the dirty line, keep cache VALID+CLEAN (Z persists) ---------------- + S_SFLUSH_AW: begin + if (awready) awvalid<=1'b0; + if (wready) wvalid <=1'b0; + if ((awready||!awvalid) && (wready||!wvalid)) begin bready<=1'b1; st<=S_SFLUSH_B; end + end + S_SFLUSH_B: begin + if (bvalid) begin + bready<=1'b0; beats_written<=beats_written+1; + if (bresp!=2'b00) bresp_err<=bresp_err+1; + cache_dirty<=1'b0; st<=S_RUN; // cache remains VALID (persist across epochs), now clean/durable + end + end + default: st<=S_RUN; + endcase + end + end + + // f_ready: accept a new fragment in S_RUN (hit => processed this cycle; miss => latched, then flush/fill), whenever the + // result slot is free or draining this cycle. On a miss the drain empties res_full and it stays empty until S_FILL_R + // re-fills it with the pending fragment's result, so no clobber. + // hold off new fragments during a scene flush too (so the marker's flush isn't interleaved with a fresh RMW) + // Ch367 pipeline — accept only when every local stage is clear. The extra compare-result stage preserves + // same-beat forwarding without a bypass: the prior write commits before the successor can read cache_data. + assign f_ready = enable && (st==S_RUN) && !(scene_flush && cache_valid && cache_dirty) + && !d_valid && !rmw_valid && !cmp_valid; + // idle / z_drained must see all three stages drained, else a fragment would be lost at a scene boundary. + assign idle = (st==S_RUN) && !d_valid && !rmw_valid && !cmp_valid && !res_full && !arvalid && !awvalid && !wvalid && !bready; + // z_drained: all Z durable in LPDDR — no local work, no dirty line, no pending AXI, no result stuck. + assign z_drained = (st==S_RUN) && !d_valid && !rmw_valid && !cmp_valid && !cache_dirty && !res_full && !arvalid && !awvalid && !wvalid && !bready; + +endmodule : gs_lpddr_z_rmw diff --git a/rtl/gif_gs/gs_lpddr_zc_emit.sv b/rtl/gif_gs/gs_lpddr_zc_emit.sv new file mode 100644 index 0000000..3ca3458 --- /dev/null +++ b/rtl/gif_gs/gs_lpddr_zc_emit.sv @@ -0,0 +1,368 @@ +// retroDE_ps2 — gs_lpddr_zc_emit (Ch357 — Z-then-color emit integration: request FIFO + persistent-Z RMW + color writer) +// +// Codex Ch357 integration constraints: +// (1) Cross gs_clk->axi_clk with ONE async request FIFO carrying the COMPLETE fragment packet {XY, clamped Z, color, +// masks, scene marker}. No raw level-bus CDC. +// (2) Z decision FIRST; enqueue color ONLY on pass. A rejected fragment produces NO color write. +// (3) Ordered end-of-scene marker through the SAME FIFO: on it, flush the dirty Z line, wait Z BRESP + all accepted color +// BRESPs, then assert combined frame_drained. +// (4) Z cache persists across scheduler epochs (texture rebind must not clear it) — handled by gs_lpddr_z_rmw (scene_flush +// keeps the line valid+clean). +// (5) Preclear/invalidate Z once at frame start (clear_start). +// (6) LPDDR map (gs_lpddr_map_pkg): color 0x000000, Z 0x140000, tex 0x200000 — disjoint. +// +// Structure: the request async FIFO is the ONLY CDC. Everything downstream runs in axi_clk: the Z RMW (its own Z AXI +// read+write master), and the reused gs_lpddr_axi_master COLOR writer (its gs_clk tied to axi_clk, so its internal CDC FIFO +// is same-clock). A tiny in-order COLOR-ALIGN FIFO carries {coladdr,color} beside the Z pipeline so the pass decision lands +// with the right pixel. Two AXI masters are exposed (z_* and c_*); the system arbitrates them onto the shared LPDDR port. + +module gs_lpddr_zc_emit #( + parameter [31:0] COLBASE = 32'h0000_0000, + parameter [31:0] ZBASE = 32'h0014_0000, + parameter int FB_PXW = 256, + parameter int FB_H = 210, + parameter [15:0] Z_CLEAR = 16'h0000, + parameter int REQ_DEPTH= 32, + parameter int COL_DEPTH= 64 +) ( + // ---- gs_clk fragment/marker producer ---- + input logic gs_clk, + input logic gs_rst_n, + input logic enable, + input logic g_valid, + output logic g_ready, + input logic [11:0] g_x, + input logic [11:0] g_y, + input logic [15:0] g_zq, // clamped Z (clamp16 done upstream) + input logic g_zmsk, + input logic g_ztest, // 1 = depth-test this fragment; 0 = always pass (non-Z draw) + input logic [1:0] g_ztst, // GS TEST.ZTST: NEVER/ALWAYS/GEQUAL/GREATER + input logic [31:0] g_color, + input logic [16:0] g_alpha, // {ABE,A,B,C,D,FIX}, snapped at raster emit + input logic [3:0] g_be, // FRAME.FBMSK-compressed byte enables + input logic g_scene, // 1 = end-of-scene marker (x/y/z/color ignored) + + // ---- axi_clk ---- + input logic axi_clk, + input logic axi_rst_n, + input logic clear_start, // preclear Z once at frame start + output logic clear_done, + output logic frame_drained, // combined: color drained AND Z drained for the scene + + // ---- Z AXI master (read+write) ---- + output logic [31:0] z_araddr, output logic [7:0] z_arlen, output logic [2:0] z_arsize, output logic [1:0] z_arburst, + output logic z_arvalid, input logic z_arready, + input logic [255:0] z_rdata, input logic [1:0] z_rresp, input logic z_rlast, input logic z_rvalid, output logic z_rready, + output logic [31:0] z_awaddr, output logic [7:0] z_awlen, output logic [2:0] z_awsize, output logic [1:0] z_awburst, + output logic z_awvalid, input logic z_awready, + output logic [255:0] z_wdata, output logic [31:0] z_wstrb, output logic z_wlast, output logic z_wvalid, input logic z_wready, + input logic z_bvalid, output logic z_bready, input logic [1:0] z_bresp, + + // ---- Color AXI master (write only) ---- + output logic [31:0] c_awaddr, output logic [7:0] c_awlen, output logic [2:0] c_awsize, output logic [1:0] c_awburst, + output logic c_awvalid, input logic c_awready, + output logic [255:0] c_wdata, output logic [31:0] c_wstrb, output logic c_wlast, output logic c_wvalid, input logic c_wready, + input logic c_bvalid, output logic c_bready, input logic [1:0] c_bresp, + + // ---- status ---- + output logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err, + // Destination-color read AXI master. Inert for full-byte opaque writes; + // ABE and partial FRAME.FBMSK writes both use it for destination RMW. + output logic [31:0] d_araddr, output logic [7:0] d_arlen, output logic [2:0] d_arsize, output logic [1:0] d_arburst, + output logic d_arvalid, input logic d_arready, + input logic [255:0] d_rdata, input logic [1:0] d_rresp, input logic d_rlast, input logic d_rvalid, output logic d_rready, + output logic idle +); + // ---------------- request async FIFO (the ONLY CDC) ---------------- + // X/Y have already been clipped to this framebuffer before reaching the + // external ROP. Do not spend twelve FIFO bits on each coordinate: the + // production 640x480 path needs only 10+9. Besides saving storage, this + // keeps the deep request FIFO below the RAM-banking threshold that put a + // bank mux on its 310 MHz registered-read path after ZTST was added. + localparam int XW = (FB_PXW <= 1) ? 1 : $clog2(FB_PXW); + localparam int YW = (FB_H <= 1) ? 1 : $clog2(FB_H); + localparam int PW = 74 + XW + YW; // {scene,be,alpha,color,ztest,ztst,zmsk,zq,y[YW],x[XW]} + localparam int Y_LSB = XW; + localparam int ZQ_LSB = XW + YW; + localparam int ZMSK_BIT = ZQ_LSB + 16; + localparam int ZTST_LSB = ZMSK_BIT + 1; + localparam int ZTEST_BIT = ZTST_LSB + 2; + localparam int COLOR_LSB = ZTEST_BIT + 1; + localparam int ALPHA_LSB = COLOR_LSB + 32; + localparam int BE_LSB = ALPHA_LSB + 17; + logic [PW-1:0] req_wdata, req_rdata; logic req_wfull, req_rempty, req_rd; + assign req_wdata = {g_scene, g_be, g_alpha, g_color, g_ztest, g_ztst, g_zmsk, + g_zq, g_y[YW-1:0], g_x[XW-1:0]}; + assign g_ready = enable && !req_wfull; + // Ch439e — the measured f52 occupancy peak is 6,115, so 8K cannot be cut + // without dropping fragments from the intentionally unthrottled producer. + // Split that fixed capacity by both depth and width instead: each physical + // address copy drives one quarter of the original deep/wide RAM tree. + gs_async_fifo #(.WIDTH(PW), .DEPTH(REQ_DEPTH), .REGISTERED_READ(1'b1), + .QUADRANT_READ(1'b1)) u_req ( + .wclk(gs_clk), .wrst_n(gs_rst_n), .wr(g_valid && g_ready), .wdata(req_wdata), .wfull(req_wfull), + .rclk(axi_clk), .rrst_n(axi_rst_n), .rd(req_rd), .rdata(req_rdata), .rempty(req_rempty) + ); + // REGISTERED request-HEAD stage. Ch406 makes the deep request FIFO read + // synchronous: an accepted req_rd is followed by req_read_pending, which + // captures the complete registered RAM output here one cycle later. + // Ch421 keeps stage occupancy independent of packet contents: decoding the + // RAM's scene bit directly into separate fragment/marker valid registers + // was the complete post-Ch420 setup family. A single validity register is + // driven only by req_read_pending; scene/type decode happens after the full + // packet register boundary. + logic req_stage_valid; + logic req_read_pending; + logic [PW-1:0] req_stage_packet; + // Ch423 — packet DATA is intentionally unreset and lives outside the + // async-reset control process. Keeping the lone unreset data register in + // that process made Quartus fold axi_rst_n (the 4k-fanout EMIF-cal signal) + // into its clock enable. Only req_stage_valid makes this payload + // observable, so the local registered pending pulse is the complete and + // sufficient capture enable. + always_ff @(posedge axi_clk) + if (req_read_pending) req_stage_packet <= req_rdata; + wire [PW-2:0] req_stage_data = req_stage_packet[PW-2:0]; + wire req_stage_frag_valid = req_stage_valid && !req_stage_packet[PW-1]; + wire req_stage_marker_valid = req_stage_valid && req_stage_packet[PW-1]; + wire rq_scene = req_stage_marker_valid; + wire [16:0] rq_alpha = req_stage_data[ALPHA_LSB +: 17]; + wire [3:0] rq_be = req_stage_data[BE_LSB +: 4]; + wire [31:0] rq_color = req_stage_data[COLOR_LSB +: 32]; + wire rq_ztest = req_stage_data[ZTEST_BIT]; + wire [1:0] rq_ztst = req_stage_data[ZTST_LSB +: 2]; + wire rq_zmsk = req_stage_data[ZMSK_BIT]; + wire [15:0] rq_zq = req_stage_data[ZQ_LSB +: 16]; + wire [11:0] rq_y = {{(12-YW){1'b0}}, req_stage_data[Y_LSB +: YW]}; + wire [11:0] rq_x = {{(12-XW){1'b0}}, req_stage_data[0 +: XW]}; + +`ifndef SYNTHESIS + initial begin + if (XW > 12 || YW > 12) + $fatal(1, "gs_lpddr_zc_emit framebuffer dimensions exceed 12-bit fragment coordinates"); + end +`endif + + // ---------------- Z RMW (axi_clk) ---------------- + logic z_fvalid, z_fready, z_pvalid, z_pready, z_ppass, z_sflush, z_drained; + logic [11:0] z_px, z_py; logic [15:0] z_pzq; + gs_lpddr_z_rmw #(.ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .Z_CLEAR(Z_CLEAR)) u_z ( + .clk(axi_clk), .rst_n(axi_rst_n), .enable(enable), .clear_start(clear_start), .clear_done(clear_done), + .scene_flush(z_sflush), .z_drained(z_drained), + .f_valid(z_fvalid), .f_ready(z_fready), .f_x(rq_x), .f_y(rq_y), .f_z({16'd0, rq_zq}), + .f_zmsk(rq_zmsk || !rq_ztest), .f_ztst(rq_ztest ? rq_ztst : 2'd1), + .p_valid(z_pvalid), .p_ready(z_pready), .p_pass(z_ppass), .p_x(z_px), .p_y(z_py), .p_zq(z_pzq), + .araddr(z_araddr), .arlen(z_arlen), .arsize(z_arsize), .arburst(z_arburst), .arvalid(z_arvalid), .arready(z_arready), + .rdata(z_rdata), .rresp(z_rresp), .rlast(z_rlast), .rvalid(z_rvalid), .rready(z_rready), + .awaddr(z_awaddr), .awlen(z_awlen), .awsize(z_awsize), .awburst(z_awburst), .awvalid(z_awvalid), .awready(z_awready), + .wdata(z_wdata), .wstrb(z_wstrb), .wlast(z_wlast), .wvalid(z_wvalid), .wready(z_wready), + .bvalid(z_bvalid), .bready(z_bready), .bresp(z_bresp), + .beats_read(z_beats_read), .beats_written(z_beats_written), .bresp_err(bresp_err), .idle(z_idle) + ); + // A fragment carries ztest: when ztest=0 it must ALWAYS pass. Feed the RMW a zmsk so it never writes Z for a + // non-Z fragment, and force its zq to max so GEQUAL always passes. (All scheduler draws are ztest=1.) + // (Handled at feed below via the always-pass override on the pass decision.) + + // ---------------- color-align FIFO (in-order {coladdr,color,ztest}) ---------------- + localparam int CAW = 86; // {ztest, be[3:0], alpha[16:0], coladdr[31:0], color[31:0]} + localparam int CAPTR_W = $clog2(COL_DEPTH); + logic [CAW-1:0] ca_mem [0:COL_DEPTH-1]; + logic [CAPTR_W:0] ca_head, ca_tail; + logic ca_wr_q; + logic [CAPTR_W-1:0] ca_waddr_q; + logic [CAW-1:0] ca_wdata_q; + wire ca_empty = (ca_head==ca_tail); + // Power-of-two ring full test: same low address with opposite wrap bit. + // This is equivalent to (tail-head)==COL_DEPTH while occupancy is bounded, + // but removes the pointer subtract/carry chain from feed_ok -> ca_mem write + // enable (the post-scanout fit's final -0.007 ns, two-endpoint family). + wire ca_full = (ca_tail[CAPTR_W] != ca_head[CAPTR_W]) + && (ca_tail[CAPTR_W-1:0] == ca_head[CAPTR_W-1:0]); + wire [31:0] frag_coladdr = COLBASE + (((rq_y*FB_PXW) + rq_x) << 2); + // Register the color-align RAM write port. Ch423 captures address/data + // every cycle instead of enabling these wide DATA registers with feed_ok. + // Their contents are observable only when the separately-reset ca_wr_q is + // high, so this removes ca_tail->ca_full->feed_ok from 82 data-register + // enables without changing the committed address/data/write-strobe tuple. + // Nonblocking ordering makes the RAM consume the prior cycle's captured + // tuple exactly when the prior feed_ok raised ca_wr_q. + always_ff @(posedge axi_clk) begin + ca_waddr_q <= ca_tail[CAPTR_W-1:0]; + ca_wdata_q <= {rq_ztest, rq_be, rq_alpha, frag_coladdr, rq_color}; + end + always_ff @(posedge axi_clk) + if (ca_wr_q) ca_mem[ca_waddr_q] <= ca_wdata_q; + + // ---------------- color writer (reused; gs_clk tied to axi_clk => internal FIFO is same-clock) ---------------- + logic col_px_emit; logic [31:0] col_px_addr; logic [31:0] col_px_pix32; logic col_flush, col_drained; + logic col_px_ready; // Ch357 (Codex) — color-writer producer-backpressure ready (elastic stage can accept) + // Ch357 (Codex) — ONE-ENTRY color output register. Registering the payload here breaks the ca_mem->barrel-insert + // cone (the -0.98ns 310MHz path) AND holds the emit valid until u_c accepts it, so no pixel is dropped. + logic col_out_valid; logic [31:0] col_out_addr; logic [31:0] col_out_color; logic [16:0] col_out_alpha; logic [3:0] col_out_be; + logic blend_in_ready, blend_out_valid, blend_idle, col_writer_idle; + logic blend_write_pending, blend_flush_issued, blend_drain_seen_low; + wire blend_input_gate = !blend_write_pending; + logic [31:0] blend_out_addr, blend_out_color; + gs_lpddr_color_blend u_blend ( + .clk(axi_clk), .rst_n(axi_rst_n), + .in_valid(col_out_valid && blend_input_gate), .in_ready(blend_in_ready), .in_addr(col_out_addr), .in_color(col_out_color), .in_alpha(col_out_alpha), .in_be(col_out_be), + .out_valid(blend_out_valid), .out_ready(col_px_ready), .out_addr(blend_out_addr), .out_color(blend_out_color), .idle(blend_idle), + .araddr(d_araddr), .arlen(d_arlen), .arsize(d_arsize), .arburst(d_arburst), .arvalid(d_arvalid), .arready(d_arready), + .rdata(d_rdata), .rresp(d_rresp), .rlast(d_rlast), .rvalid(d_rvalid), .rready(d_rready) + ); + logic col_commit; logic [1:0] commit_sr; + // one-shot ctrl_commit toggle after reset to latch fb_base=COLBASE + always_ff @(posedge axi_clk or negedge axi_rst_n) + if (!axi_rst_n) begin commit_sr<=2'b00; col_commit<=1'b0; end + else begin commit_sr<={commit_sr[0],1'b1}; if (commit_sr==2'b01) col_commit<=~col_commit; end + gs_lpddr_axi_master #(.FIFO_DEPTH(COL_DEPTH), .PIX_BYTES(4), .ELASTIC_BACKPRESSURE(1'b1)) u_c ( + .gs_clk(axi_clk), .gs_rst_n(axi_rst_n), .enable(enable), + .arm(enable), .canary(1'b0), .fb_base(COLBASE), .ctrl_commit(col_commit), + .px_emit(col_px_emit), .px_addr(col_px_addr), .px_pix32(col_px_pix32), .px_ready(col_px_ready), .flush(col_flush), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), + .awaddr(c_awaddr), .awlen(c_awlen), .awsize(c_awsize), .awburst(c_awburst), .awvalid(c_awvalid), .awready(c_awready), + .wdata(c_wdata), .wstrb(c_wstrb), .wlast(c_wlast), .wvalid(c_wvalid), .wready(c_wready), + .bvalid(c_bvalid), .bready(c_bready), .bresp(c_bresp), + .beats_written(c_beats_written), .bursts_issued(), .bresp_err_count(), + .fifo_overflow_count(col_ovf), .idle(col_writer_idle), .frame_drained(col_drained) + ); + + // Destination RMW reads must observe the preceding blended/masked write. Merely + // waiting for u_c.idle is insufficient: the elastic packer can hold a + // partial beat while the AXI-side FIFO still reports empty. Flush an + // ordered marker after every blended output and wait for col_drained to go + // low then high. That high transition is after the data beat's BRESP, so + // the next destination read sees the committed result. This deliberately + // serializes the color stream only while an ABE or partial-byte write is + // being committed. + wire blend_rmw_in_accept = col_out_valid && blend_in_ready && blend_input_gate + && (col_out_alpha[16] || (col_out_be != 4'hF)); + wire blend_write_accept = blend_out_valid && col_px_ready && blend_write_pending; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if (!axi_rst_n) begin + blend_write_pending <= 1'b0; + blend_flush_issued <= 1'b0; + blend_drain_seen_low <= 1'b0; + end else begin + if (blend_rmw_in_accept) begin + blend_write_pending <= 1'b1; + blend_flush_issued <= 1'b0; + blend_drain_seen_low <= 1'b0; + end else if (blend_write_accept) begin + blend_flush_issued <= 1'b1; + end else if (blend_write_pending && blend_flush_issued) begin + if (!col_drained) + blend_drain_seen_low <= 1'b1; + else if (blend_drain_seen_low) begin + blend_write_pending <= 1'b0; + blend_flush_issued <= 1'b0; + blend_drain_seen_low <= 1'b0; + end + end + end + end + + // ---------------- control FSM (axi_clk): feed Z, emit color on pass, drain on scene marker ---------------- + typedef enum logic [1:0] { C_RUN, C_MARK_WAIT, C_DRAIN } cst_t; cst_t cst; + + // POP only when the head stage and the synchronous-read pipeline are empty; + // CONSUME the staged fragment via feed_ok. req_rd remains a registered + // pulse, isolated from feed_ok and the color-align control cones. + wire req_read_accept = req_rd && !req_rempty; + // feed the STAGED fragment into the Z RMW (and push its color) when it is a fragment and both can accept + wire feed_ok = (cst==C_RUN) && req_stage_frag_valid && z_fready && !ca_full; + // consume the STAGED end-of-scene marker once all fed fragments have drained (see C_MARK_WAIT) + wire marker_consume = (cst==C_MARK_WAIT) && req_stage_marker_valid && ca_empty && z_idle && !col_out_valid && blend_idle && !blend_write_pending; + assign z_fvalid = feed_ok; + // Ch357 (Codex) — PRODUCER BACKPRESSURE via a ONE-ENTRY output register (col_out_*). Consume a Z result only when the + // output register can accept the color it would emit: z_pready = !col_out_valid || col_px_ready (empty, OR draining + // this cycle -> simultaneous drain/refill). ca_head pops on z_pvalid && z_pready (pass OR reject; a reject consumes its + // CA entry WITHOUT loading the output register). col_px_* are driven from the REGISTER (not combinationally from + // ca_mem), which breaks the ca_mem->u_c barrel-insert cone (the -0.98ns 310MHz path) AND holds the payload valid until + // u_c accepts it (px_ready), so no pixel is dropped. No comb loop: col_px_ready depends only on u_c's registered stage. + assign z_pready = !col_out_valid || (blend_in_ready && blend_input_gate); + wire [CAW-1:0] ca_headword = ca_mem[ca_head[CAPTR_W-1:0]]; + wire ca_head_zt = ca_headword[85]; + wire [3:0] ca_head_be = ca_headword[84:81]; + wire [16:0] ca_head_alpha= ca_headword[80:64]; + wire [31:0] ca_head_addr = ca_headword[63:32]; + wire [31:0] ca_head_col = ca_headword[31:0]; + wire z_consume = z_pvalid && z_pready; // pop the color-align head this cycle + wire z_emit_pass = z_consume && (z_ppass || !ca_head_zt); // load the output register (Z pass or non-Z frag) + assign col_px_emit = blend_out_valid; + assign col_px_addr = blend_out_addr; + assign col_px_pix32 = blend_out_color; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if (!axi_rst_n) begin + cst<=C_RUN; ca_head<=0; ca_tail<=0; + ca_wr_q<=1'b0; + col_flush<=0; z_sflush<=0; frame_drained<=0; + col_out_valid<=0; col_out_addr<=0; col_out_color<=0; col_out_alpha<=0; col_out_be<=4'hF; + req_stage_valid<=1'b0; + req_rd<=1'b0; req_read_pending<=1'b0; + end else begin + col_flush<=blend_write_accept; + ca_wr_q<=1'b0; + + // u_req has a registered read port. Allow one accepted pop, wait + // one cycle for its RAM output, then fill the request-head stage. + // The pending gate prevents a second pop while that word is in + // flight but req_stage_valid has not asserted yet. + req_rd <= !req_stage_valid && !req_read_pending && !req_rempty && !req_rd; + req_read_pending <= req_read_accept; + + // Capture one cycle after the synchronous FIFO pop. Capture needs + // an empty stage; consume needs a full one, so they remain mutually + // exclusive. + if (req_read_pending) begin + req_stage_valid <= 1'b1; + end + if (feed_ok || marker_consume) req_stage_valid <= 1'b0; + + // push color-align entry as we feed a fragment + if (feed_ok) begin + ca_wr_q <= 1'b1; + ca_tail <= ca_tail + 1'b1; + end + + // ONE-ENTRY color output register. DRAIN when u_c accepts (px_ready); may be re-loaded the same cycle (refill + // below) for simultaneous drain/refill. A consumed Z result (z_consume = z_pvalid && z_pready) pops the + // color-align head (pass OR reject); a PASS additionally loads the register (a reject writes no color). + if (col_out_valid && blend_in_ready && blend_input_gate) col_out_valid <= 1'b0; + if (z_consume) begin + ca_head <= ca_head + 1'b1; + if (z_emit_pass) begin + col_out_valid <= 1'b1; + col_out_addr <= ca_head_addr; + col_out_color <= ca_head_col; + col_out_alpha <= ca_head_alpha; + col_out_be <= ca_head_be; + end + end + + case (cst) + C_RUN: if (req_stage_marker_valid) cst<=C_MARK_WAIT; // staged marker: stop feeding, wait in-flight to drain + C_MARK_WAIT: begin + // all fed fragments have resulted (CA empty), Z idle, AND the output register drained to u_c + if (ca_empty && z_idle && !col_out_valid && blend_idle && !blend_write_pending) begin + col_flush<=1'b1; // push color partial beat + EOF marker + z_sflush <=1'b1; // flush the dirty Z line (cache persists) + // req_rd pops the marker this cycle (see assign) + cst<=C_DRAIN; + end + end + C_DRAIN: begin + z_sflush<=1'b1; // hold until z_drained + if (col_drained && z_drained) begin + frame_drained<=1'b1; z_sflush<=1'b0; cst<=C_RUN; + end + end + default: cst<=C_RUN; + endcase + // frame_drained is a per-scene ack; drop it once new fragments flow again (feed_ok => a fresh fragment consumed) + if (feed_ok) frame_drained<=1'b0; + end + end + + assign idle = (cst==C_RUN) && req_rempty && !req_stage_valid && ca_empty && z_idle && !col_out_valid && blend_idle && !blend_write_pending; +endmodule : gs_lpddr_zc_emit diff --git a/rtl/gif_gs/gs_persp_uv.sv b/rtl/gif_gs/gs_persp_uv.sv index e349b19..78aac5a 100644 --- a/rtl/gif_gs/gs_persp_uv.sv +++ b/rtl/gif_gs/gs_persp_uv.sv @@ -48,7 +48,9 @@ module gs_persp_uv #( input logic [Q_W-1:0] q, output logic out_valid, output logic [TEXEL_W-1:0] u, - output logic [TEXEL_W-1:0] v + output logic [TEXEL_W-1:0] v, + output logic [3:0] u_frac, + output logic [3:0] v_frac ); localparam int RLAT = 3; // gs_reciprocal_stub latency @@ -96,13 +98,23 @@ module gs_persp_uv #( out_valid <= 1'b0; u <= '0; v <= '0; + u_frac <= '0; + v_frac <= '0; end else begin logic [PROD_W-1:0] u_prod, v_prod; + logic [PROD_W-1:0] u_fixed4, v_fixed4; out_valid <= recip_valid; u_prod = uq_pipe[RLAT-1] * w_recip; v_prod = vq_pipe[RLAT-1] * w_recip; u <= clamp_texel(u_prod); v <= clamp_texel(v_prod); + // Preserve four fractional texel bits for the palette-bilinear + // path. The legacy integer outputs remain the exact SCALE-bit + // truncation above; these are simply the next four product bits. + u_fixed4 = u_prod >> (SCALE - 4); + v_fixed4 = v_prod >> (SCALE - 4); + u_frac <= u_fixed4[3:0]; + v_frac <= v_fixed4[3:0]; end end diff --git a/rtl/gif_gs/gs_prim_list_feeder.sv b/rtl/gif_gs/gs_prim_list_feeder.sv index 9d06c59..617aed8 100644 --- a/rtl/gif_gs/gs_prim_list_feeder.sv +++ b/rtl/gif_gs/gs_prim_list_feeder.sv @@ -24,6 +24,12 @@ // [7 + 9*i + 3..5] : tri i vtx1 RGBAQ/UV/XYZ2 // [7 + 9*i + 6..8] : tri i vtx2 RGBAQ/UV/XYZ2 // +// Ch402 optional clamp header (word0[34]=1), backward-compatible: +// [1..5] : FRAME,ALPHA,TEST,ZBUF,TEX0 as above +// [6] : CLAMP_1 data +// [7] : PRIM data +// [8 + 9*i ...] : triangle records +// // One `start` pulse plays the whole list; `done` pulses when it finishes. // Boring on purpose: 2 cycles per emitted register (present addr, then drive). @@ -56,10 +62,15 @@ module gs_prim_list_feeder #( localparam logic [7:0] REG_RGBAQ = 8'h01; localparam logic [7:0] REG_ST = 8'h02; // Ch342 — perspective ST (S/T) for FST=0 tris localparam logic [7:0] REG_UV = 8'h03; + // GS per-vertex FOG — XYZF2 vertex commit (reg 0x04). When the record's + // PRIM has FGE=1, the completing vertex is tagged XYZF2 so gs_stub decodes + // the fog byte (F=[63:56]) + 24-bit Z (Z=[55:32]); FGE=0 keeps XYZ2 (0x05). + localparam logic [7:0] REG_XYZF2 = 8'h04; localparam logic [7:0] REG_XYZ2 = 8'h05; localparam logic [7:0] REG_TEX0_1 = 8'h06; localparam logic [7:0] REG_ALPHA_1 = 8'h42; localparam logic [7:0] REG_TEST_1 = 8'h47; + localparam logic [7:0] REG_CLAMP_1 = 8'h48; localparam logic [7:0] REG_FRAME_1 = 8'h4C; localparam logic [7:0] REG_ZBUF_1 = 8'h4E; @@ -70,7 +81,7 @@ module gs_prim_list_feeder #( // Header registers (loaded once). logic [15:0] tri_count; - logic [63:0] hdr_q [0:5]; // [0]=FRAME [1]=ALPHA [2]=TEST [3]=ZBUF [4]=TEX0 [5]=PRIM + logic [63:0] hdr_q [0:6]; // legacy q[5]=PRIM; extended q[5]=CLAMP, q[6]=PRIM // setup-emit index -> GIF reg num (iverilog-12: no unpacked localparam array). function automatic logic [7:0] hdr_reg_num(input logic [2:0] i); unique case (i) @@ -78,15 +89,16 @@ module gs_prim_list_feeder #( 3'd1: hdr_reg_num = REG_ALPHA_1; 3'd2: hdr_reg_num = REG_TEST_1; 3'd3: hdr_reg_num = REG_ZBUF_1; - default: hdr_reg_num = REG_TEX0_1; + 3'd4: hdr_reg_num = REG_TEX0_1; + default: hdr_reg_num = REG_CLAMP_1; endcase endfunction typedef enum logic [3:0] { S_IDLE, - S_HDR_RD, S_HDR_LD, // read words 0..6 into tri_count/rect_count + hdr_q - S_SETUP, // emit FRAME/ALPHA/TEST/ZBUF/TEX0 from hdr_q - S_PRIM, // emit PRIM (hdr_q[5]) for the current tri + S_HDR_RD, S_HDR_LD, // read legacy words 0..6 or extended words 0..7 + S_SETUP, // emit FRAME/ALPHA/TEST/ZBUF/TEX0[/CLAMP] from hdr_q + S_PRIM, // emit the selected legacy/extended PRIM word S_VTX_RD, S_VTX_EMIT, // walk the 9 vertex words of the current tri S_AFTER_TRIS, // Ch334 — tris done; start rects if any, else done S_RECT_RD, S_RECT_LD, // Ch334 — read a rect's 3 words (color, corner0, corner1) @@ -97,8 +109,8 @@ module gs_prim_list_feeder #( localparam int WORDS_PER_RECT = 3; // Ch334 — color + corner0(XYZ2) + corner1(XYZ2) state_t state; - logic [3:0] hdr_i; // 0..6 header-word read index - logic [2:0] setup_i; // 0..4 setup-emit index + logic [3:0] hdr_i; // 0..6 legacy or 0..7 extended header-word index + logic [2:0] setup_i; // 0..4 legacy or 0..5 extended setup-emit index logic [15:0] tri_idx; // 0..tri_count-1 logic [3:0] vtx_word; // 0..8 within a tri @@ -121,13 +133,22 @@ module gs_prim_list_feeder #( // it); rects forced off. Same shared-state setup (FRAME/ALPHA/TEST/ZBUF/TEX0/PRIM). Narrow grammar: // PSMCT32 dest+tex, UV affine, ABE source-over, TCC texel alpha — the Ch344-proven subset. logic sprite_mode; + logic clamp_header_mode; + wire [3:0] header_last = clamp_header_mode ? 4'd7 : 4'd6; + wire [STG_ADDR_W-1:0] tris_base = clamp_header_mode ? STG_ADDR_W'(8) : STG_ADDR_W'(OFF_TRIS); + wire [63:0] prim_q = clamp_header_mode ? hdr_q[6] : hdr_q[5]; wire [4:0] words_per_prim = sprite_mode ? 5'd6 : 5'd9; // staging words per primitive wire [3:0] last_vtx_word = sprite_mode ? 4'd5 : 4'd8; // final XYZ2 of the primitive (the kick) + // GS per-vertex FOG — the record's PRIM.FGE (bit 5) selects the vertex + // commit register: FGE=1 → XYZF2 (0x04, carries the per-vertex fog byte), + // FGE=0 → XYZ2 (0x05) exactly as before. prim_q flows to gs_stub with its + // FGE bit intact (S_PRIM emit, unmasked), so gs_stub's ras_fge tracks it. + wire prim_fge = prim_q[5]; logic [7:0] vtx_reg_num; always_comb unique case (vtx_word % 3) 2'd0: vtx_reg_num = REG_RGBAQ; 2'd1: vtx_reg_num = perspective_mode ? REG_ST : REG_UV; - default: vtx_reg_num = REG_XYZ2; + default: vtx_reg_num = prim_fge ? REG_XYZF2 : REG_XYZ2; endcase wire vtx_completing = (vtx_word == last_vtx_word); // final XYZ2 = the FIFO push / kick @@ -149,7 +170,7 @@ module gs_prim_list_feeder #( default: rect_reg = REG_XYZ2; // 3,6,9,13,16,19 endcase unique case (rect_emit) - 5'd0, 5'd10: rect_dat = hdr_q[5]; // PRIM + 5'd0, 5'd10: rect_dat = prim_q; // PRIM 5'd1,5'd4,5'd7,5'd11,5'd14,5'd17: rect_dat = rect_color; // RGBAQ 5'd2,5'd5,5'd8,5'd12,5'd15,5'd18: rect_dat = 64'd0; // UV (uniform texture) 5'd3: rect_dat = mk_xyz2(rx0, ry0, rz); // tri1 v0 @@ -166,13 +187,13 @@ module gs_prim_list_feeder #( always_ff @(posedge clk or negedge rst_n) begin if (!rst_n) begin - state <= S_IDLE; tri_count <= 0; hdr_i <= 0; setup_i <= 0; perspective_mode <= 1'b0; sprite_mode <= 1'b0; + state <= S_IDLE; tri_count <= 0; hdr_i <= 0; setup_i <= 0; perspective_mode <= 1'b0; sprite_mode <= 1'b0; clamp_header_mode <= 1'b0; tri_idx <= 0; vtx_word <= 0; stg_rd_addr <= '0; gif_reg_wr_en <= 1'b0; gif_reg_num <= 8'd0; gif_reg_data <= 64'd0; done <= 1'b0; records_emitted <= 16'd0; fifo_wait_cycles <= 32'd0; rect_count <= 0; rect_idx <= 0; rect_word <= 0; rect_emit <= 0; rect_color <= 64'd0; rect_c0 <= 64'd0; rect_c1 <= 64'd0; - for (int k=0;k<6;k++) hdr_q[k] <= 64'd0; + for (int k=0;k<7;k++) hdr_q[k] <= 64'd0; end else begin gif_reg_wr_en <= 1'b0; done <= 1'b0; @@ -192,11 +213,12 @@ module gs_prim_list_feeder #( // (force rect_count 0 so the rect-expansion path can never run in this format). perspective_mode <= stg_rd_data[32]; sprite_mode <= stg_rd_data[33]; // Ch345a + clamp_header_mode <= stg_rd_data[34]; // Ch402 optional CLAMP_1 header // rects disallowed with the perspective OR sprite format. rect_count <= (stg_rd_data[32] || stg_rd_data[33]) ? 16'd0 : stg_rd_data[31:16]; end else hdr_q[hdr_i-4'd1] <= stg_rd_data; - if (hdr_i == 4'd6) begin // all of count + hdr_q[0..5] loaded + if (hdr_i == header_last) begin // legacy count+6 words, or extended count+7 setup_i <= 3'd0; state <= S_SETUP; end else begin hdr_i <= hdr_i + 4'd1; @@ -210,7 +232,7 @@ module gs_prim_list_feeder #( gif_reg_wr_en <= 1'b1; gif_reg_num <= hdr_reg_num(setup_i); gif_reg_data <= hdr_q[setup_i]; - if (setup_i == 3'd4) begin + if (setup_i == (clamp_header_mode ? 3'd5 : 3'd4)) begin tri_idx <= 16'd0; state <= (tri_count == 16'd0) ? S_AFTER_TRIS : S_PRIM; end else begin @@ -220,9 +242,9 @@ module gs_prim_list_feeder #( // ---- per triangle: PRIM, then 9 vertex words ---- S_PRIM: begin - gif_reg_wr_en <= 1'b1; gif_reg_num <= REG_PRIM; gif_reg_data <= hdr_q[5]; + gif_reg_wr_en <= 1'b1; gif_reg_num <= REG_PRIM; gif_reg_data <= prim_q; vtx_word <= 4'd0; - stg_rd_addr <= STG_ADDR_W'(OFF_TRIS) + STG_ADDR_W'(tri_idx * words_per_prim); + stg_rd_addr <= tris_base + STG_ADDR_W'(tri_idx * words_per_prim); state <= S_VTX_RD; end S_VTX_RD: state <= S_VTX_EMIT; // vert-word addr presented; data next cycle @@ -249,7 +271,7 @@ module gs_prim_list_feeder #( S_AFTER_TRIS: begin if (rect_count != 16'd0) begin rect_idx <= 16'd0; rect_word <= 2'd0; - stg_rd_addr <= STG_ADDR_W'(OFF_TRIS) + STG_ADDR_W'(tri_count * words_per_prim); + stg_rd_addr <= tris_base + STG_ADDR_W'(tri_count * words_per_prim); state <= S_RECT_RD; end else state <= S_DONE; end diff --git a/rtl/gif_gs/gs_stub.sv b/rtl/gif_gs/gs_stub.sv index 15f333d..b928609 100644 --- a/rtl/gif_gs/gs_stub.sv +++ b/rtl/gif_gs/gs_stub.sv @@ -450,6 +450,10 @@ module gs_stub // out, so every existing TB / the flat production build is byte-identical // (zero DSP/ALM/M20K cost). Only a perspective demo build sets it 1. parameter bit PERSPECTIVE_CORRECT = 1'b0, + // Preserve the low four XYZ2/XYZF2 screen-coordinate bits and evaluate + // triangle coverage at the GS 12.4 pixel center. Default off retains the + // integer/corner raster contract used by every pre-Ch416 fixture. + parameter bit SUBPIXEL_XY = 1'b0, // Ch351 — perspective reciprocal LUT width (forwarded to gs_persp_uv). Default 8 = byte-identical to // Ch342/348. Far-W draws (high PERSP_FRAC, small Q) set 11 for finer 1/w. Inert when PERSPECTIVE_CORRECT=0. parameter int PERSP_RECIP_IDX_BITS = 8, @@ -492,10 +496,10 @@ module gs_stub // DECAL exactly as pre-Ch344 — every existing TB / production build byte-identical. parameter bit SPRITE_TEX_ALPHA = 1'b0, // Ch347 — also admit PSMT8 (CLUT-indexed) textures into the textured-alpha SPRITE path. Default 0 - // keeps the proven Ch344 PSMCT32 sprite path byte-identical; when 1, a PSMT8 (TEX0.PSM=0x13) source- + // keeps the proven Ch344 PSMCT32 sprite path byte-identical; when 1, a PSMT8/PSMT4 indexed source- // over sprite takes the same half-rate texel+dest+blend path, with gs_texture_unit doing the // index->CLUT->ABGR decode upstream of the s1_tex_color capture (the CLUT must be loaded via a CLD!=0 - // TEX0 before the draw, same precondition as the proven indexed-DECAL path). PSMT4 stays out for v1. + // TEX0 before the draw, same precondition as the proven indexed-DECAL path). parameter bit SPRITE_TEX_ALPHA_CLUT = 1'b0, // ------------------------------------------------------------------ @@ -897,6 +901,7 @@ module gs_stub output logic [11:0] raster_pixel_y_q, output logic [63:0] raster_pixel_color_q, output logic [31:0] raster_pixel_fb_addr_q, + output logic [31:0] raster_pixel_z_q, // Ch357 — screen-linear fragment Z aligned with the emit (persp path) // Ch95: per-byte write enable + PSM tag for the raster // emit. PSMCT32 raster: be=4'b1111. PSMCT16 raster: be is // 4'b0011 or 4'b1100 depending on the addressed halfword @@ -913,6 +918,16 @@ module gs_stub // mem[i] <= (mem[i] & ~mask[i]) | (data[i] & mask[i]) output logic [31:0] raster_pixel_mask_q, output logic [5:0] raster_pixel_psm_q, + output logic raster_pixel_abe_q, + output logic [16:0] raster_pixel_alpha_q, + // Ch405 — external persistent-Z ROP state aligned with each raster + // fragment. The runtime scheduler now includes authentic translucent + // overlays that test the accumulated Z buffer but set ZBUF.ZMSK=1. + // ras_zte/ras_zmsk are primitive-stable and therefore stay aligned with + // the perspective emit just like ABE/ALPHA above. + output logic raster_pixel_ztest_q, + output logic [1:0] raster_pixel_ztst_q, + output logic raster_pixel_zmsk_q, // Ch323 — tile Z-FLUSH stream (TILE_SPILL_ENABLE only). One emit per tile pixel during // TP_ZFLUSH, on a SEPARATE channel from the color flush (raster_pixel_*) so the color // flush path/counts are byte-identical. z_flush_addr_o is the Z-BACKING-relative byte @@ -1227,6 +1242,10 @@ module gs_stub // the PSMT4 PSM value 6'h14 seen in the bpp tables — same numeric, totally // unrelated. Consumed only when BILINEAR_ENABLE=1. localparam logic [7:0] GIF_REG_TEX1_1 = 8'h14; + // GS per-vertex FOG — FOGCOL (GIF reg# 0x3D). Only the low 24 bits are + // meaningful: FCR=[7:0], FCG=[15:8], FCB=[23:16] (i.e. 0xBBGGRR). The + // per-vertex fog coefficient F blends the source RGB toward this color. + localparam logic [7:0] GIF_REG_FOGCOL = 8'h3D; localparam logic [7:0] GIF_REG_FRAME_1 = 8'h4C; localparam logic [7:0] GIF_REG_ZBUF_1 = 8'h4E; localparam logic [7:0] GIF_REG_BITBLTBUF = 8'h50; @@ -1253,6 +1272,9 @@ module gs_stub // Ch310 — TEX1_1 latch (internal). Reset to 0 → MMAG=0 = NEAREST default, // so an enabled build with no TEX1_1 write yet still samples nearest. logic [63:0] tex1_1_q; + // GS per-vertex FOG — FOGCOL latch (internal). Only bits [23:0] are used + // (0xBBGGRR). Reset to 0 → fog blends toward black until FOGCOL is written. + logic [23:0] fogcol_q; logic gif_is_known_reg; assign gif_is_known_reg = @@ -1268,6 +1290,7 @@ module gs_stub (gif_reg_num == GIF_REG_TEST_1 ) || (gif_reg_num == GIF_REG_CLAMP_1 ) || (gif_reg_num == GIF_REG_TEX1_1 ) || + (gif_reg_num == GIF_REG_FOGCOL ) || (gif_reg_num == GIF_REG_FRAME_1 ) || (gif_reg_num == GIF_REG_ZBUF_1 ) || (gif_reg_num == GIF_REG_BITBLTBUF) || @@ -1287,6 +1310,7 @@ module gs_stub scissor_1_q <= 64'h07FF_0000_07FF_0000; clamp_1_q <= 64'd0; // WMS=WMT=0 → REPEAT tex1_1_q <= 64'd0; // MMAG=0 → NEAREST + fogcol_q <= 24'd0; // FOGCOL = black until written xyz2_q <= 64'd0; xyzf2_q <= 64'd0; tex0_1_q <= 64'd0; @@ -1310,6 +1334,7 @@ module gs_stub GIF_REG_TEST_1: test_1_q <= gif_reg_data; GIF_REG_CLAMP_1: clamp_1_q <= gif_reg_data; GIF_REG_TEX1_1: tex1_1_q <= gif_reg_data; + GIF_REG_FOGCOL: fogcol_q <= gif_reg_data[23:0]; GIF_REG_FRAME_1: frame_1_q <= gif_reg_data; GIF_REG_ZBUF_1: zbuf_1_q <= gif_reg_data; GIF_REG_BITBLTBUF: bitbltbuf_q <= gif_reg_data; @@ -1391,6 +1416,13 @@ module gs_stub logic prim_tme; assign prim_tme = prim_q[4]; + // GS per-vertex FOG — PRIM.FGE (fog enable, bit 5 of PRIM). When 0 the + // fog blend at emit is bypassed and the pixel is byte-identical to the + // no-fog path. When 1, the post-texture/post-Gouraud RGB is blended with + // FOGCOL by the per-vertex-interpolated 8-bit fog coefficient F. + logic prim_fge; + assign prim_fge = prim_q[5]; + // Brick 2a — PRIM.ABE (alpha-blend enable, bit 6 of PRIM). When 0, // the blend path is bypassed and the emit is opaque (byte-identical // to pre-Brick-2a). ALPHA_1 sub-field decoders are combinational @@ -2006,6 +2038,9 @@ module gs_stub logic [11:0] ras_v0_x, ras_v0_y; logic [11:0] ras_v1_x, ras_v1_y; logic [11:0] ras_v2_x, ras_v2_y; + logic [3:0] ras_v0_xf, ras_v0_yf; + logic [3:0] ras_v1_xf, ras_v1_yf; + logic [3:0] ras_v2_xf, ras_v2_yf; logic [11:0] ras_x_min, ras_x_max; logic [11:0] ras_y_min, ras_y_max; logic [11:0] ras_cur_x, ras_cur_y; @@ -2032,6 +2067,7 @@ module gs_stub // source-over ALPHA_1 config. Held for the whole primitive (ABE is // constant per primitive), so the emit path is uniform. logic ras_abe; + logic ras_lpddr_abe; // Ch344 — in-flight flag: this SPRITE is the textured + source-over alpha path (isolated // half-rate texel-read/dest-read/blend). DERIVED, not packed: ras_abe is now set for both // flat AND textured-PSMCT32 alpha sprites (new_abe_active below, gated on SPRITE_TEX_ALPHA), @@ -2050,6 +2086,16 @@ module gs_stub // is byte-identical. logic [1:0] ras_alpha_a, ras_alpha_b, ras_alpha_c, ras_alpha_d; logic [7:0] ras_alpha_fix; + assign raster_pixel_abe_q = ras_lpddr_abe; + assign raster_pixel_alpha_q = {ras_lpddr_abe, ras_alpha_a, ras_alpha_b, ras_alpha_c, ras_alpha_d, ras_alpha_fix}; + // Use the architectural list state, not ras_zte: ras_zte describes the + // legacy *internal-BRAM* Z path and is deliberately disabled for textured + // triangles. The external LPDDR ROP is the owner for scheduler draws and + // consumes the raw TEST/ZBUF contract while those registers remain stable + // for the complete feeder list. + assign raster_pixel_ztest_q = test_zte; + assign raster_pixel_ztst_q = test_ztst; + assign raster_pixel_zmsk_q = zbuf_zmsk; // Brick 2b — in-flight Z-test context for the active scan. ras_zte // gates the depth-test path (high only for a FLAT PSMCT32 SPRITE @@ -2095,6 +2141,12 @@ module gs_stub logic [31:0] close_z; assign close_z = gif_reg_data[63:32]; + // GS per-vertex FOG — closing vertex's 8-bit fog coefficient. XYZF2 packs + // F in bits [63:56]; for a SPRITE the fog is flat, so the closing (last) + // vertex's F is THE fog coefficient for every pixel of the rectangle. + logic [7:0] close_f; + assign close_f = gif_reg_data[63:56]; + // For 3-vertex prims the slot mapping mirrors the prim_v*_q // snapshot logic: TRI/TRI_STRIP use {v_prev, v_curr, closing}; // TRI_FAN saturated uses {v_pivot, v_curr, closing}; FAN @@ -2108,6 +2160,15 @@ module gs_stub assign tri_v1_y_next = v_curr_q[31:20]; assign tri_v2_x_next = close_x; assign tri_v2_y_next = close_y; + logic [3:0] tri_v0_xf_next, tri_v0_yf_next; + logic [3:0] tri_v1_xf_next, tri_v1_yf_next; + logic [3:0] tri_v2_xf_next, tri_v2_yf_next; + assign tri_v0_xf_next = SUBPIXEL_XY ? (fan_sat_path ? v_pivot_q[3:0] : v_prev_q[3:0]) : 4'd0; + assign tri_v0_yf_next = SUBPIXEL_XY ? (fan_sat_path ? v_pivot_q[19:16]: v_prev_q[19:16]): 4'd0; + assign tri_v1_xf_next = SUBPIXEL_XY ? v_curr_q[3:0] : 4'd0; + assign tri_v1_yf_next = SUBPIXEL_XY ? v_curr_q[19:16] : 4'd0; + assign tri_v2_xf_next = SUBPIXEL_XY ? gif_reg_data[3:0] : 4'd0; + assign tri_v2_yf_next = SUBPIXEL_XY ? gif_reg_data[19:16] : 4'd0; // For SPRITE the slot mapping is {v_curr=first endpoint, // closing=second endpoint}. v0 / v1 form the diagonal corners. @@ -2117,6 +2178,11 @@ module gs_stub assign sp_v0_y_next = v_curr_q[31:20]; assign sp_v1_x_next = close_x; assign sp_v1_y_next = close_y; + logic [3:0] sp_v0_xf_next, sp_v0_yf_next, sp_v1_xf_next, sp_v1_yf_next; + assign sp_v0_xf_next = SUBPIXEL_XY ? v_curr_q[3:0] : 4'd0; + assign sp_v0_yf_next = SUBPIXEL_XY ? v_curr_q[19:16] : 4'd0; + assign sp_v1_xf_next = SUBPIXEL_XY ? gif_reg_data[3:0] : 4'd0; + assign sp_v1_yf_next = SUBPIXEL_XY ? gif_reg_data[19:16] : 4'd0; // Brick 1 — SPRITE texel coords at the two endpoints. v0 (first // endpoint) uses the windowed UV (uvc_curr_q); v1 (closing) uses @@ -2159,18 +2225,25 @@ module gs_stub // du_dx = ((u1 - u0) << 16) / (x1 - x0) // dv_dy = ((v1 - v0) << 16) / (y1 - y0) // A zero span (single-column/row sprite) yields step 0 so the - // coord holds the first endpoint's texel. These feed fifo_du_dx / - // fifo_dv_dy at push; the per-pixel datapath uses only the popped - // step with a multiply (dda_uv above) — no per-pixel divide. + // coord holds the first endpoint's texel. + // + // Ch357 (Codex) — the two setup divides are NO LONGER combinational here. The old + // du_dx = (sp_du<<<16)/sp_span_x ; dv_dy = (sp_dv<<<16)/sp_span_y + // were a -41.8ns setup path in the fabric (a full 32-bit `/` in a single design-clk cone). + // Instead: the sprite is enqueued immediately, its operands are captured PER FIFO SLOT at + // push, and ONE shared sequential divider (u_sp_uv_div, du then dv) solves them over many + // cycles into sp_dudx/sp_dvdy[slot]; pop_ok is blocked on that slot until both commit. The + // sequential result is bit-exact to `/` (gs_grad_divider), so the render is identical — only + // per-sprite setup latency changes. Read at pop as an override of the placeholder-0 attr field. logic signed [31:0] sp_span_x, sp_span_y; logic signed [31:0] sp_du, sp_dv; - logic signed [31:0] du_dx_next, dv_dy_next; + logic signed [31:0] sp_du_sh, sp_dv_sh; // pre-shifted numerators (same 32-bit ctx as the old <<<16) assign sp_span_x = $signed({20'd0, sp_v1_x_next}) - $signed({20'd0, sp_v0_x_next}); assign sp_span_y = $signed({20'd0, sp_v1_y_next}) - $signed({20'd0, sp_v0_y_next}); assign sp_du = $signed({21'd0, sp_u1_next}) - $signed({21'd0, sp_u0_next}); assign sp_dv = $signed({21'd0, sp_v1t_next}) - $signed({21'd0, sp_v0t_next}); - assign du_dx_next = (sp_span_x == 32'sd0) ? 32'sd0 : ((sp_du <<< 16) / sp_span_x); - assign dv_dy_next = (sp_span_y == 32'sd0) ? 32'sd0 : ((sp_dv <<< 16) / sp_span_y); + assign sp_du_sh = sp_du <<< 16; + assign sp_dv_sh = sp_dv <<< 16; // Edge-function evaluation for the current scan pixel inside a // triangle. Use 32-bit signed math: e(p) = (p.x - vA.x) * @@ -2182,17 +2255,26 @@ module gs_stub // EXCLUSIVE (strict e < 0). Implemented by a per-edge bias: 0 // for top-left, 1 for right/bottom; the comparison then // becomes (e + bias <= 0). - function automatic logic [31:0] edge_fn(input logic [11:0] px, + function automatic logic [34:0] edge_fn(input logic [11:0] px, input logic [11:0] py, input logic [11:0] ax, input logic [11:0] ay, + input logic [3:0] axf, + input logic [3:0] ayf, input logic [11:0] bx, - input logic [11:0] by); - logic signed [31:0] dpx, dpy, dbx, dby, prod; - dpx = $signed({20'd0, px}) - $signed({20'd0, ax}); - dpy = $signed({20'd0, py}) - $signed({20'd0, ay}); - dbx = $signed({20'd0, bx}) - $signed({20'd0, ax}); - dby = $signed({20'd0, by}) - $signed({20'd0, ay}); + input logic [11:0] by, + input logic [3:0] bxf, + input logic [3:0] byf); + logic signed [16:0] dpx, dpy, dbx, dby; + logic signed [34:0] prod; + // Integer mode samples the historic pixel corner. Subpixel mode + // samples (x+0.5,y+0.5), represented exactly as +8 in 12.4. + dpx = $signed({1'b0, px, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({1'b0, ax, axf}); + dpy = $signed({1'b0, py, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({1'b0, ay, ayf}); + dbx = $signed({1'b0, bx, bxf}) - $signed({1'b0, ax, axf}); + dby = $signed({1'b0, by, byf}) - $signed({1'b0, ay, ayf}); prod = dpx * dby - dpy * dbx; return prod; endfunction @@ -2201,38 +2283,52 @@ module gs_stub // traversal order, Y-down screen coords. function automatic logic top_or_left(input logic [11:0] ax, input logic [11:0] ay, + input logic [3:0] axf, + input logic [3:0] ayf, input logic [11:0] bx, - input logic [11:0] by); - logic signed [12:0] dx, dy; - dx = $signed({1'b0, bx}) - $signed({1'b0, ax}); - dy = $signed({1'b0, by}) - $signed({1'b0, ay}); - return (dy > 0) || ((dy == 32'sd0) && (dx > 0)); + input logic [11:0] by, + input logic [3:0] bxf, + input logic [3:0] byf); + logic signed [16:0] dx, dy; + dx = $signed({1'b0, bx, bxf}) - $signed({1'b0, ax, axf}); + dy = $signed({1'b0, by, byf}) - $signed({1'b0, ay, ayf}); + return (dy > 0) || ((dy == 17'sd0) && (dx > 0)); endfunction // Signed area of the original (pre-swap) triangle, computed // combinationally from the slot-mapped vertices. >0 = CCW, // <0 = CW, 0 = degenerate. Drives the FSM init's swap decision // and the degenerate skip. - logic signed [31:0] tri_sa_calc; + // Ch417 — area follows the same native 12.4 geometry as coverage. + // A 16-bit unsigned coordinate difference is signed 17-bit; the two + // products plus subtraction require a signed 35-bit determinant. + logic signed [34:0] tri_sa_calc; assign tri_sa_calc = - ($signed({20'd0, tri_v1_x_next}) - $signed({20'd0, tri_v0_x_next})) * - ($signed({20'd0, tri_v2_y_next}) - $signed({20'd0, tri_v0_y_next})) - - ($signed({20'd0, tri_v1_y_next}) - $signed({20'd0, tri_v0_y_next})) * - ($signed({20'd0, tri_v2_x_next}) - $signed({20'd0, tri_v0_x_next})); + ($signed({1'b0, tri_v1_x_next, tri_v1_xf_next}) - $signed({1'b0, tri_v0_x_next, tri_v0_xf_next})) * + ($signed({1'b0, tri_v2_y_next, tri_v2_yf_next}) - $signed({1'b0, tri_v0_y_next, tri_v0_yf_next})) - + ($signed({1'b0, tri_v1_y_next, tri_v1_yf_next}) - $signed({1'b0, tri_v0_y_next, tri_v0_yf_next})) * + ($signed({1'b0, tri_v2_x_next, tri_v2_xf_next}) - $signed({1'b0, tri_v0_x_next, tri_v0_xf_next})); logic tri_swap_ccw, tri_degenerate; - assign tri_swap_ccw = (tri_sa_calc < 32'sd0); - assign tri_degenerate = (tri_sa_calc == 32'sd0); + assign tri_swap_ccw = (tri_sa_calc < 35'sd0); + assign tri_degenerate = (tri_sa_calc == 35'sd0); // Post-swap CCW vertices. If sa < 0 we swap v1 and v2 so the // top-left rule below applies uniformly. logic [11:0] tri_v0x, tri_v0y, tri_v1x, tri_v1y, tri_v2x, tri_v2y; + logic [3:0] tri_v0xf, tri_v0yf, tri_v1xf, tri_v1yf, tri_v2xf, tri_v2yf; assign tri_v0x = tri_v0_x_next; assign tri_v0y = tri_v0_y_next; assign tri_v1x = tri_swap_ccw ? tri_v2_x_next : tri_v1_x_next; assign tri_v1y = tri_swap_ccw ? tri_v2_y_next : tri_v1_y_next; assign tri_v2x = tri_swap_ccw ? tri_v1_x_next : tri_v2_x_next; assign tri_v2y = tri_swap_ccw ? tri_v1_y_next : tri_v2_y_next; + assign tri_v0xf = tri_v0_xf_next; + assign tri_v0yf = tri_v0_yf_next; + assign tri_v1xf = tri_swap_ccw ? tri_v2_xf_next : tri_v1_xf_next; + assign tri_v1yf = tri_swap_ccw ? tri_v2_yf_next : tri_v1_yf_next; + assign tri_v2xf = tri_swap_ccw ? tri_v1_xf_next : tri_v2_xf_next; + assign tri_v2yf = tri_swap_ccw ? tri_v1_yf_next : tri_v2_yf_next; // Brick 3 — per-vertex fragment Z for the 3 triangle vertices. // Source Z follows the SAME {prev, curr, closing} (or {pivot, curr, @@ -2251,6 +2347,22 @@ module gs_stub assign tri_v1z = tri_swap_ccw ? tri_v2_z_next : tri_v1_z_next; assign tri_v2z = tri_swap_ccw ? tri_v1_z_next : tri_v2_z_next; + // GS per-vertex FOG — per-vertex 8-bit fog coefficient for the 3 triangle + // vertices. EXACT parallel of the tri_v*z Z mapping above: same + // {prev|pivot, curr, closing} slot source and the SAME v1<->v2 swap so F + // stays aligned to its physical vertex after the CCW canonicalization. F + // lives in bits [63:56] of the XYZF2 vertex word (fog byte). Interpolated + // affinely (screen-linear) across the primitive, exactly like the Gouraud + // color channels. + logic [7:0] tri_f0_next, tri_f1_next, tri_f2_next; + assign tri_f0_next = fan_sat_path ? v_pivot_q[63:56] : v_prev_q[63:56]; + assign tri_f1_next = v_curr_q[63:56]; + assign tri_f2_next = close_f; // gif_reg_data[63:56] + logic [7:0] tri_f0, tri_f1, tri_f2; + assign tri_f0 = tri_f0_next; + assign tri_f1 = tri_swap_ccw ? tri_f2_next : tri_f1_next; + assign tri_f2 = tri_swap_ccw ? tri_f1_next : tri_f2_next; + // Post-swap per-vertex Gouraud colors (same mapping the FIFO color // fields use), exposed as wires so the Brick-3 gradient setup can // read per-channel vertex attributes at the push cycle. @@ -2314,9 +2426,12 @@ module gs_stub // Per-edge top-left flag (1 = top-or-left, 0 = right/bottom). // Computed against the post-swap CCW order so bias[i] = ~tl[i]. logic tl0_init, tl1_init, tl2_init; - assign tl0_init = top_or_left(tri_v0x, tri_v0y, tri_v1x, tri_v1y); - assign tl1_init = top_or_left(tri_v1x, tri_v1y, tri_v2x, tri_v2y); - assign tl2_init = top_or_left(tri_v2x, tri_v2y, tri_v0x, tri_v0y); + assign tl0_init = top_or_left(tri_v0x, tri_v0y, tri_v0xf, tri_v0yf, + tri_v1x, tri_v1y, tri_v1xf, tri_v1yf); + assign tl1_init = top_or_left(tri_v1x, tri_v1y, tri_v1xf, tri_v1yf, + tri_v2x, tri_v2y, tri_v2xf, tri_v2yf); + assign tl2_init = top_or_left(tri_v2x, tri_v2y, tri_v2xf, tri_v2yf, + tri_v0x, tri_v0y, tri_v0xf, tri_v0yf); // Latched per-edge bias used in SCAN. ras_bias[i] = 1 means // the i-th edge is right/bottom (exclusive); 0 means top-left @@ -2352,6 +2467,12 @@ module gs_stub logic signed [31:0] ras_da_dx, ras_da_dy; logic signed [31:0] ras_dz_dx, ras_dz_dy; logic [31:0] ras_z0; + // GS per-vertex FOG — in-flight fog context (popped at SCAN start). + // ras_fge gates the emit fog blend; ras_f0 is the affine base F at post-swap + // v0 (flat sprite F for a SPRITE); ras_df_dx/dy are the Q16.16 gradients. + logic ras_fge; + logic [7:0] ras_f0; + logic signed [31:0] ras_df_dx, ras_df_dy; // Textured-triangle rung — in-flight affine U/V context. Base texel // coord at post-swap v0 + the 4 Q16.16 gradients (popped from the // FIFO at SCAN start, solved by the shared divider engine). @@ -2409,12 +2530,12 @@ module gs_stub // pre-swap tri_sa_calc negated when tri_swap_ccw). Computed here // directly on the post-swap vertices so the gradient solve is // self-consistent regardless of swap. - logic signed [31:0] tri_det_post; + logic signed [34:0] tri_det_post; assign tri_det_post = - ($signed({20'd0, tri_v1x}) - $signed({20'd0, tri_v0x})) * - ($signed({20'd0, tri_v2y}) - $signed({20'd0, tri_v0y})) - - ($signed({20'd0, tri_v2x}) - $signed({20'd0, tri_v0x})) * - ($signed({20'd0, tri_v1y}) - $signed({20'd0, tri_v0y})); + ($signed({1'b0, tri_v1x, tri_v1xf}) - $signed({1'b0, tri_v0x, tri_v0xf})) * + ($signed({1'b0, tri_v2y, tri_v2yf}) - $signed({1'b0, tri_v0y, tri_v0yf})) - + ($signed({1'b0, tri_v2x, tri_v2xf}) - $signed({1'b0, tri_v0x, tri_v0xf})) * + ($signed({1'b0, tri_v1y, tri_v1yf}) - $signed({1'b0, tri_v0y, tri_v0yf})); // Gradient solve, Q16.16 result. a0/a1/a2 are the post-swap // per-vertex attribute values; the (x,y) deltas are taken from the @@ -2453,36 +2574,38 @@ module gs_stub // truncation). Numerator width unchanged (signed 56-bit: see the // SYNTHESIS-WIDTH NOTE above for the bound derivation; the <<<16 is // applied here in the 56-bit numerator domain exactly as before). - function automatic logic signed [55:0] grad_num_dadx( + function automatic logic signed [63:0] grad_num_dadx( input logic signed [31:0] a0, input logic signed [31:0] a1, input logic signed [31:0] a2, - input logic signed [11:0] x0, input logic signed [11:0] y0, - input logic signed [11:0] x1, input logic signed [11:0] y1, - input logic signed [11:0] x2, input logic signed [11:0] y2); - logic signed [13:0] dy1, dy2; - logic signed [55:0] num; - dy1 = $signed({2'd0, y1}) - $signed({2'd0, y0}); - dy2 = $signed({2'd0, y2}) - $signed({2'd0, y0}); - num = (a1 - a0) * $signed({{42{dy2[13]}}, dy2}) - - (a2 - a0) * $signed({{42{dy1[13]}}, dy1}); - grad_num_dadx = num <<< 16; + input logic [15:0] x0, input logic [15:0] y0, + input logic [15:0] x1, input logic [15:0] y1, + input logic [15:0] x2, input logic [15:0] y2); + logic signed [16:0] dy1, dy2; + logic signed [63:0] num; + dy1 = $signed({1'b0, y1}) - $signed({1'b0, y0}); + dy2 = $signed({1'b0, y2}) - $signed({1'b0, y0}); + num = (a1 - a0) * $signed({{47{dy2[16]}}, dy2}) + - (a2 - a0) * $signed({{47{dy1[16]}}, dy1}); + // Coordinates are 12.4. Convert dA/d(X/16) to Q16.16: + // raw numerator * 16 * 2^16 / det = numerator << 20 / det. + grad_num_dadx = num <<< 20; endfunction - function automatic logic signed [55:0] grad_num_dady( + function automatic logic signed [63:0] grad_num_dady( input logic signed [31:0] a0, input logic signed [31:0] a1, input logic signed [31:0] a2, - input logic signed [11:0] x0, input logic signed [11:0] y0, - input logic signed [11:0] x1, input logic signed [11:0] y1, - input logic signed [11:0] x2, input logic signed [11:0] y2); - logic signed [13:0] dx1, dx2; - logic signed [55:0] num; - dx1 = $signed({2'd0, x1}) - $signed({2'd0, x0}); - dx2 = $signed({2'd0, x2}) - $signed({2'd0, x0}); - num = (a2 - a0) * $signed({{42{dx1[13]}}, dx1}) - - (a1 - a0) * $signed({{42{dx2[13]}}, dx2}); - grad_num_dady = num <<< 16; + input logic [15:0] x0, input logic [15:0] y0, + input logic [15:0] x1, input logic [15:0] y1, + input logic [15:0] x2, input logic [15:0] y2); + logic signed [16:0] dx1, dx2; + logic signed [63:0] num; + dx1 = $signed({1'b0, x1}) - $signed({1'b0, x0}); + dx2 = $signed({1'b0, x2}) - $signed({1'b0, x0}); + num = (a2 - a0) * $signed({{47{dx1[16]}}, dx1}) + - (a1 - a0) * $signed({{47{dx2[16]}}, dx2}); + grad_num_dady = num <<< 20; endfunction // Ch87 — raster command FIFO. Holds primitive contexts captured @@ -2544,7 +2667,7 @@ module gs_stub logic [31:0] tex_base; logic [13:0] tbw; logic [5:0] tpsm; logic [1:0] wms, wmt; logic [3:0] tw, th; logic signed [31:0] du_dx, dv_dy; - logic abe, filter_lin; + logic abe, lpddr_abe, filter_lin; logic [1:0] alpha_a, alpha_b, alpha_c, alpha_d; logic [7:0] alpha_fix; logic zte; logic [1:0] ztst; logic zmsk; logic [8:0] zbp; logic [31:0] zval; logic [31:0] z0; @@ -2585,7 +2708,12 @@ module gs_stub else if (pop_rd_issue) attr_rd_addr = pop_rd_addr; else attr_rd_addr = '0; end - always_ff @(posedge clk) attr_rd_q <= attr_ram[attr_rd_addr]; + // Ch357 (Codex) — write-forward the pipelined attr write to EVERY attr_ram reader (not just pop): when a read hits + // the slot whose registered word is committing THIS cycle (attr_wr_v && attr_wr_slot==addr), return attr_wr_word + // instead of the not-yet-written RAM. Covers the gradient prefetch + multiprim readers so a just-pushed slot reads + // its true attributes at push+1. + always_ff @(posedge clk) + attr_rd_q <= (attr_wr_v && (attr_wr_slot == attr_rd_addr)) ? attr_wr_word : attr_ram[attr_rd_addr]; `ifndef SYNTHESIS // mp (multiprim grid) and grad (prefetch) must be time-exclusive: neither arbitrates, each assumes // it owns the port the cycle it issues. all_grad_done gating the grid start guarantees this. @@ -2594,8 +2722,8 @@ module gs_stub $error("ch328 1c: mp+grad concurrent attr read — expected time-exclusive via all_grad_done"); `endif `ifndef SYNTHESIS - initial if (PRIM_ATTR_W != 1053) - $error("ch328: prim_attr_t width drifted to %0d (expected 1053) — pack/unpack/checker out of sync", PRIM_ATTR_W); + initial if (PRIM_ATTR_W != 1054) + $error("ch328: prim_attr_t width drifted to %0d (expected 1054) — pack/unpack/checker out of sync", PRIM_ATTR_W); `endif // delayed-copy pack-stage state: 1 cyc after push_ok, fifo_*[pack_slot] are settled logic pack_v; @@ -2615,13 +2743,13 @@ module gs_stub // fields (color/frame/tex/wrap/filter/alpha/ztst/zmsk/zbp) are identical in both branches. wire [PRIM_ATTR_W-1:0] tri_attr_word = { tri_v0x, tri_v0y, tri_v1x, tri_v1y, tri_v2x, tri_v2y, - {~tl2_init, ~tl1_init, ~tl0_init}, (tri_swap_ccw ? -tri_sa_calc : tri_sa_calc), + {~tl2_init, ~tl1_init, ~tl0_init}, tri_det_post[31:0], rgbaq_q, (fan_sat_path ? c_pivot_q : c_prev_q), (tri_swap_ccw ? rgbaq_q : c_curr_q), (tri_swap_ccw ? c_curr_q : rgbaq_q), frame_1_q[8:0], frame_1_q[21:16], frame_1_q[29:24], bpp_shift, close_tme_effective, 11'd0, 11'd0, 11'd0, 11'd0, tex_base_next, {8'd0, tex0_tbw}, tex0_psm, clamp_wms, clamp_wmt, tex0_tw, tex0_th, - 32'sd0, 32'sd0, 1'b0, tex1_mmag, + 32'sd0, 32'sd0, 1'b0, prim_abe, tex1_mmag, alpha_a, alpha_b, alpha_c, alpha_d, alpha_fix, new_tri_zte_active, test_ztst, zbuf_zmsk, zbuf_zbp, 32'd0, tri_v0z, tri_uv0_u, tri_uv0_v, {5'd0, tri_uv1_v, 5'd0, tri_uv1_u}, {5'd0, tri_uv2_v, 5'd0, tri_uv2_u}, @@ -2633,7 +2761,10 @@ module gs_stub frame_1_q[8:0], frame_1_q[21:16], frame_1_q[29:24], bpp_shift, prim_tme, sp_u0_next, sp_v0t_next, sp_u1_next, sp_v1t_next, tex_base_next, {8'd0, tex0_tbw}, tex0_psm, clamp_wms, clamp_wmt, tex0_tw, tex0_th, - du_dx_next, dv_dy_next, new_abe_active, tex1_mmag, + // The legacy BRAM sprite blender (new_abe_active) intentionally admits only + // its implemented subset. The external LPDDR ROP is generic, so preserve + // architectural PRIM.ABE independently for every sprite just as TRI does. + 32'sd0, 32'sd0, new_abe_active, prim_abe, tex1_mmag, // Ch357 — du_dx/dv_dy overridden at pop alpha_a, alpha_b, alpha_c, alpha_d, alpha_fix, new_zte_active, test_ztst, zbuf_zmsk, zbuf_zbp, close_z, 32'd0, 11'd0, 11'd0, 32'd0, 32'd0, @@ -2646,12 +2777,25 @@ module gs_stub logic [11:0] fifo_v1y [0:FIFO_DEPTH-1]; logic [11:0] fifo_v2x [0:FIFO_DEPTH-1]; logic [11:0] fifo_v2y [0:FIFO_DEPTH-1]; + // Ch416: low XYZ 12.4 bits are hot geometry sideband. Keeping them + // outside attr_ram avoids widening the already RAM-dense attribute word. + logic [3:0] fifo_v0xf [0:FIFO_DEPTH-1]; + logic [3:0] fifo_v0yf [0:FIFO_DEPTH-1]; + logic [3:0] fifo_v1xf [0:FIFO_DEPTH-1]; + logic [3:0] fifo_v1yf [0:FIFO_DEPTH-1]; + logic [3:0] fifo_v2xf [0:FIFO_DEPTH-1]; + logic [3:0] fifo_v2yf [0:FIFO_DEPTH-1]; logic [11:0] fifo_x_min [0:FIFO_DEPTH-1]; logic [11:0] fifo_x_max [0:FIFO_DEPTH-1]; logic [11:0] fifo_y_min [0:FIFO_DEPTH-1]; logic [11:0] fifo_y_max [0:FIFO_DEPTH-1]; logic [2:0] fifo_bias [0:FIFO_DEPTH-1]; logic signed [31:0] fifo_sa [0:FIFO_DEPTH-1]; + // Ch417 — true native-12.4 determinant for the gradient engine. The + // legacy 32-bit `sa` attribute remains only as an inert/debug snapshot; + // keeping the 35-bit value in this hot sideband avoids widening the + // already 94%-utilized per-primitive M20K word. + logic signed [34:0] fifo_grad_det [0:FIFO_DEPTH-1]; logic [63:0] fifo_color [0:FIFO_DEPTH-1]; logic [63:0] fifo_c0 [0:FIFO_DEPTH-1]; logic [63:0] fifo_c1 [0:FIFO_DEPTH-1]; @@ -2683,8 +2827,27 @@ module gs_stub // once per primitive at push (single divide each). logic signed [31:0] fifo_du_dx [0:FIFO_DEPTH-1]; logic signed [31:0] fifo_dv_dy [0:FIFO_DEPTH-1]; + // Ch357 (Codex) — SPRITE UV setup divide, deferred + sequential. Per FIFO slot: the two operand + // pairs captured at push, the two committed quotients read at pop, and a pending bit that blocks + // pop_ok until both quotients land. ONE shared sequential divider (u_sp_uv_div) solves du then dv. + logic signed [31:0] sp_op_du_sh [0:FIFO_DEPTH-1]; // (u1-u0)<<16 numerator + logic signed [31:0] sp_op_spanx [0:FIFO_DEPTH-1]; // (x1-x0) denominator + logic signed [31:0] sp_op_dv_sh [0:FIFO_DEPTH-1]; // (v1-v0)<<16 numerator + logic signed [31:0] sp_op_spany [0:FIFO_DEPTH-1]; // (y1-y0) denominator + logic signed [31:0] sp_dudx [0:FIFO_DEPTH-1]; // committed du/dx quotient (read at pop) + logic signed [31:0] sp_dvdy [0:FIFO_DEPTH-1]; // committed dv/dy quotient (read at pop) + logic [FIFO_DEPTH-1:0] sprite_setup_pending; // slot awaiting UV-divide commit -> blocks pop + // Shared sequential-divider FSM state. + typedef enum logic [1:0] { SPD_IDLE, SPD_DU_WAIT, SPD_DV_ISSUE, SPD_DV_WAIT } spd_state_e; + spd_state_e spd_state; + logic [FIFO_PTR_W-1:0] spd_slot; // slot currently being solved + logic spd_start; // pulse to u_sp_uv_div + logic signed [31:0] spd_num, spd_den; // operands presented to u_sp_uv_div + logic signed [31:0] spd_quo; + logic spd_busy_w, spd_done_w; // Brick 2a — per-primitive alpha-blend-active flag. logic fifo_abe [0:FIFO_DEPTH-1]; + logic fifo_lpddr_abe [0:FIFO_DEPTH-1]; // Ch310 — per-primitive bilinear-filter flag (TEX1_1.MMAG). Loaded always // (mirrors fifo_abe); consumed only when BILINEAR_ENABLE=1, so the default // build is byte-identical. @@ -2776,6 +2939,21 @@ module gs_stub // self-schedules across pending slots; v0.z is already in fifo_z0). logic [31:0] fifo_v1z [0:FIFO_DEPTH-1]; logic [31:0] fifo_v2z [0:FIFO_DEPTH-1]; + // GS per-vertex FOG — per-slot fog context. fifo_fge is the primitive's + // PRIM.FGE gate (HOT sideband, like fifo_tri_active). fifo_f0/f1/f2 are the + // three post-swap per-vertex 8-bit fog coefficients (f0 is the affine base, + // like fifo_z0 for Z; f1/f2 let the decoupled gradient engine recompute the + // F numerators at schedule time, like fifo_v1z/v2z for Z). For a SPRITE the + // fog is flat: f0 holds the closing vertex's F and f1/f2/df* are 0, so the + // per-pixel affine evaluation collapses to the constant f0. fifo_df_dx/dy + // are the Q16.16 gradients written by the shared divider engine (a triangle + // has no reader for them at FGE=0, so the no-fog path is byte-identical). + logic fifo_fge [0:FIFO_DEPTH-1]; + logic [7:0] fifo_f0 [0:FIFO_DEPTH-1]; + logic [7:0] fifo_f1 [0:FIFO_DEPTH-1]; + logic [7:0] fifo_f2 [0:FIFO_DEPTH-1]; + logic signed [31:0] fifo_df_dx [0:FIFO_DEPTH-1]; + logic signed [31:0] fifo_df_dy [0:FIFO_DEPTH-1]; // Ch295 — per-slot "gradients not yet solved" flag. Set when a TRI // is pushed; cleared by the shared single-divider setup engine when // it finishes writing all 10 gradient fields for that slot. pop_ok @@ -2798,6 +2976,16 @@ module gs_stub logic fifo_full; assign fifo_empty = (fifo_count == '0); assign fifo_full = (fifo_count == FIFO_CNT_W'(FIFO_DEPTH)); + // Ch357 (Codex) — PIPELINED attr_ram write. The push assembles attr_word_next (a deep concat of parsed GIF fields, + // incl. the sprite UV divide) and used to write attr_ram[fifo_wptr] SAME-cycle -> an 86 ns GIF-reg -> M20K path. + // Now: register {attr_word_next, fifo_wptr} on push_ok and commit to attr_ram ONE cycle later, so the deep assembly + // ends at a register (not the RAM write port). A per-slot attr_pending bit blocks pop_ok until the slot's write + // commits (the slot is valid at push+2 instead of push+1). Sustains one push/cycle (the register is re-armed each + // push while the prior word commits); simultaneous pop/push and FIFO-full are unaffected (attr_pending gates only pop). + logic attr_wr_v; + logic [FIFO_PTR_W-1:0] attr_wr_slot; + logic [PRIM_ATTR_W-1:0] attr_wr_word; + logic [FIFO_DEPTH-1:0] attr_pending; // Ch295 / Brick-3 fix — single time-shared gradient divider + setup // engine, DECOUPLED from the push. @@ -2829,7 +3017,17 @@ module gs_stub // the engine iterates the same 14 steps and the grad_num_q / // grad_load_num arrays are the same size as before — the param=0 // build is unchanged in size-effect and behavior. - localparam int GRAD_STEPS = PERSPECTIVE_CORRECT ? 20 : 14; + // GS per-vertex FOG — F rides the SAME shared-divider setup engine as the + // colour/Z/UV(/STQ) attributes, appended as the LAST two steps (dF/dx, + // dF/dy) so the existing step indices (and the perspective 14..19 block) + // are undisturbed. GRAD_STEPS grows by 2; grad_step is 5-bit (0..31) so it + // already covers the new max (21 w/ perspective). At FGE=0 the resulting + // fifo_df_dx/dy have no reader, so the extra 2 divide cycles per triangle + // leave the rendered framebuffer byte-identical. + localparam int GRAD_STEPS_PRE_FOG = PERSPECTIVE_CORRECT ? 20 : 14; + localparam int GRAD_F_DX = GRAD_STEPS_PRE_FOG; // 14 (or 20 w/ persp) + localparam int GRAD_F_DY = GRAD_STEPS_PRE_FOG + 1; // 15 (or 21 w/ persp) + localparam int GRAD_STEPS = GRAD_STEPS_PRE_FOG + 2; // 16 (or 22 w/ persp) logic grad_busy; logic [4:0] grad_step; // 0..13 (or 0..19 w/ perspective) logic [4:0] grad_settle; // Ch352 — divide settle counter (0..GRAD_DIV_CYCLES-1) @@ -2839,8 +3037,14 @@ module gs_stub (* preserve *) logic signed [31:0] grad_result_q; // settled divide captured here (the ONE multicycle endpoint) logic grad_writing; // Ch352 — write phase: grad_result_q -> fifo (single-cycle) logic [FIFO_PTR_W-1:0] grad_slot; - logic signed [31:0] grad_det_q; - logic signed [55:0] grad_num_q [0:GRAD_STEPS-1]; + logic signed [63:0] grad_det_q; + logic signed [63:0] grad_num_q [0:GRAD_STEPS-1]; + // Ch357 (Codex) — the SOLE registered numerator feeding the combinational divider on the BOARD path + // (GRAD_SEQ_DIVIDER=0 && GRAD_DIV_CYCLES!=1). Registering grad_num_q[grad_step] here removes the 20-way dynamic + // numerator mux from the divide's launch cone: the multicycle -from set shrinks from ~1157 regs + // (grad_num_q[0:19] + grad_det_q + grad_step) to ~88 (grad_num_sel_q + grad_det_q), so the timing-driven placer + // stops churning on ~37k relaxed paths. (* preserve *)'d so the SDC -from collection cannot silently orphan. + (* preserve *) logic signed [63:0] grad_num_sel_q; // Combinational "is there a slot waiting for gradients?" scan and the // index of the lowest such slot. Used only when the engine is idle to @@ -2866,13 +3070,18 @@ module gs_stub // by construction). Only ONE slot's worth is computed at a time (mux // by grad_pending_slot), so this is one set of the existing functions, // not FIFO_DEPTH copies — no new wide datapath. - logic signed [55:0] grad_load_num [0:GRAD_STEPS-1]; - logic signed [31:0] grad_load_det; + logic signed [63:0] grad_load_num [0:GRAD_STEPS-1]; + logic signed [63:0] grad_load_det; logic [63:0] grad_ld_c0, grad_ld_c1, grad_ld_c2; logic [11:0] grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y; + logic [3:0] grad_ld_v0xf, grad_ld_v0yf, grad_ld_v1xf, grad_ld_v1yf, grad_ld_v2xf, grad_ld_v2yf; + logic [15:0] grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4; logic [31:0] grad_ld_z0, grad_ld_z1, grad_ld_z2; // Textured-triangle rung — per-vertex U/V for the slot being loaded. logic [10:0] grad_ld_u0, grad_ld_v0u, grad_ld_u1, grad_ld_v1u, grad_ld_u2, grad_ld_v2u; + // GS per-vertex FOG — per-vertex F for the slot being loaded (HOT sidebands, + // read by grad_slot exactly like the vertex fractions below). + logic [7:0] grad_ld_f0, grad_ld_f1, grad_ld_f2; // Ch301 perspective — per-vertex S/T/Q for the slot being loaded. // Declared unconditionally (cheap); only ASSIGNED + used by the // param-gated grad_load_num[14..19] block below. @@ -2909,7 +3118,7 @@ module gs_stub logic [11:0] gw_v0x,gw_v0y,gw_v1x,gw_v1y,gw_v2x,gw_v2y; logic [2:0] gw_d_bias; logic signed [31:0] gw_sa; logic [63:0] gw_d_color, gw_c0, gw_c1, gw_c2; logic [8:0] gw_d_fbp; logic [5:0] gw_d_fbw,gw_d_psm; logic [1:0] gw_d_bpp; logic gw_d_tme; logic [10:0] gw_d_u0,gw_d_v0,gw_d_u1,gw_d_v1; logic [31:0] gw_d_texb; logic [13:0] gw_d_tbw; logic [5:0] gw_d_tpsm; - logic [1:0] gw_d_wms,gw_d_wmt; logic [3:0] gw_d_tw,gw_d_th; logic signed [31:0] gw_d_dudx,gw_d_dvdy; logic gw_d_abe,gw_d_flin; + logic [1:0] gw_d_wms,gw_d_wmt; logic [3:0] gw_d_tw,gw_d_th; logic signed [31:0] gw_d_dudx,gw_d_dvdy; logic gw_d_abe,gw_d_lpddr_abe,gw_d_flin; logic [1:0] gw_d_aa,gw_d_ab,gw_d_ac,gw_d_ad; logic [7:0] gw_d_afix; logic gw_d_zte; logic [1:0] gw_d_ztst; logic gw_d_zmsk; logic [8:0] gw_d_zbp; logic [31:0] gw_d_zval; logic [31:0] gw_z0; logic [10:0] gw_u0b,gw_v0b; logic [31:0] gw_u1v,gw_u2v; @@ -2918,7 +3127,7 @@ module gs_stub always_comb begin { gw_v0x,gw_v0y,gw_v1x,gw_v1y,gw_v2x,gw_v2y,gw_d_bias,gw_sa,gw_d_color,gw_c0,gw_c1,gw_c2, gw_d_fbp,gw_d_fbw,gw_d_psm,gw_d_bpp,gw_d_tme,gw_d_u0,gw_d_v0,gw_d_u1,gw_d_v1,gw_d_texb,gw_d_tbw,gw_d_tpsm, - gw_d_wms,gw_d_wmt,gw_d_tw,gw_d_th,gw_d_dudx,gw_d_dvdy,gw_d_abe,gw_d_flin,gw_d_aa,gw_d_ab,gw_d_ac,gw_d_ad,gw_d_afix, + gw_d_wms,gw_d_wmt,gw_d_tw,gw_d_th,gw_d_dudx,gw_d_dvdy,gw_d_abe,gw_d_lpddr_abe,gw_d_flin,gw_d_aa,gw_d_ab,gw_d_ac,gw_d_ad,gw_d_afix, gw_d_zte,gw_d_ztst,gw_d_zmsk,gw_d_zbp,gw_d_zval,gw_z0,gw_u0b,gw_v0b,gw_u1v,gw_u2v, gw_d_persp,gw_s0b,gw_t0b,gw_q0b,gw_stq1,gw_stq2,gw_q1,gw_q2,gw_v1z,gw_v2z } = grad_word_q; grad_ld_c0 = gw_c0; @@ -2930,6 +3139,18 @@ module gs_stub grad_ld_v1y = gw_v1y; grad_ld_v2x = gw_v2x; grad_ld_v2y = gw_v2y; + // Fractions are hot FIFO sidebands rather than M20K attributes. + // grad_slot is latched before grad_word_q and remains stable for the + // complete solve, so these are aligned with the prefetched word. + grad_ld_v0xf = fifo_v0xf[grad_slot]; grad_ld_v0yf = fifo_v0yf[grad_slot]; + grad_ld_v1xf = fifo_v1xf[grad_slot]; grad_ld_v1yf = fifo_v1yf[grad_slot]; + grad_ld_v2xf = fifo_v2xf[grad_slot]; grad_ld_v2yf = fifo_v2yf[grad_slot]; + // GS per-vertex FOG — F is a HOT sideband (not an attr_ram field), so it + // is read by grad_slot alongside the vertex fractions above. + grad_ld_f0 = fifo_f0[grad_slot]; grad_ld_f1 = fifo_f1[grad_slot]; grad_ld_f2 = fifo_f2[grad_slot]; + grad_ld_v0x4 = {grad_ld_v0x, grad_ld_v0xf}; grad_ld_v0y4 = {grad_ld_v0y, grad_ld_v0yf}; + grad_ld_v1x4 = {grad_ld_v1x, grad_ld_v1xf}; grad_ld_v1y4 = {grad_ld_v1y, grad_ld_v1yf}; + grad_ld_v2x4 = {grad_ld_v2x, grad_ld_v2xf}; grad_ld_v2y4 = {grad_ld_v2y, grad_ld_v2yf}; grad_ld_z0 = gw_z0; grad_ld_z1 = gw_v1z; grad_ld_z2 = gw_v2z; @@ -2939,40 +3160,50 @@ module gs_stub grad_ld_v1u = gw_u1v [26:16]; grad_ld_u2 = gw_u2v [10:0]; grad_ld_v2u = gw_u2v [26:16]; - grad_load_det = gw_sa; + grad_load_det = $signed({{29{fifo_grad_det[grad_slot][34]}}, fifo_grad_det[grad_slot]}); grad_load_num[0] = grad_num_dadx({24'd0, grad_ld_c0[7:0]}, {24'd0, grad_ld_c1[7:0]}, {24'd0, grad_ld_c2[7:0]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[1] = grad_num_dady({24'd0, grad_ld_c0[7:0]}, {24'd0, grad_ld_c1[7:0]}, {24'd0, grad_ld_c2[7:0]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[2] = grad_num_dadx({24'd0, grad_ld_c0[15:8]}, {24'd0, grad_ld_c1[15:8]}, {24'd0, grad_ld_c2[15:8]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[3] = grad_num_dady({24'd0, grad_ld_c0[15:8]}, {24'd0, grad_ld_c1[15:8]}, {24'd0, grad_ld_c2[15:8]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[4] = grad_num_dadx({24'd0, grad_ld_c0[23:16]}, {24'd0, grad_ld_c1[23:16]}, {24'd0, grad_ld_c2[23:16]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[5] = grad_num_dady({24'd0, grad_ld_c0[23:16]}, {24'd0, grad_ld_c1[23:16]}, {24'd0, grad_ld_c2[23:16]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[6] = grad_num_dadx({24'd0, grad_ld_c0[31:24]}, {24'd0, grad_ld_c1[31:24]}, {24'd0, grad_ld_c2[31:24]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[7] = grad_num_dady({24'd0, grad_ld_c0[31:24]}, {24'd0, grad_ld_c1[31:24]}, {24'd0, grad_ld_c2[31:24]}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[8] = grad_num_dadx(grad_ld_z0, grad_ld_z1, grad_ld_z2, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[9] = grad_num_dady(grad_ld_z0, grad_ld_z1, grad_ld_z2, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); // Textured-triangle rung — U (steps 10/11) and V (steps 12/13). // U/V are 11-bit unsigned integer texel coords; zero-extend to // the signed[31:0] attribute input the existing numerator // functions take. Same shared divisor (grad_load_det) → same // affine plane solve as the colour/Z attributes. grad_load_num[10] = grad_num_dadx({21'd0, grad_ld_u0}, {21'd0, grad_ld_u1}, {21'd0, grad_ld_u2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[11] = grad_num_dady({21'd0, grad_ld_u0}, {21'd0, grad_ld_u1}, {21'd0, grad_ld_u2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[12] = grad_num_dadx({21'd0, grad_ld_v0u}, {21'd0, grad_ld_v1u}, {21'd0, grad_ld_v2u}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[13] = grad_num_dady({21'd0, grad_ld_v0u}, {21'd0, grad_ld_v1u}, {21'd0, grad_ld_v2u}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); + // GS per-vertex FOG — F (steps GRAD_F_DX/GRAD_F_DY). 8-bit fog coeff + // zero-extended to the signed[31:0] attribute input the numerator + // functions take. Same shared divisor (grad_load_det) → same affine + // plane solve as colour/Z. These indices are ALWAYS the last two of + // grad_load_num[0:GRAD_STEPS-1] regardless of the perspective param + // (the persp 14..19 block never overlaps them). + grad_load_num[GRAD_F_DX] = grad_num_dadx({24'd0, grad_ld_f0}, {24'd0, grad_ld_f1}, {24'd0, grad_ld_f2}, + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); + grad_load_num[GRAD_F_DY] = grad_num_dady({24'd0, grad_ld_f0}, {24'd0, grad_ld_f1}, {24'd0, grad_ld_f2}, + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); end // Ch301 perspective — per-vertex S/T/Q load + the 6 extra gradient @@ -2999,19 +3230,19 @@ module gs_stub grad_ld_q2 = gw_q2; // S (steps 14/15) grad_load_num[14] = grad_num_dadx({8'd0, grad_ld_s0}, {8'd0, grad_ld_s1}, {8'd0, grad_ld_s2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[15] = grad_num_dady({8'd0, grad_ld_s0}, {8'd0, grad_ld_s1}, {8'd0, grad_ld_s2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); // T (steps 16/17) grad_load_num[16] = grad_num_dadx({8'd0, grad_ld_t0}, {8'd0, grad_ld_t1}, {8'd0, grad_ld_t2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[17] = grad_num_dady({8'd0, grad_ld_t0}, {8'd0, grad_ld_t1}, {8'd0, grad_ld_t2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); // Q (steps 18/19) grad_load_num[18] = grad_num_dadx({8'd0, grad_ld_q0}, {8'd0, grad_ld_q1}, {8'd0, grad_ld_q2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); grad_load_num[19] = grad_num_dady({8'd0, grad_ld_q0}, {8'd0, grad_ld_q1}, {8'd0, grad_ld_q2}, - grad_ld_v0x, grad_ld_v0y, grad_ld_v1x, grad_ld_v1y, grad_ld_v2x, grad_ld_v2y); + grad_ld_v0x4, grad_ld_v0y4, grad_ld_v1x4, grad_ld_v1y4, grad_ld_v2x4, grad_ld_v2y4); end end else begin : g_no_grad_stq // Tie the S/T/Q load wires low so they have a single driver @@ -3027,37 +3258,83 @@ module gs_stub // path. Mirrors the previous per-call expression exactly: // (num <<< 16) / det, truncated to [31:0]. The <<<16 was already // folded into grad_num_q by grad_num_dadx/dady. - logic signed [55:0] grad_quo; - always_comb begin - if (grad_det_q == 32'sd0) - grad_quo = 56'sd0; - else - grad_quo = grad_num_q[grad_step] - / $signed({{24{grad_det_q[31]}}, grad_det_q}); - end + logic signed [63:0] grad_quo; logic signed [31:0] grad_result; - assign grad_result = grad_quo[31:0]; + // Ch357 (Codex) — MUTUALLY-EXCLUSIVE dividers by generate. The production combinational divider exists in the + // netlist ONLY when GRAD_SEQ_DIVIDER=0. When GRAD_SEQ_DIVIDER=1 (diagnostic/alternate build) there is no + // combinational divide at all: + // the FSM's SEQ branch captures div_quo from gs_grad_divider (registered iterations, no cone), and grad_quo/ + // grad_result tie off to 0 and synthesize away. This removes the ambiguity of the earlier attempt (the `/` was + // unconditionally present and merely EXPECTED to optimize out — it never did). + generate + if (!GRAD_SEQ_DIVIDER) begin : g_combdiv + // Numerator source: GRAD_DIV_CYCLES!=1 uses the REGISTERED grad_num_sel_q (20-way mux captured a cycle + // earlier -> tiny divide cone); GRAD_DIV_CYCLES==1 legacy sim reads grad_num_q[grad_step] BYTE-IDENTICAL. + wire signed [63:0] grad_div_num = (GRAD_DIV_CYCLES != 1) ? grad_num_sel_q : grad_num_q[grad_step]; + // Ch417b — keep Quartus' inferred lpm_divide numerator at its + // supported maximum of exactly 64 bits. A signed 64/64 `/` + // causes Quartus to prepend a sign-magnitude bit and request + // LPM_WIDTHN=65, which fails Analysis & Synthesis (Error 272006). + // The determinant is natively signed-35, so divide explicit + // unsigned magnitudes (64/35) and restore the quotient sign. + // This is bit-exact to signed `/`: magnitude division truncates + // toward zero and the two's-complement sign is applied afterward. + wire grad_div_neg = grad_div_num[63] ^ grad_det_q[63]; + wire [63:0] grad_div_num_mag = grad_div_num[63] + ? (~$unsigned(grad_div_num) + 64'd1) + : $unsigned(grad_div_num); + wire [34:0] grad_div_den_35 = grad_det_q[34:0]; + wire [34:0] grad_div_den_mag = grad_div_den_35[34] + ? (~grad_div_den_35 + 35'd1) + : grad_div_den_35; + wire [63:0] grad_div_mag_quo = grad_div_num_mag / grad_div_den_mag; + always_comb begin + if (grad_div_den_mag == 35'd0) + grad_quo = 64'sd0; + else if (grad_div_neg) + grad_quo = $signed(~grad_div_mag_quo + 64'd1); + else + grad_quo = $signed(grad_div_mag_quo); + end + assign grad_result = grad_quo[31:0]; + end else begin : g_no_combdiv + // GRAD_SEQ_DIVIDER=1 alternate build: NO combinational divide. grad_quo/grad_result are unused (the FSM captures + // div_quo); tie them off so nothing infers a divider and they optimize away. + always_comb grad_quo = 64'sd0; + assign grad_result = 32'sd0; + end + endgenerate - // Ch352 — SEQUENTIAL divider (GRAD_SEQ_DIVIDER=1): registered iterations, no combinational cone. The FSM + // Ch352 — alternate SEQUENTIAL divider (GRAD_SEQ_DIVIDER=1): registered iterations, no combinational cone. The FSM // pulses div_start with grad_num_q[grad_step]/sign-extended grad_det_q, waits div_done, and captures // div_quo[31:0] into grad_result_q. Bit-exact to the combinational `/` above (tb_gs_grad_divider). When // GRAD_SEQ_DIVIDER=0 the instance is generate-stripped and these tie inert (combinational path used). logic div_start; - logic signed [55:0] div_quo; + logic signed [63:0] div_quo; logic div_busy_w, div_done_w; generate if (GRAD_SEQ_DIVIDER) begin : g_seqdiv - gs_grad_divider #(.W(56)) u_grad_div ( + gs_grad_divider #(.W(64)) u_grad_div ( .clk(clk), .rst_n(rst_n), .start(div_start), .num(grad_num_q[grad_step]), - .den($signed({{24{grad_det_q[31]}}, grad_det_q})), + .den(grad_det_q), .quo(div_quo), .busy(div_busy_w), .done(div_done_w) ); end else begin : g_no_seqdiv - assign div_quo = 56'sd0; assign div_busy_w = 1'b0; assign div_done_w = 1'b0; + assign div_quo = 64'sd0; assign div_busy_w = 1'b0; assign div_done_w = 1'b0; end endgenerate + // Ch357 (Codex) — SPRITE UV setup divider. UNCONDITIONAL (unlike the gradient one): the combinational + // sprite divide was removed outright, so this instance must always exist. Shared for du then dv (one + // divide in flight at a time), driven by the SPD FSM below. W=32 matches the operands' self-determined + // 32-bit context, so spd_quo == $signed(num)/$signed(den) — bit-exact to the old `/` (den==0 -> 0). + gs_grad_divider #(.W(32)) u_sp_uv_div ( + .clk(clk), .rst_n(rst_n), .start(spd_start), + .num(spd_num), .den(spd_den), + .quo(spd_quo), .busy(spd_busy_w), .done(spd_done_w) + ); + // Ch352 — FIFO write data. GRAD_SEQ_DIVIDER: the captured div_quo lives in grad_result_q. Else the original // path: GRAD_DIV_CYCLES==1 writes the combinational divide directly (byte-identical), K>1 writes grad_result_q. wire signed [31:0] grad_wr_data = GRAD_SEQ_DIVIDER ? grad_result_q @@ -3125,21 +3402,29 @@ module gs_stub // coords (ras_cur_x/ras_cur_y). The combined primitive is always a // TRIANGLE, so the inside test is the biased edge-function test on the // held pixel (same math as the S1 stage, evaluated at ras_cur_*). - logic [31:0] comb_e0, comb_e1, comb_e2; + logic [34:0] comb_e0, comb_e1, comb_e2; logic comb_pix_inside_w; - assign comb_e0 = edge_fn(ras_cur_x, ras_cur_y, ras_v0_x, ras_v0_y, ras_v1_x, ras_v1_y); - assign comb_e1 = edge_fn(ras_cur_x, ras_cur_y, ras_v1_x, ras_v1_y, ras_v2_x, ras_v2_y); - assign comb_e2 = edge_fn(ras_cur_x, ras_cur_y, ras_v2_x, ras_v2_y, ras_v0_x, ras_v0_y); + assign comb_e0 = edge_fn(ras_cur_x, ras_cur_y, + ras_v0_x, ras_v0_y, ras_v0_xf, ras_v0_yf, + ras_v1_x, ras_v1_y, ras_v1_xf, ras_v1_yf); + assign comb_e1 = edge_fn(ras_cur_x, ras_cur_y, + ras_v1_x, ras_v1_y, ras_v1_xf, ras_v1_yf, + ras_v2_x, ras_v2_y, ras_v2_xf, ras_v2_yf); + assign comb_e2 = edge_fn(ras_cur_x, ras_cur_y, + ras_v2_x, ras_v2_y, ras_v2_xf, ras_v2_yf, + ras_v0_x, ras_v0_y, ras_v0_xf, ras_v0_yf); assign comb_pix_inside_w = - ($signed(comb_e0 + {31'd0, ras_bias[0]}) <= 32'sd0) - & ($signed(comb_e1 + {31'd0, ras_bias[1]}) <= 32'sd0) - & ($signed(comb_e2 + {31'd0, ras_bias[2]}) <= 32'sd0); + ($signed(comb_e0 + {34'd0, ras_bias[0]}) <= 35'sd0) + & ($signed(comb_e1 + {34'd0, ras_bias[1]}) <= 35'sd0) + & ($signed(comb_e2 + {34'd0, ras_bias[2]}) <= 35'sd0); // Held-pixel offsets from post-swap v0 (same right-sized signed-16 // narrowing the S2 interpolators use) for Z interpolation. logic signed [31:0] comb_dx, comb_dy; - assign comb_dx = $signed({20'd0, ras_cur_x}) - $signed({20'd0, ras_v0_x}); - assign comb_dy = $signed({20'd0, ras_cur_y}) - $signed({20'd0, ras_v0_y}); + assign comb_dx = $signed({15'd0, ras_cur_x, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_x, ras_v0_xf}); + assign comb_dy = $signed({15'd0, ras_cur_y, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_y, ras_v0_yf}); // Held-pixel interpolated fragment Z (affine, same evaluator as the // legacy TRI Z path). @@ -3184,7 +3469,7 @@ module gs_stub logic [15:0] p; begin p = ({8'd0,t} * {8'd0,c}) >> 7; gs_mod8 = (p > 16'd255) ? 8'hFF : p[7:0]; end endfunction function automatic logic [31:0] gs_modulate_abgr(input logic [31:0] tex, input logic [31:0] col); - gs_modulate_abgr = {tex[31:24], // A: keep texel alpha (opaque blend via unity tex) + gs_modulate_abgr = {gs_mod8(tex[31:24], col[31:24]), // A (TCC=1): texture alpha * vertex alpha gs_mod8(tex[23:16], col[23:16]), // B gs_mod8(tex[15:8], col[15:8]), // G gs_mod8(tex[7:0], col[7:0])}; // R @@ -3235,7 +3520,7 @@ module gs_stub // Combined blend — DEDICATED instance so the legacy u_blend datapath // is untouched (byte-identical at param=0). Cs = sampled texel, - // Cd = dest pixel read back, As = texel alpha. Same source-over math. + // Cd = destination pixel; As is the selected source alpha (modulated for TFX=MODULATE,TCC=1). logic [7:0] comb_blend_r, comb_blend_g, comb_blend_b, comb_blend_a; generate if (COMBINED_TAZ) begin : g_comb_blend @@ -4065,6 +4350,7 @@ module gs_stub // S1 stage registers logic [11:0] s1_x_q, s1_y_q; + logic [31:0] s1_z_q; // Ch357 — fragment Z captured WITH s1_x_q from the aligned raster stage (comb_frag_z + center) logic s1_valid_q; // S2 stage registers @@ -4075,19 +4361,25 @@ module gs_stub raster_mode_e s2_mode_q; // mirrored — ras_mode could change between scans // S1 combinational: edge functions on the s1 stage's latched coords. - logic [31:0] s1_e0, s1_e1, s1_e2; - logic [31:0] s1_e0_biased, s1_e1_biased, s1_e2_biased; + logic [34:0] s1_e0, s1_e1, s1_e2; + logic [34:0] s1_e0_biased, s1_e1_biased, s1_e2_biased; logic s1_in_triangle; logic s1_pixel_inside; - assign s1_e0 = edge_fn(s1_x_q, s1_y_q, ras_v0_x, ras_v0_y, ras_v1_x, ras_v1_y); - assign s1_e1 = edge_fn(s1_x_q, s1_y_q, ras_v1_x, ras_v1_y, ras_v2_x, ras_v2_y); - assign s1_e2 = edge_fn(s1_x_q, s1_y_q, ras_v2_x, ras_v2_y, ras_v0_x, ras_v0_y); - assign s1_e0_biased = s1_e0 + {31'd0, ras_bias[0]}; - assign s1_e1_biased = s1_e1 + {31'd0, ras_bias[1]}; - assign s1_e2_biased = s1_e2 + {31'd0, ras_bias[2]}; - assign s1_in_triangle = ($signed(s1_e0_biased) <= 32'sd0) - & ($signed(s1_e1_biased) <= 32'sd0) - & ($signed(s1_e2_biased) <= 32'sd0); + assign s1_e0 = edge_fn(s1_x_q, s1_y_q, + ras_v0_x, ras_v0_y, ras_v0_xf, ras_v0_yf, + ras_v1_x, ras_v1_y, ras_v1_xf, ras_v1_yf); + assign s1_e1 = edge_fn(s1_x_q, s1_y_q, + ras_v1_x, ras_v1_y, ras_v1_xf, ras_v1_yf, + ras_v2_x, ras_v2_y, ras_v2_xf, ras_v2_yf); + assign s1_e2 = edge_fn(s1_x_q, s1_y_q, + ras_v2_x, ras_v2_y, ras_v2_xf, ras_v2_yf, + ras_v0_x, ras_v0_y, ras_v0_xf, ras_v0_yf); + assign s1_e0_biased = s1_e0 + {34'd0, ras_bias[0]}; + assign s1_e1_biased = s1_e1 + {34'd0, ras_bias[1]}; + assign s1_e2_biased = s1_e2 + {34'd0, ras_bias[2]}; + assign s1_in_triangle = ($signed(s1_e0_biased) <= 35'sd0) + & ($signed(s1_e1_biased) <= 35'sd0) + & ($signed(s1_e2_biased) <= 35'sd0); assign s1_pixel_inside = (ras_mode == RM_SPRITE) ? 1'b1 : (ras_mode == RM_TRI) ? s1_in_triangle : 1'b0; @@ -4180,8 +4472,10 @@ module gs_stub // here it is evaluated on the texture-stage coords so the sampled // texel lines up with the pixel emitted at that location. logic signed [31:0] tex_dx, tex_dy; - assign tex_dx = $signed({20'd0, tex_coord_x}) - $signed({20'd0, ras_v0_x}); - assign tex_dy = $signed({20'd0, tex_coord_y}) - $signed({20'd0, ras_v0_y}); + assign tex_dx = $signed({15'd0, tex_coord_x, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_x, ras_v0_xf}); + assign tex_dy = $signed({15'd0, tex_coord_y, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_y, ras_v0_yf}); // Ch301 perspective — the perspective divide runs its OWN longer pipeline // off the S1 stage (gs_persp_uv 4 cyc + texel 1 cyc), gated by the S1-timed @@ -4191,8 +4485,10 @@ module gs_stub // the affine registered-read path uses) — else the numerators are one pixel // ahead of their valid/emit-coord and the texture shifts by one texel. logic signed [31:0] tex_dx_s1, tex_dy_s1; - assign tex_dx_s1 = $signed({20'd0, s1_x_q}) - $signed({20'd0, ras_v0_x}); - assign tex_dy_s1 = $signed({20'd0, s1_y_q}) - $signed({20'd0, ras_v0_y}); + assign tex_dx_s1 = $signed({15'd0, s1_x_q, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_x, ras_v0_xf}); + assign tex_dy_s1 = $signed({15'd0, s1_y_q, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_y, ras_v0_yf}); // Triangle-interpolated affine U/V (reuses the 32x16 interp_affine_uv). logic [10:0] s1_u_tri, s1_v_tri; @@ -4268,15 +4564,26 @@ module gs_stub // PERSPECTIVE_CORRECT generate; tied 0 in the else so the param=0 // build is byte-identical (ras_persp is constant 0 there too). logic [10:0] persp_u, persp_v; + logic [3:0] persp_u_frac, persp_v_frac; logic persp_outvalid; logic [11:0] persp_x5, persp_y5; + logic [31:0] persp_z5; // Ch357 — fragment Z aligned to persp_x5/persp_y5 (via the shift register below) logic persp_emit5; logic [5:0] persp_inflight; // in-flight count for the drain gate logic persp_pipe_busy; // OR-reduce: any perspective work pending + logic persp_in_valid; + localparam logic [1:0] PB_IDLE = 2'd0, PB_WAIT = 2'd1, PB_RELEASE = 2'd2; + logic [1:0] persp_bili_state; + wire persp_bili_mode = BILINEAR_ENABLE && PALETTE_BILINEAR && ras_persp + && ((ras_tpsm == 6'h13) || (ras_tpsm == 6'h14)); generate if (PERSPECTIVE_CORRECT) begin : g_persp_emit - logic persp_in_valid; - assign persp_in_valid = ras_persp && s1_valid_q && s1_pixel_inside; + // A perspective sample is accepted only on a real pipeline + // advance. Without this handshake, a Z/alpha frozen beat can + // submit the held S1 pixel more than once. + assign persp_in_valid = ras_persp && s1_valid_q && s1_pixel_inside + && z_advance && ta_advance + && (!persp_bili_mode || (persp_bili_state == PB_IDLE)); `ifdef CH351_TRACE // Ch351 trace: dump the per-pixel interpolated perspective attributes for one scanline. If @@ -4301,7 +4608,9 @@ module gs_stub .q (s1_q_persp), .out_valid(persp_outvalid), .u (persp_u), - .v (persp_v) + .v (persp_v), + .u_frac (persp_u_frac), + .v_frac (persp_v_frac) ); // 5-deep shift register of {x,y} so persp_x5/persp_y5 hold the @@ -4309,20 +4618,28 @@ module gs_stub // cycle (S1+5). reg[4] is the +5 tap. logic [11:0] persp_x_sr [0:4]; logic [11:0] persp_y_sr [0:4]; + // Ch357 — parallel 5-deep Z shift register. Z is computed HERE, at the pipe input, using the CURRENT triangle's + // Z plane (ras_z0/dz/v0) — which matches s1_x_q's triangle — and sampled at the pixel CENTER (s1+0.5). Shifting + // it 5 deep aligns persp_z5 with persp_x5/persp_y5 while avoiding the stale-next-triangle-plane hazard a + // combinational eval at persp_x5 would hit at triangle boundaries. + logic [31:0] persp_z_sr [0:4]; always_ff @(posedge clk or negedge rst_n) begin if (!rst_n) begin for (int i = 0; i < 5; i++) begin persp_x_sr[i] <= 12'd0; persp_y_sr[i] <= 12'd0; + persp_z_sr[i] <= 32'd0; end persp_emit5 <= 1'b0; persp_inflight <= 6'd0; end else begin persp_x_sr[0] <= s1_x_q; persp_y_sr[0] <= s1_y_q; + persp_z_sr[0] <= s1_z_q; // aligned Z, captured with s1_x_q from the raster stage for (int i = 1; i < 5; i++) begin persp_x_sr[i] <= persp_x_sr[i-1]; persp_y_sr[i] <= persp_y_sr[i-1]; + persp_z_sr[i] <= persp_z_sr[i-1]; end // Emit strobe = persp_outvalid (S1+4) registered once // → lands at S1+5, exactly when s1_tex_color is the @@ -4340,19 +4657,25 @@ module gs_stub end assign persp_x5 = persp_x_sr[4]; assign persp_y5 = persp_y_sr[4]; + assign persp_z5 = persp_z_sr[4]; // Busy while any divide is in flight OR an emit is about to // fire this cycle (persp_emit5 / persp_outvalid not yet drained). assign persp_pipe_busy = (persp_inflight != 6'd0) - || persp_outvalid || persp_emit5; + || persp_outvalid || persp_emit5 + || (persp_bili_state != PB_IDLE); end else begin : g_no_persp_emit assign persp_u = 11'd0; assign persp_v = 11'd0; + assign persp_u_frac = 4'd0; + assign persp_v_frac = 4'd0; assign persp_outvalid = 1'b0; assign persp_x5 = 12'd0; assign persp_y5 = 12'd0; + assign persp_z5 = 32'd0; assign persp_emit5 = 1'b0; assign persp_inflight = 6'd0; assign persp_pipe_busy = 1'b0; + assign persp_in_valid = 1'b0; end endgenerate @@ -4400,10 +4723,14 @@ module gs_stub .v (ras_persp ? persp_v : s1_v), // Ch310 — fractional UV for BILINEAR. Perspective passes 0 fracs // (bilinear demo uses the affine TRI path). Unused at BILINEAR_ENABLE=0. - .u_frac (ras_persp ? 4'd0 : s1_u_frac), - .v_frac (ras_persp ? 4'd0 : s1_v_frac), + .u_frac (ras_persp ? persp_u_frac : s1_u_frac), + .v_frac (ras_persp ? persp_v_frac : s1_v_frac), // Ch310 — per-primitive runtime filter select (TEX1_1.MMAG snapshot). - .filter_lin (ras_filter_lin), + // The SH3 perspective fixture is entirely TEX1.MMAG=LINEAR. Its + // compact staging header predates TEX1, so the production indexed + // bilinear profile treats perspective indexed draws as linear while + // retaining the architectural TEX1 selector on every other path. + .filter_lin (ras_filter_lin || persp_bili_mode), .tbp0_base_bytes (ras_tex_base), .tbw (ras_tbw), .psm (ras_tpsm), @@ -4579,8 +4906,8 @@ module gs_stub function automatic logic [7:0] ta_mod8(input logic [7:0] t, input logic [7:0] c); logic [15:0] p; begin p = ({8'd0,t} * {8'd0,c}) >> 7; ta_mod8 = (p > 16'd255) ? 8'hFF : p[7:0]; end endfunction - logic [31:0] ta_cs; // MODULATEd source color (texel alpha kept) - assign ta_cs = {ta_tex_q1[31:24], + logic [31:0] ta_cs; // MODULATEd source color, including TCC texture*vertex alpha + assign ta_cs = {ta_mod8(ta_tex_q1[31:24], ras_color[31:24]), ta_mod8(ta_tex_q1[23:16], ras_color[23:16]), ta_mod8(ta_tex_q1[15:8], ras_color[15:8]), ta_mod8(ta_tex_q1[7:0], ras_color[7:0])}; @@ -4589,7 +4916,7 @@ module gs_stub logic [7:0] ta_br, ta_bg, ta_bb, ta_ba; gs_alpha_blend u_ta_blend ( .cs_r (ta_cs[7:0]), .cs_g (ta_cs[15:8]), .cs_b (ta_cs[23:16]), - .as (ta_tex_q1[31:24]), + .as (ta_cs[31:24]), .cd_r (ta_cd[7:0]), .cd_g (ta_cd[15:8]), .cd_b (ta_cd[23:16]), .cv_r (ta_br), .cv_g (ta_bg), .cv_b (ta_bb), .a_out (ta_ba) ); @@ -4616,8 +4943,10 @@ module gs_stub // // Color channels clamp to [0,255]; Z keeps the full 32-bit value. logic signed [31:0] s2_dx, s2_dy; - assign s2_dx = $signed({20'd0, s2_x_q}) - $signed({20'd0, ras_v0_x}); - assign s2_dy = $signed({20'd0, s2_y_q}) - $signed({20'd0, ras_v0_y}); + assign s2_dx = $signed({15'd0, s2_x_q, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_x, ras_v0_xf}); + assign s2_dy = $signed({15'd0, s2_y_q, (SUBPIXEL_XY ? 4'd8 : 4'd0)}) + - $signed({15'd0, ras_v0_y, ras_v0_yf}); // Ch296 — per-pixel multiplier resize (Quartus area fit). The // affine step is `dadx*dx + dady*dy`. `dadx`/`dady` are signed @@ -4643,24 +4972,43 @@ module gs_stub input logic signed [31:0] dady, input logic signed [31:0] dx, input logic signed [31:0] dy); - logic signed [15:0] dxw, dyw; // pixel offsets, true width - logic signed [47:0] prod_x, prod_y; // 32×16 signed products + logic signed [16:0] dxw, dyw; // 12.4 sample offsets + logic signed [48:0] prod_x, prod_y; // 32x17 signed products logic signed [63:0] acc; logic signed [63:0] step; logic signed [63:0] val; - dxw = dx[15:0]; - dyw = dy[15:0]; + dxw = dx[16:0]; + dyw = dy[16:0]; prod_x = dadx * dxw; // 32×16 signed prod_y = dady * dyw; // 32×16 signed - step = $signed({{16{prod_x[47]}}, prod_x}) - + $signed({{16{prod_y[47]}}, prod_y}); - acc = step >>> 16; // arithmetic >>16 + step = $signed({{15{prod_x[48]}}, prod_x}) + + $signed({{15{prod_y[48]}}, prod_y}); + acc = step >>> 20; // Q16.16 gradient x Q4 offset val = $signed({56'd0, base0}) + acc; if (val < 64'sd0) interp_affine8 = 8'd0; else if (val > 64'sd255) interp_affine8 = 8'd255; else interp_affine8 = val[7:0]; endfunction + // GS per-vertex FOG blend. Per PS2 GS: each RGB channel is + // Cf = (C * F + FOGCOL * (255 - F)) >> 8 + // where C is the post-texture/post-Gouraud channel, F the 8-bit per-pixel + // fog coefficient, FOGCOL the 0xBBGGRR register color. The result is a + // convex combination (weights F and 255-F sum to 255) times at most 255, so + // the sum is <= 255*255 = 65025 and (>>8) <= 254 — no clamp needed. Alpha is + // NOT fogged (passed through unchanged). Input/output are ABGR8888. + function automatic logic [31:0] fog_blend_abgr(input logic [31:0] c, + input logic [7:0] f, + input logic [23:0] fogcol); + logic [7:0] inv; // 255 - F + logic [15:0] br, bg, bb; // 8x8 + 8x8 accumulators + inv = 8'd255 - f; + br = (c[7:0] * f) + (fogcol[7:0] * inv); // R + bg = (c[15:8] * f) + (fogcol[15:8] * inv); // G + bb = (c[23:16] * f) + (fogcol[23:16] * inv); // B + fog_blend_abgr = {c[31:24], bb[15:8], bg[15:8], br[15:8]}; // >>8, alpha unchanged + endfunction + // Affine evaluator for the full 32-bit fragment Z (no clamp). function automatic logic [31:0] interp_affine_z( input logic [31:0] base0, @@ -4668,17 +5016,17 @@ module gs_stub input logic signed [31:0] dady, input logic signed [31:0] dx, input logic signed [31:0] dy); - logic signed [15:0] dxw, dyw; // pixel offsets, true width - logic signed [47:0] prod_x, prod_y; // 32×16 signed products + logic signed [16:0] dxw, dyw; + logic signed [48:0] prod_x, prod_y; logic signed [63:0] step; logic signed [63:0] val; - dxw = dx[15:0]; - dyw = dy[15:0]; + dxw = dx[16:0]; + dyw = dy[16:0]; prod_x = dadx * dxw; // 32×16 signed prod_y = dady * dyw; // 32×16 signed - step = $signed({{16{prod_x[47]}}, prod_x}) - + $signed({{16{prod_y[47]}}, prod_y}); - val = $signed({32'd0, base0}) + (step >>> 16); + step = $signed({{15{prod_x[48]}}, prod_x}) + + $signed({{15{prod_y[48]}}, prod_y}); + val = $signed({32'd0, base0}) + (step >>> 20); interp_affine_z = val[31:0]; endfunction @@ -4696,17 +5044,17 @@ module gs_stub input logic signed [31:0] dady, input logic signed [31:0] dx, input logic signed [31:0] dy); - logic signed [15:0] dxw, dyw; // pixel offsets, true width - logic signed [47:0] prod_x, prod_y; // 32×16 signed products + logic signed [16:0] dxw, dyw; + logic signed [48:0] prod_x, prod_y; logic signed [63:0] step; logic signed [63:0] val; - dxw = dx[15:0]; - dyw = dy[15:0]; + dxw = dx[16:0]; + dyw = dy[16:0]; prod_x = dadx * dxw; // 32×16 signed prod_y = dady * dyw; // 32×16 signed - step = $signed({{16{prod_x[47]}}, prod_x}) - + $signed({{16{prod_y[47]}}, prod_y}); - val = $signed({53'd0, base0}) + (step >>> 16); + step = $signed({{15{prod_x[48]}}, prod_x}) + + $signed({{15{prod_y[48]}}, prod_y}); + val = $signed({53'd0, base0}) + (step >>> 20); if (val < 64'sd0) interp_affine_uv = 11'd0; else if (val > 64'sd2047) interp_affine_uv = 11'd2047; else interp_affine_uv = val[10:0]; @@ -4729,21 +5077,21 @@ module gs_stub input logic signed [31:0] dady, input logic signed [31:0] dx, input logic signed [31:0] dy); - logic signed [15:0] dxw, dyw; // pixel offsets, true width - logic signed [47:0] prod_x, prod_y; // 32×16 signed products + logic signed [16:0] dxw, dyw; + logic signed [48:0] prod_x, prod_y; logic signed [63:0] step; logic signed [63:0] val; - dxw = dx[15:0]; - dyw = dy[15:0]; + dxw = dx[16:0]; + dyw = dy[16:0]; prod_x = dadx * dxw; prod_y = dady * dyw; - step = $signed({{16{prod_x[47]}}, prod_x}) - + $signed({{16{prod_y[47]}}, prod_y}); - val = $signed({53'd0, base0}) + (step >>> 16); - // frac = step[15:12] (the truncated sub-texel bits), 0 at the clamps. + step = $signed({{15{prod_x[48]}}, prod_x}) + + $signed({{15{prod_y[48]}}, prod_y}); + val = $signed({53'd0, base0}) + (step >>> 20); + // After the Q4 offset multiply, bits 19:16 are the /16 texel fraction. if (val < 64'sd0) interp_affine_uv_frac = 4'd0; else if (val > 64'sd2047) interp_affine_uv_frac = 4'd0; - else interp_affine_uv_frac = step[15:12]; + else interp_affine_uv_frac = step[19:16]; endfunction // Ch301 perspective — WIDE affine evaluator for a 24-bit perspective @@ -4763,17 +5111,17 @@ module gs_stub input logic signed [31:0] dady, input logic signed [31:0] dx, input logic signed [31:0] dy); - logic signed [15:0] dxw, dyw; // pixel offsets, true width - logic signed [47:0] prod_x, prod_y; // 32×16 signed products + logic signed [16:0] dxw, dyw; + logic signed [48:0] prod_x, prod_y; logic signed [63:0] step; logic signed [63:0] val; - dxw = dx[15:0]; - dyw = dy[15:0]; + dxw = dx[16:0]; + dyw = dy[16:0]; prod_x = dadx * dxw; // 32×16 signed prod_y = dady * dyw; // 32×16 signed - step = $signed({{16{prod_x[47]}}, prod_x}) - + $signed({{16{prod_y[47]}}, prod_y}); - val = $signed({40'd0, base0}) + (step >>> 16); + step = $signed({{15{prod_x[48]}}, prod_x}) + + $signed({{15{prod_y[48]}}, prod_y}); + val = $signed({40'd0, base0}) + (step >>> 20); interp_affine_wide = val[23:0]; endfunction @@ -4783,6 +5131,13 @@ module gs_stub assign s2_interp_b = interp_affine8(ras_c0_q[23:16], ras_db_dx, ras_db_dy, s2_dx, s2_dy); assign s2_interp_a = interp_affine8(ras_c0_q[31:24], ras_da_dx, ras_da_dy, s2_dx, s2_dy); + // GS per-vertex FOG — per-pixel fog coefficient at the S2 stage, computed + // from the SAME (s2_dx,s2_dy) pixel offset as the Gouraud color channels so + // F is aligned to the pixel it fogs (no S0/S1-vs-S2 shift). For a SPRITE + // ras_df_dx/dy are 0, so this collapses to the flat ras_f0 constant. + logic [7:0] s2_fog_f; + assign s2_fog_f = interp_affine8(ras_f0, ras_df_dx, ras_df_dy, s2_dx, s2_dy); + // Ch335 — combined-path per-pixel interpolated (Gouraud) color, computed from the HELD // candidate pixel's offset (comb_dx/comb_dy) so it aligns with s1_tex_color at CB_T. For a // FLAT primitive the gradients are 0 so this collapses to ras_c0_q (the constant color) — i.e. @@ -4801,6 +5156,108 @@ module gs_stub assign s2_interp_color = {ras_c2_q[63:32], // Q passthrough s2_interp_a, s2_interp_b, s2_interp_g, s2_interp_r}; + // Ch403 — perspective texturing used to bypass TEX0.TFX entirely and emit + // the raw texel at S1+5. Reuse the already-existing S2 Gouraud result and + // delay it four clocks: S2 is one clock behind the perspective pipe's S1 + // input, so this 4-deep register aligns its color with persp_x5/y5 and the + // returned texel without adding another set of color interpolators. + logic [31:0] persp_interp_color5; + generate + if (PERSPECTIVE_CORRECT) begin : g_persp_color_align + logic [31:0] color_sr [0:3]; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + for (int i = 0; i < 4; i++) color_sr[i] <= 32'd0; + end else begin + color_sr[0] <= s2_interp_color[31:0]; + for (int i = 1; i < 4; i++) color_sr[i] <= color_sr[i-1]; + end + end + assign persp_interp_color5 = color_sr[3]; + end else begin : g_no_persp_color_align + assign persp_interp_color5 = 32'd0; + end + endgenerate + + // GS per-vertex FOG (perspective path) — the fog coefficient F is AFFINE / + // screen-linear (like the Gouraud colour), NOT perspective-divided, so it is + // interpolated by the SAME s2_fog_f evaluator and delayed to align with the + // persp_emit5 stage. EXACT mirror of persp_interp_color5 above: s2_fog_f is + // at S2 (one clock behind the perspective pipe's S1 input, persp_x_sr[0] <= + // s1_x_q), so a 4-deep register lands it at S1+5 alongside persp_x5/persp_y5 + // and the returned texel. Getting this depth right is what keeps the fog + // from 1-pixel-shifting relative to the perspective texel. + logic [7:0] persp_fog_f5; + generate + if (PERSPECTIVE_CORRECT) begin : g_persp_fog_align + logic [7:0] fog_sr [0:3]; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + for (int i = 0; i < 4; i++) fog_sr[i] <= 8'd0; + end else begin + fog_sr[0] <= s2_fog_f; + for (int i = 1; i < 4; i++) fog_sr[i] <= fog_sr[i-1]; + end + end + assign persp_fog_f5 = fog_sr[3]; + end else begin : g_no_persp_fog_align + assign persp_fog_f5 = 8'd0; + end + endgenerate + + // One shared MODULATE datapath serves the mutually-exclusive affine + // combined and perspective emit paths. This avoids synthesizing a second + // set of three 8x8 channel multipliers for Ch403. + wire [31:0] modulate_vertex_color = ras_persp ? persp_interp_color5 + : comb_interp_color; + wire [31:0] modulated_s1_tex_color = gs_modulate_abgr(s1_tex_color, + modulate_vertex_color); + + // Ch415 — serialize palette-bilinear perspective samples around the + // texture cache's single read port. One S1 pixel launches, the normal + // reciprocal pipeline runs, then the raster walker holds while the + // proven four-tap sampler fetches and blends. Launch advances S1 normally + // after accepting the sample; PB_WAIT holds while it returns and + // PB_RELEASE contributes one final hold cycle so the next S1 sample is + // launched rather than skipped. + logic [11:0] persp_bili_x_q, persp_bili_y_q; + logic [31:0] persp_bili_z_q, persp_bili_color_q; + // GS per-vertex FOG — held +5-aligned F for the palette-bilinear perspective + // emit (captured at the same PB_WAIT/persp_emit5 event as persp_bili_x_q). + logic [7:0] persp_bili_fog_q; + wire [31:0] persp_bili_mod_color = gs_modulate_abgr(s1_tex_color, + persp_bili_color_q); + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + persp_bili_state <= PB_IDLE; + persp_bili_x_q <= 12'd0; + persp_bili_y_q <= 12'd0; + persp_bili_z_q <= 32'd0; + persp_bili_color_q <= 32'd0; + persp_bili_fog_q <= 8'd0; + end else if (!persp_bili_mode) begin + persp_bili_state <= PB_IDLE; + end else begin + unique case (persp_bili_state) + PB_IDLE: if (persp_in_valid) + persp_bili_state <= PB_WAIT; + PB_WAIT: if (s1_tex_outvalid) + persp_bili_state <= PB_RELEASE; + PB_RELEASE: + persp_bili_state <= PB_IDLE; + default: + persp_bili_state <= PB_IDLE; + endcase + if ((persp_bili_state == PB_WAIT) && persp_emit5) begin + persp_bili_x_q <= persp_x5; + persp_bili_y_q <= persp_y5; + persp_bili_z_q <= persp_z5; + persp_bili_color_q <= persp_interp_color5; + persp_bili_fog_q <= persp_fog_f5; + end + end + end + // ---------------------------------------------------------------- // Ch95 — PSM-aware emit packing. // @@ -4841,10 +5298,19 @@ module gs_stub // exactly as before. s2_tex_active_q is only ever set for // SPRITE+TME+(PSMCT32|PSMT8), so when it's low the SPRITE path is // byte-identical to pre-Brick-1. - logic [63:0] s2_sprite_color64; - assign s2_sprite_color64 = s2_tex_active_q + logic [63:0] s2_sprite_color64_raw; + assign s2_sprite_color64_raw = s2_tex_active_q ? {ras_color[63:32], s2_tex_color_q} : ras_color; + // GS per-vertex FOG — blend the post-texture RGB toward FOGCOL when FGE=1. + // Applied at this single source-color chokepoint so every downstream + // consumer (s2_natural_abgr pack, the PSMCT32 emit, the Z-tested emit color) + // sees the fogged color. Gated on ras_fge → FGE=0 is byte-identical. + logic [63:0] s2_sprite_color64; + assign s2_sprite_color64 = ras_fge + ? {s2_sprite_color64_raw[63:32], + fog_blend_abgr(s2_sprite_color64_raw[31:0], s2_fog_f, fogcol_q)} + : s2_sprite_color64_raw; // Textured-triangle rung — for a TME PSMCT32 TRIANGLE the sampled // texel REPLACES the interpolated Gouraud color (DECAL), mirroring @@ -4853,10 +5319,17 @@ module gs_stub // s2_interp_color exactly — the legacy Gouraud emit is byte-identical. // ZTE/ABE are OFF for this rung (architect scope), so the texel goes // straight to the emit color with no blend/Z interaction. - logic [63:0] s2_tri_color64; - assign s2_tri_color64 = s2_tex_active_q + logic [63:0] s2_tri_color64_raw; + assign s2_tri_color64_raw = s2_tex_active_q ? {s2_interp_color[63:32], s2_tex_color_q} : s2_interp_color; + // GS per-vertex FOG — blend the post-texture/post-Gouraud RGB toward FOGCOL + // when FGE=1 (see the SPRITE note above). Gated → FGE=0 byte-identical. + logic [63:0] s2_tri_color64; + assign s2_tri_color64 = ras_fge + ? {s2_tri_color64_raw[63:32], + fog_blend_abgr(s2_tri_color64_raw[31:0], s2_fog_f, fogcol_q)} + : s2_tri_color64_raw; assign s2_natural_abgr = (s2_mode_q == RM_TRI) ? s2_tri_color64[31:0] : s2_sprite_color64[31:0]; @@ -4980,6 +5453,10 @@ module gs_stub + {20'd0, persp_x5}; assign persp_fb_addr = s2_fbp_bytes + (persp_pixel_index << ras_bpp_shift); + // Ch357 — persp_z5 (screen-linear fragment Z for the LPDDR-Z ROP) is produced by a 5-deep shift register INSIDE the + // persp generate block (below), capturing the Z at the pipe INPUT when the triangle's Z plane is still current — so it + // aligns with persp_x5/persp_y5 (which are s1_x/y delayed 5) and does NOT read a stale next-triangle Z plane. + // Ch122 — optional PSMCT32 raster swizzle. The swizzle module // is purely combinational; we feed it the raster's per-cycle // (s2_x_q, s2_y_q) plus the active framebuffer's (FBP, FBW) @@ -5185,7 +5662,8 @@ module gs_stub && (frame_1_q[29:24] == 6'h00) // PSMCT32 dest && prim_tme && ((tex0_psm == 6'h00) // PSMCT32 texel (Ch344), or - || (SPRITE_TEX_ALPHA_CLUT && tex0_psm == 6'h13)) // PSMT8 CLUT texel (Ch347) + || (SPRITE_TEX_ALPHA_CLUT && + ((tex0_psm == 6'h13) || (tex0_psm == 6'h14)))) // indexed CLUT texel && alpha_is_source_over; // Brick 2b — is the CLOSING primitive a Z-tested FLAT PSMCT32 SPRITE? @@ -5387,6 +5865,8 @@ module gs_stub // so the normal streaming pop is permanently disabled. TILE_MULTIPRIM is a // compile-time 0 by default, so this term folds away → byte-identical. assign pop_ok = !fifo_empty && !fifo_grad_pending[fifo_rptr] && + !attr_pending[fifo_rptr] && // Ch357 — hold the slot until its pipelined attr_ram write lands + !sprite_setup_pending[fifo_rptr] && // Ch357 — hold the slot until its sprite UV divide commits !clut_stall_eff && !(TILE_LOCAL && TILE_MULTIPRIM) && ((raster_state == R_IDLE) || ras_drain_done); @@ -5434,11 +5914,16 @@ module gs_stub { ras_v0_x, ras_v0_y, ras_v1_x, ras_v1_y, ras_v2_x, ras_v2_y, ras_bias, ras_sa_q, ras_color, ras_c0_q, ras_c1_q, ras_c2_q, ras_fbp, ras_fbw, ras_psm, ras_bpp_shift, ras_tme, ras_u0, ras_v0t, ras_u1, ras_v1t, ras_tex_base, ras_tbw, ras_tpsm, - ras_wms, ras_wmt, ras_tw, ras_th, ras_du_dx_q, ras_dv_dy_q, ras_abe, ras_filter_lin, + ras_wms, ras_wmt, ras_tw, ras_th, ras_du_dx_q, ras_dv_dy_q, ras_abe, ras_lpddr_abe, ras_filter_lin, ras_alpha_a, ras_alpha_b, ras_alpha_c, ras_alpha_d, ras_alpha_fix, ras_zte, ras_ztst, ras_zmsk, ras_zbp, ras_z_value, ras_z0, ras_u0_base, ras_v0_base, mp_dump_u1v, mp_dump_u2v, ras_persp, ras_s0_base, ras_t0_base, ras_q0_base, mp_dump_stq1, mp_dump_stq2, mp_dump_q1, mp_dump_q2, mp_dump_v1z, mp_dump_v2z } <= attr_rd_q; // Ch328 1c: single read port (slot was issued last cycle) + // Ch357 (Codex) — SPRITE du_dx/dv_dy override (mirrors the streaming pop); pop gating guarantees committed. + if (fifo_mode[slot] == RM_SPRITE) begin + ras_du_dx_q <= sp_dudx[slot]; + ras_dv_dy_q <= sp_dvdy[slot]; + end ras_mode <= fifo_mode [slot]; // HOT (register) // Clipped walker bbox (against the current tile), supplied by caller. ras_x_min <= cx_lo; @@ -5449,6 +5934,9 @@ module gs_stub ras_cur_y <= cy_lo; ras_tri_active <= fifo_tri_active [slot]; // HOT ras_combined_r <= fifo_combined [slot]; // HOT + ras_v0_xf <= fifo_v0xf[slot]; ras_v0_yf <= fifo_v0yf[slot]; + ras_v1_xf <= fifo_v1xf[slot]; ras_v1_yf <= fifo_v1yf[slot]; + ras_v2_xf <= fifo_v2xf[slot]; ras_v2_yf <= fifo_v2yf[slot]; comb_state_r <= CB_Z; // 20 ENGINE-WRITTEN gradient OUTPUTS — sideband registers (NOT in attr_ram). ras_dr_dx <= fifo_dr_dx [slot]; ras_dr_dy <= fifo_dr_dy [slot]; @@ -5461,6 +5949,10 @@ module gs_stub ras_ds_dx <= fifo_ds_dx [slot]; ras_ds_dy <= fifo_ds_dy [slot]; ras_dt_dx <= fifo_dt_dx [slot]; ras_dt_dy <= fifo_dt_dy [slot]; ras_dq_dx <= fifo_dq_dx [slot]; ras_dq_dy <= fifo_dq_dy [slot]; + // GS per-vertex FOG — HOT sidebands (like ras_tri_active / the gradients). + ras_fge <= fifo_fge [slot]; + ras_f0 <= fifo_f0 [slot]; + ras_df_dx <= fifo_df_dx [slot]; ras_df_dy <= fifo_df_dy [slot]; endtask // Ch328 (1b) — the push now writes attr_ram[fifo_wptr] DIRECTLY same-cycle (attr_word_next), @@ -5486,7 +5978,7 @@ module gs_stub logic [11:0] k_v0x,k_v0y,k_v1x,k_v1y,k_v2x,k_v2y; logic [2:0] k_bias; logic signed [31:0] k_sa; logic [63:0] k_color,k_c0,k_c1,k_c2; logic [8:0] k_fbp; logic [5:0] k_fbw,k_psm; logic [1:0] k_bpp; logic k_tme; logic [10:0] k_u0,k_v0,k_u1,k_v1; logic [31:0] k_texb; logic [13:0] k_tbw; logic [5:0] k_tpsm; - logic [1:0] k_wms,k_wmt; logic [3:0] k_tw,k_th; logic signed [31:0] k_dudx,k_dvdy; logic k_abe,k_flin; + logic [1:0] k_wms,k_wmt; logic [3:0] k_tw,k_th; logic signed [31:0] k_dudx,k_dvdy; logic k_abe,k_lpddr_abe,k_flin; logic [1:0] k_aa,k_ab,k_ac,k_ad; logic [7:0] k_afix; logic k_zte; logic [1:0] k_ztst; logic k_zmsk; logic [8:0] k_zbp; logic [31:0] k_zval; logic [31:0] k_z0; @@ -5501,7 +5993,7 @@ module gs_stub if (chk_v) begin { k_v0x,k_v0y,k_v1x,k_v1y,k_v2x,k_v2y,k_bias,k_sa,k_color,k_c0,k_c1,k_c2, k_fbp,k_fbw,k_psm,k_bpp,k_tme,k_u0,k_v0,k_u1,k_v1,k_texb,k_tbw,k_tpsm, - k_wms,k_wmt,k_tw,k_th,k_dudx,k_dvdy,k_abe,k_flin,k_aa,k_ab,k_ac,k_ad,k_afix, + k_wms,k_wmt,k_tw,k_th,k_dudx,k_dvdy,k_abe,k_lpddr_abe,k_flin,k_aa,k_ab,k_ac,k_ad,k_afix, k_zte,k_ztst,k_zmsk,k_zbp,k_zval,k_z0,k_u0b,k_v0b,k_u1v,k_u2v, k_persp,k_s0b,k_t0b,k_q0b,k_stq1,k_stq2,k_q1,k_q2, k_v1z,k_v2z } = attr_ram[chk_slot]; @@ -5515,7 +6007,7 @@ module gs_stub k_texb!==fifo_tex_base[chk_slot]||k_tbw!==fifo_tbw[chk_slot]||k_tpsm!==fifo_tpsm[chk_slot]|| k_wms!==fifo_wms[chk_slot]||k_wmt!==fifo_wmt[chk_slot]||k_tw!==fifo_tw[chk_slot]|| k_th!==fifo_th[chk_slot]||k_dudx!==fifo_du_dx[chk_slot]||k_dvdy!==fifo_dv_dy[chk_slot]|| - k_abe!==fifo_abe[chk_slot]||k_flin!==fifo_filter_lin[chk_slot]||k_aa!==fifo_alpha_a[chk_slot]|| + k_abe!==fifo_abe[chk_slot]||k_lpddr_abe!==fifo_lpddr_abe[chk_slot]||k_flin!==fifo_filter_lin[chk_slot]||k_aa!==fifo_alpha_a[chk_slot]|| k_ab!==fifo_alpha_b[chk_slot]||k_ac!==fifo_alpha_c[chk_slot]||k_ad!==fifo_alpha_d[chk_slot]|| k_afix!==fifo_alpha_fix[chk_slot]||k_zte!==fifo_zte[chk_slot]||k_ztst!==fifo_ztst[chk_slot]|| k_zmsk!==fifo_zmsk[chk_slot]||k_zbp!==fifo_zbp[chk_slot]||k_zval!==fifo_zval[chk_slot]|| @@ -5535,9 +6027,20 @@ module gs_stub if (!rst_n) begin raster_state <= R_IDLE; ras_mode <= RM_NONE; + attr_wr_v <= 1'b0; // Ch357 — pipelined attr_ram write valid + attr_pending <= '0; // Ch357 — per-slot attr write-in-flight + sprite_setup_pending <= '0; // Ch357 — sprite UV-divide in-flight (blocks pop) + spd_state <= SPD_IDLE; // Ch357 — sprite UV-divide FSM + spd_start <= 1'b0; + spd_slot <= '0; + spd_num <= 32'sd0; + spd_den <= 32'sd0; ras_v0_x <= 12'd0; ras_v0_y <= 12'd0; ras_v1_x <= 12'd0; ras_v1_y <= 12'd0; ras_v2_x <= 12'd0; ras_v2_y <= 12'd0; + ras_v0_xf <= 4'd0; ras_v0_yf <= 4'd0; + ras_v1_xf <= 4'd0; ras_v1_yf <= 4'd0; + ras_v2_xf <= 4'd0; ras_v2_yf <= 4'd0; ras_x_min <= 12'd0; ras_x_max <= 12'd0; ras_y_min <= 12'd0; ras_y_max <= 12'd0; ras_cur_x <= 12'd0; ras_cur_y <= 12'd0; @@ -5606,6 +6109,9 @@ module gs_stub ras_db_dx <= 32'sd0; ras_db_dy <= 32'sd0; ras_da_dx <= 32'sd0; ras_da_dy <= 32'sd0; ras_dz_dx <= 32'sd0; ras_dz_dy <= 32'sd0; + // GS per-vertex FOG — in-flight fog context reset. + ras_fge <= 1'b0; ras_f0 <= 8'd0; + ras_df_dx <= 32'sd0; ras_df_dy <= 32'sd0; // Textured-triangle rung — affine U/V context reset. ras_u0_base <= 11'd0; ras_v0_base <= 11'd0; ras_du_dx_t <= 32'sd0; ras_du_dy_t <= 32'sd0; @@ -5618,6 +6124,7 @@ module gs_stub ras_dq_dx <= 32'sd0; ras_dq_dy <= 32'sd0; // Ch88 pipeline regs s1_x_q <= 12'd0; s1_y_q <= 12'd0; + s1_z_q <= 32'd0; s1_valid_q <= 1'b0; s2_x_q <= 12'd0; s2_y_q <= 12'd0; s2_valid_q <= 1'b0; @@ -5676,6 +6183,7 @@ module gs_stub raster_pixel_y_q <= 12'd0; raster_pixel_color_q <= 64'd0; raster_pixel_fb_addr_q <= 32'd0; + raster_pixel_z_q <= 32'd0; raster_pixel_be_q <= 4'b1111; raster_pixel_mask_q <= 32'hFFFF_FFFF; raster_pixel_psm_q <= 6'd0; @@ -5697,11 +6205,12 @@ module gs_stub grad_step <= 5'd0; grad_settle <= 5'd0; grad_result_q <= 32'sd0; + grad_num_sel_q <= 64'sd0; // Ch357 — registered numerator select (board divide-cone reduction) grad_writing <= 1'b0; div_start <= 1'b0; grad_slot <= '0; - grad_det_q <= 32'sd0; - for (int g = 0; g < GRAD_STEPS; g = g + 1) grad_num_q[g] <= 56'sd0; + grad_det_q <= 64'sd0; + for (int g = 0; g < GRAD_STEPS; g = g + 1) grad_num_q[g] <= 64'sd0; for (int i = 0; i < FIFO_DEPTH; i = i + 1) begin fifo_v1z [i] <= 32'd0; fifo_v2z [i] <= 32'd0; @@ -5712,10 +6221,14 @@ module gs_stub fifo_v0x [i] <= 12'd0; fifo_v0y[i] <= 12'd0; fifo_v1x [i] <= 12'd0; fifo_v1y[i] <= 12'd0; fifo_v2x [i] <= 12'd0; fifo_v2y[i] <= 12'd0; + fifo_v0xf [i] <= 4'd0; fifo_v0yf[i] <= 4'd0; + fifo_v1xf [i] <= 4'd0; fifo_v1yf[i] <= 4'd0; + fifo_v2xf [i] <= 4'd0; fifo_v2yf[i] <= 4'd0; fifo_x_min [i] <= 12'd0; fifo_x_max[i] <= 12'd0; fifo_y_min [i] <= 12'd0; fifo_y_max[i] <= 12'd0; fifo_bias [i] <= 3'd0; fifo_sa [i] <= 32'sd0; + fifo_grad_det [i] <= 35'sd0; fifo_color [i] <= 64'd0; fifo_c0 [i] <= 64'd0; fifo_c1 [i] <= 64'd0; @@ -5737,6 +6250,7 @@ module gs_stub fifo_tw [i] <= 4'd0; fifo_th [i] <= 4'd0; fifo_abe [i] <= 1'b0; + fifo_lpddr_abe [i] <= 1'b0; fifo_filter_lin [i] <= 1'b0; fifo_alpha_a [i] <= 2'd0; fifo_alpha_b [i] <= 2'd0; @@ -5776,6 +6290,10 @@ module gs_stub fifo_ds_dx [i] <= 32'sd0; fifo_ds_dy [i] <= 32'sd0; fifo_dt_dx [i] <= 32'sd0; fifo_dt_dy [i] <= 32'sd0; fifo_dq_dx [i] <= 32'sd0; fifo_dq_dy [i] <= 32'sd0; + // GS per-vertex FOG — per-slot fog context init. + fifo_fge [i] <= 1'b0; + fifo_f0 [i] <= 8'd0; fifo_f1 [i] <= 8'd0; fifo_f2 [i] <= 8'd0; + fifo_df_dx [i] <= 32'sd0; fifo_df_dy [i] <= 32'sd0; end end else begin raster_pixel_emit <= 1'b0; @@ -5795,6 +6313,51 @@ module gs_stub raster_overflow <= 1'b1; raster_overflow_count_r <= raster_overflow_count_r + 16'd1; // Ch315 — count drops end + // Ch357 (Codex) — SPRITE UV setup-divide FSM. Reuses ONE sequential divider (u_sp_uv_div) for du + // then dv, one slot at a time. Lives in THIS always_ff (with the push that SETS sprite_setup_pending) + // so the bit vector has a single driver: the push below re-sets (set wins) any bit this clears. The + // divider's start pulse is set here and consumed next cycle with spd_num/spd_den already stable. + spd_start <= 1'b0; + case (spd_state) + SPD_IDLE: begin + // Priority-pick the LOWEST pending slot (descending loop -> lowest index assigned last -> wins). + for (int i = FIFO_DEPTH-1; i >= 0; i = i - 1) begin + if (sprite_setup_pending[i]) begin + spd_slot <= i[FIFO_PTR_W-1:0]; + spd_num <= sp_op_du_sh[i]; + spd_den <= sp_op_spanx[i]; + end + end + if (|sprite_setup_pending) begin + spd_start <= 1'b1; + spd_state <= SPD_DU_WAIT; + end + end + SPD_DU_WAIT: if (spd_done_w) begin + sp_dudx[spd_slot] <= spd_quo; // commit du/dx quotient + spd_num <= sp_op_dv_sh[spd_slot]; // present dv operands + spd_den <= sp_op_spany[spd_slot]; + spd_start <= 1'b1; + spd_state <= SPD_DV_WAIT; + end + SPD_DV_ISSUE: begin // unused fall-through state (kept for enum completeness) + spd_state <= SPD_IDLE; + end + SPD_DV_WAIT: if (spd_done_w) begin + sp_dvdy[spd_slot] <= spd_quo; // commit dv/dy quotient + sprite_setup_pending[spd_slot] <= 1'b0; // release the slot -> pop_ok may proceed + spd_state <= SPD_IDLE; + end + default: spd_state <= SPD_IDLE; + endcase + + // Ch357 (Codex) — pipelined attr_ram write: COMMIT the previously-registered word to the M20K and clear its + // pending bit. Runs every cycle; placed BEFORE the push so a same-slot re-push re-sets pending (set wins). + if (attr_wr_v) begin + attr_ram [attr_wr_slot] <= attr_wr_word; + attr_pending [attr_wr_slot] <= 1'b0; + end + attr_wr_v <= push_ok; if (push_ok) begin fifo_mode [fifo_wptr] <= new_mode; fifo_color [fifo_wptr] <= rgbaq_q; @@ -5806,8 +6369,11 @@ module gs_stub fifo_x_max [fifo_wptr] <= enq_x_max; fifo_y_min [fifo_wptr] <= enq_y_min; fifo_y_max [fifo_wptr] <= enq_y_max; - // Ch328 (1b) — SAME-CYCLE attr_ram write (valid push+1, like the register FIFO). - attr_ram [fifo_wptr] <= attr_word_next; + // Ch357 (Codex) — PIPELINED attr_ram write: register the assembled word + slot; the commit above lands + // it in the M20K next cycle (valid at push+2). Mark the slot pending so pop_ok holds it until then. + attr_wr_slot <= fifo_wptr; + attr_wr_word <= attr_word_next; + attr_pending [fifo_wptr] <= 1'b1; if (new_mode == RM_TRI) begin fifo_v0x [fifo_wptr] <= tri_v0x; fifo_v0y [fifo_wptr] <= tri_v0y; @@ -5815,8 +6381,15 @@ module gs_stub fifo_v1y [fifo_wptr] <= tri_v1y; fifo_v2x [fifo_wptr] <= tri_v2x; fifo_v2y [fifo_wptr] <= tri_v2y; + fifo_v0xf [fifo_wptr] <= tri_v0xf; + fifo_v0yf [fifo_wptr] <= tri_v0yf; + fifo_v1xf [fifo_wptr] <= tri_v1xf; + fifo_v1yf [fifo_wptr] <= tri_v1yf; + fifo_v2xf [fifo_wptr] <= tri_v2xf; + fifo_v2yf [fifo_wptr] <= tri_v2yf; fifo_bias [fifo_wptr] <= {~tl2_init, ~tl1_init, ~tl0_init}; - fifo_sa [fifo_wptr] <= tri_swap_ccw ? -tri_sa_calc : tri_sa_calc; + fifo_sa [fifo_wptr] <= tri_det_post[31:0]; + fifo_grad_det[fifo_wptr] <= tri_det_post; fifo_c0 [fifo_wptr] <= fan_sat_path ? c_pivot_q : c_prev_q; fifo_c1 [fifo_wptr] <= tri_swap_ccw ? rgbaq_q : c_curr_q; fifo_c2 [fifo_wptr] <= tri_swap_ccw ? c_curr_q : rgbaq_q; @@ -5859,8 +6432,9 @@ module gs_stub fifo_du_dy_t [fifo_wptr] <= 32'sd0; fifo_dv_dx_t [fifo_wptr] <= 32'sd0; fifo_dv_dy_t [fifo_wptr] <= 32'sd0; - // Brick 2a — TRI alpha-blend not implemented in v1. + // Preserve the source ABE state for the LPDDR ROP metadata stream. fifo_abe [fifo_wptr] <= 1'b0; + fifo_lpddr_abe[fifo_wptr] <= prim_abe; // Ch310 — snapshot TEX1_1.MMAG bilinear filter (mirrors fifo_abe). fifo_filter_lin [fifo_wptr] <= tex1_mmag; // Brick 2c — snapshot ALPHA_1 selectors (mirrors fifo_abe). @@ -5912,6 +6486,15 @@ module gs_stub // this slot when it schedules it (v0.z is in fifo_z0). fifo_v1z [fifo_wptr] <= tri_v1z; fifo_v2z [fifo_wptr] <= tri_v2z; + // GS per-vertex FOG — capture the PRIM.FGE gate and the 3 + // post-swap per-vertex F values. The dF/dx,dF/dy gradients + // are solved by the shared engine (steps GRAD_F_DX/DY) and + // pre-cleared here, exactly like the colour/Z gradients. + fifo_fge [fifo_wptr] <= prim_fge; + fifo_f0 [fifo_wptr] <= tri_f0; + fifo_f1 [fifo_wptr] <= tri_f1; + fifo_f2 [fifo_wptr] <= tri_f2; + fifo_df_dx [fifo_wptr] <= 32'sd0; fifo_df_dy [fifo_wptr] <= 32'sd0; // Flag the slot as awaiting gradients. The engine // (below) picks it up on a later idle cycle — the push // no longer touches the engine state, so a back-to-back @@ -5944,8 +6527,15 @@ module gs_stub fifo_v1y [fifo_wptr] <= sp_v1_y_next; fifo_v2x [fifo_wptr] <= 12'd0; fifo_v2y [fifo_wptr] <= 12'd0; + fifo_v0xf[fifo_wptr] <= sp_v0_xf_next; + fifo_v0yf[fifo_wptr] <= sp_v0_yf_next; + fifo_v1xf[fifo_wptr] <= sp_v1_xf_next; + fifo_v1yf[fifo_wptr] <= sp_v1_yf_next; + fifo_v2xf[fifo_wptr] <= 4'd0; + fifo_v2yf[fifo_wptr] <= 4'd0; fifo_bias[fifo_wptr] <= 3'b000; fifo_sa [fifo_wptr] <= 32'sd0; + fifo_grad_det[fifo_wptr] <= 35'sd0; fifo_c0 [fifo_wptr] <= 64'd0; fifo_c1 [fifo_wptr] <= 64'd0; fifo_c2 [fifo_wptr] <= 64'd0; @@ -5965,10 +6555,37 @@ module gs_stub fifo_wmt [fifo_wptr] <= clamp_wmt; fifo_tw [fifo_wptr] <= tex0_tw; fifo_th [fifo_wptr] <= tex0_th; - fifo_du_dx [fifo_wptr] <= du_dx_next; - fifo_dv_dy [fifo_wptr] <= dv_dy_next; + // Ch357 (Codex) — enqueue the sprite NOW, defer the UV divide. Capture the two + // operand pairs into this slot and raise its pending bit; the SPD FSM solves du + // then dv into sp_dudx/sp_dvdy[fifo_wptr] and clears the bit. pop_ok holds the slot + // meanwhile. fifo_du_dx/dv_dy (a sim-only pack-check mirror, NOT read by the raster) + // stay 0 to match the placeholder-0 attr_ram field the self-check compares against. + fifo_du_dx [fifo_wptr] <= 32'sd0; + fifo_dv_dy [fifo_wptr] <= 32'sd0; + sp_op_du_sh [fifo_wptr] <= sp_du_sh; + sp_op_spanx [fifo_wptr] <= sp_span_x; + sp_op_dv_sh [fifo_wptr] <= sp_dv_sh; + sp_op_spany [fifo_wptr] <= sp_span_y; + // FLAT-SPRITE FAST PATH: when both texel-coord spans are 0 (flat/solid sprite, the common + // case — e.g. every SPRITE that fills a region with one texel), du_dx=dv_dy=0/span=0 WITHOUT + // a divide. Commit 0 immediately and leave pending clear so pop is NOT stalled — behavior is + // bit-identical to the old combinational path with zero added latency. Only a sprite with a + // real UV gradient (nonzero span) arms the sequential divider and pays its setup latency. + if (sp_du == 32'sd0 && sp_dv == 32'sd0) begin + sp_dudx [fifo_wptr] <= 32'sd0; + sp_dvdy [fifo_wptr] <= 32'sd0; + sprite_setup_pending[fifo_wptr] <= 1'b0; + end else begin + sprite_setup_pending[fifo_wptr] <= 1'b1; + end // Brick 2a — capture alpha-blend-active for this SPRITE. fifo_abe [fifo_wptr] <= new_abe_active; + // Keep the LPDDR ROP sideband independent of the legacy BRAM + // sprite-blend eligibility gate. gs_lpddr_color_blend supports + // the full A/B/C/D/FIX equation, including the SH3 destination- + // darken pass (ALPHA=0x46), while new_abe_active remains the + // deliberately narrower internal-BRAM path. + fifo_lpddr_abe[fifo_wptr] <= prim_abe; // Ch310 — snapshot TEX1_1.MMAG bilinear filter (mirrors fifo_abe). fifo_filter_lin [fifo_wptr] <= tex1_mmag; // Brick 2c — snapshot ALPHA_1 selectors (mirrors fifo_abe). @@ -5995,6 +6612,15 @@ module gs_stub fifo_dz_dx [fifo_wptr] <= 32'sd0; fifo_dz_dy [fifo_wptr] <= 32'sd0; fifo_v1z [fifo_wptr] <= 32'd0; fifo_v2z [fifo_wptr] <= 32'd0; + // GS per-vertex FOG — SPRITE fog is FLAT: the closing + // vertex's F (close_f) applies to the whole rectangle. No + // affine gradients (df=0), so the per-pixel eval collapses + // to the constant f0. + fifo_fge [fifo_wptr] <= prim_fge; + fifo_f0 [fifo_wptr] <= close_f; + fifo_f1 [fifo_wptr] <= 8'd0; + fifo_f2 [fifo_wptr] <= 8'd0; + fifo_df_dx [fifo_wptr] <= 32'sd0; fifo_df_dy [fifo_wptr] <= 32'sd0; // Textured-triangle rung — SPRITE uses the linear DDA // UV path (fifo_u0/v0 + fifo_du_dx/dv_dy above), not // the affine U/V context; clear it. @@ -6066,12 +6692,22 @@ module gs_stub grad_result_q <= div_quo[31:0]; grad_writing <= 1'b1; end - end else if (grad_settle != 5'(GRAD_DIV_CYCLES-1)) begin - grad_settle <= grad_settle + 5'd1; end else begin - grad_result_q <= grad_quo[31:0]; // settled combinational divide - grad_settle <= 5'd0; - grad_writing <= 1'b1; + // Ch357 (Codex) — BOARD path (GRAD_SEQ_DIVIDER=0 && GRAD_DIV_CYCLES!=1): register the numerator + // select FIRST, then hold it + grad_det_q stable for the GRAD_DIV_CYCLES settle window, then capture. + // Sequencing (grad_settle as the phase counter): 0 = select; 1..CYCLES = settle (grad_num_sel_q stable, + // divide computing); at CYCLES = capture the settled quotient. grad_step advances only in the write + // phase below, so grad_num_q[grad_step] is stable when it is captured here. + if (grad_settle == 5'd0) begin + grad_num_sel_q <= grad_num_q[grad_step]; // capture the 20-way mux output out of the divide cone + grad_settle <= 5'd1; + end else if (grad_settle != 5'(GRAD_DIV_CYCLES)) begin + grad_settle <= grad_settle + 5'd1; // hold grad_num_sel_q + grad_det_q stable + end else begin + grad_result_q <= grad_quo[31:0]; // grad_quo = grad_num_sel_q / grad_det_q, settled + grad_settle <= 5'd0; + grad_writing <= 1'b1; + end end end else begin grad_writing <= 1'b0; // commit (K=1: every cycle; K>1: the write phase) @@ -6103,6 +6739,15 @@ module gs_stub 5'd19: fifo_dq_dy [grad_slot] <= grad_wr_data; default: ; endcase + // GS per-vertex FOG — dF/dx, dF/dy writes. Handled OUTSIDE the + // case because GRAD_F_DX/DY are param-relative (14/15 at param=0, + // 20/21 w/ perspective) and would collide with the literal 14/15 + // case items at param=0. At param=0 the case also writes + // fifo_ds_dx/dy on step 14/15, but those have no reader when + // PERSPECTIVE_CORRECT=0 (ras_ds_* is used only inside the + // perspective generate), so the render is byte-identical. + if (grad_step == 5'(GRAD_F_DX)) fifo_df_dx [grad_slot] <= grad_wr_data; + else if (grad_step == 5'(GRAD_F_DY)) fifo_df_dy [grad_slot] <= grad_wr_data; if (grad_step == 5'(GRAD_STEPS-1)) begin // last step grad_busy <= 1'b0; fifo_grad_pending [grad_slot] <= 1'b0; @@ -6151,11 +6796,19 @@ module gs_stub { ras_v0_x, ras_v0_y, ras_v1_x, ras_v1_y, ras_v2_x, ras_v2_y, ras_bias, ras_sa_q, ras_color, ras_c0_q, ras_c1_q, ras_c2_q, ras_fbp, ras_fbw, ras_psm, ras_bpp_shift, ras_tme, ras_u0, ras_v0t, ras_u1, ras_v1t, ras_tex_base, ras_tbw, ras_tpsm, - ras_wms, ras_wmt, ras_tw, ras_th, ras_du_dx_q, ras_dv_dy_q, ras_abe, ras_filter_lin, + ras_wms, ras_wmt, ras_tw, ras_th, ras_du_dx_q, ras_dv_dy_q, ras_abe, ras_lpddr_abe, ras_filter_lin, ras_alpha_a, ras_alpha_b, ras_alpha_c, ras_alpha_d, ras_alpha_fix, ras_zte, ras_ztst, ras_zmsk, ras_zbp, ras_z_value, ras_z0, ras_u0_base, ras_v0_base, pp_dump_u1v, pp_dump_u2v, ras_persp, ras_s0_base, ras_t0_base, ras_q0_base, - pp_dump_stq1, pp_dump_stq2, pp_dump_q1, pp_dump_q2, pp_dump_v1z, pp_dump_v2z } <= attr_ram[fifo_rptr]; + pp_dump_stq1, pp_dump_stq2, pp_dump_q1, pp_dump_q2, pp_dump_v1z, pp_dump_v2z } + <= (attr_wr_v && (attr_wr_slot == fifo_rptr)) ? attr_wr_word : attr_ram[fifo_rptr]; // Ch357 — forward pending write + // Ch357 (Codex) — SPRITE du_dx/dv_dy come from the deferred sequential divide, not the + // placeholder-0 attr field. Override AFTER the concat (later NBA wins). pop_ok already + // guarantees sprite_setup_pending[fifo_rptr]==0 here, so sp_dudx/sp_dvdy are committed. + if (fifo_mode[fifo_rptr] == RM_SPRITE) begin + ras_du_dx_q <= sp_dudx[fifo_rptr]; + ras_dv_dy_q <= sp_dvdy[fifo_rptr]; + end ras_mode <= fifo_mode [fifo_rptr]; // HOT (register) ras_x_min <= fifo_x_min [fifo_rptr]; ras_x_max <= fifo_x_max [fifo_rptr]; @@ -6170,6 +6823,9 @@ module gs_stub tile_col_r <= 12'd0; tile_row_r <= 12'd0; ras_tri_active <= fifo_tri_active [fifo_rptr]; // HOT + ras_v0_xf <= fifo_v0xf[fifo_rptr]; ras_v0_yf <= fifo_v0yf[fifo_rptr]; + ras_v1_xf <= fifo_v1xf[fifo_rptr]; ras_v1_yf <= fifo_v1yf[fifo_rptr]; + ras_v2_xf <= fifo_v2xf[fifo_rptr]; ras_v2_yf <= fifo_v2yf[fifo_rptr]; ras_combined_r <= fifo_combined [fifo_rptr]; // HOT comb_state_r <= CB_Z; // 20 ENGINE-WRITTEN gradient OUTPUTS — sideband registers (NOT in attr_ram). @@ -6183,6 +6839,10 @@ module gs_stub ras_ds_dx <= fifo_ds_dx [fifo_rptr]; ras_ds_dy <= fifo_ds_dy [fifo_rptr]; ras_dt_dx <= fifo_dt_dx [fifo_rptr]; ras_dt_dy <= fifo_dt_dy [fifo_rptr]; ras_dq_dx <= fifo_dq_dx [fifo_rptr]; ras_dq_dy <= fifo_dq_dy [fifo_rptr]; + // GS per-vertex FOG — HOT sidebands (streaming pop). + ras_fge <= fifo_fge [fifo_rptr]; + ras_f0 <= fifo_f0 [fifo_rptr]; + ras_df_dx <= fifo_df_dx [fifo_rptr]; ras_df_dy <= fifo_df_dy [fifo_rptr]; // Ch171 — same wrap fix as wptr above. fifo_rptr <= fifo_rptr + FIFO_PTR_W'(1); raster_state <= R_SCAN; @@ -6307,7 +6967,40 @@ module gs_stub // Pipeline advance (S0 walker + S0->S1->S2->S3 latches) is // GATED by z_advance. On a frozen z beat all pipeline regs // hold and only the queued Z write fires (below). - if (z_advance && ta_advance) begin // Ch344: freeze on the textured-alpha frozen beat too + // Ch415 palette-bilinear perspective completion is deliberately + // outside the pipeline-advance gate. Launch advances the next + // sample into S1, WAIT freezes it while DONE emits the held pixel, + // and PB_RELEASE supplies one additional hold cycle. Advancing + // again on RELEASE would skip that waiting S1 sample and produce + // regular screen-door gaps. + if (persp_bili_mode && (persp_bili_state == PB_WAIT) + && s1_tex_outvalid) begin + raster_pixel_emit <= 1'b1; + raster_pixel_emit_count <= raster_pixel_emit_count + 32'd1; + raster_pixel_x_q <= persp_bili_x_q; + raster_pixel_y_q <= persp_bili_y_q; + // GS per-vertex FOG — fog the held bilinear-perspective texel + // with its captured +5-aligned F. Gated → FGE=0 byte-identical. + raster_pixel_color_q <= {32'd0, + ras_fge + ? fog_blend_abgr(comb_modulate ? persp_bili_mod_color + : s1_tex_color, + persp_bili_fog_q, fogcol_q) + : (comb_modulate ? persp_bili_mod_color + : s1_tex_color)}; + raster_pixel_fb_addr_q <= ({23'd0, ras_fbp} << 11) + + ((({20'd0, persp_bili_y_q} + * ({26'd0, ras_fbw} << 6)) + + {20'd0, persp_bili_x_q}) << ras_bpp_shift); + raster_pixel_z_q <= persp_bili_z_q; + raster_pixel_be_q <= 4'b1111; + raster_pixel_mask_q <= 32'hFFFF_FFFF; + raster_pixel_psm_q <= ras_psm; + end + + if (z_advance && ta_advance + && (persp_bili_state != PB_WAIT) + && (persp_bili_state != PB_RELEASE)) begin // S0 → S1 latch. // COMBINED probe: while a combined scan owns the walker, // the standard pixel pipeline is kept EMPTY (s1_valid_q @@ -6317,6 +7010,10 @@ module gs_stub // this is byte-identical to the legacy latch then. s1_x_q <= ras_cur_x; s1_y_q <= ras_cur_y; + // Ch357 — capture the fragment Z HERE, where comb_frag_z (Z at ras_cur_x with the CURRENT, aligned Z plane) + // matches ras_cur_x exactly. Corner sampling (no half-pixel term: the oracle reject is the same at corner + // 3987 vs center 3971, and the +0.5*(dz_dx+dz_dy) term explodes on thin/steep triangles with huge gradients). + s1_z_q <= comb_frag_z; s1_valid_q <= (raster_state == R_SCAN) && !ras_combined; // S1 → S2 latch @@ -6376,7 +7073,13 @@ module gs_stub s3_psm_q <= ras_psm; // Flat SPRITE source color is ras_color (no texturing // when blending in v1). Source alpha = RGBAQ.A. - s3_cs_q <= ras_color; + // GS per-vertex FOG — fog the source RGB BEFORE the blend + // when FGE=1 (sprite fog is flat: s2_fog_f == ras_f0). + // Source alpha is NOT fogged. FGE=0 → byte-identical. + s3_cs_q <= ras_fge + ? {ras_color[63:32], + fog_blend_abgr(ras_color[31:0], s2_fog_f, fogcol_q)} + : ras_color; s3_as_q <= ras_color[31:24]; s3_dest_q <= fb_rd_data; // used when FB_RD_REGISTERED=0 end else if (ras_zte) begin @@ -6419,13 +7122,19 @@ module gs_stub raster_pixel_y_q <= s2_y_q; raster_pixel_color_q <= s2_emit_color64; raster_pixel_fb_addr_q <= s2_fb_addr; + // Keep the external LPDDR Z/ROP sideband aligned + // with the affine color emit. Perspective paths + // populate their later aligned Z stages below. + raster_pixel_z_q <= ras_tri_active + ? s2_interp_z + : ras_z_value; raster_pixel_be_q <= s2_emit_be; raster_pixel_mask_q <= s2_emit_mask; raster_pixel_psm_q <= ras_psm; end end - // Ch302 — PERSPECTIVE emit. Fires at S1+5 (persp_emit5), + // Ch302/403 — PERSPECTIVE emit. Fires at S1+5 (persp_emit5), // when s1_tex_color is the perspective DECAL texel for the // pixel at (persp_x5, persp_y5). PSMCT32 full-word write // (be=1111, mask=all). The DECAL texel color is the sampled @@ -6436,15 +7145,30 @@ module gs_stub // emit so it wins the raster_pixel_* port on a perspective // prim; the affine branch is suppressed via !ras_persp // above, so there is never a same-cycle double-drive. + // Ch403 applies the same TEX0.TFX rule as the combined path: + // MODULATE multiplies the returned texel by the +5-aligned + // Gouraud color; DECAL remains byte-identical. TEX0 is + // list-level state and remains stable until the feeder drain. // ras_persp is constant 0 at PERSPECTIVE_CORRECT=0, so this // block is dead in the affine-only build. - if (ras_persp && persp_emit5) begin + if (ras_persp && persp_emit5 && !persp_bili_mode) begin raster_pixel_emit <= 1'b1; raster_pixel_emit_count <= raster_pixel_emit_count + 32'd1; raster_pixel_x_q <= persp_x5; raster_pixel_y_q <= persp_y5; - raster_pixel_color_q <= {32'd0, s1_tex_color}; + // GS per-vertex FOG — fog the sampled (DECAL / MODULATEd) + // perspective texel POST-sample with the +5-aligned affine + // F (persp_fog_f5). Gated on ras_fge → FGE=0 byte-identical + // to the pre-fog perspective emit. + raster_pixel_color_q <= {32'd0, + ras_fge + ? fog_blend_abgr(comb_modulate ? modulated_s1_tex_color + : s1_tex_color, + persp_fog_f5, fogcol_q) + : (comb_modulate ? modulated_s1_tex_color + : s1_tex_color)}; raster_pixel_fb_addr_q <= persp_fb_addr; + raster_pixel_z_q <= persp_z5; // Ch357 — fragment Z aligned with this persp color emit raster_pixel_be_q <= 4'b1111; raster_pixel_mask_q <= 32'hFFFF_FFFF; raster_pixel_psm_q <= ras_psm; @@ -6596,10 +7320,10 @@ module gs_stub CB_T: begin // Ch333/335 — MODULATE (TFX=0): texel * interpolated vertex color (Gouraud; // flat collapses to the constant); DECAL (TFX=1): texel replaces (unchanged). - // Alpha keeps the texel value either way. - comb_cs_r <= comb_modulate ? gs_modulate_abgr(s1_tex_color, comb_interp_color) - : s1_tex_color; - comb_as_r <= s1_tex_color[31:24]; + // With MODULATE+TCC, alpha is texture*vertex just like RGB. + comb_cs_r <= comb_modulate ? modulated_s1_tex_color : s1_tex_color; + comb_as_r <= comb_modulate ? modulated_s1_tex_color[31:24] + : s1_tex_color[31:24]; comb_state_r <= CB_FB; end diff --git a/rtl/gif_gs/gs_texture_cache.sv b/rtl/gif_gs/gs_texture_cache.sv index fe5be1c..9ebe868 100644 --- a/rtl/gif_gs/gs_texture_cache.sv +++ b/rtl/gif_gs/gs_texture_cache.sv @@ -88,13 +88,22 @@ module gs_texture_cache #( (* ramstyle = "M20K" *) logic [31:0] tex_mem [0:TEX_WORDS-1]; // ================= fill side (axi_clk) ================= - typedef enum logic [2:0] { F_IDLE, F_AR, F_R, F_DRAIN, F_DONE } fstate_t; + typedef enum logic [2:0] { F_IDLE, F_AR, F_R, F_DRAIN, F_WRITE, F_DONE } fstate_t; fstate_t fst; logic [$clog2(N_BEATS):0] beat; // 0..N_BEATS logic [255:0] fill_data_q; logic [2:0] fill_lane; logic [WIDX_BITS-1:0] fill_word_base; wire [WIDX_BITS-1:0] fill_word_idx = fill_word_base + WIDX_BITS'(fill_lane); + // Ch358 (Codex) — registered RESOLVED drain word + RAM index. The 26.1 STA showed fill_lane launching into + // tex_mem's data port: the dynamic 256->32 mux (fill_data_q[fill_lane*32+:32]) fed the RAM write directly. + // F_DRAIN now only registers the SELECTED word/index; F_WRITE commits that register to tex_mem next cycle + // (2 cycles/lane — harmless one-shot fill time). fill_crc accumulates the COMMITTED word, semantics unchanged. + // These payload registers are deliberately unreset. F_WRITE is reachable only after F_DRAIN has loaded both, + // so reset values are unobservable; keeping them out of the 4k-fanout EMIF calibration reset removes that reset + // from the duplicated RAM-address launch registers at 310 MHz. + logic [31:0] drain_word_q; + logic [WIDX_BITS-1:0] drain_idx_q; // fill_start is an EDGE/TOGGLE (bridge toggles it on each arm), CDC-synced here so the // cache is RE-FILLABLE: each arm reloads the texture (lets the HPS re-stage a different // texture without a board reset). 3-FF sync + edge-detect, like the read/write probes. @@ -142,8 +151,12 @@ module gs_texture_cache #( end end F_DRAIN: begin - tex_mem[fill_word_idx] <= fill_data_q[fill_lane*32 +: 32]; - fill_crc <= fill_crc + fill_data_q[fill_lane*32 +: 32]; // sum32 over the words written + fst <= F_WRITE; + end + F_WRITE: begin + // COMMIT half: registered word -> M20K; CRC over the word actually committed. + tex_mem[drain_idx_q] <= drain_word_q; + fill_crc <= fill_crc + drain_word_q; // sum32 over the words written if (fill_lane == 3'd7) begin fill_beats <= fill_beats + 32'd1; fill_bytes <= fill_bytes + 32'd32; @@ -158,6 +171,7 @@ module gs_texture_cache #( end end else begin fill_lane <= fill_lane + 3'd1; + fst <= F_DRAIN; end end F_DONE: begin @@ -180,6 +194,14 @@ module gs_texture_cache #( end end + // Control-free payload boundary: observability is controlled by the reset FSM, not by reset on the data itself. + always_ff @(posedge axi_clk) begin + if (fst == F_DRAIN) begin + drain_word_q <= fill_data_q[fill_lane*32 +: 32]; + drain_idx_q <= fill_word_idx; + end + end + // ================= sampler side (sample_clk) ================= // 1-cycle REGISTERED read, identical timing to vram_bram_stub.read2: // present (tex_rd_addr) when tex_rd_en, data lands next cycle. diff --git a/rtl/gif_gs/gs_texture_unit.sv b/rtl/gif_gs/gs_texture_unit.sv index 4138a71..f261c71 100644 --- a/rtl/gif_gs/gs_texture_unit.sv +++ b/rtl/gif_gs/gs_texture_unit.sv @@ -502,9 +502,10 @@ module gs_texture_unit #( // beat[k]'s 32-bit ABGR word -> capture into tap[k]. // If k<3: k++ and -> ISSUE (next neighbor). If k==3: -> DONE. // DONE : combinationally lerp the 4 captured taps by u_frac/v_frac - // per channel; assert out_valid for 1 cycle with tex_color; - // drop busy; -> IDLE. - // => total ~ 4*(1+L)+1 cycles per filtered sample. Throughput is NOT a + // per channel and capture the result in tex_color_hold. + // OUT : assert out_valid for 1 cycle with the registered color; + // -> IDLE. + // => total ~ 4*(1+L)+2 cycles per filtered sample. Throughput is NOT a // goal here (a later texture-cache pass collapses the 4 reads). // // Neighbor table (k -> du,dv): 0->(0,0) 1->(1,0) 2->(0,1) 3->(1,1). @@ -519,12 +520,13 @@ module gs_texture_unit #( // then defensively clamped to 0..255. generate if (BILINEAR_ENABLE) begin : g_bilinear - localparam logic [1:0] BS_IDLE = 2'd0; - localparam logic [1:0] BS_ISSUE = 2'd1; - localparam logic [1:0] BS_WAIT = 2'd2; - localparam logic [1:0] BS_DONE = 2'd3; + localparam logic [2:0] BS_IDLE = 3'd0; + localparam logic [2:0] BS_ISSUE = 3'd1; + localparam logic [2:0] BS_WAIT = 3'd2; + localparam logic [2:0] BS_DONE = 3'd3; + localparam logic [2:0] BS_OUT = 3'd4; - logic [1:0] state; + logic [2:0] state; logic [1:0] beat; // which neighbor 0..3 logic [31:0] wait_cnt; // counts RD_LATENCY logic [31:0] tap [0:3]; // captured ABGR per neighbor @@ -641,7 +643,13 @@ module gs_texture_unit #( wait_cnt <= wait_cnt + 32'd1; end end - default: begin // BS_DONE + BS_DONE: begin + // tex_color_hold captures the finished blend on this + // edge. Keep a distinct OUT cycle so no consumer can + // see the tap->two-lerp combinational cone directly. + state <= BS_OUT; + end + default: begin // BS_OUT state <= BS_IDLE; end endcase @@ -703,18 +711,15 @@ module gs_texture_unit #( cv_a = lerp8(top_a, bot_a, lat_vf); end - // Ch310 — HOLD register for the filtered color. The combined-renderer + // Ch310/Ch422 — HOLD register for the filtered color. The combined-renderer // FSM (gs_stub CB_TWAIT) may latch the result a cycle or two AFTER the // out_valid pulse (it steps at half-rate on z_advance beats), so the // blended ABGR must stay STABLE from out_valid until the next sample. - // tex_color is the LIVE combinational blend during DONE (so an - // out_valid-keyed caller — tb_gs_texture_bilinear — reads the fresh - // value the SAME cycle out_valid pulses, byte-identical to before) and - // the LATCHED copy afterward (so a caller that reads one+ cycles later, - // like CB_TWAIT→CB_T, still sees it). The register captures the blend - // on the clk edge that LEAVES DONE; combining "live during DONE, held - // after" gives a value stable from out_valid until the next sample - // overwrites it at its DONE. + // The register captures the blend on the clk edge that LEAVES DONE. + // Ch422 makes OUT a separate following cycle, so tex_color and + // out_valid expose only this registered value. That is the timing + // boundary between the two-stage bilinear arithmetic and downstream + // TEX0 modulation; callers already wait on out_valid or !busy. logic [31:0] tex_color_blend; assign tex_color_blend = {cv_a, cv_b, cv_g, cv_r}; logic [31:0] tex_color_hold; @@ -724,9 +729,9 @@ module gs_texture_unit #( else if (state == BS_DONE) tex_color_hold <= tex_color_blend; // capture the just-blended value end - // live during the DONE pulse, held (last captured) otherwise + // Registered result, held until the next sample completes. logic [31:0] tex_color_lin; - assign tex_color_lin = (state == BS_DONE) ? tex_color_blend : tex_color_hold; + assign tex_color_lin = tex_color_hold; // --- output mux: bilinear FSM owns the outputs for a FILTERED PSMCT32 // sample (do_lin). When do_lin=0 — non-PSMCT32 psm OR MMAG=0 NEAREST — @@ -738,7 +743,7 @@ module gs_texture_unit #( // tex_rd_addr is the SAME addr-gen output for both paths (the wrap // selects beat_u/beat_v vs port u/v); the FSM just gates rd_en. assign tex_rd_addr = near_rd_addr; - assign out_valid = do_lin ? (state == BS_DONE) : near_out_valid; + assign out_valid = do_lin ? (state == BS_OUT) : near_out_valid; assign tex_color = do_lin ? tex_color_lin : near_color; assign busy = do_lin && (state != BS_IDLE); end else begin : g_nearest diff --git a/rtl/platform/clut_stage_cdc.sv b/rtl/platform/clut_stage_cdc.sv new file mode 100644 index 0000000..f3e3c6b --- /dev/null +++ b/rtl/platform/clut_stage_cdc.sv @@ -0,0 +1,119 @@ +// Runtime palette staging: one CLOCK2_50 write port and one design-clock +// copy port. The host fills all 256 entries, then flips commit once. The +// design domain copies the stable bank into clut_stub and returns a sum32. +`timescale 1ns/1ps + +module clut_stage_cdc ( + input logic bclk, + input logic breset_n, + input logic b_we, + input logic [7:0] b_waddr, + input logic [31:0] b_wdata, + input logic b_commit_tgl, + input logic [31:0] b_expected_crc, + + input logic dclk, + input logic dreset_n, + output logic clut_wr_en, + output logic [7:0] clut_wr_idx, + output logic [31:0] clut_wr_data, + output logic busy, + output logic done_tgl, + output logic [31:0] crc +); + + // 256 x 32 fits in one M20K and remains a true dual-clock staging bank + // on the board instead of becoming a wide register array. + (* ramstyle = "M20K" *) logic [31:0] stage_mem [0:255]; + logic [7:0] rd_addr; + logic [31:0] rd_data_q; + + always_ff @(posedge bclk) begin + if (b_we) + stage_mem[b_waddr] <= b_wdata; + end + + // This is the read side of the small dual-clock staging RAM. The host + // must finish writes before commit; commit is the coherency boundary. + always_ff @(posedge dclk) begin + rd_data_q <= stage_mem[rd_addr]; + end + + (* altera_attribute = "-name SYNCHRONIZER_IDENTIFICATION FORCED" *) + logic [2:0] commit_sync; + logic commit_seen; + logic [31:0] expected_crc_q; + logic [7:0] copy_idx; + logic [31:0] crc_acc; + typedef enum logic [1:0] { S_IDLE, S_PRIME, S_COPY } state_t; + state_t state; + + always_ff @(posedge dclk or negedge dreset_n) begin + if (!dreset_n) begin + commit_sync <= 3'b000; + commit_seen <= 1'b0; + expected_crc_q <= 32'd0; + rd_addr <= 8'd0; + copy_idx <= 8'd0; + crc_acc <= 32'd0; + crc <= 32'd0; + clut_wr_en <= 1'b0; + clut_wr_idx <= 8'd0; + clut_wr_data <= 32'd0; + busy <= 1'b0; + done_tgl <= 1'b0; + state <= S_IDLE; + end else begin + commit_sync <= {commit_sync[1:0], b_commit_tgl}; + clut_wr_en <= 1'b0; + + // Consume any commit edge observed while a copy is live. A host + // retry belongs after done, never behind the current transaction. + if (busy && (commit_sync[2] != commit_seen)) + commit_seen <= commit_sync[2]; + + case (state) + S_IDLE: begin + // A commit that arrives during a copy is deliberately not + // consumed. The host polls busy/done before reusing bank. + if (commit_sync[2] != commit_seen) begin + commit_seen <= commit_sync[2]; + expected_crc_q <= b_expected_crc; + rd_addr <= 8'd0; + copy_idx <= 8'd0; + crc_acc <= 32'd0; + busy <= 1'b1; + state <= S_PRIME; + end + end + S_PRIME: begin + // Prime the synchronous read before writing entry zero. + rd_addr <= 8'd1; + state <= S_COPY; + end + S_COPY: begin + clut_wr_en <= 1'b1; + clut_wr_idx <= copy_idx; + clut_wr_data <= rd_data_q; + crc_acc <= crc_acc + rd_data_q; + if (copy_idx == 8'hFF) begin + crc <= crc_acc + rd_data_q; + busy <= 1'b0; + done_tgl <= ~done_tgl; + state <= S_IDLE; + end else begin + copy_idx <= copy_idx + 8'd1; + rd_addr <= rd_addr + 8'd1; + end + end + default: state <= S_IDLE; + endcase + end + end + + // Keep expected_crc_q live in synthesis as an explicit documentation of + // the host/design transaction contract. The bridge returns `crc` on done; + // software compares it against its expected sum before GO. + wire _unused_expected_crc = ^expected_crc_q; + +endmodule : clut_stage_cdc diff --git a/rtl/platform/ps2_hps_bridge.sv b/rtl/platform/ps2_hps_bridge.sv index 949ba52..7dee95d 100644 --- a/rtl/platform/ps2_hps_bridge.sv +++ b/rtl/platform/ps2_hps_bridge.sv @@ -308,6 +308,13 @@ module ps2_hps_bridge ( input logic [31:0] lpddr_bresp_err_i, // (folded into 0x02C status) input logic [31:0] lpddr_fifo_ovf_i, // (folded into 0x02C status) input logic lpddr_idle_i, // 0x02C[0] — writer idle/done + input logic clear_done_i, // 0x02C[7] — Ch357 persistent-Z preclear complete (EMIF domain; synced). + // Host MUST wait for this before the first GO (z_rmw clear_start done). + input logic [31:0] frag_drops_i, // Ch357 — persistent-Z request-FIFO dropped-fragment count (design_clk). + // 0x0EC snapshot (latched while drained/quiescent) + 0x02C[8] sticky-nonzero. + input logic frame_drained_i, // 0x02C[6] — Ch353 ordered drain ack (EMIF domain; synced). STABLE, + // unlike transient idle: asserts only after the EOF marker's last BRESP, + // so the host confirms the FULL render drained (not a mid-batch idle). // ---- Ch319 Brick 3: LPDDR4B read-probe (HPS reads FB content back through the // bridge — no /dev/mem). 0x03C: WRITE sets the byte address + triggers a read; @@ -393,6 +400,18 @@ module ps2_hps_bridge ( input logic [15:0] feeder_records_i, // 0x0E4 records_emitted (async counter) input logic [31:0] feeder_waits_i, // 0x0E8 fifo_wait_cycles (async counter) + // Ch367 -- runtime CLUT staging. HPS writes a 1 KiB bank at + // 0x200..0x5FC, stores its expected sum32 at 0x1E4, then writes bit0 + // at 0x1E0 to commit. One toggle crosses to the design-clock copier. + output logic [7:0] clut_stage_waddr_o, + output logic [31:0] clut_stage_wdata_o, + output logic clut_stage_we_o, + output logic clut_commit_tgl_o, + output logic [31:0] clut_expected_crc_o, + input logic clut_busy_i, + input logic clut_done_tgl_i, + input logic [31:0] clut_crc_i, + // ---- AXI4 slave (signature matches ps2_hps_bridge_null) ---- input logic [3:0] s_axi_awid, input logic [37:0] s_axi_awaddr, @@ -648,6 +667,10 @@ module ps2_hps_bridge ( // is IDLE, so latch them into clk-domain snapshots WHILE the synced idle is high (data stable -> coherent). // The write-probe error counter latches on the synced write-done edge (count stable when a write completes). logic [1:0] lpddr_idle_sync; + logic [1:0] frame_drained_sync; // Ch353 — 2-FF sync of frame_drained_i into the bridge clock + logic [1:0] clear_done_sync; // Ch357 — 2-FF sync of clear_done_i (persistent-Z preclear done) + logic [31:0] frag_drops_snap_q; // Ch357 — clk-domain snapshot of frag_drops_i, latched while drained (quiescent) + logic frag_drops_nz_sticky_q; // Ch357 — sticky: set once any per-scene snapshot is nonzero (fail-closed drop flag) logic [31:0] lpddr_bytes_snap_q; logic [31:0] lpddr_bursts_snap_q; logic [31:0] lpddr_bresp_err_snap_q; @@ -793,7 +816,13 @@ module ps2_hps_bridge ( // by addr[37:5]==33'h08 (= 0x100/32). // Anything else reads 0. reg_read = 32'd0; - if (addr[37:8] == '0) begin + if (addr == 38'h00000001E0) begin + reg_read = {30'd0, clut_done_sync[2], clut_busy_sync[1]}; // CLUT_STATUS + end else if (addr == 38'h00000001E4) begin + reg_read = clut_expected_crc_q; // CLUT_EXPECTED_CRC + end else if (addr == 38'h00000001E8) begin + reg_read = clut_crc_q; // CLUT_RESULT_CRC + end else if (addr[37:8] == '0) begin case (addr[7:2]) 6'h00: reg_read = CORE_ID; // 0x000 6'h01: reg_read = ABI_VERSION; // 0x004 @@ -808,7 +837,8 @@ module ps2_hps_bridge ( 6'h0A: reg_read = raster_overflow_count; // 0x028 // 0x02C LPDDR_STATUS (R): [0]idle [1]bresp_err [2]fifo_ovf [3]rd_pending [4]scan_cache_valid [5]scan_rd_err. // Ch352 — idle via 2-FF sync; bresp_err/fifo_ovf reduced from the clk-domain snapshots (coherent). - 6'h0B: reg_read = {26'd0, lpddr_scan_err_sync[1], lpddr_scan_valid_sync[1], lpddr_rd_pending, (|lpddr_fifo_ovf_snap_q), (|lpddr_bresp_err_snap_q), lpddr_idle_sync[1]}; + // Ch353 — [6]frame_drained (STABLE ordered drain ack; poll THIS, not transient [0]idle). + 6'h0B: reg_read = {23'd0, frag_drops_nz_sticky_q, clear_done_sync[1], frame_drained_sync[1], lpddr_scan_err_sync[1], lpddr_scan_valid_sync[1], lpddr_rd_pending, (|lpddr_fifo_ovf_snap_q), (|lpddr_bresp_err_snap_q), lpddr_idle_sync[1]}; 6'h0C: reg_read = lpddr_bytes_snap_q; // 0x030 LPDDR_BYTES (Ch352 — clk-domain snapshot) 6'h0D: reg_read = lpddr_bursts_snap_q; // 0x034 LPDDR_BURSTS (Ch352 — clk-domain snapshot) 6'h0E: reg_read = lpddr_bresp_err_snap_q; // 0x038 LPDDR_BRESP_ERRS (Ch352 — clk-domain snapshot) @@ -859,6 +889,7 @@ module ps2_hps_bridge ( 6'h37: reg_read = {20'd0, feeder_addr_q}; // 0x0DC FEEDER_STG_ADDR (current write index) 6'h39: reg_read = {16'd0, feeder_records_i}; // 0x0E4 FEEDER_RECORDS (records_emitted) 6'h3A: reg_read = feeder_waits_i; // 0x0E8 FEEDER_WAITS (fifo_wait_cycles) + 6'h3B: reg_read = frag_drops_snap_q; // 0x0EC LPDDR_FRAG_DROPS (Ch357 R): persistent-Z dropped-fragment snapshot (per-scene delta must be 0) 6'h18: reg_read = video_status; // 0x060 VIDEO_STATUS (Ch225) 6'h19: reg_read = hdmi_diag; // 0x064 HDMI_DIAG (Ch225) // Ch248 — replaced the Ch226 fake DS2 with the real @@ -950,6 +981,11 @@ module ps2_hps_bridge ( wire write_is_feeder_hi = write_in_window && (aw_addr_q[7:2] == 6'h39); // 0x0E4 high 32 -> commit {hi,lo}, addr++ wire write_is_feeder_go = write_in_window && (aw_addr_q[7:2] == 6'h3A); // 0x0E8 bit0 -> retrigger pulse + wire write_is_clut_commit = (aw_addr_q == 38'h00000001E0); + wire write_is_clut_expected= (aw_addr_q == 38'h00000001E4); + wire write_in_clut_stage = (aw_addr_q >= 38'h0000000200) + && (aw_addr_q <= 38'h00000005FC); + // Ch223 — OSD compatibility-sink decode at 0x100..0x11F. The OSD // block is a 32-byte window outside the first-128-byte side-effect // region, so it gets its own `addr[37:5] == 33'h08` guard @@ -1009,6 +1045,9 @@ module ps2_hps_bridge ( assign core_ctrl_d = wdata_lane[2:0]; assign core_pulse_we = write_accept && write_is_pulse; assign hdmi_clr_pulse = core_pulse_we && wdata_lane[3]; + assign clut_stage_we_o = write_accept && write_in_clut_stage; + assign clut_stage_waddr_o = (aw_addr_q - 38'h0000000200) >> 2; + assign clut_stage_wdata_o = wdata_lane; // Ch222 — input-latch register file. One always_ff covers all three // 32-bit latches; the lane-aligned `wdata_lane` (selected by @@ -1059,6 +1098,10 @@ module ps2_hps_bridge ( tex_rd_errs_snap_q <= 32'd0; lpddr_ctrl_commit_q <= 1'b0; lpddr_idle_sync <= 2'b00; + frame_drained_sync <= 2'b00; + clear_done_sync <= 2'b00; + frag_drops_snap_q <= 32'd0; + frag_drops_nz_sticky_q<= 1'b0; lpddr_bytes_snap_q <= 32'd0; lpddr_bursts_snap_q <= 32'd0; lpddr_bresp_err_snap_q<= 32'd0; @@ -1089,12 +1132,22 @@ module ps2_hps_bridge ( end // Ch352 — remaining status CDC. idle: 2-FF sync. FB-writer counters: capture WHILE idle (stable). lpddr_idle_sync <= {lpddr_idle_sync[0], lpddr_idle_i}; + frame_drained_sync <= {frame_drained_sync[0], frame_drained_i}; if (lpddr_idle_sync[1]) begin lpddr_bytes_snap_q <= lpddr_bytes_i; lpddr_bursts_snap_q <= lpddr_bursts_i; lpddr_bresp_err_snap_q <= lpddr_bresp_err_i; lpddr_fifo_ovf_snap_q <= lpddr_fifo_ovf_i; end + // Ch357 — persistent-Z preclear ack: 2-FF sync (single-bit, EMIF domain), same as frame_drained. + clear_done_sync <= {clear_done_sync[0], clear_done_i}; + // Ch357 — drop count: latch WHILE drained (fragment flow stopped -> frag_drops_i stable, coherent multi-bit + // capture, same idle-gated idea as the FB-writer counters). The sticky flag OR-accumulates any nonzero + // snapshot so a single dropped fragment latches a fail-closed bit the host reads after every scene. + if (frame_drained_sync[1]) begin + frag_drops_snap_q <= frag_drops_i; + frag_drops_nz_sticky_q <= frag_drops_nz_sticky_q | (|frag_drops_i); + end // write-probe error count: stable when a write completes -> latch on the synced write-done edge. if (lpddr_wr_done_sync[2] != lpddr_wr_done_sync[1]) lpddr_wr_bresp_err_snap_q <= lpddr_wr_bresp_err_i; @@ -1178,6 +1231,35 @@ module ps2_hps_bridge ( assign feeder_stg_wdata_o = feeder_wdata_q; assign feeder_go_tgl_o = feeder_go_tgl_q; + // The staging write port is in this bridge clock domain. Only the + // commit toggle crosses domains, after the host has written all entries. + logic clut_commit_tgl_q; + logic [31:0] clut_expected_crc_q; + logic [1:0] clut_busy_sync; + logic [2:0] clut_done_sync; + logic [31:0] clut_crc_q; + always_ff @(posedge clk or negedge reset_n) begin + if (!reset_n) begin + clut_commit_tgl_q <= 1'b0; + clut_expected_crc_q <= 32'd0; + clut_busy_sync <= 2'b00; + clut_done_sync <= 3'b000; + clut_crc_q <= 32'd0; + end else begin + clut_busy_sync <= {clut_busy_sync[0], clut_busy_i}; + clut_done_sync <= {clut_done_sync[1:0], clut_done_tgl_i}; + if (clut_done_sync[2] != clut_done_sync[1]) + clut_crc_q <= clut_crc_i; + if (write_accept) begin + if (write_is_clut_expected) clut_expected_crc_q <= wdata_lane; + if (write_is_clut_commit && wdata_lane[0] && !clut_busy_sync[1]) + clut_commit_tgl_q <= ~clut_commit_tgl_q; + end + end + end + assign clut_commit_tgl_o = clut_commit_tgl_q; + assign clut_expected_crc_o = clut_expected_crc_q; + // Ch223 — OSD-sink register file. Same pattern as Ch222. // Ch245 — OSD_TRIGGER added with sibling-ABI semantics: bits are // SET by single-cycle pulses from the menu FSM and CLEARED by HPS diff --git a/rtl/platform/tile_ram_cdc.sv b/rtl/platform/tile_ram_cdc.sv index e6a4c30..26bdecd 100644 --- a/rtl/platform/tile_ram_cdc.sv +++ b/rtl/platform/tile_ram_cdc.sv @@ -85,6 +85,7 @@ module tile_ram_cdc ( // Three stages let us compute an edge detector against the // already-resampled bits ([2] ^ [1]), giving the wr_pulse a full // dclk cycle of bclk_wr_index/data stability before we sample. + (* altera_attribute = "-name SYNCHRONIZER_IDENTIFICATION FORCED" *) logic [2:0] toggle_sync; always_ff @(posedge dclk or negedge dreset_n) begin if (!dreset_n) diff --git a/rtl/top/de25_nano_psmct32_raster_demo_top.sv b/rtl/top/de25_nano_psmct32_raster_demo_top.sv index 8d1336c..df02bc5 100644 --- a/rtl/top/de25_nano_psmct32_raster_demo_top.sv +++ b/rtl/top/de25_nano_psmct32_raster_demo_top.sv @@ -365,6 +365,10 @@ module de25_nano_psmct32_raster_demo_top ( // bridge into an unreadable state — only the design domain // downstream of `core_rst_n` is held. wire bridge_core_reset_req; + // Declared before every design-domain consumer. The runtime CLUT CDC is + // instantiated above the reset synchronizer, so an inline declaration at + // the assignment site would create an implicit, undriven early net. + wire core_rst_n; // ---- Ch229 tile broadcast (bridge CLOCK2_50 → tile_ram_cdc) ---- // Driven by `u_hps_bridge` inside USE_QSYS_TOP; tied safe (zero + @@ -413,6 +417,35 @@ module de25_nano_psmct32_raster_demo_top ( wire feeder_stg_we_pulse_w = fdr_we_sync[2] ^ fdr_we_sync[1]; // 1 design_clk pulse per commit wire feeder_go_pulse_w = fdr_go_sync[2] ^ fdr_go_sync[1]; // 1 design_clk pulse per retrigger + // Ch367 -- runtime CLUT residency. The bridge writes a small palette + // bank at CLOCK2_50; one commit toggle starts the bounded design-clock + // copy into the existing CLUT writer port. + wire [7:0] clut_stage_waddr_w; + wire [31:0] clut_stage_wdata_w; + wire clut_stage_we_w, clut_commit_tgl_w; + wire [31:0] clut_expected_crc_w; + wire runtime_clut_wr_en_w, runtime_clut_busy_w, runtime_clut_done_tgl_w; + wire [7:0] runtime_clut_wr_idx_w; + wire [31:0] runtime_clut_wr_data_w, runtime_clut_crc_w; + + clut_stage_cdc u_runtime_clut ( + .bclk (CLOCK2_50), + .breset_n (~ninit_done), + .b_we (clut_stage_we_w), + .b_waddr (clut_stage_waddr_w), + .b_wdata (clut_stage_wdata_w), + .b_commit_tgl (clut_commit_tgl_w), + .b_expected_crc(clut_expected_crc_w), + .dclk (design_clk), + .dreset_n (core_rst_n), + .clut_wr_en (runtime_clut_wr_en_w), + .clut_wr_idx (runtime_clut_wr_idx_w), + .clut_wr_data (runtime_clut_wr_data_w), + .busy (runtime_clut_busy_w), + .done_tgl (runtime_clut_done_tgl_w), + .crc (runtime_clut_crc_w) + ); + // ---- Ch248 platform DS2 wired controller -------------------------- // The shared `ds2_controller` runs on sys_clk (= CLOCK2_50 = 50 MHz), // drives CLK/CMD/ATTN to the controller, samples DATA, and surfaces @@ -502,7 +535,39 @@ module de25_nano_psmct32_raster_demo_top ( // Ch327a — line-buffer scanout geometry (the SCALABLE display path: O(width) BRAM, not // O(width*height) like the frame-cache). For the Ch326 PSMCT32 spill FB: 128 px * 4 B = // 512 B/row = 16 beats. (Default = the Ch321 128x128 PSMCT16 demo: 256 B/row = 8 beats.) -`ifdef GS_TILE_SPILL +`ifdef GS_SH3_LPDDR_FB + `ifdef GS_SH3_LPDDR_FB_Z + `ifdef GS_SH3_LPDDR_FB_640 + localparam int SCANOUT_LB_STRIDE = 2560; // Ch358 — persistent-Z at NATIVE 640 px * 4 B PSMCT32 (FBW=10) + localparam int SCANOUT_LB_ROW_BEATS = 80; // 2560 / 32 + localparam int SCANOUT_LB_NROWS = 480; // Ch358 — native 640x480, size 0x12C000, 38400 beats/frame + `else + localparam int SCANOUT_LB_STRIDE = 1024; // Ch357 — persistent-Z strong-reject fixture: 256 px * 4 B PSMCT32 + localparam int SCANOUT_LB_ROW_BEATS = 32; // 1024 / 32 + localparam int SCANOUT_LB_NROWS = 210; // Ch357 — strong-reject primary (256x210), 6720 beats/frame + `endif + `elsif GS_SH3_LPDDR_FB_640 + localparam int SCANOUT_LB_STRIDE = 2560; // Ch357 — NATIVE 640 px * 4 B PSMCT32 (FBW=10) + localparam int SCANOUT_LB_ROW_BEATS = 80; // 2560 / 32 + localparam int SCANOUT_LB_NROWS = 480; // Ch357 — native 640x480, size 0x12C000, 38400 beats/frame + `elsif GS_SH3_LPDDR_FB_SCHED + localparam int SCANOUT_LB_STRIDE = 1536; // Ch356 — 384 px * 4 B PSMCT32 (FBW=6, N-texture scheduler union) + localparam int SCANOUT_LB_ROW_BEATS = 48; // 1536 / 32 + localparam int SCANOUT_LB_NROWS = 381; // Ch356 — 3-epoch union bbox (384x381), 18288 beats/frame + `elsif GS_SH3_LPDDR_FB_MULTITEX + localparam int SCANOUT_LB_STRIDE = 1280; // Ch355 — 320 px * 4 B PSMCT32 (FBW=5, multi-texture A+B union) + localparam int SCANOUT_LB_ROW_BEATS = 40; // 1280 / 32 + localparam int SCANOUT_LB_NROWS = 381; // Ch355 — A+B union bbox (320x381) + `elsif GS_SH3_LPDDR_FB_MULTI + localparam int SCANOUT_LB_STRIDE = 1024; // 256 px * 4 B PSMCT32 + localparam int SCANOUT_LB_ROW_BEATS = 32; + localparam int SCANOUT_LB_NROWS = 338; // Ch354 — multi-draw union bbox (256x338) + `else + localparam int SCANOUT_LB_STRIDE = 1024; // Ch353 — 256 px * 4 B PSMCT32 + localparam int SCANOUT_LB_ROW_BEATS = 32; // 1024 / 32 + localparam int SCANOUT_LB_NROWS = 334; // Ch353 — single SH3 draw bounding box (256x334) + `endif +`elsif GS_TILE_SPILL localparam int SCANOUT_LB_STRIDE = 1024; // Ch327b — 256 px * 4 B PSMCT32 localparam int SCANOUT_LB_ROW_BEATS = 32; // 1024 / 32 localparam int SCANOUT_LB_NROWS = 256; @@ -510,6 +575,26 @@ module de25_nano_psmct32_raster_demo_top ( localparam int SCANOUT_LB_STRIDE = 256; localparam int SCANOUT_LB_ROW_BEATS = 8; localparam int SCANOUT_LB_NROWS = 128; +`endif + // Ch418 — full-frame SH3 profiles preserve the dump's 512-pixel + // FBW=8 source geometry while presenting it across the board's + // 640-pixel VGA/HDMI active line. Other profiles remain 1:1. +`ifdef GS_SH3_LPDDR_FB_640 + localparam bit SCANOUT_LB_H_STRETCH_5_TO_4 = 1'b1; + localparam int SCANOUT_LB_V_SOURCE_START = 32; + localparam bit SCANOUT_LB_V_STRETCH_15_TO_14 = 1'b1; + localparam bit SCANOUT_LB_V_LINEAR_FILTER = 1'b0; + localparam bit SCANOUT_LB_H_LINEAR_FILTER = 1'b0; + localparam bit SCANOUT_LB_BINOMIAL_3X3_FILTER = 1'b1; + localparam int SCANOUT_LB_H_SOURCE_PIXELS = 512; +`else + localparam bit SCANOUT_LB_H_STRETCH_5_TO_4 = 1'b0; + localparam int SCANOUT_LB_V_SOURCE_START = 0; + localparam bit SCANOUT_LB_V_STRETCH_15_TO_14 = 1'b0; + localparam bit SCANOUT_LB_V_LINEAR_FILTER = 1'b0; + localparam bit SCANOUT_LB_H_LINEAR_FILTER = 1'b0; + localparam bit SCANOUT_LB_BINOMIAL_3X3_FILTER = 1'b0; + localparam int SCANOUT_LB_H_SOURCE_PIXELS = 0; `endif // Initialize at declaration so iverilog doesn't bring up the // sim with an X on hps_reset_sync[1] — that X would AND into @@ -529,7 +614,7 @@ module de25_nano_psmct32_raster_demo_top ( end wire hps_core_reset = hps_reset_sync[1]; - wire core_rst_n = rst_sync[1] & ~hps_core_reset; + assign core_rst_n = rst_sync[1] & ~hps_core_reset; // ------------------------------------------------------------- // core_go pulse — wait GO_DELAY cycles after core_rst_n @@ -592,6 +677,7 @@ module de25_nano_psmct32_raster_demo_top ( wire demo_flush_emit; wire [31:0] demo_flush_addr; wire [15:0] demo_flush_pix16; + wire [3:0] demo_flush_be; wire [5:0] demo_flush_psm; wire [31:0] demo_vram_raddr; // Ch320 — PCRTC scanout VRAM byte address wire demo_pix_window; // Ch320 — high inside the displayed frame window @@ -622,6 +708,86 @@ module de25_nano_psmct32_raster_demo_top ( wire [31:0] demo_tile_reload_color; // reloaded color for raddr (1-cyc) wire [31:0] demo_tile_reload_z; // reloaded Z for raddr (1-cyc) wire [2:0] demo_tile_phase; // Ch323 diag — current tile phase (event-counter source) + // Ch357 — persistent-Z ROP fragment stream (perspective path). u_demo emits per-fragment + // {x,y,z} aligned to the flush color; gs_lpddr_zc_emit (under GS_SH3_LPDDR_FB_Z) does the + // PSMZ16S clamp16 read/compare/update and emits color ONLY on Z-pass. Inert otherwise. + wire [11:0] demo_flush_x; + wire [11:0] demo_flush_y; + wire [31:0] demo_flush_z; + wire demo_flush_abe; + wire [16:0] demo_flush_alpha; + wire demo_flush_ztest; + wire [1:0] demo_flush_ztst; + wire demo_flush_zmsk; + + // ============================ Ch353 render epoch (GS_SH3_LPDDR_FB) ============================ + // Codex round 5: with FEEDER_AUTOSTART=0 the boot setup ITSELF transitions into C_READY, so a flush gated on a + // feeder_ready RISE alone would enqueue a FALSE end-of-scene EOF at setup — which would assert frame_drained the + // instant the host later arms the writer. Gate the flush on an in-flight render instead: + // sh3_render_inflight = set by an ACCEPTED host GO (feeder_go pulse WHILE ready) + // sh3_fb_flush = sh3_render_inflight && feeder_ready RISE (render+drain complete) -> ONE EOF per render + // sh3_render_inflight = cleared when the flush is issued + // The writer's ordered drain ack (sh3_frame_drained, EMIF domain) then HARD-gates the scanout (no timeout). + // Proven end-to-end by tb_top_psmct32_sh3_lpddr_fb_seq. Inert (flush tied 0) for every other profile. +`ifdef GS_SH3_LPDDR_FB + wire sh3_frame_drained; // driven by u_lpddr_axi .frame_drained (EMIF/axi domain) + logic sh3_fb_flush, sh3_render_inflight, sh3_ready_q; + wire sh3_ready_rise = feeder_ready_w && !sh3_ready_q; + always_ff @(posedge design_clk or negedge core_rst_n) begin + if (!core_rst_n) begin sh3_fb_flush<=1'b0; sh3_render_inflight<=1'b0; sh3_ready_q<=1'b0; end + else begin + sh3_ready_q <= feeder_ready_w; + sh3_fb_flush <= 1'b0; + if (feeder_go_pulse_w && feeder_ready_w) sh3_render_inflight <= 1'b1; // accepted GO opens the epoch + if (sh3_render_inflight && sh3_ready_rise) begin + sh3_fb_flush <= 1'b1; // exactly one EOF per render + sh3_render_inflight <= 1'b0; + end + end + end +`else + wire sh3_fb_flush = 1'b0; + wire sh3_frame_drained = 1'b0; // non-SH3 profiles: tie off (fed to the bridge diagnostic, unused there) +`endif +`ifdef GS_SH3_LPDDR_FB_Z + // ---- Ch357 persistent-Z ROP feed (design_clk) ---- + // The raster flush is the fragment producer; sh3_fb_flush (proven one-per-render ordered + // scene-completion marker) rides the SAME request FIFO as the end-of-scene marker. clamp16 is + // the vendored PCSX2 PSMZ16S source-Z saturation: min(z, 0xFFFF). + wire [15:0] zc_g_zq_w = (|demo_flush_z[31:16]) ? 16'hFFFF : demo_flush_z[15:0]; + wire zc_frag_v = demo_flush_emit && (demo_flush_psm == 6'h00); // PSMCT32 raster fragment + wire zc_g_valid = zc_frag_v || sh3_fb_flush; + wire zc_g_scene = sh3_fb_flush; // ordered end-of-scene marker + wire [11:0] zc_g_x = demo_flush_x; + wire [11:0] zc_g_y = demo_flush_y; + wire [15:0] zc_g_zq = zc_g_zq_w; + wire zc_g_zmsk = demo_flush_zmsk; + wire zc_g_ztest = demo_flush_ztest; + wire [1:0] zc_g_ztst = demo_flush_ztst; + wire [31:0] zc_g_color = demo_flush_color32; + wire [16:0] zc_g_alpha = demo_flush_alpha; + wire [3:0] zc_g_be = demo_flush_be; + wire zc_g_ready; // driven by zc_emit + // Fragment-drop guard: the request async FIFO SILENTLY drops when g_ready is low and the raster + // cannot stall. Count every dropped request; the bridge snapshots this (0x0EC) + a sticky-nonzero bit + // (0x02C[8]) so the HOST proves zero drops per scene (fail-closed), not just the randomized sim. + reg [31:0] zc_g_drops_q; + always_ff @(posedge design_clk or negedge core_rst_n) begin + if (!core_rst_n) zc_g_drops_q <= 32'd0; + else if (zc_g_valid && !zc_g_ready) zc_g_drops_q <= zc_g_drops_q + 32'd1; + end + wire [31:0] zc_g_drops = zc_g_drops_q; + // Z-cache invalidate once at the initial host ARM (after the host preclears color+Z, before GO 1). + // arm rises exactly once per session; the pulse invalidates gs_lpddr_z_rmw's write-back line so Z + // then persists across every scheduler epoch (only clear_start invalidates; scene markers keep it). + wire zc_clear_done; + reg arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge emif_reset_n) begin + if (!emif_reset_n) begin arm_e1<=1'b0; arm_e2<=1'b0; arm_e3<=1'b0; end + else begin arm_e1<=lpddr_arm_w; arm_e2<=arm_e1; arm_e3<=arm_e2; end + end + wire zc_clear_start = arm_e2 && !arm_e3; // emif-domain rising edge of arm +`endif // Ch352 (Codex guardrail #1) — LPDDR texture-cache geometry as PROFILE PARAMETERS, not hardcoded over the // Ch322 tritex demo. SH3 real-draw crop: full 512x512 PSMT8 (262 KiB) in LPDDR, sampled at TBP=1024 // (0x40000). Every other GS_LPDDR_TEX profile keeps the tritex 8x8 (2 KiB) geometry. @@ -629,6 +795,10 @@ module de25_nano_psmct32_raster_demo_top ( localparam int TEXC_VRAM_BASE = 32'h0004_0000; // crop TEX_VRAM_BASE = NEW_TBP(1024)*256 localparam int TEXC_BYTES = 262144; // 512x512 PSMT8 localparam int TEXC_NBEATS = 8192; // 262144 / 32 (single-beat 32 B reads) +`elsif GS_SH3_LPDDR_FB + localparam int TEXC_VRAM_BASE = 32'h0004_0000; // Ch353 — same 512x512 PSMT8 texture as the crop profile + localparam int TEXC_BYTES = 262144; + localparam int TEXC_NBEATS = 8192; `else localparam int TEXC_VRAM_BASE = 2048; // Ch322 tritex 8x8 PSMCT32 localparam int TEXC_BYTES = 2048; @@ -642,12 +812,24 @@ module de25_nano_psmct32_raster_demo_top ( // this build path. Removing it retires the Ch159+ critical // path and frees the timing budget for a faster clock. .STRIP_HW_DIVIDER (1'b1), - // Ch352 — SEQUENTIAL gradient divider (registered iterations, no combinational cone). This REPLACES the - // combinational divide + the multicycle/false_path SDC approaches, which all made the Quartus fitter - // grind on the divider cone for hours. The sequential divider closes timing with NO SDC exception. - // Bit-exact to `/` (tb_gs_grad_divider) so the SH3 oracle stays 96.2%. GRAD_DIV_CYCLES below is ignored. - .GRAD_SEQ_DIVIDER (1'b1), - .GRAD_DIV_CYCLES (4), + // Ch357 (Codex) — SEQUENTIAL gradient divider (registered iterations, NO combinational cone), now the board + // default. The Ch352 seq-divider "prep trap" (>18 min, never reached Place) was caused by the combinational + // signed `/` remaining UNCONDITIONALLY in the RTL alongside the sequential divider — Quartus inferred BOTH, + // and the giant LPM divide cone is what ground Place/Prep for hours (twice: the SDC multicycle on the ~1157- + // source combinational cone, then the numerator-register variant, both ground). Ch357 makes the two dividers + // MUTUALLY EXCLUSIVE via generate (gs_stub g_combdiv/g_no_combdiv): at GRAD_SEQ_DIVIDER=1 the combinational `/` + // does not exist in the netlist at all, so there is no divider cone and NO gradient SDC exception is applied. + // Ch357 FINAL (Codex, 2026-07-05, after the isolation experiment ROUTED): keep the registered-numerator + // COMBINATIONAL divide (grad_num_sel_q/grad_det_q -> grad_result_q). Ch417 widens the divide from 56/32 to + // 64/35 bits, so use GRAD_DIV_CYCLES=5: design_clk = 40 ns (25 MHz) gives a 200 ns functional window instead + // of relying on the old 160 ns window measured against the former 108 ns routed cone. The setup=5/hold=4 + // multicycle is applied STA-ONLY in the SDC (never + // during quartus_fit), so the fitter keeps its known-CONVERGENT "hopeless single-cycle" behavior (places in + // seconds) while final quartus_sta fail-closes at the 200 ns window. SEQUENTIAL divider (=1) is NOT used — it + // traps this Agilex fitter even with the combinational `/` generate-stripped. Bit-exact to `/`; SH3 oracle + // unchanged (tb_gs_grad_divider + the persp board-path equivalence 252/252). + .GRAD_SEQ_DIVIDER (1'b0), + .GRAD_DIV_CYCLES (5), // Ch163 — strip the PCRTC magnification divider. The demo // locks MAGH=MAGV=0 so the divisor is constant 1 and the // `hwin_rel / hmag_factor` / `vwin_rel / vmag_factor` math @@ -901,6 +1083,52 @@ module de25_nano_psmct32_raster_demo_top ( .CLUT_CSM1_ENABLE (1'b1), .FEEDER_ENABLE (1'b1), .FEEDER_STG_WORDS (768) // 68 clipped tris -> ~655 staging words + `elsif GS_SH3_LPDDR_FB + // Ch353 — the SH3 real draw on an LPDDR-ONLY direct PSMCT32 framebuffer (the FULL 256x334 bounding box, NOT + // the Ch352 256x120 BRAM crop). Same feeder-driven SH3 config as GS_SH3_REAL_DRAW_DEMO (real CSM1 CLUT + + // Ch351 widened perspective + GS_LPDDR_TEX cache, GRAD_SEQ_DIVIDER=0 from the shared prefix = the known- + // fitting combinational divide), but: FB_LPDDR_ONLY suppresses the BRAM raster mirror (the flush stream + // drives the PSMCT32 LPDDR writer instead of BRAM), and FEEDER_AUTOSTART=0 so boot setup reaches C_READY + // WITHOUT a render — the host arms the writer THEN pulses GO (0x0E8), and the render-epoch flush emits exactly + // one EOF -> one frame_drained, which HARD-gates the line-buffer scanout (no timeout). VRAM stays 128 KiB / + // CBP=480 (Codex option A — the known-fitting Ch352 config; the CLUT->CBP0 BRAM-shrink is deferred). Proven + // end-to-end by tb_top_psmct32_sh3_lpddr_fb_seq (the mandatory fit gate). GS_LPDDR4B_FB + GS_LPDDR_TEX must + // ALSO be defined (the build profile sets all three). + .VRAM_BYTES (128 * 1024), + .RAM_SIZE_BYTES (32 * 1024), + .VRAM_ENABLE_READ2 (1'b0), + .PSMCT32_SWIZZLE (1'b0), + .COMBINED_TAZ (1'b0), + .TILE_LOCAL (1'b0), + .TILE_COLS (1), + .TILE_ROWS (1), + .TILE_MULTIPRIM (1'b0), + .TILE_PRIM_COUNT (1), + .TILE_FIFO_DEPTH (8), + .BIN_BUFFER_ENABLE (1'b0), + .HEARTBEAT_SPLICE_ENABLE (1'b0), + .PERSPECTIVE_CORRECT(1'b1), + .SUBPIXEL_XY (1'b1), // Ch416 — preserve native XYZ 12.4 and sample pixel centers + .PERSP_RECIP_IDX_BITS(11), + .BILINEAR_ENABLE (1'b1), + .PALETTE_BILINEAR (1'b1), + .CLUT_CSM1_ENABLE (1'b1), + .FEEDER_ENABLE (1'b1), +`ifdef GS_SH3_LPDDR_FB_Z + .FEEDER_STG_WORDS (2048), // Ch402 — character draws split into staging-safe single-draw epochs +`elsif GS_SH3_LPDDR_FB_640 + .FEEDER_STG_WORDS (2048), // Ch357 — native 640x480, same runtime-staged per-epoch list (619 words) +`elsif GS_SH3_LPDDR_FB_SCHED + .FEEDER_STG_WORDS (2048), // Ch356 — runtime-staged per-epoch list (68 tris / 619 words) + headroom +`elsif GS_SH3_LPDDR_FB_MULTITEX + .FEEDER_STG_WORDS (2048), // Ch355 — runtime-staged per-scene list (68 tris / 619 words) + headroom +`elsif GS_SH3_LPDDR_FB_MULTI + .FEEDER_STG_WORDS (2048), // Ch354 — 3-draw combined list = 204 tris / 1843 words (Codex-approved) +`else + .FEEDER_STG_WORDS (768), // Ch353 — single draw = 68 tris / ~655 words +`endif + .FEEDER_AUTOSTART (1'b0), // Ch353 — no boot render; host arms writer then GOes + .FB_LPDDR_ONLY (1'b1) // Ch353 — flush -> LPDDR writer, no BRAM FB mirror `elsif GS_TILE_LATE_DEMO // Ch316 — LEADING-EMPTY-TILE traversal fix. ONE prim, ONLY in the LAST tile // t15 of the 4x4 grid; tiles t0..t14 are empty and precede it. Proves the @@ -1282,6 +1510,7 @@ module de25_nano_psmct32_raster_demo_top ( .flush_emit_o (demo_flush_emit), .flush_addr_o (demo_flush_addr), .flush_pix16_o(demo_flush_pix16), + .flush_be_o (demo_flush_be), .flush_psm_o (demo_flush_psm), .vram_read_addr_o(demo_vram_raddr), // Ch320 — PCRTC scanout addr for LPDDR4B scanout .pix_window_o (demo_pix_window), // Ch320 — displayed-frame window gate @@ -1293,6 +1522,15 @@ module de25_nano_psmct32_raster_demo_top ( .tex_cache_ready_i(demo_tex_cache_ready), .tex_cache_hits_o(demo_tex_cache_hits), .tex_bram_hits_o (demo_tex_bram_hits), + // Ch357 — persistent-Z ROP fragment coords + Z (perspective path), aligned to the flush color. + .flush_x_o (demo_flush_x), + .flush_y_o (demo_flush_y), + .flush_z_o (demo_flush_z), + .flush_abe_o (demo_flush_abe), + .flush_alpha_o (demo_flush_alpha), + .flush_ztest_o (demo_flush_ztest), + .flush_ztst_o (demo_flush_ztst), + .flush_zmsk_o (demo_flush_zmsk), // Ch323 — tile color+Z spill/reload (inert outputs when TILE_SPILL_ENABLE=0). .flush_color32_o (demo_flush_color32), .z_flush_emit_o (demo_z_flush_emit), @@ -1317,7 +1555,11 @@ module de25_nano_psmct32_raster_demo_top ( .feeder_go_i (feeder_go_pulse_w), .feeder_ready_o (feeder_ready_w), .feeder_records_o (feeder_records_w), - .feeder_waits_o (feeder_waits_w) + .feeder_waits_o (feeder_waits_w), + .runtime_clut_wr_en_i (runtime_clut_wr_en_w), + .runtime_clut_wr_idx_i (runtime_clut_wr_idx_w), + .runtime_clut_wr_data_i(runtime_clut_wr_data_w), + .runtime_clut_busy_i (runtime_clut_busy_w) ); `ifndef GS_LPDDR_TEX // Ch322 — no texture cache: the texel tap returns BRAM (bram-top mux constant-folds @@ -1592,8 +1834,21 @@ module de25_nano_psmct32_raster_demo_top ( end end wire video_src_eff = video_src_dclk; +`ifdef GS_SH3_LPDDR_FB + // Ch353 — HARD frame_drained gate (Codex round 5, NO timeout): blank BLACK until the ordered drain ack, THEN the + // line-buffer scanout serves the LPDDR FB. frame_ready_emif gates the EMIF prefetch enable; frame_ready_r (design) + // gates the HDMI source mux so unfilled line buffers can never show before the frame is drained. Failure (no ack) + // stays black forever — no timeout fallback (a partial FB is exactly the bug this handshake prevents). + logic [2:0] sh3_frd_dsync; + always_ff @(posedge design_clk or posedge async_rst_assert) begin + if (async_rst_assert) sh3_frd_dsync <= 3'd0; else sh3_frd_dsync <= {sh3_frd_dsync[1:0], sh3_frame_drained}; + end + wire frame_ready_r = sh3_frd_dsync[2]; + wire frame_ready_emif = sh3_frame_drained; +`else wire frame_ready_r = 1'b1; // other profiles: BRAM mirror is a stable fallback, no gate wire frame_ready_emif = 1'b1; +`endif // emif-domain coherent bundled capture (LPDDR scanout enable + reader routing below). logic [2:0] commit_e_sync; logic video_src_emif, scanout_lb_emif; always_ff @(posedge emif_clk or negedge emif_reset_n) begin @@ -2052,7 +2307,10 @@ module de25_nano_psmct32_raster_demo_top ( // Ch324 Brick 3 — LPDDR scanout config: the spill profile scans the 64x64 PSMCT32 color // FB straight out of LPDDR at COLOR_SPILL_BASE (PCRTC addresses it BRAM-relative so // VRAM_BASE stays 0). Other LPDDR profiles keep the FB-at-0 PSMCT16 mirror. -`ifdef GS_TILE_SPILL +`ifdef GS_SH3_LPDDR_FB + localparam [29:0] SCANOUT_FB_BASE = 30'd0; // Ch353 — FB at LPDDR base 0 (host sets 0x01C=0) + localparam bit SCANOUT_PSMCT32 = 1'b1; // full-frame PSMCT32 +`elsif GS_TILE_SPILL localparam [29:0] SCANOUT_FB_BASE = COLOR_SPILL_BASE; localparam bit SCANOUT_PSMCT32 = 1'b1; `else @@ -2072,11 +2330,90 @@ module de25_nano_psmct32_raster_demo_top ( wire [7:0] fbw_awlen; wire [2:0] fbw_awsize; wire fbw_awvalid, fbw_awready; wire [255:0] fbw_wdata; wire [31:0] fbw_wstrb; wire fbw_wlast, fbw_wvalid, fbw_wready; wire [1:0] fbw_bresp; wire fbw_bvalid, fbw_bready; - gs_lpddr_axi_master #(.FIFO_DEPTH(16)) u_lpddr_axi ( +`ifdef GS_SH3_LPDDR_FB_Z + // ================= Ch357 — persistent-Z emit (gs_lpddr_zc_emit) ================= + // Replaces the plain color writer with a Z-then-color emitter: Z RMW (read/clamp16-compare/ + // update) FIRST, color enqueued ONLY on pass. Three AXI streams, routed onto the shared LPDDR + // through the SAME de25 arbiters proven in tb_top_psmct32_sh3_zarb: + // * color writes (c_*) -> fbw_* == gs_lpddr_wr_arb s0 (FB-writer, priority) + // * Z writes (zw_*) -> gs_lpddr_wr_arb s2 (repurposed spill port; inert in this profile) + // * Z reads (zr_*) -> gs_lpddr_rd_arb s3 (reload port; inert in this profile) + // Fixture geometry: 256x210 strong-reject (Ch357) or NATIVE 640x480 (Ch358, +GS_SH3_LPDDR_FB_640). + // Z base 0x140000 (disjoint from color: 640x480x4=0x12C000 < 0x140000; and tex: Z top 0x1D6000 < 0x200000). + `ifdef GS_SH3_LPDDR_FB_640 + localparam int ZFB_PXW = 640, ZFB_H = 480; + `else + localparam int ZFB_PXW = 256, ZFB_H = 210; + `endif + wire [31:0] zw_awaddr; wire [7:0] zw_awlen; wire [2:0] zw_awsize; wire [1:0] zw_awburst; + wire zw_awvalid, zw_awready; + wire [255:0] zw_wdata; wire [31:0] zw_wstrb; wire zw_wlast, zw_wvalid, zw_wready; + wire zw_bvalid, zw_bready; wire [1:0] zw_bresp; + wire [31:0] zr_araddr; wire [7:0] zr_arlen; wire [2:0] zr_arsize; wire [1:0] zr_arburst; + wire zr_arvalid, zr_arready; + wire [255:0] zr_rdata; wire [1:0] zr_rresp; wire zr_rlast, zr_rvalid, zr_rready; + wire [31:0] dr_araddr; wire [7:0] dr_arlen; wire [2:0] dr_arsize; wire [1:0] dr_arburst; + wire dr_arvalid, dr_arready; + wire [255:0] dr_rdata; wire [1:0] dr_rresp; wire dr_rlast, dr_rvalid, dr_rready; + wire [31:0] c_awaddr; wire [7:0] c_awlen; wire [2:0] c_awsize; wire [1:0] c_awburst; + wire c_awvalid; + wire [255:0] c_wdata; wire [31:0] c_wstrb; wire c_wlast, c_wvalid; + wire c_bready; + // Request-FIFO sizing history: Ch368's adjacent-frame runtime-CLUT test needed 3610 entries (4096 passed; + // 2048 clipped). The much larger Ch439 f52 production replay peaks at 6115 entries, establishing the 8192 + // production size below. zc_g_drops remains the fail-closed hardware guard. + // (History: Ch357's tb_top_psmct32_sh3_zint showed a depth-64 request FIFO drops a small transient burst + // (2 frags) when the Z-RMW stalls on a run of cache-line misses while the raster — which cannot honor + // g_ready — keeps emitting; 256 sufficed for the zsched/zs640 scenes.) + gs_lpddr_zc_emit #(.COLBASE(32'h0000_0000), .ZBASE(32'h0014_0000), + // Ch439: the complete 311-epoch f52 replay peaks at 6,115 + // queued requests. 8K retains 2,077 entries (34%) of + // measured headroom while halving the deep 93-bit FIFO's + // M20K/address-tree footprint at 310 MHz. + .FB_PXW(ZFB_PXW), .FB_H(ZFB_H), .REQ_DEPTH(8192), .COL_DEPTH(128)) u_zc_emit ( + .gs_clk(design_clk), .gs_rst_n(core_rst_n), .enable(1'b1), + .g_valid(zc_g_valid), .g_ready(zc_g_ready), .g_x(zc_g_x), .g_y(zc_g_y), .g_zq(zc_g_zq), + .g_zmsk(zc_g_zmsk), .g_ztest(zc_g_ztest), .g_ztst(zc_g_ztst), .g_color(zc_g_color), .g_alpha(zc_g_alpha), .g_be(zc_g_be), .g_scene(zc_g_scene), + .axi_clk(emif_clk), .axi_rst_n(emif_reset_n), + .clear_start(zc_clear_start), .clear_done(zc_clear_done), .frame_drained(sh3_frame_drained), + .z_araddr(zr_araddr), .z_arlen(zr_arlen), .z_arsize(zr_arsize), .z_arburst(zr_arburst), + .z_arvalid(zr_arvalid), .z_arready(zr_arready), + .z_rdata(zr_rdata), .z_rresp(zr_rresp), .z_rlast(zr_rlast), .z_rvalid(zr_rvalid), .z_rready(zr_rready), + .d_araddr(dr_araddr), .d_arlen(dr_arlen), .d_arsize(dr_arsize), .d_arburst(dr_arburst), + .d_arvalid(dr_arvalid), .d_arready(dr_arready), + .d_rdata(dr_rdata), .d_rresp(dr_rresp), .d_rlast(dr_rlast), .d_rvalid(dr_rvalid), .d_rready(dr_rready), + .z_awaddr(zw_awaddr), .z_awlen(zw_awlen), .z_awsize(zw_awsize), .z_awburst(zw_awburst), + .z_awvalid(zw_awvalid), .z_awready(zw_awready), + .z_wdata(zw_wdata), .z_wstrb(zw_wstrb), .z_wlast(zw_wlast), .z_wvalid(zw_wvalid), .z_wready(zw_wready), + .z_bvalid(zw_bvalid), .z_bready(zw_bready), .z_bresp(zw_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), + .c_awvalid(c_awvalid), .c_awready(fbw_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(fbw_wready), + .c_bvalid(fbw_bvalid), .c_bready(c_bready), .c_bresp(fbw_bresp), + .z_beats_read(), .z_beats_written(lpddr_bursts_w), .c_beats_written(lpddr_bytes_w), + .col_ovf(lpddr_fifo_ovf_w), .bresp_err(lpddr_bresp_err_w), .idle(lpddr_idle_w) + ); + // Color master -> fbw_* (gs_lpddr_wr_arb s0). c_* carries no awid; the arb tags s0 internally. + assign fbw_awaddr = c_awaddr[29:0]; assign fbw_awburst = c_awburst; assign fbw_awid = 7'd0; + assign fbw_awlen = c_awlen; assign fbw_awsize = c_awsize; assign fbw_awvalid = c_awvalid; + assign fbw_wdata = c_wdata; assign fbw_wstrb = c_wstrb; assign fbw_wlast = c_wlast; + assign fbw_wvalid = c_wvalid; assign fbw_bready = c_bready; + assign emif_m_awaddr = 32'd0; assign emif_m_awid = 5'd0; // unused under _Z +`else + gs_lpddr_axi_master #(.FIFO_DEPTH(16) +`ifdef GS_SH3_LPDDR_FB + , .PIX_BYTES(4) // Ch353 — PSMCT32 = 8 px / 256-bit beat +`endif + ) u_lpddr_axi ( .gs_clk(design_clk), .gs_rst_n(core_rst_n), .enable(1'b1), .arm(lpddr_arm_w), .canary(lpddr_canary_w), .fb_base(lpddr_fb_base_w), .ctrl_commit(lpddr_ctrl_commit_w), +`ifdef GS_SH3_LPDDR_FB + .px_emit(demo_flush_emit && (demo_flush_psm == 6'h00)), // Ch353 — PSMCT32 raster emits only + .px_addr(demo_flush_addr), .px_pix32(demo_flush_color32), .flush(sh3_fb_flush), +`else .px_emit(demo_flush_emit && (demo_flush_psm == 6'h02)), - .px_addr(demo_flush_addr), .px_pix16(demo_flush_pix16), + .px_addr(demo_flush_addr), .px_pix32({16'd0, demo_flush_pix16}), .flush(1'b0), +`endif .axi_clk(emif_clk), .axi_rst_n(emif_reset_n), .awaddr(emif_m_awaddr), .awlen(fbw_awlen), .awsize(fbw_awsize), .awburst(fbw_awburst), .awid(emif_m_awid), .awvalid(fbw_awvalid), @@ -2087,9 +2424,13 @@ module de25_nano_psmct32_raster_demo_top ( .beats_written(lpddr_bytes_w), .bursts_issued(lpddr_bursts_w), .bresp_err_count(lpddr_bresp_err_w), .fifo_overflow_count(lpddr_fifo_ovf_w), .idle(lpddr_idle_w) +`ifdef GS_SH3_LPDDR_FB + , .frame_drained(sh3_frame_drained) // Ch353 — ordered drain ack -> hard scanout gate +`endif ); assign fbw_awaddr = emif_m_awaddr[29:0]; // EMIF addr is 30-bit (base 0) assign fbw_awid = {2'b00, emif_m_awid}; // EMIF awid is 7-bit +`endif `ifdef GS_LPDDR_TEX // Ch322 — HPS write-probe (stage texture words) + 2:1 write arbiter (FB writer = priority). wire [29:0] wp_awaddr; wire [1:0] wp_awburst; wire [6:0] wp_awid; @@ -2116,10 +2457,17 @@ module de25_nano_psmct32_raster_demo_top ( .s1_awsize(wp_awsize), .s1_awvalid(wp_awvalid), .s1_awready(wp_awready), .s1_wdata(wp_wdata), .s1_wstrb(wp_wstrb), .s1_wlast(wp_wlast), .s1_wvalid(wp_wvalid), .s1_wready(wp_wready), .s1_bresp(wp_bresp), .s1_bvalid(wp_bvalid), .s1_bready(wp_bready), +`ifdef GS_SH3_LPDDR_FB_Z + // Ch357 — s2 = persistent-Z write stream from gs_lpddr_zc_emit (zw_*). + .s2_awaddr(zw_awaddr[29:0]), .s2_awburst(zw_awburst), .s2_awid(7'd6), .s2_awlen(zw_awlen), .s2_awsize(zw_awsize), + .s2_awvalid(zw_awvalid), .s2_awready(zw_awready), .s2_wdata(zw_wdata), .s2_wstrb(zw_wstrb), .s2_wlast(zw_wlast), + .s2_wvalid(zw_wvalid), .s2_wready(zw_wready), .s2_bresp(zw_bresp), .s2_bvalid(zw_bvalid), .s2_bready(zw_bready), +`else // Ch323 — ports 2/3 (Z spill / HPS write-probe) unused in the GS_LPDDR_TEX build; tie inert. .s2_awaddr(30'd0), .s2_awburst(2'b01), .s2_awid(7'd6), .s2_awlen(8'd0), .s2_awsize(3'b101), .s2_awvalid(1'b0), .s2_awready(), .s2_wdata(256'd0), .s2_wstrb(32'd0), .s2_wlast(1'b0), .s2_wvalid(1'b0), .s2_wready(), .s2_bresp(), .s2_bvalid(), .s2_bready(1'b1), +`endif .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd5), .s3_awlen(8'd0), .s3_awsize(3'b101), .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b1), @@ -2284,6 +2632,8 @@ module de25_nano_psmct32_raster_demo_top ( // line-buffer; other profiles keep the runtime bridge bit (default frame-cache). `ifdef GS_TILE_SPILL wire scanout_lb_eff = 1'b1; +`elsif GS_SH3_LPDDR_FB + wire scanout_lb_eff = 1'b1; // Ch353 — always line-buffer (a 256x334 frame-cache = 334 KiB) `else wire scanout_lb_eff = scanout_lb_emif; // Ch352 — emif-domain coherent capture (not raw bridge bit) `endif @@ -2303,7 +2653,14 @@ module de25_nano_psmct32_raster_demo_top ( ); gs_lpddr_scanout_lb #(.FB_BASE(SCANOUT_FB_BASE), .STRIDE_BYTES(SCANOUT_LB_STRIDE), .ROW_BEATS(SCANOUT_LB_ROW_BEATS), .N_ROWS(SCANOUT_LB_NROWS), - .PSMCT32(SCANOUT_PSMCT32)) u_lpddr_scan_lb ( + .PSMCT32(SCANOUT_PSMCT32), + .H_STRETCH_5_TO_4(SCANOUT_LB_H_STRETCH_5_TO_4), + .V_SOURCE_START(SCANOUT_LB_V_SOURCE_START), + .V_STRETCH_15_TO_14(SCANOUT_LB_V_STRETCH_15_TO_14), + .V_LINEAR_FILTER(SCANOUT_LB_V_LINEAR_FILTER), + .H_LINEAR_FILTER(SCANOUT_LB_H_LINEAR_FILTER), + .H_SOURCE_PIXELS(SCANOUT_LB_H_SOURCE_PIXELS), + .BINOMIAL_3X3_FILTER(SCANOUT_LB_BINOMIAL_3X3_FILTER)) u_lpddr_scan_lb ( .axi_clk(emif_clk), .axi_rst_n(emif_reset_n), .enable(video_src_emif & scanout_lb_eff & frame_ready_emif), .video_clk(design_clk), .frame_start(demo_video_vsync), @@ -2354,6 +2711,9 @@ module de25_nano_psmct32_raster_demo_top ( .s3_arready(reload_ar_arready), .s3_rdata(reload_r_rdata), .s3_rresp(reload_r_rresp), .s3_rlast(reload_r_rlast), .s3_rvalid(reload_r_rvalid), .s3_rready(reload_r_rready), + .s4_araddr(dr_araddr[29:0]), .s4_arburst(dr_arburst), .s4_arid(7'd7), + .s4_arlen(dr_arlen), .s4_arsize(dr_arsize), .s4_arvalid(dr_arvalid), .s4_arready(dr_arready), + .s4_rdata(dr_rdata), .s4_rresp(dr_rresp), .s4_rlast(dr_rlast), .s4_rvalid(dr_rvalid), .s4_rready(dr_rready), .m_araddr(emif_ar_araddr), .m_arburst(emif_ar_arburst), .m_arid(emif_ar_arid), .m_arlen(emif_ar_arlen), .m_arsize(emif_ar_arsize), .m_arvalid(emif_ar_arvalid), .m_arready(emif_ar_arready), @@ -2413,6 +2773,14 @@ module de25_nano_psmct32_raster_demo_top ( .color_o(demo_tile_reload_color), .z_o(demo_tile_reload_z), .reload_ready(demo_tile_reload_ready) ); +`elsif GS_SH3_LPDDR_FB_Z + // Ch357 — read-port-3 carries the persistent-Z READ stream from gs_lpddr_zc_emit (zr_*). + assign reload_ar_araddr=zr_araddr[29:0]; assign reload_ar_arburst=zr_arburst; assign reload_ar_arid=7'd6; + assign reload_ar_arlen=zr_arlen; assign reload_ar_arsize=zr_arsize; assign reload_ar_arvalid=zr_arvalid; + assign zr_arready=reload_ar_arready; + assign zr_rdata=reload_r_rdata; assign zr_rresp=reload_r_rresp; assign zr_rlast=reload_r_rlast; + assign zr_rvalid=reload_r_rvalid; assign reload_r_rready=zr_rready; + assign reload_color_beats_w=32'd0; assign reload_z_beats_w=32'd0; assign reload_rd_errs_w=32'd0; `else // no reload engine — tie read-port-3 inert (arvalid=0, rready=1 drains) + counters 0. assign reload_ar_araddr=30'd0; assign reload_ar_arburst=2'b01; assign reload_ar_arid=7'd6; @@ -2434,7 +2802,7 @@ module de25_nano_psmct32_raster_demo_top ( .gs_clk(design_clk), .gs_rst_n(core_rst_n), .enable(1'b1), .arm(lpddr_arm_w), .canary(lpddr_canary_w), .fb_base(lpddr_fb_base_w), .ctrl_commit(lpddr_ctrl_commit_w), .px_emit(demo_flush_emit && (demo_flush_psm == 6'h02)), - .px_addr(demo_flush_addr), .px_pix16(demo_flush_pix16), + .px_addr(demo_flush_addr), .px_pix32({16'd0, demo_flush_pix16}), .flush(1'b0), .axi_clk(CLOCK2_50), .axi_rst_n(~ninit_done), .awaddr(f2s_awaddr_w), .awlen(f2s_awlen_w), .awsize(f2s_awsize_w), .awburst(f2s_awburst_w), .awid(f2s_awid_w), .awvalid(f2s_awvalid_w), @@ -2682,6 +3050,15 @@ module de25_nano_psmct32_raster_demo_top ( .emif_hps_emif_ref_clk_0_clk (LPDDR4A_REFCLK_p) ); + // Ch357 — persistent-Z observability into the bridge (host fail-closed gates). Under GS_SH3_LPDDR_FB_Z the + // zc_emit preclear ack + drop counter; tied 0 for every other profile (the status bits read 0 / clear_done 0). +`ifdef GS_SH3_LPDDR_FB_Z + wire bridge_clear_done = zc_clear_done; // emif domain (from gs_lpddr_zc_emit) -> 0x02C[7] + wire [31:0] bridge_frag_drops = zc_g_drops; // design_clk domain -> 0x0EC snapshot + 0x02C[8] sticky +`else + wire bridge_clear_done = 1'b0; + wire [31:0] bridge_frag_drops = 32'd0; +`endif // The minimal null AXI4 slave for the hps2fpga bridge. Same port // signature as `splash_hps_bridge` so a future "real" ps2 bridge // can be dropped in without re-plumbing the top. @@ -2714,6 +3091,9 @@ module de25_nano_psmct32_raster_demo_top ( .lpddr_bresp_err_i(lpddr_bresp_err_w), .lpddr_fifo_ovf_i (lpddr_fifo_ovf_w), .lpddr_idle_i (lpddr_idle_w), + .frame_drained_i (sh3_frame_drained), // Ch353 — 0x02C[6] host-visible ordered drain ack (0 for non-SH3) + .clear_done_i (bridge_clear_done), // Ch357 — 0x02C[7] persistent-Z preclear done (0 for non-Z) + .frag_drops_i (bridge_frag_drops), // Ch357 — 0x0EC snapshot + 0x02C[8] sticky drop flag (0 for non-Z) .lpddr_rd_addr_o (lpddr_rd_addr_w), .lpddr_rd_pulse_o (lpddr_rd_pulse_w), .lpddr_rd_data_i (lpddr_rd_data_w), @@ -2849,7 +3229,16 @@ module de25_nano_psmct32_raster_demo_top ( .feeder_go_tgl_o (feeder_go_tgl_w), .feeder_ready_i (feeder_ready_w), .feeder_records_i (feeder_records_w), - .feeder_waits_i (feeder_waits_w) + .feeder_waits_i (feeder_waits_w), + + .clut_stage_waddr_o (clut_stage_waddr_w), + .clut_stage_wdata_o (clut_stage_wdata_w), + .clut_stage_we_o (clut_stage_we_w), + .clut_commit_tgl_o (clut_commit_tgl_w), + .clut_expected_crc_o (clut_expected_crc_w), + .clut_busy_i (runtime_clut_busy_w), + .clut_done_tgl_i (runtime_clut_done_tgl_w), + .clut_crc_i (runtime_clut_crc_w) ); `else @@ -2886,6 +3275,11 @@ module de25_nano_psmct32_raster_demo_top ( assign feeder_go_tgl_w = 1'b0; assign feeder_stg_waddr_w = 12'd0; assign feeder_stg_wdata_w = 64'd0; + assign clut_stage_waddr_w = 8'd0; + assign clut_stage_wdata_w = 32'd0; + assign clut_stage_we_w = 1'b0; + assign clut_commit_tgl_w = 1'b0; + assign clut_expected_crc_w = 32'd0; `endif // USE_QSYS_TOP // Suppress unused-input warnings on lint (CLOCK0_50 / CLOCK1_50 diff --git a/rtl/top/top_psmct32_raster_demo_bram.sv b/rtl/top/top_psmct32_raster_demo_bram.sv index 9e23a37..d9ca4db 100644 --- a/rtl/top/top_psmct32_raster_demo_bram.sv +++ b/rtl/top/top_psmct32_raster_demo_bram.sv @@ -195,12 +195,13 @@ module top_psmct32_raster_demo_bram // Default 0 generate-guards all perspective logic out (zero cost); only the // GS_PERSP_DEMO board profile sets it 1. parameter bit PERSPECTIVE_CORRECT = 1'b0, + parameter bit SUBPIXEL_XY = 1'b0, parameter int PERSP_RECIP_IDX_BITS = 8, // Ch351 — perspective reciprocal LUT width (far-W -> 11) parameter int GRAD_DIV_CYCLES = 1, // Ch352 — triangle-setup divide settle cycles (board fits -> 4) parameter bit GRAD_SEQ_DIVIDER = 1'b0, // Ch352 — sequential gradient divider (board fits -> 1) // Ch344 — TEXTURED + source-over ALPHA SPRITE path (forwarded to gs_stub). Default 0 -> byte-identical. parameter bit SPRITE_TEX_ALPHA = 1'b0, - parameter bit SPRITE_TEX_ALPHA_CLUT = 1'b0, // Ch347 — admit PSMT8 (CLUT) textures into the alpha-sprite path + parameter bit SPRITE_TEX_ALPHA_CLUT = 1'b0, // Ch408 — admit PSMT8/PSMT4 CLUT textures into alpha sprites parameter bit CLUT_CSM1_ENABLE = 1'b0, // Ch350 — CSM1 16x16 CT32 grid CLUT load (SH3 indexed env path) // Ch302 — COMBINED textured+alpha+depth probe (forwarded to gs_stub). When 1, // a TME+ABE+ZTE triangle runs the multi-beat per-pixel FSM (Zread->Ztest-> @@ -237,6 +238,11 @@ module top_psmct32_raster_demo_bram // dead logic, byte-identical for every existing profile. parameter bit FEEDER_ENABLE = 1'b0, parameter int FEEDER_STG_WORDS = 256, + // Ch353 — auto-start the FIRST feeder render at C_SETUP (default, byte-identical). Set 0 ONLY for + // the GS_SH3_LPDDR_FB profile: the disarmed boot render would otherwise leave a pending EOF that + // falsely asserts frame_drained the instant the host later arms the writer. With AUTOSTART=0, + // C_SETUP transitions straight to C_READY (no render) and every render waits for an explicit GO. + parameter bit FEEDER_AUTOSTART = 1'b1, // Ch315 — primitive FIFO / per-tile bin depth (capacity). Power-of-2, default // 4 = byte-identical. GS_TILE_CAP_DEMO sets 8 to scale capacity past the old 4. parameter int TILE_FIFO_DEPTH = 4, @@ -366,7 +372,16 @@ module top_psmct32_raster_demo_bram output logic [31:0] flush_addr_o, // linear FB byte address output logic [15:0] flush_pix16_o, output logic [31:0] flush_color32_o, // Ch323 — full 32-bit flushed color (for spill round-trip capture) + output logic [3:0] flush_be_o, // FRAME.FBMSK-compressed byte enables output logic [5:0] flush_psm_o, + output logic [11:0] flush_x_o, // Ch357 — fragment x/y/z for the external LPDDR-Z ROP (perspective path) + output logic [11:0] flush_y_o, + output logic [31:0] flush_z_o, + output logic flush_abe_o, + output logic [16:0] flush_alpha_o, + output logic flush_ztest_o, + output logic [1:0] flush_ztst_o, + output logic flush_zmsk_o, // Ch323 — tile Z-FLUSH stream (TILE_SPILL_ENABLE; the de25 routes it to an LPDDR Z-backing // writer). z_flush_addr_o is Z-backing-relative (pixel_index*4, 32-bit Z). Inert/0 unless // spilling; unused (left open) by every existing consumer. @@ -416,7 +431,15 @@ module top_psmct32_raster_demo_bram input logic feeder_go_i, // retrigger pulse (honoured only in C_READY) output logic feeder_ready_o, // control FSM is in C_READY (a new list may start) output logic [15:0] feeder_records_o, // primitives emitted by the current list - output logic [31:0] feeder_waits_o // cycles the feeder paused under fifo_full + output logic [31:0] feeder_waits_o, // cycles the feeder paused under fifo_full + + // Ch367 -- runtime palette residency. The design-clock staging copier + // owns this writer while busy; the legacy TEX0/VRAM loader remains the + // sole writer at every other time. + input logic runtime_clut_wr_en_i, + input logic [7:0] runtime_clut_wr_idx_i, + input logic [31:0] runtime_clut_wr_data_i, + input logic runtime_clut_busy_i ); localparam int RAM_ADDR_W = $clog2(RAM_SIZE_BYTES); @@ -805,7 +828,12 @@ module top_psmct32_raster_demo_bram fdr_start <= 1'b0; unique case (cst) C_SETUP: if (dma_done_seen && !xfer_busy) begin // bootlet setup + TRX/IMAGE done - fdr_start <= 1'b1; grid_ran <= 1'b0; cst <= C_RUN; end + if (FEEDER_AUTOSTART) begin + fdr_start <= 1'b1; grid_ran <= 1'b0; cst <= C_RUN; // auto boot render + end else begin + grid_ran <= 1'b0; cst <= C_READY; // Ch353: no boot render — await explicit GO + end + end C_RUN: begin if (gs_scene_busy) grid_ran <= 1'b1; if (fdr_done) cst <= C_DRAIN; end // Ch337 — gate on gs_scene_busy (NOT gs_raster_active): a >FIFO_DEPTH scene @@ -883,15 +911,39 @@ module top_psmct32_raster_demo_bram logic raster_pixel_emit; logic [63:0] raster_pixel_color_q; logic [31:0] raster_pixel_fb_addr_q; + logic [11:0] raster_pixel_x_q, raster_pixel_y_q; + logic [31:0] raster_pixel_z_q; logic [3:0] raster_pixel_be_q; logic [31:0] raster_pixel_mask_q; + logic [63:0] gs_frame_1_q; logic [5:0] raster_pixel_psm_q; + logic raster_pixel_abe_q; + logic [16:0] raster_pixel_alpha_q; + logic raster_pixel_ztest_q; + logic [1:0] raster_pixel_ztst_q; + logic raster_pixel_zmsk_q; // Ch318 — expose the flush stream for an external LPDDR AXI writer (de25 top). assign flush_emit_o = raster_pixel_emit; assign flush_addr_o = raster_pixel_fb_addr_q; assign flush_pix16_o = raster_pixel_color_q[15:0]; assign flush_color32_o = raster_pixel_color_q[31:0]; // Ch323 — full color for spill capture + // The production LPDDR ROP supports the byte-granular FBMSK subset used + // by the captured SH3 frame. A set mask byte preserves that destination + // byte; partial-bit mask bytes are rejected by fixture generation. + wire [3:0] frame_byte_be = {gs_frame_1_q[63:56] == 8'h00, + gs_frame_1_q[55:48] == 8'h00, + gs_frame_1_q[47:40] == 8'h00, + gs_frame_1_q[39:32] == 8'h00}; + assign flush_be_o = raster_pixel_be_q & frame_byte_be; + assign flush_x_o = raster_pixel_x_q; // Ch357 — fragment coords + Z for the LPDDR-Z ROP + assign flush_y_o = raster_pixel_y_q; + assign flush_z_o = raster_pixel_z_q; + assign flush_abe_o = raster_pixel_abe_q; + assign flush_alpha_o = raster_pixel_alpha_q; + assign flush_ztest_o = raster_pixel_ztest_q; + assign flush_ztst_o = raster_pixel_ztst_q; + assign flush_zmsk_o = raster_pixel_zmsk_q; assign flush_psm_o = raster_pixel_psm_q; // Ch295 — texture-sampler read port out of gs_stub. Wired to @@ -921,6 +973,11 @@ module top_psmct32_raster_demo_bram // that consumes it as clut_load_busy to hold the FIFO pop while the // VRAM->CLUT load runs). Driven by clut_loader_stub.load_busy below. logic clut_ld_busy; + // Existing unit tops leave the new runtime ports open. Treat only a + // driven-one as active so those legacy fixtures stay byte-identical. + wire runtime_clut_busy = (runtime_clut_busy_i === 1'b1); + wire runtime_clut_wr_en = (runtime_clut_wr_en_i === 1'b1); + wire clut_busy = clut_ld_busy | runtime_clut_busy; // Ch296 — gs_stub TEX0_1 decode taps that feed clut_loader_stub: the // 1-cycle commit pulse + CBP/CPSM/CSM/CSA/CLD that decide when (and @@ -960,6 +1017,7 @@ module top_psmct32_raster_demo_bram .FB_RD_REGISTERED (1'b1), .Z_RD_REGISTERED (1'b1), .PERSPECTIVE_CORRECT(PERSPECTIVE_CORRECT), // Ch301 — forwarded board param (default 0) + .SUBPIXEL_XY (SUBPIXEL_XY), // Ch416 — native GS 12.4 coverage (default 0) .PERSP_RECIP_IDX_BITS(PERSP_RECIP_IDX_BITS), // Ch351 — perspective reciprocal LUT width (far-W -> 11) .GRAD_DIV_CYCLES(GRAD_DIV_CYCLES), // Ch352 — triangle-setup divide settle cycles (board -> 4) .GRAD_SEQ_DIVIDER(GRAD_SEQ_DIVIDER), // Ch352 — sequential gradient divider (board -> 1) @@ -997,7 +1055,7 @@ module top_psmct32_raster_demo_bram .pmode_q(pmode_q), .dispfb1_q(dispfb1_q), .display1_q(display1_q), .prim_q(), .rgbaq_q(), .xyz2_q(), .xyzf2_q(), - .frame_1_q(), .zbuf_1_q(), + .frame_1_q(gs_frame_1_q), .zbuf_1_q(), .tex0_1_q(), .tex0_1_cbp_q(gs_tex0_cbp), .tex0_1_cpsm_q(gs_tex0_cpsm), .tex0_1_csm_q(gs_tex0_csm), .tex0_1_csa_q(gs_tex0_csa), .tex0_1_cld_q(gs_tex0_cld), .tex0_1_wr_q(gs_tex0_wr), @@ -1018,12 +1076,18 @@ module top_psmct32_raster_demo_bram .pixel_fbp_q(), .pixel_fbw_q(), .pixel_psm_q(), .pixel_fb_addr_q(), .raster_pixel_emit(raster_pixel_emit), .raster_pixel_emit_count(), - .raster_pixel_x_q(), .raster_pixel_y_q(), + .raster_pixel_x_q(raster_pixel_x_q), .raster_pixel_y_q(raster_pixel_y_q), .raster_pixel_color_q(raster_pixel_color_q), .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), + .raster_pixel_z_q(raster_pixel_z_q), .raster_pixel_be_q(raster_pixel_be_q), .raster_pixel_mask_q(raster_pixel_mask_q), .raster_pixel_psm_q(raster_pixel_psm_q), + .raster_pixel_abe_q(raster_pixel_abe_q), + .raster_pixel_alpha_q(raster_pixel_alpha_q), + .raster_pixel_ztest_q(raster_pixel_ztest_q), + .raster_pixel_ztst_q(raster_pixel_ztst_q), + .raster_pixel_zmsk_q(raster_pixel_zmsk_q), .z_flush_emit_o(z_flush_emit_o), // Ch323 — tile Z-flush stream (de25 Z-writer) .z_flush_addr_o(z_flush_addr_o), .z_flush_data_o(z_flush_data_o), @@ -1047,7 +1111,7 @@ module top_psmct32_raster_demo_bram .tex_rd_data(gs_tex_rd_data), .clut_rd_idx (gs_clut_rd_idx), .clut_rd_data(gs_clut_rd_data), - .clut_load_busy(clut_ld_busy), // hold pop while VRAM->CLUT load runs + .clut_load_busy(clut_busy), // hold pop while either CLUT writer runs .fb_rd_en (gs_fb_rd_en), .fb_rd_addr(gs_fb_rd_addr), .fb_rd_data(gs_fb_rd_data), @@ -1422,11 +1486,22 @@ module top_psmct32_raster_demo_bram end end + wire clut_wr_en = runtime_clut_wr_en ? 1'b1 : clut_ld_wr_en_q; + wire [7:0] clut_wr_idx = runtime_clut_wr_en ? runtime_clut_wr_idx_i : clut_ld_wr_idx_q; + wire [31:0] clut_wr_data = runtime_clut_wr_en ? runtime_clut_wr_data_i : clut_ld_wr_data_c; + + // synthesis translate_off + always_ff @(posedge clk) begin + if (rst_n && runtime_clut_wr_en && clut_ld_wr_en_q) + $error("runtime CLUT copy collided with TEX0 CLUT loader"); + end + // synthesis translate_on + clut_stub u_clut ( .clk(clk), .rst_n(rst_n), - .write_en (clut_ld_wr_en_q), - .write_idx(clut_ld_wr_idx_q), - .write_data(clut_ld_wr_data_c), // LIVE registered-read data + .write_en (clut_wr_en), + .write_idx(clut_wr_idx), + .write_data(clut_wr_data), // pcrtc scanout read port — unused in this textured-board top // (PCRTC clut_enable=0). Tie its index to 0. .read_idx (8'd0), diff --git a/scripts/select_de25_profile.sh b/scripts/select_de25_profile.sh index a587239..2df7563 100755 --- a/scripts/select_de25_profile.sh +++ b/scripts/select_de25_profile.sh @@ -129,8 +129,159 @@ $(mac "FEEDER_STG_INIT_FILE=\\\"$MEMDIR/feeder_sh3_persp.mem\\\"")" $(mac GS_LPDDR_TEX=1) $(mac "FEEDER_STG_INIT_FILE=\\\"$MEMDIR/feeder_sh3_real.mem\\\"")" ;; + sh3_lpddr_fb) + # Ch353 — the SH3 real draw on an LPDDR-ONLY direct PSMCT32 framebuffer (the FULL 256x334 bounding box, NOT + # the Ch352 256x120 BRAM crop). Same feeder-driven SH3 config as sh3_real_draw (LPDDR texture cache @0x200000 + # + real CSM1 CLUT + Ch351 widened perspective), but the bram-top runs with FB_LPDDR_ONLY (the PSMCT32 writer + # commits the frame to LPDDR @ base 0 instead of the BRAM mirror) and FEEDER_AUTOSTART=0 (no boot render). The + # line-buffer scanout serves the LPDDR FB, HARD-gated on the ordered frame_drained ack (no timeout). VRAM stays + # 128 KiB / CBP=480 (Codex option A). The static QSF EMIF/GS_LPDDR4B_FB/USE_QSYS_TOP already provide the EMIF + + # writer + line-buffer scanout. Proven end-to-end by tb_top_psmct32_sh3_lpddr_fb_seq (the mandatory fit gate). + # BOARD ORDER (Codex host sequence): (1) wait setup/CLUT + feeder ready (0x0D8[0]); (2) HPS PRECLEAR the LPDDR + # FB 0x000000..0x0537FF via the write-probe; (3) upload the 512x512 PSMT8 texture to LPDDR @0x200000; (4) fill + + # checksum-verify the texture cache (0x054/0x070=fbdeaa32); (5) set FB base 0 (0x01C=0), canary off, ARM the + # writer (0x018[0]); (6) pulse feeder GO (0x0E8); (7) confirm drain (poll LPDDR_STATUS 0x02C[0] idle + LPDDR_BYTES + # 0x030 != 0); (8) scanout auto-enables from frame_drained — raise video_src (0x018[2]=1); scanout_lb is forced. + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_real_draw_fixture.py --full-frame` FIRST. + FIXTURE="$(fix bios_sh3_full payload_sh3_full)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_LPDDR_TEX=1) +$(mac "FEEDER_STG_INIT_FILE=\\\"$MEMDIR/feeder_sh3_full.mem\\\"")" + ;; + sh3_lpddr_fb_multi) + # Ch354 Brick 1 — MULTI-DRAW: 3 authentic SH3 draws (idx89548/89761/89974) that SHARE one texture/CLUT, + # composited into ONE LPDDR PSMCT32 framebuffer (256x338, the union bbox). Same LPDDR-FB path as sh3_lpddr_fb + # (FEEDER_AUTOSTART=0 + render-epoch EOF + frame_drained hard gate + line-buffer scanout) but GS_SH3_LPDDR_FB_MULTI + # raises FEEDER_STG_WORDS 768->2048 (204-tri combined list) and SCANOUT_LB_NROWS 334->338. Accumulation is + # bit-exact (combined RTL == RTL-composed singles, 0/86528 px); per-draw <=1-texel fidelity is draw-dependent + # (97.5/95.6/93.2%, the existing perspective-sampling limit, NOT an acceptance gate). Proven by + # tb_top_psmct32_sh3_multidraw. GS_SH3_LPDDR_FB + GS_LPDDR4B_FB + GS_LPDDR_TEX all apply (the profile sets them). + # BOARD ORDER: identical to sh3_lpddr_fb, but preclear the LARGER FB range: + # sudo ./ps2_sh3_tex_upload sh3_real_tex_lpddr.mem --lpddr-fb --fb-rows 338 (preclears 0..0x54800). + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_multidraw_fixture.py + # --draw-list 89548,89761,89974 --tag multi --emit` FIRST. + FIXTURE="$(fix bios_sh3_multi payload_sh3_multi)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_MULTI=1) +$(mac GS_LPDDR_TEX=1) +$(mac "FEEDER_STG_INIT_FILE=\\\"$MEMDIR/feeder_sh3_multi.mem\\\"")" + ;; + sh3_lpddr_fb_multitex) + # Ch355 Brick 1 — MULTI-TEXTURE: 2 SH3 draws with DIFFERENT textures/CLUTs (A=idx19562 tbp=11264/CBP_A, + # B=idx89761 tbp=9216/CBP_B) composited into ONE 320x381 LPDDR FB (FBW=5, stride 1280, 0x77100, 15240 beats/frame) + # via SCENE-LEVEL texture rebind + RUNTIME staged-list retriggering. GS_SH3_LPDDR_FB_MULTITEX raises + # FEEDER_STG_WORDS->2048 + SCANOUT_LB to 320x381. The bootlet (bios/payload_sh3_mt) uploads BOTH relocated CLUTs + # (CBP_A=480, CBP_B=484); the HOST streams each list at runtime (NO FEEDER_STG_INIT_FILE — feeder starts empty). + # Accumulation bit-exact + Q-canonicalized (feeder canonicalizes homogeneous coords to positive Q; NOT native + # signed-Q). Proven by tb_top_psmct32_sh3_multitex. + # BOARD RUN (runtime two-group flow, host streams the lists + rebinds the cache): + # sudo ./ps2_sh3_multitex sh3_mtA_tex_lpddr.mem sh3_mtB_tex_lpddr.mem feeder_sh3_mtA.mem feeder_sh3_mtB.mem + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_multitex_fixture.py --emit` FIRST. + FIXTURE="$(fix bios_sh3_mt payload_sh3_mt)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_MULTITEX=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_sched) + # Ch356 — N-TEXTURE SCHEDULER: N (default 3) authentic SH3 draws with DIFFERENT textures/CLUTs + # (E0=idx11671 tbp=10240/CBP480, E1=idx19562 tbp=11264/CBP484, E2=idx89761 tbp=9216/CBP488) composited into ONE + # 384x381 LPDDR FB (FBW=6, stride 1536, 0x8ee00, 18288 beats/frame) via a DATA-DRIVEN scheduler over epoch + # descriptors (scene-level texture rebind + runtime staged-list retriggering). GS_SH3_LPDDR_FB_SCHED raises + # FEEDER_STG_WORDS->2048 + SCANOUT_LB to 384x381. The bootlet (bios/payload_sh3_sched) preloads ALL N relocated + # CLUTs; the HOST streams each list at runtime (NO FEEDER_STG_INIT_FILE). Accumulation proven 100% BIT-FOR-BIT + # (compose_sched.py) + Q-canonicalized; tb_top_psmct32_sh3_sched (+ _compose gate). + # BOARD RUN (data-driven; host reads the descriptor table + streams each list, rebinds the cache per epoch): + # sudo ./ps2_sh3_sched sh3_sched_epochs.txt (all fixtures in the cwd) + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_scheduler_fixture.py --emit` FIRST. + FIXTURE="$(fix bios_sh3_sched payload_sh3_sched)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_SCHED=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_640) + # Ch357 — NATIVE 640x480 LPDDR framebuffer: the Ch356 N-texture scheduler on a full-frame 640x480 FB + # (FBW=10, stride 2560, size 0x12C000, 80 beats/row, 38400 beats/frame). Draws land at their AUTHENTIC screen + # coordinates (NO union-origin translation). Scheduler/host UNCHANGED from Ch356; only the FB geometry differs. + # GS_SH3_LPDDR_FB_640 sets SCANOUT_LB 640x480 + FEEDER_STG_WORDS=2048. Bootlet (bios/payload_sh3_s640) preloads + # all N relocated CLUTs; the HOST streams each list at runtime (NO FEEDER_STG_INIT_FILE). FB[0..0x12C000) disjoint + # from texture region [0x200000..). Composition proven 100% BIT-FOR-BIT (compose_sched.py); tb_top_psmct32_sh3_sched640. + # BOARD RUN (same data-driven host, different descriptor table): + # sudo ./ps2_sh3_sched sh3_s640_epochs.txt + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_scheduler_fixture.py --fb640 --emit` FIRST. + FIXTURE="$(fix bios_sh3_s640 payload_sh3_s640)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_640=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_z) + # Ch357 — PERSISTENT AUTHENTIC Z: the N-texture scheduler with a REAL per-fragment PSMZ16S depth test on an + # LPDDR-persistent Z buffer. The plain color writer is replaced by gs_lpddr_zc_emit: per fragment it clamp16-reads + # /GEQUAL-compares/updates a packed-16b Z line in LPDDR (Z base 0x140000) and emits color ONLY on Z-pass. Z PERSISTS + # across the 3 scheduler epochs (precleared exactly once by clear_start at ARM; texture rebind does NOT clear it). + # The three AXI streams share the LPDDR through the existing arbiters (color->wr_arb s0, Z-write->wr_arb s2, + # Z-read->rd_arb s3). Strong-reject acceptance fixture (256x210, 18.31% reject: far-late fragments MUST be depth- + # rejected). GS_SH3_LPDDR_FB_Z sets SCANOUT_LB 256x210 (6720 beats/frame). Bootlet (bios/payload_sh3_zsched) preloads + # all 3 relocated CLUTs; the HOST streams each list at runtime (NO FEEDER_STG_INIT_FILE). ROP + arbitration + REAL- + # RASTER integration all sim-proven: tb_top_psmct32_sh3_zrop (ROP golden), tb_top_psmct32_sh3_zarb (arbitration), + # tb_top_psmct32_sh3_zint (real raster, ZERO fragment drops, Z+color bit-exact vs the clamp16 scoreboard). + # BOARD ORDER (Codex host sequence): (1) wait setup/CLUT + feeder ready; (2) HPS PRECLEAR color 0x000000..0x0347FF + # AND Z 0x140000..0x15A3FF via the write-probe; (3) per epoch upload the 512x512 PSMT8 texture @0x200000 + fill/verify + # the cache; (4) ARM the writer (0x018[0]) -> clear_start preclears the Z buffer; WAIT clear_done before the first GO; + # (5) per epoch stream the list + pulse GO (0x0E8) + confirm a FRESH frame_drained; Z persists across epochs; (6) after + # the LAST drain raise video_src (0x018[2]=1) — scanout_lb (256x210) is forced. Read zc_g_drops (must be 0). + # Fixtures SH3-derived -> LOCAL/gitignored: run `python3 tools/gs_make_sh3_scheduler_fixture.py --authz + # --tag zsched --emit` FIRST (strong-reject draw list, authentic per-vertex Z). + FIXTURE="$(fix bios_sh3_zsched payload_sh3_zsched)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_Z=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_z640) + # Ch358 — PERSISTENT AUTHENTIC Z at NATIVE 640x480: the SAME strong-reject persistent-Z scene as sh3_lpddr_fb_z + # (draws 8634/12757/145742, gs_lpddr_zc_emit, clamp16/GEQUAL, Z persists across epochs) but on the full-frame + # native FB at AUTHENTIC screen coordinates (FBW=10, stride 2560, size 0x12C000, 38400 beats/frame; draws land at + # x[407..619] y[97..306]). GS_SH3_LPDDR_FB_Z + GS_SH3_LPDDR_FB_640 together select SCANOUT_LB 640x480 AND + # ZFB_PXW/H=640x480 (Z clear = 19200 beats). Map (gs_lpddr_map_pkg, disjoint by construction): color 0x0..0x12C000, + # Z 0x140000..0x1D6000, tex 0x200000. Bootlet (bios/payload_sh3_zs640) preloads all 3 relocated CLUTs; the HOST + # streams each list at runtime (NO FEEDER_STG_INIT_FILE). Sim gates: tb_top_psmct32_sh3_zs640_cap (capture + + # fidelity oracle) and tb_top_psmct32_sh3_zint640 (real raster -> zc_emit -> REAL arbiters -> shared LPDDR, + # ZERO drops, Z+color scoreboard-exact). Board proof = make -C sim sh3_zs640_board_compare (byte-for-byte vs + # zint640 + replay-color 100%). + # BOARD RUN (host unchanged — geometry comes from the epochs META): + # sudo ./ps2_sh3_sched --zbuf sh3_zs640_epochs.txt --dump-fb sh3_zs640_board_fb.mem + # Fixtures SH3-derived -> LOCAL/gitignored: run `make -C sim sh3_zs640_fixture` FIRST. + FIXTURE="$(fix bios_sh3_zs640 payload_sh3_zs640)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_Z=1) +$(mac GS_SH3_LPDDR_FB_640=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_z640c6) + # Ch359 — shared-texture residency scene: six authentic SH3 draws grouped into two + # 204-triangle epochs at native 640x480 persistent Z. The bootlet preloads the C6 + # relocated CLUT at CBP=13888; the host uploads/fills the shared texture once, then + # verifies it remains resident for the reuse epoch. + FIXTURE="$(fix bios_sh3_zs640c6 payload_sh3_zs640c6)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_Z=1) +$(mac GS_SH3_LPDDR_FB_640=1) +$(mac GS_LPDDR_TEX=1)" + ;; + sh3_lpddr_fb_z640_runtime_clut) + # Ch367 -- runtime palette residency proof. Same native 640x480 + # persistent-Z geometry as Ch358. Keep the proven nonempty C6 setup + # bootlet as a synthesis-retention anchor; the runtime test lists use + # TEX0.CLD=0 and the HPS stages/checks every palette before each GO. + # A zero-transfer bootlet lets Quartus prune the otherwise runtime-fed + # texture/raster RAMs, so it is not a valid hardware proof vehicle. + FIXTURE="$(fix bios_sh3_zs640c6 payload_sh3_zs640c6)" + SCENE="$(mac GS_SH3_LPDDR_FB=1) +$(mac GS_SH3_LPDDR_FB_Z=1) +$(mac GS_SH3_LPDDR_FB_640=1) +$(mac GS_LPDDR_TEX=1)" + ;; --list|"") - echo "Profiles: lpddr_tex (Ch322 texture) lpddr128_scanout (Ch321 scanout) tile_spill (Ch323 spill/reload) feeder (Ch330 command-list) feeder_persp (Ch342 perspective) feeder_cube (Ch343 authentic cube) texalpha (Ch344 textured-alpha sprite) feeder_sprite (Ch345a runtime sprite) sh3_clut (Ch347 authentic SH3 PSMT8+CLUT) sh3_persp (Ch348 SH3 PSMT8+CLUT perspective) sh3_real_draw (Ch350/351/352 SH3 real-draw crop, LPDDR tex + CSM1 + widened persp)" + echo "Profiles: lpddr_tex (Ch322 texture) lpddr128_scanout (Ch321 scanout) tile_spill (Ch323 spill/reload) feeder (Ch330 command-list) feeder_persp (Ch342 perspective) feeder_cube (Ch343 authentic cube) texalpha (Ch344 textured-alpha sprite) feeder_sprite (Ch345a runtime sprite) sh3_clut (Ch347 authentic SH3 PSMT8+CLUT) sh3_persp (Ch348 SH3 PSMT8+CLUT perspective) sh3_real_draw (Ch350/351/352 SH3 real-draw crop, LPDDR tex + CSM1 + widened persp) sh3_lpddr_fb (Ch353 SH3 full 256x334 on an LPDDR-only PSMCT32 FB + line-buffer scanout, frame_drained-gated) sh3_lpddr_fb_multi (Ch354 3 SH3 draws -> 256x338) sh3_lpddr_fb_multitex (Ch355 2 DIFFERENT-texture draws -> 320x381, runtime-staged) sh3_lpddr_fb_sched (Ch356 N-texture data-driven scheduler -> 384x381) sh3_lpddr_fb_640 (Ch357 native 640x480 full-frame) sh3_lpddr_fb_z (Ch357 PERSISTENT PSMZ16S Z, 256x210 strong-reject) sh3_lpddr_fb_z640 (Ch358 PERSISTENT Z at NATIVE 640x480) sh3_lpddr_fb_z640c6 (Ch359 shared-texture residency) sh3_lpddr_fb_z640_runtime_clut (Ch367 runtime palette residency)" echo "Active profile:" sed -n '/DE25_PROFILE_SCENE/,/DE25_PROFILE_SCENE/p' "$QSF" | grep VERILOG_MACRO || echo " (no scene macros)" sed -n '/DE25_PROFILE_FIXTURE/,/DE25_PROFILE_FIXTURE/p' "$QSF" | grep IMAGE_FILE @@ -139,24 +290,38 @@ $(mac "FEEDER_STG_INIT_FILE=\\\"$MEMDIR/feeder_sh3_real.mem\\\"")" *) echo "unknown profile: $PROFILE (try --list)"; exit 2 ;; esac -# Replace the content between each marker pair (awk: print markers, swap the body). -swap_block() { # $1=tag $2=replacement-text (reads stdin QSF, writes stdout) - awk -v tag="$1" -v repl="$2" ' - $0 ~ (">>> " tag " ") { print; print repl; inblk=1; next } +# Replace the content between each marker pair. Read the replacement from a file +# rather than `awk -v`: awk consumes backslash-escaped quotes in Verilog macros. +swap_block() { # $1=tag $2=replacement-file (reads stdin QSF, writes stdout) + awk -v tag="$1" -v repl_file="$2" ' + $0 ~ (">>> " tag " ") { + print + while ((getline line < repl_file) > 0) print line + close(repl_file) + inblk=1 + next + } $0 ~ ("<<< " tag " <<<") { inblk=0 } !inblk { print } ' } +fixture_tmp="$(mktemp)" +scene_tmp="$(mktemp)" tmp="$(mktemp)" -swap_block DE25_PROFILE_FIXTURE "$FIXTURE" < "$QSF" \ - | swap_block DE25_PROFILE_SCENE "$SCENE" > "$tmp" +trap 'rm -f "$fixture_tmp" "$scene_tmp" "$tmp"' EXIT HUP INT TERM +printf '%s\n' "$FIXTURE" > "$fixture_tmp" +printf '%s\n' "$SCENE" > "$scene_tmp" +swap_block DE25_PROFILE_FIXTURE "$fixture_tmp" < "$QSF" \ + | swap_block DE25_PROFILE_SCENE "$scene_tmp" > "$tmp" # sanity: both marker pairs must still be present (don't clobber the QSF on a bad run) for tag in DE25_PROFILE_FIXTURE DE25_PROFILE_SCENE; do [ "$(grep -c "$tag" "$tmp")" -eq 2 ] || { echo "ERROR: marker '$tag' missing after edit — QSF unchanged"; rm -f "$tmp"; exit 1; } done mv "$tmp" "$QSF" +trap - EXIT HUP INT TERM +rm -f "$fixture_tmp" "$scene_tmp" echo "Selected profile: $PROFILE" echo " fixture: $(echo "$FIXTURE" | grep -o '[a-z0-9_]*\.mem' | tr '\n' ' ')" echo " scene : $(echo "$SCENE" | grep -o 'GS_[A-Z0-9_]*=1' | tr '\n' ' ')" diff --git a/sim/Makefile b/sim/Makefile index 306aff3..1d25fad 100644 --- a/sim/Makefile +++ b/sim/Makefile @@ -115,6 +115,235 @@ $(TOP_PSMCT32_DEMO_BIOS) $(TOP_PSMCT32_DEMO_PAYLOAD) &: $(TOP_PSMCT32_DEMO_BAKE_ top_psmct32_raster_demo_mem: $(TOP_PSMCT32_DEMO_BIOS) $(TOP_PSMCT32_DEMO_PAYLOAD) +# Ch357 persistent-Z signoff fixture. This is the canonical ZSCHED emit mode: +# integerized XY geometry in both the feeder data and the reference maps, +# e2 PSCALE pinned at the measured best global value, and authentic Z. +SH3_ZSCHED_FIXTURE_PY := $(REPO_ROOT)/tools/gs_make_sh3_scheduler_fixture.py +SH3_ZSCHED_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsched_params.vh +SH3_ZSCHED_FIXTURE_FLAGS := --draw-list 8634,12757,145742 --authz --tag zsched \ + --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit +SH3_ZSCHED_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsched_board_fb.mem +SH3_ZSCHED_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsched_zint_fb.mem + +$(SH3_ZSCHED_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zsched persistent-Z integer-XY fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZSCHED_FIXTURE_FLAGS) + +sh3_zsched_fixture: $(SH3_ZSCHED_FIXTURE) + +# Ch358 — the SAME strong-reject persistent-Z scene at NATIVE 640x480 (authentic screen coords, no union +# translation). Identical draw list / pscale / xy-quant spec as the zsched signoff fixture; only the FB +# geometry differs (--fb640). Integer-XY reference is the signoff default for this tag too. +SH3_ZS640_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640_params.vh +SH3_ZS640_FIXTURE_FLAGS := --draw-list 8634,12757,145742 --authz --fb640 --tag zs640 \ + --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit +SH3_ZS640_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640_board_fb.mem +SH3_ZS640_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640_zint_fb.mem + +$(SH3_ZS640_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640 native-640x480 persistent-Z integer-XY fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640_FIXTURE_FLAGS) + +sh3_zs640_fixture: $(SH3_ZS640_FIXTURE) + +# Ch359 (Codex: zs640c6) — SIX shared-texture draws (PSMT8 tbp=8192/cbp=13888, authentic GEQUAL/ZMSK=0 PSMZ16S) +# grouped into TWO ordered 204-triangle feeder lists at native 640x480. Epoch 1 sets an EXPLICIT reuse flag: the +# texture cache stays RESIDENT (one fill total). Same integer-XY signoff contract; fail-closed gates in the emit. +SH3_ZS640C6_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c6_params.vh +SH3_ZS640C6_FIXTURE_FLAGS := --draw-list 119471,119684,119897,120110,120323,120536 --group-size 3 \ + --authz --fb640 --tag zs640c6 --pscale auto,auto --xy-quant round,round \ + --ref-xy-quant --emit +SH3_ZS640C6_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c6_board_fb.mem +SH3_ZS640C6_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c6_zint_fb.mem +SH3_ZSRT3_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrt3_board_fb.mem +SH3_ZSRT3_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrt3_zint_fb.mem +SH3_ZSRT24_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrt24_board_fb.mem +SH3_ZSRT24_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrt24_zint_fb.mem +SH3_ZSRT24_REQ_DEPTH ?= 4096 +SH3_ZSRT24_TRACE ?= 0 +SH3_ZSRTB24_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtb24_board_fb.mem +SH3_ZSRTB24_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtb24_zint_fb.mem +SH3_ZSRTB24_REQ_DEPTH ?= 4096 +SH3_ZSRTB24_START_EPOCH ?= +SH3_ZSRTM28_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtm28_board_fb.mem +SH3_ZSRTM28_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtm28_zint_fb.mem +SH3_ZSRTM28_REQ_DEPTH ?= 4096 +SH3_ZSRTC24_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtc24_board_fb.mem +SH3_ZSRTC24_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrtc24_zint_fb.mem +SH3_ZSRTC24_REQ_DEPTH ?= 4096 +SH3_ZSRTE3_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte3_board_fb.mem +SH3_ZSRTE3_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte3_zint_fb.mem +SH3_ZSRTE3_REQ_DEPTH ?= 4096 +SH3_ZSRTE6_REQ_DEPTH ?= 4096 +SH3_ZSRTE8_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte8_board_fb.mem +SH3_ZSRTE8_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte8_zint_fb.mem +SH3_ZSRTE8_REQ_DEPTH ?= 4096 +SH3_ZSRTE11_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte11_board_fb.mem +SH3_ZSRTE11_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte11_zint_fb.mem +SH3_ZSRTE11_REQ_DEPTH ?= 4096 +SH3_ZSRTE17_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte17_board_fb.mem +SH3_ZSRTE17_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte17_zint_fb.mem +SH3_ZSRTE17_REQ_DEPTH ?= 4096 +SH3_ZSRTE18_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte18_board_fb.mem +SH3_ZSRTE18_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte18_zint_fb.mem +SH3_ZSRTE18_REQ_DEPTH ?= 4096 +SH3_ZSRTE19_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte19_board_fb.mem +SH3_ZSRTE19_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zsrte19_zint_fb.mem +SH3_ZSRTE19_REQ_DEPTH ?= 4096 +SH3_ZSRTE22_REQ_DEPTH ?= 4096 +SH3_ZSRTE25_REQ_DEPTH ?= 4096 +SH3_ZSRTE28_REQ_DEPTH ?= 4096 +SH3_ZSRTE31_REQ_DEPTH ?= 4096 +SH3_ZSRTE34_REQ_DEPTH ?= 4096 +SH3_ZSRTE43_REQ_DEPTH ?= 4096 +SH3_ZSRTE45_REQ_DEPTH ?= 4096 +SH3_ZSRTF3E18_REQ_DEPTH ?= 4096 +SH3_ZSRTF3E30_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C30_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C34_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C41_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C49_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C57_REQ_DEPTH ?= 4096 +SH3_ZSRTF3C57X_REQ_DEPTH ?= 4096 +# Ch394 — matching-capture (224139) opaque foundation. Three two-draw epochs +# share the authentic PSMT8 texture/CLUT and retain native 640x480 coordinates. +SH3_ZSRT139O6_REQ_DEPTH ?= 4096 +# Ch395 — wider 224139 opaque A1: left panel + centre + bench, in five +# staging-safe epochs (three texture fills, then two resident-texture reuses). +SH3_ZSRT139A1_REQ_DEPTH ?= 4096 +# Ch396 — wider 224139 opaque A2: adds the in-order right-side bench band. +SH3_ZSRT139A2_REQ_DEPTH ?= 4096 + +$(SH3_ZS640C6_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640c6 shared-texture 2x204-tri persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640C6_FIXTURE_FLAGS) + +sh3_zs640c6_fixture: $(SH3_ZS640C6_FIXTURE) + +# Ch360 (zs640c12) — twelve shared-texture draws in FOUR existing-size 204-triangle epochs. This deliberately +# scales draw count and residency reuse without changing feeder-list capacity, RTL, clocks, or the board RBF. +SH3_ZS640C12_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c12_params.vh +SH3_ZS640C12_FIXTURE_FLAGS := --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814 --group-size 3 \ + --authz --fb640 --tag zs640c12 --pscale 1024,1024,1024,1024 --xy-quant round,round,round,round \ + --ref-xy-quant --emit +SH3_ZS640C12_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c12_board_fb.mem +SH3_ZS640C12_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c12_zint_fb.mem + +$(SH3_ZS640C12_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640c12 shared-texture 4x204-tri persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640C12_FIXTURE_FLAGS) + +sh3_zs640c12_fixture: $(SH3_ZS640C12_FIXTURE) + +# Ch361 (zs640c18) -- eighteen compatible SH3 draws in six existing-size 204-triangle epochs. This extends only +# draw-count and cache residency; geometry, depth mode, clocks, and the board core remain those proven by Ch360. +SH3_ZS640C18_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c18_params.vh +SH3_ZS640C18_FIXTURE_FLAGS := --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814,122027,122240,124082,129389,129602,129815 --group-size 3 \ + --authz --fb640 --tag zs640c18 --pscale 1024,1024,1024,1024,1024,1024 --xy-quant round,round,round,round,round,round \ + --ref-xy-quant --emit +SH3_ZS640C18_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c18_zint_fb.mem + +$(SH3_ZS640C18_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640c18 shared-texture 6x204-tri persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640C18_FIXTURE_FLAGS) + +sh3_zs640c18_fixture: $(SH3_ZS640C18_FIXTURE) + +# Ch362 (zs640c24) -- twenty-four authentic draws in eight existing-size epochs. The final candidate skips idx131306, +# whose authentic Y extent exceeds the native framebuffer; every retained draw is in-bounds and shares the C18 state. +SH3_ZS640C24_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c24_params.vh +SH3_ZS640C24_FIXTURE_FLAGS := --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814,122027,122240,124082,129389,129602,129815,130241,130454,130667,130880,131093,132158 --group-size 3 \ + --authz --fb640 --tag zs640c24 --pscale 1024,1024,1024,1024,1024,1024,1024,1024 --xy-quant round,round,round,round,round,round,round,round \ + --ref-xy-quant --emit + +$(SH3_ZS640C24_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640c24 shared-texture 8x204-tri persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640C24_FIXTURE_FLAGS) + +sh3_zs640c24_fixture: $(SH3_ZS640C24_FIXTURE) + +# Ch363 (zs640mt5) -- five ordered authentic draws with distinct texture/CLUT bindings. This is the first +# post-C24 content rung that exercises cache rebinds rather than further shared-texture residency. +SH3_ZS640MT5_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640mt5_params.vh +SH3_ZS640MT5_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640mt5_board_fb.mem +SH3_ZS640MT5_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640mt5_zint_fb.mem +SH3_ZS640MT5_FIXTURE_FLAGS := --draw-list 5328,11671,77112,89164,119471 \ + --authz --fb640 --tag zs640mt5 --pscale 1024,1024,1024,1024,1024 --xy-quant round,round,round,round,round \ + --ref-xy-quant --emit + +$(SH3_ZS640MT5_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640mt5 five-texture persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640MT5_FIXTURE_FLAGS) + +sh3_zs640mt5_fixture: $(SH3_ZS640MT5_FIXTURE) + +# Ch364 (zs640m28) -- ordered mixed-residency scene: four distinct early texture epochs followed by the 24-draw +# C24 cluster in eight 204-triangle lists. This proves texture rebinds followed by bounded same-texture residency. +SH3_ZS640M28_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640m28_params.vh +SH3_ZS640M28_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640m28_board_fb.mem +SH3_ZS640M28_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640m28_zint_fb.mem +SH3_ZS640M28_FIXTURE_FLAGS := --draw-list 5328,11671,77112,89164,119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814,122027,122240,124082,129389,129602,129815,130241,130454,130667,130880,131093,132158 \ + --group-sizes 1,1,1,1,3,3,3,3,3,3,3,3 --authz --fb640 --tag zs640m28 --chapter Ch364 \ + --pscale 1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024 \ + --xy-quant round,round,round,round,round,round,round,round,round,round,round,round --ref-xy-quant --emit + +$(SH3_ZS640M28_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640m28 mixed-residency persistent-Z fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640M28_FIXTURE_FLAGS) + +sh3_zs640m28_fixture: $(SH3_ZS640M28_FIXTURE) + +# Ch365 frame B -- adjacent-capture, native 640x480 texture-cluster state. Its CLUT is relocated after Ch364's +# five preloaded palettes so a future two-frame bootlet can contain both frames without aliasing. +SH3_ZS640B24_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640b24_params.vh +SH3_ZS640B24_BOARD_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640motion_b_board_fb.mem +SH3_ZS640B24_ZINT_FB := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640b24_zint_fb.mem +SH3_ZS640B24_FIXTURE_FLAGS := captures/gs/silenthill3/Silent\ Hill\ 3_SLUS-20622_20260624224121.gs.zst \ + --draw-list 114590,114803,115016,115229,115442,115655,115925,116138,117386,117599,117812,118451,118982,119195,123656,126542,126755,126968,127394,127607,127820,128033,128246,128459 \ + --group-size 3 --authz --fb640 --tag zs640b24 --chapter Ch365 --cbp-base 500 \ + --pscale 1024,1024,1024,1024,1024,1024,1024,1024 \ + --xy-quant round,round,round,round,round,round,round,round --ref-xy-quant --emit + +$(SH3_ZS640B24_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640b24 adjacent-capture frame-B fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640B24_FIXTURE_FLAGS) + +sh3_zs640b24_fixture: $(SH3_ZS640B24_FIXTURE) + +# Ch366 frame C -- the next adjacent capture reuses the eight-epoch, 24-draw shape but has distinct texture/CLUT +# bytes despite its matching lightweight texture sum. It receives CBP 504 after the A/B union's six palette banks. +SH3_ZS640C24C_FIXTURE := $(TOP_PSMCT32_DEMO_DATA_DIR)/sh3_zs640c24c_params.vh +SH3_ZS640C24C_FIXTURE_FLAGS := captures/gs/silenthill3/Silent\ Hill\ 3_SLUS-20622_20260624224139.gs.zst \ + --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814,122027,122240,124082,129389,129602,129815,130241,130454,130667,130880,131093,132158 \ + --group-size 3 --authz --fb640 --tag zs640c24c --chapter Ch366 --cbp-base 504 \ + --pscale 1024,1024,1024,1024,1024,1024,1024,1024 \ + --xy-quant round,round,round,round,round,round,round,round --ref-xy-quant --emit + +$(SH3_ZS640C24C_FIXTURE): $(SH3_ZSCHED_FIXTURE_PY) + @echo "=== emit sh3_zs640c24c adjacent-capture frame-C fixtures ===" + $(PYTHON) $(SH3_ZSCHED_FIXTURE_PY) $(SH3_ZS640C24C_FIXTURE_FLAGS) + +sh3_zs640c24c_fixture: $(SH3_ZS640C24C_FIXTURE) + +# Ch365 motion bootlet -- union of the already-generated frame-A and frame-B palette preload packets. The six +# relocated palettes occupy CBPs 480,484,488,492,496,500 and fit in the 512-qword production boot payload. +SH3_ZS640MOTION_BOOTLET_PY := $(REPO_ROOT)/tools/gs_merge_scheduler_bootlets.py +SH3_ZS640MOTION_BOOTLET := $(TOP_PSMCT32_DEMO_DATA_DIR)/payload_sh3_zs640motionab.mem + +$(SH3_ZS640MOTION_BOOTLET): $(SH3_ZS640M28_FIXTURE) $(SH3_ZS640B24_FIXTURE) $(SH3_ZS640MOTION_BOOTLET_PY) + @echo "=== emit sh3_zs640motionab union bootlet ===" + $(PYTHON) $(SH3_ZS640MOTION_BOOTLET_PY) zs640motionab zs640m28 zs640b24 + +sh3_zs640motion_bootlet: $(SH3_ZS640MOTION_BOOTLET) + +SH3_ZS640MOTIONABC_BOOTLET := $(TOP_PSMCT32_DEMO_DATA_DIR)/payload_sh3_zs640motionabc.mem + +$(SH3_ZS640MOTIONABC_BOOTLET): $(SH3_ZS640M28_FIXTURE) $(SH3_ZS640B24_FIXTURE) $(SH3_ZS640C24C_FIXTURE) $(SH3_ZS640MOTION_BOOTLET_PY) + @echo "=== emit sh3_zs640motionabc union bootlet ===" + $(PYTHON) $(SH3_ZS640MOTION_BOOTLET_PY) zs640motionabc zs640m28 zs640b24 zs640c24c + +sh3_zs640motionabc_bootlet: $(SH3_ZS640MOTIONABC_BOOTLET) + # Size check — bios.mem must be 1024 lines of payload (header lines # excluded), payload.mem must be 256 lines of payload. We strip # blanks + `// ...` comment-only lines and count the rest. @@ -350,9 +579,13 @@ RTL_SRCS := \ $(RTL_ROOT)/gif_gs/gs_persp_uv.sv \ $(RTL_ROOT)/gif_gs/gs_tile_ram.sv \ $(RTL_ROOT)/gif_gs/gs_alpha_blend.sv \ + $(RTL_ROOT)/gif_gs/gs_lpddr_color_blend.sv \ $(RTL_ROOT)/gif_gs/gs_lpddr_fb_writer.sv \ $(RTL_ROOT)/gif_gs/gs_async_fifo.sv \ + $(RTL_ROOT)/gif_gs/gs_lpddr_map_pkg.sv \ $(RTL_ROOT)/gif_gs/gs_lpddr_axi_master.sv \ + $(RTL_ROOT)/gif_gs/gs_lpddr_z_rmw.sv \ + $(RTL_ROOT)/gif_gs/gs_lpddr_zc_emit.sv \ $(RTL_ROOT)/gif_gs/gs_lpddr_rd_probe.sv \ $(RTL_ROOT)/gif_gs/gs_lpddr_scanout.sv \ $(RTL_ROOT)/gif_gs/gs_lpddr_rd_arb.sv \ @@ -367,6 +600,7 @@ RTL_SRCS := \ $(RTL_ROOT)/platform/I2C_HDMI_Config.v \ $(RTL_ROOT)/platform/ps2_hps_bridge_null.sv \ $(RTL_ROOT)/platform/ps2_hps_bridge.sv \ + $(RTL_ROOT)/platform/clut_stage_cdc.sv \ $(RTL_ROOT)/platform/tile_ram_cdc.sv \ $(SPLASH_PLATFORM_RTL)/osd_overlay.sv \ $(SPLASH_PLATFORM_RTL)/osd_font_rom.sv \ @@ -406,7 +640,7 @@ VERILATOR_FLAGS := --lint-only -sv -Wall -Wno-UNUSED -Wno-DECLFILENAME \ --timing .PHONY: tb_ee_core_bios_long -.PHONY: top_psmct32_raster_demo_mem top_psmct32_raster_demo_mem_check top_psmct32_raster_demo_synth_check top_psmct32_raster_demo_quartus_scaffold_check quartus_compile quartus_compile_clean quartus_syn_only quartus_compile_report quartus_experiments quartus_experiments_clean quartus_experiments_report +.PHONY: top_psmct32_raster_demo_mem top_psmct32_raster_demo_mem_check top_psmct32_raster_demo_synth_check top_psmct32_raster_demo_quartus_scaffold_check sh3_zsched_fixture quartus_compile quartus_compile_clean quartus_syn_only quartus_compile_report quartus_experiments quartus_experiments_clean quartus_experiments_report .PHONY: all lint run clean traces tb_ee_fetch tb_gs tb_intc tb_platform_video tb_bgcolor_via_dma \ tb_sif_mailbox tb_sif_command_echo tb_sif_command_echo_rearm tb_sif_negative_path \ tb_sif_dma_smoke tb_sif_dma_mid_stall tb_sif_dma_overflow tb_sif_combined_ctrl_data \ @@ -426,7 +660,7 @@ VERILATOR_FLAGS := --lint-only -sv -Wall -Wno-UNUSED -Wno-DECLFILENAME \ tb_ee_core_branch_zero tb_ee_core_lbu tb_ee_core_divu_mflo tb_ee_core_multu_mflo \ tb_ee_core_align tb_ee_core_align_exc tb_ee_core_bev \ tb_ee_core_cop0_count tb_ee_bootstrap_mmio tb_ee_biu_mmio \ - tb_ee_core_gif_packed tb_ee_core_gif_reglist tb_ee_core_gif_primitive tb_ee_core_gif_primitive_observer tb_ee_core_gif_primitive_strip tb_ee_core_gif_primitive_gouraud tb_ee_core_gif_pixel_emit tb_ee_core_gif_pixel_emit_psm tb_ee_core_gif_raster_basic tb_ee_core_gif_raster_topleft tb_ee_core_gif_raster_gouraud tb_ee_core_gif_raster_queue tb_gs_raster_queue_full_pop tb_gs_raster_pipeline tb_gs_prim_list_feeder tb_gs_vram_writeback tb_vram_stub tb_vram_bram_stub_equivalence tb_vram_normalize_write tb_gs_scanout_basic tb_gs_scanout_dbx_dby tb_gs_scanout_display_window tb_gs_scanout_magh_magv tb_gs_scanout_psm16 tb_gs_scanout_psmt8 tb_gs_scanout_psmt8_clut tb_gs_tex0_clut tb_gs_clut_load tb_gs_clut_load_ct16 tb_gs_clut_load_cld_modes tb_gs_clut_load_csa_window tb_gs_scanout_psmt4_clut tb_gs_psmt4_round_trip tb_gs_raster_psmct16 tb_gs_raster_psmt8 tb_gs_textured_sprite tb_gs_textured_alpha_sprite tb_gs_psmt8_alpha_sprite tb_gs_psmt8_clut_triangle tb_clut_loader_csm1 tb_gs_raster_psmt4 tb_gs_demo_psmt4_e2e tb_gs_demo_psmt4_e2e_packed tb_gs_demo_psmt4_e2e_dmac tb_gs_demo_psmt4_e2e_trxdir tb_gs_demo_psmt4_e2e_eemmio tb_gs_demo_psmt4_e2e_eemap tb_gs_demo_psmt4_e2e_ee_program tb_gs_demo_psmt4_e2e_ee_full_bootlet tb_ee_ram_cpu_dmac_contention tb_gs_image_xfer_psmct16 tb_gs_image_xfer_psmt8 tb_gs_image_xfer_psmt4 tb_gs_swizzle_psmct32 tb_gs_swizzle_psmct16 tb_gs_swizzle_psmt8 tb_gs_swizzle_psmt4 tb_gs_scanout_swizzle_psmt4 tb_gs_image_xfer_swizzle_psmt4 tb_gs_raster_swizzle_psmt4 tb_gs_demo_psmt4_swizzle_e2e tb_gs_demo_psmt4_swizzle_trxdir_e2e tb_top_psmct32_raster_demo tb_top_psmct32_textured_demo tb_top_psmct32_raster_demo_bram tb_top_psmct32_raster_demo_bram_textured tb_top_psmct32_raster_demo_bram_ch171 tb_gs_raster_backpressure_stress tb_ps2_hps_bridge tb_gs_raster_bram_psmct16 tb_gs_raster_bram_psmt8 tb_gs_raster_bram_psmt4 tb_gs_scanout_bram_psmct16 tb_gs_scanout_bram_psmt8 tb_de25_nano_psmct32_raster_demo_top tb_hdmi_i2c_wake_smoke tb_gs_scanout_swizzle_psmt8 tb_gs_image_xfer_swizzle_psmt8 tb_gs_raster_swizzle_psmt8 tb_gs_demo_psmt8_swizzle_e2e tb_gs_demo_psmt8_swizzle_trxdir_e2e tb_gs_scanout_swizzle_psmct16 tb_gs_image_xfer_swizzle_psmct16 tb_gs_scanout_swizzle_psmct32 tb_gs_image_xfer_swizzle_psmct32 tb_gs_raster_swizzle_psmct32 tb_gs_raster_swizzle_psmct16 tb_gs_demo_psmct32_swizzle_e2e tb_gs_demo_psmct32_swizzle_trxdir_e2e tb_gs_demo_psmct16_swizzle_e2e tb_gs_demo_psmct16_swizzle_trxdir_e2e tb_ee_core_varshift tb_ee_install_agent_smoke tb_ee_install_agent_external_image tb_tile_ram_cdc tb_sio2_input_stub tb_bridge_iop_pad_input tb_pad_state_via_sif_to_ee tb_ee_pad_buffer_branch tb_lpddr_tex_staging tb_osd_platform_cell_adapter tb_ee_core_elf_runner tb_ee_core_sq tb_ee_core_daddu tb_ee_core_syscall_hle tb_ee_core_beql tb_ee_core_sd tb_ee_core_dsll tb_ee_core_bnel tb_ee_core_pcpyld tb_ee_core_lq tb_ee_core_psubb tb_ee_core_pnor tb_ee_core_pand tb_ee_core_pcpyud tb_ee_core_ld tb_ee_core_ei tb_ee_dmac_ctrl_stub tb_ee_dmac_passive_chan_stub tb_ee_core_sync tb_ee_core_pcpyh tb_ee_core_dsubu tb_gs_lpddr_fb_writer tb_gs_lpddr_axi_master tb_gs_lpddr_rd_probe tb_gs_lpddr_scanout tb_gs_lpddr_scanout_psm32 tb_gs_lpddr_scanout_concurrency tb_gs_lpddr_scanout_lb_psm32 tb_gs_lpddr_scanout_lb_psm32_256 tb_gs_lpddr_rd_arb tb_gs_lpddr_scanout_lb tb_gs_texture_cache tb_gs_lpddr_wr_probe tb_gs_lpddr_wr_arb tb_gs_tile_reload tb_gs_tile_reload_grid tb_gs_z_flush_writer tb_gs_alpha_blend tb_top_psmct32_alpha_blend_demo tb_top_psmct32_texalpha_demo tb_gs_zbuffer tb_top_psmct32_zbuffer_demo tb_gs_tri_interp tb_top_psmct32_triangle_demo tb_gs_textured_triangle tb_top_psmct32_raster_demo_bram_tritex tb_top_psmct32_raster_demo_bram_lpddrtex tb_gs_texture_psmt8_clut tb_gs_texture_wrap tb_gs_texture_bilinear tb_top_psmct32_raster_demo_bram_clut tb_gs_texture_psmt4_clut tb_gs_texture_swizzle_psmt4_clut tb_top_psmct32_raster_demo_bram_clut4 tb_top_psmct32_raster_demo_bram_swz4 tb_gs_texture_swizzle_psmt8_clut tb_top_psmct32_raster_demo_bram_swz8 tb_gs_texture_swizzle_psmct32 tb_top_psmct32_raster_demo_bram_swz32 tb_gs_reciprocal tb_gs_persp_uv tb_gs_persp_uv_farw tb_gs_grad_divider tb_top_psmct32_perspective_demo tb_top_psmct32_persp_floor_demo tb_top_psmct32_combined_demo tb_gs_tile_ram tb_top_psmct32_tile_demo tb_gs_tile_zflush tb_gs_tile_spill_reload tb_gs_tile_spill_lpddr tb_gs_tile_spill_grid_lpddr tb_gs_tile_spill_grid8x8_lpddr tb_gs_tile_spill_lpddr_neg tb_top_psmct32_tile2x2_demo tb_top_psmct32_tile_multiprim_demo tb_top_psmct32_tile_scissor_demo tb_top_psmct32_tile_wrap_demo tb_top_psmct32_tile_psmct16_demo tb_top_psmct32_tile_alpha_demo tb_top_psmct32_tile_bilinear_demo tb_top_psmct32_tile_bin_demo tb_top_psmct32_tile_bin4x4_demo tb_top_psmct32_tile_psmct16fb_demo tb_top_psmct32_tile_lpddr128_demo tb_top_psmct32_tile_palbilinear_demo tb_top_psmct32_tile_cap_demo tb_top_psmct32_tile_cap_overflow_demo tb_top_psmct32_tile_sprite18_demo tb_top_psmct32_tile_cap64_demo tb_top_psmct32_feeder_equiv_demo tb_top_psmct32_feeder_runtime_demo tb_top_psmct32_feeder_bridge_demo tb_top_psmct32_feeder_scenes_demo tb_top_psmct32_feeder_shapes_demo tb_top_psmct32_feeder_colors_demo tb_top_psmct32_feeder_native_demo tb_top_psmct32_feeder_gouraud_demo tb_top_psmct32_feeder_accum_demo tb_top_psmct32_feeder_scene_retrigger_demo tb_top_psmct32_feeder_zpersist_demo tb_top_psmct32_feeder_persp_demo tb_top_psmct32_feeder_sprite_demo tb_top_psmct32_tile_late_demo tb_top_psmct32_tile_lpddrfb_demo \ + tb_ee_core_gif_packed tb_ee_core_gif_reglist tb_ee_core_gif_primitive tb_ee_core_gif_primitive_observer tb_ee_core_gif_primitive_strip tb_ee_core_gif_primitive_gouraud tb_ee_core_gif_pixel_emit tb_ee_core_gif_pixel_emit_psm tb_ee_core_gif_raster_basic tb_ee_core_gif_raster_topleft tb_ee_core_gif_raster_gouraud tb_ee_core_gif_raster_queue tb_gs_raster_queue_full_pop tb_gs_raster_pipeline tb_gs_prim_list_feeder tb_gs_vram_writeback tb_vram_stub tb_vram_bram_stub_equivalence tb_vram_normalize_write tb_gs_scanout_basic tb_gs_scanout_dbx_dby tb_gs_scanout_display_window tb_gs_scanout_magh_magv tb_gs_scanout_psm16 tb_gs_scanout_psmt8 tb_gs_scanout_psmt8_clut tb_gs_tex0_clut tb_gs_clut_load tb_gs_clut_load_ct16 tb_gs_clut_load_cld_modes tb_gs_clut_load_csa_window tb_gs_scanout_psmt4_clut tb_gs_psmt4_round_trip tb_gs_raster_psmct16 tb_gs_raster_psmt8 tb_gs_textured_sprite tb_gs_textured_alpha_sprite tb_gs_psmt8_alpha_sprite tb_gs_psmt8_clut_triangle tb_clut_loader_csm1 tb_gs_raster_psmct4 tb_gs_demo_psmt4_e2e tb_gs_demo_psmt4_e2e_packed tb_gs_demo_psmt4_e2e_dmac tb_gs_demo_psmt4_e2e_trxdir tb_gs_demo_psmt4_e2e_eemmio tb_gs_demo_psmt4_e2e_eemap tb_gs_demo_psmt4_e2e_ee_program tb_gs_demo_psmt4_e2e_ee_full_bootlet tb_ee_ram_cpu_dmac_contention tb_gs_image_xfer_psmct16 tb_gs_image_xfer_psmt8 tb_gs_image_xfer_psmt4 tb_gs_swizzle_psmct32 tb_gs_swizzle_psmct16 tb_gs_swizzle_psmt8 tb_gs_swizzle_psmt4 tb_gs_scanout_swizzle_psmt4 tb_gs_image_xfer_swizzle_psmt4 tb_gs_raster_swizzle_psmt4 tb_gs_demo_psmt4_swizzle_e2e tb_gs_demo_psmt4_swizzle_trxdir_e2e tb_top_psmct32_raster_demo tb_top_psmct32_textured_demo tb_top_psmct32_raster_demo_bram tb_top_psmct32_raster_demo_bram_textured tb_top_psmct32_raster_demo_bram_ch171 tb_gs_raster_backpressure_stress tb_ps2_hps_bridge tb_gs_raster_bram_psmct16 tb_gs_raster_bram_psmt8 tb_gs_raster_bram_psmt4 tb_gs_scanout_bram_psmct16 tb_gs_scanout_bram_psmt8 tb_de25_nano_psmct32_raster_demo_top tb_hdmi_i2c_wake_smoke tb_gs_scanout_swizzle_psmt8 tb_gs_image_xfer_swizzle_psmt8 tb_gs_raster_swizzle_psmt8 tb_gs_demo_psmt8_swizzle_e2e tb_gs_demo_psmt8_swizzle_trxdir_e2e tb_gs_scanout_swizzle_psmct16 tb_gs_image_xfer_swizzle_psmct16 tb_gs_scanout_swizzle_psmct32 tb_gs_image_xfer_swizzle_psmct32 tb_gs_raster_swizzle_psmct32 tb_gs_raster_swizzle_psmct16 tb_gs_demo_psmct32_swizzle_e2e tb_gs_demo_psmct32_swizzle_trxdir_e2e tb_gs_demo_psmct16_swizzle_e2e tb_gs_demo_psmct16_swizzle_trxdir_e2e tb_ee_core_varshift tb_ee_install_agent_smoke tb_ee_install_agent_external_image tb_tile_ram_cdc tb_sio2_input_stub tb_bridge_iop_pad_input tb_pad_state_via_sif_to_ee tb_ee_pad_buffer_branch tb_lpddr_tex_staging tb_osd_platform_cell_adapter tb_ee_core_elf_runner tb_ee_core_sq tb_ee_core_daddu tb_ee_core_syscall_hle tb_ee_core_beql tb_ee_core_sd tb_ee_core_dsll tb_ee_core_bnel tb_ee_core_pcpyld tb_ee_core_lq tb_ee_core_psubb tb_ee_core_pnor tb_ee_core_pand tb_ee_core_pcpyud tb_ee_core_ld tb_ee_core_ei tb_ee_dmac_ctrl_stub tb_ee_dmac_passive_chan_stub tb_ee_core_sync tb_ee_core_pcpyh tb_ee_core_dsubu tb_gs_async_fifo tb_gs_lpddr_fb_writer tb_gs_lpddr_axi_master tb_gs_lpddr_axi_master_elastic tb_gs_lpddr_scanout_fb tb_gs_lpddr_rd_probe tb_gs_lpddr_scanout tb_gs_lpddr_scanout_psm32 tb_gs_lpddr_scanout_concurrency tb_gs_lpddr_scanout_lb_psm32 tb_gs_lpddr_scanout_lb_psm32_256 tb_gs_lpddr_rd_arb tb_gs_lpddr_scanout_lb tb_gs_texture_cache tb_gs_lpddr_wr_probe tb_gs_lpddr_wr_arb tb_gs_tile_reload tb_gs_tile_reload_grid tb_gs_z_flush_writer tb_gs_alpha_blend tb_top_psmct32_alpha_blend_demo tb_top_psmct32_texalpha_demo tb_gs_zbuffer tb_top_psmct32_zbuffer_demo tb_gs_tri_interp tb_gs_fog tb_gs_fog_persp tb_gs_feeder_fog_e2e tb_top_psmct32_triangle_demo tb_gs_textured_triangle tb_top_psmct32_raster_demo_bram_tritex tb_top_psmct32_raster_demo_bram_lpddrtex tb_gs_texture_psmt8_clut tb_gs_texture_wrap tb_gs_texture_bilinear tb_top_psmct32_raster_demo_bram_clut tb_gs_texture_psmt4_clut tb_gs_texture_swizzle_psmt4_clut tb_top_psmct32_raster_demo_bram_clut4 tb_top_psmct32_raster_demo_bram_swz4 tb_gs_texture_swizzle_psmt8_clut tb_top_psmct32_raster_demo_bram_swz8 tb_gs_texture_swizzle_psmct32 tb_top_psmct32_raster_demo_bram_swz32 tb_gs_reciprocal tb_gs_persp_uv tb_gs_persp_uv_farw tb_gs_grad_divider tb_top_psmct32_perspective_demo tb_top_psmct32_persp_floor_demo tb_top_psmct32_combined_demo tb_gs_tile_ram tb_top_psmct32_tile_demo tb_gs_tile_zflush tb_gs_tile_spill_reload tb_gs_tile_spill_lpddr tb_gs_tile_spill_grid_lpddr tb_gs_tile_spill_grid8x8_lpddr tb_gs_tile_spill_lpddr_neg tb_top_psmct32_tile2x2_demo tb_top_psmct32_tile_multiprim_demo tb_top_psmct32_tile_scissor_demo tb_top_psmct32_tile_wrap_demo tb_top_psmct32_tile_psmct16_demo tb_top_psmct32_tile_alpha_demo tb_top_psmct32_tile_bilinear_demo tb_top_psmct32_tile_bin_demo tb_top_psmct32_tile_bin4x4_demo tb_top_psmct32_tile_psmct16fb_demo tb_top_psmct32_tile_lpddr128_demo tb_top_psmct32_tile_palbilinear_demo tb_top_psmct32_tile_cap_demo tb_top_psmct32_tile_cap_overflow_demo tb_top_psmct32_tile_sprite18_demo tb_top_psmct32_tile_cap64_demo tb_top_psmct32_feeder_equiv_demo tb_top_psmct32_feeder_runtime_demo tb_top_psmct32_feeder_bridge_demo tb_top_psmct32_feeder_scenes_demo tb_top_psmct32_feeder_shapes_demo tb_top_psmct32_feeder_colors_demo tb_top_psmct32_feeder_native_demo tb_top_psmct32_feeder_gouraud_demo tb_top_psmct32_feeder_accum_demo tb_top_psmct32_feeder_scene_retrigger_demo tb_top_psmct32_feeder_zpersist_demo tb_top_psmct32_feeder_persp_demo tb_top_psmct32_feeder_sprite_demo tb_top_psmct32_tile_late_demo tb_top_psmct32_tile_lpddrfb_demo \ dirs all_checks full_checks golden_nop compare_ee_fetch test_compare all: run @@ -513,15 +747,19 @@ tb_gs_raster_queue_full_pop: dirs @echo "=== run tb_gs_raster_queue_full_pop ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_raster_queue_full_pop.vvp +GS_RASTER_PIPELINE_IVERILOG_ARGS ?= tb_gs_raster_pipeline: dirs @echo "=== build tb_gs_raster_pipeline ===" - $(IVERILOG) $(IVERILOG_FLGS) \ + $(IVERILOG) $(IVERILOG_FLGS) $(GS_RASTER_PIPELINE_IVERILOG_ARGS) \ -o $(BUILD_DIR)/tb_gs_raster_pipeline.vvp \ -s tb_gs_raster_pipeline \ $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_raster_pipeline.sv @echo "=== run tb_gs_raster_pipeline ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_raster_pipeline.vvp +tb_gs_subpixel_xy: + @$(MAKE) GS_RASTER_PIPELINE_IVERILOG_ARGS="-Ptb_gs_raster_pipeline.USE_SUBPIXEL=1 -Ptb_gs_raster_pipeline.GRAD_CYCLES=5" tb_gs_raster_pipeline + tb_gs_vram_writeback: dirs @echo "=== build tb_gs_vram_writeback ===" $(IVERILOG) $(IVERILOG_FLGS) \ @@ -805,6 +1043,10 @@ tb_gs_alpha_blend: dirs @echo "=== run tb_gs_alpha_blend ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_alpha_blend.vvp +tb_gs_lpddr_color_blend: dirs + $(IVERILOG) $(IVERILOG_FLGS) -o $(BUILD_DIR)/tb_gs_lpddr_color_blend.vvp -s tb_gs_lpddr_color_blend $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_color_blend.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_color_blend.vvp + tb_gs_lpddr_fb_writer: dirs @echo "=== build tb_gs_lpddr_fb_writer ===" $(IVERILOG) $(IVERILOG_FLGS) \ @@ -823,6 +1065,74 @@ tb_gs_lpddr_axi_master: dirs @echo "=== run tb_gs_lpddr_axi_master ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_axi_master.vvp +tb_gs_lpddr_axi_master_elastic: dirs + @echo "=== build tb_gs_lpddr_axi_master_elastic ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_axi_master_elastic.vvp \ + -s tb_gs_lpddr_axi_master_elastic \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_axi_master_elastic.sv + @echo "=== run tb_gs_lpddr_axi_master_elastic ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_axi_master_elastic.vvp + +tb_gs_async_fifo: dirs + @echo "=== build tb_gs_async_fifo ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_async_fifo.vvp \ + -s tb_gs_async_fifo \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_async_fifo.sv + @echo "=== run tb_gs_async_fifo ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_async_fifo.vvp + +tb_gs_async_fifo_banked: dirs + @echo "=== build tb_gs_async_fifo_banked ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -P tb_gs_async_fifo.TEST_BANKED=1 \ + -o $(BUILD_DIR)/tb_gs_async_fifo_banked.vvp \ + -s tb_gs_async_fifo \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_async_fifo.sv + @echo "=== run tb_gs_async_fifo_banked ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_async_fifo_banked.vvp + +tb_gs_async_fifo_quadrant: dirs + @echo "=== build tb_gs_async_fifo_quadrant ===" + $(IVERILOG) -g2012 -Wall \ + -P tb_gs_async_fifo.TEST_QUADRANT=1 \ + -o $(BUILD_DIR)/tb_gs_async_fifo_quadrant.vvp \ + -s tb_gs_async_fifo \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_async_fifo.sv + @echo "=== run tb_gs_async_fifo_quadrant ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_async_fifo_quadrant.vvp + +tb_gs_async_fifo_registered: dirs + @echo "=== build tb_gs_async_fifo_registered ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -P tb_gs_async_fifo.TEST_REGISTERED=1 \ + -o $(BUILD_DIR)/tb_gs_async_fifo_registered.vvp \ + -s tb_gs_async_fifo \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_async_fifo.sv + @echo "=== run tb_gs_async_fifo_registered ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_async_fifo_registered.vvp + +# Ch357 gate 1 — standalone packed PSMZ16S LPDDR Z read-modify-write engine unit test. +tb_gs_lpddr_z_rmw: dirs + @echo "=== build tb_gs_lpddr_z_rmw ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_z_rmw.vvp \ + -s tb_gs_lpddr_z_rmw \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_z_rmw.sv + @echo "=== run tb_gs_lpddr_z_rmw ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_z_rmw.vvp + +# Ch357 — Z-then-color integration wrapper (request FIFO + Z RMW + color writer + scene drain) unit test. +tb_gs_lpddr_zc_emit: dirs + @echo "=== build tb_gs_lpddr_zc_emit ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_zc_emit.vvp \ + -s tb_gs_lpddr_zc_emit \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_zc_emit.sv + @echo "=== run tb_gs_lpddr_zc_emit ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_zc_emit.vvp + tb_gs_grad_divider: dirs @echo "=== build tb_gs_grad_divider ===" $(IVERILOG) $(IVERILOG_FLGS) \ @@ -832,6 +1142,15 @@ tb_gs_grad_divider: dirs @echo "=== run tb_gs_grad_divider ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_grad_divider.vvp +tb_gs_lpddr_scanout_fb: dirs + @echo "=== build tb_gs_lpddr_scanout_fb ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_scanout_fb.vvp \ + -s tb_gs_lpddr_scanout_fb \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_scanout_fb.sv + @echo "=== run tb_gs_lpddr_scanout_fb ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_scanout_fb.vvp + tb_gs_lpddr_rd_probe: dirs @echo "=== build tb_gs_lpddr_rd_probe ===" $(IVERILOG) $(IVERILOG_FLGS) \ @@ -904,6 +1223,24 @@ tb_gs_lpddr_scanout_lb: dirs @echo "=== run tb_gs_lpddr_scanout_lb ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_scanout_lb.vvp +tb_gs_lpddr_scanout_lb_hstretch: dirs + @echo "=== build tb_gs_lpddr_scanout_lb_hstretch ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_scanout_lb_hstretch.vvp \ + -s tb_gs_lpddr_scanout_lb_hstretch \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_scanout_lb_hstretch.sv + @echo "=== run tb_gs_lpddr_scanout_lb_hstretch ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_scanout_lb_hstretch.vvp + +tb_gs_lpddr_scanout_lb_binomial: dirs + @echo "=== build tb_gs_lpddr_scanout_lb_binomial ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_lpddr_scanout_lb_binomial.vvp \ + -s tb_gs_lpddr_scanout_lb_binomial \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_lpddr_scanout_lb_binomial.sv + @echo "=== run tb_gs_lpddr_scanout_lb_binomial ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_lpddr_scanout_lb_binomial.vvp + tb_gs_texture_cache: dirs @echo "=== build tb_gs_texture_cache ===" $(IVERILOG) $(IVERILOG_FLGS) \ @@ -988,6 +1325,36 @@ tb_gs_tri_interp: dirs @echo "=== run tb_gs_tri_interp ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_tri_interp.vvp +# GS per-vertex FOG — focused white-box fog blend + interpolation + FGE=0 gate. +tb_gs_fog: dirs + @echo "=== build tb_gs_fog ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_fog.vvp \ + -s tb_gs_fog \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_fog.sv + @echo "=== run tb_gs_fog ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_fog.vvp + +# GS per-vertex FOG on the PERSPECTIVE-textured emit (persp_emit5), PERSPECTIVE_CORRECT=1. +tb_gs_fog_persp: dirs + @echo "=== build tb_gs_fog_persp ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_fog_persp.vvp \ + -s tb_gs_fog_persp \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_fog_persp.sv + @echo "=== run tb_gs_fog_persp ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_fog_persp.vvp + +# GS per-vertex FOG end-to-end: staging PRIM.FGE -> feeder XYZF2 -> gs_stub fog. +tb_gs_feeder_fog_e2e: dirs + @echo "=== build tb_gs_feeder_fog_e2e ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_gs_feeder_fog_e2e.vvp \ + -s tb_gs_feeder_fog_e2e \ + $(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_feeder_fog_e2e.sv + @echo "=== run tb_gs_feeder_fog_e2e ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_feeder_fog_e2e.vvp + # Brick 3 — top-level non-axis-aligned triangle demo on the BRAM board path. tb_top_psmct32_triangle_demo: dirs top_psmct32_raster_demo_mem @echo "=== build tb_top_psmct32_triangle_demo ===" @@ -1723,6 +2090,23 @@ tb_top_psmct32_feeder_persp_demo: dirs top_psmct32_raster_demo_mem @echo "=== run tb_top_psmct32_feeder_persp_demo ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_feeder_persp_demo.vvp +# Ch357 — BOARD gradient-path equivalence: same perspective scene + exact per-pixel oracle, but the bram-top runs the +# BOARD config (GRAD_SEQ_DIVIDER=0, GRAD_DIV_CYCLES=5 -> the registered-numerator-select + 5-cycle-settle FSM). Passing +# the SAME interior_ok==interior_total exact match proves the new FSM renders the 20-step perspective gradients +# bit-identically to the default combinational path (the numerator-register fix is value-transparent, +1 cycle/step). +tb_top_psmct32_feeder_persp_boardpath: dirs top_psmct32_raster_demo_mem + @echo "=== build tb_top_psmct32_feeder_persp_boardpath (GRAD_SEQ_DIVIDER=0/CYCLES=5) ===" + $(IVERILOG) $(IVERILOG_FLGS) -DGRAD_BOARDPATH \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_feeder_setup.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_feeder_setup.mem"' \ + -DFEEDER_PERSP_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/feeder_persp.mem"' \ + -DFEEDER_PERSP_TEX_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/feeder_persp_tex.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_feeder_persp_boardpath.vvp \ + -s tb_top_psmct32_feeder_persp_demo \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_feeder_persp_demo.sv + @echo "=== run tb_top_psmct32_feeder_persp_boardpath ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_feeder_persp_boardpath.vvp + # Ch348 — AUTHENTIC SH3 PSMT8+CLUT through the perspective feeder path (LOCAL assets; NOT in the regression). # Fixtures: tools/gs_extract_sh3_clut.py + tools/gs_make_sh3_persp_fixture.py (needs the local SH3 dump). tb_top_psmct32_sh3_persp_demo: dirs @@ -1749,6 +2133,2134 @@ tb_top_psmct32_sh3_real_draw_demo: dirs $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_real_draw_demo.sv @echo "=== run tb_top_psmct32_sh3_real_draw_demo ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_real_draw_demo.vvp + @echo "=== emit current RTL framebuffer PNG (Ch352 closeout) ===" + @python3 $(SIM_DIR)/../tools/gs_fb_to_png.py \ + $(SIM_DIR)/data/top_psmct32_raster_demo/sh3_real_fb_out.mem \ + $(SIM_DIR)/data/top_psmct32_raster_demo/sh3_real_fb_rtl.png 256 120 3 || true + +# Ch353 Brick 1c — LPDDR-only direct PSMCT32 framebuffer proof (FB_LPDDR_ONLY + widened writer). +tb_top_psmct32_sh3_lpddr_fb: dirs + @echo "=== build tb_top_psmct32_sh3_lpddr_fb ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_real.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_real.mem"' \ + -DFEEDER_SH3_REAL_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/feeder_sh3_real.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb.vvp \ + -s tb_top_psmct32_sh3_lpddr_fb \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_lpddr_fb.sv + @echo "=== run tb_top_psmct32_sh3_lpddr_fb ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb.vvp + +# Ch353 Brick 1b — same proof at the FULL 256x334 frame (--full-frame fixture: sh3_full_* + bios/payload/feeder _full). +tb_top_psmct32_sh3_lpddr_fb_full: dirs + @echo "=== build tb_top_psmct32_sh3_lpddr_fb_full (FULL FRAME 256x334) ===" + $(IVERILOG) $(IVERILOG_FLGS) -DSH3_FULL_FRAME \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_full.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_full.mem"' \ + -DFEEDER_SH3_REAL_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/feeder_sh3_full.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb_full.vvp \ + -s tb_top_psmct32_sh3_lpddr_fb \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_lpddr_fb.sv + @echo "=== run tb_top_psmct32_sh3_lpddr_fb_full ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb_full.vvp + +# Ch353 Brick 3 — LPDDR-only FB HOST-START SEQUENCE proof (FEEDER_AUTOSTART=0 + render-epoch EOF + frame_drained +# hard gate + full write->scanout loop). The fit gate: no board fit until this passes. Full-frame fixtures. +tb_top_psmct32_sh3_lpddr_fb_seq: dirs + @echo "=== build tb_top_psmct32_sh3_lpddr_fb_seq (Brick 3 SEQUENCE, FULL FRAME 256x334) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_full.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_full.mem"' \ + -DFEEDER_SH3_REAL_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/feeder_sh3_full.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb_seq.vvp \ + -s tb_top_psmct32_sh3_lpddr_fb_seq \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_lpddr_fb_seq.sv + @echo "=== run tb_top_psmct32_sh3_lpddr_fb_seq ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_lpddr_fb_seq.vvp + +# Ch354 Brick 1 — MULTI-DRAW accumulation into the LPDDR framebuffer (3 SH3 draws sharing one texture -> one FB). +# FEEDER_STG_WORDS=2048; proves records_emitted==NTRIS, one frame_drained after all batches, overlap oracle. LOCAL fixtures. +tb_top_psmct32_sh3_multidraw: dirs + @echo "=== build tb_top_psmct32_sh3_multidraw (Ch354 multi-draw, FB 256x338, STG 2048) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_multi.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_multi.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_multidraw.vvp \ + -s tb_top_psmct32_sh3_multidraw \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_multidraw.sv + @echo "=== run tb_top_psmct32_sh3_multidraw ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_multidraw.vvp + +# Ch355 Brick 1 — MULTI-TEXTURE composition: 2 SH3 draws w/ DIFFERENT TEX0/CLUT accumulate into one 320x381 LPDDR FB +# via scene-level texture rebind (2 cache fills/CRCs) + staged-list retriggering, no stale-drain race. LOCAL fixtures. +tb_top_psmct32_sh3_multitex: dirs + @echo "=== build tb_top_psmct32_sh3_multitex (Ch355 multi-texture, FB 320x381) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_mt.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_mt.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_multitex.vvp \ + -s tb_top_psmct32_sh3_multitex \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_multitex.sv + @echo "=== run tb_top_psmct32_sh3_multitex ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_multitex.vvp + +# Ch356 — N-TEXTURE SCHEDULER (data-driven epoch descriptors, FB 384x381). LOCAL fixtures via +# gs_make_sh3_scheduler_fixture.py --emit; bootlet preloads all N relocated CLUTs; lists streamed via the write port. +tb_top_psmct32_sh3_sched: dirs + @echo "=== build tb_top_psmct32_sh3_sched (Ch356 N-texture scheduler, FB 384x381) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_sched.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_sched.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp \ + -s tb_top_psmct32_sh3_sched \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_sched.sv + @echo "=== run tb_top_psmct32_sh3_sched ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp + +# Ch357 — scheduler with AUTHENTIC-Z fixtures (sh3_zsched primary [8634,12757,145742]); captures the raster fragment +# stream {epoch,x,y,persp_z,color} -> zsched_frags.txt for external persp_z5 verification vs the clamp16 oracle. +tb_top_psmct32_sh3_zsched: dirs sh3_zsched_fixture + @echo "=== build tb_top_psmct32_sh3_zsched (Ch357 authentic-Z capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsched.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsched.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zsched.vvp \ + -s tb_top_psmct32_sh3_zsched \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zsched.sv + @echo "=== run tb_top_psmct32_sh3_zsched ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zsched.vvp + +# Ch357 — persistent-Z ROP acceptance gate (option A): replay the captured raster fragment trace (zsched_frags.txt, produced +# by tb_top_psmct32_sh3_zsched) through gs_lpddr_zc_emit + an independent clamp16 scoreboard. Run the capture first. +tb_top_psmct32_sh3_zrop: tb_top_psmct32_sh3_zsched + @echo "=== build tb_top_psmct32_sh3_zrop (Ch357 ROP scoreboard) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zrop.vvp \ + -s tb_top_psmct32_sh3_zrop \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zrop.sv + @echo "=== run tb_top_psmct32_sh3_zrop ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zrop.vvp + +# Ch357 — REAL-RASTER persistent-Z board integration (Codex pre-fit gate): drive the REAL demo (feeder+raster, +# authz sh3_zsched scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters (wr s0=color/s2=Z, rd s3=Z) -> one shared LPDDR +# with random backpressure. Catches request-FIFO fragment DROPS the handshake-fed zarb trace could not. +tb_top_psmct32_sh3_zint: dirs sh3_zsched_fixture + @echo "=== build tb_top_psmct32_sh3_zint (Ch357 real-raster Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsched.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsched.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint.vvp \ + -s tb_top_psmct32_sh3_zint \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint.sv + @echo "=== run tb_top_psmct32_sh3_zint ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint.vvp + +sh3_zsched_board_compare: tb_top_psmct32_sh3_zsched tb_top_psmct32_sh3_zint + @test -f $(SH3_ZSCHED_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSCHED_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zsched_board_fb.mem here first."; exit 1) + @echo "=== dump zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint.vvp +FBDUMP=$(SH3_ZSCHED_ZINT_FB) + @echo "=== compare board framebuffer vs zint sim framebuffer ===" + @sha256sum $(SH3_ZSCHED_BOARD_FB) $(SH3_ZSCHED_ZINT_FB) + @cmp -s $(SH3_ZSCHED_BOARD_FB) $(SH3_ZSCHED_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint sim" || \ + (echo "FAIL: board framebuffer differs from zint sim"; cmp -l $(SH3_ZSCHED_BOARD_FB) $(SH3_ZSCHED_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSCHED_BOARD_FB) \ + --owner replay-color --frags $(TRACE_DIR)/zsched_frags.txt + +# Ch358 — NATIVE 640x480 persistent-Z capture: the strong-reject scene at authentic screen coords through the REAL +# raster; captures the fragment stream {epoch,x,y,persp_z,color} -> zs640_frags.txt (replay-color board check input). +tb_top_psmct32_sh3_zs640_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640_cap (Ch358 native-640 authentic-Z capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640_cap.vvp + +# Ch358 — real-raster persistent-Z integration at NATIVE 640x480 (the de25 GS_SH3_LPDDR_FB_Z+_640 path): REAL demo -> +# gs_lpddr_zc_emit -> REAL de25 arbiters -> one shared LPDDR w/ random backpressure + clamp16 scoreboard. Drop gate. +tb_top_psmct32_sh3_zint640: dirs + @echo "=== build tb_top_psmct32_sh3_zint640 (Ch358 native-640 real-raster Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640.vvp \ + -s tb_top_psmct32_sh3_zint640 \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640.sv + @echo "=== run tb_top_psmct32_sh3_zint640 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640.vvp + +# Ch358 — board proof (same pattern as sh3_zsched_board_compare): board --dump-fb must be byte-for-byte identical to +# the zint640 sim FB, and 100% exact against the replayed fragment colors. +sh3_zs640_board_compare: tb_top_psmct32_sh3_zs640_cap tb_top_psmct32_sh3_zint640 + @test -f $(SH3_ZS640_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zs640_board_fb.mem here first."; exit 1) + @echo "=== dump zint640 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640.vvp +FBDUMP=$(SH3_ZS640_ZINT_FB) + @echo "=== compare board framebuffer vs zint640 sim framebuffer ===" + @sha256sum $(SH3_ZS640_BOARD_FB) $(SH3_ZS640_ZINT_FB) + @cmp -s $(SH3_ZS640_BOARD_FB) $(SH3_ZS640_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640 sim" || \ + (echo "FAIL: board framebuffer differs from zint640 sim"; cmp -l $(SH3_ZS640_BOARD_FB) $(SH3_ZS640_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640_BOARD_FB) \ + --tag zs640 --owner replay-color --frags $(TRACE_DIR)/zs640_frags.txt + +# Ch359 — zs640c6 capture: TWO 204-tri shared-texture epochs through the REAL raster (ONE fill, epoch 1 reuses the +# resident cache); captures the fragment stream -> zs640c6_frags.txt (replay-color board check input). +tb_top_psmct32_sh3_zs640c6_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640c6_cap (Ch359 shared-texture residency capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c6.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c6.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c6_cap.vvp \ + -s tb_top_psmct32_sh3_zs640c6_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640c6_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640c6_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c6_cap.vvp + +# Ch359 — real-raster persistent-Z integration for the shared-texture pair (drop gate + residency + scoreboard). +tb_top_psmct32_sh3_zint640c6: dirs + @echo "=== build tb_top_psmct32_sh3_zint640c6 (Ch359 real-raster residency Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c6.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c6.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c6.vvp \ + -s tb_top_psmct32_sh3_zint640c6 \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640c6.sv + @echo "=== run tb_top_psmct32_sh3_zint640c6 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c6.vvp + +# Ch359 — board proof (same contract): board --dump-fb byte-for-byte == zint640c6 sim FB + 100% replay-color. +sh3_zs640c6_board_compare: tb_top_psmct32_sh3_zs640c6_cap tb_top_psmct32_sh3_zint640c6 + @test -f $(SH3_ZS640C6_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640C6_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zs640c6_board_fb.mem here first."; exit 1) + @echo "=== dump zint640c6 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c6.vvp +FBDUMP=$(SH3_ZS640C6_ZINT_FB) + @echo "=== compare board framebuffer vs zint640c6 sim framebuffer ===" + @sha256sum $(SH3_ZS640C6_BOARD_FB) $(SH3_ZS640C6_ZINT_FB) + @cmp -s $(SH3_ZS640C6_BOARD_FB) $(SH3_ZS640C6_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640c6 sim" || \ + (echo "FAIL: board framebuffer differs from zint640c6 sim"; cmp -l $(SH3_ZS640C6_BOARD_FB) $(SH3_ZS640C6_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640C6_BOARD_FB) \ + --tag zs640c6 --owner replay-color --frags $(TRACE_DIR)/zs640c6_frags.txt + +# Ch367 — runtime-CLUT proof: same real-raster Z path, but each epoch receives its palette through +# the core-side runtime writer. The board dump must match the integration framebuffer byte-for-byte. +tb_top_psmct32_sh3_zint640rt3: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rt3 (runtime-CLUT real-raster Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt3.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt3.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt3.vvp \ + -s tb_top_psmct32_sh3_zint640rt3 \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640rt3.sv + @echo "=== run tb_top_psmct32_sh3_zint640rt3 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt3.vvp + +sh3_zsrt3_board_compare: tb_top_psmct32_sh3_zint640rt3 + @test -f $(SH3_ZSRT3_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRT3_BOARD_FB)"; \ + echo "Run the runtime-CLUT board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump runtime-CLUT zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt3.vvp +FBDUMP=$(SH3_ZSRT3_ZINT_FB) + @echo "=== compare board framebuffer vs runtime-CLUT zint sim framebuffer ===" + @sha256sum $(SH3_ZSRT3_BOARD_FB) $(SH3_ZSRT3_ZINT_FB) + @cmp -s $(SH3_ZSRT3_BOARD_FB) $(SH3_ZSRT3_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to runtime-CLUT zint sim" || \ + (echo "FAIL: board framebuffer differs from runtime-CLUT zint sim"; cmp -l $(SH3_ZSRT3_BOARD_FB) $(SH3_ZSRT3_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed runtime-CLUT fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRT3_BOARD_FB) \ + --tag zsrt3 --owner replay-color --frags $(TRACE_DIR)/zsrt3_frags.txt + +# Ch367 -- the established 24-draw texture-residency cluster with the runtime +# palette transport enabled on every epoch. This is fixture/host proof only; +# the signed core and its timing provenance are unchanged. +tb_top_psmct32_sh3_zint640rt24: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rt24 (24-draw runtime-CLUT Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + $(if $(filter 1,$(SH3_ZSRT24_TRACE)),-DSH3_SHARED_TRACE) \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rt24 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt24.vvp + +tb_top_psmct32_sh3_zint640rt24_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rt24 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrt24_board_compare: tb_top_psmct32_sh3_zint640rt24_trace + @test -f $(SH3_ZSRT24_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRT24_BOARD_FB)"; \ + echo "Run the runtime-CLUT 24-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump runtime-CLUT 24-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt24.vvp +FBDUMP=$(SH3_ZSRT24_ZINT_FB) + @echo "=== compare board framebuffer vs runtime-CLUT 24-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRT24_BOARD_FB) $(SH3_ZSRT24_ZINT_FB) + @cmp -s $(SH3_ZSRT24_BOARD_FB) $(SH3_ZSRT24_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to runtime-CLUT 24-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from runtime-CLUT 24-draw zint sim"; cmp -l $(SH3_ZSRT24_BOARD_FB) $(SH3_ZSRT24_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed runtime-CLUT 24-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRT24_BOARD_FB) \ + --tag zsrt24 --owner replay-color --frags $(TRACE_DIR)/zsrt24_frags.txt + +# Ch368 -- frame B of the runtime-CLUT motion pair. It uses the production +# 4096-entry request FIFO measured against its eight-epoch cold-Z bursts. +tb_top_psmct32_sh3_zint640rtb24: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtb24 (frame-B runtime-CLUT Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtb24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtb24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtb24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTB24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtb24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtb24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtb24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rtb24 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtb24.vvp $(if $(SH3_ZSRTB24_START_EPOCH),+START_EPOCH=$(SH3_ZSRTB24_START_EPOCH)) + +tb_top_psmct32_sh3_zint640rtb24_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtb24 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtb24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtb24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtb24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTB24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtb24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtb24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtb24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrtb24_board_compare: tb_top_psmct32_sh3_zint640rtb24_trace + @test -f $(SH3_ZSRTB24_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTB24_BOARD_FB)"; \ + echo "Run the runtime-CLUT Frame B board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump runtime-CLUT Frame B zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtb24.vvp +FBDUMP=$(SH3_ZSRTB24_ZINT_FB) + @echo "=== compare board framebuffer vs runtime-CLUT Frame B zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTB24_BOARD_FB) $(SH3_ZSRTB24_ZINT_FB) + @cmp -s $(SH3_ZSRTB24_BOARD_FB) $(SH3_ZSRTB24_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to runtime-CLUT Frame B zint sim" || \ + (echo "FAIL: board framebuffer differs from runtime-CLUT Frame B zint sim"; cmp -l $(SH3_ZSRTB24_BOARD_FB) $(SH3_ZSRTB24_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed runtime-CLUT Frame B fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTB24_BOARD_FB) \ + --tag zsrtb24 --owner replay-color --frags $(TRACE_DIR)/zsrtb24_frags.txt + +# Ch369 -- runtime-CLUT version of the proven 28-draw mixed-residency frame: +# four texture rebinds followed by the eight-epoch shared-texture cluster. +tb_top_psmct32_sh3_zint640rtm28: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtm28 (28-draw runtime-CLUT Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtm28_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtm28"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtm28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTM28_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtm28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtm28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtm28.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rtm28 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtm28.vvp + +tb_top_psmct32_sh3_zint640rtm28_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtm28 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtm28_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtm28"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtm28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTM28_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtm28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtm28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtm28.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrtm28_board_compare: tb_top_psmct32_sh3_zint640rtm28_trace + @test -f $(SH3_ZSRTM28_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTM28_BOARD_FB)"; \ + echo "Run the runtime-CLUT mixed-residency board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump runtime-CLUT mixed-residency zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtm28.vvp +FBDUMP=$(SH3_ZSRTM28_ZINT_FB) + @echo "=== compare board framebuffer vs runtime-CLUT mixed-residency zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTM28_BOARD_FB) $(SH3_ZSRTM28_ZINT_FB) + @cmp -s $(SH3_ZSRTM28_BOARD_FB) $(SH3_ZSRTM28_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to runtime-CLUT mixed-residency zint sim" || \ + (echo "FAIL: board framebuffer differs from runtime-CLUT mixed-residency zint sim"; cmp -l $(SH3_ZSRTM28_BOARD_FB) $(SH3_ZSRTM28_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed runtime-CLUT mixed-residency fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTM28_BOARD_FB) \ + --tag zsrtm28 --owner replay-color --frags $(TRACE_DIR)/zsrtm28_frags.txt + +# Ch370 -- runtime-CLUT conversion of Frame C's 24-draw shared-texture cluster. +# It keeps the C palette relocated at CBP 504 and proves the same host-owned CLUT +# path as A/B/M28 without changing the fitted core. +tb_top_psmct32_sh3_zint640rtc24: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtc24 (frame-C runtime-CLUT Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtc24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtc24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtc24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTC24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtc24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtc24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtc24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rtc24 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtc24.vvp + +tb_top_psmct32_sh3_zint640rtc24_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rtc24 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtc24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrtc24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtc24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTC24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtc24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtc24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtc24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrtc24_board_compare: tb_top_psmct32_sh3_zint640rtc24_trace + @test -f $(SH3_ZSRTC24_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTC24_BOARD_FB)"; \ + echo "Run the runtime-CLUT Frame C board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump runtime-CLUT Frame C zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtc24.vvp +FBDUMP=$(SH3_ZSRTC24_ZINT_FB) + @echo "=== compare board framebuffer vs runtime-CLUT Frame C zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTC24_BOARD_FB) $(SH3_ZSRTC24_ZINT_FB) + @cmp -s $(SH3_ZSRTC24_BOARD_FB) $(SH3_ZSRTC24_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to runtime-CLUT Frame C zint sim" || \ + (echo "FAIL: board framebuffer differs from runtime-CLUT Frame C zint sim"; cmp -l $(SH3_ZSRTC24_BOARD_FB) $(SH3_ZSRTC24_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed runtime-CLUT Frame C fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTC24_BOARD_FB) \ + --tag zsrtc24 --owner replay-color --frags $(TRACE_DIR)/zsrtc24_frags.txt + +# Ch371 -- first runtime-CLUT probe from the earlier SH3 capture. Two ordered +# epochs share its PSMT8 texture, exercising a fill and verified resident reuse. +tb_top_psmct32_sh3_zint640rte3: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte3 (earlier-capture runtime-CLUT Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte3_params.vh"' \ + -DSH3_SHARED_TAG='"zsrte3"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte3_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE3_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte3.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte3.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte3.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte3 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte3.vvp + +tb_top_psmct32_sh3_zint640rte3_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte3 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte3_params.vh"' \ + -DSH3_SHARED_TAG='"zsrte3"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte3_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE3_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte3.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte3.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte3.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte3_board_compare: tb_top_psmct32_sh3_zint640rte3_trace + @test -f $(SH3_ZSRTE3_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE3_BOARD_FB)"; \ + echo "Run the earlier-capture runtime-CLUT probe with --dump-fb and copy it here first."; exit 1) + @echo "=== dump earlier-capture runtime-CLUT zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte3.vvp +FBDUMP=$(SH3_ZSRTE3_ZINT_FB) + @echo "=== compare board framebuffer vs earlier-capture runtime-CLUT zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE3_BOARD_FB) $(SH3_ZSRTE3_ZINT_FB) + @cmp -s $(SH3_ZSRTE3_BOARD_FB) $(SH3_ZSRTE3_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to earlier-capture runtime-CLUT zint sim" || \ + (echo "FAIL: board framebuffer differs from earlier-capture runtime-CLUT zint sim"; cmp -l $(SH3_ZSRTE3_BOARD_FB) $(SH3_ZSRTE3_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed earlier-capture runtime-CLUT fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE3_BOARD_FB) \ + --tag zsrte3 --owner replay-color --frags $(TRACE_DIR)/zsrte3_frags.txt + +# Ch372 -- two full 204-triangle epochs from the newly qualified earlier-capture texture cluster. +tb_top_psmct32_sh3_zint640rte6: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte6 (earlier-capture 6-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte6_params.vh"' \ + -DSH3_SHARED_TAG='"zsrte6"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte6_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE6_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte6.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte6.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte6.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte6 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte6.vvp + +tb_top_psmct32_sh3_zint640rte6_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte6 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte6_params.vh"' -DSH3_SHARED_TAG='"zsrte6"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte6_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte6.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte6.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte6.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch373 -- eight chronological earlier-capture draws in three bounded runtime-CLUT epochs. +tb_top_psmct32_sh3_zint640rte8: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte8 (earlier-capture 8-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte8_params.vh"' -DSH3_SHARED_TAG='"zsrte8"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte8_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE8_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte8.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte8.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte8.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte8 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte8.vvp + +tb_top_psmct32_sh3_zint640rte8_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte8 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte8_params.vh"' -DSH3_SHARED_TAG='"zsrte8"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte8_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE8_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte8.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte8.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte8.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte8_board_compare: tb_top_psmct32_sh3_zint640rte8_trace + @test -f $(SH3_ZSRTE8_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE8_BOARD_FB)"; \ + echo "Run the earlier-capture 8-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump earlier-capture 8-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte8.vvp +FBDUMP=$(SH3_ZSRTE8_ZINT_FB) + @echo "=== compare board framebuffer vs earlier-capture 8-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE8_BOARD_FB) $(SH3_ZSRTE8_ZINT_FB) + @cmp -s $(SH3_ZSRTE8_BOARD_FB) $(SH3_ZSRTE8_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to earlier-capture 8-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from earlier-capture 8-draw zint sim"; cmp -l $(SH3_ZSRTE8_BOARD_FB) $(SH3_ZSRTE8_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed earlier-capture 8-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE8_BOARD_FB) \ + --tag zsrte8 --owner replay-color --frags $(TRACE_DIR)/zsrte8_frags.txt + +# Ch374 -- Ch373's eight-draw resident sequence followed by a second runtime palette/texture binding. +tb_top_psmct32_sh3_zint640rte11: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte11 (earlier-capture 11-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte11_params.vh"' -DSH3_SHARED_TAG='"zsrte11"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte11_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE11_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte11.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte11.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte11.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte11 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte11.vvp + +tb_top_psmct32_sh3_zint640rte11_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte11 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte11_params.vh"' -DSH3_SHARED_TAG='"zsrte11"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte11_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE11_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte11.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte11.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte11.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte11_board_compare: tb_top_psmct32_sh3_zint640rte11_trace + @test -f $(SH3_ZSRTE11_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE11_BOARD_FB)"; \ + echo "Run the earlier-capture 11-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump earlier-capture 11-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte11.vvp +FBDUMP=$(SH3_ZSRTE11_ZINT_FB) + @echo "=== compare board framebuffer vs earlier-capture 11-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE11_BOARD_FB) $(SH3_ZSRTE11_ZINT_FB) + @cmp -s $(SH3_ZSRTE11_BOARD_FB) $(SH3_ZSRTE11_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to earlier-capture 11-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from earlier-capture 11-draw zint sim"; cmp -l $(SH3_ZSRTE11_BOARD_FB) $(SH3_ZSRTE11_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed earlier-capture 11-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE11_BOARD_FB) \ + --tag zsrte11 --owner replay-color --frags $(TRACE_DIR)/zsrte11_frags.txt + +# Ch376 -- six-epoch, 17-draw extension of the second runtime palette residency chain. +tb_top_psmct32_sh3_zint640rte17: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte17 (17-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte17_params.vh"' -DSH3_SHARED_TAG='"zsrte17"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte17_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE17_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte17.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte17.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte17.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte17 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte17.vvp + +tb_top_psmct32_sh3_zint640rte17_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte17 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte17_params.vh"' -DSH3_SHARED_TAG='"zsrte17"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte17_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE17_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte17.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte17.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte17.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte17_board_compare: tb_top_psmct32_sh3_zint640rte17_trace + @test -f $(SH3_ZSRTE17_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE17_BOARD_FB)"; \ + echo "Run the 17-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump 17-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte17.vvp +FBDUMP=$(SH3_ZSRTE17_ZINT_FB) + @echo "=== compare board framebuffer vs 17-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE17_BOARD_FB) $(SH3_ZSRTE17_ZINT_FB) + @cmp -s $(SH3_ZSRTE17_BOARD_FB) $(SH3_ZSRTE17_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to 17-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from 17-draw zint sim"; cmp -l $(SH3_ZSRTE17_BOARD_FB) $(SH3_ZSRTE17_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed 17-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE17_BOARD_FB) \ + --tag zsrte17 --owner replay-color --frags $(TRACE_DIR)/zsrte17_frags.txt + +# Ch377 -- seven-epoch, 18-draw final extension of the second runtime palette residency chain. +tb_top_psmct32_sh3_zint640rte18: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte18 (18-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte18_params.vh"' -DSH3_SHARED_TAG='"zsrte18"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE18_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte18.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte18 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte18.vvp + +tb_top_psmct32_sh3_zint640rte18_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte18 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte18_params.vh"' -DSH3_SHARED_TAG='"zsrte18"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE18_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte18.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte18_board_compare: tb_top_psmct32_sh3_zint640rte18_trace + @test -f $(SH3_ZSRTE18_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE18_BOARD_FB)"; \ + echo "Run the 18-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump 18-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte18.vvp +FBDUMP=$(SH3_ZSRTE18_ZINT_FB) + @echo "=== compare board framebuffer vs 18-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE18_BOARD_FB) $(SH3_ZSRTE18_ZINT_FB) + @cmp -s $(SH3_ZSRTE18_BOARD_FB) $(SH3_ZSRTE18_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to 18-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from 18-draw zint sim"; cmp -l $(SH3_ZSRTE18_BOARD_FB) $(SH3_ZSRTE18_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed 18-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE18_BOARD_FB) \ + --tag zsrte18 --owner replay-color --frags $(TRACE_DIR)/zsrte18_frags.txt + +# Ch378 -- third runtime texture/CLUT binding, retained as a frame-pure fixture. +tb_top_psmct32_sh3_zint640rte19: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte19 (19-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte19_params.vh"' -DSH3_SHARED_TAG='"zsrte19"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte19_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE19_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte19.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte19.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte19.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte19 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte19.vvp + +tb_top_psmct32_sh3_zint640rte19_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte19 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte19_params.vh"' -DSH3_SHARED_TAG='"zsrte19"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte19_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE19_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte19.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte19.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte19.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +sh3_zsrte19_board_compare: tb_top_psmct32_sh3_zint640rte19_trace + @test -f $(SH3_ZSRTE19_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZSRTE19_BOARD_FB)"; \ + echo "Run the 19-draw board scene with --dump-fb and copy it here first."; exit 1) + @echo "=== dump 19-draw zint sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte19.vvp +FBDUMP=$(SH3_ZSRTE19_ZINT_FB) + @echo "=== compare board framebuffer vs 19-draw zint sim framebuffer ===" + @sha256sum $(SH3_ZSRTE19_BOARD_FB) $(SH3_ZSRTE19_ZINT_FB) + @cmp -s $(SH3_ZSRTE19_BOARD_FB) $(SH3_ZSRTE19_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to 19-draw zint sim" || \ + (echo "FAIL: board framebuffer differs from 19-draw zint sim"; cmp -l $(SH3_ZSRTE19_BOARD_FB) $(SH3_ZSRTE19_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed 19-draw fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZSRTE19_BOARD_FB) \ + --tag zsrte19 --owner replay-color --frags $(TRACE_DIR)/zsrte19_frags.txt + +# Ch379 -- deepen the third runtime texture/CLUT binding with the next frame-pure draw cluster. +tb_top_psmct32_sh3_zint640rte22: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte22 (22-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte22_params.vh"' -DSH3_SHARED_TAG='"zsrte22"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte22_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE22_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte22.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte22.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte22.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640rte22 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte22.vvp + +tb_top_psmct32_sh3_zint640rte22_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte22 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte22_params.vh"' -DSH3_SHARED_TAG='"zsrte22"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte22_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE22_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte22.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte22.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte22.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte25: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte25 (25-draw runtime-CLUT integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte25_params.vh"' -DSH3_SHARED_TAG='"zsrte25"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte25_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE25_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte25.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte25.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte25.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte25.vvp + +tb_top_psmct32_sh3_zint640rte25_trace: dirs + @echo "=== build tb_top_psmct32_sh3_zint640rte25 trace variant ===" + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte25_params.vh"' -DSH3_SHARED_TAG='"zsrte25"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte25_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE25_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte25.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte25.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte25.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte28: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte28_params.vh"' -DSH3_SHARED_TAG='"zsrte28"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE28_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte28.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte28.vvp + +tb_top_psmct32_sh3_zint640rte28_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte28_params.vh"' -DSH3_SHARED_TAG='"zsrte28"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE28_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte28.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte31: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte31_params.vh"' -DSH3_SHARED_TAG='"zsrte31"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte31_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE31_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte31.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte31.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte31.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte31.vvp + +tb_top_psmct32_sh3_zint640rte31_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte31_params.vh"' -DSH3_SHARED_TAG='"zsrte31"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte31_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE31_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte31.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte31.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte31.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte34: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte34_params.vh"' -DSH3_SHARED_TAG='"zsrte34"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte34_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE34_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte34.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte34.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte34.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte34.vvp + +tb_top_psmct32_sh3_zint640rte34_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte34_params.vh"' -DSH3_SHARED_TAG='"zsrte34"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte34_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE34_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte34.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte34.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte34.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte43: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte43_params.vh"' -DSH3_SHARED_TAG='"zsrte43"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte43_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE43_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte43.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte43.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte43.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte43.vvp + +tb_top_psmct32_sh3_zint640rte43_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte43_params.vh"' -DSH3_SHARED_TAG='"zsrte43"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte43_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE43_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte43.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte43.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte43.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rte45: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte45_params.vh"' -DSH3_SHARED_TAG='"zsrte45"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte45_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE45_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte45.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte45.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte45.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte45.vvp + +tb_top_psmct32_sh3_zint640rte45_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrte45_params.vh"' -DSH3_SHARED_TAG='"zsrte45"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrte45_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTE45_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrte45.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrte45.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rte45.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3e18: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3e18_params.vh"' -DSH3_SHARED_TAG='"zsrtf3e18"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3e18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3E18_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3e18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3e18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e18.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e18.vvp + +tb_top_psmct32_sh3_zint640rtf3e18_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3e18_params.vh"' -DSH3_SHARED_TAG='"zsrtf3e18"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3e18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3E18_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3e18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3e18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e18.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3e30: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3e30_params.vh"' -DSH3_SHARED_TAG='"zsrtf3e30"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3e30_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3E30_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3e30.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3e30.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e30.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e30.vvp + +tb_top_psmct32_sh3_zint640rtf3e30_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3e30_params.vh"' -DSH3_SHARED_TAG='"zsrtf3e30"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3e30_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3E30_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3e30.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3e30.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3e30.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c30: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c30_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c30"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c30_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C30_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c30.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c30.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c30.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c30.vvp + +tb_top_psmct32_sh3_zint640rtf3c30_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c30_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c30"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c30_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C30_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c30.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c30.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c30.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c34: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c34_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c34"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c34_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C34_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c34.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c34.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c34.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c34.vvp + +tb_top_psmct32_sh3_zint640rtf3c34_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c34_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c34"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c34_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C34_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c34.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c34.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c34.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c41: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c41_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c41"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c41_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C41_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c41.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c41.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c41.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c41.vvp + +tb_top_psmct32_sh3_zint640rtf3c41_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c41_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c41"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c41_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C41_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c41.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c41.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c41.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c49: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c49_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c49"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c49_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C49_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c49.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c49.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c49.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c49.vvp + +tb_top_psmct32_sh3_zint640rtf3c49_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrtf3c49_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c49"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c49_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C49_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c49.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c49.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c49.vvp -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c57: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrtf3c57_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c57"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c57_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C57_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c57.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c57.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57.vvp + +tb_top_psmct32_sh3_zint640rtf3c57_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrtf3c57_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c57"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c57_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C57_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c57.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c57.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rtf3c57x: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrtf3c57x_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c57x"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c57x_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C57X_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c57x.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c57x.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57x.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57x.vvp + +tb_top_psmct32_sh3_zint640rtf3c57x_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrtf3c57x_params.vh"' -DSH3_SHARED_TAG='"zsrtf3c57x"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrtf3c57x_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRTF3C57X_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrtf3c57x.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrtf3c57x.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rtf3c57x.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch394 — 224139 (the PCSX2 rabbit/bench capture) aligned baseline. This is +# deliberately an opaque/state-coverage rung: it establishes comparable image A +# before the separately-scoped blended pass. +tb_top_psmct32_sh3_zint640rt139o6: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139o6_params.vh"' -DSH3_SHARED_TAG='"zsrt139o6"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139o6_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139O6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139o6.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139o6.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139o6.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139o6.vvp + +tb_top_psmct32_sh3_zint640rt139o6_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139o6_params.vh"' -DSH3_SHARED_TAG='"zsrt139o6"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139o6_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139O6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139o6.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139o6.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139o6.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rt139a1: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a1_params.vh"' -DSH3_SHARED_TAG='"zsrt139a1"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a1_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A1_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a1.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a1.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a1.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a1.vvp + +tb_top_psmct32_sh3_zint640rt139a1_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a1_params.vh"' -DSH3_SHARED_TAG='"zsrt139a1"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a1_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A1_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a1.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a1.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a1.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +tb_top_psmct32_sh3_zint640rt139a2: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a2_params.vh"' -DSH3_SHARED_TAG='"zsrt139a2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a2.vvp + +tb_top_psmct32_sh3_zint640rt139a2_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a2_params.vh"' -DSH3_SHARED_TAG='"zsrt139a2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch397 — authentic ABE=1 PSMT8 triangle epoch through LPDDR destination blending. +SH3_ZSRT139A3_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a3: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a3_params.vh"' -DSH3_SHARED_TAG='"zsrt139a3"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a3_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A3_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a3.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a3.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a3.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a3.vvp + +tb_top_psmct32_sh3_zint640rt139a3_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a3_params.vh"' -DSH3_SHARED_TAG='"zsrt139a3"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a3_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A3_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a3.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a3.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a3_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch398 — six authentic ABE draws split into three staging-safe ordered epochs. +SH3_ZSRT139A4_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a4: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a4_params.vh"' -DSH3_SHARED_TAG='"zsrt139a4"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a4_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A4_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a4.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a4.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a4.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a4.vvp + +tb_top_psmct32_sh3_zint640rt139a4_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a4_params.vh"' -DSH3_SHARED_TAG='"zsrt139a4"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a4_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A4_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a4.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a4.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a4_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch399 — full first in-bounds alpha family: 40 ABE draws in 14 ordered groups. +SH3_ZSRT139A5_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a5: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a5_params.vh"' -DSH3_SHARED_TAG='"zsrt139a5"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a5_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A5_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a5.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a5.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a5.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a5.vvp + +tb_top_psmct32_sh3_zint640rt139a5_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a5_params.vh"' -DSH3_SHARED_TAG='"zsrt139a5"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a5_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A5_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a5.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a5.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a5_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch400 — chronological in-bounds base geometry followed by a bounded ABE tail. +SH3_ZSRT139A6_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a6: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a6_params.vh"' -DSH3_SHARED_TAG='"zsrt139a6"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a6_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a6.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a6.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a6.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a6.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139a6_sim_fb.mem + +tb_top_psmct32_sh3_zint640rt139a6_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a6_params.vh"' -DSH3_SHARED_TAG='"zsrt139a6"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a6_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a6.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a6.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a6_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch401 — a6 chronological base plus high-coverage later-scene anchors and the +# proven 24-draw central cluster: 56 authentic draws in 28 bounded epochs. +SH3_ZSRT139A7_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a7: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a7_params.vh"' -DSH3_SHARED_TAG='"zsrt139a7"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a7_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A7_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a7.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a7.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a7.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a7.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139a7_sim_fb.mem + +tb_top_psmct32_sh3_zint640rt139a7_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a7_params.vh"' -DSH3_SHARED_TAG='"zsrt139a7"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a7_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A7_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a7.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a7.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a7_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch402 — Ch401 plus twelve authentic single-draw character epochs. The +# optional CLAMP header carries normalized full-texture region-clamp state; +# splitting the character family retains the accepted 2048-word staging RAM. +SH3_ZSRT139A8_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a8: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a8_params.vh"' -DSH3_SHARED_TAG='"zsrt139a8"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a8_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A8_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a8.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a8.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a8.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a8.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139a8_sim_fb.mem + +tb_top_psmct32_sh3_zint640rt139a8_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a8_params.vh"' -DSH3_SHARED_TAG='"zsrt139a8"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a8_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A8_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a8.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a8.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a8_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch403 — Ch402 geometry with authentic vertex RGB and TEX0.TFX=MODULATE. +SH3_ZSRT139A9_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139a9: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a9_params.vh"' -DSH3_SHARED_TAG='"zsrt139a9"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a9_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A9_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a9.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a9.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a9.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a9.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139a9_sim_fb.mem + +tb_top_psmct32_sh3_zint640rt139a9_trace: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139a9_params.vh"' -DSH3_SHARED_TAG='"zsrt139a9"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139a9_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139A9_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SHARED_TRACE -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139a9.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139a9.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139a9_trace.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + +# Ch404 — accepted Ch403 40-epoch base plus 35 chronological character-detail epochs. +SH3_ZSRT139B2_REQ_DEPTH ?= 4096 +tb_top_psmct32_sh3_zint640rt139b2: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139b2_params.vh"' -DSH3_SHARED_TAG='"zsrt139b2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139b2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139B2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139b2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139b2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139b2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139b2.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139b2_sim_fb.mem + +# Ch405 — Ch404 opaque base plus three authentic Z-read-only alpha-fan epochs. +SH3_ZSRT139C2_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139c2: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139c2_params.vh"' -DSH3_SHARED_TAG='"zsrt139c2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139c2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139C2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139c2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139c2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139c2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139c2.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139c2_sim_fb.mem + +# Ch405 bounded-burst production fixture: 75 accepted opaque epochs plus 212 +# one-triangle alpha epochs. 16K covers the measured 14,752-pixel worst case. +SH3_ZSRT139C4_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139c4: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139c4_params.vh"' -DSH3_SHARED_TAG='"zsrt139c4"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139c4_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139C4_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139c4.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139c4.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139c4.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139c4.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139c4_sim_fb.mem + +# Ch407 chronological continuation: accepted 287-epoch Ch405 scene plus the +# remaining 35 supported PSMT8 alpha fans, clipped from the authentic GS guard +# band into 167 one-triangle epochs. Existing Ch406 core; no RTL change. +SH3_ZSRT139D2_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139d2: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139d2_params.vh"' -DSH3_SHARED_TAG='"zsrt139d2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139d2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139D2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139d2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139d2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d2.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139d2_sim_fb.mem + +# Ch407 capacity-safe continuation: the 287-epoch accepted base plus 35 +# chronological PSMT8 alpha fans, guard-band clipped and ordered into 187 +# epochs capped at 14,500 packed fragments (474 total). Existing Ch406 core. +SH3_ZSRT139D4_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139d4: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139d4_params.vh"' -DSH3_SHARED_TAG='"zsrt139d4"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139d4_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139D4_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139d4.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139d4.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d4.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d4.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139d4_sim_fb.mem + +# Ch407 authentic-SCISSOR correction of D4: x[0..511], y[0..511] +# intersects the 640x480 target as 512x480 (434 total epochs). +SH3_ZSRT139D6_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139d6: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139d6_params.vh"' -DSH3_SHARED_TAG='"zsrt139d6"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139d6_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139D6_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139d6.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139d6.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d6.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139d6.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139d6_sim_fb.mem + +# Ch408 authentic 16-sprite PSMT4 darkening overlay appended to D6. The +# sprites are FST->triangle converted and capacity-packed into 18 epochs. +SH3_ZSRT139E2_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139e2: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139e2_params.vh"' -DSH3_SHARED_TAG='"zsrt139e2"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139e2_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139E2_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139e2.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139e2.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139e2.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139e2.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139e2_sim_fb.mem + +# Ch415 authentic vertex-fog fold plus perspective palette-bilinear filtering. +# The shared harness enables the serialized four-tap sampler and dumps the +# resulting full 640x480 framebuffer for direct PCSX2 comparison. +SH3_ZSRT139F16_REQ_DEPTH ?= 16384 +SH3_ZSRT139F16_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f16: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139f16_params.vh"' -DSH3_SHARED_TAG='"zsrt139f16"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f16_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F16_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f16.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f16.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139f16.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139f16.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f16_sim_fb.mem $(SH3_ZSRT139F16_VVP_ARGS) + +# Ch416 native 12.4 smoke fixture: three authentic draws with fractional XYZ +# bits preserved, exercising the opt-in pixel-center coverage path end to end. +tb_top_psmct32_sh3_zint640zspxy3: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zspxy3_params.vh"' -DSH3_SHARED_TAG='"zspxy3"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zspxy3_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=16384 -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zspxy3.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zspxy3.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640zspxy3.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640zspxy3.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zspxy3_sim_fb.mem + +# Ch416 full chronological scene with captured XYZ 12.4 fractions retained. +# Attribute gradients remain on the proven integer basis in this first cut; +# coverage uses the native vertices and GS pixel-center sampling. +SH3_ZSRT139F17_REQ_DEPTH ?= 16384 +SH3_ZSRT139F17_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f17: dirs + $(IVERILOG) $(IVERILOG_FLGS) -I$(SIM_DIR)/data/top_psmct32_raster_demo -DSH3_SHARED_PARAMS='"sh3_zsrt139f17_params.vh"' -DSH3_SHARED_TAG='"zsrt139f17"' -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f17_epoch_table.vh"' -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F17_REQ_DEPTH) -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_FAST_GRAD -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f17.mem"' -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f17.mem"' -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139f17.vvp -s tb_top_psmct32_sh3_zint640_shared $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640rt139f17.vvp +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f17_sim_fb.mem $(SH3_ZSRT139F17_VVP_ARGS) + +# Ch417 pre-fit production-control gate. Verilator keeps the 263-epoch run +# practical while SH3_BOARD_GRAD exercises the exact DE25 combinational divider +# selection and five-cycle settle FSM. The resulting framebuffer must hash +# identically to the one-cycle arithmetic/reference run above. +tb_top_psmct32_sh3_zint640rt139f17_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f17_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f17"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f17_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F17_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f17.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f17.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch417_boardgrad -o ch417_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch417_boardgrad/ch417_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f17_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F17_VVP_ARGS) + +# Ch419 convergence gate: the accepted 263-epoch Ch417 scene followed by the +# 20-epoch rabbit/bench completion tail. This also exercises the production +# registered request-RAM read and registered read-arbiter release timing cuts. +SH3_ZSRT139F18_REQ_DEPTH ?= 16384 +SH3_ZSRT139F18_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f18_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f18_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f18"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F18_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f18.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch419_boardgrad -o ch419_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch419_boardgrad/ch419_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f18_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F18_VVP_ARGS) + +# Ch424 fidelity repair: retain the complete 766-draw Ch415 grouped scene +# while using native 12.4 coverage and the production registered gradient +# path. Ch416 accidentally regenerated from only the 113 surviving group +# representatives; this target proves the repaired population end to end. +SH3_ZSRT139F19_REQ_DEPTH ?= 16384 +SH3_ZSRT139F19_VVP_ARGS ?= +SH3_ZSRT139F19_FBDUMP ?= ../../data/top_psmct32_raster_demo/sh3_zsrt139f19_boardgrad_sim_fb.mem +tb_top_psmct32_sh3_zint640rt139f19_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f19_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f19"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f19_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F19_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f19.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f19.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch424_boardgrad -o ch424_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch424_boardgrad/ch424_boardgrad_vlt \ + +FBDUMP=$(SH3_ZSRT139F19_FBDUMP) \ + $(SH3_ZSRT139F19_VVP_ARGS) + +# Ch433 precision recheck: now that Ch432 restores the missing perspective +# samples, remeasure the f19 scene with a 13-bit reciprocal table. The earlier +# Ch427 A/B ran through the half-population sampler and could not establish the +# post-repair precision return. +tb_top_psmct32_sh3_zint640rt139f19_recip13_ch433_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f19_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f19"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f19_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F19_REQ_DEPTH) \ + -DSH3_SHARED_RECIP_BITS=13 \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f19.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f19.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch433_f19_recip13_boardgrad -o ch433_f19_recip13_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch433_f19_recip13_boardgrad/ch433_f19_recip13_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f19_recip13_ch433_boardgrad_sim_fb.mem + +# Ch433 filter isolation: unchanged post-Ch432 f19 geometry and reciprocal, +# but nearest indexed sampling. This distinguishes UV/interpolation error +# from a four-tap sampler alignment error before any new RTL is proposed. +tb_top_psmct32_sh3_zint640rt139f19_nearest_ch433_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f19_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f19"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f19_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F19_REQ_DEPTH) \ + -DSH3_SHARED_NO_BILINEAR \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f19.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f19.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch433_f19_nearest_boardgrad -o ch433_f19_nearest_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch433_f19_nearest_boardgrad/ch433_f19_nearest_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f19_nearest_ch433_boardgrad_sim_fb.mem + +# Ch433 fixture-precision isolation: the exact f19 draw population, grouping, +# native 12.4 geometry, and feature set, with the generator's per-triangle UV +# error optimizer replacing --fast-fit-scale. This changes staging STQ only; +# the production RTL remains identical to the accepted Ch432 board image. +SH3_ZSRT139F43_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f43_uvopt_ch433_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f43_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f43"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f43_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F43_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f43.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f43.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch433_f43_uvopt_boardgrad -o ch433_f43_uvopt_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch433_f43_uvopt_boardgrad/ch433_f43_uvopt_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f43_uvopt_ch433_boardgrad_sim_fb.mem + +# Ch425 fidelity candidate: the repaired full scene followed in capture order +# by the authentic CT32 darken, PSMT8 alpha-fan, and PSMT4 postprocess passes. +SH3_ZSRT139F20_REQ_DEPTH ?= 16384 +SH3_ZSRT139F20_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f20_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f20_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f20"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f20_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F20_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f20.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f20.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch425_boardgrad -o ch425_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch425_boardgrad/ch425_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f20_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F20_VVP_ARGS) + +# Ch425 postprocess isolation: retain the accepted Ch424 scene and append only +# the authentic PSMT4 tail. The CT32 darken and PSMT8 alpha-fan candidates are +# deliberately absent after their independent fidelity gates regressed. +SH3_ZSRT139F21_REQ_DEPTH ?= 16384 +SH3_ZSRT139F21_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f21_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f21_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f21"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f21_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F21_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f21.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f21.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch425_psmt4_boardgrad -o ch425_psmt4_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch425_psmt4_boardgrad/ch425_psmt4_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f21_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F21_VVP_ARGS) + +# Ch426 fidelity repair: Ch424 scene + authentic CT32 darken + regenerated +# alpha fans whose captured RGBAQ.A is preserved (the legacy generator forced +# A=ff and made the additive fog catastrophically white). +SH3_ZSRT139F23_REQ_DEPTH ?= 16384 +SH3_ZSRT139F23_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f23_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f23_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f23"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f23_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F23_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f23.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f23.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch426_boardgrad -o ch426_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch426_boardgrad/ch426_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f23_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F23_VVP_ARGS) + +# Ch426 controlled A/B: repaired alpha directly after Ch424, omitting the +# reconstructed CT32 intermediate darken to measure that pass independently. +SH3_ZSRT139F24_REQ_DEPTH ?= 16384 +SH3_ZSRT139F24_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f24_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f24_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F24_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f24.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch426_nodarken_boardgrad -o ch426_nodarken_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch426_nodarken_boardgrad/ch426_nodarken_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f24_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F24_VVP_ARGS) + +# Ch427 diagnostic: identical accepted Ch426 fixture with a 13-bit reciprocal +# mantissa (11-bit production baseline) to measure the practical precision +# ceiling before spending a Quartus compile or scarce RAM blocks. +tb_top_psmct32_sh3_zint640rt139f23_recip13_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f23_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f23"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f23_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F23_REQ_DEPTH) \ + -DSH3_SHARED_RECIP_BITS=13 \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f23.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f23.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch427_recip13_boardgrad -o ch427_recip13_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch427_recip13_boardgrad/ch427_recip13_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f23_recip13_boardgrad_sim_fb.mem + +# Ch427 completeness candidate: Ch424 + CT32 + all 93 captured PSMT8 alpha +# fans (408 bounded triangle epochs), using the repaired authentic RGBAQ.A. +SH3_ZSRT139F26_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f26_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f26_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f26"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f26_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F26_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f26.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f26.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch427_allalpha_boardgrad -o ch427_allalpha_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch427_allalpha_boardgrad/ch427_allalpha_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f26_boardgrad_sim_fb.mem + +# Ch427 operational all-alpha candidate: same 93 captured fans as f26, packed +# into 129 ordered epochs under the proven 14,500-fragment burst ceiling. +SH3_ZSRT139F28_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f28_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f28_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f28"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F28_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f28.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch427_allalpha_cap_boardgrad -o ch427_allalpha_cap_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch427_allalpha_cap_boardgrad/ch427_allalpha_cap_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f28_boardgrad_sim_fb.mem + +# Ch428 fidelity candidate: the complete opaque PSMT8 strip scene with the 70 +# captured ABE strip draws restored at their true chronological positions, +# followed by the accepted CT32 darken and complete authentic-alpha tail. +SH3_ZSRT139F30_REQ_DEPTH ?= 16384 +SH3_ZSRT139F30_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f30_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f30_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f30"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f30_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F30_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f30.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f30.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch428_fullabe_boardgrad -o ch428_fullabe_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch428_fullabe_boardgrad/ch428_fullabe_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f30_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F30_VVP_ARGS) + +# Ch428 controlled 256-logical-texture candidate: accepted Ch427 base with the +# 240 captured ABE triangle-list draws inserted before the final three opaque +# scene draws. The rejected interleaved-strip A/B is deliberately absent. +SH3_ZSRT139F33_REQ_DEPTH ?= 16384 +SH3_ZSRT139F33_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f33_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f33_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f33"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f33_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F33_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f33.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f33.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch428_tri256_boardgrad -o ch428_tri256_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch428_tri256_boardgrad/ch428_tri256_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f33_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F33_VVP_ARGS) + +# Ch429 first chronology-correct PSMT4 post-process A/B: append the captured +# 16-sprite tiled overlay after the complete, accepted f33 scene/CT32/alpha +# chain. Ch425's PSMT4-only isolation lacked those prerequisite passes. +SH3_ZSRT139F34_REQ_DEPTH ?= 16384 +SH3_ZSRT139F34_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f34_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f34_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f34"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f34_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F34_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f34.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f34.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch429_psmt4_boardgrad -o ch429_psmt4_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch429_psmt4_boardgrad/ch429_psmt4_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f34_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F34_VVP_ARGS) + +# Ch429 native PSMT4 character recovery: insert the 19 captured 512x1024 +# opaque strips before the logical-256 triangle family and final opaque tail. +SH3_ZSRT139F36_REQ_DEPTH ?= 16384 +SH3_ZSRT139F36_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f36_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f36_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f36"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f36_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F36_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f36.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f36.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch429_character4_boardgrad -o ch429_character4_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch429_character4_boardgrad/ch429_character4_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f36_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F36_VVP_ARGS) + +# Ch430 late-frame sprite recovery: append the three authentic PSMT8 sprites +# at idx198700/198710/198720 after the complete alpha tail. The 128x128 +# logical tile remains in the proven physical 512-wide cache window. +SH3_ZSRT139F38_REQ_DEPTH ?= 16384 +SH3_ZSRT139F38_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f38_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f38_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f38"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f38_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F38_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f38.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f38.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch430_sprite128_boardgrad -o ch430_sprite128_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch430_sprite128_boardgrad/ch430_sprite128_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f38_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F38_VVP_ARGS) + +# Ch430 operational sprite candidate: identical captured sprites, but bounded +# to 6,000 estimated samples per epoch after the 14,500-sample candidate +# exceeded the production harness's fresh-drain deadline. +SH3_ZSRT139F40_REQ_DEPTH ?= 16384 +SH3_ZSRT139F40_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f40_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f40_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f40"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f40_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F40_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f40.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f40.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch430_sprite128_cap_boardgrad -o ch430_sprite128_cap_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch430_sprite128_cap_boardgrad/ch430_sprite128_cap_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f40_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F40_VVP_ARGS) + +# Ch431 direct-color character highlights: restore the two authentic 64x64 +# PSMCT32 ABE strips at their exact positions around the PSMT4 body epochs. +SH3_ZSRT139F42_REQ_DEPTH ?= 16384 +SH3_ZSRT139F42_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f42_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f42_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f42"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f42_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F42_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f42.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f42.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch431_ct32_highlights_boardgrad -o ch431_ct32_highlights_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch431_ct32_highlights_boardgrad/ch431_ct32_highlights_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f42_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F42_VVP_ARGS) + +# Ch432 perspective-bilinear handshake repair: replay the unchanged accepted +# f42 composition through RTL that holds the raster walker on the sampler +# launch cycle. A separate object directory and dump preserve the Ch431 +# baseline for direct before/after scoring. +SH3_ZSRT139F42_CH432_REQ_DEPTH ?= 16384 +SH3_ZSRT139F42_CH432_VVP_ARGS ?= +tb_top_psmct32_sh3_zint640rt139f42_ch432_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f42_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f42"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f42_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F42_CH432_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f42.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f42.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch432_persp_bili_hold_boardgrad -o ch432_persp_bili_hold_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch432_persp_bili_hold_boardgrad/ch432_persp_bili_hold_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f42_ch432_boardgrad_sim_fb.mem \ + $(SH3_ZSRT139F42_CH432_VVP_ARGS) + +# Ch433 complete composition: replace f42's fast-fit f19 base slices with the +# UV-error-optimized f43 slices while preserving every chronology-correct +# PSMT4/direct-color character and alpha/postprocess epoch. +SH3_ZSRT139F44_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f44_uvopt_ch433_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f44_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f44"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f44_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F44_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f44.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f44.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch433_f44_uvopt_boardgrad -o ch433_f44_uvopt_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch433_f44_uvopt_boardgrad/ch433_f44_uvopt_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f44_uvopt_ch433_boardgrad_sim_fb.mem + +# Ch439 production capacity/timing proof. The complete 311-epoch f52 scene +# measured a 6,115-entry request-FIFO high-water mark. Exercise the shipping +# 8K depth (2,077 entries / 34% measured headroom) through the complete replay. +SH3_ZSRT139F52_REQ_DEPTH ?= 8192 +tb_top_psmct32_sh3_zint640rt139f52_ch439_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f52_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f52"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f52_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F52_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f52.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f52.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch439_zsrt139f52_boardgrad -o ch439_zsrt139f52_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch439_zsrt139f52_boardgrad/ch439_zsrt139f52_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439_8k_sim_fb.mem + +# Ch434 diagnostic: the previously omitted authentic TME=0 alpha-lit fan and +# triangle family. It runs on the unchanged Ch432/433 raster fabric; the +# fixture alone exposes captured Gouraud color plus destination blending. +SH3_ZSRT139F45_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f45_untextured_ch434_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f45_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f45"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f45_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F45_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f45.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f45.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch434_f45_untextured_boardgrad -o ch434_f45_untextured_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch434_f45_untextured_boardgrad/ch434_f45_untextured_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f45_untextured_ch434_boardgrad_sim_fb.mem + +# Ch434 production candidate: insert f45's recovered untextured lighting +# geometry after the last pre-177k scene draw and before the existing CT32 +# darken/postprocess and textured-alpha tail. +SH3_ZSRT139F46_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139f46_untextured_ch434_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139f46_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139f46"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139f46_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139F46_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139f46.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139f46.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch434_f46_untextured_boardgrad -o ch434_f46_untextured_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch434_f46_untextured_boardgrad/ch434_f46_untextured_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139f46_untextured_ch434_boardgrad_sim_fb.mem + +# Ch434 offscreen-light reconstruction stage: build the accepted scene Z, +# clear a 256x256 neutral-gray color target, apply the Z-tested additive and +# subtractive light volumes, then remove the neutral bias. The upper-left +# 256x256 result is the authentic PSMCT16 light-buffer source (represented in +# expanded CT32 lanes for staged static-frame reconstruction). +SH3_ZSRT139L2_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_zint640rt139l2_lightbuf_ch434_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zsrt139l2_params.vh"' \ + -DSH3_SHARED_TAG='"zsrt139l2"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zsrt139l2_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(SH3_ZSRT139L2_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zsrt139l2.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zsrt139l2.mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch434_l2_lightbuf_boardgrad -o ch434_l2_lightbuf_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch434_l2_lightbuf_boardgrad/ch434_l2_lightbuf_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/sh3_zsrt139l2_lightbuf_ch434_boardgrad_sim_fb.mem + +# Ch434 small offscreen reconstruction stages. Override CH434_STAGE_TAG and +# CH434_STAGE_OUT for each captured ping-pong sprite pass. +CH434_STAGE_TAG ?= zsrt139l3 +CH434_STAGE_OUT ?= sh3_$(CH434_STAGE_TAG)_ch434_boardgrad_sim_fb.mem +CH434_STAGE_REQ_DEPTH ?= 16384 +tb_top_psmct32_sh3_ch434_stage_boardgrad_vlt: dirs + $(VERILATOR) --binary --timing --bbox-unsup -Wno-fatal \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_$(CH434_STAGE_TAG)_params.vh"' \ + -DSH3_SHARED_TAG='"$(CH434_STAGE_TAG)"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_$(CH434_STAGE_TAG)_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=$(CH434_STAGE_REQ_DEPTH) \ + -DSH3_SHARED_RUNTIME_CLUT -DSH3_SUBPIXEL_XY -DSH3_BOARD_GRAD \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_$(CH434_STAGE_TAG).mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_$(CH434_STAGE_TAG).mem"' \ + --top-module tb_top_psmct32_sh3_zint640_shared \ + --Mdir $(BUILD_DIR)/obj_ch434_$(CH434_STAGE_TAG)_boardgrad -o ch434_$(CH434_STAGE_TAG)_boardgrad_vlt \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @cd $(TRACE_DIR) && $(BUILD_DIR)/obj_ch434_$(CH434_STAGE_TAG)_boardgrad/ch434_$(CH434_STAGE_TAG)_boardgrad_vlt \ + +FBDUMP=../../data/top_psmct32_raster_demo/$(CH434_STAGE_OUT) + +# Ch360 — four-epoch shared-texture residency expansion. C12 uses the same bootlet words as C6; these are +# simulation gates first, to measure the request-FIFO high-water before any board run. +tb_top_psmct32_sh3_zs640c12_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640c12_cap (Ch360 4-epoch shared-texture capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c12.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c12.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c12_cap.vvp \ + -s tb_top_psmct32_sh3_zs640c12_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640c12_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640c12_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c12_cap.vvp + +tb_top_psmct32_sh3_zint640c12: dirs + @echo "=== build tb_top_psmct32_sh3_zint640c12 (Ch360 4-epoch real-raster Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c12.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c12.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c12.vvp \ + -s tb_top_psmct32_sh3_zint640c12 \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640c12.sv + @echo "=== run tb_top_psmct32_sh3_zint640c12 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c12.vvp + +# Shared-epoch harness smoke gate. It must reproduce the already-closed C12 fixture before it is used to +# generate the next draw-count rung. The generated params header supplies N_EPOCHS and the descriptor lookup helpers. +tb_top_psmct32_sh3_zs640_shared_c12_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640_shared_c12_cap (shared-harness C12 equivalence) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c12_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c12"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c12_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c12.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c12.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640_shared_c12_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640_shared_c12_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640_shared_c12_cap.vvp + +tb_top_psmct32_sh3_zint640_shared_c12: dirs + @echo "=== build tb_top_psmct32_sh3_zint640_shared_c12 (shared-harness C12 Z equivalence) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c12_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c12"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c12_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c12.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c12.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640_shared_c12.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640_shared_c12 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640_shared_c12.vvp + +tb_top_psmct32_sh3_zs640c18_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640c18_cap (Ch361 shared-harness capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c18_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c18"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c18_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c18_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640c18_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c18_cap.vvp + +tb_top_psmct32_sh3_zint640c18: dirs + @echo "=== build tb_top_psmct32_sh3_zint640c18 (Ch361 shared-harness Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c18_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c18"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c18_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c18.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c18.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c18.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640c18 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c18.vvp + +tb_top_psmct32_sh3_zs640c24_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640c24_cap (Ch362 shared-harness capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c24_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c24_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c24_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640c24_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c24_cap.vvp + +tb_top_psmct32_sh3_zint640c24: dirs + @echo "=== build tb_top_psmct32_sh3_zint640c24 (Ch362 shared-harness Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c24_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640c24 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c24.vvp + +tb_top_psmct32_sh3_zs640mt5_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640mt5_cap (Ch363 multi-texture capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640mt5_params.vh"' \ + -DSH3_SHARED_TAG='"zs640mt5"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640mt5_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640mt5.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640mt5.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640mt5_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640mt5_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640mt5_cap.vvp + +tb_top_psmct32_sh3_zint640mt5: dirs + @echo "=== build tb_top_psmct32_sh3_zint640mt5 (Ch363 multi-texture Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640mt5_params.vh"' \ + -DSH3_SHARED_TAG='"zs640mt5"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640mt5_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640mt5.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640mt5.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640mt5.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640mt5 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640mt5.vvp + +tb_top_psmct32_sh3_zs640m28_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640m28_cap (Ch364 mixed-residency capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640m28_params.vh"' \ + -DSH3_SHARED_TAG='"zs640m28"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640m28_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640m28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640m28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640m28_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640m28_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640m28_cap.vvp + +tb_top_psmct32_sh3_zint640m28: dirs + @echo "=== build tb_top_psmct32_sh3_zint640m28 (Ch364 mixed-residency Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640m28_params.vh"' \ + -DSH3_SHARED_TAG='"zs640m28"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640m28_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640m28.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640m28.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640m28.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640m28 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640m28.vvp + +tb_top_psmct32_sh3_zs640b24_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640b24_cap (Ch365 frame-B capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640b24_params.vh"' \ + -DSH3_SHARED_TAG='"zs640b24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640b24_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640b24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640b24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640b24_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640b24_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640b24_cap.vvp + +tb_top_psmct32_sh3_zint640b24: dirs + @echo "=== build tb_top_psmct32_sh3_zint640b24 (Ch365 frame-B Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640b24_params.vh"' \ + -DSH3_SHARED_TAG='"zs640b24"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640b24_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640b24.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640b24.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640b24.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640b24 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640b24.vvp + +tb_top_psmct32_sh3_zs640c24c_cap: dirs + @echo "=== build tb_top_psmct32_sh3_zs640c24c_cap (Ch366 frame-C capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c24c_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c24c"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c24c_epoch_table.vh"' \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c24c.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c24c.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c24c_cap.vvp \ + -s tb_top_psmct32_sh3_zs640_shared_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zs640_shared_cap.sv + @echo "=== run tb_top_psmct32_sh3_zs640c24c_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zs640c24c_cap.vvp + +tb_top_psmct32_sh3_zint640c24c: dirs + @echo "=== build tb_top_psmct32_sh3_zint640c24c (Ch366 frame-C Z integration) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DSH3_SHARED_PARAMS='"sh3_zs640c24c_params.vh"' \ + -DSH3_SHARED_TAG='"zs640c24c"' \ + -DSH3_SHARED_EPOCH_TABLE='"sh3_zs640c24c_epoch_table.vh"' \ + -DSH3_SHARED_REQ_DEPTH=1024 \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_zs640c24c.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_zs640c24c.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c24c.vvp \ + -s tb_top_psmct32_sh3_zint640_shared \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_zint640_shared.sv + @echo "=== run tb_top_psmct32_sh3_zint640c24c ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c24c.vvp + +sh3_zs640b24_board_compare: + @test -f $(SH3_ZS640B24_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640B24_BOARD_FB)"; \ + echo "Run the motion board sequence with --dump-fb and copy its final B framebuffer here first."; exit 1) + @test -x $(BUILD_DIR)/tb_top_psmct32_sh3_zint640b24.vvp || \ + (echo "MISSING: $(BUILD_DIR)/tb_top_psmct32_sh3_zint640b24.vvp"; \ + echo "Run: make -C sim tb_top_psmct32_sh3_zint640b24"; exit 1) + @echo "=== dump zint640b24 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640b24.vvp +FBDUMP=$(SH3_ZS640B24_ZINT_FB) + @echo "=== compare board framebuffer vs zint640b24 sim framebuffer ===" + @sha256sum $(SH3_ZS640B24_BOARD_FB) $(SH3_ZS640B24_ZINT_FB) + @cmp -s $(SH3_ZS640B24_BOARD_FB) $(SH3_ZS640B24_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640b24 sim" || \ + (echo "FAIL: board framebuffer differs from zint640b24 sim"; cmp -l $(SH3_ZS640B24_BOARD_FB) $(SH3_ZS640B24_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640B24_BOARD_FB) \ + --tag zs640b24 --owner replay-color --frags $(TRACE_DIR)/zs640b24_frags.txt + +sh3_zs640m28_board_compare: tb_top_psmct32_sh3_zs640m28_cap tb_top_psmct32_sh3_zint640m28 + @test -f $(SH3_ZS640M28_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640M28_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zs640m28_board_fb.mem here first."; exit 1) + @echo "=== dump zint640m28 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640m28.vvp +FBDUMP=$(SH3_ZS640M28_ZINT_FB) + @echo "=== compare board framebuffer vs zint640m28 sim framebuffer ===" + @sha256sum $(SH3_ZS640M28_BOARD_FB) $(SH3_ZS640M28_ZINT_FB) + @cmp -s $(SH3_ZS640M28_BOARD_FB) $(SH3_ZS640M28_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640m28 sim" || \ + (echo "FAIL: board framebuffer differs from zint640m28 sim"; cmp -l $(SH3_ZS640M28_BOARD_FB) $(SH3_ZS640M28_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640M28_BOARD_FB) \ + --tag zs640m28 --owner replay-color --frags $(TRACE_DIR)/zs640m28_frags.txt + +sh3_zs640mt5_board_compare: tb_top_psmct32_sh3_zs640mt5_cap tb_top_psmct32_sh3_zint640mt5 + @test -f $(SH3_ZS640MT5_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640MT5_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zs640mt5_board_fb.mem here first."; exit 1) + @echo "=== dump zint640mt5 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640mt5.vvp +FBDUMP=$(SH3_ZS640MT5_ZINT_FB) + @echo "=== compare board framebuffer vs zint640mt5 sim framebuffer ===" + @sha256sum $(SH3_ZS640MT5_BOARD_FB) $(SH3_ZS640MT5_ZINT_FB) + @cmp -s $(SH3_ZS640MT5_BOARD_FB) $(SH3_ZS640MT5_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640mt5 sim" || \ + (echo "FAIL: board framebuffer differs from zint640mt5 sim"; cmp -l $(SH3_ZS640MT5_BOARD_FB) $(SH3_ZS640MT5_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640MT5_BOARD_FB) \ + --tag zs640mt5 --owner replay-color --frags $(TRACE_DIR)/zs640mt5_frags.txt + +sh3_zs640c12_board_compare: tb_top_psmct32_sh3_zs640c12_cap tb_top_psmct32_sh3_zint640c12 + @test -f $(SH3_ZS640C12_BOARD_FB) || \ + (echo "MISSING: $(SH3_ZS640C12_BOARD_FB)"; \ + echo "Run the board with --dump-fb and copy sh3_zs640c12_board_fb.mem here first."; exit 1) + @echo "=== dump zint640c12 sim framebuffer ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_zint640c12.vvp +FBDUMP=$(SH3_ZS640C12_ZINT_FB) + @echo "=== compare board framebuffer vs zint640c12 sim framebuffer ===" + @sha256sum $(SH3_ZS640C12_BOARD_FB) $(SH3_ZS640C12_ZINT_FB) + @cmp -s $(SH3_ZS640C12_BOARD_FB) $(SH3_ZS640C12_ZINT_FB) && \ + echo "PASS: board framebuffer is byte-for-byte identical to zint640c12 sim" || \ + (echo "FAIL: board framebuffer differs from zint640c12 sim"; cmp -l $(SH3_ZS640C12_BOARD_FB) $(SH3_ZS640C12_ZINT_FB) | sed -n '1,12p'; exit 1) + @echo "=== compare board framebuffer vs replayed fragment colors ===" + @$(PYTHON) $(REPO_ROOT)/tools/analyze_zsched_fb.py $(SH3_ZS640C12_BOARD_FB) \ + --tag zs640c12 --owner replay-color --frags $(TRACE_DIR)/zs640c12_frags.txt + +# Ch357 — TRIO regression (weak-depth, 384x381): capture the trio's authentic-Z fragments then run the ROP scoreboard. +tb_top_psmct32_sh3_ztrio_cap: dirs + @echo "=== build tb_top_psmct32_sh3_ztrio_cap (Ch357 trio authentic-Z capture) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_ztrio.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_ztrio.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_ztrio_cap.vvp \ + -s tb_top_psmct32_sh3_ztrio_cap \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_ztrio_cap.sv + @echo "=== run tb_top_psmct32_sh3_ztrio_cap ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_ztrio_cap.vvp + +tb_top_psmct32_sh3_ztrio: tb_top_psmct32_sh3_ztrio_cap + @echo "=== build tb_top_psmct32_sh3_ztrio (Ch357 trio ROP scoreboard) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_ztrio.vvp \ + -s tb_top_psmct32_sh3_ztrio \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_ztrio.sv + @echo "=== run tb_top_psmct32_sh3_ztrio ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_ztrio.vvp + +# Ch356 accumulation-correctness gate: render ALL + each epoch in isolation (+ONLY=k +FBDUMP), then assert the joint +# ALL render == the composited isolation dumps BIT-FOR-BIT (compose_sched.py). This is the decisive scheduler proof. +tb_top_psmct32_sh3_sched_compose: tb_top_psmct32_sh3_sched + @echo "=== Ch356 composition==isolated bit-for-bit gate ===" + @cd $(TRACE_DIR) && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp +ONLY=ALL +FBDUMP=$(BUILD_DIR)/sched_fb_ALL.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp +ONLY=0 +FBDUMP=$(BUILD_DIR)/sched_fb_0.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp +ONLY=1 +FBDUMP=$(BUILD_DIR)/sched_fb_1.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched.vvp +ONLY=2 +FBDUMP=$(BUILD_DIR)/sched_fb_2.hex >/dev/null + @python3 $(SIM_DIR)/../tools/compose_sched.py \ + $(BUILD_DIR)/sched_fb_ALL.hex $(BUILD_DIR)/sched_fb_0.hex $(BUILD_DIR)/sched_fb_1.hex $(BUILD_DIR)/sched_fb_2.hex + +# Ch357 — NATIVE 640x480 LPDDR framebuffer (scheduler unchanged; authentic screen coords, no union translation). +# LOCAL fixtures via gs_make_sh3_scheduler_fixture.py --fb640 --emit. +tb_top_psmct32_sh3_sched640: dirs + @echo "=== build tb_top_psmct32_sh3_sched640 (Ch357 native 640x480) ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -I$(SIM_DIR)/data/top_psmct32_raster_demo \ + -DTOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/bios_sh3_s640.mem"' \ + -DTOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE='"$(SIM_DIR)/data/top_psmct32_raster_demo/payload_sh3_s640.mem"' \ + -o $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp \ + -s tb_top_psmct32_sh3_sched640 \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_sh3_sched640.sv + @echo "=== run tb_top_psmct32_sh3_sched640 ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp + +# Ch357 accumulation-correctness gate (bit-for-bit, full 640x480 frame). +tb_top_psmct32_sh3_sched640_compose: tb_top_psmct32_sh3_sched640 + @echo "=== Ch357 composition==isolated bit-for-bit gate (640x480) ===" + @cd $(TRACE_DIR) && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp +ONLY=ALL +FBDUMP=$(BUILD_DIR)/s640_fb_ALL.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp +ONLY=0 +FBDUMP=$(BUILD_DIR)/s640_fb_0.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp +ONLY=1 +FBDUMP=$(BUILD_DIR)/s640_fb_1.hex >/dev/null && \ + $(VVP) $(BUILD_DIR)/tb_top_psmct32_sh3_sched640.vvp +ONLY=2 +FBDUMP=$(BUILD_DIR)/s640_fb_2.hex >/dev/null + @python3 $(SIM_DIR)/../tools/compose_sched.py --width 640 \ + $(BUILD_DIR)/s640_fb_ALL.hex $(BUILD_DIR)/s640_fb_0.hex $(BUILD_DIR)/s640_fb_1.hex $(BUILD_DIR)/s640_fb_2.hex # Ch345a — RUNTIME FEEDER textured-alpha SPRITE demo (sprite_mode staging + SPRITE_TEX_ALPHA). Setup bootlet # uploads an 8x8 alpha texture + blue BG; the feeder streams 3 textured-alpha sprites over it. @@ -1951,6 +4463,25 @@ tb_ps2_hps_bridge: dirs @echo "=== run tb_ps2_hps_bridge ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_ps2_hps_bridge.vvp +tb_clut_stage_cdc: dirs + @echo "=== build tb_clut_stage_cdc ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_clut_stage_cdc.vvp \ + -s tb_clut_stage_cdc \ + $(RTL_ROOT)/platform/clut_stage_cdc.sv \ + $(TB_ROOT)/platform/tb_clut_stage_cdc.sv + @echo "=== run tb_clut_stage_cdc ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_clut_stage_cdc.vvp + +tb_top_psmct32_runtime_clut: dirs + @echo "=== build tb_top_psmct32_runtime_clut ===" + $(IVERILOG) $(IVERILOG_FLGS) \ + -o $(BUILD_DIR)/tb_top_psmct32_runtime_clut.vvp \ + -s tb_top_psmct32_runtime_clut \ + $(RTL_SRCS) $(TB_ROOT)/top/tb_top_psmct32_runtime_clut.sv + @echo "=== run tb_top_psmct32_runtime_clut ===" + @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_top_psmct32_runtime_clut.vvp + # Ch245 — focused unit-test for the platform-OSD cell adapter. Mocks # the 32-bit-word tile_ram_cdc shadow and verifies the 32→16 # low/high-half mux returns the right cell for several pack patterns @@ -3684,6 +6215,36 @@ tb_ee_install_agent_external_image: dirs @echo "=== run tb_ee_install_agent_external_image ===" @cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_ee_install_agent_external_image.vvp +# Ch357 ZSCHED rejoins the default regression now that its signoff oracle uses the same integer XY +# geometry emitted to the RTL. zrop depends on zsched; zint exercises the real raster -> Z/color LPDDR path. +.PHONY: tb_top_psmct32_sh3_zsched tb_top_psmct32_sh3_zrop tb_top_psmct32_sh3_zint sh3_zsched_board_compare +run: tb_top_psmct32_sh3_zsched tb_top_psmct32_sh3_zrop tb_top_psmct32_sh3_zint + +.PHONY: tb_top_psmct32_sh3_zs640_cap tb_top_psmct32_sh3_zint640 sh3_zs640_board_compare sh3_zs640_fixture +run: tb_top_psmct32_sh3_zs640_cap tb_top_psmct32_sh3_zint640 + +.PHONY: tb_top_psmct32_sh3_zs640c6_cap tb_top_psmct32_sh3_zint640c6 sh3_zs640c6_board_compare sh3_zs640c6_fixture +run: tb_top_psmct32_sh3_zs640c6_cap tb_top_psmct32_sh3_zint640c6 + +.PHONY: tb_top_psmct32_sh3_zint640rt3 sh3_zsrt3_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rt24 tb_top_psmct32_sh3_zint640rt24_trace sh3_zsrt24_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rtb24 tb_top_psmct32_sh3_zint640rtb24_trace sh3_zsrtb24_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rtm28 tb_top_psmct32_sh3_zint640rtm28_trace sh3_zsrtm28_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rtc24 tb_top_psmct32_sh3_zint640rtc24_trace sh3_zsrtc24_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rte3 tb_top_psmct32_sh3_zint640rte3_trace sh3_zsrte3_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rte6 tb_top_psmct32_sh3_zint640rte6_trace +.PHONY: tb_top_psmct32_sh3_zint640rte8 tb_top_psmct32_sh3_zint640rte8_trace sh3_zsrte8_board_compare +.PHONY: tb_top_psmct32_sh3_zint640rte11 tb_top_psmct32_sh3_zint640rte11_trace sh3_zsrte11_board_compare + +.PHONY: tb_top_psmct32_sh3_zs640c12_cap tb_top_psmct32_sh3_zint640c12 sh3_zs640c12_board_compare sh3_zs640c12_fixture +run: tb_top_psmct32_sh3_zs640c12_cap tb_top_psmct32_sh3_zint640c12 + +.PHONY: tb_top_psmct32_sh3_zs640b24_cap tb_top_psmct32_sh3_zint640b24 sh3_zs640b24_board_compare sh3_zs640b24_fixture +run: tb_top_psmct32_sh3_zs640b24_cap tb_top_psmct32_sh3_zint640b24 + +.PHONY: tb_top_psmct32_sh3_zs640c24c_cap tb_top_psmct32_sh3_zint640c24c sh3_zs640c24c_fixture sh3_zs640motionabc_bootlet +run: tb_top_psmct32_sh3_zs640c24c_cap tb_top_psmct32_sh3_zint640c24c + run: tb_ee_fetch tb_gs tb_intc tb_platform_video tb_bgcolor_via_dma tb_sif_mailbox \ tb_sif_command_echo tb_sif_command_echo_rearm tb_sif_negative_path \ tb_sif_dma_smoke tb_sif_dma_mid_stall tb_sif_dma_overflow tb_sif_combined_ctrl_data \ @@ -3703,7 +6264,7 @@ run: tb_ee_fetch tb_gs tb_intc tb_platform_video tb_bgcolor_via_dma tb_sif_mailb tb_ee_core_branch_zero tb_ee_core_lbu tb_ee_core_divu_mflo tb_ee_core_multu_mflo \ tb_ee_core_align tb_ee_core_align_exc tb_ee_core_bev \ tb_ee_core_cop0_count tb_ee_bootstrap_mmio tb_ee_biu_mmio \ - tb_ee_core_gif_packed tb_ee_core_gif_reglist tb_ee_core_gif_primitive tb_ee_core_gif_primitive_observer tb_ee_core_gif_primitive_strip tb_ee_core_gif_primitive_gouraud tb_ee_core_gif_pixel_emit tb_ee_core_gif_pixel_emit_psm tb_ee_core_gif_raster_basic tb_ee_core_gif_raster_topleft tb_ee_core_gif_raster_gouraud tb_ee_core_gif_raster_queue tb_gs_raster_queue_full_pop tb_gs_raster_pipeline tb_gs_prim_list_feeder tb_gs_vram_writeback tb_vram_stub tb_vram_bram_stub_equivalence tb_vram_normalize_write tb_gs_scanout_basic tb_gs_scanout_dbx_dby tb_gs_scanout_display_window tb_gs_scanout_magh_magv tb_gs_scanout_psm16 tb_gs_scanout_psmt8 tb_gs_scanout_psmt8_clut tb_gs_tex0_clut tb_gs_clut_load tb_gs_clut_load_ct16 tb_gs_clut_load_cld_modes tb_gs_clut_load_csa_window tb_gs_scanout_psmt4_clut tb_gs_psmt4_round_trip tb_gs_raster_psmct16 tb_gs_raster_psmt8 tb_gs_textured_sprite tb_gs_textured_alpha_sprite tb_gs_psmt8_alpha_sprite tb_gs_psmt8_clut_triangle tb_clut_loader_csm1 tb_gs_raster_psmt4 tb_gs_demo_psmt4_e2e tb_gs_demo_psmt4_e2e_packed tb_gs_demo_psmt4_e2e_dmac tb_gs_demo_psmt4_e2e_trxdir tb_gs_demo_psmt4_e2e_eemmio tb_gs_demo_psmt4_e2e_eemap tb_gs_demo_psmt4_e2e_ee_program tb_gs_demo_psmt4_e2e_ee_full_bootlet tb_ee_ram_cpu_dmac_contention tb_gs_image_xfer_psmct16 tb_gs_image_xfer_psmt8 tb_gs_image_xfer_psmt4 tb_gs_swizzle_psmct32 tb_gs_swizzle_psmct16 tb_gs_swizzle_psmt8 tb_gs_swizzle_psmt4 tb_gs_scanout_swizzle_psmt4 tb_gs_image_xfer_swizzle_psmt4 tb_gs_raster_swizzle_psmt4 tb_gs_demo_psmt4_swizzle_e2e tb_gs_demo_psmt4_swizzle_trxdir_e2e tb_top_psmct32_raster_demo tb_top_psmct32_textured_demo tb_top_psmct32_raster_demo_bram tb_top_psmct32_raster_demo_bram_textured tb_top_psmct32_raster_demo_bram_ch171 tb_gs_raster_backpressure_stress tb_ps2_hps_bridge tb_gs_raster_bram_psmct16 tb_gs_raster_bram_psmt8 tb_gs_raster_bram_psmt4 tb_gs_scanout_bram_psmct16 tb_gs_scanout_bram_psmt8 tb_de25_nano_psmct32_raster_demo_top tb_hdmi_i2c_wake_smoke tb_gs_scanout_swizzle_psmt8 tb_gs_image_xfer_swizzle_psmt8 tb_gs_raster_swizzle_psmt8 tb_gs_demo_psmt8_swizzle_e2e tb_gs_demo_psmt8_swizzle_trxdir_e2e tb_gs_scanout_swizzle_psmct16 tb_gs_image_xfer_swizzle_psmct16 tb_gs_scanout_swizzle_psmct32 tb_gs_image_xfer_swizzle_psmct32 tb_gs_raster_swizzle_psmct32 tb_gs_raster_swizzle_psmct16 tb_gs_demo_psmct32_swizzle_e2e tb_gs_demo_psmct32_swizzle_trxdir_e2e tb_gs_demo_psmct16_swizzle_e2e tb_gs_demo_psmct16_swizzle_trxdir_e2e tb_ee_core_varshift tb_ee_install_agent_smoke tb_ee_install_agent_external_image tb_tile_ram_cdc tb_sio2_input_stub tb_bridge_iop_pad_input tb_pad_state_via_sif_to_ee tb_ee_pad_buffer_branch tb_lpddr_tex_staging tb_osd_platform_cell_adapter tb_ee_core_elf_runner tb_ee_core_sq tb_ee_core_daddu tb_ee_core_syscall_hle tb_ee_core_beql tb_ee_core_sd tb_ee_core_dsll tb_ee_core_bnel tb_ee_core_pcpyld tb_ee_core_lq tb_ee_core_psubb tb_ee_core_pnor tb_ee_core_pand tb_ee_core_pcpyud tb_ee_core_ld tb_ee_core_ei tb_ee_dmac_ctrl_stub tb_ee_dmac_passive_chan_stub tb_ee_core_sync tb_ee_core_pcpyh tb_ee_core_dsubu tb_gs_lpddr_fb_writer tb_gs_lpddr_axi_master tb_gs_lpddr_rd_probe tb_gs_lpddr_scanout tb_gs_lpddr_scanout_psm32 tb_gs_lpddr_scanout_concurrency tb_gs_lpddr_scanout_lb_psm32 tb_gs_lpddr_scanout_lb_psm32_256 tb_gs_lpddr_rd_arb tb_gs_lpddr_scanout_lb tb_gs_texture_cache tb_gs_lpddr_wr_probe tb_gs_lpddr_wr_arb tb_gs_tile_reload tb_gs_tile_reload_grid tb_gs_z_flush_writer tb_gs_alpha_blend tb_top_psmct32_alpha_blend_demo tb_top_psmct32_texalpha_demo tb_gs_zbuffer tb_top_psmct32_zbuffer_demo tb_gs_tri_interp tb_top_psmct32_triangle_demo tb_gs_textured_triangle tb_top_psmct32_raster_demo_bram_tritex tb_top_psmct32_raster_demo_bram_lpddrtex tb_gs_texture_psmt8_clut tb_gs_texture_wrap tb_gs_texture_bilinear tb_top_psmct32_raster_demo_bram_clut tb_gs_texture_psmt4_clut tb_gs_texture_swizzle_psmt4_clut tb_top_psmct32_raster_demo_bram_clut4 tb_top_psmct32_raster_demo_bram_swz4 tb_gs_texture_swizzle_psmt8_clut tb_top_psmct32_raster_demo_bram_swz8 tb_gs_texture_swizzle_psmct32 tb_top_psmct32_raster_demo_bram_swz32 tb_gs_reciprocal tb_gs_persp_uv tb_gs_persp_uv_farw tb_gs_grad_divider tb_top_psmct32_perspective_demo tb_top_psmct32_persp_floor_demo tb_top_psmct32_combined_demo tb_gs_tile_ram tb_top_psmct32_tile_demo tb_gs_tile_zflush tb_gs_tile_spill_reload tb_gs_tile_spill_lpddr tb_gs_tile_spill_grid_lpddr tb_gs_tile_spill_grid8x8_lpddr tb_gs_tile_spill_lpddr_neg tb_top_psmct32_tile2x2_demo tb_top_psmct32_tile_multiprim_demo tb_top_psmct32_tile_scissor_demo tb_top_psmct32_tile_wrap_demo tb_top_psmct32_tile_psmct16_demo tb_top_psmct32_tile_alpha_demo tb_top_psmct32_tile_bilinear_demo tb_top_psmct32_tile_bin_demo tb_top_psmct32_tile_bin4x4_demo tb_top_psmct32_tile_psmct16fb_demo tb_top_psmct32_tile_lpddr128_demo tb_top_psmct32_tile_palbilinear_demo tb_top_psmct32_tile_cap_demo tb_top_psmct32_tile_cap_overflow_demo tb_top_psmct32_tile_sprite18_demo tb_top_psmct32_tile_cap64_demo tb_top_psmct32_feeder_equiv_demo tb_top_psmct32_feeder_runtime_demo tb_top_psmct32_feeder_bridge_demo tb_top_psmct32_feeder_scenes_demo tb_top_psmct32_feeder_shapes_demo tb_top_psmct32_feeder_colors_demo tb_top_psmct32_feeder_native_demo tb_top_psmct32_feeder_gouraud_demo tb_top_psmct32_feeder_accum_demo tb_top_psmct32_feeder_scene_retrigger_demo tb_top_psmct32_feeder_zpersist_demo tb_top_psmct32_feeder_persp_demo tb_top_psmct32_feeder_sprite_demo tb_top_psmct32_tile_late_demo tb_top_psmct32_tile_lpddrfb_demo + tb_ee_core_gif_packed tb_ee_core_gif_reglist tb_ee_core_gif_primitive tb_ee_core_gif_primitive_observer tb_ee_core_gif_primitive_strip tb_ee_core_gif_primitive_gouraud tb_ee_core_gif_pixel_emit tb_ee_core_gif_pixel_emit_psm tb_ee_core_gif_raster_basic tb_ee_core_gif_raster_topleft tb_ee_core_gif_raster_gouraud tb_ee_core_gif_raster_queue tb_gs_raster_queue_full_pop tb_gs_raster_pipeline tb_gs_prim_list_feeder tb_gs_vram_writeback tb_vram_stub tb_vram_bram_stub_equivalence tb_vram_normalize_write tb_gs_scanout_basic tb_gs_scanout_dbx_dby tb_gs_scanout_display_window tb_gs_scanout_magh_magv tb_gs_scanout_psm16 tb_gs_scanout_psmt8 tb_gs_scanout_psmt8_clut tb_gs_tex0_clut tb_gs_clut_load tb_gs_clut_load_ct16 tb_gs_clut_load_cld_modes tb_gs_clut_load_csa_window tb_gs_scanout_psmt4_clut tb_gs_psmt4_round_trip tb_gs_raster_psmct16 tb_gs_raster_psmt8 tb_gs_textured_sprite tb_gs_textured_alpha_sprite tb_gs_psmt8_alpha_sprite tb_gs_psmt8_clut_triangle tb_clut_loader_csm1 tb_gs_raster_psmt4 tb_gs_demo_psmt4_e2e tb_gs_demo_psmt4_e2e_packed tb_gs_demo_psmt4_e2e_dmac tb_gs_demo_psmt4_e2e_trxdir tb_gs_demo_psmt4_e2e_eemmio tb_gs_demo_psmt4_e2e_eemap tb_gs_demo_psmt4_e2e_ee_program tb_gs_demo_psmt4_e2e_ee_full_bootlet tb_ee_ram_cpu_dmac_contention tb_gs_image_xfer_psmct16 tb_gs_image_xfer_psmt8 tb_gs_image_xfer_psmt4 tb_gs_swizzle_psmct32 tb_gs_swizzle_psmct16 tb_gs_swizzle_psmt8 tb_gs_swizzle_psmt4 tb_gs_scanout_swizzle_psmt4 tb_gs_image_xfer_swizzle_psmt4 tb_gs_raster_swizzle_psmt4 tb_gs_demo_psmt4_swizzle_e2e tb_gs_demo_psmt4_swizzle_trxdir_e2e tb_top_psmct32_raster_demo tb_top_psmct32_textured_demo tb_top_psmct32_raster_demo_bram tb_top_psmct32_raster_demo_bram_textured tb_top_psmct32_raster_demo_bram_ch171 tb_gs_raster_backpressure_stress tb_ps2_hps_bridge tb_gs_raster_bram_psmct16 tb_gs_raster_bram_psmt8 tb_gs_raster_bram_psmt4 tb_gs_scanout_bram_psmct16 tb_gs_scanout_bram_psmt8 tb_de25_nano_psmct32_raster_demo_top tb_hdmi_i2c_wake_smoke tb_gs_scanout_swizzle_psmt8 tb_gs_image_xfer_swizzle_psmt8 tb_gs_raster_swizzle_psmt8 tb_gs_demo_psmt8_swizzle_e2e tb_gs_demo_psmt8_swizzle_trxdir_e2e tb_gs_scanout_swizzle_psmct16 tb_gs_image_xfer_swizzle_psmct16 tb_gs_scanout_swizzle_psmct32 tb_gs_image_xfer_swizzle_psmct32 tb_gs_raster_swizzle_psmct32 tb_gs_raster_swizzle_psmct16 tb_gs_demo_psmct32_swizzle_e2e tb_gs_demo_psmct32_swizzle_trxdir_e2e tb_gs_demo_psmct16_swizzle_e2e tb_gs_demo_psmct16_swizzle_trxdir_e2e tb_ee_core_varshift tb_ee_install_agent_smoke tb_ee_install_agent_external_image tb_tile_ram_cdc tb_sio2_input_stub tb_bridge_iop_pad_input tb_pad_state_via_sif_to_ee tb_ee_pad_buffer_branch tb_lpddr_tex_staging tb_osd_platform_cell_adapter tb_ee_core_elf_runner tb_ee_core_sq tb_ee_core_daddu tb_ee_core_syscall_hle tb_ee_core_beql tb_ee_core_sd tb_ee_core_dsll tb_ee_core_bnel tb_ee_core_pcpyld tb_ee_core_lq tb_ee_core_psubb tb_ee_core_pnor tb_ee_core_pand tb_ee_core_pcpyud tb_ee_core_ld tb_ee_core_ei tb_ee_dmac_ctrl_stub tb_ee_dmac_passive_chan_stub tb_ee_core_sync tb_ee_core_pcpyh tb_ee_core_dsubu tb_gs_async_fifo tb_gs_lpddr_fb_writer tb_gs_lpddr_axi_master tb_gs_lpddr_axi_master_elastic tb_gs_lpddr_scanout_fb tb_gs_lpddr_rd_probe tb_gs_lpddr_scanout tb_gs_lpddr_scanout_psm32 tb_gs_lpddr_scanout_concurrency tb_gs_lpddr_scanout_lb_psm32 tb_gs_lpddr_scanout_lb_psm32_256 tb_gs_lpddr_rd_arb tb_gs_lpddr_scanout_lb tb_gs_texture_cache tb_gs_lpddr_wr_probe tb_gs_lpddr_wr_arb tb_gs_tile_reload tb_gs_tile_reload_grid tb_gs_z_flush_writer tb_gs_alpha_blend tb_top_psmct32_alpha_blend_demo tb_top_psmct32_texalpha_demo tb_gs_zbuffer tb_top_psmct32_zbuffer_demo tb_gs_tri_interp tb_gs_fog tb_gs_fog_persp tb_gs_feeder_fog_e2e tb_top_psmct32_triangle_demo tb_gs_textured_triangle tb_top_psmct32_raster_demo_bram_tritex tb_top_psmct32_raster_demo_bram_lpddrtex tb_gs_texture_psmt8_clut tb_gs_texture_wrap tb_gs_texture_bilinear tb_top_psmct32_raster_demo_bram_clut tb_gs_texture_psmt4_clut tb_gs_texture_swizzle_psmt4_clut tb_top_psmct32_raster_demo_bram_clut4 tb_top_psmct32_raster_demo_bram_swz4 tb_gs_texture_swizzle_psmt8_clut tb_top_psmct32_raster_demo_bram_swz8 tb_gs_texture_swizzle_psmct32 tb_top_psmct32_raster_demo_bram_swz32 tb_gs_reciprocal tb_gs_persp_uv tb_gs_persp_uv_farw tb_gs_grad_divider tb_top_psmct32_perspective_demo tb_top_psmct32_persp_floor_demo tb_top_psmct32_combined_demo tb_gs_tile_ram tb_top_psmct32_tile_demo tb_gs_tile_zflush tb_gs_tile_spill_reload tb_gs_tile_spill_lpddr tb_gs_tile_spill_grid_lpddr tb_gs_tile_spill_grid8x8_lpddr tb_gs_tile_spill_lpddr_neg tb_top_psmct32_tile2x2_demo tb_top_psmct32_tile_multiprim_demo tb_top_psmct32_tile_scissor_demo tb_top_psmct32_tile_wrap_demo tb_top_psmct32_tile_psmct16_demo tb_top_psmct32_tile_alpha_demo tb_top_psmct32_tile_bilinear_demo tb_top_psmct32_tile_bin_demo tb_top_psmct32_tile_bin4x4_demo tb_top_psmct32_tile_psmct16fb_demo tb_top_psmct32_tile_lpddr128_demo tb_top_psmct32_tile_palbilinear_demo tb_top_psmct32_tile_cap_demo tb_top_psmct32_tile_cap_overflow_demo tb_top_psmct32_tile_sprite18_demo tb_top_psmct32_tile_cap64_demo tb_top_psmct32_feeder_equiv_demo tb_top_psmct32_feeder_runtime_demo tb_top_psmct32_feeder_bridge_demo tb_top_psmct32_feeder_scenes_demo tb_top_psmct32_feeder_shapes_demo tb_top_psmct32_feeder_colors_demo tb_top_psmct32_feeder_native_demo tb_top_psmct32_feeder_gouraud_demo tb_top_psmct32_feeder_accum_demo tb_top_psmct32_feeder_scene_retrigger_demo tb_top_psmct32_feeder_zpersist_demo tb_top_psmct32_feeder_persp_demo tb_top_psmct32_feeder_sprite_demo tb_top_psmct32_tile_late_demo tb_top_psmct32_tile_lpddrfb_demo @echo @echo "=== all testbenches complete ===" @@ -3761,4 +6322,3 @@ test_compare: tb_ee_fetch golden_nop if [ $$rc -eq 3 ]; then echo " (correctly reported malformed input with exit=3)"; else echo " FAIL: expected exit=3, got $$rc"; exit 1; fi @echo @echo "=== test_compare: all three exit-code paths verified ===" - diff --git a/sim/data/top_psmct32_raster_demo/1657_image.mem b/sim/data/top_psmct32_raster_demo/1657_image.mem new file mode 100644 index 0000000..3183d84 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/1657_image.mem @@ -0,0 +1,307200 @@ +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +800c0e12 +80030508 +80000314 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +800e1b30 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000314 +80030508 +800c101c +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +800c0e12 +80111520 +80000000 +80040812 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800e1b30 +8022619e +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80131920 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80000000 +800c101c +80070c14 +80000000 +80030508 +80030508 +80070c14 +80030508 +8013336a +80040812 +80030508 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80070f1c +800e1b30 +8022619e +80030508 +80000000 +80040812 +80030508 +80030508 +80040812 +80070c14 +80030508 +80040812 +80030508 +80040812 +80030508 +800c101c +80072560 +80000000 +80000000 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +800d141e +80040812 +80040812 +80000000 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +800e1b30 +8022619e +800e1b30 +80001778 +80030508 +80030508 +800d141e +80030508 +80000000 +80070c14 +800c101c +80030508 +80070c14 +8013336a +80070c14 +80070c14 +80070c14 +80030508 +80040812 +80030508 +80000000 +80000000 +80000000 +80000000 +80040812 +80000000 +80000000 +80030508 +80070c14 +80000314 +80070c14 +80030508 +80040812 +80000314 +80040812 +80040812 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800e1b30 +80030508 +80030508 +8022619e +800e1b30 +80001778 +80476a78 +800c101c +80040812 +80070c14 +80040812 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80070c14 +80040812 +80040812 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000314 +80000314 +80030508 +80030508 +80070c14 +80070c14 +80040812 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +800e1b30 +80070f1c +80070c14 +80070c14 +800e1b30 +80001778 +80030508 +80182d4c +80040812 +8008101e +80040812 +80070c14 +80040812 +80072560 +8008101e +800a2458 +80040812 +80030508 +80040812 +80040812 +80030508 +80070c14 +80040812 +8008101e +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80050b16 +8008101e +80070f1c +800e1b30 +80040812 +800e1b30 +80001778 +80476a78 +80182d4c +800e1c3e +8008101e +800a2458 +80000314 +80072560 +8008101e +80040812 +80030508 +80030508 +80040812 +8008101e +80050c20 +80030508 +80050c20 +80040812 +80040812 +80070c14 +80040812 +80040812 +80040812 +80030508 +80030508 +80000000 +80040812 +80030508 +80072560 +80072560 +80070c14 +80072560 +800d141e +80000000 +80000000 +80070c14 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +8008101e +80070c14 +8008101e +800e1b30 +800a2458 +8013336a +80001778 +80476a78 +80040812 +800e1c3e +80476a78 +80000314 +80040812 +80000314 +80040812 +8008101e +80040812 +80040812 +80111c32 +800a2458 +80152542 +80030508 +80050c20 +80070c14 +80040812 +800c101c +800d141e +80030508 +800d141e +800d141e +80000000 +80000000 +8013336a +80070c14 +80030508 +80030508 +80050c20 +80070c14 +80030508 +80030508 +80030508 +80040812 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80182d4c +80050b16 +80030508 +80050c20 +80040812 +8022619e +80030508 +80000314 +80476a78 +80182d4c +80040812 +80476a78 +80050b16 +80070c14 +80000314 +80000314 +80070c14 +8008101e +8013336a +80030508 +80000000 +8008101e +80000000 +80000000 +80111c32 +80070c14 +80040812 +80070c14 +80030508 +8013336a +80050c20 +8008101e +80040812 +80030508 +80040812 +800a2458 +80040812 +80070c14 +800a1730 +80070c14 +800b1c3c +800b1f44 +800a1730 +800b1c3c +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80182d4c +80050b16 +80040812 +80040812 +80050c20 +8022619e +80000314 +80040812 +80476a78 +80182d4c +800e1c3e +80476a78 +80050b16 +800e1c3e +80030508 +80172334 +80040812 +8008101e +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80050c20 +80000314 +80000000 +80040812 +80000314 +800c101c +80030508 +80030508 +80070c14 +80040812 +80040812 +80040812 +80050c20 +80050c20 +800b1c3c +80050c20 +800b1c3c +8008101e +8013336a +800b1c3c +800a1730 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80050b16 +80040812 +80172334 +80172334 +80172334 +80072560 +80072560 +800e1b30 +80172334 +8008101e +80182d4c +800e1c3e +80070c14 +80050b16 +800e1c3e +80040812 +80040812 +80000314 +80000314 +80030508 +80000314 +80070c14 +80040812 +80040812 +80030508 +80030508 +80050c20 +80040812 +80000314 +80030508 +80000314 +80000314 +80070c14 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80040812 +80050c20 +80050c20 +80111c32 +8013336a +8013336a +80182b44 +800a2458 +80152542 +800a1730 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8008101e +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80000314 +80001778 +8008101e +8008101e +800e1c3e +80476a78 +80070c14 +800e1c3e +80050b16 +80040812 +80070c14 +80040812 +80070c14 +80050c20 +80040812 +80050c20 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +8008101e +8013336a +8013336a +800a2458 +800a2458 +800a2458 +800a2458 +80253444 +8013336a +80072560 +80253444 +800c0e12 +800c101c +80072560 +80030508 +80233654 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +800e1b30 +80050b16 +80000314 +80050c20 +80000314 +80000314 +80000314 +80040812 +80040812 +80001778 +80030508 +80030508 +800e1c3e +80476a78 +80050b16 +80050c20 +80050b16 +80476a78 +80050c20 +80070c14 +80040812 +80040812 +80000314 +80050c20 +80000314 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80070c14 +80253444 +80253444 +80072560 +80072560 +80072560 +80072560 +80111c32 +80172334 +80172334 +800d141e +80111c32 +80111c32 +8013336a +8013336a +800a1730 +80152542 +80111c32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +800e1b30 +800a142a +80070c14 +80040812 +80040812 +80050c20 +80050c20 +80040812 +80000314 +80040812 +80476a78 +80030508 +80030508 +80476a78 +80050b16 +80050c20 +80050b16 +80476a78 +800a142a +80040812 +80000000 +80070c14 +80000000 +80030508 +80040812 +80000000 +80000000 +80070c14 +80111c32 +8008101e +80070c14 +80070c14 +80040812 +80172334 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80070c14 +80040812 +80233654 +8008101e +80152542 +800a1730 +80182b44 +8008101e +802f445e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80131920 +80000000 +80000000 +80000000 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +80030718 +80070c14 +80000314 +80000314 +80000314 +80040812 +80000314 +800a2458 +800a2458 +80030508 +80040812 +80040812 +80182d4c +80000000 +80000000 +80050b16 +800e1c3e +80000000 +80476a78 +800a142a +80132030 +80070c14 +80040812 +80030508 +80070c14 +80050c20 +800a2458 +8008101e +80040812 +80070c14 +8008101e +80030508 +80050c20 +80070c14 +80233654 +80233654 +80233654 +80233654 +800a1730 +800a1730 +800a1730 +80040812 +802f445e +802f445e +80111c32 +802f445e +80152748 +80414444 +80152748 +800a1730 +800a1730 +8013336a +8092a4b4 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80000000 +80030508 +80000000 +80030508 +80030508 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +800c101c +80040812 +80030508 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80030508 +80000000 +80000000 +80000000 +80030508 +8013336a +80040812 +80000000 +80072560 +80030508 +80030508 +80030508 +80070c14 +80040812 +80040812 +80030508 +80030508 +80070c14 +80030508 +80070c14 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +80050c20 +8013336a +80030718 +800a2458 +80040812 +80050c20 +80030508 +80000000 +80000000 +80000000 +80040812 +80040812 +800d141e +80030508 +80182d4c +80070c14 +80040812 +80040812 +800e1c3e +80070c14 +80040812 +800a142a +80132030 +80476a78 +80030508 +80040812 +80030508 +80040812 +80030508 +80070c14 +8013336a +80070c14 +8013336a +80070c14 +80070c14 +8008101e +802f445e +802f445e +802f445e +80152748 +80152748 +80152748 +80152748 +80050c20 +80050c20 +80050c20 +8008101e +80050c20 +80050c20 +80070c14 +8093b1d2 +800b1f44 +80152748 +800a2458 +800b1f44 +803e4550 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80040812 +800c101c +800d141e +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +800c101c +800c101c +80000000 +80030508 +8008101e +8008101e +80040812 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000314 +80000314 +80030508 +80070c14 +80070c14 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +800a2458 +800a2458 +800a2458 +800a2458 +80253444 +80253444 +80253444 +80030718 +80040812 +8008101e +8013336a +80040812 +80040812 +8008101e +8008101e +80070c14 +80000000 +80000000 +80000000 +80030508 +800e1c3e +80000000 +80040812 +800e1c3e +80050b16 +80000314 +800a142a +80132030 +80476a78 +80050b16 +80050c20 +80030508 +80050c20 +80050c20 +80040812 +80070c14 +8008101e +800d141e +80040812 +80040812 +80070c14 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800b1f44 +800b1f44 +800b1f44 +800b1f44 +800b1c3c +80111c32 +800b1c3c +800b1c3c +8013336a +8008101e +80111c32 +80072560 +800a2458 +80040812 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80030508 +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80040812 +80040812 +80040812 +80000000 +80030508 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +8008101e +80040812 +80040812 +80040812 +80050c20 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80050c20 +80040812 +80030508 +80070c14 +80040812 +80070c14 +80040812 +80030508 +80070c14 +80030508 +80030508 +80111c32 +80040812 +80040812 +80000000 +80000000 +8013336a +80040812 +80050c20 +80070c14 +80030508 +80030508 +8005102e +800a2458 +800a1730 +80050c20 +80050c20 +80050c20 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +8013336a +800a2458 +800a2458 +800a2458 +80253444 +80253444 +80253444 +80253444 +80072560 +80072560 +80072560 +80072560 +80172334 +80172334 +80172334 +80182d4c +80030718 +80000000 +80030508 +8008101e +80030508 +80030508 +80040812 +800a2458 +800a2458 +80040812 +8008101e +8008101e +80111c32 +80040812 +80040812 +80000314 +800a2458 +80050b16 +80476a78 +80000314 +80132030 +80476a78 +80050b16 +800e1c3e +80030508 +80040812 +80050c20 +80000314 +80040812 +80040812 +80030508 +80070c14 +80070c14 +8008101e +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8008101e +8008101e +8008101e +8008101e +8008101e +80000000 +80000000 +80000000 +80000000 +80000000 +80040812 +80040812 +80000000 +8013336a +800a2458 +80152542 +80111c32 +80006392 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +80030508 +800c101c +80000000 +80070c14 +80070c14 +800a2458 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +800c101c +80070c14 +80040812 +80030508 +80000000 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80070f1c +8000041c +8000010c +80000000 +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80030508 +80182b44 +8013336a +80000000 +80000000 +80040812 +80070c14 +80030508 +80050c20 +800a2458 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80646768 +800b1c3c +800a2458 +80426ea6 +80050c20 +80414444 +800a1730 +80050c20 +80152542 +800a1730 +800a2458 +800a2458 +80050c20 +800a1730 +8008101e +800a2458 +800a2458 +80253444 +80253444 +80253444 +80072560 +80072560 +80072560 +80172334 +80172334 +80172334 +80172334 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80233654 +80233654 +80000314 +8013336a +800a2458 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80040812 +80040812 +80000000 +80000000 +80050c20 +80040812 +80040812 +800a1730 +80476a78 +80040812 +80040812 +80476a78 +80050b16 +80000314 +800a142a +8008101e +80070c14 +80040812 +80040812 +80040812 +80313c48 +80030508 +800c0e12 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80152542 +80152542 +80152542 +80152542 +80001164 +80050c20 +80001164 +80001164 +80111c32 +80030508 +80030508 +80040812 +80050c20 +8005102e +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +800d141e +80040812 +80040812 +80040812 +80030508 +800a2458 +80072560 +80040812 +80030508 +80040812 +80030508 +80000000 +80030508 +80000314 +80030508 +8008101e +80040812 +80030508 +80040812 +8022619e +8022619e +80050b16 +80050b16 +80050b16 +80050b16 +80476a78 +80070f1c +8000010c +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80646768 +80030508 +80030508 +80030508 +80040812 +80000314 +80040812 +800d141e +80040812 +8008101e +80040812 +8013336a +80070c14 +80111c32 +8008101e +80040812 +80030508 +800c101c +8013336a +8008101e +8013336a +80070c14 +80233654 +80131920 +80072560 +80072560 +80111c32 +8013336a +80152542 +80111c32 +80111c32 +80233654 +80233654 +80233654 +80233654 +800a1730 +800a1730 +800a1730 +800a1730 +802f445e +802f445e +80132546 +80000314 +80040812 +80050c20 +80172334 +80050c20 +80050c20 +800a2458 +8008101e +8008101e +80000314 +8013336a +8013336a +800a2458 +80040812 +80030508 +80030508 +80050b16 +80070c14 +80070c14 +80476a78 +800a142a +80030508 +80476a78 +80050b16 +800e1c3e +800a142a +80070f1c +80070c14 +800d141e +80030508 +80040812 +8008101e +80070c14 +80040812 +80070c14 +80152542 +80001164 +80001164 +80001164 +80001164 +80001164 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80050c20 +8013336a +80050c20 +80050c20 +80111c32 +80040812 +800b1c3c +800b1c3c +80000000 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +80070c14 +80040812 +80040812 +800a2458 +80040812 +80040812 +800a2458 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80072560 +80050b16 +80070f1c +80070f1c +80070f1c +800e1b30 +800e1b30 +800e1b30 +80040b24 +8000010c +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80040812 +800c101c +80070c14 +800c101c +80070c14 +80040812 +8008101e +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +80040812 +8013336a +80212c3c +800d141e +80072560 +80172334 +800a1730 +800a1730 +8004266a +8013336a +802f445e +800a1730 +80050c20 +80132546 +80040812 +800a2458 +80050c20 +80050c20 +800a1730 +8008101e +8008101e +80040812 +8013336a +8013336a +800a2458 +8008101e +80070c14 +80070c14 +80313c48 +80030508 +80030508 +80313c48 +80070c14 +80070c14 +800a142a +80132030 +80050c20 +80050b16 +800e1c3e +800a142a +80070f1c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8013336a +800b1c3c +800b1c3c +8013336a +800a2458 +800a2458 +80040812 +80111c32 +80050c20 +80172334 +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80050c20 +80030508 +80000314 +80040812 +80030508 +80000000 +80040812 +80030508 +80000314 +80040812 +80070c14 +80000000 +80040812 +80000000 +80030508 +80030508 +80030508 +80040812 +80030508 +800e1b30 +800a142a +800a142a +80132030 +80132030 +80132030 +80070f1c +80070f1c +80050b16 +800e1626 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +800a1730 +8008101e +80040812 +800a2458 +8008101e +80030508 +80111c32 +800a142a +80132546 +80040812 +80072560 +80040812 +80040812 +80040812 +80313c48 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +800a1730 +8013336a +8013336a +80040812 +80050c20 +80050c20 +80132030 +80050c20 +80050c20 +800e1c3e +800a142a +80050c20 +80050b16 +801c2c50 +80050c20 +80111c32 +8008101e +8013336a +8013336a +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +80414444 +80414444 +80414444 +80414444 +80040812 +800a1730 +80000314 +80000314 +80050c20 +800a2458 +80030508 +800d141e +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +800a2458 +80070c14 +8008101e +80000000 +80040812 +80000000 +8013336a +80030508 +80030508 +80070c14 +8013336a +80030508 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800e1c3e +800e1c3e +800e1c3e +80476a78 +80476a78 +8006112c +8006112c +8006112c +80050b16 +80030718 +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +8008101e +80040812 +8008101e +80070c14 +80040812 +80040812 +80040812 +80040812 +8008101e +8008101e +800a2458 +8013336a +800d141e +800d141e +80072560 +80040812 +80040812 +80070c14 +80070c14 +80050b16 +8008101e +8008101e +80132030 +80476a78 +80070c14 +800e1c3e +800a142a +80070f1c +80050c20 +80050b16 +80040812 +800d141e +80040812 +80040812 +80070c14 +800a2458 +800a2458 +80414444 +80414444 +80414444 +80414444 +80414444 +80000314 +80000314 +80000314 +80000314 +800a2458 +800a2458 +800a2458 +800a2458 +80030508 +800a1730 +800a1730 +800c101c +800a1730 +800b1c3c +80030508 +800b1c3c +800a2458 +80070c14 +80070c14 +80152748 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80030508 +80070c14 +80040812 +80070c14 +80030508 +800b1c3c +80000314 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +800a2458 +8013336a +800d141e +8013336a +8008101e +80050c20 +80050b16 +80050b16 +800e1c3e +800e1c3e +800e1c3e +80132030 +80132030 +80132030 +80476a78 +800a142a +8000010c +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8022619e +800a2458 +8013336a +8013336a +800a2458 +8008101e +80040812 +8008101e +8008101e +8008101e +80070c14 +80070c14 +8013336a +8013336a +800a2458 +80040812 +80040812 +8013336a +8008101e +8008101e +8008101e +80070c14 +80070c14 +80040812 +80040812 +80476a78 +80000314 +80040812 +800a142a +80070f1c +80050b16 +80050b16 +8022619e +80040812 +80030508 +80040812 +80000000 +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +800a1730 +800a1730 +800a1730 +800a1730 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8016284e +8016284e +8016284e +8016284e +80070c14 +800a2458 +800a2458 +80040812 +80040812 +800a2458 +8008101e +80050c20 +800b1c3c +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80040812 +80030508 +80030508 +80030508 +80000314 +80000000 +80000314 +80000314 +800d141e +80070c14 +80030508 +80111c32 +800a1730 +80111c32 +8013336a +80070c14 +80030508 +80253444 +80476a78 +800a142a +800a142a +800a142a +8022619e +8022619e +8022619e +80132030 +80132030 +800a142a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8022619e +800a142a +8008101e +800a2458 +8008101e +80070c14 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80070c14 +80000314 +80000314 +80030508 +80070c14 +80070c14 +80030508 +80000314 +80000314 +80040812 +80030508 +80030508 +80040812 +80040812 +80050b16 +80040812 +80040812 +80040812 +800c101c +80070c14 +800a2458 +8013336a +80000314 +80070c14 +800c0e12 +80152542 +800b1c3c +800b1c3c +8016284e +8016284e +8016284e +8016284e +8016284e +800a2458 +800a2458 +800a2458 +800a2458 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1f44 +8008101e +800b1f44 +800b1f44 +80253444 +80182b44 +80172334 +80233654 +8093b1d2 +80182b44 +800b1f44 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80000314 +80000314 +80000314 +80000314 +8005102e +80030508 +80000000 +80030508 +80030508 +80030508 +80070c14 +80000000 +80030508 +80030508 +80111c32 +802d487e +80072560 +800a2458 +80132030 +80132030 +800a142a +800a142a +800a142a +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800e1b30 +800e1b30 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e335e +8022619e +80070c14 +80040812 +80070c14 +80000314 +8008101e +80030508 +8008101e +8008101e +80030508 +80040812 +80050c20 +80050c20 +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800b1c3c +80152748 +80152748 +80152542 +80414444 +800e1c3e +80001f6e +80111c32 +80050b16 +80050b16 +800c101c +8003050a +80050b16 +80111c32 +80182b44 +80414444 +80070c14 +800c0e12 +80070c14 +800d141e +80172334 +802d487e +80384d76 +8016284e +80646768 +800b1c3c +80172334 +80182b44 +80182b44 +80182b44 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +80646768 +80646768 +800a2458 +80233654 +80646768 +80172334 +8008101e +80214062 +800a1730 +80182b44 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80040812 +80030508 +80040812 +80000000 +80111c32 +80070c14 +80070c14 +80040812 +80030508 +800c101c +800c101c +8008101e +80070c14 +80040812 +80070c14 +8008101e +80182b44 +80000314 +800a142a +800e1b30 +800e1b30 +800e1b30 +80070f1c +80070f1c +80070f1c +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +8013336a +80000000 +80030508 +80000314 +80030508 +80070c14 +80070c14 +80040812 +80030508 +80030508 +80030508 +80111c32 +80072560 +80072560 +80172334 +80172334 +80172334 +80030508 +800c0e12 +800c0e12 +8008101e +80040812 +80040812 +800b1c3c +80414444 +800a2458 +800a2458 +800e1c3e +8008101e +8008101e +80050b16 +80050b16 +800a2458 +8003050a +80050b16 +8003050a +80646768 +80111c32 +800a1730 +80050c20 +80212c3c +8013336a +80040812 +80070c14 +80050c20 +80040812 +8008101e +80050c20 +8008101e +800c101c +80040812 +800a2458 +8008101e +80050c20 +80000314 +80152748 +800b1c3c +800b1c3c +80182b44 +80182b44 +80000314 +80152542 +80152542 +80172334 +800b1f44 +80152542 +8013336a +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80000000 +80000314 +80040812 +80030508 +80070c14 +80050c20 +8008101e +80030508 +8008101e +80040812 +800c101c +80070c14 +8008101e +8008101e +800b1c3c +80111c32 +80426ea6 +802f445e +800a142a +800a142a +800a142a +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +80132546 +80132546 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +800c0e12 +80152748 +80030508 +80050c20 +80030508 +8013336a +8013336a +80040812 +80040812 +80030508 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +8013336a +8008101e +8008101e +80070c14 +80040812 +80040812 +80040812 +800a1730 +80050c20 +80050c20 +800a142a +800a2458 +800a2458 +80050b16 +8022619e +800a1730 +80050b16 +8003050a +8003050a +8013336a +800a2458 +80152542 +80172334 +80070c14 +80040812 +80040812 +8008101e +80212c3c +80000314 +80040812 +80000314 +80000314 +80070c14 +80030508 +80040812 +80000314 +80030508 +80050c20 +80040812 +80030508 +80040812 +80030508 +80040812 +80030508 +80070c14 +80070c14 +80040812 +80072560 +801a2028 +800c101c +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80030508 +80040812 +80040812 +80070c14 +80070c14 +80040812 +8008101e +80040812 +80000314 +800d141e +8008101e +8013336a +8008101e +80070c14 +8008101e +800d141e +80111c32 +8005102e +80646768 +8022619e +8022619e +8022619e +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +80040b24 +80040b24 +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80040b24 +80070c14 +800c0e12 +80070c14 +80072560 +80040812 +80070c14 +800c0e12 +800c101c +800c101c +800d141e +80040812 +80111c32 +80111c32 +80111c32 +8013336a +8013336a +80050c20 +8008101e +80111c32 +80070c14 +80040812 +80040812 +80050c20 +800c101c +80111c32 +80111c32 +80152542 +800a1730 +800a1730 +8005102e +80414444 +80414444 +8022619e +8003050a +800a2458 +8003050a +8003050a +8003050a +800a1730 +8013336a +8013336a +80070c14 +80030508 +800a1730 +80030508 +80040812 +80030508 +80000000 +80030508 +80030508 +800d141e +80040812 +80050c20 +80000000 +8008101e +800b1c3c +8008101e +80030508 +80000314 +80030508 +80030508 +800a2458 +80030508 +800a2458 +80050c20 +80040812 +800b1c3c +800a2458 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80040812 +800a2458 +80050c20 +80070c14 +80040812 +8008101e +80040812 +80172334 +80070c14 +80070c14 +80070c14 +800a1730 +80030508 +800d141e +80070c14 +800c0e12 +80030508 +800a1730 +80111c32 +80132546 +80132546 +80040b24 +80040b24 +80040b24 +80050b16 +80050b16 +80050b16 +80476a78 +80476a78 +80476a78 +80476a78 +800e1b30 +800e1b30 +80476a78 +80476a78 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a142a +8006112c +8008101e +80070c14 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80050c20 +80182b44 +80070c14 +80040812 +80050c20 +80070c14 +80070c14 +80070c14 +80050c20 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80070c14 +8008101e +8008101e +80172334 +80070c14 +8013336a +8013336a +800a2458 +800a2458 +80070f1c +800c101c +800d141e +8022619e +8003050a +800d141e +8003050a +8003050a +8003050a +8013336a +80414444 +80566d82 +80243f74 +80040812 +80040812 +80040812 +80040812 +80030508 +80050c20 +80030508 +8008101e +80030508 +80030508 +80040812 +80040812 +80030508 +80313336 +80050c20 +80040812 +80030508 +80030508 +80030508 +80152748 +80050c20 +800b1c3c +8005102e +8013336a +800a1730 +80243f74 +800a1730 +8093b1d2 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +800d141e +80040812 +8013336a +80040812 +80111c32 +80182b44 +80040812 +80000314 +80000000 +80476a78 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80476a78 +80476a78 +80476a78 +800f1b28 +800f1b28 +800f1b28 +80476a78 +80476a78 +80476a78 +800e1c3e +800e1c3e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a2458 +800c101c +800a2458 +80070c14 +80040812 +80040812 +8008101e +80212c3c +80040812 +80040812 +80040812 +8008101e +80040812 +80040812 +8008101e +80050c20 +80050c20 +800a2458 +800a1730 +800a1730 +80030508 +80040812 +80040812 +800d141e +80030508 +80070c14 +80070c14 +800d141e +803f2f1a +800d141e +80243f74 +80001b60 +80050b16 +80264e88 +80111c32 +8003050a +80050b16 +80111c32 +8003050a +80414444 +8003050a +8093b1d2 +80313336 +80030508 +80050c20 +80050c20 +80040812 +80000314 +80040812 +80050c20 +80040812 +80030508 +80040812 +80040812 +800a1730 +8013336a +8008101e +80050c20 +80050c20 +80050c20 +80050c20 +8004266a +80040812 +800b1c3c +80050c20 +80050c20 +801c2c50 +8008101e +80050c20 +80000314 +800a1730 +800a2458 +80414444 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80050c20 +8008101e +8008101e +80040812 +80050c20 +8008101e +80030508 +80040812 +80040812 +80050c20 +80040812 +80072560 +80040812 +8013336a +80040812 +80040812 +80040812 +800a2458 +80040812 +80476a78 +80476a78 +80476a78 +80476a78 +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800a142a +80070c14 +80172334 +80072560 +80050c20 +8013336a +80111c32 +80030508 +80111c32 +80030508 +80030508 +80212c3c +80040812 +80030508 +80000000 +80000000 +800c0e12 +80040812 +80040812 +800c101c +8013336a +8013336a +80111c32 +80264e88 +80264e88 +8008101e +8008101e +80040812 +80040812 +80040812 +80000314 +80000314 +80000314 +80050c20 +80050c20 +80000314 +8003050a +80050b16 +8003050a +80030508 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80030508 +80040812 +80030508 +80070c14 +80040812 +8008101e +80030508 +80040812 +80030508 +80030508 +80070c14 +80000314 +80072560 +8030537e +80233654 +8005102e +8005102e +800a1730 +80050c20 +80040812 +80040812 +80070c14 +80070c14 +8008101e +80000314 +80414444 +80050c20 +80040812 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +8008101e +80070c14 +80070c14 +80040812 +80030508 +80040812 +80070c14 +8013336a +800d141e +80040812 +8008101e +80040812 +80000314 +800a1730 +80050c20 +80070c14 +800a1730 +800a1730 +8013336a +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80476a78 +80476a78 +80476a78 +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800e1b30 +800d141e +800c101c +80030508 +80000000 +80070c14 +80040812 +80040812 +800a1730 +800a1730 +80111c32 +80111c32 +8008101e +8008101e +80040812 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80030508 +8008101e +8008101e +80070c14 +80040812 +80030508 +80030508 +80050c20 +80040812 +80040812 +80040812 +800b1c3c +800b1c3c +80050b16 +80050b16 +80050b16 +80050c20 +80050b16 +80030508 +80000000 +80000000 +80000000 +8003050a +80000000 +800a2458 +80000314 +80313336 +80040812 +8008101e +80070c14 +8008101e +80040812 +80040812 +80040812 +80070c14 +80040812 +80040812 +80070c14 +80030508 +80040812 +80050c20 +800b1c3c +80172334 +80030508 +80212c3c +801f366e +80030508 +80040812 +80172334 +80000000 +80030508 +801f366e +80253444 +80040812 +80426ea6 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +8008101e +80070c14 +80040812 +8008101e +80030508 +80030508 +80030508 +80070c14 +80030508 +80040812 +800c101c +80000314 +80172334 +800a2458 +800c0e12 +8093b1d2 +80001778 +80001778 +80476a78 +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800a142a +80132546 +80132546 +80132546 +80132546 +80001778 +80001778 +80001778 +80132546 +80132546 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +80264e88 +800a1730 +80040812 +80070c14 +80040812 +80050c20 +80030508 +80030508 +80000314 +80040812 +80040812 +80030508 +800a2458 +80030508 +80030508 +80050c20 +80040812 +80040812 +80030508 +80000314 +80000314 +80000314 +80030508 +80030508 +80050c20 +8008101e +80040812 +80040812 +80040812 +80030508 +8003050a +8003050a +8003050a +8003050a +80040812 +80050b16 +800a1730 +800b1c3c +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +800a2458 +80030508 +800a2458 +80030508 +80030508 +80172334 +80030508 +80000000 +80072560 +80030508 +80000000 +80072560 +80000000 +80000000 +80040812 +8008101e +800a2458 +80455c78 +80182b44 +80070c14 +802d487e +8013336a +80040812 +80070c14 +800d141e +8013336a +8008101e +80182b44 +80050c20 +8005102e +8005102e +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80152748 +80030508 +80072560 +80030508 +80111c32 +80040812 +8013336a +80030508 +8013336a +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80172334 +80050c20 +80313336 +80132546 +80001778 +80001778 +80001778 +80001778 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8022619e +8022619e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000314 +80050c20 +80030508 +80070c14 +80040812 +80040812 +80030508 +80030508 +80040812 +80040812 +80030508 +80070c14 +80030508 +80030508 +8008101e +80030508 +80030508 +80070c14 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80000000 +8008101e +80050b16 +80050c20 +80050b16 +80040812 +80070c14 +8022619e +8008101e +80214062 +80172334 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +800a2458 +800a2458 +80111c32 +800a2458 +80050c20 +80152748 +80030508 +80040812 +800c101c +80040812 +8008101e +8013336a +80040812 +80050c20 +80030508 +80111c32 +80152542 +80152748 +800b1c3c +800b1c3c +8008101e +8013336a +8008101e +8008101e +80000314 +80172334 +8005102e +80414444 +800a1730 +80646768 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111c32 +80414444 +8008101e +80070c14 +800c101c +80001f6e +80050c20 +80030508 +80000314 +80040812 +80040812 +80030508 +8008101e +80050c20 +80072560 +8013336a +80111314 +802d487e +800c1626 +80152748 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +80132546 +80132546 +802d67b4 +802d67b4 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070f1c +80313336 +80030508 +80030508 +80030508 +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80000314 +80000314 +80040812 +800a2458 +800a2458 +80040812 +80040812 +80040812 +80030508 +80050c20 +80050c20 +800a2458 +800a2458 +80050b16 +80050b16 +80050b16 +8022619e +80030508 +8022619e +80030508 +80030508 +80030508 +800a1730 +800a1730 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80313336 +800b1c3c +800a2458 +80000314 +8005102e +80050c20 +8008101e +80000314 +80030508 +80030508 +80030508 +80000314 +80030508 +80040812 +80000314 +80050c20 +800a2458 +80111c32 +80414444 +800b1c3c +80414444 +800b1c3c +80040812 +8008101e +80050c20 +80111c32 +800a2458 +8005102e +800b1c3c +803e4550 +80152748 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80040812 +80040812 +80070c14 +80070c14 +80111c32 +8008101e +800a2458 +800c101c +80070c14 +80070c14 +80000314 +80040812 +80040812 +80070c14 +80030508 +80111c32 +8013336a +80384d76 +80152542 +8022619e +8022619e +8022619e +80132546 +80132546 +80132546 +80132546 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +800a142a +800a142a +80070f1c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80070f1c +80050c20 +8008101e +800a1730 +80040812 +80040812 +80040812 +80070c14 +800d141e +800d141e +80040812 +80040812 +80000000 +80070c14 +80072560 +80070c14 +80070c14 +8008101e +80111520 +800d141e +80030508 +80030508 +80030508 +80000000 +800e1b30 +800e1b30 +80070c14 +800e1b30 +80172334 +80172334 +80050b16 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80050c20 +800b1c3c +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80001164 +800a1730 +803b6492 +8008101e +80040812 +80050c20 +80040812 +80050c20 +80030508 +80040812 +80040812 +800a1730 +80000314 +80070c14 +80040812 +8008101e +80040812 +80050c20 +800a2458 +80050c20 +803b6492 +80313336 +8008101e +80050c20 +8008101e +80111c32 +8013336a +8005102e +803e4550 +8023527e +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80050c20 +80070c14 +80070c14 +8008101e +80111c32 +80000314 +80000314 +800d141e +80040812 +80030508 +80030508 +80000000 +80030508 +80040812 +80030508 +80040812 +80070c14 +801a2028 +800c101c +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +80070f1c +80070f1c +80070f1c +80070f1c +800a142a +800a142a +800a142a +800a142a +80476a78 +80476a78 +800e1b30 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80233654 +80030508 +800d141e +80030508 +80000000 +80072560 +80000000 +80072560 +80072560 +8008101e +8013336a +8013336a +80070c14 +80070c14 +80070c14 +8008101e +800c101c +800c101c +80030508 +8008101e +8008101e +800e1c3e +800e1c3e +80070f1c +80040812 +80070f1c +8008101e +8008101e +80050c20 +800a2458 +800a2458 +8005102e +8005102e +80050c20 +8005102e +8008101e +8008101e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000314 +80000314 +80050c20 +8005102e +80040812 +80050c20 +80070c14 +80050c20 +8008101e +80050c20 +80040812 +80040812 +80050c20 +8008101e +80070c14 +80000314 +800c0e12 +80030508 +8008101e +801a2028 +80030508 +80313336 +80030508 +80030508 +800a2458 +80040812 +800c0e12 +8008101e +800a2458 +80253444 +801c2c50 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80131920 +800d141e +80040812 +80040812 +80111c32 +80040812 +800a1730 +800a2458 +8013336a +8005102e +800b1f44 +8008101e +80111c32 +800a1730 +800a2458 +80050c20 +800a1730 +80111c32 +800a2458 +80070f1c +80070f1c +800a142a +800a142a +800a142a +800a142a +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +800b1c3c +800b1c3c +80050c20 +80152748 +80030508 +80030508 +80040812 +80070c14 +8008101e +8008101e +80030508 +80040812 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80070c14 +80030508 +80132030 +800e1c3e +800e1c3e +80000314 +80050b16 +80070c14 +80050c20 +8006112c +80040812 +80050c20 +80050c20 +80050c20 +8008101e +8008101e +80040812 +80050c20 +80050c20 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +800a2458 +80000000 +800a1730 +80000314 +80030508 +80050c20 +80040812 +80030508 +8013336a +80111c32 +80030508 +80072560 +800d141e +80172334 +80414444 +80172334 +80212c3c +80172334 +80172334 +80253444 +80253444 +80212c3c +8013336a +80172334 +8008101e +80206398 +80050c20 +80070c14 +80050c20 +800a1730 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800b1c3c +80070c14 +80070c14 +80040812 +80000314 +80000314 +80040812 +80070c14 +800a2458 +80030508 +80000314 +80040812 +80030508 +80040812 +80050c20 +8013336a +8013336a +80243f74 +800b1f44 +800e1c3e +80070f1c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +8022619e +8022619e +800e1626 +800e1626 +800e1626 +80182d4c +80182d4c +80182d4c +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80414444 +80000314 +8005102e +80040812 +80000314 +80030508 +80030508 +80000314 +80000314 +80000314 +80040812 +80040812 +80030508 +80000314 +80030508 +80040812 +80040812 +80040812 +8022619e +8022619e +80030508 +800a142a +80040812 +80040812 +80000314 +800a1730 +80000314 +80000314 +80000314 +80070c14 +80070c14 +80040812 +800a2458 +80000314 +8005102e +80040812 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +80152748 +80233654 +80111c32 +80212c3c +80072560 +80152748 +80070c14 +80070c14 +8008101e +800a2458 +80040812 +80040812 +80070c14 +8008101e +8008101e +80040812 +80152542 +8008101e +80152542 +8008101e +80111c32 +80040812 +8008101e +80070c14 +8008101e +8013336a +8013336a +800a2458 +8013336a +80050c20 +800a2458 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80070c14 +8008101e +80030508 +80030508 +80040812 +80030508 +80050c20 +80070c14 +8005102e +8005102e +80040812 +80000314 +8008101e +800a1730 +800a1730 +80050c20 +800a2458 +800a1730 +80000000 +800e1b30 +80050b16 +8022619e +8022619e +800e1626 +800e1626 +800e1626 +800e1626 +80182d4c +80182d4c +80182d4c +80182d4c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005123e +800e1c3e +800a2458 +80050c20 +80050c20 +80040812 +80070c14 +80040812 +80040812 +80000314 +80030508 +80000314 +80070c14 +80000314 +80000314 +80000314 +80070f1c +800e1b30 +800e1b30 +80040812 +800a142a +80050c20 +80030508 +800a142a +80050c20 +800a2458 +80030508 +80030508 +80030508 +80212c3c +80040812 +800d141e +80040812 +80040812 +80040812 +80050c20 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +80050c20 +80070c14 +80050c20 +8030537e +800a1730 +80152542 +800a2458 +800a2458 +80111c32 +800a2458 +800a2458 +800a2458 +8008101e +80040812 +8008101e +80040812 +802d487e +80172334 +80111c32 +800a2458 +800a1730 +80172334 +8013336a +800a2458 +80111c32 +80070c14 +8013336a +8008101e +800a1730 +800b1c3c +800a2458 +80072560 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80264e88 +80070c14 +8008101e +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80050c20 +8005102e +80050c20 +8008101e +8008101e +80172334 +80040812 +801f366e +80030508 +8092a4b4 +80476a78 +80182d4c +800e1626 +80070f1c +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800a142a +800a142a +800a142a +800a142a +800a142a +80030718 +80030718 +80030718 +80030718 +8000041c +8000041c +8000041c +800e1b30 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +800a2458 +80050c20 +8005102e +8008101e +800a2458 +80030508 +80030508 +80050c20 +80030508 +80030508 +80030508 +80070c14 +80050b16 +80040812 +800e1b30 +800e1b30 +80030508 +800a142a +80030508 +802b2e32 +802b2e32 +80111c32 +801c2c50 +801c2c50 +800d141e +80111c32 +80456a86 +80456a86 +80253444 +80253444 +80253444 +80253444 +8013336a +8013336a +8008101e +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +8008101e +80050c20 +80233654 +802d487e +8050718a +80152748 +80111c32 +800b1c3c +8013336a +800a2458 +80040812 +80111c32 +80070c14 +8008101e +802d487e +8013336a +80182b44 +8013336a +8013336a +8008101e +800d141e +800a1730 +80172334 +800a1730 +800a1730 +800d141e +800a2458 +80172334 +8013336a +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800b1c3c +80030508 +80111c32 +80000000 +800d141e +8008101e +8013336a +80030508 +8008101e +800a2458 +80233654 +80040812 +80072560 +80030508 +800d141e +8008101e +80182b44 +80050c20 +80152542 +8006112c +80476a78 +80030718 +80030718 +80030718 +80030718 +80030718 +8000041c +8000041c +8000041c +8000041c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80030718 +80030718 +80030718 +80030718 +80030718 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +80030718 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80000000 +80000314 +80030508 +80152542 +80072560 +800d141e +802b2e32 +80072560 +800d141e +80172334 +80040b24 +80040b24 +8008101e +80132546 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80070c14 +800a2458 +800a2458 +800a2458 +800a2458 +8013336a +800a2458 +800a2458 +8008101e +80414444 +80414444 +800a2458 +8013336a +8013336a +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80152542 +800b1c3c +80111c32 +80182b44 +800a2458 +8013336a +80646768 +80172334 +800a1730 +800a2458 +8013336a +80182b44 +8093b1d2 +80152542 +80111c32 +80172334 +8013336a +8008101e +8013336a +80070c14 +80070c14 +80414444 +8013336a +80070c14 +80040812 +80040812 +80040812 +80000000 +80040812 +802d487e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800a2458 +80000314 +800a2458 +8008101e +80040812 +80040812 +80040812 +80070c14 +80040812 +800a1730 +80040812 +80152748 +800a1730 +80050c20 +8008101e +800b1c3c +800a1730 +80414444 +800a1730 +800a142a +80040b24 +800e1c3e +8000010c +80040b24 +80030718 +80476a78 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +80030718 +80030718 +80030718 +8000010c +8000010c +8000010c +8000010c +8000010c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80040812 +8008101e +8008101e +80070c14 +800a2458 +800a2458 +80040812 +80030508 +80476a78 +8013336a +800e1b30 +800e1b30 +80111c32 +80476a78 +80050c20 +8008101e +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +80050c20 +80070c14 +800a2458 +8013336a +8008101e +8013336a +8013336a +800a2458 +80111c32 +8008101e +80182b44 +800b1c3c +800b1c3c +80152748 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152542 +80214062 +80172334 +80030508 +80070c14 +800c101c +80040812 +8008101e +800d141e +801a2028 +80030508 +800d141e +800d141e +80070c14 +80040812 +800c101c +80111520 +80172334 +80030508 +80253444 +80264e88 +80040812 +80070c14 +80414444 +8008101e +80070c14 +80111c32 +80414444 +80040812 +80414444 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +8008101e +8008101e +80000000 +8013336a +80000314 +800a1730 +80040812 +80040812 +80040812 +80040812 +80646768 +800a2458 +8008101e +8008101e +800a1730 +800b1c3c +8016284e +80414444 +80050b16 +8003050a +80030718 +8000010c +80476a78 +80000000 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030718 +8006112c +80050c20 +8024477a +80152542 +800a2458 +800a1730 +80182d4c +80182d4c +800a142a +800a142a +80111c32 +80070c14 +80111c32 +80111c32 +80111c32 +8013336a +8013336a +800a2458 +800a1730 +80040812 +8013336a +8013336a +8013336a +800a2458 +8008101e +80414444 +800b1c3c +800a2458 +800b1c3c +800b1c3c +800a1730 +80646768 +80646768 +80111c32 +80111c32 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80628196 +80111c32 +800a2458 +800b1c3c +80050c20 +8008101e +80111c32 +80152542 +80070c14 +800a1730 +803f2f1a +8008101e +80111c32 +80111c32 +8013336a +800a2458 +800a1730 +80050c20 +80111c32 +8013336a +80070c14 +800a2458 +80040812 +80050c20 +800d141e +80040812 +80111c32 +80050c20 +80000314 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80040812 +80030508 +80040812 +80030508 +800a2458 +80030508 +80070c14 +80030508 +8008101e +80313c48 +8013336a +80172334 +80313336 +80030508 +80040812 +800c0e12 +8008101e +801a2028 +800b1c3c +80070f1c +80030718 +8003050a +8000010c +80070f1c +80132030 +80050b16 +800a142a +800a142a +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +80001778 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80111c32 +80152748 +800a142a +800a142a +80476a78 +80476a78 +80001778 +80001778 +800e1c3e +80070c14 +8013336a +800a2458 +80426ea6 +80040812 +80182b44 +8013336a +8013336a +8013336a +80182b44 +800a1730 +8013336a +80111c32 +80111c32 +80050c20 +8013336a +8008101e +802d487e +800d141e +800d141e +800d141e +8008101e +800c0e12 +800c0e12 +80050b16 +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80426ea6 +80395486 +800a1730 +80182b44 +800a2458 +8013336a +80050c20 +8008101e +80152748 +80172334 +80040812 +8093b1d2 +80050c20 +80414444 +80152748 +80414444 +800a1730 +80070c14 +80414444 +80070c14 +8004266a +8023527e +80000314 +80070c14 +8008101e +800a2458 +80131920 +800a1730 +8008101e +80000314 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802f445e +801f345c +80072560 +8013336a +80253444 +801c2c50 +80040812 +80040812 +8008101e +80040812 +8008101e +800a2458 +80152748 +800b1f44 +8013336a +80070c14 +80050c20 +80070c14 +8013336a +800a2458 +80070f1c +801e282c +80050b16 +8000010c +80050b16 +800e1b30 +8000010c +80050b16 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +800a142a +800a142a +800a142a +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +8022619e +8022619e +00000000 +00000000 +80000000 +80426ea6 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80132546 +80132546 +80001778 +80001778 +800a1730 +800a1730 +800c101c +80070c14 +800d141e +801a2028 +80040812 +800d141e +80040812 +80111520 +80111520 +800d141e +80030508 +80070c14 +801a2028 +800a1730 +80050c20 +80050c20 +8008101e +80152748 +80152748 +80152542 +8013336a +800b1c3c +80111c32 +80000000 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8004266a +800b1c3c +80264e88 +80030508 +80050c20 +800a1730 +800a1730 +8008101e +800b1c3c +80111c32 +80050c20 +800a1730 +800a2458 +800a2458 +800a1730 +8005102e +800b1c3c +80111c32 +80040812 +80072560 +80152542 +800b1c3c +8008101e +80040812 +800d141e +80131920 +8008101e +8008101e +80050c20 +80050c20 +8008101e +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80050c20 +800a1730 +8013336a +80111c32 +80111c32 +800a2458 +80040812 +80070c14 +80040812 +80426ea6 +80111c32 +80072560 +80111c32 +800a2458 +800a2458 +800a2458 +800a1730 +800a2458 +80072560 +8000010c +80070f1c +8000010c +8006112c +80030718 +800f1b28 +80050b16 +80030718 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80001778 +80001778 +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +80050b16 +80050b16 +80050b16 +80050b16 +804d6f9e +804d6f9e +804d6f9e +801e335e +802d67b4 +802d67b4 +80132546 +80132546 +8022619e +8022619e +8022619e +8022619e +800e1b30 +800e1b30 +800a2458 +80182b44 +80111c32 +80111c32 +8093b1d2 +80111c32 +800a1730 +800a2458 +80414444 +8008101e +800a1730 +8093b1d2 +8093b1d2 +800a1730 +80313336 +8093b1d2 +80050c20 +80040812 +800a1730 +800a1730 +8005102e +80172334 +80172334 +800d141e +80111c32 +80000000 +80000000 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80006392 +800b1c3c +80050c20 +80006392 +80050c20 +800b1c3c +800a1730 +800a2458 +80152542 +800b1c3c +800b1c3c +800a1730 +800a1730 +800b1c3c +800a1730 +800b1c3c +800a1730 +800a1730 +80040812 +800b1c3c +8008101e +80111c32 +80040812 +80040812 +8013336a +80050c20 +80070c14 +80040812 +800a2458 +800a2458 +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1c3c +80182b44 +80182b44 +80172334 +800a1730 +800b1c3c +8008101e +8008101e +8013336a +8008101e +80172334 +80172334 +8013336a +800d141e +80072560 +8013336a +800d141e +8008101e +800b1f44 +800b1c3c +800e1626 +8022619e +8022619e +8022619e +800e1b30 +8022619e +80476a78 +80050b16 +8000010c +80050b16 +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +800e1b30 +800a142a +800a142a +80070f1c +80070f1c +800a142a +800a142a +800a142a +800e1b30 +800e1b30 +802d67b4 +802d67b4 +80132546 +800b1c3c +80111c32 +80152542 +80414444 +80414444 +800a1730 +80152748 +80172334 +80111c32 +80111c32 +80414444 +80111c32 +80050c20 +80050c20 +8005102e +800a1730 +800a1730 +8008101e +80050c20 +800a1730 +800a2458 +800a1730 +80111c32 +80111c32 +800a1730 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +800a2458 +8008101e +8008101e +8093b1d2 +8008101e +8008101e +80111c32 +8013336a +800a2458 +800a2458 +80070c14 +80050c20 +800b1c3c +80070c14 +80040812 +80030508 +80070c14 +80040812 +80030508 +8008101e +8008101e +800c0e12 +8008101e +80111c32 +80000000 +80030508 +80070c14 +800a1730 +800a2458 +80426ea6 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111c32 +80172334 +800a2458 +800c101c +800c0e12 +8008101e +80040812 +800c101c +800d141e +801a2028 +801a2028 +800c0e12 +80070c14 +80212c3c +80030508 +800c101c +80030508 +80030508 +80030508 +80030508 +800e1c3e +800a142a +800e1b30 +800a142a +800e1c3e +801e335e +800e1626 +80476a78 +80050b16 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8022619e +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80476a78 +800a142a +800a142a +80070f1c +80070f1c +800a142a +800a142a +800a1730 +800a1730 +800a1730 +8005102e +80050c20 +80050c20 +80050c20 +80050c20 +800a1730 +800a1730 +80050c20 +80050c20 +800a2458 +800a2458 +800b1c3c +800b1c3c +800a2458 +800a2458 +800a1730 +800b1c3c +800a1730 +800a1730 +80050c20 +8008101e +80000000 +80000000 +80000000 +80050b16 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +800a1730 +80111c32 +80030508 +8013336a +80030508 +80131920 +80111c32 +80030508 +80414444 +80426ea6 +800b1f44 +800a1730 +800b1f44 +800a1730 +80152748 +80414444 +800a1730 +80233654 +80426ea6 +80233654 +80152542 +80264e88 +80182b44 +80000314 +80050c20 +800b1c3c +80646768 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80070c14 +801c2c50 +800a1730 +8008101e +80111c32 +80070c14 +800a1730 +80070c14 +80111c32 +8013336a +800a2458 +80050c20 +8013336a +80070c14 +800c101c +80050c20 +80050c20 +80050c20 +80040812 +8006112c +80040b24 +80070f1c +80182d4c +800e1626 +80040b24 +80001778 +800a142a +80070f1c +80070f1c +80070f1c +80050b16 +80132546 +80132546 +80132546 +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +80182d4c +800e1626 +800e1626 +8022619e +8022619e +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800a1730 +800b1c3c +800a1730 +8013336a +8008101e +80000314 +80000314 +800b1c3c +80050c20 +8005102e +8005102e +8005102e +800a2458 +800a2458 +80050c20 +80040812 +80050c20 +80050c20 +80070c14 +800a2458 +800a2458 +80000314 +80040812 +80050c20 +80000000 +80000000 +80000000 +80000000 +8003050a +80050b16 +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80313336 +8005102e +80050c20 +80040812 +80111c32 +80050c20 +800a2458 +80050c20 +80050c20 +80061744 +80313336 +80050c20 +80030508 +80000314 +8013336a +800b1f44 +80050c20 +80000314 +800a1730 +8005102e +80414444 +80050c20 +800a2458 +80050c20 +80000314 +80050c20 +80000314 +80000314 +8004266a +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80245b7e +800b1c3c +8008101e +800a2458 +800a1730 +800a1730 +800a2458 +800a2458 +80111c32 +800a1730 +800b1c3c +801c2c50 +8013336a +80152542 +80000314 +80040812 +800a2458 +800a2458 +80000314 +80000314 +8006112c +80040b24 +80476a78 +80476a78 +800e1b30 +800e1626 +80050b16 +802e3e46 +8000010c +800e1b30 +8000010c +80050b16 +80000000 +800e1b30 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +800e1b30 +800e1b30 +8000041c +80030718 +80030718 +800a142a +800a142a +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +80182d4c +80182d4c +800e1626 +8022619e +80070c14 +800a2458 +80030508 +800a1730 +80030508 +800c0e12 +80030508 +80040812 +80030508 +8008101e +80050c20 +80040812 +80000000 +80000000 +80030508 +80000000 +800b1f44 +80000000 +80426ea6 +80426ea6 +80426ea6 +80006392 +80414444 +80414444 +8093b1d2 +80000000 +80000000 +8000010c +8000010c +80000000 +80050b16 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f3b62 +80031b58 +80061744 +80152542 +80646768 +80050c20 +80313336 +8005102e +80050c20 +800b1c3c +80050c20 +8005102e +80030508 +80000000 +80050c20 +80111c32 +80050c20 +80050c20 +800a1730 +80152542 +80111c32 +80050c20 +800b1c3c +80646768 +80040812 +800a2458 +800a1730 +80070c14 +800a1730 +80050c20 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80006392 +800b1c3c +80006392 +8093b1d2 +800a1730 +80111c32 +800b1c3c +800a2458 +80050c20 +80050c20 +8013336a +800a1730 +80414444 +800a1730 +8008101e +800a1730 +80131920 +80072560 +80050c20 +8008101e +8003050a +80050b16 +800e1b30 +80070f1c +8003050a +80183b84 +80132030 +800f1b28 +800e1626 +80132546 +80050b16 +8003050a +00000000 +80183b84 +80182d4c +80182d4c +80182d4c +80182d4c +8000010c +80030718 +80030718 +80476a78 +80476a78 +80030718 +800e1b30 +800e1b30 +8000041c +8000041c +80030718 +800a142a +800a142a +80050b16 +80050b16 +80050b16 +80426ea6 +800a1730 +8005102e +800a1730 +8016284e +80414444 +800a1730 +8005102e +8013336a +80050c20 +800a2458 +8005102e +8005102e +800a2458 +800a2458 +80070c14 +8005102e +800a2458 +8005102e +80001164 +80313336 +8005102e +80313336 +80212426 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +80384d76 +800b1c3c +80006392 +80484646 +800b1c3c +80152748 +8005102e +80050c20 +80050c20 +8005102e +80313336 +800a1730 +8005102e +80000314 +8008101e +800b1c3c +8005102e +800b1c3c +80414444 +80646768 +800a1730 +80050c20 +80313336 +800a1730 +80000314 +80050c20 +80040812 +80030508 +80030508 +80040812 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +800a2458 +8005102e +8008101e +8008101e +800d141e +80040812 +80050c20 +80000000 +80070c14 +800c0e12 +80070c14 +80030508 +8008101e +80030508 +80070c14 +80030508 +80070c14 +80030508 +8008101e +8006112c +80070f1c +800e1b30 +80132546 +80476a78 +800e1c3e +80182d4c +801e3b60 +80132546 +8000010c +800e1c3e +800e1c3e +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +8000010c +80030718 +80030718 +80476a78 +80476a78 +80030718 +8006112c +8006112c +8028497c +8028497c +80050c20 +800b1c3c +8013336a +800b1f44 +80395486 +803e4550 +80414444 +80050c20 +8030537e +80245b7e +80030508 +80050c20 +80070c14 +80000000 +8005102e +800a1730 +800a1730 +80030508 +80040812 +80000000 +8093b1d2 +800a1730 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +800b1c3c +803e4550 +80646768 +80030508 +80040812 +80040812 +80030508 +80040812 +800a1730 +80030508 +800b1c3c +800a2458 +80040812 +800a2458 +80040812 +80030508 +8013336a +8093b1d2 +80030508 +800a1730 +800a1730 +80040812 +800a1730 +800b1f44 +8008101e +80040812 +80111c32 +80070c14 +80050c20 +800a2458 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80304f74 +80244882 +800a1730 +801c2c50 +800a1730 +80172334 +80001164 +803b6492 +80646768 +80264e88 +800a1730 +80414444 +80414444 +80426ea6 +803f2f1a +80264e88 +80414444 +80111c32 +80646768 +800a1730 +800e1626 +80132030 +8006112c +80040b24 +80030718 +800e1b30 +80050b16 +8022619e +8022619e +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +800e1c3e +800e1b30 +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +800e1c3e +803e4550 +800b1f44 +8008101e +80152542 +80050c20 +80414444 +800a2458 +80050c20 +8008101e +80040812 +80000314 +800a2458 +80050c20 +80050c20 +8005102e +80050c20 +80050c20 +800a1730 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80050b16 +80050b16 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80414444 +80384d76 +80030508 +80414444 +80050c20 +80414444 +80070c14 +803b6492 +80214062 +80152542 +803a5d88 +80040812 +80233654 +800b1c3c +800a1730 +800a1730 +80426ea6 +80426ea6 +800a1730 +800a1730 +8005102e +800a2458 +80030508 +80212426 +80006392 +80111c32 +8008101e +80050c20 +80313336 +80050c20 +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f3b62 +8005194c +80152542 +800b1c3c +80313336 +800a1730 +80313336 +8005102e +80313336 +80050c20 +80111c32 +8013336a +80070c14 +800a2458 +80111c32 +80050c20 +80050c20 +800a2458 +80000314 +80050c20 +80050b16 +80030718 +8006112c +8006112c +8006112c +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +8022619e +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +800e1c3e +800e1b30 +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8006112c +8006112c +8006112c +8006112c +80030508 +80030508 +80070c14 +80030508 +8008101e +80030508 +800a2458 +80050c20 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050b16 +8003050a +8003050a +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +800b1c3c +8005102e +80050c20 +8005102e +80050c20 +80000314 +80070c14 +80000314 +800b1c3c +800a2458 +80152748 +800a1730 +80212426 +80061744 +800b1c3c +800b1c3c +80384d76 +80646768 +80414444 +80313336 +800a1730 +800b1c3c +800b1c3c +80050c20 +80050c20 +80040812 +80182b44 +80313336 +800a2458 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +8004266a +80111c32 +8005102e +800b1c3c +8005194c +8005102e +8005102e +80050c20 +8008101e +8016284e +800b1c3c +800a2458 +80050c20 +80000314 +80001164 +800a1730 +8005102e +800e1b30 +80476a78 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +80132546 +8006112c +8006112c +8006112c +800e1b30 +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +80001778 +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8000041c +8000041c +8000041c +80040b24 +80040b24 +80040b24 +80040b24 +80070f1c +80111c32 +80646768 +800a1730 +801f3b62 +800a1730 +80061744 +80050c20 +80152748 +80182b44 +80182b44 +80313336 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80384d76 +800b1f44 +801f345c +800c1626 +8008101e +800b1c3c +80050c20 +800b1c3c +80414444 +800b1c3c +800a1730 +800b1c3c +80313336 +800b1f44 +80646768 +8004266a +80152748 +80414444 +80646768 +80152748 +800b1f44 +80384d76 +8005102e +80334b60 +8006528a +80006392 +8004266a +80061744 +8005102e +8013336a +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +8013336a +80030508 +80040812 +80030508 +80070c14 +80040812 +800a1730 +80030508 +80030508 +80030508 +80414444 +80030508 +8008101e +80000000 +80070f1c +80070f1c +801e335e +804d6f9e +80183b84 +80183b84 +80001778 +800e1b30 +800e1b30 +80476a78 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +80132546 +8006112c +8006112c +8006112c +800e1b30 +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +80001778 +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8000041c +8000041c +800b1f44 +80000314 +80646768 +8005102e +800a2458 +80313336 +80050c20 +8005102e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +8000010c +8003050a +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +800b1c3c +800b1f44 +80152542 +800a1730 +800b1f44 +8093b1d2 +800a2458 +800b1c3c +800a2458 +80152748 +800a1730 +80050c20 +80050c20 +800a1730 +80414444 +800b1f44 +801f345c +80646768 +800a1730 +800b1c3c +802d487e +80163f82 +800b1c3c +80414444 +8005102e +8013336a +800a1730 +80000314 +80000314 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +8005102e +800a2458 +800b1c3c +80070c14 +80040812 +800a2458 +80050c20 +80414444 +80050c20 +800b1c3c +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +800e1b30 +800e1b30 +80070f1c +801e335e +801e335e +804d6f9e +80183b84 +80001778 +80001778 +800e1b30 +80476a78 +80476a78 +800e1b30 +800a142a +800a142a +800a142a +80132546 +80132546 +8006112c +8006112c +8006112c +800e1b30 +80040b24 +80040b24 +801e335e +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000010c +8000010c +8000010c +8000010c +80030718 +80030718 +80030718 +80030718 +8000010c +8000010c +8000010c +8005102e +80000314 +800b1c3c +80244882 +80313336 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80050b16 +8003050a +80000000 +8003050a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1f44 +800a2458 +80414444 +80050c20 +80050c20 +800b1c3c +80050c20 +800a2458 +8013336a +800b1c3c +80152542 +800a2458 +800a2458 +80030508 +80030508 +80111c32 +80172334 +80040812 +8013336a +80050c20 +80030508 +800b1c3c +800a1730 +80000000 +801c2c50 +800a2458 +8013336a +80111c32 +80070c14 +80000314 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80212426 +8005102e +8008101e +80050c20 +800b1c3c +80313336 +800a1730 +80040b24 +8000041c +8005123e +8005123e +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8028497c +8006112c +800e1b30 +80070f1c +80070f1c +801e335e +804d6f9e +804d6f9e +80183b84 +80001778 +80001778 +800e1b30 +80476a78 +80476a78 +800e1b30 +800a142a +800a142a +800a142a +80132546 +80132546 +8006112c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +80050b16 +80050b16 +80050b16 +80050b16 +80000000 +80000000 +800a2458 +800a1730 +800a2458 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80050b16 +8003050a +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80172334 +800b1c3c +80001164 +80122354 +800a1730 +800a1730 +80384d76 +80646768 +80001164 +801f345c +80152542 +801f345c +80243f74 +80233654 +801f345c +800a1730 +80646768 +80414444 +80334b60 +8016284e +8005102e +801f345c +80111c32 +80050c20 +800b1c3c +80050c20 +801f345c +80111c32 +80050c20 +80111c32 +80646768 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a1730 +80061744 +80030718 +80030718 +8000010c +8000041c +8006112c +8006112c +8006112c +80070f1c +80040b24 +8000041c +8000041c +8005123e +8006112c +800e1b30 +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +8006112c +800e1b30 +80070f1c +801e335e +801e335e +804d6f9e +80183b84 +80183b84 +80001778 +800e1b30 +800e1b30 +80476a78 +800e1b30 +80253444 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +8006112c +8006112c +8006112c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80050b16 +80050b16 +8003050a +80050b16 +8000010c +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1c3c +800b1c3c +800b1c3c +80152542 +8005102e +800a1730 +8005102e +800a2458 +800a1730 +800a1730 +80313336 +800a1730 +8016284e +80426ea6 +80050c20 +80050c20 +800b1f44 +80313336 +80214062 +802f445e +8005102e +8005102e +800a2458 +80000314 +80050c20 +80426ea6 +800a2458 +800b1f44 +80214062 +802f445e +800b1f44 +80313336 +80050c20 +80050c20 +80000314 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +8006112c +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000041c +8000041c +8006112c +8006112c +80070f1c +80040b24 +80040b24 +8000041c +8005123e +8006112c +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8028497c +8006112c +800e1b30 +80070f1c +80070f1c +801e335e +804d6f9e +804d6f9e +80244882 +8016284e +8023538a +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +8003050a +8003050a +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800b1c3c +80414444 +80414444 +800a1730 +80050c20 +80414444 +800a1730 +80313336 +80050c20 +80313336 +80426ea6 +80304f74 +80061744 +80182b44 +80212426 +80264e88 +80414444 +80313336 +8005102e +8005102e +8005102e +80050c20 +80000314 +8005102e +80182b44 +80214062 +80152748 +800a1730 +8005102e +80111c32 +802d487e +80646768 +80214062 +8005102e +80646768 +80050c20 +800a2458 +80313336 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +80132546 +80132546 +80000314 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000010c +8000041c +8006112c +8006112c +80070f1c +80070f1c +80040b24 +8000041c +8000041c +8005123e +8006112c +800e1b30 +800e1b30 +800e1c3e +800e1c3e +8006112c +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +8006112c +80414444 +80050c20 +800a1730 +8004266a +80132546 +80132546 +80132546 +80132546 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +8005123e +8005123e +8005123e +8005123e +8005123e +801e3b60 +801e3b60 +801e3b60 +801e3b60 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +8003050a +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80070c14 +800a1730 +80050c20 +800b1c3c +8005102e +800b1f44 +80646768 +8005194c +803b6492 +8005102e +80214062 +800b1c3c +80646768 +8005102e +80182b44 +80152748 +80152542 +800b1f44 +8005102e +8005102e +800a1730 +80182b44 +8005102e +800b1c3c +80313336 +8005102e +80030508 +80061744 +801c2c50 +80646768 +80182b44 +80152542 +80152748 +800b1c3c +800a1730 +80182b44 +80152748 +80264e88 +80050c20 +800b1f44 +800a2458 +800b1c3c +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800d225e +80313336 +8005123e +80283e60 +80283e60 +80313336 +8005102e +80646768 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +80050b16 +8000010c +8000010c +80030718 +80030718 +8000010c +8000041c +8006112c +8006112c +8006112c +80070f1c +80040b24 +80040b24 +8000041c +8005123e +8006112c +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800b1c3c +80646768 +80006392 +80313336 +80264e88 +80152748 +801e3b60 +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +80225524 +80225524 +80225524 +80225524 +802e3e46 +802e3e46 +802e3e46 +802e3e46 +802e3e46 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80050b16 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80050c20 +80040812 +8005102e +80030508 +80070c14 +8005102e +80040812 +800a2458 +8008101e +800a1730 +80253444 +80072560 +8013336a +8013336a +8004266a +80050c20 +800a1730 +800a1730 +8008101e +8013336a +80040812 +800a1730 +800a2458 +80040812 +80070c14 +80000314 +800a2458 +80040812 +80000000 +80040812 +80030508 +80182b44 +80030508 +80233654 +800c0e12 +80040812 +80264e88 +80030508 +80000000 +80152542 +801f345c +80646768 +800b1c3c +80040812 +80030508 +80646768 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80225524 +800b1c3c +80313336 +80225524 +800d225e +801e3b60 +8005123e +80050c20 +8004266a +80072560 +80152542 +80172334 +8006112c +8006112c +80132546 +8006112c +80000000 +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000041c +8000041c +8006112c +8006112c +80070f1c +80070f1c +80040b24 +8000041c +8005123e +8005123e +8006112c +80050c20 +80050c20 +80030508 +8005102e +8008101e +800a2458 +802d487e +80414444 +80172334 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +805c788c +805c788c +805c788c +805c788c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80132546 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80030508 +8016284e +80000000 +80384d76 +80384d76 +80000000 +800b1c3c +80070c14 +80426ea6 +80040812 +80030508 +80243f74 +80313c48 +801c2c50 +80212c3c +800a1730 +80426ea6 +80050c20 +800b1c3c +800a2458 +80040812 +80111c32 +8016284e +800a1730 +80233654 +80030508 +80000000 +80061744 +80030508 +801f3b62 +80050c20 +80050c20 +80050c20 +80071126 +800a1730 +80000314 +800a2458 +8092a4b4 +800a1730 +80152542 +800a2458 +80414444 +80233654 +80050c20 +80152748 +801f345c +800a1730 +800b1c3c +80111c32 +80646768 +8016284e +80233654 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e3b60 +80040812 +80646768 +80000000 +80225524 +802e3e46 +802e3e46 +80225524 +800d225e +80384d76 +80000000 +80426ea6 +801c3d6e +80243f74 +80040812 +80426ea6 +80132546 +8006112c +80132546 +8006112c +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000010c +8000041c +8006112c +8006112c +80030508 +800b1c3c +80000000 +80426ea6 +80040812 +80111c32 +80030508 +80426ea6 +80214062 +80030508 +80455d86 +80050c20 +80455c78 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152542 +80030508 +80000314 +80050c20 +800b1c3c +80414444 +800a2458 +80304f74 +80050c20 +80111c32 +80313336 +8005102e +80000314 +8023538a +80646768 +80264e88 +80646768 +80050c20 +800b1c3c +80050c20 +800b1c3c +80050c20 +80426ea6 +80214062 +8008101e +80646768 +8006112c +802d67b4 +80050c20 +80313336 +80050c20 +80050c20 +80000314 +80182b44 +80050c20 +80000314 +80050c20 +800a2458 +80050c20 +80000314 +8005102e +80061744 +801c2c50 +801f345c +80304f74 +801c2c50 +800a2458 +8005102e +800a1730 +80152542 +80050c20 +80050c20 +8005102e +8005102e +800b1c3c +80152542 +8004266a +8005102e +80264e88 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80050c20 +80426ea6 +80182b44 +80061744 +80132546 +80182d4c +805c788c +80225524 +80225524 +802e3e46 +80426ea6 +80000314 +80050c20 +800a1730 +80313336 +801c2c50 +800a2458 +801c2c50 +800b1f44 +80132546 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +80050b16 +8000010c +8000010c +80030718 +80182b44 +80050c20 +80313336 +80050c20 +800a1730 +801c2c50 +8023538a +80006392 +80050c20 +8005102e +80152542 +800a1730 +80152542 +80000000 +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80001778 +80001778 +80001778 +80001778 +80001778 +80182d4c +80000000 +8000010c +80000000 +80000000 +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80000314 +80426ea6 +80313336 +80000314 +80152748 +800a1730 +80646768 +808498ae +800a1730 +80000314 +80000000 +8093b1d2 +8016284e +8004266a +80152542 +8005102e +80050c20 +80313336 +80050c20 +80050c20 +800a2458 +803e4550 +80111c32 +80233654 +8013336a +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +80050c20 +8005102e +80000314 +80050c20 +80000314 +80050c20 +80152542 +80000314 +800b1c3c +80152748 +800a2458 +80000314 +800a1730 +80414444 +800a1730 +80050c20 +80191718 +80152748 +80050c20 +8004266a +80000314 +80414444 +8005102e +8004266a +800b1f44 +80050c20 +8005102e +80050c20 +80061744 +8013336a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050b16 +80061744 +8004266a +80050c20 +8013336a +80111c32 +801e3b60 +801e3b60 +801e3b60 +80132546 +80182d4c +805c788c +80225524 +80050c20 +8013336a +80111c32 +8004266a +80313336 +80191718 +80061744 +80414444 +80071126 +800b1c3c +80646768 +80132546 +8006112c +8006112c +80132546 +8006112c +8005102e +80000314 +80646768 +800b1c3c +80071126 +80061744 +80061744 +80191718 +8016284e +80000314 +80050c20 +8093b1d2 +8013336a +80414444 +80111c32 +80000314 +80000314 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80050b16 +80182d4c +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800a1b5c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +800a1730 +8005102e +801c2c50 +801f3b62 +8016284e +801c2c50 +80061744 +80313336 +80050c20 +80050c20 +8005102e +8005102e +80646768 +800a2458 +8005102e +8005102e +80061744 +80384d76 +8004266a +80050c20 +80000314 +80071126 +80072560 +80506982 +800e1c3e +800d225e +804d6f9e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +802d67b4 +8028497c +80000314 +80000314 +80000314 +80000314 +8013336a +80000314 +802d487e +80182b44 +80050c20 +8005102e +800a1730 +8005102e +80152542 +800a1730 +8005102e +80061744 +80050c20 +80050c20 +80414444 +800b1c3c +80061744 +80384d76 +8005102e +80174b70 +80313336 +800b1f44 +80000314 +803f2f1a +800a2458 +8004266a +8004266a +80505b66 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +8004266a +800b1f44 +80050c20 +8004266a +800b1f44 +800a1730 +80001778 +80182d4c +801e335e +801e3b60 +801e3b60 +801e3b60 +80132546 +80182d4c +80050c20 +800a1730 +80002672 +8013336a +80495d68 +80426ea6 +80050c20 +800a1730 +80495d68 +800a1730 +80122354 +800a2458 +80253444 +802d487e +800a1730 +800a1730 +800a2458 +800a1730 +80050c20 +802d487e +800b1c3c +80172334 +801f3568 +8004266a +8004266a +800a2458 +800a1730 +8004266a +8013336a +80002672 +805a544a +801f3568 +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +805d90ba +800a1b5c +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +80001778 +80001778 +80001778 +80001778 +80001778 +8028497c +8028497c +80000000 +80000000 +00000000 +00000000 +80182b44 +80050c20 +80426ea6 +801f345c +8059636a +80172334 +80505b66 +80111c32 +8040586a +8013336a +80212c3c +80253444 +800a1730 +80001b6e +80414444 +80001b6e +80001b6e +800a1730 +80243f74 +801f366e +800b1c3c +800a2458 +802b3744 +800a2458 +8013336a +00000000 +00000000 +80040b24 +8005123e +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +80102e90 +800e1c3e +80415a86 +80476a78 +800e1b30 +8008101e +800a1730 +80182b44 +8008101e +800a1730 +802b3744 +8008101e +8013336a +80001b6e +8013336a +80111c32 +802b3744 +80001b6e +80414444 +805a544a +802d487e +80414444 +80495d68 +80001b6e +80111314 +802b3744 +80001b6e +80414444 +80456a86 +8005102e +8008101e +80040812 +802b3744 +80111c32 +80111c32 +8059636a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80050c20 +80050c20 +80040812 +80000314 +80040812 +800a2458 +80000314 +800e1c3e +80050b16 +80182d4c +80001778 +80182d4c +801e335e +801e335e +801e3b60 +801e3b60 +80000314 +80000314 +800a1730 +80040812 +800b1c3c +80050c20 +8008101e +8008101e +80414444 +80050c20 +800a1730 +80070c14 +80000314 +80426ea6 +80233654 +80050c20 +80050c20 +80000314 +80040812 +8005102e +80070c14 +80000314 +80050c20 +80050c20 +80000314 +80070c14 +80000314 +80050c20 +8005102e +800a1730 +8005102e +8028497c +80182d4c +8028497c +80182d4c +80182d4c +8028497c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800b1c3c +800b1c3c +800a2458 +801c2c50 +80050c20 +800a1730 +80050c20 +80000314 +80050c20 +80050c20 +80313336 +8023527e +80050c20 +80050c20 +8093b1d2 +80050c20 +80050c20 +80050c20 +80111c32 +80000314 +80040812 +80313336 +80050c20 +80000314 +8005102e +80000314 +00000000 +00000000 +00000000 +00000000 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80415a86 +80476a78 +80132546 +804d6f9e +80000314 +80000000 +80000314 +80040812 +80030508 +8005102e +800a1730 +80070c14 +80050c20 +800a1730 +800a2458 +801c2c50 +80111c32 +803e4550 +80426ea6 +8005194c +80577294 +801f345c +80152542 +80414444 +80050c20 +80061744 +80050c20 +800b1c3c +80000314 +8005102e +8005102e +80000314 +8005102e +802e4c84 +80426ea6 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800a2458 +80050c20 +8005102e +80414444 +80050c20 +80050c20 +8005102e +80050c20 +805d90ba +800a1b5c +800e1c3e +800e1c3e +80050b16 +80182d4c +80001778 +80182d4c +801e335e +801e335e +80000314 +80313336 +80050c20 +80313336 +80050c20 +80111c32 +800a1730 +80050c20 +801c2c50 +80313336 +80000314 +8005102e +80050c20 +8005102e +8005102e +80152748 +80313336 +80313336 +8005102e +80414444 +80313336 +800a1730 +800a1730 +8005102e +80050c20 +80313336 +800a1730 +00000000 +00000000 +00000000 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80385262 +80385262 +80385262 +80385262 +80050c20 +8005102e +80000314 +80050c20 +800a1730 +8005102e +80000314 +800a2458 +800b1c3c +800b1c3c +8005102e +80414444 +800b1c3c +800b1c3c +8005102e +80000314 +80313336 +80414444 +800a1730 +8005102e +80414444 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80182d4c +8005123e +8015316c +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80313336 +800b1f44 +80000314 +8005102e +80000314 +80050c20 +803e4550 +80050c20 +80000314 +80313336 +80646768 +80243f74 +80050c20 +80152542 +8016284e +8005102e +80050c20 +80414444 +80313336 +80061744 +8005102e +8005102e +8005102e +80000314 +80313336 +80050c20 +800b1c3c +8005102e +80050c20 +80050c20 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e335e +801c2c50 +80040812 +80050c20 +80061744 +8005102e +80000314 +80414444 +801c2c50 +80070c14 +80050c20 +8028497c +80001778 +805d90ba +800a1b5c +800e1c3e +80050b16 +80050b16 +80182d4c +80001778 +80182d4c +800a1730 +80182b44 +80000314 +80414444 +802d487e +80070c14 +80122354 +8016284e +80313336 +8093b1d2 +80040812 +80050c20 +80000314 +800a2458 +8005102e +80050c20 +80061744 +80182b44 +80061744 +8004266a +8005102e +800b1c3c +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80183b84 +80183b84 +8005102e +80061744 +80030508 +8005102e +80050c20 +80313336 +80050c20 +80050c20 +8005102e +80000314 +80000314 +80050c20 +8005102e +80061744 +8004266a +8005102e +8005102e +8013336a +80414444 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +80132030 +80476a78 +80182d4c +806081a8 +800e1626 +80132030 +80061744 +8019467a +8005102e +800a1730 +8005102e +800a1730 +80050c20 +80040812 +8005102e +800a1730 +80313336 +8016284e +800a1730 +80050c20 +80313336 +80152542 +801c2c50 +80050c20 +80050c20 +80152748 +80040812 +80000314 +80050c20 +80111c32 +80182b44 +8005102e +8005102e +80000314 +80566d82 +8005102e +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +80000000 +801c2c50 +80030508 +80405476 +803f2f1a +80030508 +80212c3c +80030508 +80426ea6 +80030508 +80214062 +80182d4c +80182d4c +8028497c +8028497c +80001778 +805d90ba +800a1b5c +800e1c3e +800e1c3e +80030508 +80426ea6 +800c0e12 +8030537e +80000000 +80204572 +80313c48 +80244882 +80030508 +80264e88 +80000000 +80214062 +80030508 +8030537e +80040812 +80244882 +80040812 +80001b60 +80000000 +80000000 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80000000 +80304f74 +801c2c50 +80000000 +80000000 +801c2c50 +80030508 +80000000 +80182b44 +80000000 +80304f74 +80426ea6 +80000000 +804f6b86 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +80182d4c +806081a8 +80182d4c +80001778 +80001778 +80000000 +80191718 +80566d82 +80030508 +80212426 +803a5d88 +80030508 +80426ea6 +800b1f44 +80000000 +8024477a +80264e88 +800c0e12 +80040812 +80233654 +80131920 +801f345c +80000000 +80000000 +801c2c50 +80030508 +80000000 +803f2f1a +80030508 +80000000 +8092a4b4 +80646768 +80000000 +804f6b86 +80405476 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80050c20 +80152542 +80455c78 +8008101e +80050c20 +80006392 +800b1c3c +800b1c3c +80050c20 +80050c20 +800b1c3c +8005102e +80385262 +80132546 +8028497c +80182d4c +80182d4c +8028497c +8028497c +800a2458 +80000314 +800a1730 +800b1f44 +8093b1d2 +80050c20 +80313336 +800b1c3c +80384d76 +800a2458 +801c2c50 +800b1c3c +800a1730 +80313336 +80313336 +80313336 +80646768 +800b1f44 +80001164 +80030508 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80455c78 +80152748 +80070c14 +800a2458 +80426ea6 +80313336 +80152542 +80182b44 +80111c32 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +80001778 +80132030 +80132546 +8005102e +80212426 +800b1f44 +8005102e +80646768 +8093b1d2 +800a2458 +8004266a +803e4550 +800a1730 +80006392 +803e4550 +8093b1d2 +80384d76 +80050c20 +800a1730 +80000314 +800a2458 +80111c32 +80040812 +80414444 +80152748 +80070c14 +800a2458 +80414444 +8005102e +8016284e +802d487e +80152748 +80111c32 +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80212426 +8004266a +80050c20 +8005102e +80050c20 +8004266a +8005102e +80384d76 +801d3248 +801c2c50 +8005102e +80000314 +80050c20 +80456f8a +80162128 +80001778 +80385262 +80050c20 +80212426 +80313336 +8030537e +800b1c3c +80050c20 +80122354 +8016284e +800b1f44 +80495156 +80212426 +80006392 +80384d76 +80006392 +80006392 +8005102e +80000314 +80050c20 +80456f8a +801f3b62 +80050c20 +80040812 +80061744 +80061744 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +8093b1d2 +800b1f44 +80152748 +800a2458 +80072560 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80132030 +80132030 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +80000314 +80000000 +80050c20 +80000000 +80070c14 +80395486 +8005102e +80212426 +80001164 +80414444 +8005102e +800a1730 +800b1c3c +800b1c3c +80566d82 +8005102e +800a2458 +8008101e +8093b1d2 +80206398 +80000314 +801c2c50 +80050c20 +800a2458 +8005102e +8093b1d2 +8005102e +80495156 +80000314 +803e4550 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802d67b4 +80152748 +8008101e +80152542 +8008101e +800b1c3c +801f345c +8023538a +80244882 +80243f74 +80414444 +80414444 +8008101e +80646768 +800b1c3c +8005102e +800a2458 +800b1c3c +800b1f44 +800b1c3c +80000314 +80000314 +800a1730 +80244882 +80384d76 +80414444 +800b1c3c +800b1f44 +80050c20 +80313336 +80646768 +80384d76 +80244882 +80040812 +80050c20 +80050c20 +8093b1d2 +800b1f44 +801c2c50 +8005102e +80061744 +8005102e +80233654 +8004266a +800b1f44 +8008101e +8013336a +80414444 +800a2458 +8005102e +800b1f44 +800b1c3c +8005102e +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80001778 +80001778 +80001778 +80050b16 +80050b16 +80030718 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +800e1b30 +80001778 +80132030 +80225524 +80000314 +8005102e +80000000 +80264e7e +803e4550 +802f445e +801f3b62 +80071126 +80384d76 +800a2458 +800a1730 +80050c20 +8008101e +80414444 +80111c32 +80061744 +800a1730 +80001b60 +80050c20 +8005102e +80182b44 +80061744 +8004266a +80212426 +8005102e +8005102e +800b1c3c +80244882 +80243f74 +8093b1d2 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80264e88 +80000000 +80111c32 +8024477a +800c0e12 +80577294 +800c0e12 +806786ac +801a2028 +8030537e +80172334 +80646768 +80030508 +800b1c3c +80000000 +803b6492 +80030508 +8023538a +800c0e12 +80040812 +80182b44 +800b1c3c +80152542 +80243f74 +8013336a +80414444 +80172334 +8005102e +800a1730 +80050c20 +8008101e +800c0e12 +806786ac +801a2028 +8030537e +80030508 +801c2c50 +80070c14 +8005102e +800a2458 +80172334 +800a1730 +8008101e +80000000 +8013336a +800a2458 +80070c14 +800d141e +80182b44 +80030508 +80070c14 +80050c20 +80172334 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +80182d4c +80182d4c +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80132030 +80225524 +80183b84 +80000314 +800a224c +80061744 +80050c20 +8008101e +800a2458 +80395486 +800b1f44 +80646768 +80050c20 +80030508 +80050c20 +80006392 +80313336 +80152748 +802d487e +80000314 +800d141e +800a2458 +8008101e +80071126 +800b1c3c +800b1c3c +801f345c +80646768 +80395778 +80244882 +8030537e +80040812 +8016284e +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +803a5d88 +803b6492 +80006392 +80050c20 +80061744 +80212426 +800c1626 +80304f74 +80040812 +80050c20 +80050c20 +800a2458 +80212426 +800a1730 +80050c20 +800a2458 +80040812 +80001b60 +80111c32 +80264b72 +80006392 +800a1730 +80000314 +8092a4b4 +80455c78 +80253444 +800b1f44 +80313336 +8005102e +8005102e +80111c32 +80646768 +80061744 +80006392 +80243b60 +80111c32 +80001b60 +80040812 +80414444 +800a1730 +80111c32 +8013336a +80172334 +80243f74 +800a1730 +80001b60 +80030508 +80000314 +80233654 +8005194c +80243b60 +803f5d88 +8030537e +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +806081a8 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80001778 +800e1c3e +80001778 +800e1c3e +80183b84 +80385262 +80030508 +80000000 +8030537e +80001b6e +80000000 +8044719c +80000000 +80030508 +80484646 +80030508 +800c0e12 +804e6e98 +80000000 +80000000 +80455d86 +803f2f1a +80030508 +80253444 +80000000 +80131920 +80304f74 +80040812 +80000000 +806a8eb0 +80496590 +801a2028 +80244882 +80495156 +80030508 +80131920 +8016284e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +803a3f44 +80001164 +8022417a +8004266a +80334452 +8013234e +8004266a +807ca6b4 +80496590 +800a2458 +80000314 +80050c20 +8005102e +8092a4b4 +803e4550 +80384d76 +8005102e +80507798 +80416a98 +80204b74 +80204b74 +80226392 +800a224c +801b3e74 +80313336 +8005102e +8005102e +80264e7e +80121b28 +8048494c +803b6492 +800c1626 +80191718 +80121b28 +80121b28 +80204b74 +801a3354 +80416a98 +80507798 +800a2458 +80050c20 +80313336 +800b1f44 +800a2458 +80031b58 +80183b62 +8030537e +8005102e +80000314 +80000314 +80050c20 +8005102e +80000000 +80000000 +80000000 +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +80182d4c +80000000 +80000000 +80000000 +80000000 +80000000 +8015325e +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +806081a8 +80182d4c +80001778 +80132030 +80132546 +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80122354 +80030508 +80030508 +800b1c3c +8005102e +80050c20 +800a1730 +800b1f44 +800a2458 +80313336 +8005102e +80426ea6 +80000314 +8005102e +80111c32 +80050c20 +8005102e +801f3b62 +8023527e +80000314 +803e4550 +80061744 +80395486 +801c2c50 +80244882 +80313336 +801c2c50 +803e4550 +80040812 +80070c14 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80415a86 +80243f74 +80243f74 +80264e88 +80495156 +8005102e +800b1f44 +80384d76 +80174784 +8008101e +80264e88 +80070c14 +80040812 +80244882 +800b1c3c +8005102e +80050c20 +80061744 +80604d34 +8004266a +8048494c +803a5d88 +80212426 +80426ea6 +8004266a +80031b58 +80305786 +803f2f1a +800b1c3c +8024477a +8004266a +80071126 +8004266a +8024477a +80264b72 +803a5d88 +80152748 +80163f82 +80203562 +80000314 +80000314 +8005102e +800b1f44 +80313336 +8005194c +8005102e +80000314 +80061744 +80061744 +80031b58 +80000000 +8000010c +8000010c +8000010c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80000000 +80000000 +807c7f84 +8015325e +801b4a98 +8006112c +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +8005102e +80050c20 +80061744 +8005102e +80061744 +8005102e +803e4550 +800b1f44 +80191718 +801f4d7e +80245b7e +80264e7e +80313336 +80121b28 +80313336 +80496590 +801b3e74 +808498ae +80206e98 +8006528a +80183b62 +80001164 +801a3354 +801f3568 +8005102e +80050c20 +80313336 +80030508 +80050c20 +8005102e +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001b60 +80304f74 +801c2c50 +8050718a +80212c3c +80496590 +802f3e5e +805d81a4 +801c2c50 +803f2f1a +80182b44 +8024477a +801a2028 +802f445e +80070c14 +8093b1d2 +80070c14 +80414444 +801f366e +80172334 +80496590 +801c2c50 +80607a94 +801b1e20 +80414444 +80152542 +80000000 +80111c32 +80233654 +800c0e12 +800a2458 +800c0e12 +8093b1d2 +80264b72 +8013336a +80000000 +80111c32 +80000000 +800d141e +80040812 +80072560 +80000314 +80000000 +8013336a +800c0e12 +80313336 +800d141e +80313336 +80313336 +800b1f44 +80313336 +800c1626 +80030718 +80030718 +80040b24 +80040b24 +00000000 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +80070f1c +802d67b4 +800e1b30 +80001778 +80132030 +8028497c +801e335e +80001778 +8028497c +80182d4c +805d90ba +80050b16 +8005102e +80031d66 +80041b52 +80313336 +8005102e +80050c20 +80163162 +80121b28 +80071126 +80174b70 +800b1f44 +8022417a +803a3f44 +803d4e68 +80313336 +803a5d88 +80204b74 +804e6e98 +80001164 +804376a8 +80646768 +80183b62 +804f72a4 +80050c20 +80000314 +80183b62 +80050c20 +80000314 +80050c20 +80334b60 +8092a4b4 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005123e +8016284e +802b3744 +80204572 +802f445e +80174b70 +8004266a +803e4550 +80050c20 +8005102e +80050c20 +80000314 +80040812 +80041b52 +8016284e +80040812 +8013336a +80172334 +800a1730 +80566d82 +8008101e +80414444 +800b1c3c +80233654 +800b1c3c +8093b1d2 +800a2458 +800a1730 +800a2458 +80050c20 +80040812 +800a1730 +8005102e +80152748 +803f5d88 +80395486 +80008598 +80305786 +00000000 +8006112c +8000010c +801f345c +80050c20 +801f345c +80426ea6 +800a1730 +803f5d88 +80395486 +801f3568 +8023538a +8022417a +804e6e98 +8048494c +8000010c +800e1626 +00000000 +00000000 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +80001778 +80001778 +80132030 +80225524 +80183b84 +80001778 +8028497c +8028497c +800a1b5c +80050b16 +8005102e +80030508 +800c1626 +8005102e +80000000 +80071126 +8005194c +802d487e +800c1626 +80304f74 +80050c20 +80243f74 +803d4e68 +80243f74 +80496590 +80001164 +8005102e +800b1c3c +800b1f44 +801f3568 +80001164 +8023538a +80050c20 +8008101e +80000314 +80050c20 +80111c32 +800a2458 +80050c20 +80414444 +80244882 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +8005102e +80050c20 +80111c32 +800a2458 +8005102e +800a224c +80191718 +8024477a +80646768 +8023538a +8005102e +800b1c3c +80313336 +80061744 +80646768 +800a1730 +800a2458 +80646768 +803b6492 +80002772 +80384d76 +80416a98 +8005102e +80111c32 +80212426 +801d3248 +8005102e +803b6492 +80121b28 +80061744 +80000314 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +80040b24 +80040b24 +80050b16 +80050b16 +8000010c +80384d76 +803b6492 +80384d76 +800b1c3c +800b1c3c +80050c20 +80050c20 +80000314 +80061744 +80030508 +80000000 +80000314 +00000000 +00000000 +00000000 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8005123e +80132546 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80132030 +80001778 +800e1c3e +80001778 +800e1c3e +80183b84 +80385262 +80182d4c +80001778 +800a1b5c +80182d4c +801e335e +80061744 +801d3248 +804e6e98 +804376a8 +80001164 +804f72a4 +80395486 +80001b60 +80496590 +801f366e +80426ea6 +80111c32 +807791a6 +80212c3c +80455c78 +804f72a4 +80244882 +802f3e5e +804f72a4 +804f7da8 +801c2c50 +8005102e +80414444 +800d141e +80233654 +80172334 +800c0e12 +801a2028 +80152748 +80172334 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +807c9bbe +80040812 +80070c14 +80426ea6 +80050c20 +80030508 +8093b1d2 +800a1730 +800a1730 +80313336 +80050c20 +80414444 +801f345c +8023538a +80212426 +80414444 +802d487e +80313336 +803b6492 +801f3b62 +80000314 +80040812 +80000314 +80040812 +80000314 +803b6492 +80008598 +80313336 +8046638a +800e1c3e +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1626 +800e1626 +80132030 +80132030 +80132030 +80050b16 +80050b16 +80000314 +80050c20 +80152748 +80050c20 +800b1c3c +80030508 +8044719c +800b1f44 +800b1f44 +80050c20 +8005102e +80041b52 +80313336 +00000000 +00000000 +8005123e +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80001778 +800e1c3e +80001778 +801e335e +80132546 +80000314 +80000314 +80070c14 +800b1f44 +800a2458 +80172334 +8013336a +80111c32 +800a1730 +80152542 +80414444 +8008101e +8008101e +80111c32 +80006392 +800a2458 +8005194c +800a2458 +80050c20 +800a2458 +80050c20 +800b1f44 +8005102e +80313336 +800a1730 +800b1c3c +80050c20 +800a1730 +80121b28 +8093b1d2 +8023527e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a224c +80050c20 +800b1c3c +800a1730 +801f3568 +800b1c3c +801f3b62 +801f345c +80384d76 +800c1626 +80122354 +80212426 +80646768 +803a3f44 +80111314 +80070c14 +80152542 +80111c32 +80070c14 +80070c14 +80040812 +80212c3c +80426ea6 +80030718 +800a142a +8028497c +80030718 +80577ca2 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +80050b16 +8003050a +8003050a +8003050a +80132030 +80132030 +80132030 +80182d4c +80182d4c +80182d4c +80061744 +80313336 +80111c32 +80152748 +800a2458 +80030508 +80050c20 +80050c20 +80050c20 +80152748 +80313336 +80000314 +80061744 +00000000 +00000000 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +80001778 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +800e1c3e +80001778 +801e3b60 +80182d4c +80225524 +80050c20 +80313336 +8005102e +80061744 +80000314 +800a1730 +80000314 +80414444 +80414444 +80414444 +80313336 +800c1626 +80191718 +80061744 +80384d76 +80646768 +80212426 +80152748 +80384d76 +80050c20 +8005102e +800b1f44 +801d3248 +800a1730 +800a1730 +803b6492 +8005194c +806489a6 +80061744 +8044719c +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80181a22 +801a3354 +80050c20 +80313336 +80000314 +80061744 +800e5b8c +80000314 +80061744 +80061744 +801f3568 +801f3b62 +8016284e +80182b44 +80152542 +8005102e +80313336 +800a1730 +800a2458 +803e4550 +801e3b60 +800e1c3e +80182d4c +80476a78 +800e1b30 +800e1b30 +80476a78 +8006112c +80000000 +8003165e +80000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80182d4c +80476a78 +80476a78 +80476a78 +800f1b28 +800f1b28 +800f1b28 +80050b16 +80050b16 +80000000 +80000000 +804376a8 +804376a8 +804376a8 +80646768 +80212c3c +800c101c +80030508 +800a2458 +80253444 +80414444 +80040812 +80212c3c +80050c20 +80070c14 +00000000 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +80132030 +8028497c +801e335e +80001778 +8028497c +80182d4c +805d90ba +80050b16 +80182d4c +801e3b60 +80182d4c +802e3e46 +800d225e +80061744 +80000314 +80006392 +80313336 +800b1c3c +80313336 +80000314 +8008101e +80000314 +80050c20 +800a2458 +80264e88 +80235590 +8022417a +801f345c +8092a4b4 +80122354 +80050c20 +80426ea6 +80305786 +800b1c3c +80000314 +800a1730 +80050c20 +80121b28 +8044719c +800b1f44 +8005102e +800b1f44 +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +8005102e +8005102e +8005194c +803a3f44 +8005102e +8004266a +80384d76 +80000314 +80050c20 +80313336 +8048494c +80050c20 +80313336 +8005102e +80566d82 +8005102e +80313336 +80061744 +80132546 +80457ab2 +80457ab2 +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +80050c20 +800a101a +801b4a98 +804972a6 +80061744 +80000314 +800b1f44 +80163f82 +80313336 +8004266a +80001164 +80214a86 +80132546 +80132546 +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +800e1b30 +80001778 +80132030 +80225524 +80183b84 +80001778 +8028497c +8028497c +800a1b5c +80050b16 +80182d4c +801e3b60 +805c788c +802e3e46 +801e3b60 +80132546 +80040812 +80040812 +800c101c +80000000 +80040812 +80070c14 +80040812 +8013336a +80426ea6 +8005194c +801c2c50 +800b1f44 +80646768 +80111c32 +80426ea6 +801f3b62 +800b1c3c +80111c32 +80384d76 +80000314 +80040812 +80030508 +800a1730 +8005102e +80050c20 +80040812 +8005102e +80152748 +80061744 +8005194c +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +801f4f8a +80040812 +8030537e +80000314 +803e4550 +80070c14 +800b1c3c +800b1c3c +801f3b62 +80072560 +80061744 +800b1f44 +80646768 +80426ea6 +80000314 +80000314 +800a2458 +800a1730 +80a3abae +8006112c +8006112c +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +80050c20 +80050c20 +80050c20 +800a101a +801b4a98 +80484646 +80212426 +80041b52 +80050c20 +8005102e +80334b60 +8015386c +807c7f84 +80214a86 +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +80132546 +807c7f84 +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80001778 +80225524 +80183b84 +80385262 +80182d4c +80001778 +800a1b5c +80182d4c +801e335e +80132546 +805c788c +80225524 +8005123e +80132546 +8006112c +8004266a +800a2458 +80244882 +800b1c3c +800b1c3c +803e4550 +80244882 +8005102e +8093b1d2 +8023538a +801f3568 +803e4550 +800c1626 +80122354 +80384d76 +80071126 +80008598 +800a2458 +80111520 +800c101c +80000314 +80152542 +800a2458 +80172334 +80040812 +80414444 +8013336a +800c0e12 +80212c3c +80172334 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8004266a +80313336 +802d487e +8005102e +8016284e +80313336 +8093b1d2 +8005102e +800a1730 +8093b1d2 +80334b60 +80111c32 +803a5d88 +8013336a +80191718 +80040812 +801b3e74 +80040812 +8023527e +803a5a8e +80a3abae +80102e90 +8006112c +8006112c +80132546 +804787c6 +8015316c +800d225e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80000314 +80000314 +80000314 +80000314 +8006112c +800a101a +8005102e +800a2458 +8005102e +803a3f44 +803a3f44 +80313336 +80182d4c +8015386c +8015316c +8015316c +8015316c +8005123e +8015325e +806a7678 +8015316c +8015316c +8015316c +8015316c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80001778 +800e1c3e +80001778 +801e335e +80132546 +80225524 +800d225e +8005123e +80030718 +80040b24 +80313336 +80030508 +8048494c +80000314 +800a2458 +80212426 +80426ea6 +80414444 +800b1c3c +80414444 +80426ea6 +801c2c50 +801f3568 +80646768 +8004266a +803b6492 +80212426 +800b1f44 +80000314 +8005194c +80050c20 +80163f82 +8005102e +8005102e +8004266a +8005102e +80121b28 +80050c20 +806690be +801a3354 +80041b52 +80204b74 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80000314 +80000314 +80313336 +80050c20 +8093b1d2 +800b1f44 +800a1730 +801f345c +8005102e +8023538a +80001164 +802d487e +8016284e +800a1730 +80111c32 +800a2458 +80414444 +80132546 +80040b24 +8005123e +803a5a8e +80a3abae +80a3abae +80a3abae +8015316c +80132546 +804972a6 +80457ab2 +8015325e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +804376a8 +804376a8 +804376a8 +804376a8 +804376a8 +806081a8 +8006112c +8016284e +80040812 +80061744 +800a2458 +80030508 +800b1c3c +8015325e +80182d4c +8005123e +8015325e +8005123e +804e616c +8005123e +80132546 +8015386c +800a142a +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +80182d4c +80001778 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +80050b16 +80001778 +801e3b60 +80182d4c +802e3e46 +800e1c3e +800e1c3e +80132546 +8005123e +8005123e +8005102e +80163162 +80414444 +80050c20 +80414444 +80152748 +80244882 +8005102e +80000314 +8004266a +80152748 +800a2458 +80646768 +8023538a +801f3b62 +80050c20 +8005102e +80152748 +8005102e +8005102e +80041b52 +800b1f44 +80031b58 +80050c20 +80000314 +80050c20 +80061744 +80050c20 +80000314 +80212426 +80604d34 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +80070c14 +8004266a +80484646 +803b6492 +800a1730 +80313336 +802f445e +80050c20 +800b1c3c +80646768 +802d487e +80182b44 +801f345c +80233654 +8013336a +801c2c50 +80426ea6 +80426ea6 +800e1c3e +80182d4c +80182d4c +801e335e +80040b24 +803a5a8e +803a5a8e +8015316c +80102e90 +80040b24 +8006112c +8006112c +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +800e1c3e +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +80566d82 +80566d82 +80566d82 +80566d82 +80566d82 +80566d82 +804787c6 +806081a8 +800b1f44 +801f3568 +80212426 +8013336a +80182d4c +8006112c +8015316c +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +8015316c +8015325e +80a4afb4 +80385262 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +80132546 +8028497c +801e335e +80001778 +8028497c +8028497c +805d90ba +80050b16 +80182d4c +801e3b60 +800e1c3e +80132546 +806081a8 +806081a8 +8006112c +800e1c3e +800e1c3e +800e1c3e +80000314 +80000314 +80414444 +803e4550 +80000314 +80000314 +8005102e +8093b1d2 +8005102e +80050c20 +800a1730 +80313336 +8005102e +80384d76 +80243f6e +80050c20 +800b1c3c +8005102e +80050c20 +80384d76 +8004266a +8005194c +8005102e +80050c20 +80061744 +80061744 +80002772 +8005194c +80050c20 +80313336 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +80313336 +800b1f44 +80264e88 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80233654 +80414444 +8013336a +80172334 +800d141e +802d487e +80172334 +8022619e +80182d4c +800e1c3e +801f396c +801f396c +80132546 +801e335e +8005123e +8005123e +8005123e +80102e90 +80102e90 +8006112c +8006112c +80132546 +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +804972a6 +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +800b1c3c +8005102e +8005102e +8005102e +8005102e +80050c20 +80050c20 +80102e90 +804787c6 +80061744 +8015316c +8006112c +8015316c +8005123e +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +802d67b4 +800e1b30 +80001778 +80132030 +80225524 +80183b84 +80385262 +8028497c +8028497c +800a1b5c +80182d4c +800e1c3e +804972a6 +8015316c +80182d4c +80182d4c +801e335e +800e1c3e +80132546 +80132546 +806081a8 +8006112c +800a2458 +80070c14 +804376a8 +803e4550 +80030508 +8013336a +80646768 +800c101c +800c101c +80313336 +800c101c +80111520 +80152542 +80111c32 +80111c32 +80111c32 +800b1c3c +80030508 +800b1f44 +80050c20 +80040812 +80414444 +8005102e +8005102e +80050c20 +800b1c3c +80050c20 +80313336 +80031b58 +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +800b1f44 +80313336 +80040812 +80000314 +80646768 +8024639c +80264e7e +80507798 +80244882 +80212426 +80001b60 +80566d82 +801f345c +8023538a +801c2c50 +80646768 +80000000 +80000000 +804972a6 +804972a6 +80a3abae +80182d4c +80182d4c +800e1c3e +801f396c +80132546 +80132546 +80040b24 +80040b24 +8005123e +80a3abae +80a3abae +80a3abae +8006112c +8006112c +80132546 +8015316c +80457ab2 +8015325e +8015325e +8015325e +800d225e +8015316c +804972a6 +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80414444 +80414444 +80414444 +80414444 +80414444 +80235590 +804972a6 +800d225e +8015316c +8006112c +804e616c +8006112c +80486570 +800e1c3e +80214a86 +80182d4c +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80132030 +80225524 +80183b84 +80385262 +80182d4c +80001778 +8015316c +80182d4c +804787c6 +804787c6 +800d225e +800e1c3e +800e1c3e +804972a6 +804972a6 +8015316c +80182d4c +801e335e +800e1c3e +800e1c3e +80212426 +80384d76 +800a2458 +80414444 +8005102e +800a1730 +80384d76 +80384d76 +800a1730 +800a2458 +80152748 +80233654 +8093b1d2 +8093b1d2 +80182b44 +80334b60 +80070c14 +80070c14 +80235590 +800a1730 +80040812 +80235590 +80204b74 +800a2458 +80243f6e +803a3f44 +800a2458 +801f5b9c +801f4f8a +80070c14 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80050c20 +8005102e +80050c20 +8093b1d2 +80264e88 +80646768 +8092a4b4 +80646768 +800a1730 +800a1730 +800b1c3c +80050c20 +80182b44 +8093b1d2 +80111c32 +8005102e +8093b1d2 +801f396c +80435a74 +8006112c +8006112c +800e1b30 +804972a6 +80132546 +8022619e +800e1c3e +800e1c3e +800e1c3e +80182d4c +80132546 +801e335e +80040b24 +803a5a8e +803a5a8e +80102e90 +80a3abae +80040b24 +8006112c +804972a6 +804787c6 +800d225e +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80030508 +80030508 +80030508 +801e335e +804972a6 +800d225e +8015316c +800d225e +804e616c +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80132030 +80001778 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +8015325e +800d225e +800d225e +8006112c +8005123e +8005123e +8015316c +8015316c +80182d4c +804787c6 +800d225e +800e1c3e +800e1c3e +800e1c3e +804972a6 +8015316c +80182d4c +80050c20 +8004266a +80000314 +80000314 +80000314 +80152542 +80172334 +80001b60 +80152542 +8093b1d2 +8023538a +80426ea6 +80152748 +80152542 +800a1730 +800a2458 +800b1c3c +80264e7e +80646768 +8016284e +800b1c3c +803e4550 +80122354 +802f3e5e +8005102e +80313336 +802d487e +80313336 +80313336 +80243b60 +800c1626 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +8005102e +800a2458 +80414444 +800a2458 +80214062 +80172334 +80152748 +80172334 +800b1c3c +80414444 +80313336 +800b1c3c +80646768 +80384d76 +8023527e +801f345c +8005194c +80132546 +8021447a +801f396c +801f396c +804972a6 +8006112c +804787c6 +800e1b30 +803b67a8 +80a3abae +8022619e +800e1c3e +800e1c3e +801f396c +80182d4c +801e335e +801e335e +8005123e +8005123e +8005123e +80102e90 +80506982 +8006112c +800e1c3e +80132546 +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +800b1c3c +801e335e +804972a6 +800d225e +8005123e +800d225e +804e616c +8006112c +80040b24 +80132546 +807c7f84 +8015325e +804972a6 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +80132546 +8028497c +800e1c3e +804e616c +8006112c +8005123e +806a7678 +804e616c +8015316c +8015316c +8015325e +800d225e +8006112c +8005123e +8005123e +8005123e +8015316c +80182d4c +804787c6 +800d225e +800d225e +800e1c3e +800e1c3e +8008101e +8005194c +80212426 +80243f6e +80001164 +8005194c +80426ea6 +80172334 +800b1f44 +800b1c3c +80384d76 +800b1c3c +803f2f1a +800a1730 +80172334 +80414444 +8024477a +80264e88 +80313336 +8093b1d2 +80061744 +80050c20 +80313336 +80313336 +80070c14 +80000314 +80000314 +8005102e +80040812 +80212426 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80071126 +80243f6e +807797bc +80001164 +8023538a +80070c14 +80264e88 +80030508 +80646768 +80030508 +800a1730 +800a2458 +80000000 +8008101e +80313336 +800a1730 +80313336 +80182b44 +8015325e +8015325e +8015325e +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +804972a6 +804972a6 +800e1b30 +80a3abae +80a3abae +80182d4c +800e1c3e +800e1c3e +801f396c +80182d4c +80132546 +80040b24 +8005123e +8018407a +80a3abae +80a3abae +80a3abae +8006112c +8006112c +80132546 +80457ab2 +80457ab2 +8015325e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +806081a8 +801e335e +800e1c3e +804787c6 +8005123e +800d225e +806a7678 +804e616c +80040b24 +80132546 +807c7f84 +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +804e616c +8006112c +8005123e +806a7678 +806a7678 +804e616c +8015316c +8015325e +800d225e +8006112c +8006112c +8005123e +8005123e +8015316c +80182d4c +804787c6 +80414444 +80000314 +80071126 +80313336 +80071126 +800a1730 +800b1f44 +800d141e +802f445e +80182b44 +8008101e +80426ea6 +8013336a +8013336a +801f345c +800a1730 +80000314 +8005102e +802f445e +80050c20 +80313336 +8005102e +800c1626 +8093b1d2 +8004266a +8005102e +80050c20 +80243f6e +800a2458 +80050c20 +80050c20 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80183b62 +80030508 +803e4550 +80304f74 +8005102e +80496590 +80070c14 +800a2458 +80050c20 +80243b60 +800a1730 +80000314 +8093b1d2 +80050c20 +801f345c +8013336a +80233654 +80006392 +804e6e98 +8005123e +8005123e +80a3abae +8015325e +8015325e +8015325e +8033659c +80397aa8 +80397aa8 +80435a74 +804972a6 +8006112c +804972a6 +804972a6 +804972a6 +8022619e +80182d4c +800e1c3e +800e1c3e +80132546 +80182d4c +801e436e +80040b24 +80040b24 +803a5a8e +80a3abae +80102e90 +80a3abae +8006112c +8006112c +804972a6 +804787c6 +800d225e +800d225e +8015325e +800e1c3e +806081a8 +80182d4c +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +800a142a +801b4a98 +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +80486570 +804e616c +804e616c +8006112c +8005123e +8005123e +806a7678 +804e616c +8015316c +8015325e +8015325e +800d225e +8006112c +8005123e +8005123e +803e4550 +800c1626 +80071126 +80262726 +80313336 +803a3f44 +80070c14 +80000000 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +8004266a +800b1c3c +80001164 +800c1626 +8004266a +8004266a +800b1f44 +80061744 +80071126 +80071126 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80000314 +801d3248 +80243b60 +80264b72 +80305786 +8005102e +80050c20 +8093b1d2 +8004266a +80426ea6 +80313336 +8005102e +8016284e +800b1c3c +8093b1d2 +8016284e +801f345c +801f3b62 +8006112c +804e616c +800e1c3e +800e1c3e +80214a86 +80a3abae +80182d4c +8015325e +8015325e +8021447a +8021447a +801f396c +80435a74 +8006112c +8006112c +800e1b30 +804972a6 +803b67a8 +8022619e +800e1c3e +800e1c3e +800e1c3e +80182d4c +80182d4c +801e335e +801e335e +8005123e +803a5a8e +8005123e +80102e90 +80040b24 +8006112c +800e1c3e +8005123e +800e1c3e +80132546 +80182d4c +800e1c3e +80182d4c +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +801b4a98 +801b4a98 +801b4a98 +801b4a98 +80182d4c +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +8006112c +8006112c +8005123e +806a7678 +804e616c +8015316c +8015316c +8015325e +800d225e +8005102e +80000314 +800a2458 +8005102e +800a2458 +80050c20 +8008101e +800b1c3c +80072560 +800b1c3c +80384d76 +801f345c +80212426 +80646768 +80233654 +80313336 +800b1f44 +800b1c3c +80384d76 +80243f74 +802e4c84 +8004266a +80313336 +8008101e +800a1730 +803a3f44 +802d487e +80030508 +80040812 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f345c +80264570 +80000000 +80040812 +80030508 +800a2458 +80040812 +80030508 +80061744 +80000000 +800b1f44 +80030508 +80030508 +80000314 +80000314 +80152542 +80152748 +801f345c +80001164 +8005123e +8005123e +8015316c +8006112c +800e1c3e +800e1c3e +800e1c3e +80202f30 +80a3abae +8015325e +8015325e +80132546 +8021447a +80397aa8 +801f396c +8006112c +804972a6 +800e1c3e +800e1b30 +803b67a8 +80a3abae +8022619e +80182d4c +800e1c3e +801f396c +801f396c +80132546 +801e335e +80040b24 +8015316c +800d225e +8015325e +8005123e +800e1c3e +80132546 +80182d4c +800e1c3e +80182d4c +8005123e +8015316c +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +8033659c +800a142a +8033659c +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +8015325e +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +804e616c +8006112c +8005123e +806a7678 +804e616c +804e616c +8005102e +80040812 +80050c20 +80152542 +80050c20 +80646768 +800b1c3c +80264e88 +800a1730 +8005102e +80006392 +80050c20 +800b1f44 +803e4550 +800a1730 +800b1c3c +8013336a +80050c20 +800a2458 +804376a8 +80646768 +80414444 +80000314 +800b1c3c +80050c20 +80050c20 +800a2458 +80071126 +80030508 +8005102e +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +807ca6b4 +8005194c +80030508 +80000314 +80262726 +80061744 +803f5d88 +802d487e +80001164 +800a1730 +80031b58 +80030508 +80061744 +80000000 +80000000 +80030508 +8093b1d2 +80030508 +8005102e +804e616c +804e616c +8006112c +8005123e +80486570 +8015316c +8006112c +8005123e +8005123e +8005123e +80202f30 +8015325e +8015325e +8015325e +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +806081a8 +804972a6 +804972a6 +804972a6 +8018407a +8005123e +8005123e +80506982 +80506982 +80040b24 +8015316c +80040b24 +80132546 +800e1c3e +80132546 +8015316c +800e1c3e +80182d4c +8006112c +8015316c +8005123e +804e616c +800e1c3e +80214a86 +80182d4c +8033659c +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +804972a6 +8033659c +800a142a +800a142a +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +80486570 +804e616c +804e616c +8006112c +8005123e +80030508 +800a2458 +80050c20 +80050c20 +8023538a +804f7da8 +8013336a +80414444 +80040812 +80050c20 +800a1730 +800b1c3c +80414444 +80414444 +8093b1d2 +80111c32 +803f5d88 +80233654 +80646768 +80414444 +80264e88 +801c2c50 +80426ea6 +800b1c3c +8005194c +80646768 +80313336 +80152542 +8005102e +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80061744 +80313336 +800b1f44 +8004266a +800a1730 +803e4550 +8093b1d2 +800a2458 +80050c20 +8005102e +8005194c +80050c20 +80000314 +80050c20 +80030508 +80313336 +80061744 +80050c20 +801d3248 +80040b24 +80283e60 +804e616c +8021447a +8005123e +800e1c3e +8005123e +8015316c +8015316c +804e616c +8005123e +8005123e +8005123e +80a3abae +8015325e +80182d4c +8015325e +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +80182d4c +801e436e +80040b24 +8005123e +8018407a +8005123e +8005123e +80030718 +80132546 +800e1c3e +800e1c3e +8015316c +800e1c3e +8015316c +8006112c +8015316c +8006112c +80486570 +800e1c3e +80214a86 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132546 +80132546 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +800a101a +801b4a98 +804972a6 +8033659c +8033659c +800a142a +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80040b24 +80486570 +804e616c +80030508 +800a1730 +80072560 +8005102e +8005102e +80212426 +80426ea6 +801f345c +8008101e +800b1c3c +80264e88 +8005102e +80152748 +8016284e +800a1730 +8008101e +80072560 +80191718 +80152748 +80233654 +800a2458 +80040812 +80050c20 +800b1f44 +80305a92 +80162f5c +806187b2 +80050c20 +800a2458 +80040812 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80212426 +8005102e +80313336 +801b3e74 +800b1c3c +8005102e +80000314 +803f2f1a +80050c20 +80071126 +8005102e +80050c20 +80313336 +80000314 +806d96bc +800a1730 +80313336 +806081a8 +80132546 +80132546 +800d225e +80040b24 +80283e60 +8021447a +8021447a +8006112c +800e1c3e +800d225e +800d225e +8006112c +804e616c +800e1c3e +800e1c3e +80214a86 +804787c6 +80102e90 +803b67a8 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +80182d4c +8005123e +804787c6 +80030718 +80132546 +8006112c +800e1c3e +8015316c +800d225e +8015316c +8006112c +804e616c +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +8005123e +8005123e +8005123e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +804972a6 +8033659c +800a142a +8015325e +80182d4c +8015386c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +8005123e +80031d66 +80243f6e +80204b74 +807797bc +80122148 +80204b74 +80070c14 +80183b62 +8023538a +80040812 +804c647c +80264e88 +80152542 +80000000 +80030508 +800a2458 +80030508 +80507798 +8008101e +80111c32 +801f3b62 +80244882 +80646768 +80426ea6 +8024477a +80172334 +80264e88 +80040812 +8005102e +800a2458 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8093b1d2 +8030537e +80416a98 +80050c20 +80040812 +8006143a +8013336a +80000000 +80152542 +80243f74 +80233654 +80061744 +80000314 +80121b28 +80000314 +8008101e +800b1c3c +806690be +800a142a +800e1c3e +800e1c3e +8015316c +80132546 +80132546 +80486570 +80040b24 +804787c6 +8021447a +8006112c +8006112c +8005123e +800d225e +80040b24 +8006112c +800e1c3e +800e1c3e +806081a8 +800e1c3e +804787c6 +80102e90 +803b67a8 +80132546 +80132546 +80132546 +8005123e +804787c6 +80030718 +800e1c3e +8006112c +800e1c3e +804972a6 +800d225e +8015316c +800d225e +804e616c +8006112c +80040b24 +80132546 +807c7f84 +8015325e +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80050c20 +80050c20 +80050c20 +80050c20 +804e616c +804e616c +804e616c +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +804787c6 +800e1c3e +806081a8 +8006112c +800a101a +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +80182d4c +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80030508 +80264570 +801f3568 +80030508 +80000000 +80191718 +8093b1d2 +800b1f44 +80182b44 +800a2458 +80050c20 +803a5d88 +80313336 +80030508 +80030508 +800c1626 +80050c20 +80000314 +80566d82 +804e6e98 +800a1730 +8023538a +80040812 +80070c14 +803e4550 +80507798 +80212c3c +800b1c3c +80191718 +80000000 +804e6e98 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +8093b1d2 +80071126 +80416a98 +8005102e +80050c20 +80050c20 +80244882 +8005102e +8024639c +80050c20 +80050c20 +80050c20 +80070c14 +80030508 +800c0e12 +80070c14 +80132546 +804972a6 +8015325e +800a142a +800e1c3e +800e1c3e +804787c6 +80132546 +80486570 +80486570 +80283e60 +804787c6 +804e616c +804e616c +8006112c +8005123e +80486570 +8015316c +8006112c +8005123e +8006112c +806081a8 +800e1c3e +804787c6 +80132546 +80030718 +804787c6 +80040b24 +800e1c3e +8006112c +801e335e +804972a6 +800d225e +8005123e +800d225e +806a7678 +804e616c +80040b24 +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +8015316c +8015325e +80191718 +80191718 +80191718 +80191718 +8048494c +8048494c +8048494c +8048494c +8005123e +8005123e +8005123e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +804e616c +8006112c +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +8006112c +8006112c +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +8015325e +80182d4c +8015386c +80264e88 +80030508 +80030508 +8005102e +80000314 +80313336 +80000314 +800b1c3c +80244882 +80030508 +80000314 +800b1f44 +8005102e +8005102e +80050c20 +80040812 +8005102e +80050c20 +801f345c +80050c20 +80070c14 +8005102e +80244882 +800b1f44 +8005102e +80426ea6 +8030537e +80050c20 +80008598 +80243f6e +80050c20 +8044719c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80244882 +80313336 +8019467a +80071126 +80313336 +800a1730 +800a2458 +80040812 +80030508 +80030508 +8004266a +80000314 +80050c20 +80061744 +8005194c +8008101e +8023527e +800e1c3e +801e335e +80132546 +80132546 +80a3abae +8015325e +806081a8 +806081a8 +804787c6 +804787c6 +80132546 +80486570 +80283e60 +80283e60 +804e616c +804e616c +8006112c +800e1c3e +8005123e +8015316c +8015316c +801b4a98 +8015386c +8000041c +80030718 +804787c6 +80040b24 +800e1c3e +806081a8 +801e335e +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +800a142a +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +8005123e +8015316c +8015316c +8015316c +80a3abae +80264e7e +80264e7e +80264e7e +80264e7e +80264e7e +80152542 +80152542 +80152542 +80152542 +8005102e +8015316c +804e616c +804e616c +804e616c +804e616c +804e616c +806a7678 +804e616c +806a7678 +806a7678 +804e616c +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +80050c20 +8005102e +80000314 +8005102e +80152542 +80414444 +80566d82 +80061744 +80050c20 +80414444 +8005102e +80313336 +80050c20 +80313336 +80050c20 +800b1c3c +8093b1d2 +80152542 +80050c20 +80006392 +80071126 +80050c20 +8093b1d2 +800a2458 +8004266a +80000314 +80000314 +803e4550 +800a224c +8005102e +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +806d96bc +80172334 +80313336 +801f345c +800a2458 +80050c20 +8005102e +80030508 +80061744 +80121b28 +80313336 +80000314 +80000314 +8004266a +80212426 +803e4550 +800b1f44 +80182d4c +806081a8 +801e335e +800e1c3e +801f396c +80132546 +80a3abae +80a3abae +800a142a +806081a8 +806081a8 +806081a8 +80132546 +80132546 +800d225e +80040b24 +80283e60 +8021447a +804e616c +8006112c +800e1c3e +800d225e +8000041c +80030718 +80040b24 +80040b24 +800e1c3e +806081a8 +80182d4c +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80182d4c +8005123e +8015316c +801f396c +80132546 +80132546 +80040b24 +80040b24 +80031b58 +80031b58 +80031b58 +80031b58 +80163162 +80163162 +80163162 +80163162 +80163162 +8006112c +800d225e +800d225e +800d225e +800d225e +800d225e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +8048494c +800b1f44 +80000314 +80000000 +80000000 +80050c20 +80111c32 +80030508 +80070c14 +80070c14 +80040812 +80050c20 +80030508 +800a2458 +80313336 +80050c20 +80061744 +800b1c3c +8093b1d2 +800b1c3c +800a1730 +80000314 +80050c20 +80061744 +801c2c50 +80243b60 +80030508 +80334b60 +80174784 +80313336 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800b1f44 +803b6492 +80050c20 +80111c32 +80000000 +80233654 +80030508 +80172334 +800000a8 +8005194c +80313336 +805d81a4 +807797bc +8022417a +8004266a +803e4550 +8005194c +800e1c3e +80132546 +8006112c +80182d4c +801e335e +801e335e +80132546 +801f396c +800d225e +80a3abae +800a142a +800a142a +804787c6 +806081a8 +8005123e +80132546 +80132546 +80040b24 +80040b24 +804787c6 +8021447a +8006112c +8006112c +8005123e +8005123e +800e1c3e +806081a8 +80182d4c +800e1c3e +80182d4c +8005123e +8015325e +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +804787c6 +80132546 +800e1c3e +80182d4c +804972a6 +80a3abae +80182d4c +80182d4c +800e1c3e +800e1c3e +80132546 +80182d4c +801e436e +80204b74 +80204b74 +80204b74 +80204b74 +80152748 +80152748 +80152748 +80152748 +8006528a +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +800e1c3e +806081a8 +8006112c +80313336 +80313336 +80000314 +8005102e +80313336 +80313336 +80243f74 +80384d76 +80264164 +801c2c50 +80243f74 +80243b60 +8005102e +802d487e +80426ea6 +800b1c3c +80050c20 +80030508 +80070c14 +80152542 +800c0e12 +8093b1d2 +80040812 +80030508 +80264b72 +80414444 +80072560 +80000314 +8005102e +80313336 +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000041c +80050c20 +80061744 +801f345c +80000314 +80313336 +80001164 +80122354 +80191718 +80313336 +80121b28 +800a2458 +80243f6e +80040812 +80172334 +8050718a +8044719c +800d141e +801f345c +8006112c +80040b24 +800e1c3e +800e1c3e +80132546 +8006112c +80030718 +801e335e +80132546 +80132546 +80132546 +800d225e +800e1c3e +8015325e +804787c6 +800e1c3e +806081a8 +80132546 +80132546 +80486570 +80040b24 +804787c6 +804787c6 +804e616c +8006112c +804e616c +80182d4c +800e1c3e +80182d4c +8005123e +8015316c +8005123e +804e616c +800e1c3e +80214a86 +80182d4c +804972a6 +8006112c +804787c6 +80132546 +800a101a +80435a74 +806081a8 +8006112c +804972a6 +804972a6 +804972a6 +8022619e +8022619e +800e1c3e +800e1c3e +80132546 +80182d4c +80111520 +80111520 +80111520 +800a1730 +800a1730 +800a1730 +800a1730 +8016284e +8016284e +804787c6 +804787c6 +804787c6 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +8015316c +80182d4c +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +804787c6 +80313336 +8005102e +8005194c +80040812 +80384d76 +80061744 +8048494c +80061744 +800b1f44 +800b1f44 +80152542 +80152542 +80050c20 +800a1730 +80050c20 +8005102e +80040812 +80030508 +8023527e +8093b1d2 +80072560 +80204b74 +80243f6e +801f345c +80262726 +80262726 +80006392 +80414444 +80264570 +80395486 +801f345c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80071126 +803e4550 +80061744 +80000314 +80000314 +80050c20 +800b1f44 +80050c20 +80000000 +80152542 +80061744 +80313336 +8005102e +80050c20 +80050c20 +803a3f44 +80313336 +8005102e +8005123e +8005123e +8005123e +8005123e +8006112c +80040b24 +800e1c3e +80132546 +80132546 +80182d4c +80030718 +800e1c3e +80132546 +80182d4c +80132546 +800d225e +8015325e +8015325e +806081a8 +800e1c3e +804787c6 +804787c6 +80132546 +80486570 +8015325e +80283e60 +804e616c +804e616c +8006112c +8006112c +8015316c +8006112c +80486570 +800e1c3e +807c7f84 +8015325e +804972a6 +8006112c +80a3abae +80182d4c +8015325e +800a142a +8021447a +801b4a98 +801f396c +80435a74 +8006112c +8006112c +800e1b30 +800e1b30 +803b67a8 +8022619e +80132546 +800e1c3e +800e1c3e +80183b62 +80183b62 +806187b2 +806187b2 +806187b2 +806187b2 +806187b2 +804f7da8 +804f7da8 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +801e436e +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80344a56 +80174784 +800c1626 +801f5b8e +80313336 +803a5d88 +800c1626 +80646768 +8005102e +8004266a +803b6492 +800b1f44 +80313336 +8023527e +80313336 +80484646 +80050c20 +80000314 +80000314 +800a1730 +80646768 +800b1f44 +80204b74 +8005102e +80050c20 +80484646 +80030508 +80181a22 +8005194c +80061744 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8015386c +80050c20 +80000000 +80000314 +80030508 +801c2c50 +80253444 +80050c20 +8005102e +80050c20 +80122354 +80121b28 +8005194c +80000314 +80000314 +80000314 +80030508 +80050c20 +8000041c +80132546 +800e1c3e +801e335e +8015316c +804972a6 +800e1c3e +800e1c3e +800d225e +804787c6 +80182d4c +8005123e +80182d4c +806081a8 +800e1c3e +80132546 +80132546 +80132546 +80a3abae +8015325e +806081a8 +806081a8 +806081a8 +804787c6 +8005123e +80132546 +800d225e +80283e60 +804e616c +8021447a +8006112c +80486570 +80132546 +807c7f84 +8015325e +8006112c +804e616c +80132546 +800e1c3e +80214a86 +80a3abae +8015386c +8015325e +8015325e +80132546 +8021447a +801f396c +801f396c +804972a6 +804972a6 +800e1c3e +800e1b30 +80102e90 +80a3abae +80132546 +80182d4c +801b3e74 +801b3e74 +80006398 +80006398 +80006398 +80006398 +80203562 +80203562 +80203562 +80182d4c +8015316c +8015316c +8015316c +8015316c +8015316c +804972a6 +8015316c +8015316c +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80313336 +8004266a +80212426 +800a224c +80384d76 +8005102e +80384d76 +80061744 +80041b52 +800b1c3c +8005102e +80313336 +80000314 +80244882 +8005102e +80313336 +80050c20 +80071126 +80050c20 +800b1f44 +80061744 +8005102e +800a1730 +8005194c +80384d76 +803e4550 +801f3b62 +8005194c +80174784 +8005102e +8005194c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80030508 +80000314 +80030508 +8013336a +8013336a +800b1f44 +80152542 +80122354 +800b1c3c +80071126 +80030508 +80243f74 +80040812 +8005102e +80030508 +80061744 +80000314 +8003050a +800e1c3e +8006112c +806081a8 +80132546 +801e335e +80182d4c +8015316c +804972a6 +800e1c3e +800e1c3e +804787c6 +80132546 +80050b16 +8006112c +8005123e +800d225e +80040b24 +8000041c +8005123e +80030718 +80132546 +800e1c3e +800e1c3e +80182d4c +806081a8 +8005123e +80132546 +80132546 +80040b24 +80283e60 +8021447a +8021447a +8006112c +800e1c3e +8005123e +800d225e +80040b24 +8006112c +800e1c3e +800e1c3e +80132546 +80202f30 +80202f30 +8015325e +8015325e +80132546 +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +806081a8 +804972a6 +804787c6 +804972a6 +80132546 +80031b58 +80050c20 +80050c20 +80050c20 +80050c20 +8048494c +8048494c +8048494c +80132546 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80182d4c +80132546 +8005102e +801f4d7e +80040812 +800c0e12 +80040812 +80050c20 +80212c3c +80414444 +800b1c3c +800d141e +8008101e +80426ea6 +800a1730 +80040812 +80050c20 +80000314 +80050c20 +800a1730 +8005194c +80061744 +800b1c3c +80041b52 +80041b52 +80212426 +80050c20 +800b1c3c +801f5b8e +800a224c +802e456a +800a224c +80031b58 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80030508 +80070c14 +80426ea6 +800a2458 +8013336a +8013336a +80305a92 +80243b60 +80061744 +80163f82 +8005102e +80030508 +8005102e +80000314 +800b1c3c +802d487e +80243f6e +8005123e +80132546 +800e1c3e +800e1c3e +800e1c3e +8006112c +80132546 +800e1c3e +801e335e +80182d4c +8015316c +80132546 +80050b16 +800e1c3e +8005123e +8015386c +80040b24 +8005123e +8005123e +80030718 +80132546 +8006112c +800e1c3e +804972a6 +800d225e +8005123e +800d225e +804e616c +804e616c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +804e616c +8005123e +80486570 +8006112c +8005123e +8005123e +8005123e +8005123e +80202f30 +8015325e +8015325e +8015325e +8015325e +8033659c +80397aa8 +801b4a98 +80435a74 +806081a8 +8006112c +804972a6 +800e1b30 +806d96bc +806d96bc +806d96bc +806d96bc +806d96bc +8004266a +8004266a +8004266a +8006112c +8006112c +8006112c +8006112c +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +80132546 +80132546 +80132546 +80132546 +80132546 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +8016284e +80000314 +80050c20 +8005102e +80061744 +8044719c +8024648a +8016284e +8087abc6 +806690be +8093b1d2 +80264e7e +80416a98 +80244080 +80416a98 +80001164 +80313336 +80426ea6 +80030508 +80030508 +80000314 +8006143a +80152542 +80172334 +802b2e32 +80050c20 +80313336 +800b1f44 +80061744 +800b1c3c +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +80111c32 +80414444 +800a2458 +80152542 +80152748 +80426ea6 +80264b72 +800b1c3c +80204b74 +803a5d88 +80235590 +80050c20 +80416a98 +801b3e74 +8004266a +80212426 +80061744 +80040b24 +80030718 +80040b24 +8005123e +80132546 +800e1c3e +800e1c3e +8006112c +806081a8 +804787c6 +80040b24 +80050b16 +800e1c3e +8005123e +8015386c +80132546 +8005123e +804787c6 +80030718 +800e1c3e +8006112c +801e335e +804972a6 +804787c6 +8005123e +800d225e +806a7678 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +807c7f84 +80a3abae +80182d4c +8015325e +800a142a +8021447a +801b4a98 +801f396c +80435a74 +804972a6 +8006112c +800e1c3e +800e1b30 +803b67a8 +80456a86 +80214062 +80214062 +80214062 +80214062 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040b24 +80506982 +8015316c +8005123e +8048494c +80061744 +8005194c +803b6492 +80050c20 +80191718 +80031d66 +803a5d88 +80384d76 +80212426 +800b1f44 +8005102e +803e4550 +8004266a +8023538a +801f3b62 +8005102e +80050c20 +80050c20 +80000314 +804376a8 +80264164 +806187b2 +80122354 +8023527e +80243f6e +80416a98 +80050c20 +80040812 +80040812 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804e616c +8022417a +80426ea6 +80264b72 +80212c3c +802d487e +80030508 +80152748 +80030508 +80040812 +800a1730 +80121b28 +8005102e +80000314 +80212426 +80050c20 +80031b58 +8093b1d2 +8005123e +804787c6 +80040b24 +80040b24 +80030718 +8005123e +80132546 +8006112c +804787c6 +80040b24 +80121416 +800e1c3e +8006112c +8015386c +80132546 +8005123e +804787c6 +80040b24 +800e1c3e +8006112c +801e335e +800e1c3e +804787c6 +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +804972a6 +800e1c3e +804972a6 +80102e90 +804972a6 +80132546 +80182d4c +800e1c3e +80040b24 +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80132546 +8005123e +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +8015316c +8015316c +80040b24 +8004266a +800a2458 +8005102e +80313336 +80030508 +800b1c3c +8019467a +8005102e +80281d10 +800b1c3c +8006528a +80646768 +80000000 +8004266a +80163f82 +80040812 +803a3f44 +80030508 +80030508 +80050c20 +80050c20 +8005102e +801f4f8a +80245b7e +80071126 +80204b74 +8048494c +80264b72 +800a2458 +8005102e +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80000314 +80050c20 +80040812 +80050c20 +80040812 +8008101e +80050c20 +801f345c +80006392 +804e6e98 +80384d76 +8013336a +80000000 +80070c14 +80040812 +80030508 +80000314 +8000041c +80030718 +8005123e +8005123e +804787c6 +802d529c +8006112c +804787c6 +80040b24 +80121416 +800e1c3e +8006112c +8015386c +80132546 +80030718 +804787c6 +80040b24 +800e1c3e +806081a8 +801e335e +800e1c3e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80040b24 +800a1730 +800a1730 +800a1730 +80061744 +80061744 +80061744 +800b1f44 +800b1f44 +80040b24 +80040b24 +80040b24 +80040b24 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +804972a6 +800e1c3e +80121b28 +800e5b8c +8005102e +800a1730 +8019467a +80a1c1dc +80313336 +80226392 +80456f8a +80050c20 +803e4550 +8093b1d2 +80050c20 +80313336 +80050c20 +80395778 +80313336 +8005102e +80030508 +80050c20 +80313336 +80000314 +804f7da8 +80030508 +8024648a +80191718 +80050c20 +80414444 +80006392 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80283e60 +80002772 +80030508 +80000000 +800a2458 +80040812 +80030508 +800b1c3c +80152542 +800a2458 +80000314 +80001164 +80313336 +8023538a +800b1c3c +801b3e74 +8023527e +801b3e74 +80040b24 +8000041c +8000041c +80040b24 +802d529c +8006112c +800e1c3e +80040b24 +80121416 +800e1c3e +8006112c +8015386c +8000041c +80030718 +80040b24 +80040b24 +800e1c3e +806081a8 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000010c +80000000 +80000000 +8005102e +8005102e +800b1c3c +800b1c3c +800b1c3c +8005102e +8005102e +8005123e +8005123e +8005123e +8005123e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +80040b24 +804787c6 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +800d225e +80050c20 +80152542 +80646768 +80040812 +80000000 +804f6b86 +80040812 +80646768 +8008101e +80000314 +80030508 +8092a4b4 +80050c20 +80050c20 +8023527e +801d3248 +80313336 +80313336 +8005102e +80000314 +80071126 +80000314 +806187b2 +80000314 +8048494c +80212426 +80030508 +80050c20 +800b1c3c +80313336 +80212426 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80000000 +80030508 +80000000 +80030508 +80050c20 +80050c20 +80000314 +8013336a +80040812 +80484646 +80264e7e +80264e88 +80646768 +80050c20 +80384d76 +8092a4b4 +80040812 +8015386c +800d225e +80040b24 +8021447a +8006112c +800e1c3e +804e616c +80121416 +800e1c3e +8050697c +8015386c +8000041c +80030718 +80040b24 +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +800a2458 +80000314 +80000314 +80000314 +8005102e +8005102e +8005102e +8005123e +8005123e +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80050c20 +801f345c +80646768 +80050c20 +80000314 +800a1730 +80313336 +80313336 +80191718 +800a1730 +80050c20 +8022417a +80050c20 +80121b28 +80313336 +80040812 +80030508 +80111c32 +80030508 +80030508 +800a2458 +806187b2 +8023538a +80001164 +8093b1d2 +80172334 +80041b52 +80111c32 +80070c14 +80050c20 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804787c6 +80030508 +80233654 +80050c20 +80304f74 +80000000 +801f345c +80000000 +80304f74 +80001b60 +805a544a +8006143a +80040812 +80070c14 +800a2458 +80050c20 +80000314 +80000314 +8006112c +80040b24 +8021447a +80283e60 +800e1c3e +804e616c +800e1c3e +800e1c3e +8050697c +800d225e +8000041c +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80050c20 +80006392 +80006392 +80006392 +80006392 +80006392 +800a2458 +80132546 +80132546 +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8005123e +8005123e +8005123e +8005123e +80000314 +8005102e +800a224c +80000314 +80000314 +80030508 +80212426 +8005102e +80000314 +80050c20 +80061744 +800a2458 +80050c20 +80050c20 +80244080 +80244080 +8005102e +80071126 +800a2458 +80050c20 +800a1730 +80313336 +80646768 +80050c20 +804f6b86 +800d141e +80070c14 +8024477a +80050c20 +800a2458 +80214062 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +8005102e +803b6492 +800a2458 +80000314 +80050c20 +80000000 +80050c20 +80050c20 +800b1c3c +800b1c3c +800a1730 +80152542 +800a2458 +80334452 +80001f6e +80214062 +802b3744 +80040812 +80040b24 +8021447a +80283e60 +8006112c +804e616c +800e1c3e +80040b24 +8050697c +800d225e +800a142a +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80000000 +80000000 +8000010c +80050c20 +80050c20 +80050c20 +8005102e +8005102e +80050c20 +80050c20 +800d225e +800d225e +800d225e +800d225e +800d225e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80243b60 +803e4550 +80030508 +80061744 +80000000 +800b1f44 +80000314 +8005102e +80000314 +8005102e +80313336 +80050c20 +803b6492 +80000000 +8005102e +803e4550 +80121b28 +80313336 +80313336 +80050c20 +80050c20 +80050c20 +80050c20 +80313336 +80061744 +80050c20 +80050c20 +8005102e +800b1f44 +80040812 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800a1730 +801c2c50 +80313336 +801f366e +80000314 +80000314 +80030508 +800a1730 +80000314 +80000314 +80414444 +80000314 +80152542 +80050c20 +8005194c +800a1730 +803f2f1a +800e1c3e +8005123e +80283e60 +8006112c +80335372 +800e1c3e +80040b24 +8006112c +8015386c +8005123e +80040b24 +80000000 +8000041c +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +8003050a +80000000 +80000000 +80000000 +80000000 +80000314 +80000314 +80000314 +80000314 +80000314 +80000314 +800d225e +800d225e +800d225e +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +80061744 +80040812 +80050c20 +80050c20 +80000000 +80000000 +80050c20 +80313c48 +80000314 +80313336 +800a1730 +8093b1d2 +80001164 +8005102e +8005102e +80384d76 +800b1c3c +80000314 +800a2458 +80050c20 +80030508 +80000314 +80000314 +80030508 +80050c20 +800b1f44 +800a2458 +80313336 +8005102e +80313336 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80172334 +8008101e +805f7184 +800a1730 +80204572 +80030508 +80000000 +80000314 +800b1c3c +80000314 +8005102e +80050c20 +80050c20 +80313336 +80000314 +80000314 +80264e88 +8006112c +80283e60 +8006112c +80335372 +8006112c +803a628c +8015386c +80040b24 +8005123e +8000041c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80040812 +80000314 +80000314 +8005102e +8005102e +8005102e +8005123e +8005123e +8005123e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +800d225e +800d225e +80050c20 +800b1f44 +80000000 +80313336 +80000000 +80006392 +80061744 +802f445e +80182b44 +80566d82 +800c101c +803e4550 +801c2c50 +80070c14 +803b6492 +80050c20 +80000000 +8005102e +80050c20 +80040812 +80050c20 +8005194c +80050c20 +800b1f44 +80384d76 +80050c20 +8005102e +80000314 +8005102e +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +80233654 +80000314 +800a1730 +8005102e +8005102e +80000314 +800a2458 +8013336a +80253444 +80030508 +80000000 +8024477a +80305786 +80304f74 +803f2f1a +800a1730 +803f2f1a +800e1c3e +8006112c +801e3b60 +804972a6 +801e3b60 +80346078 +802f445e +80486e8e +8034788a +801e3b60 +8015325e +80476a78 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +80000000 +8000010c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80040812 +800a1730 +800a1730 +800a1730 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +8005123e +8005123e +8005123e +8005123e +80000314 +8023527e +80000000 +8005102e +801f345c +80050c20 +800a1730 +80172334 +80111c32 +8005102e +801f3b62 +80313336 +8005102e +800a2458 +803a3f44 +800b1f44 +8016284e +80212426 +80163f82 +800b1f44 +80243b60 +80050c20 +80030508 +80313336 +80000314 +80000000 +80313336 +80050c20 +80000000 +80000000 +80041b52 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80040812 +800b1c3c +80426ea6 +80204572 +80426ea6 +80050c20 +803b6492 +80152748 +80000000 +8024477a +8008101e +80111c32 +802e4c84 +800a1730 +8008101e +800d141e +8004266a +80132546 +80040b24 +8000010c +802e3e46 +802d67b4 +80040b24 +8006112c +800e1c3e +8005123e +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80495156 +80495156 +8093b1d2 +8093b1d2 +8093b1d2 +80040812 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040812 +80030508 +80050c20 +80030508 +80050c20 +80000000 +8013336a +800a2458 +801f345c +8013336a +80152542 +80233654 +80214062 +80313336 +8004266a +800c1626 +80121b28 +803a3f44 +80313336 +8005102e +80071126 +80050c20 +803e4550 +800a2458 +80000314 +800a1730 +802e4c84 +80183b62 +8092a4b4 +8008101e +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +802f445e +80000000 +8008101e +803f5684 +80243f74 +80212c3c +80505b66 +804c647c +80030508 +80000000 +80072560 +80050c20 +802d487e +80000314 +8005102e +80000314 +80000314 +8015325e +8005123e +8046638a +8005123e +800d225e +803a628c +8005123e +8000041c +8005123e +8000010c +80486e8e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000041c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001164 +80001164 +80001164 +80061744 +80061744 +80335372 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +800e1c3e +80313336 +80182b44 +80050c20 +80233654 +80414444 +80070c14 +80646768 +80214062 +80233654 +80152748 +800a2458 +80152748 +8030537e +8004266a +80646768 +80212426 +80384d76 +80384d76 +80061744 +80031b58 +8005194c +80121b28 +80050c20 +80000314 +80384d76 +80313336 +800a1730 +80384d76 +8005102e +8005102e +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000314 +8008101e +802f445e +80233654 +80233654 +8024477a +80172334 +80607a94 +80000000 +80182b44 +80082464 +8024477a +800b1c3c +80000314 +80030508 +80000314 +80000000 +80040b24 +80040b24 +802f445e +800d225e +800d225e +8006112c +8015325e +80040b24 +80132030 +8000041c +800e1b30 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80313336 +80050c20 +80050c20 +80132546 +80132546 +80040b24 +80040b24 +80040b24 +80040b24 +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +80335372 +80335372 +80335372 +80111c32 +800a1730 +80313c48 +80072560 +80152542 +80253444 +80172334 +80172334 +80030508 +800b1c3c +80414444 +80172334 +80040812 +800a2452 +800a2458 +80244882 +8005102e +800a1730 +80000314 +80001164 +80000314 +80121b28 +80061744 +8005102e +80245b7e +801b3e74 +80262726 +8005102e +8005194c +80001164 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000010c +800b1c3c +80070c14 +80233654 +801c2c50 +800b1f44 +80646768 +804c647c +801c2c50 +80152542 +80384d76 +80152542 +80041b52 +80152542 +80214062 +80384d76 +80000314 +803f2f1a +80000000 +8003050a +804d6f9e +80335372 +80000000 +80000000 +80577ca2 +8006112c +80030718 +800e1c3e +80182d4c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +800b1f44 +800b1f44 +80061744 +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80163162 +80030508 +80000314 +8023527e +80050c20 +8016284e +80040812 +80152748 +80414444 +80414444 +80264b72 +8004266a +80182b44 +80243f74 +80030508 +80070c14 +802f445e +80050c20 +80000314 +80426ea6 +800a1730 +80000314 +80002772 +803d4e68 +80050c20 +8005102e +80313336 +803a3f44 +80050c20 +80030508 +80496590 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80050c20 +80040812 +805a544a +80204572 +80000314 +80505b66 +80172334 +800b1f44 +80313336 +800b1c3c +80001164 +80212426 +80000314 +8005194c +80476a78 +8002618e +8028497c +800a142a +800e1b30 +8005123e +8015325e +800e1c3e +80476a78 +8000010c +8006112c +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80174b70 +80174b70 +80174b70 +80000314 +80283e60 +80283e60 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +8005102e +80050c20 +80050c20 +800b1c3c +80313336 +80000000 +8005102e +80030508 +80030508 +800a2458 +8093b1d2 +800a1730 +800a1730 +805d81a4 +80414444 +801f345c +80050c20 +80313336 +80566d82 +80191718 +805d81a4 +803a5d88 +80152542 +80313336 +80030508 +80070c14 +8013336a +80040812 +80040812 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000041c +80040812 +80030508 +80030508 +80152542 +800d141e +80233654 +80426ea6 +803e4550 +80212c3c +80455c78 +800a2458 +80050c20 +80313336 +8005102e +803b6492 +80646768 +800b1c3c +80040b24 +80050b16 +80001778 +80476a78 +80050b16 +8000010c +8000041c +8006112c +8006112c +8006112c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +8005194c +8004266a +8004266a +8005123e +80030718 +80030718 +80030718 +80030718 +80030718 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80040812 +800b1f44 +80313336 +80030508 +80000000 +80030508 +80000314 +8008101e +8005102e +80030508 +80414444 +800a2458 +80030508 +801f366e +801c2c50 +80000314 +80253444 +80000314 +800a1730 +8023538a +80001164 +803d4e68 +800b1c3c +8023538a +8048494c +8005102e +80334b60 +8004266a +80384d76 +8005102e +80111c32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313c48 +800c0e12 +80030508 +80030508 +80040812 +80040812 +800a2452 +80172334 +80030508 +80485364 +80111520 +805a544a +80485364 +802b2e32 +80313336 +80040812 +80040812 +80313336 +8000010c +80000000 +80000000 +8000010c +80000000 +8005123e +8000041c +8000010c +8000010c +80132030 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80030508 +80030508 +80030508 +802d529c +802d529c +802d529c +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8005123e +8005123e +800b1f44 +80040812 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +800a2458 +80030508 +80040812 +80030508 +80000000 +80313336 +80030508 +80040812 +80030508 +80334b60 +800a2458 +8004266a +80191718 +800b1f44 +80395778 +80426ea6 +8030537e +803b6492 +8030537e +80313336 +80313336 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80383a3a +80001f6e +80030508 +80030508 +80040812 +80000000 +800c0e12 +800c0e12 +800d141e +80030508 +80001f6e +80313c48 +802b2e32 +800d141e +802b3744 +80111520 +80111314 +80131920 +80313c48 +80030718 +801e282c +8003050a +80121416 +80000000 +80050b16 +801a1b1c +80121416 +800e1626 +800f1b28 +8003050a +80121416 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80030508 +80030508 +80040b24 +80040b24 +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +8005194c +80000314 +80050c20 +80050c20 +80040812 +804376a8 +80577294 +80111c32 +80000314 +80000000 +80030508 +80040812 +80070c14 +80030508 +80111c32 +80244882 +80152542 +800a2458 +80070c14 +800a2458 +80384d76 +80000314 +80152748 +8005102e +800b1c3c +8004266a +803b6492 +80191718 +80050c20 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +803f5684 +80070c14 +800e5bae +802b2e32 +800c0e12 +800c101c +802b2e32 +802b3744 +80030508 +800c0e12 +800c101c +802b3744 +80313c48 +800c0e12 +80111520 +805a544a +80142856 +80383a3a +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +8005102e +8005102e +8006112c +80182d4c +80182d4c +80182d4c +80182d4c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80000314 +800b1f44 +80000314 +80072560 +8005102e +80050c20 +8024477a +80000314 +80000314 +80000000 +80030508 +80050c20 +80000000 +80000000 +801f345c +80070c14 +80485364 +80162f5c +800d141e +80040812 +80030508 +80111314 +80000314 +80070c14 +80040812 +80050c20 +80414444 +80050c20 +800a1730 +80040812 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801b1e20 +80201f20 +805a544a +80183e7a +800c101c +80172334 +80111314 +80485364 +80111314 +8013336a +80253444 +801a2028 +80111314 +80111520 +802b3744 +80212c3c +80456a86 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804c647c +804c647c +804c647c +800a142a +800a142a +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8005102e +80030508 +80061744 +800a2458 +801c2c50 +800a2458 +80030508 +80313336 +80050c20 +80000000 +80050c20 +8005102e +80000314 +80050c20 +8013336a +8023527e +80050c20 +800a1730 +80070c14 +80000314 +80152542 +80072560 +80070c14 +80334452 +80172334 +80111520 +8024477a +80646768 +80000314 +80111c32 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006143a +80111520 +801b1e20 +80383a3a +80172334 +801a2028 +800c101c +80142856 +801a2028 +80172334 +80111520 +80111520 +800d141e +802b2e32 +80082464 +80172334 +80253444 +802b3744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +802d67b4 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80132546 +80132546 +80132546 +80313336 +80000314 +80050c20 +80050c20 +80000314 +80050c20 +800b1c3c +80061744 +80000314 +80000314 +80000000 +80061744 +8005102e +80000000 +80000314 +80313336 +8005102e +80050c20 +80000314 +80050c20 +80384d76 +80050c20 +800016a8 +800b1c3c +80395486 +80152542 +80414444 +801f345c +800b1c3c +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111314 +80252424 +800a2452 +8059636a +802b2e32 +80313c48 +80001f6e +800c101c +8013336a +80072560 +80070c14 +80253444 +800d141e +800c101c +80070c14 +802e4c84 +80253444 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80152748 +800d225e +800d225e +800d225e +800d225e +80132546 +80132546 +80132546 +80132546 +80132546 +8008101e +8005102e +80495d68 +801f345c +80182b44 +80111c32 +80313336 +80305a92 +8005194c +8005102e +80000314 +80000314 +80000314 +80030508 +80000314 +8005102e +8005102e +80070c14 +80000314 +80000314 +80000314 +8016284e +800a2458 +80050c20 +80041b52 +80414444 +802d487e +80646768 +80426ea6 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80111f40 +80201f20 +8006143a +80455c78 +80212c3c +800c101c +801a2028 +80172334 +80253444 +80172334 +80182b44 +80111c32 +80070c14 +80111520 +80030508 +800a2452 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001b60 +80040812 +80040812 +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80174b70 +80000314 +8023527e +80000314 +80000314 +80000314 +80000314 +80030508 +80000314 +80030508 +80072560 +807791a6 +80182b44 +802d487e +802d487e +80001b6e +804e4e52 +8005102e +800a2458 +8005102e +8005194c +80050c20 +8005102e +8004266a +80313336 +80000314 +80000314 +80030508 +800b1c3c +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80030508 +80030508 +80111520 +80111520 +80111520 +80233654 +800c101c +80182b44 +8013336a +800c101c +800d141e +80152542 +80111520 +80001f6e +802b2e32 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8023527e +80050c20 +80313336 +80313336 +8005102e +800b1c3c +80030508 +8005123e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80030718 +80050c20 +800a2458 +80000314 +8005102e +80152748 +80152542 +8093b1d2 +80061744 +8005102e +80000314 +80050c20 +80000314 +80111c32 +80030508 +8008101e +80072560 +80040812 +800a2458 +800a2458 +800b1c3c +80677784 +8013336a +80264e88 +80456a86 +80072560 +80050c20 +80040812 +800a1730 +80000314 +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +80313c48 +80072560 +80313c48 +800c101c +80030508 +800c101c +80030508 +80072560 +800a1730 +800c101c +80070c14 +80152542 +800c101c +80070c14 +800c101c +80111520 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80050c20 +80050c20 +800a1730 +80414444 +8005102e +8005102e +80000000 +80000000 +80233654 +80264e88 +800a142a +800a142a +800a142a +8006112c +8006112c +8006112c +8006112c +80152542 +8005102e +80000314 +800a1730 +8004266a +8093b1d2 +80182b44 +804f6b86 +80426ea6 +80050c20 +800a2458 +80152748 +80243f74 +80152748 +80000000 +802f445e +80152542 +80000314 +80000314 +80172334 +8005194c +80050c20 +80050c20 +80001b60 +80111314 +80212c3c +80111c32 +80416380 +807791a6 +80183b62 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80070c14 +800c0e12 +800c0e12 +80030508 +800c0e12 +80001f6e +800d141e +80072560 +8013336a +80030508 +80030508 +800d141e +80313c48 +800d141e +80253444 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80000314 +80000314 +80000314 +80111c32 +80111c32 +80000314 +8005102e +80426ea6 +80426ea6 +8004266a +8004266a +8005102e +8013336a +8013336a +800e1c3e +8006112c +8006112c +8006112c +8006112c +80264e88 +80030508 +80072560 +80040812 +80000000 +80253444 +801f366e +80577294 +80172334 +80111c32 +80152542 +80030508 +80111c32 +800b1c3c +80426ea6 +801f345c +80456a86 +80000000 +80061744 +800a2458 +80000314 +802d4674 +80111c32 +800a1730 +80050c20 +80070c14 +803e4550 +80050c20 +8005102e +80000314 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +801a2028 +800d141e +800c101c +800d141e +80030508 +80030508 +80070c14 +80152542 +8013336a +80172334 +80072560 +800c101c +80030508 +80030508 +80313c48 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80313336 +80313336 +80313336 +80455c78 +80455c78 +8005102e +8005102e +80030508 +802d487e +80313336 +80313336 +80000314 +80000314 +80050c20 +80050c20 +80000000 +80000000 +8006112c +8006112c +8006112c +8006112c +80000000 +80000000 +80152542 +80000314 +8008101e +800c101c +80206398 +801f366e +80172334 +8006143a +80111520 +80628196 +80000000 +80313c48 +800c101c +80000314 +80313336 +80030508 +800a1730 +80050c20 +8005102e +80313336 +8005102e +80000314 +80000314 +801c2c50 +8005102e +8016284e +80041b52 +80414444 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +80040812 +800d141e +801a2028 +801a2028 +80072560 +80030508 +80070c14 +80072560 +80000000 +800c101c +80070c14 +801a2028 +800c101c +800c0e12 +80111520 +801c3d6e +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80628196 +80628196 +8024477a +8024477a +80000000 +80000000 +80000000 +80000000 +80111520 +80111520 +80030508 +80030508 +800b1c3c +800b1c3c +8005102e +8005102e +8005102e +80030508 +80030508 +800a2458 +80000000 +80132546 +80132546 +8000010c +8000010c +80000314 +80050c20 +80313336 +80233654 +80030508 +80070c14 +80505b66 +802d487e +800a2458 +802e4c84 +80485364 +804f6b86 +80072560 +80426ea6 +80455c78 +80072560 +803d4e68 +800a1730 +801b1e20 +80082464 +80628196 +80000000 +80313336 +8005102e +80000314 +8005102e +80000000 +80030508 +80050c20 +800a1730 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80212c3c +80111c32 +80111520 +80072560 +80072560 +800c101c +80050c20 +8008101e +80111c32 +80172334 +801a2028 +80313c48 +800c0e12 +80070c14 +80070c14 +802b2e32 +80133372 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80204572 +80001b60 +80304f74 +80304f74 +8024477a +8024477a +80152542 +80152542 +80646768 +80646768 +80030508 +80030508 +80507798 +80030508 +803b6492 +803b6492 +80152748 +80152748 +80152748 +80426ea6 +80426ea6 +80395486 +80395486 +80000000 +80476a78 +80040b24 +80040b24 +80000000 +8005102e +80000000 +80172334 +80040812 +80030508 +801c2c50 +800a1730 +80001b6e +80233654 +80455c78 +80233654 +802f445e +80233654 +801c2c50 +80182b44 +80040812 +804c647c +800b1f44 +803f2f1a +80304f74 +80152542 +80507798 +80426ea6 +80000000 +80000000 +80214062 +800d141e +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80384654 +801a1e2c +802a334a +802c3b5e +80222e4e +802c3b5e +8026272c +80101420 +801c3360 +80344a82 +801b2b40 +8052617c +801a2b48 +80394a60 +80949b96 +801a2b48 +80424b5a +801a2b48 +801a2b48 +800d0e16 +801a2b48 +80394a60 +801a2b48 +801a2b48 +801a2028 +800a1730 +8008101e +800d141e +800c101c +80040812 +8008101e +8008101e +800d141e +80030508 +80070c14 +80182b44 +80072560 +800c0e12 +80111520 +80070c14 +8006143a +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80152748 +800b1f44 +800b1f44 +8005102e +800b1c3c +80646768 +80646768 +80071126 +80071126 +800b1f44 +800b1f44 +80334452 +80334452 +80162f5c +80162f5c +80121b28 +80000314 +80152748 +80233654 +80253444 +80253444 +80000000 +80000000 +80030508 +80030508 +80030508 +80426ea6 +800c0e12 +80476a78 +80476a78 +8013336a +80030508 +80070c14 +80030508 +80030508 +80040812 +8005102e +80000314 +80030508 +80455c78 +80253444 +802f445e +80677784 +802d487e +80000314 +80304f74 +80505b66 +804c647c +8016284e +8005102e +80646768 +800b1c3c +80000314 +80000000 +80233654 +80484646 +80182b44 +80000314 +80455c78 +80072560 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801c2422 +80181b2a +801a2b48 +80294c74 +801a2b48 +8040507a +801a2b48 +800d1218 +801b1e26 +800e1718 +801d2d4e +801a2b48 +800d0e16 +802b447a +800e1718 +8046524c +80171820 +8012141c +80151820 +801a2b48 +801a2b48 +80232e38 +801a2b48 +801a2b48 +80212836 +800e1926 +80003360 +800f1d16 +801f2938 +80141c30 +800e1718 +801f2938 +800e1718 +80003360 +80384654 +801d2d4e +8052617c +80222e4e +801d2d4e +802a334a +800e1718 +800e1718 +8035485e +801f2938 +8052617c +800d0e16 +802b3d68 +80222e4e +80495d68 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802d487e +802d487e +80000314 +80050c20 +80050c20 +80152542 +80152542 +80233654 +80233654 +80030508 +802f445e +802d487e +802d487e +80000314 +80000314 +80050c20 +80050c20 +80070c14 +80070c14 +800a1730 +80061744 +80182b44 +80182b44 +80111314 +80111314 +8005102e +8005102e +80313336 +80313336 +8004266a +8004266a +8004266a +80001f6e +80040812 +802b2e32 +80001f6e +80313c48 +801c3d6e +80030508 +80030508 +80000000 +804f6b86 +80030508 +80253444 +80233654 +8024477a +80050c20 +8008101e +80162f5c +80264e88 +800b1c3c +8004266a +80313336 +802f445e +802d487e +80505b66 +80182b44 +80456a86 +802e4c84 +80152542 +80253444 +803f5d88 +80030508 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8025334e +807c909e +8001040a +80b2b8be +802a3a58 +801f2b40 +801a1f32 +800f1d16 +807c8378 +800d0e16 +80141c30 +801c2540 +801a2b48 +800d0e16 +801a2b48 +801a1f32 +8043525e +80273444 +800d1218 +803b578a +802b3a50 +801a2b48 +8012141c +80172124 +80424f6a +80131b38 +80304b7a +80294988 +800e1518 +80070708 +800d0e16 +80293742 +801a2b48 +801a2b48 +80222e4e +800d0e16 +800d1218 +80344a82 +800d1218 +803d485a +802b447a +800d0e16 +801e1f2c +80212836 +80151b26 +804d5668 +801b1e26 +801e1f2c +80181b2a +801a2b48 +800d0e16 +80222e4e +801a2b48 +802b3d68 +8012141c +801a2b48 +801a2b48 +8054584a +801a1f32 +80232e38 +802a334a +800e1926 +801a2b48 +80384654 +801b1e26 +801e2534 +800d0e16 +80181b2a +800d0e16 +801a2b48 +803d485a +80222e4e +803b578a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +800c101c +801c2c50 +80040812 +80040812 +800a2458 +800a2458 +8092a4b4 +8092a4b4 +80182b44 +80182b44 +80040812 +80050c20 +80000314 +80000314 +80040812 +80040812 +80070c14 +80070c14 +80030508 +80030508 +80040812 +80040812 +80050c20 +80050c20 +80000314 +80000314 +80000314 +80000314 +8013336a +8013336a +80646768 +80646768 +802d487e +802d487e +80000000 +8006143a +802b2e32 +801b1e20 +800d141e +80313c48 +80201f20 +80030508 +800c0e12 +802b2e32 +80040812 +800a2452 +800d141e +80030508 +80172334 +80131920 +80111c32 +80212c3c +80566d82 +80070c14 +800a2458 +80050c20 +80000314 +80050c20 +80405476 +8005102e +800a2458 +80233654 +800b1c3c +80233654 +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80192434 +800d0e16 +805c6772 +801b2b40 +8026272c +801c2540 +801a2b48 +801a2b48 +800d0e16 +80334656 +801a2b48 +801b2b40 +801a1f32 +8040507a +800d0e16 +8040507a +80394a60 +800d0e16 +800d0e16 +801b2b40 +8040507a +8040507a +8052617c +80222e4e +801a2b48 +801a2b48 +8001040a +801a1f32 +801a1f32 +800d1218 +80424b5a +80424b5a +801a2b48 +800d0e16 +80101420 +80394a60 +801a2b48 +800d0e16 +8001040a +801a2b48 +801a1f32 +801a2f52 +80222f4a +80444a3a +801a2b48 +800e1718 +80566880 +804d5668 +80192434 +80424f6a +8054584a +80232e38 +801e1f2c +803d4442 +80555f5e +80243b6c +80294988 +801f2d48 +80000000 +80212836 +800d0e16 +803b578a +801a2b48 +80222e4e +802b447a +803d485a +801d2d4e +80101420 +800d0e16 +80384654 +80181b2a +801a2b48 +801a2b48 +800d0e16 +800d0e16 +80364152 +8012141c +801a2b48 +800d0e16 +801a2b48 +80273444 +80272f46 +80344a82 +801a2b48 +802c3b5e +801a2b48 +801d2d4e +80070708 +80294988 +80294988 +80424f6a +80232e38 +804b595c +8052617c +8030435e +80555f5e +805a6c72 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070708 +802e3e4c +80232e38 +80141c30 +8017212c +80101a20 +801d2d4e +80838872 +800c0c0e +801b242c +80192434 +8052617c +800d1218 +80232e38 +800f1d16 +8025334e +801f2938 +80384654 +802b3a50 +80364152 +80303744 +800d1218 +801d2d4e +800d0e16 +80151a2a +80030812 +8017212c +80151a2a +80000000 +80000000 +801d2d4e +800d0e16 +8017212c +80000000 +80151a2a +80151a2a +80151a2a +802d352c +80151a2a +80000000 +80000000 +80192434 +80000000 +800d1218 +80304152 +80141c30 +8001040a +80273444 +80070c14 +80040812 +80253444 +80001f6e +800c0e12 +802b2e32 +80172334 +800a2452 +80485364 +80212c3c +80111520 +800c0e12 +805a544a +80111520 +80111520 +80030508 +80050c20 +80313336 +8005102e +8093b1d2 +80040812 +803e4550 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +80838872 +80182e4e +801d2f52 +801a2b48 +801a2b48 +802c3b5e +80181b2a +801a1f32 +80212836 +8043525e +80141c30 +8040507a +800d0e16 +800d0e16 +80182e4e +80222f4a +800d0e16 +8046524c +800f1220 +80394a60 +80384654 +801a2b48 +8040507a +804d5668 +801a2b48 +801c2540 +8001040a +80182e4e +8040507a +80222e4e +80030812 +801f2938 +801a2b48 +801a2b48 +806d7566 +800d0e16 +8012141c +80222f54 +801e2534 +805c6772 +802b3d68 +00000000 +00000000 +80040812 +80070c14 +8008101e +80000000 +80040812 +80030508 +80040812 +80050c20 +80070c14 +80070c14 +80040812 +80131920 +800c101c +80576050 +8064716e +80747864 +80777e6a +809ea9b2 +80555f5e +80616f9a +80222f4a +8019273a +80424f6a +803d4442 +801e1f2c +801e1f2c +803d4442 +80131b38 +80243b6c +80294988 +80304b7a +80070708 +80000000 +801d2d4e +80424f6a +8012141c +800f1d16 +80424b5a +800f1220 +800d0e16 +800f1d16 +800f1d16 +80151820 +80151820 +80243b6c +80304b7a +804c574c +80131b38 +804c574c +801c3360 +80686c5a +807c8e8e +80576050 +80636954 +806d745e +80131b38 +806d745e +80747864 +80878c7a +806d745e +8019305a +80222d40 +80686c5a +80878c7a +80686c5a +80293742 +8017212c +801b242c +80151a2a +801b242c +80030812 +80161d26 +80080b18 +8019273a +8013274e +800e101e +80444a3a +80000000 +80384654 +801a2f52 +80273444 +801f2938 +804d5a70 +80232e38 +8026272c +80070708 +80030812 +80384e68 +8040507a +80000000 +801c2422 +802a3a58 +80000000 +8030435e +801b242c +8054584a +80344a82 +8001040a +80838872 +80000000 +80000000 +802b3d68 +800d0e16 +800d0e16 +80000000 +80838872 +80000000 +80070708 +8017212c +80080b18 +80212836 +80303744 +800e1926 +80232e38 +800d1920 +80232e38 +800d1218 +80182e4e +80030812 +800d0e16 +800d1218 +80182e4e +80080b18 +80003360 +80192434 +8017212c +80000000 +80172334 +80030508 +800c0e12 +802b2e32 +80212c3c +80212c3c +800a2452 +800a2452 +80313c48 +800c0e12 +80204572 +802b2e32 +802b2e32 +80313c48 +800c0e12 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +80182e4e +801a2b48 +801b2b40 +80273444 +80334656 +8012141c +800d1218 +8012141c +801d2d4e +80222e4e +80394a60 +802b447a +801a2b48 +800d0e16 +80101420 +800f1220 +8001040a +801a2b48 +801a2b48 +804d5668 +801a2b48 +80949b96 +80949b96 +8052617c +801a2b48 +801a2b48 +801b2b40 +8001040a +800d0e16 +80293742 +80222f54 +8001040a +80003360 +800d0e16 +80212836 +80222e4e +801a1e2c +800d0e16 +802b3d68 +802e3e4c +801e2534 +8001040a +801a2b48 +800d0e16 +801e2534 +801e2534 +801b2438 +800e1926 +80101420 +802d3344 +802d3344 +80101420 +80101420 +80182e4e +80232e38 +80232e38 +80161d26 +801b1e26 +80222e4e +801a2b48 +80273444 +8001040a +802d352c +80030812 +804d5a70 +80192434 +80151b26 +80212836 +80222e4e +80030812 +803b578a +800d1218 +80344a82 +801d3058 +80172a64 +80101a20 +801b2438 +80424f6a +800d1920 +80232e38 +80293742 +80576050 +804b595c +8019305a +8064716e +805d695e +80747864 +80686c5a +8081826e +80243b6c +80131b38 +80131b38 +80172124 +80080b18 +801d2d4e +80222d40 +80222d40 +806d745e +80262f54 +800e1720 +80777e6a +80747864 +8019305a +8081826e +80222d40 +80686c5a +80878c7a +80686c5a +80222d40 +80686c5a +80777e6a +80686c5a +803f4c66 +80243b6c +80294988 +80070708 +80080b18 +80222e4e +80070708 +800c0e12 +802b2e32 +802b2e32 +801a2028 +801a2028 +80313c48 +80313c48 +802b3744 +802b3744 +80212c3c +80131920 +80111314 +801a2f52 +80838872 +801c2422 +802e3e4c +800d0e16 +80151a2a +8017212c +801b242c +8019273a +800d0e16 +80384e68 +800d1218 +80182e4e +801f2938 +80003360 +8001040a +800e1718 +802e3e4c +80151a2a +80222e4e +80232e38 +80273444 +801f2938 +80030812 +80030812 +8017212c +80030812 +80151a2a +80222e4e +801f2938 +80151a2a +801d2d4e +80151a2a +80212836 +801f2938 +80151a2a +8054584a +800e101e +80293742 +80101a20 +80101a20 +802d3344 +800c0e12 +80082464 +801c3d6e +80002672 +80142856 +80001f6e +800a2452 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +801a2138 +800d0e16 +8001040a +801a2b48 +80273444 +804d5a70 +801d2d4e +801a2b48 +8052617c +801a2b48 +802b3d68 +80374046 +803b578a +800d0e16 +80181b2a +801b2b40 +801a2b48 +80303744 +8012141c +80212836 +80222e4e +801f2b40 +804d5668 +80101420 +80182e4e +801e2534 +801a1f32 +80334656 +8040507a +801a1f32 +8040507a +801a2138 +801a2b48 +8043525e +801a2138 +800f1220 +80101420 +801a1e2c +800d1218 +80546674 +801a2b48 +801a2b48 +801a2b48 +802b3d68 +80293742 +80364152 +801e1f2c +801a2b48 +80001f6e +80030508 +801c3d6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806d745e +80747864 +803f608a +8019305a +803f4c66 +806d745e +80747864 +80576050 +80777e6a +806d745e +800e1720 +80576050 +80686c5a +806d745e +80878c7a +80222d40 +806d745e +80222d40 +8064716e +806d745e +80636954 +803f608a +803f608a +80747b6c +800e1720 +80878c7a +806d745e +8019305a +8019305a +806d745e +80636954 +80686c5a +8081826e +80686c5a +806d745e +8081826e +80131b38 +80131b38 +80243b6c +80181b2a +80070708 +8054584a +80070708 +80070708 +80000000 +80000000 +80000000 +80000000 +8017212c +8017212c +80080b18 +80444a3a +80151a2a +800d1218 +8017212c +800f1910 +80222f4a +80182e4e +800d1218 +803d485a +802e3e4c +80232e38 +8026272c +802e3e4c +8052617c +80293742 +8040507a +80101420 +80222e4e +80384654 +803b578a +80151a2a +800e1718 +80151a2a +80161d26 +8030435e +80192434 +80151a2a +8052617c +8054584a +801d2f52 +80182e4e +806d7566 +801b242c +801f2938 +80162140 +801e2534 +80141c30 +8012141c +80384654 +80030812 +80080b18 +80232e38 +80838872 +802b3d68 +802e3e4c +800e1926 +80838872 +80080b18 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +800d0e16 +8012141c +801a2b48 +800d0e16 +801e2534 +802b3d68 +801a2b48 +801e1f2c +80101420 +801a2b48 +80222f54 +801e2534 +80374046 +801f2938 +802b447a +801a1f32 +800d0e16 +801b2b40 +807c8378 +800d0e16 +80212836 +801f2b40 +801a1e2c +801f2938 +800e1718 +801a2b48 +801a1f32 +801c2540 +801a2b48 +80182e4e +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +800c0e12 +80030508 +80040812 +80030508 +80030508 +801a2028 +80070c14 +801a2028 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806d745e +80686c5a +80747864 +80686c5a +80878c7a +80636954 +80686c5a +80747864 +8019305a +800e1720 +8019305a +80636954 +806d745e +80747864 +806d745e +806d745e +80878c7a +806d745e +8019305a +806d745e +80686c5a +800e1720 +80777e6a +806d745e +800e1720 +806d745e +8081826e +80131b38 +80131b38 +80172124 +801a2b48 +801e1f2c +801b1e26 +80070708 +80070708 +80070708 +80000000 +80000000 +80000000 +80000000 +8017212c +80151a2a +80151a2a +80151a2a +80000000 +80000000 +80151a2a +80000000 +80151a2a +80838872 +80151a2a +80162140 +80444a3a +8040507a +80182e4e +8017212c +80080b18 +80030812 +80151a2a +80080b18 +80080b18 +8025334e +80293742 +800f1d16 +80303744 +801b242c +80101a20 +8052617c +80030812 +8017212c +801e2534 +80003360 +800e1926 +80232e38 +801d2d4e +80151b26 +80161d26 +80151a2a +801b2b40 +8006143a +80212c3c +800a2452 +802b2e32 +801a2028 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +80182e4e +801a2b48 +801a2b48 +80374046 +80424b5a +802a334a +801a2b48 +801b2b40 +80222e4e +80212836 +800d0e16 +801a2b48 +80212836 +801e2534 +8025334e +801b2b40 +80739390 +802c3b5e +801a2b48 +8025334e +8036435e +80304152 +801a2b48 +80222e4e +80151b26 +802a3a58 +801e2534 +80141c30 +801a2b48 +8001040a +801a1f32 +80030508 +80040812 +800c0e12 +802b2e32 +80030508 +80000000 +80070c14 +800c0e12 +802b2e32 +80133372 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801c2c50 +801c2c50 +80070c14 +800c101c +800c101c +80111c32 +80111c32 +80072560 +80072560 +801a2028 +801a2028 +800c101c +80131b38 +80131b38 +80222d40 +8081826e +800e1720 +806d745e +80878c7a +80636954 +8019305a +80747864 +80262f54 +80747864 +80262f54 +80747864 +80777e6a +80636954 +806d745e +80576050 +80243b6c +80172124 +801a2b48 +801e1f2c +80070708 +80070708 +80070708 +80070708 +80070708 +80080b18 +80000000 +80000000 +8017212c +80222d46 +8017212c +80444a3a +802a2f3a +802a4a80 +800d1218 +80030812 +801f2938 +800e1926 +801b242c +800e1926 +80030812 +80101a20 +803b578a +801f2938 +801f2938 +80151a2a +80303744 +800e1926 +80080b18 +800d1920 +80838872 +8001040a +800d1218 +8017212c +80080b18 +80151a2a +8005102e +8005102e +80111520 +800c0e12 +802b2e32 +80131920 +801a2028 +802b3744 +80313c48 +801a2028 +80111520 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +801b2b40 +8040507a +80141c30 +8036435e +806d7566 +8052617c +80141c30 +801a2b48 +801a2b48 +800e101e +801a2b48 +801b2b40 +80303744 +801a1f32 +800f1220 +8036435e +801f2b40 +80739390 +807c8378 +800f1d16 +801a2b48 +80182e4e +802a374a +804d5668 +800f1220 +800d0e16 +8012141c +801d2d4e +8001040a +800f1d16 +804d5668 +801a2b48 +80313c48 +80131920 +802b3744 +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182b44 +80111c32 +80212c3c +80111c32 +801a2028 +801a2028 +80111c32 +80111c32 +801a2028 +80253444 +8013336a +8013336a +80152748 +80253444 +80253444 +80172334 +80172334 +80111c32 +80111c32 +80212c3c +80212c3c +80152542 +80152542 +80253444 +80253444 +80212c3c +80313c48 +80313c48 +802b3744 +802d487e +801e1f2c +800d1218 +801a2b48 +80070708 +80243b6c +80243b6c +80131b38 +80222d40 +80243b6c +80304b7a +8040507a +80070708 +8017212c +80070708 +8017212c +80070708 +80070708 +80070708 +80000000 +80000000 +8017212c +80141c30 +80182e4e +80080b18 +80080b18 +800e1926 +80232e38 +80101a20 +80162138 +80141c30 +802e3e4c +80080b18 +801c2422 +804d5668 +801f2938 +80273444 +80334656 +806d7566 +80152748 +800c101c +800d141e +80111c32 +80212c3c +80111f40 +80070c14 +80111520 +80212c3c +80212c3c +801a2028 +80111314 +80313c48 +80001f6e +80111520 +800c101c +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802a374a +804d5668 +8040507a +801d2f52 +801a2f52 +8040507a +80293742 +800d0e16 +800e101e +80141c30 +80162140 +80181b2a +802b447a +8054584a +80384654 +806d7566 +80394a60 +802a3a58 +801a2b48 +801f2b40 +8036435e +801a2b48 +80040812 +80000000 +80030508 +80030508 +800c101c +800c0e12 +80030508 +80131920 +80212c3c +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +80030508 +80030508 +80030508 +80030508 +80040812 +80070c14 +80030508 +800c0e12 +800c0e12 +80182b44 +80182b44 +800d141e +80070c14 +80070c14 +801a2028 +801a2028 +8092a4b4 +8092a4b4 +800c101c +800c101c +80111520 +80111520 +80233654 +801a2028 +80111520 +80072560 +80072560 +80111520 +80111520 +80172334 +80172334 +80072560 +80072560 +800d141e +800d141e +80212c3c +80212c3c +80111c32 +80111c32 +80040812 +80040812 +80070c14 +80070c14 +801a2028 +801a2028 +80253444 +80070708 +8017212c +80070708 +80070708 +803b578a +80070708 +80070708 +80070708 +80070708 +80000000 +80000000 +80000000 +80181b2a +80222e4e +8017212c +800c0c0e +80101a20 +800c0c0e +800d1920 +80111520 +801a2028 +80212c3c +80172334 +80172334 +800d141e +800c0e12 +80070c14 +80070c14 +80253444 +802f445e +80607a94 +80070c14 +800d141e +801f366e +80111c32 +80253444 +800d141e +80212c3c +80172334 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8040507a +800d0e16 +80222f4a +80273444 +80293742 +804d5a70 +80304152 +80364152 +803d485a +801a2b48 +801a2b48 +80040812 +80030508 +80030508 +80040812 +8008101e +80040812 +80030508 +80000000 +80000000 +80030508 +800c0e12 +80030508 +80313c48 +80212c3c +800c0e12 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80070c14 +80070c14 +80070c14 +80070c14 +80072560 +80072560 +80030508 +80030508 +80030508 +8008101e +8008101e +8008101e +8008101e +801a2028 +80030508 +80040812 +801a2028 +801a2028 +801c2c50 +801c2c50 +8013336a +80070c14 +801a2028 +8013336a +8013336a +800b1c3c +800b1c3c +800c101c +800c101c +80233654 +80233654 +80172334 +80172334 +800c101c +800c101c +800d141e +800d141e +800c101c +800c101c +800c101c +800c101c +80212c3c +80212c3c +80152542 +80152542 +80070c14 +80070c14 +800d141e +800d141e +80072560 +80072560 +80111c32 +80111c32 +80030508 +800c0e12 +800c0e12 +800c0e12 +802b2e32 +80070c14 +800c0e12 +80030508 +800c0e12 +80131920 +800c101c +80040812 +80070c14 +80111520 +80172334 +80414444 +801c2c50 +80111c32 +80111c32 +80233654 +80172334 +8013336a +80172334 +80182b44 +80001b60 +8024477a +80000314 +800c0e12 +80111520 +801a2028 +800c101c +80172334 +80111520 +80212c3c +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80040812 +80030508 +800d141e +80030508 +80030508 +80000000 +80030508 +80030508 +800d141e +80253444 +80313c48 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80070c14 +80001f6e +80111520 +80030508 +80030508 +80070c14 +80070c14 +800d141e +80040812 +80040812 +80212c3c +80212c3c +80172334 +80172334 +80030508 +80030508 +80030508 +800d141e +80072560 +80172334 +80172334 +80040812 +80040812 +800c101c +801a2028 +801a2028 +80070c14 +80070c14 +80072560 +80072560 +80070c14 +80070c14 +80111c32 +80111c32 +80182b44 +80182b44 +80233654 +80233654 +80152542 +80152542 +80072560 +80072560 +802d487e +80070c14 +80030508 +80030508 +80070c14 +80070c14 +8008101e +80070c14 +80040812 +800c101c +80070c14 +80070c14 +800c101c +800c101c +800a2452 +800c101c +802b3744 +80072560 +801a2028 +80070c14 +800c101c +800c101c +80030508 +80040812 +80001f6e +80172334 +80070c14 +801a2028 +80030508 +80030508 +80040812 +80040812 +80030508 +80070c14 +80162f5c +80111c32 +80172334 +80001f6e +8005102e +800a1730 +80050c20 +80001f6e +800c0e12 +801a2028 +80001f6e +800c101c +80212c3c +80172334 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80072560 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80000000 +80000000 +80030508 +80030508 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +800c101c +801a2028 +801a2028 +80030508 +80030508 +801a2028 +801a2028 +80070c14 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +800c101c +800c101c +80233654 +80111c32 +80111c32 +80040812 +80040812 +800d141e +80070c14 +80172334 +80072560 +80072560 +80072560 +80172334 +80072560 +800c0e12 +800c0e12 +800c0e12 +80111520 +80030508 +80233654 +80233654 +8008101e +8008101e +802d4674 +80111520 +80233654 +80233654 +800c0e12 +800c0e12 +801a2028 +80070c14 +80070c14 +80070c14 +80030508 +80030508 +8013336a +80111c32 +80030508 +800c101c +80131920 +800c101c +800c101c +80172334 +8006143a +80206398 +800a2452 +80001f6e +80001f6e +800c0e12 +800c0e12 +80131920 +801a2028 +801a2028 +80040812 +80070c14 +800c101c +800c101c +80030508 +80030508 +80030508 +80000000 +80072560 +80030508 +801a2028 +80050c20 +80152542 +80414444 +802f445e +80313336 +800c101c +800c0e12 +80253444 +80040812 +802b3744 +8013336a +800c101c +801a2028 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80040812 +80030508 +80040812 +80070c14 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80030508 +80070c14 +800c0e12 +800c0e12 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80182b44 +80182b44 +80072560 +800d141e +800d141e +8008101e +8008101e +80070c14 +80111c32 +80111c32 +800a2458 +800a2458 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80072560 +800a1730 +800a1730 +80030508 +80030508 +80172334 +80172334 +80040812 +80040812 +80070c14 +80070c14 +80182b44 +80182b44 +80152542 +80070c14 +80070c14 +80070c14 +800c101c +80070c14 +80070c14 +800c0e12 +800c0e12 +80072560 +80172334 +800d141e +800d141e +801a2028 +80253444 +80072560 +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80111520 +800c101c +800c0e12 +80070c14 +80131920 +800c0e12 +800a2452 +80111314 +80111520 +805a544a +80001f6e +00000000 +00000000 +00000000 +00000000 +80253444 +80313c48 +80172334 +80040812 +80030508 +800d141e +800c0e12 +80172334 +800d141e +80030508 +80212c3c +80001f6e +80172334 +80030508 +80040812 +80172334 +80030508 +80040812 +80030508 +80111c32 +803b6492 +80050c20 +803f5684 +80212c3c +80233654 +800c101c +80070c14 +801a2028 +80152542 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80040812 +80070c14 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +800c0e12 +80030508 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80172334 +80414444 +80414444 +80030508 +801a2028 +801a2028 +80072560 +80070c14 +80070c14 +8008101e +8008101e +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +800c0e12 +800c0e12 +800d141e +800c101c +800c101c +80070c14 +8013336a +80152748 +80070c14 +80070c14 +80040812 +80040812 +80111c32 +80111c32 +80111c32 +80111c32 +80030508 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80070c14 +800d141e +800d141e +8013336a +8013336a +80070c14 +80070c14 +8013336a +8013336a +80030508 +80030508 +80070c14 +802b3744 +800d141e +800d141e +800c101c +80111520 +800d141e +800c0e12 +80030508 +80313c48 +80456a86 +801b1e20 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80040812 +800c101c +801a2028 +800c0e12 +801a2028 +800d141e +80001f6e +800d141e +800c0e12 +80040812 +80030508 +80070c14 +80030508 +80030508 +80072560 +80111c32 +80172334 +80072560 +80172334 +802b3744 +80070c14 +80001f6e +80131920 +800c101c +800c0e12 +80030508 +800c101c +800d141e +801c2c50 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80070c14 +80070c14 +80000000 +80000000 +80070c14 +80040812 +8008101e +80030508 +80070c14 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a1730 +800a1730 +80072560 +80152542 +80152542 +80152542 +80152542 +8008101e +80070c14 +80070c14 +80070c14 +80070c14 +800c101c +8008101e +8008101e +8008101e +8008101e +8013336a +80040812 +80040812 +8008101e +8008101e +80040812 +80030508 +80030508 +8008101e +8008101e +80070c14 +80070c14 +80030508 +80070c14 +80414444 +800a1730 +800a1730 +800a1730 +800a1730 +80172334 +80172334 +800d141e +800d141e +800a2458 +800a2458 +8013336a +8013336a +800c101c +80072560 +802b2e32 +800c101c +800c0e12 +800c0e12 +801a2028 +80212c3c +80206398 +800d141e +802b2e32 +800c0e12 +802b2e32 +800a2452 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800d141e +800a2458 +801a2028 +800d141e +800c0e12 +80072560 +80001f6e +801a2028 +801a2028 +80070c14 +800d141e +80030508 +800c101c +8008101e +80040812 +800c101c +80040812 +80182b44 +80070c14 +80072560 +80001f6e +80111c32 +80212c3c +80111520 +800c0e12 +80111520 +80070c14 +800c101c +80070c14 +800d141e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80040812 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80040812 +80040812 +800c0e12 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80040812 +80040812 +800c101c +8008101e +8008101e +80172334 +800c101c +800c101c +8013336a +8013336a +80182b44 +8008101e +8008101e +8008101e +8008101e +8008101e +80111520 +80111520 +80414444 +80414444 +8008101e +800a2458 +800a2458 +8008101e +8008101e +800c101c +80111c32 +80111c32 +800c101c +80040812 +80030508 +80030508 +80030508 +80040812 +80111c32 +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +8013336a +80072560 +80172334 +80070c14 +80040812 +80111c32 +80070c14 +80070c14 +80131920 +80204572 +80072560 +80070c14 +8006143a +80000000 +802b2e32 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +800d141e +800c101c +80030508 +80070c14 +80070c14 +80111c32 +801a2028 +801a2028 +80313c48 +80131920 +80030508 +80072560 +80070c14 +80070c14 +80072560 +80111c32 +80111c32 +80030508 +80030508 +80070c14 +80111520 +802b3744 +80414444 +80070c14 +800a2452 +801a2028 +800d141e +802b2e32 +80070c14 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +800c0e12 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80040812 +80040812 +80070c14 +801a2028 +801a2028 +800a1730 +800a1730 +80040812 +80070c14 +80070c14 +8008101e +80172334 +80172334 +8008101e +8008101e +80030508 +80070c14 +80070c14 +80070c14 +80050c20 +80131920 +80072560 +80072560 +8008101e +8008101e +80070c14 +80070c14 +80111c32 +80111c32 +80111c32 +80212c3c +80212c3c +80172334 +800c101c +800d141e +80172334 +80172334 +80070c14 +80070c14 +80313c48 +8008101e +800c0e12 +80070c14 +800c101c +800d141e +800c101c +80485364 +80040812 +800c101c +80212c3c +80313c48 +8040586a +802b2e32 +801b1e20 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313c48 +80070c14 +800c101c +80040812 +8093b1d2 +8008101e +800b1c3c +8013336a +800c101c +80072560 +800c101c +80030508 +80072560 +80050c20 +80070c14 +8008101e +80111c32 +800d141e +800a2458 +800c101c +801a2028 +80131920 +80212c3c +80253444 +801a2028 +80111520 +802b3744 +80212c3c +802b2e32 +80131920 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +800c101c +800c101c +80070c14 +800c0e12 +800c0e12 +800d141e +80030508 +80070c14 +80040812 +80040812 +800c0e12 +800d141e +800d141e +80030508 +8008101e +8008101e +80070c14 +80070c14 +80070c14 +800c101c +800c101c +800c101c +800c101c +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80070c14 +80070c14 +80030508 +800a2458 +80131920 +80070c14 +80070c14 +80030508 +80182b44 +800d141e +80111c32 +800c101c +8013336a +80253444 +80111520 +802b2e32 +80001f6e +80111520 +8006143a +80201f20 +80133372 +80383a3a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80111520 +801a2028 +80111c32 +80030508 +80040812 +80070c14 +80131920 +801a2028 +8013336a +800a1730 +800c101c +8008101e +800c101c +800a2458 +800d141e +800c101c +800c0e12 +80070c14 +80172334 +800c101c +80111c32 +802b3744 +80070c14 +800c0e12 +80131920 +80040812 +8059636a +80111c32 +800c101c +80131920 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80070c14 +80070c14 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80070c14 +800a2458 +800a2458 +8008101e +8008101e +80070c14 +8008101e +800c101c +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +80040812 +800a2458 +80072560 +80040812 +80040812 +800d141e +80030508 +800c0e12 +802f445e +80142856 +801a2028 +802b3744 +802d4674 +80456a86 +80212c3c +8006143a +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +800c0e12 +80111c32 +801a2028 +80050c20 +80040812 +800d141e +80131920 +80172334 +800d141e +800d141e +801a2028 +8013336a +8008101e +8008101e +80070c14 +80040812 +80131920 +800c101c +80253444 +800d141e +800d141e +80485364 +80253444 +80030508 +80070c14 +800d141e +800a2452 +801a2028 +80070c14 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80040812 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80030508 +8008101e +800c101c +800c101c +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80040812 +8008101e +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80030508 +80030508 +80040812 +80030508 +800a2458 +80070c14 +80070c14 +801a2028 +80050c20 +800c101c +80030508 +80070c14 +80040812 +80030508 +800c101c +800c101c +800c101c +800c101c +80072560 +801a2028 +801a2028 +800c0e12 +80111520 +80111520 +80212c3c +80212c3c +800a2452 +80172334 +80313c48 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80131920 +800c101c +800c0e12 +800a2458 +800c101c +80040812 +80072560 +80131920 +80212c3c +80070c14 +80070c14 +80030508 +80253444 +80050c20 +8008101e +800c0e12 +800c101c +80212c3c +80030508 +8008101e +80414444 +80131920 +802b2e32 +80152542 +80001f6e +800c0e12 +80072560 +8006143a +800a2452 +80070c14 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +801c3d6e +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80070c14 +80070c14 +800c101c +80030508 +80030508 +80040812 +80040812 +80040812 +800c101c +800c101c +80070c14 +80040812 +80040812 +80040812 +800c101c +800c101c +80040812 +80070c14 +80070c14 +80040812 +80040812 +80030508 +80030508 +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +800c101c +80040812 +800c101c +800c101c +800c0e12 +80072560 +800c0e12 +80001f6e +800c0e12 +800d141e +80313c48 +80131920 +80313c48 +802b2e32 +802b3744 +80111520 +80131920 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +801a2028 +801a2028 +801a2028 +8008101e +8008101e +8008101e +801a2028 +801a2028 +800c101c +800a1730 +800d141e +8008101e +80040812 +800c0e12 +80070c14 +80030508 +80030508 +800c101c +80072560 +800c101c +80253444 +800c101c +800c101c +80172334 +800d141e +80111c32 +801b1e20 +802b2e32 +802b3744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80001f6e +80131920 +80030508 +80313c48 +80030508 +80000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80070c14 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +8013336a +8008101e +80070c14 +80040812 +80070c14 +80040812 +80070c14 +80040812 +80030508 +80030508 +800c101c +800c0e12 +800d141e +80313c48 +800c101c +80313c48 +800c0e12 +801a2028 +80001f6e +80131920 +80030508 +801b1e20 +800c0e12 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +801a2028 +80070c14 +80040812 +800d141e +80070c14 +8013336a +80040812 +80030508 +80030508 +80030508 +80030508 +80072560 +80040812 +80030508 +800d141e +80152542 +801a2028 +80313c48 +80111314 +80030508 +80133372 +8006143a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80111520 +800c0e12 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80040812 +800c0e12 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80313c48 +80111520 +80313c48 +80313c48 +802a2b26 +80133372 +800c0e12 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80030508 +80040812 +80030508 +80070c14 +800c101c +80070c14 +80030508 +80040812 +80040812 +80030508 +80040812 +80070c14 +80070c14 +80040812 +800c101c +80070c14 +80070c14 +80040812 +80072560 +800a2458 +8008101e +800d141e +80485364 +8013336a +800c0e12 +802b3744 +80070c14 +80172334 +80172334 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80111c32 +80040812 +800d141e +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80131920 +800c0e12 +80030508 +80070c14 +80070c14 +80000000 +800c0e12 +800d141e +800d141e +800c0e12 +800a2452 +80383a3a +80111520 +801c3d6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +8008101e +80040812 +80070c14 +80030508 +80030508 +80040812 +80040812 +80070c14 +80030508 +80040812 +80070c14 +80070c14 +80040812 +80070c14 +80030508 +801a2028 +80072560 +80111520 +80030508 +800d141e +800c101c +80072560 +8013336a +80313c48 +80133372 +800a2452 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80030508 +800c0e12 +80070c14 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +800c101c +80040812 +80040812 +80040812 +80030508 +800c101c +80313c48 +80313c48 +8006143a +80383a3a +80133372 +80082464 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +800c101c +80040812 +80070c14 +80040812 +8013336a +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80111520 +80070c14 +800c0e12 +800c101c +80070c14 +80111520 +800c0e12 +802b2e32 +80201f20 +80313c48 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80070c14 +80000000 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80030508 +80070c14 +800c101c +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +800c0e12 +80313c48 +800c0e12 +80212c3c +801a2028 +800c0e12 +800c0e12 +802b2e32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +80000000 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +8008101e +800c101c +80070c14 +800c101c +80030508 +800c101c +800c0e12 +800c101c +80070c14 +801a2028 +80070c14 +80111520 +8006143a +801b1e20 +800c0e12 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80040812 +80000000 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80040812 +80030508 +80030508 +800c101c +80030508 +800c0e12 +80070c14 +80030508 +80313c48 +800c0e12 +80313c48 +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +800c0e12 +80040812 +80030508 +80040812 +80072560 +800c0e12 +80030508 +80030508 +801c3d6e +80172334 +80212c3c +802b3744 +802b3744 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80040812 +80040812 +80111520 +80030508 +800a2452 +80030508 +80030508 +800c0e12 +800c0e12 +80030508 +80111520 +802b3744 +800a2452 +8006143a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80070c14 +8013336a +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80070c14 +800d141e +80313c48 +80131920 +80040812 +80030508 +80030508 +800c0e12 +800c0e12 +800a2452 +80111314 +80313c48 +80131920 +80002672 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +800d141e +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80070c14 +80030508 +800c101c +80030508 +80030508 +80030508 +80030508 +80070c14 +80000000 +80070c14 +800d141e +80030508 +80040812 +80030508 +800c0e12 +80030508 +80030508 +80030508 +80030508 +800a1730 +800c0e12 +80072560 +801a2028 +80206398 +80131920 +80201f20 +802a2b26 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80040812 +80030508 +80030508 +80040812 +800c0e12 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80030508 +800c101c +80030508 +80070c14 +80030508 +80000000 +80040812 +80030508 +80040812 +800c0e12 +80030508 +80030508 +800c0e12 +800c0e12 +80070c14 +80212c3c +80172334 +800a2452 +80082464 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80040812 +80030508 +80030508 +80070c14 +80030508 +80000000 +80000000 +80000000 +80070c14 +80030508 +8013336a +80030508 +800c101c +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +800c101c +80072560 +80070c14 +8059636a +800c0e12 +80212c3c +80030508 +8006143a +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +80030508 +80000000 +80030508 +80030508 +80070c14 +80030508 +80070c14 +800c101c +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80040812 +80313c48 +80131920 +80212c3c +80313c48 +8006143a +80111520 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80040812 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80072560 +80070c14 +800c0e12 +80030508 +80070c14 +80070c14 +800d141e +800c0e12 +800c101c +80040812 +80030508 +80030508 +800c0e12 +80030508 +80040812 +800a2452 +800c0e12 +80253444 +805a544a +80082464 +80082464 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +80040812 +80070c14 +80040812 +80040812 +80030508 +80070c14 +80030508 +80040812 +80030508 +80000000 +80000000 +80030508 +800c101c +80000000 +800c101c +80070c14 +802b2e32 +80212c3c +80000000 +802b2e32 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +80030508 +800c101c +80030508 +80000000 +80030508 +80030508 +8008101e +80070c14 +80040812 +80030508 +800c0e12 +80070c14 +80030508 +80040812 +800c101c +80070c14 +80030508 +800c0e12 +80030508 +80000000 +80070c14 +802b3744 +800a2452 +801a2028 +801c3d6e +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80040812 +80030508 +80030508 +80040812 +80000000 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +801a2028 +80030508 +80000000 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +80030508 +80212c3c +80131920 +801b1e20 +80383a3a +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +8008101e +80030508 +80040812 +80070c14 +80030508 +800c0e12 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +802b2e32 +801a2028 +802b2e32 +802b2e32 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80070c14 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +80040812 +80030508 +80111520 +80313c48 +801b1e20 +80111520 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80131920 +80072560 +80082464 +801c3d6e +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80040812 +80040812 +800c0e12 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80313c48 +802b2e32 +80111520 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +801a2028 +80111520 +802b3744 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80313c48 +80000000 +800c101c +80030508 +80072560 +80183e7a +801b1e20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80313c48 +80001f6e +80030508 +800c0e12 +800c0e12 +803f5684 +80313c48 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80000000 +80313c48 +80030508 +80030508 +80000000 +8006143a +80313c48 +800c0e12 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80000000 +80030508 +80030508 +80313c48 +802b2e32 +800c0e12 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +800a2452 +80030508 +80030508 +80030508 +800c0e12 +80000000 +800c0e12 +80030508 +800c0e12 +80001f6e +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +800c0e12 +80030508 +80030508 +80111520 +80000000 +80000000 +80030508 +80000000 +80040812 +80000000 +800c0e12 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +800c0e12 +80000000 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 diff --git a/sim/data/top_psmct32_raster_demo/710613_image.mem b/sim/data/top_psmct32_raster_demo/710613_image.mem new file mode 100644 index 0000000..6d6a04b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/710613_image.mem @@ -0,0 +1,307200 @@ +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +800c0e12 +80030508 +80000314 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +800e1b30 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000314 +80030508 +800c101c +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +800c0e12 +80111520 +80000000 +80040812 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800e1b30 +8022619e +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80131920 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80000000 +800c101c +80070c14 +80000000 +80030508 +80030508 +80070c14 +80030508 +8013336a +80040812 +80030508 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80070f1c +800e1b30 +8022619e +80030508 +80000000 +80040812 +80030508 +80030508 +80040812 +80070c14 +80030508 +80040812 +80030508 +80040812 +80030508 +800c101c +80072560 +80000000 +80000000 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +800d141e +80040812 +80040812 +80000000 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +800e1b30 +8022619e +800e1b30 +80001778 +80030508 +80030508 +800d141e +80030508 +80000000 +80070c14 +800c101c +80030508 +80070c14 +8013336a +80070c14 +80070c14 +80070c14 +80030508 +80040812 +80030508 +80000000 +80000000 +80000000 +80000000 +80040812 +80000000 +80000000 +80030508 +80070c14 +80000314 +80070c14 +80030508 +80040812 +80000314 +80040812 +80040812 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800e1b30 +80030508 +80030508 +8022619e +800e1b30 +80001778 +80476a78 +800c101c +80040812 +80070c14 +80040812 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80070c14 +80040812 +80040812 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000314 +80000314 +80030508 +80030508 +80070c14 +80070c14 +80040812 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +800e1b30 +80070f1c +80070c14 +80070c14 +800e1b30 +80001778 +80030508 +80182d4c +80040812 +8008101e +80040812 +80070c14 +80040812 +80072560 +8008101e +800a2458 +80040812 +80030508 +80040812 +80040812 +80030508 +80070c14 +80040812 +8008101e +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80050b16 +8008101e +80070f1c +800e1b30 +80040812 +800e1b30 +80001778 +80476a78 +80182d4c +800e1c3e +8008101e +800a2458 +80000314 +80072560 +8008101e +80040812 +80030508 +80030508 +80040812 +8008101e +80050c20 +80030508 +80050c20 +80040812 +80040812 +80070c14 +80040812 +80040812 +80040812 +80030508 +80030508 +80000000 +80040812 +80030508 +80072560 +80072560 +80070c14 +80072560 +800d141e +80000000 +80000000 +80070c14 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +8008101e +80070c14 +8008101e +800e1b30 +800a2458 +8013336a +80001778 +80476a78 +80040812 +800e1c3e +80476a78 +80000314 +80040812 +80000314 +80040812 +8008101e +80040812 +80040812 +80111c32 +800a2458 +80152542 +80030508 +80050c20 +80070c14 +80040812 +800c101c +800d141e +80030508 +800d141e +800d141e +80000000 +80000000 +8013336a +80070c14 +80030508 +80030508 +80050c20 +80070c14 +80030508 +80030508 +80030508 +80040812 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80182d4c +80050b16 +80030508 +80050c20 +80040812 +8022619e +80030508 +80000314 +80476a78 +80182d4c +80040812 +80476a78 +80050b16 +80070c14 +80000314 +80000314 +80070c14 +8008101e +8013336a +80030508 +80000000 +8008101e +80000000 +80000000 +80111c32 +80070c14 +80040812 +80070c14 +80030508 +8013336a +80050c20 +8008101e +80040812 +80030508 +80040812 +800a2458 +80040812 +80070c14 +800a1730 +80070c14 +800b1c3c +800b1f44 +800a1730 +800b1c3c +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80182d4c +80050b16 +80040812 +80040812 +80050c20 +8022619e +80000314 +80040812 +80476a78 +80182d4c +800e1c3e +80476a78 +80050b16 +800e1c3e +80030508 +80172334 +80040812 +8008101e +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80050c20 +80000314 +80000000 +80040812 +80000314 +800c101c +80030508 +80030508 +80070c14 +80040812 +80040812 +80040812 +80050c20 +80050c20 +800b1c3c +80050c20 +800b1c3c +8008101e +8013336a +800b1c3c +800a1730 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80050b16 +80040812 +80172334 +80172334 +80172334 +80072560 +80072560 +800e1b30 +80172334 +8008101e +80182d4c +800e1c3e +80070c14 +80050b16 +800e1c3e +80040812 +80040812 +80000314 +80000314 +80030508 +80000314 +80070c14 +80040812 +80040812 +80030508 +80030508 +80050c20 +80040812 +80000314 +80030508 +80000314 +80000314 +80070c14 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80040812 +80050c20 +80050c20 +80111c32 +8013336a +8013336a +80182b44 +800a2458 +80152542 +800a1730 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8008101e +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80000314 +80001778 +8008101e +8008101e +800e1c3e +80476a78 +80070c14 +800e1c3e +80050b16 +80040812 +80070c14 +80040812 +80070c14 +80050c20 +80040812 +80050c20 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +8008101e +8013336a +8013336a +800a2458 +800a2458 +800a2458 +800a2458 +80253444 +8013336a +80072560 +80253444 +800c0e12 +800c101c +80072560 +80030508 +80233654 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +800e1b30 +80050b16 +80000314 +80050c20 +80000314 +80000314 +80000314 +80040812 +80040812 +80001778 +80030508 +80030508 +800e1c3e +80476a78 +80050b16 +80050c20 +80050b16 +80476a78 +80050c20 +80070c14 +80040812 +80040812 +80000314 +80050c20 +80000314 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80070c14 +80253444 +80253444 +80072560 +80072560 +80072560 +80072560 +80111c32 +80172334 +80172334 +800d141e +80111c32 +80111c32 +8013336a +8013336a +800a1730 +80152542 +80111c32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +800e1b30 +800a142a +80070c14 +80040812 +80040812 +80050c20 +80050c20 +80040812 +80000314 +80040812 +80476a78 +80030508 +80030508 +80476a78 +80050b16 +80050c20 +80050b16 +80476a78 +800a142a +80040812 +80000000 +80070c14 +80000000 +80030508 +80040812 +80000000 +80000000 +80070c14 +80111c32 +8008101e +80070c14 +80070c14 +80040812 +80172334 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80070c14 +80040812 +80233654 +8008101e +80152542 +800a1730 +80182b44 +8008101e +802f445e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80131920 +80000000 +80000000 +80000000 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80070c14 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +80030718 +80070c14 +80000314 +80000314 +80000314 +80040812 +80000314 +800a2458 +800a2458 +80030508 +80040812 +80040812 +80182d4c +80000000 +80000000 +80050b16 +800e1c3e +80000000 +80476a78 +800a142a +80132030 +80070c14 +80040812 +80030508 +80070c14 +80050c20 +800a2458 +8008101e +80040812 +80070c14 +8008101e +80030508 +80050c20 +80070c14 +80233654 +80233654 +80233654 +80233654 +800a1730 +800a1730 +800a1730 +80040812 +802f445e +802f445e +80111c32 +802f445e +80152748 +80414444 +80152748 +800a1730 +800a1730 +8013336a +8092a4b4 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80000000 +80030508 +80000000 +80030508 +80030508 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +800c101c +80040812 +80030508 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80030508 +80000000 +80000000 +80000000 +80030508 +8013336a +80040812 +80000000 +80072560 +80030508 +80030508 +80030508 +80070c14 +80040812 +80040812 +80030508 +80030508 +80070c14 +80030508 +80070c14 +80000314 +80000314 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +80050c20 +8013336a +80030718 +800a2458 +80040812 +80050c20 +80030508 +80000000 +80000000 +80000000 +80040812 +80040812 +800d141e +80030508 +80182d4c +80070c14 +80040812 +80040812 +800e1c3e +80070c14 +80040812 +800a142a +80132030 +80476a78 +80030508 +80040812 +80030508 +80040812 +80030508 +80070c14 +8013336a +80070c14 +8013336a +80070c14 +80070c14 +8008101e +802f445e +802f445e +802f445e +80152748 +80152748 +80152748 +80152748 +80050c20 +80050c20 +80050c20 +8008101e +80050c20 +80050c20 +80070c14 +8093b1d2 +800b1f44 +80152748 +800a2458 +800b1f44 +803e4550 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80040812 +800c101c +800d141e +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +800c101c +800c101c +80000000 +80030508 +8008101e +8008101e +80040812 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000314 +80000314 +80030508 +80070c14 +80070c14 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80072560 +80072560 +80072560 +8013336a +8013336a +8013336a +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +800a2458 +800a2458 +800a2458 +800a2458 +80253444 +80253444 +80253444 +80030718 +80040812 +8008101e +8013336a +80040812 +80040812 +8008101e +8008101e +80070c14 +80000000 +80000000 +80000000 +80030508 +800e1c3e +80000000 +80040812 +800e1c3e +80050b16 +80000314 +800a142a +80132030 +80476a78 +80050b16 +80050c20 +80030508 +80050c20 +80050c20 +80040812 +80070c14 +8008101e +800d141e +80040812 +80040812 +80070c14 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800b1f44 +800b1f44 +800b1f44 +800b1f44 +800b1c3c +80111c32 +800b1c3c +800b1c3c +8013336a +8008101e +80111c32 +80072560 +800a2458 +80040812 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80030508 +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80040812 +80040812 +80040812 +80000000 +80030508 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +8008101e +80040812 +80040812 +80040812 +80050c20 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80050c20 +80040812 +80030508 +80070c14 +80040812 +80070c14 +80040812 +80030508 +80070c14 +80030508 +80030508 +80111c32 +80040812 +80040812 +80000000 +80000000 +8013336a +80040812 +80050c20 +80070c14 +80030508 +80030508 +8005102e +800a2458 +800a1730 +80050c20 +80050c20 +80050c20 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +8013336a +800a2458 +800a2458 +800a2458 +80253444 +80253444 +80253444 +80253444 +80072560 +80072560 +80072560 +80072560 +80172334 +80172334 +80172334 +80182d4c +80030718 +80000000 +80030508 +8008101e +80030508 +80030508 +80040812 +800a2458 +800a2458 +80040812 +8008101e +8008101e +80111c32 +80040812 +80040812 +80000314 +800a2458 +80050b16 +80476a78 +80000314 +80132030 +80476a78 +80050b16 +800e1c3e +80030508 +80040812 +80050c20 +80000314 +80040812 +80040812 +80030508 +80070c14 +80070c14 +8008101e +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8008101e +8008101e +8008101e +8008101e +8008101e +80000000 +80000000 +80000000 +80000000 +80000000 +80040812 +80040812 +80000000 +8013336a +800a2458 +80152542 +80111c32 +80006392 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +80030508 +800c101c +80000000 +80070c14 +80070c14 +800a2458 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +800c101c +80070c14 +80040812 +80030508 +80000000 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80070f1c +8000041c +8000010c +80000000 +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80030508 +80182b44 +8013336a +80000000 +80000000 +80040812 +80070c14 +80030508 +80050c20 +800a2458 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80646768 +800b1c3c +800a2458 +80426ea6 +80050c20 +80414444 +800a1730 +80050c20 +80152542 +800a1730 +800a2458 +800a2458 +80050c20 +800a1730 +8008101e +800a2458 +800a2458 +80253444 +80253444 +80253444 +80072560 +80072560 +80072560 +80172334 +80172334 +80172334 +80172334 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80111c32 +80233654 +80233654 +80000314 +8013336a +800a2458 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80050c20 +80050c20 +80040812 +80040812 +80000000 +80000000 +80050c20 +80040812 +80040812 +800a1730 +80476a78 +80040812 +80040812 +80476a78 +80050b16 +80000314 +800a142a +8008101e +80070c14 +80040812 +80040812 +80040812 +80313c48 +80030508 +800c0e12 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80152542 +80152542 +80152542 +80152542 +80001164 +80050c20 +80001164 +80001164 +80111c32 +80030508 +80030508 +80040812 +80050c20 +8005102e +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +800d141e +80040812 +80040812 +80040812 +80030508 +800a2458 +80072560 +80040812 +80030508 +80040812 +80030508 +80000000 +80030508 +80000314 +80030508 +8008101e +80040812 +80030508 +80040812 +8022619e +8022619e +80050b16 +80050b16 +80050b16 +80050b16 +80476a78 +80070f1c +8000010c +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80646768 +80030508 +80030508 +80030508 +80040812 +80000314 +80040812 +800d141e +80040812 +8008101e +80040812 +8013336a +80070c14 +80111c32 +8008101e +80040812 +80030508 +800c101c +8013336a +8008101e +8013336a +80070c14 +80233654 +80131920 +80072560 +80072560 +80111c32 +8013336a +80152542 +80111c32 +80111c32 +80233654 +80233654 +80233654 +80233654 +800a1730 +800a1730 +800a1730 +800a1730 +802f445e +802f445e +80132546 +80000314 +80040812 +80050c20 +80172334 +80050c20 +80050c20 +800a2458 +8008101e +8008101e +80000314 +8013336a +8013336a +800a2458 +80040812 +80030508 +80030508 +80050b16 +80070c14 +80070c14 +80476a78 +800a142a +80030508 +80476a78 +80050b16 +800e1c3e +800a142a +80070f1c +80070c14 +800d141e +80030508 +80040812 +8008101e +80070c14 +80040812 +80070c14 +80152542 +80001164 +80001164 +80001164 +80001164 +80001164 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80050c20 +8013336a +80050c20 +80050c20 +80111c32 +80040812 +800b1c3c +800b1c3c +80000000 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +80070c14 +80040812 +80040812 +800a2458 +80040812 +80040812 +800a2458 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80072560 +80050b16 +80070f1c +80070f1c +80070f1c +800e1b30 +800e1b30 +800e1b30 +80040b24 +8000010c +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80040812 +800c101c +80070c14 +800c101c +80070c14 +80040812 +8008101e +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +80040812 +8013336a +80212c3c +800d141e +80072560 +80172334 +800a1730 +800a1730 +8004266a +8013336a +802f445e +800a1730 +80050c20 +80132546 +80040812 +800a2458 +80050c20 +80050c20 +800a1730 +8008101e +8008101e +80040812 +8013336a +8013336a +800a2458 +8008101e +80070c14 +80070c14 +80313c48 +80030508 +80030508 +80313c48 +80070c14 +80070c14 +800a142a +80132030 +80050c20 +80050b16 +800e1c3e +800a142a +80070f1c +80050c20 +80050c20 +80050c20 +8013336a +8013336a +8013336a +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8013336a +800b1c3c +800b1c3c +8013336a +800a2458 +800a2458 +80040812 +80111c32 +80050c20 +80172334 +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80050c20 +80030508 +80000314 +80040812 +80030508 +80000000 +80040812 +80030508 +80000314 +80040812 +80070c14 +80000000 +80040812 +80000000 +80030508 +80030508 +80030508 +80040812 +80030508 +800e1b30 +800a142a +800a142a +80132030 +80132030 +80132030 +80070f1c +80070f1c +80050b16 +800e1626 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80040812 +800a1730 +8008101e +80040812 +800a2458 +8008101e +80030508 +80111c32 +800a142a +80132546 +80040812 +80072560 +80040812 +80040812 +80040812 +80313c48 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +800a1730 +8013336a +8013336a +80040812 +80050c20 +80050c20 +80132030 +80050c20 +80050c20 +800e1c3e +800a142a +80050c20 +80050b16 +801c2c50 +80050c20 +80111c32 +8008101e +8013336a +8013336a +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +80414444 +80414444 +80414444 +80414444 +80040812 +800a1730 +80000314 +80000314 +80050c20 +800a2458 +80030508 +800d141e +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +800a2458 +80070c14 +8008101e +80000000 +80040812 +80000000 +8013336a +80030508 +80030508 +80070c14 +8013336a +80030508 +80040812 +80040812 +80050c20 +80050c20 +80050c20 +80050c20 +80050c20 +800e1c3e +800e1c3e +800e1c3e +80476a78 +80476a78 +8006112c +8006112c +8006112c +80050b16 +80030718 +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +8008101e +80040812 +8008101e +80070c14 +80040812 +80040812 +80040812 +80040812 +8008101e +8008101e +800a2458 +8013336a +800d141e +800d141e +80072560 +80040812 +80040812 +80070c14 +80070c14 +80050b16 +8008101e +8008101e +80132030 +80476a78 +80070c14 +800e1c3e +800a142a +80070f1c +80050c20 +80050b16 +80040812 +800d141e +80040812 +80040812 +80070c14 +800a2458 +800a2458 +80414444 +80414444 +80414444 +80414444 +80414444 +80000314 +80000314 +80000314 +80000314 +800a2458 +800a2458 +800a2458 +800a2458 +80030508 +800a1730 +800a1730 +800c101c +800a1730 +800b1c3c +80030508 +800b1c3c +800a2458 +80070c14 +80070c14 +80152748 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80030508 +80070c14 +80040812 +80070c14 +80030508 +800b1c3c +80000314 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +800a2458 +8013336a +800d141e +8013336a +8008101e +80050c20 +80050b16 +80050b16 +800e1c3e +800e1c3e +800e1c3e +80132030 +80132030 +80132030 +80476a78 +800a142a +8000010c +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8022619e +800a2458 +8013336a +8013336a +800a2458 +8008101e +80040812 +8008101e +8008101e +8008101e +80070c14 +80070c14 +8013336a +8013336a +800a2458 +80040812 +80040812 +8013336a +8008101e +8008101e +8008101e +80070c14 +80070c14 +80040812 +80040812 +80476a78 +80000314 +80040812 +800a142a +80070f1c +80050b16 +80050b16 +8022619e +80040812 +80030508 +80040812 +80000000 +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +800a1730 +800a1730 +800a1730 +800a1730 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +8016284e +8016284e +8016284e +8016284e +80070c14 +800a2458 +800a2458 +80040812 +80040812 +800a2458 +8008101e +80050c20 +800b1c3c +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80040812 +80030508 +80030508 +80030508 +80000314 +80000000 +80000314 +80000314 +800d141e +80070c14 +80030508 +80111c32 +800a1730 +80111c32 +8013336a +80070c14 +80030508 +80253444 +80476a78 +800a142a +800a142a +800a142a +8022619e +8022619e +8022619e +80132030 +80132030 +800a142a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8022619e +800a142a +8008101e +800a2458 +8008101e +80070c14 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80070c14 +80000314 +80000314 +80030508 +80070c14 +80070c14 +80030508 +80000314 +80000314 +80040812 +80030508 +80030508 +80040812 +80040812 +80050b16 +80040812 +80040812 +80040812 +800c101c +80070c14 +800a2458 +8013336a +80000314 +80070c14 +800c0e12 +80152542 +800b1c3c +800b1c3c +8016284e +8016284e +8016284e +8016284e +8016284e +800a2458 +800a2458 +800a2458 +800a2458 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1f44 +8008101e +800b1f44 +800b1f44 +80253444 +80182b44 +80172334 +80233654 +8093b1d2 +80182b44 +800b1f44 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80000314 +80000314 +80000314 +80000314 +8005102e +80030508 +80000000 +80030508 +80030508 +80030508 +80070c14 +80000000 +80030508 +80030508 +80111c32 +802d487e +80072560 +800a2458 +80132030 +80132030 +800a142a +800a142a +800a142a +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800e1b30 +800e1b30 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e335e +8022619e +80070c14 +80040812 +80070c14 +80000314 +8008101e +80030508 +8008101e +8008101e +80030508 +80040812 +80050c20 +80050c20 +80040812 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800b1c3c +80152748 +80152748 +80152542 +80414444 +800e1c3e +80001f6e +80111c32 +80050b16 +80050b16 +800c101c +8003050a +80050b16 +80111c32 +80182b44 +80414444 +80070c14 +800c0e12 +80070c14 +800d141e +80172334 +802d487e +80384d76 +8016284e +80646768 +800b1c3c +80172334 +80182b44 +80182b44 +80182b44 +800b1c3c +800b1c3c +800b1c3c +800b1c3c +800b1c3c +80646768 +80646768 +800a2458 +80233654 +80646768 +80172334 +8008101e +80214062 +800a1730 +80182b44 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80040812 +80030508 +80040812 +80000000 +80111c32 +80070c14 +80070c14 +80040812 +80030508 +800c101c +800c101c +8008101e +80070c14 +80040812 +80070c14 +8008101e +80182b44 +80000314 +800a142a +800e1b30 +800e1b30 +800e1b30 +80070f1c +80070f1c +80070f1c +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +8013336a +80000000 +80030508 +80000314 +80030508 +80070c14 +80070c14 +80040812 +80030508 +80030508 +80030508 +80111c32 +80072560 +80072560 +80172334 +80172334 +80172334 +80030508 +800c0e12 +800c0e12 +8008101e +80040812 +80040812 +800b1c3c +80414444 +800a2458 +800a2458 +800e1c3e +8008101e +8008101e +80050b16 +80050b16 +800a2458 +8003050a +80050b16 +8003050a +80646768 +80111c32 +800a1730 +80050c20 +80212c3c +8013336a +80040812 +80070c14 +80050c20 +80040812 +8008101e +80050c20 +8008101e +800c101c +80040812 +800a2458 +8008101e +80050c20 +80000314 +80152748 +800b1c3c +800b1c3c +80182b44 +80182b44 +80000314 +80152542 +80152542 +80172334 +800b1f44 +80152542 +8013336a +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80000000 +80000314 +80040812 +80030508 +80070c14 +80050c20 +8008101e +80030508 +8008101e +80040812 +800c101c +80070c14 +8008101e +8008101e +800b1c3c +80111c32 +80426ea6 +802f445e +800a142a +800a142a +800a142a +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +80132546 +80132546 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +800c0e12 +80152748 +80030508 +80050c20 +80030508 +8013336a +8013336a +80040812 +80040812 +80030508 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +8013336a +8008101e +8008101e +80070c14 +80040812 +80040812 +80040812 +800a1730 +80050c20 +80050c20 +800a142a +800a2458 +800a2458 +80050b16 +8022619e +800a1730 +80050b16 +8003050a +8003050a +8013336a +800a2458 +80152542 +80172334 +80070c14 +80040812 +80040812 +8008101e +80212c3c +80000314 +80040812 +80000314 +80000314 +80070c14 +80030508 +80040812 +80000314 +80030508 +80050c20 +80040812 +80030508 +80040812 +80030508 +80040812 +80030508 +80070c14 +80070c14 +80040812 +80072560 +801a2028 +800c101c +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80030508 +80040812 +80040812 +80070c14 +80070c14 +80040812 +8008101e +80040812 +80000314 +800d141e +8008101e +8013336a +8008101e +80070c14 +8008101e +800d141e +80111c32 +8005102e +80646768 +8022619e +8022619e +8022619e +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +80040b24 +80040b24 +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80040b24 +80070c14 +800c0e12 +80070c14 +80072560 +80040812 +80070c14 +800c0e12 +800c101c +800c101c +800d141e +80040812 +80111c32 +80111c32 +80111c32 +8013336a +8013336a +80050c20 +8008101e +80111c32 +80070c14 +80040812 +80040812 +80050c20 +800c101c +80111c32 +80111c32 +80152542 +800a1730 +800a1730 +8005102e +80414444 +80414444 +8022619e +8003050a +800a2458 +8003050a +8003050a +8003050a +800a1730 +8013336a +8013336a +80070c14 +80030508 +800a1730 +80030508 +80040812 +80030508 +80000000 +80030508 +80030508 +800d141e +80040812 +80050c20 +80000000 +8008101e +800b1c3c +8008101e +80030508 +80000314 +80030508 +80030508 +800a2458 +80030508 +800a2458 +80050c20 +80040812 +800b1c3c +800a2458 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80040812 +800a2458 +80050c20 +80070c14 +80040812 +8008101e +80040812 +80172334 +80070c14 +80070c14 +80070c14 +800a1730 +80030508 +800d141e +80070c14 +800c0e12 +80030508 +800a1730 +80111c32 +80132546 +80132546 +80040b24 +80040b24 +80040b24 +80050b16 +80050b16 +80050b16 +80476a78 +80476a78 +80476a78 +80476a78 +800e1b30 +800e1b30 +80476a78 +80476a78 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a142a +8006112c +8008101e +80070c14 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80050c20 +80182b44 +80070c14 +80040812 +80050c20 +80070c14 +80070c14 +80070c14 +80050c20 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80070c14 +8008101e +8008101e +80172334 +80070c14 +8013336a +8013336a +800a2458 +800a2458 +80070f1c +800c101c +800d141e +8022619e +8003050a +800d141e +8003050a +8003050a +8003050a +8013336a +80414444 +80566d82 +80243f74 +80040812 +80040812 +80040812 +80040812 +80030508 +80050c20 +80030508 +8008101e +80030508 +80030508 +80040812 +80040812 +80030508 +80313336 +80050c20 +80040812 +80030508 +80030508 +80030508 +80152748 +80050c20 +800b1c3c +8005102e +8013336a +800a1730 +80243f74 +800a1730 +8093b1d2 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +800d141e +80040812 +8013336a +80040812 +80111c32 +80182b44 +80040812 +80000314 +80000000 +80476a78 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80476a78 +80476a78 +80476a78 +800f1b28 +800f1b28 +800f1b28 +80476a78 +80476a78 +80476a78 +800e1c3e +800e1c3e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a2458 +800c101c +800a2458 +80070c14 +80040812 +80040812 +8008101e +80212c3c +80040812 +80040812 +80040812 +8008101e +80040812 +80040812 +8008101e +80050c20 +80050c20 +800a2458 +800a1730 +800a1730 +80030508 +80040812 +80040812 +800d141e +80030508 +80070c14 +80070c14 +800d141e +803f2f1a +800d141e +80243f74 +80001b60 +80050b16 +80264e88 +80111c32 +8003050a +80050b16 +80111c32 +8003050a +80414444 +8003050a +8093b1d2 +80313336 +80030508 +80050c20 +80050c20 +80040812 +80000314 +80040812 +80050c20 +80040812 +80030508 +80040812 +80040812 +800a1730 +8013336a +8008101e +80050c20 +80050c20 +80050c20 +80050c20 +8004266a +80040812 +800b1c3c +80050c20 +80050c20 +801c2c50 +8008101e +80050c20 +80000314 +800a1730 +800a2458 +80414444 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80050c20 +8008101e +8008101e +80040812 +80050c20 +8008101e +80030508 +80040812 +80040812 +80050c20 +80040812 +80072560 +80040812 +8013336a +80040812 +80040812 +80040812 +800a2458 +80040812 +80476a78 +80476a78 +80476a78 +80476a78 +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800a142a +80070c14 +80172334 +80072560 +80050c20 +8013336a +80111c32 +80030508 +80111c32 +80030508 +80030508 +80212c3c +80040812 +80030508 +80000000 +80000000 +800c0e12 +80040812 +80040812 +800c101c +8013336a +8013336a +80111c32 +80264e88 +80264e88 +8008101e +8008101e +80040812 +80040812 +80040812 +80000314 +80000314 +80000314 +80050c20 +80050c20 +80000314 +8003050a +80050b16 +8003050a +80030508 +80000000 +80000000 +80000000 +80050c20 +80050c20 +80050c20 +80030508 +80040812 +80030508 +80070c14 +80040812 +8008101e +80030508 +80040812 +80030508 +80030508 +80070c14 +80000314 +80072560 +8030537e +80233654 +8005102e +8005102e +800a1730 +80050c20 +80040812 +80040812 +80070c14 +80070c14 +8008101e +80000314 +80414444 +80050c20 +80040812 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +8008101e +80070c14 +80070c14 +80040812 +80030508 +80040812 +80070c14 +8013336a +800d141e +80040812 +8008101e +80040812 +80000314 +800a1730 +80050c20 +80070c14 +800a1730 +800a1730 +8013336a +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80476a78 +80476a78 +80476a78 +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800e1b30 +800d141e +800c101c +80030508 +80000000 +80070c14 +80040812 +80040812 +800a1730 +800a1730 +80111c32 +80111c32 +8008101e +8008101e +80040812 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80030508 +8008101e +8008101e +80070c14 +80040812 +80030508 +80030508 +80050c20 +80040812 +80040812 +80040812 +800b1c3c +800b1c3c +80050b16 +80050b16 +80050b16 +80050c20 +80050b16 +80030508 +80000000 +80000000 +80000000 +8003050a +80000000 +800a2458 +80000314 +80313336 +80040812 +8008101e +80070c14 +8008101e +80040812 +80040812 +80040812 +80070c14 +80040812 +80040812 +80070c14 +80030508 +80040812 +80050c20 +800b1c3c +80172334 +80030508 +80212c3c +801f366e +80030508 +80040812 +80172334 +80000000 +80030508 +801f366e +80253444 +80040812 +80426ea6 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +8008101e +80070c14 +80040812 +8008101e +80030508 +80030508 +80030508 +80070c14 +80030508 +80040812 +800c101c +80000314 +80172334 +800a2458 +800c0e12 +8093b1d2 +80001778 +80001778 +80476a78 +80476a78 +80476a78 +80476a78 +800a142a +800a142a +800a142a +80132546 +80132546 +80132546 +80132546 +80001778 +80001778 +80001778 +80132546 +80132546 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +80264e88 +800a1730 +80040812 +80070c14 +80040812 +80050c20 +80030508 +80030508 +80000314 +80040812 +80040812 +80030508 +800a2458 +80030508 +80030508 +80050c20 +80040812 +80040812 +80030508 +80000314 +80000314 +80000314 +80030508 +80030508 +80050c20 +8008101e +80040812 +80040812 +80040812 +80030508 +8003050a +8003050a +8003050a +8003050a +80040812 +80050b16 +800a1730 +800b1c3c +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +800a2458 +80030508 +800a2458 +80030508 +80030508 +80172334 +80030508 +80000000 +80072560 +80030508 +80000000 +80072560 +80000000 +80000000 +80040812 +8008101e +800a2458 +80455c78 +80182b44 +80070c14 +802d487e +8013336a +80040812 +80070c14 +800d141e +8013336a +8008101e +80182b44 +80050c20 +8005102e +8005102e +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80152748 +80030508 +80072560 +80030508 +80111c32 +80040812 +8013336a +80030508 +8013336a +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80172334 +80050c20 +80313336 +80132546 +80001778 +80001778 +80001778 +80001778 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8022619e +8022619e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000314 +80050c20 +80030508 +80070c14 +80040812 +80040812 +80030508 +80030508 +80040812 +80040812 +80030508 +80070c14 +80030508 +80030508 +8008101e +80030508 +80030508 +80070c14 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80000000 +8008101e +80050b16 +80050c20 +80050b16 +80040812 +80070c14 +8022619e +8008101e +80214062 +80172334 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +800a2458 +800a2458 +80111c32 +800a2458 +80050c20 +80152748 +80030508 +80040812 +800c101c +80040812 +8008101e +8013336a +80040812 +80050c20 +80030508 +80111c32 +80152542 +80152748 +800b1c3c +800b1c3c +8008101e +8013336a +8008101e +8008101e +80000314 +80172334 +8005102e +80414444 +800a1730 +80646768 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111c32 +80414444 +8008101e +80070c14 +800c101c +80001f6e +80050c20 +80030508 +80000314 +80040812 +80040812 +80030508 +8008101e +80050c20 +80072560 +8013336a +80111314 +802d487e +800c1626 +80152748 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +80132546 +80132546 +802d67b4 +802d67b4 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070f1c +80313336 +80030508 +80030508 +80030508 +80070c14 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80000314 +80000314 +80040812 +800a2458 +800a2458 +80040812 +80040812 +80040812 +80030508 +80050c20 +80050c20 +800a2458 +800a2458 +80050b16 +80050b16 +80050b16 +8022619e +80030508 +8022619e +80030508 +80030508 +80030508 +800a1730 +800a1730 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80313336 +800b1c3c +800a2458 +80000314 +8005102e +80050c20 +8008101e +80000314 +80030508 +80030508 +80030508 +80000314 +80030508 +80040812 +80000314 +80050c20 +800a2458 +80111c32 +80414444 +800b1c3c +80414444 +800b1c3c +80040812 +8008101e +80050c20 +80111c32 +800a2458 +8005102e +800b1c3c +803e4550 +80152748 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80040812 +80040812 +80070c14 +80070c14 +80111c32 +8008101e +800a2458 +800c101c +80070c14 +80070c14 +80000314 +80040812 +80040812 +80070c14 +80030508 +80111c32 +8013336a +80384d76 +80152542 +8022619e +8022619e +8022619e +80132546 +80132546 +80132546 +80132546 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +800a142a +800a142a +80070f1c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80070f1c +80050c20 +8008101e +800a1730 +80040812 +80040812 +80040812 +80070c14 +800d141e +800d141e +80040812 +80040812 +80000000 +80070c14 +80072560 +80070c14 +80070c14 +8008101e +80111520 +800d141e +80030508 +80030508 +80030508 +80000000 +800e1b30 +800e1b30 +80070c14 +800e1b30 +80172334 +80172334 +80050b16 +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +80050c20 +800b1c3c +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80001164 +800a1730 +803b6492 +8008101e +80040812 +80050c20 +80040812 +80050c20 +80030508 +80040812 +80040812 +800a1730 +80000314 +80070c14 +80040812 +8008101e +80040812 +80050c20 +800a2458 +80050c20 +803b6492 +80313336 +8008101e +80050c20 +8008101e +80111c32 +8013336a +8005102e +803e4550 +8023527e +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80050c20 +80070c14 +80070c14 +8008101e +80111c32 +80000314 +80000314 +800d141e +80040812 +80030508 +80030508 +80000000 +80030508 +80040812 +80030508 +80040812 +80070c14 +801a2028 +800c101c +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +80070f1c +80070f1c +80070f1c +80070f1c +800a142a +800a142a +800a142a +800a142a +80476a78 +80476a78 +800e1b30 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80233654 +80030508 +800d141e +80030508 +80000000 +80072560 +80000000 +80072560 +80072560 +8008101e +8013336a +8013336a +80070c14 +80070c14 +80070c14 +8008101e +800c101c +800c101c +80030508 +8008101e +8008101e +800e1c3e +800e1c3e +80070f1c +80040812 +80070f1c +8008101e +8008101e +80050c20 +800a2458 +800a2458 +8005102e +8005102e +80050c20 +8005102e +8008101e +8008101e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000314 +80000314 +80050c20 +8005102e +80040812 +80050c20 +80070c14 +80050c20 +8008101e +80050c20 +80040812 +80040812 +80050c20 +8008101e +80070c14 +80000314 +800c0e12 +80030508 +8008101e +801a2028 +80030508 +80313336 +80030508 +80030508 +800a2458 +80040812 +800c0e12 +8008101e +800a2458 +80253444 +801c2c50 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80131920 +800d141e +80040812 +80040812 +80111c32 +80040812 +800a1730 +800a2458 +8013336a +8005102e +800b1f44 +8008101e +80111c32 +800a1730 +800a2458 +80050c20 +800a1730 +80111c32 +800a2458 +80070f1c +80070f1c +800a142a +800a142a +800a142a +800a142a +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +800b1c3c +800b1c3c +80050c20 +80152748 +80030508 +80030508 +80040812 +80070c14 +8008101e +8008101e +80030508 +80040812 +80070c14 +80070c14 +80040812 +80040812 +80040812 +80070c14 +80030508 +80132030 +800e1c3e +800e1c3e +80000314 +80050b16 +80070c14 +80050c20 +8006112c +80040812 +80050c20 +80050c20 +80050c20 +8008101e +8008101e +80040812 +80050c20 +80050c20 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +800a2458 +80000000 +800a1730 +80000314 +80030508 +80050c20 +80040812 +80030508 +8013336a +80111c32 +80030508 +80072560 +800d141e +80172334 +80414444 +80172334 +80212c3c +80172334 +80172334 +80253444 +80253444 +80212c3c +8013336a +80172334 +8008101e +80206398 +80050c20 +80070c14 +80050c20 +800a1730 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800b1c3c +80070c14 +80070c14 +80040812 +80000314 +80000314 +80040812 +80070c14 +800a2458 +80030508 +80000314 +80040812 +80030508 +80040812 +80050c20 +8013336a +8013336a +80243f74 +800b1f44 +800e1c3e +80070f1c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +8022619e +8022619e +8022619e +8022619e +800e1626 +800e1626 +800e1626 +80182d4c +80182d4c +80182d4c +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80414444 +80000314 +8005102e +80040812 +80000314 +80030508 +80030508 +80000314 +80000314 +80000314 +80040812 +80040812 +80030508 +80000314 +80030508 +80040812 +80040812 +80040812 +8022619e +8022619e +80030508 +800a142a +80040812 +80040812 +80000314 +800a1730 +80000314 +80000314 +80000314 +80070c14 +80070c14 +80040812 +800a2458 +80000314 +8005102e +80040812 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +80152748 +80233654 +80111c32 +80212c3c +80072560 +80152748 +80070c14 +80070c14 +8008101e +800a2458 +80040812 +80040812 +80070c14 +8008101e +8008101e +80040812 +80152542 +8008101e +80152542 +8008101e +80111c32 +80040812 +8008101e +80070c14 +8008101e +8013336a +8013336a +800a2458 +8013336a +80050c20 +800a2458 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80070c14 +8008101e +80030508 +80030508 +80040812 +80030508 +80050c20 +80070c14 +8005102e +8005102e +80040812 +80000314 +8008101e +800a1730 +800a1730 +80050c20 +800a2458 +800a1730 +80000000 +800e1b30 +80050b16 +8022619e +8022619e +800e1626 +800e1626 +800e1626 +800e1626 +80182d4c +80182d4c +80182d4c +80182d4c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005123e +800e1c3e +800a2458 +80050c20 +80050c20 +80040812 +80070c14 +80040812 +80040812 +80000314 +80030508 +80000314 +80070c14 +80000314 +80000314 +80000314 +80070f1c +800e1b30 +800e1b30 +80040812 +800a142a +80050c20 +80030508 +800a142a +80050c20 +800a2458 +80030508 +80030508 +80030508 +80212c3c +80040812 +800d141e +80040812 +80040812 +80040812 +80050c20 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +80050c20 +80070c14 +80050c20 +8030537e +800a1730 +80152542 +800a2458 +800a2458 +80111c32 +800a2458 +800a2458 +800a2458 +8008101e +80040812 +8008101e +80040812 +802d487e +80172334 +80111c32 +800a2458 +800a1730 +80172334 +8013336a +800a2458 +80111c32 +80070c14 +8013336a +8008101e +800a1730 +800b1c3c +800a2458 +80072560 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80264e88 +80070c14 +8008101e +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80050c20 +8005102e +80050c20 +8008101e +8008101e +80172334 +80040812 +801f366e +80030508 +8092a4b4 +80476a78 +80182d4c +800e1626 +80070f1c +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800a142a +800a142a +800a142a +800a142a +800a142a +80030718 +80030718 +80030718 +80030718 +8000041c +8000041c +8000041c +800e1b30 +800e1b30 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +800a2458 +80050c20 +8005102e +8008101e +800a2458 +80030508 +80030508 +80050c20 +80030508 +80030508 +80030508 +80070c14 +80050b16 +80040812 +800e1b30 +800e1b30 +80030508 +800a142a +80030508 +802b2e32 +802b2e32 +80111c32 +801c2c50 +801c2c50 +800d141e +80111c32 +80456a86 +80456a86 +80253444 +80253444 +80253444 +80253444 +8013336a +8013336a +8008101e +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +8008101e +80050c20 +80233654 +802d487e +8050718a +80152748 +80111c32 +800b1c3c +8013336a +800a2458 +80040812 +80111c32 +80070c14 +8008101e +802d487e +8013336a +80182b44 +8013336a +8013336a +8008101e +800d141e +800a1730 +80172334 +800a1730 +800a1730 +800d141e +800a2458 +80172334 +8013336a +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800b1c3c +80030508 +80111c32 +80000000 +800d141e +8008101e +8013336a +80030508 +8008101e +800a2458 +80233654 +80040812 +80072560 +80030508 +800d141e +8008101e +80182b44 +80050c20 +80152542 +8006112c +80476a78 +80030718 +80030718 +80030718 +80030718 +80030718 +8000041c +8000041c +8000041c +8000041c +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80030718 +80030718 +80030718 +80030718 +80030718 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +80030718 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80000000 +80000314 +80030508 +80152542 +80072560 +800d141e +802b2e32 +80072560 +800d141e +80172334 +80040b24 +80040b24 +8008101e +80132546 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80070c14 +800a2458 +800a2458 +800a2458 +800a2458 +8013336a +800a2458 +800a2458 +8008101e +80414444 +80414444 +800a2458 +8013336a +8013336a +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80152542 +800b1c3c +80111c32 +80182b44 +800a2458 +8013336a +80646768 +80172334 +800a1730 +800a2458 +8013336a +80182b44 +8093b1d2 +80152542 +80111c32 +80172334 +8013336a +8008101e +8013336a +80070c14 +80070c14 +80414444 +8013336a +80070c14 +80040812 +80040812 +80040812 +80000000 +80040812 +802d487e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800a2458 +80000314 +800a2458 +8008101e +80040812 +80040812 +80040812 +80070c14 +80040812 +800a1730 +80040812 +80152748 +800a1730 +80050c20 +8008101e +800b1c3c +800a1730 +80414444 +800a1730 +800a142a +80040b24 +800e1c3e +8000010c +80040b24 +80030718 +80476a78 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +80030718 +80030718 +80030718 +8000010c +8000010c +8000010c +8000010c +8000010c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800a142a +800a142a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +80040812 +8008101e +8008101e +80070c14 +800a2458 +800a2458 +80040812 +80030508 +80476a78 +8013336a +800e1b30 +800e1b30 +80111c32 +80476a78 +80050c20 +8008101e +800a2458 +800a2458 +800a2458 +800a2458 +800a2458 +80050c20 +80070c14 +800a2458 +8013336a +8008101e +8013336a +8013336a +800a2458 +80111c32 +8008101e +80182b44 +800b1c3c +800b1c3c +80152748 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152542 +80214062 +80172334 +80030508 +80070c14 +800c101c +80040812 +8008101e +800d141e +801a2028 +80030508 +800d141e +800d141e +80070c14 +80040812 +800c101c +80111520 +80172334 +80030508 +80253444 +80264e88 +80040812 +80070c14 +80414444 +8008101e +80070c14 +80111c32 +80414444 +80040812 +80414444 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +8008101e +8008101e +80000000 +8013336a +80000314 +800a1730 +80040812 +80040812 +80040812 +80040812 +80646768 +800a2458 +8008101e +8008101e +800a1730 +800b1c3c +8016284e +80414444 +80050b16 +8003050a +80030718 +8000010c +80476a78 +80000000 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030718 +8006112c +80050c20 +8024477a +80152542 +800a2458 +800a1730 +80182d4c +80182d4c +800a142a +800a142a +80111c32 +80070c14 +80111c32 +80111c32 +80111c32 +8013336a +8013336a +800a2458 +800a1730 +80040812 +8013336a +8013336a +8013336a +800a2458 +8008101e +80414444 +800b1c3c +800a2458 +800b1c3c +800b1c3c +800a1730 +80646768 +80646768 +80111c32 +80111c32 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80628196 +80111c32 +800a2458 +800b1c3c +80050c20 +8008101e +80111c32 +80152542 +80070c14 +800a1730 +803f2f1a +8008101e +80111c32 +80111c32 +8013336a +800a2458 +800a1730 +80050c20 +80111c32 +8013336a +80070c14 +800a2458 +80040812 +80050c20 +800d141e +80040812 +80111c32 +80050c20 +80000314 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80040812 +80030508 +80040812 +80030508 +800a2458 +80030508 +80070c14 +80030508 +8008101e +80313c48 +8013336a +80172334 +80313336 +80030508 +80040812 +800c0e12 +8008101e +801a2028 +800b1c3c +80070f1c +80030718 +8003050a +8000010c +80070f1c +80132030 +80050b16 +800a142a +800a142a +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80132546 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +80001778 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80111c32 +80152748 +800a142a +800a142a +80476a78 +80476a78 +80001778 +80001778 +800e1c3e +80070c14 +8013336a +800a2458 +80426ea6 +80040812 +80182b44 +8013336a +8013336a +8013336a +80182b44 +800a1730 +8013336a +80111c32 +80111c32 +80050c20 +8013336a +8008101e +802d487e +800d141e +800d141e +800d141e +8008101e +800c0e12 +800c0e12 +80050b16 +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80426ea6 +80395486 +800a1730 +80182b44 +800a2458 +8013336a +80050c20 +8008101e +80152748 +80172334 +80040812 +8093b1d2 +80050c20 +80414444 +80152748 +80414444 +800a1730 +80070c14 +80414444 +80070c14 +8004266a +8023527e +80000314 +80070c14 +8008101e +800a2458 +80131920 +800a1730 +8008101e +80000314 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802f445e +801f345c +80072560 +8013336a +80253444 +801c2c50 +80040812 +80040812 +8008101e +80040812 +8008101e +800a2458 +80152748 +800b1f44 +8013336a +80070c14 +80050c20 +80070c14 +8013336a +800a2458 +80070f1c +801e282c +80050b16 +8000010c +80050b16 +800e1b30 +8000010c +80050b16 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800a142a +800a142a +800a142a +800a142a +800a142a +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +8022619e +8022619e +00000000 +00000000 +80000000 +80426ea6 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80132546 +80132546 +80001778 +80001778 +800a1730 +800a1730 +800c101c +80070c14 +800d141e +801a2028 +80040812 +800d141e +80040812 +80111520 +80111520 +800d141e +80030508 +80070c14 +801a2028 +800a1730 +80050c20 +80050c20 +8008101e +80152748 +80152748 +80152542 +8013336a +800b1c3c +80111c32 +80000000 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8004266a +800b1c3c +80264e88 +80030508 +80050c20 +800a1730 +800a1730 +8008101e +800b1c3c +80111c32 +80050c20 +800a1730 +800a2458 +800a2458 +800a1730 +8005102e +800b1c3c +80111c32 +80040812 +80072560 +80152542 +800b1c3c +8008101e +80040812 +800d141e +80131920 +8008101e +8008101e +80050c20 +80050c20 +8008101e +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80050c20 +800a1730 +8013336a +80111c32 +80111c32 +800a2458 +80040812 +80070c14 +80040812 +80426ea6 +80111c32 +80072560 +80111c32 +800a2458 +800a2458 +800a2458 +800a1730 +800a2458 +80072560 +8000010c +80070f1c +8000010c +8006112c +80030718 +800f1b28 +80050b16 +80030718 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80001778 +80001778 +8022619e +8022619e +8022619e +8022619e +8022619e +8022619e +80050b16 +80050b16 +80050b16 +80050b16 +804d6f9e +804d6f9e +804d6f9e +801e335e +802d67b4 +802d67b4 +80132546 +80132546 +8022619e +8022619e +8022619e +8022619e +800e1b30 +800e1b30 +800a2458 +80182b44 +80111c32 +80111c32 +8093b1d2 +80111c32 +800a1730 +800a2458 +80414444 +8008101e +800a1730 +8093b1d2 +8093b1d2 +800a1730 +80313336 +8093b1d2 +80050c20 +80040812 +800a1730 +800a1730 +8005102e +80172334 +80172334 +800d141e +80111c32 +80000000 +80000000 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80006392 +800b1c3c +80050c20 +80006392 +80050c20 +800b1c3c +800a1730 +800a2458 +80152542 +800b1c3c +800b1c3c +800a1730 +800a1730 +800b1c3c +800a1730 +800b1c3c +800a1730 +800a1730 +80040812 +800b1c3c +8008101e +80111c32 +80040812 +80040812 +8013336a +80050c20 +80070c14 +80040812 +800a2458 +800a2458 +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1c3c +80182b44 +80182b44 +80172334 +800a1730 +800b1c3c +8008101e +8008101e +8013336a +8008101e +80172334 +80172334 +8013336a +800d141e +80072560 +8013336a +800d141e +8008101e +800b1f44 +800b1c3c +800e1626 +8022619e +8022619e +8022619e +800e1b30 +8022619e +80476a78 +80050b16 +8000010c +80050b16 +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +800e1b30 +800a142a +800a142a +80070f1c +80070f1c +800a142a +800a142a +800a142a +800e1b30 +800e1b30 +802d67b4 +802d67b4 +80132546 +800b1c3c +80111c32 +80152542 +80414444 +80414444 +800a1730 +80152748 +80172334 +80111c32 +80111c32 +80414444 +80111c32 +80050c20 +80050c20 +8005102e +800a1730 +800a1730 +8008101e +80050c20 +800a1730 +800a2458 +800a1730 +80111c32 +80111c32 +800a1730 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +800a2458 +8008101e +8008101e +8093b1d2 +8008101e +8008101e +80111c32 +8013336a +800a2458 +800a2458 +80070c14 +80050c20 +800b1c3c +80070c14 +80040812 +80030508 +80070c14 +80040812 +80030508 +8008101e +8008101e +800c0e12 +8008101e +80111c32 +80000000 +80030508 +80070c14 +800a1730 +800a2458 +80426ea6 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111c32 +80172334 +800a2458 +800c101c +800c0e12 +8008101e +80040812 +800c101c +800d141e +801a2028 +801a2028 +800c0e12 +80070c14 +80212c3c +80030508 +800c101c +80030508 +80030508 +80030508 +80030508 +800e1c3e +800a142a +800e1b30 +800a142a +800e1c3e +801e335e +800e1626 +80476a78 +80050b16 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8022619e +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80476a78 +800a142a +800a142a +80070f1c +80070f1c +800a142a +800a142a +800a1730 +800a1730 +800a1730 +8005102e +80050c20 +80050c20 +80050c20 +80050c20 +800a1730 +800a1730 +80050c20 +80050c20 +800a2458 +800a2458 +800b1c3c +800b1c3c +800a2458 +800a2458 +800a1730 +800b1c3c +800a1730 +800a1730 +80050c20 +8008101e +80000000 +80000000 +80000000 +80050b16 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +800a1730 +80111c32 +80030508 +8013336a +80030508 +80131920 +80111c32 +80030508 +80414444 +80426ea6 +800b1f44 +800a1730 +800b1f44 +800a1730 +80152748 +80414444 +800a1730 +80233654 +80426ea6 +80233654 +80152542 +80264e88 +80182b44 +80000314 +80050c20 +800b1c3c +80646768 +80050c20 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80070c14 +801c2c50 +800a1730 +8008101e +80111c32 +80070c14 +800a1730 +80070c14 +80111c32 +8013336a +800a2458 +80050c20 +8013336a +80070c14 +800c101c +80050c20 +80050c20 +80050c20 +80040812 +8006112c +80040b24 +80070f1c +80182d4c +800e1626 +80040b24 +80001778 +800a142a +80070f1c +80070f1c +80070f1c +80050b16 +80132546 +80132546 +80132546 +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +80182d4c +800e1626 +800e1626 +8022619e +8022619e +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800a1730 +800b1c3c +800a1730 +8013336a +8008101e +80000314 +80000314 +800b1c3c +80050c20 +8005102e +8005102e +8005102e +800a2458 +800a2458 +80050c20 +80040812 +80050c20 +80050c20 +80070c14 +800a2458 +800a2458 +80000314 +80040812 +80050c20 +80000000 +80000000 +80000000 +80000000 +8003050a +80050b16 +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80313336 +8005102e +80050c20 +80040812 +80111c32 +80050c20 +800a2458 +80050c20 +80050c20 +80061744 +80313336 +80050c20 +80030508 +80000314 +8013336a +800b1f44 +80050c20 +80000314 +800a1730 +8005102e +80414444 +80050c20 +800a2458 +80050c20 +80000314 +80050c20 +80000314 +80000314 +8004266a +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80245b7e +800b1c3c +8008101e +800a2458 +800a1730 +800a1730 +800a2458 +800a2458 +80111c32 +800a1730 +800b1c3c +801c2c50 +8013336a +80152542 +80000314 +80040812 +800a2458 +800a2458 +80000314 +80000314 +8006112c +80040b24 +80476a78 +80476a78 +800e1b30 +800e1626 +80050b16 +802e3e46 +8000010c +800e1b30 +8000010c +80050b16 +80000000 +800e1b30 +80476a78 +80476a78 +80476a78 +80030718 +80030718 +800e1b30 +800e1b30 +8000041c +80030718 +80030718 +800a142a +800a142a +80050b16 +80050b16 +80050b16 +800e1b30 +800e1b30 +80182d4c +80182d4c +800e1626 +8022619e +80070c14 +800a2458 +80030508 +800a1730 +80030508 +800c0e12 +80030508 +80040812 +80030508 +8008101e +80050c20 +80040812 +80000000 +80000000 +80030508 +80000000 +800b1f44 +80000000 +80426ea6 +80426ea6 +80426ea6 +80006392 +80414444 +80414444 +8093b1d2 +80000000 +80000000 +8000010c +8000010c +80000000 +80050b16 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f3b62 +80031b58 +80061744 +80152542 +80646768 +80050c20 +80313336 +8005102e +80050c20 +800b1c3c +80050c20 +8005102e +80030508 +80000000 +80050c20 +80111c32 +80050c20 +80050c20 +800a1730 +80152542 +80111c32 +80050c20 +800b1c3c +80646768 +80040812 +800a2458 +800a1730 +80070c14 +800a1730 +80050c20 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80006392 +800b1c3c +80006392 +8093b1d2 +800a1730 +80111c32 +800b1c3c +800a2458 +80050c20 +80050c20 +8013336a +800a1730 +80414444 +800a1730 +8008101e +800a1730 +80131920 +80072560 +80050c20 +8008101e +8003050a +80050b16 +800e1b30 +80070f1c +8003050a +80183b84 +80132030 +800f1b28 +800e1626 +80132546 +80050b16 +8003050a +00000000 +80183b84 +80182d4c +80182d4c +80182d4c +80182d4c +8000010c +80030718 +80030718 +80476a78 +80476a78 +80030718 +800e1b30 +800e1b30 +8000041c +8000041c +80030718 +800a142a +800a142a +80050b16 +80050b16 +80050b16 +80426ea6 +800a1730 +8005102e +800a1730 +8016284e +80414444 +800a1730 +8005102e +8013336a +80050c20 +800a2458 +8005102e +8005102e +800a2458 +800a2458 +80070c14 +8005102e +800a2458 +8005102e +80001164 +80313336 +8005102e +80313336 +80212426 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +80384d76 +800b1c3c +80006392 +80484646 +800b1c3c +80152748 +8005102e +80050c20 +80050c20 +8005102e +80313336 +800a1730 +8005102e +80000314 +8008101e +800b1c3c +8005102e +800b1c3c +80414444 +80646768 +800a1730 +80050c20 +80313336 +800a1730 +80000314 +80050c20 +80040812 +80030508 +80030508 +80040812 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +800a2458 +8005102e +8008101e +8008101e +800d141e +80040812 +80050c20 +80000000 +80070c14 +800c0e12 +80070c14 +80030508 +8008101e +80030508 +80070c14 +80030508 +80070c14 +80030508 +8008101e +8006112c +80070f1c +800e1b30 +80132546 +80476a78 +800e1c3e +80182d4c +801e3b60 +80132546 +8000010c +800e1c3e +800e1c3e +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +8000010c +80030718 +80030718 +80476a78 +80476a78 +80030718 +8006112c +8006112c +8028497c +8028497c +80050c20 +800b1c3c +8013336a +800b1f44 +80395486 +803e4550 +80414444 +80050c20 +8030537e +80245b7e +80030508 +80050c20 +80070c14 +80000000 +8005102e +800a1730 +800a1730 +80030508 +80040812 +80000000 +8093b1d2 +800a1730 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +800b1c3c +803e4550 +80646768 +80030508 +80040812 +80040812 +80030508 +80040812 +800a1730 +80030508 +800b1c3c +800a2458 +80040812 +800a2458 +80040812 +80030508 +8013336a +8093b1d2 +80030508 +800a1730 +800a1730 +80040812 +800a1730 +800b1f44 +8008101e +80040812 +80111c32 +80070c14 +80050c20 +800a2458 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80304f74 +80244882 +800a1730 +801c2c50 +800a1730 +80172334 +80001164 +803b6492 +80646768 +80264e88 +800a1730 +80414444 +80414444 +80426ea6 +803f2f1a +80264e88 +80414444 +80111c32 +80646768 +800a1730 +800e1626 +80132030 +8006112c +80040b24 +80030718 +800e1b30 +80050b16 +8022619e +8022619e +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +800e1c3e +800e1b30 +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800a142a +800a142a +80182d4c +80182d4c +80182d4c +80182d4c +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +800e1c3e +803e4550 +800b1f44 +8008101e +80152542 +80050c20 +80414444 +800a2458 +80050c20 +8008101e +80040812 +80000314 +800a2458 +80050c20 +80050c20 +8005102e +80050c20 +80050c20 +800a1730 +80050c20 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80050b16 +80050b16 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80414444 +80384d76 +80030508 +80414444 +80050c20 +80414444 +80070c14 +803b6492 +80214062 +80152542 +803a5d88 +80040812 +80233654 +800b1c3c +800a1730 +800a1730 +80426ea6 +80426ea6 +800a1730 +800a1730 +8005102e +800a2458 +80030508 +80212426 +80006392 +80111c32 +8008101e +80050c20 +80313336 +80050c20 +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f3b62 +8005194c +80152542 +800b1c3c +80313336 +800a1730 +80313336 +8005102e +80313336 +80050c20 +80111c32 +8013336a +80070c14 +800a2458 +80111c32 +80050c20 +80050c20 +800a2458 +80000314 +80050c20 +80050b16 +80030718 +8006112c +8006112c +8006112c +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +8022619e +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +800e1c3e +800e1b30 +800e1b30 +80132546 +80132546 +800e1c3e +800a142a +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1b30 +800e1b30 +800e1b30 +800e1b30 +8006112c +8006112c +8006112c +8006112c +80030508 +80030508 +80070c14 +80030508 +8008101e +80030508 +800a2458 +80050c20 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80050b16 +8003050a +8003050a +80050b16 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +800b1c3c +8005102e +80050c20 +8005102e +80050c20 +80000314 +80070c14 +80000314 +800b1c3c +800a2458 +80152748 +800a1730 +80212426 +80061744 +800b1c3c +800b1c3c +80384d76 +80646768 +80414444 +80313336 +800a1730 +800b1c3c +800b1c3c +80050c20 +80050c20 +80040812 +80182b44 +80313336 +800a2458 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +8004266a +80111c32 +8005102e +800b1c3c +8005194c +8005102e +8005102e +80050c20 +8008101e +8016284e +800b1c3c +800a2458 +80050c20 +80000314 +80001164 +800a1730 +8005102e +800e1b30 +80476a78 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +80132546 +8006112c +8006112c +8006112c +800e1b30 +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +80001778 +80001778 +800e1c3e +800e1c3e +80001778 +800a142a +800a142a +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8000041c +8000041c +8000041c +80040b24 +80040b24 +80040b24 +80040b24 +80070f1c +80111c32 +80646768 +800a1730 +801f3b62 +800a1730 +80061744 +80050c20 +80152748 +80182b44 +80182b44 +80313336 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +8003050a +8003050a +8000010c +80000000 +80000000 +80000000 +80000000 +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80384d76 +800b1f44 +801f345c +800c1626 +8008101e +800b1c3c +80050c20 +800b1c3c +80414444 +800b1c3c +800a1730 +800b1c3c +80313336 +800b1f44 +80646768 +8004266a +80152748 +80414444 +80646768 +80152748 +800b1f44 +80384d76 +8005102e +80334b60 +8006528a +80006392 +8004266a +80061744 +8005102e +8013336a +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +8013336a +80030508 +80040812 +80030508 +80070c14 +80040812 +800a1730 +80030508 +80030508 +80030508 +80414444 +80030508 +8008101e +80000000 +80070f1c +80070f1c +801e335e +804d6f9e +80183b84 +80183b84 +80001778 +800e1b30 +800e1b30 +80476a78 +800e1b30 +800e1b30 +800a142a +800a142a +800a142a +80132546 +8006112c +8006112c +8006112c +800e1b30 +800e1b30 +80040b24 +801e335e +801e335e +804d6f9e +80050b16 +80050b16 +8022619e +80001778 +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8000041c +8000041c +800b1f44 +80000314 +80646768 +8005102e +800a2458 +80313336 +80050c20 +8005102e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +8000010c +8003050a +8003050a +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +800b1c3c +800b1f44 +80152542 +800a1730 +800b1f44 +8093b1d2 +800a2458 +800b1c3c +800a2458 +80152748 +800a1730 +80050c20 +80050c20 +800a1730 +80414444 +800b1f44 +801f345c +80646768 +800a1730 +800b1c3c +802d487e +80163f82 +800b1c3c +80414444 +8005102e +8013336a +800a1730 +80000314 +80000314 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +8005102e +800a2458 +800b1c3c +80070c14 +80040812 +800a2458 +80050c20 +80414444 +80050c20 +800b1c3c +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +800e1b30 +800e1b30 +80070f1c +801e335e +801e335e +804d6f9e +80183b84 +80001778 +80001778 +800e1b30 +80476a78 +80476a78 +800e1b30 +800a142a +800a142a +800a142a +80132546 +80132546 +8006112c +8006112c +8006112c +800e1b30 +80040b24 +80040b24 +801e335e +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000010c +8000010c +8000010c +8000010c +80030718 +80030718 +80030718 +80030718 +8000010c +8000010c +8000010c +8005102e +80000314 +800b1c3c +80244882 +80313336 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80050b16 +8003050a +80000000 +8003050a +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1f44 +800a2458 +80414444 +80050c20 +80050c20 +800b1c3c +80050c20 +800a2458 +8013336a +800b1c3c +80152542 +800a2458 +800a2458 +80030508 +80030508 +80111c32 +80172334 +80040812 +8013336a +80050c20 +80030508 +800b1c3c +800a1730 +80000000 +801c2c50 +800a2458 +8013336a +80111c32 +80070c14 +80000314 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80212426 +8005102e +8008101e +80050c20 +800b1c3c +80313336 +800a1730 +80040b24 +8000041c +8005123e +8005123e +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8028497c +8006112c +800e1b30 +80070f1c +80070f1c +801e335e +804d6f9e +804d6f9e +80183b84 +80001778 +80001778 +800e1b30 +80476a78 +80476a78 +800e1b30 +800a142a +800a142a +800a142a +80132546 +80132546 +8006112c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +8000010c +80050b16 +80050b16 +80050b16 +80050b16 +80000000 +80000000 +800a2458 +800a1730 +800a2458 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80050b16 +8003050a +8000010c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80172334 +800b1c3c +80001164 +80122354 +800a1730 +800a1730 +80384d76 +80646768 +80001164 +801f345c +80152542 +801f345c +80243f74 +80233654 +801f345c +800a1730 +80646768 +80414444 +80334b60 +8016284e +8005102e +801f345c +80111c32 +80050c20 +800b1c3c +80050c20 +801f345c +80111c32 +80050c20 +80111c32 +80646768 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a1730 +80061744 +80030718 +80030718 +8000010c +8000041c +8006112c +8006112c +8006112c +80070f1c +80040b24 +8000041c +8000041c +8005123e +8006112c +800e1b30 +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +8006112c +800e1b30 +80070f1c +801e335e +801e335e +804d6f9e +80183b84 +80183b84 +80001778 +800e1b30 +800e1b30 +80476a78 +800e1b30 +80253444 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +8006112c +8006112c +8006112c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80050b16 +80050b16 +8003050a +80050b16 +8000010c +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800b1c3c +800b1c3c +800b1c3c +80152542 +8005102e +800a1730 +8005102e +800a2458 +800a1730 +800a1730 +80313336 +800a1730 +8016284e +80426ea6 +80050c20 +80050c20 +800b1f44 +80313336 +80214062 +802f445e +8005102e +8005102e +800a2458 +80000314 +80050c20 +80426ea6 +800a2458 +800b1f44 +80214062 +802f445e +800b1f44 +80313336 +80050c20 +80050c20 +80000314 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +8006112c +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000041c +8000041c +8006112c +8006112c +80070f1c +80040b24 +80040b24 +8000041c +8005123e +8006112c +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8028497c +8006112c +800e1b30 +80070f1c +80070f1c +801e335e +804d6f9e +804d6f9e +80244882 +8016284e +8023538a +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +8003050a +8003050a +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800b1c3c +80414444 +80414444 +800a1730 +80050c20 +80414444 +800a1730 +80313336 +80050c20 +80313336 +80426ea6 +80304f74 +80061744 +80182b44 +80212426 +80264e88 +80414444 +80313336 +8005102e +8005102e +8005102e +80050c20 +80000314 +8005102e +80182b44 +80214062 +80152748 +800a1730 +8005102e +80111c32 +802d487e +80646768 +80214062 +8005102e +80646768 +80050c20 +800a2458 +80313336 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +80132546 +80132546 +80000314 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000010c +8000041c +8006112c +8006112c +80070f1c +80070f1c +80040b24 +8000041c +8000041c +8005123e +8006112c +800e1b30 +800e1b30 +800e1c3e +800e1c3e +8006112c +8006112c +800e1c3e +800e1c3e +800e1c3e +8028497c +8006112c +8006112c +80414444 +80050c20 +800a1730 +8004266a +80132546 +80132546 +80132546 +80132546 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +80283e60 +8005123e +8005123e +8005123e +8005123e +8005123e +801e3b60 +801e3b60 +801e3b60 +801e3b60 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +8003050a +8003050a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80070c14 +800a1730 +80050c20 +800b1c3c +8005102e +800b1f44 +80646768 +8005194c +803b6492 +8005102e +80214062 +800b1c3c +80646768 +8005102e +80182b44 +80152748 +80152542 +800b1f44 +8005102e +8005102e +800a1730 +80182b44 +8005102e +800b1c3c +80313336 +8005102e +80030508 +80061744 +801c2c50 +80646768 +80182b44 +80152542 +80152748 +800b1c3c +800a1730 +80182b44 +80152748 +80264e88 +80050c20 +800b1f44 +800a2458 +800b1c3c +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800d225e +80313336 +8005123e +80283e60 +80283e60 +80313336 +8005102e +80646768 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +80050b16 +8000010c +8000010c +80030718 +80030718 +8000010c +8000041c +8006112c +8006112c +8006112c +80070f1c +80040b24 +80040b24 +8000041c +8005123e +8006112c +8006112c +800e1b30 +800e1c3e +800e1c3e +800e1c3e +8006112c +800e1c3e +800b1c3c +80646768 +80006392 +80313336 +80264e88 +80152748 +801e3b60 +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +80225524 +80225524 +80225524 +80225524 +802e3e46 +802e3e46 +802e3e46 +802e3e46 +802e3e46 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8003050a +80050b16 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80050c20 +80040812 +8005102e +80030508 +80070c14 +8005102e +80040812 +800a2458 +8008101e +800a1730 +80253444 +80072560 +8013336a +8013336a +8004266a +80050c20 +800a1730 +800a1730 +8008101e +8013336a +80040812 +800a1730 +800a2458 +80040812 +80070c14 +80000314 +800a2458 +80040812 +80000000 +80040812 +80030508 +80182b44 +80030508 +80233654 +800c0e12 +80040812 +80264e88 +80030508 +80000000 +80152542 +801f345c +80646768 +800b1c3c +80040812 +80030508 +80646768 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80225524 +800b1c3c +80313336 +80225524 +800d225e +801e3b60 +8005123e +80050c20 +8004266a +80072560 +80152542 +80172334 +8006112c +8006112c +80132546 +8006112c +80000000 +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000041c +8000041c +8006112c +8006112c +80070f1c +80070f1c +80040b24 +8000041c +8005123e +8005123e +8006112c +80050c20 +80050c20 +80030508 +8005102e +8008101e +800a2458 +802d487e +80414444 +80172334 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +80225524 +805c788c +805c788c +805c788c +805c788c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80132546 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80414444 +80030508 +8016284e +80000000 +80384d76 +80384d76 +80000000 +800b1c3c +80070c14 +80426ea6 +80040812 +80030508 +80243f74 +80313c48 +801c2c50 +80212c3c +800a1730 +80426ea6 +80050c20 +800b1c3c +800a2458 +80040812 +80111c32 +8016284e +800a1730 +80233654 +80030508 +80000000 +80061744 +80030508 +801f3b62 +80050c20 +80050c20 +80050c20 +80071126 +800a1730 +80000314 +800a2458 +8092a4b4 +800a1730 +80152542 +800a2458 +80414444 +80233654 +80050c20 +80152748 +801f345c +800a1730 +800b1c3c +80111c32 +80646768 +8016284e +80233654 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e3b60 +80040812 +80646768 +80000000 +80225524 +802e3e46 +802e3e46 +80225524 +800d225e +80384d76 +80000000 +80426ea6 +801c3d6e +80243f74 +80040812 +80426ea6 +80132546 +8006112c +80132546 +8006112c +8006112c +80000000 +80050b16 +8000010c +8000010c +8000010c +80030718 +8000010c +8000010c +8000041c +8006112c +8006112c +80030508 +800b1c3c +80000000 +80426ea6 +80040812 +80111c32 +80030508 +80426ea6 +80214062 +80030508 +80455d86 +80050c20 +80455c78 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +801e3b60 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80050b16 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152542 +80030508 +80000314 +80050c20 +800b1c3c +80414444 +800a2458 +80304f74 +80050c20 +80111c32 +80313336 +8005102e +80000314 +8023538a +80646768 +80264e88 +80646768 +80050c20 +800b1c3c +80050c20 +800b1c3c +80050c20 +80426ea6 +80214062 +8008101e +80646768 +8006112c +802d67b4 +80050c20 +80313336 +80050c20 +80050c20 +80000314 +80182b44 +80050c20 +80000314 +80050c20 +800a2458 +80050c20 +80000314 +8005102e +80061744 +801c2c50 +801f345c +80304f74 +801c2c50 +800a2458 +8005102e +800a1730 +80152542 +80050c20 +80050c20 +8005102e +8005102e +800b1c3c +80152542 +8004266a +8005102e +80264e88 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80050c20 +80426ea6 +80182b44 +80061744 +80132546 +80182d4c +805c788c +80225524 +80225524 +802e3e46 +80426ea6 +80000314 +80050c20 +800a1730 +80313336 +801c2c50 +800a2458 +801c2c50 +800b1f44 +80132546 +8006112c +80132546 +80132546 +8006112c +80000000 +80050b16 +80050b16 +8000010c +8000010c +80030718 +80182b44 +80050c20 +80313336 +80050c20 +800a1730 +801c2c50 +8023538a +80006392 +80050c20 +8005102e +80152542 +800a1730 +80152542 +80000000 +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80001778 +80001778 +80001778 +80001778 +80001778 +80182d4c +80000000 +8000010c +80000000 +80000000 +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80000314 +80426ea6 +80313336 +80000314 +80152748 +800a1730 +80646768 +808498ae +800a1730 +80000314 +80000000 +8093b1d2 +8016284e +8004266a +80152542 +8005102e +80050c20 +80313336 +80050c20 +80050c20 +800a2458 +803e4550 +80111c32 +80233654 +8013336a +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +80050c20 +8005102e +80000314 +80050c20 +80000314 +80050c20 +80152542 +80000314 +800b1c3c +80152748 +800a2458 +80000314 +800a1730 +80414444 +800a1730 +80050c20 +80191718 +80152748 +80050c20 +8004266a +80000314 +80414444 +8005102e +8004266a +800b1f44 +80050c20 +8005102e +80050c20 +80061744 +8013336a +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050b16 +80061744 +8004266a +80050c20 +8013336a +80111c32 +801e3b60 +801e3b60 +801e3b60 +80132546 +80182d4c +805c788c +80225524 +80050c20 +8013336a +80111c32 +8004266a +80313336 +80191718 +80061744 +80414444 +80071126 +800b1c3c +80646768 +80132546 +8006112c +8006112c +80132546 +8006112c +8005102e +80000314 +80646768 +800b1c3c +80071126 +80061744 +80061744 +80191718 +8016284e +80000314 +80050c20 +8093b1d2 +8013336a +80414444 +80111c32 +80000314 +80000314 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80050b16 +80182d4c +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800a1b5c +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +800a1730 +8005102e +801c2c50 +801f3b62 +8016284e +801c2c50 +80061744 +80313336 +80050c20 +80050c20 +8005102e +8005102e +80646768 +800a2458 +8005102e +8005102e +80061744 +80384d76 +8004266a +80050c20 +80000314 +80071126 +80072560 +80506982 +800e1c3e +800d225e +804d6f9e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +802d67b4 +8028497c +80000314 +80000314 +80000314 +80000314 +8013336a +80000314 +802d487e +80182b44 +80050c20 +8005102e +800a1730 +8005102e +80152542 +800a1730 +8005102e +80061744 +80050c20 +80050c20 +80414444 +800b1c3c +80061744 +80384d76 +8005102e +80174b70 +80313336 +800b1f44 +80000314 +803f2f1a +800a2458 +8004266a +8004266a +80505b66 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +8004266a +800b1f44 +80050c20 +8004266a +800b1f44 +800a1730 +80001778 +80182d4c +801e335e +801e3b60 +801e3b60 +801e3b60 +80132546 +80182d4c +80050c20 +800a1730 +80002672 +8013336a +80495d68 +80426ea6 +80050c20 +800a1730 +80495d68 +800a1730 +80122354 +800a2458 +80253444 +802d487e +800a1730 +800a1730 +800a2458 +800a1730 +80050c20 +802d487e +800b1c3c +80172334 +801f3568 +8004266a +8004266a +800a2458 +800a1730 +8004266a +8013336a +80002672 +805a544a +801f3568 +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +800a1b5c +805d90ba +800a1b5c +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +805d90ba +80001778 +80001778 +80001778 +80001778 +80001778 +8028497c +8028497c +80000000 +80000000 +00000000 +00000000 +80182b44 +80050c20 +80426ea6 +801f345c +8059636a +80172334 +80505b66 +80111c32 +8040586a +8013336a +80212c3c +80253444 +800a1730 +80001b6e +80414444 +80001b6e +80001b6e +800a1730 +80243f74 +801f366e +800b1c3c +800a2458 +802b3744 +800a2458 +8013336a +00000000 +00000000 +80040b24 +8005123e +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +80102e90 +800e1c3e +80415a86 +80476a78 +800e1b30 +8008101e +800a1730 +80182b44 +8008101e +800a1730 +802b3744 +8008101e +8013336a +80001b6e +8013336a +80111c32 +802b3744 +80001b6e +80414444 +805a544a +802d487e +80414444 +80495d68 +80001b6e +80111314 +802b3744 +80001b6e +80414444 +80456a86 +8005102e +8008101e +80040812 +802b3744 +80111c32 +80111c32 +8059636a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80050c20 +80050c20 +80040812 +80000314 +80040812 +800a2458 +80000314 +800e1c3e +80050b16 +80182d4c +80001778 +80182d4c +801e335e +801e335e +801e3b60 +801e3b60 +80000314 +80000314 +800a1730 +80040812 +800b1c3c +80050c20 +8008101e +8008101e +80414444 +80050c20 +800a1730 +80070c14 +80000314 +80426ea6 +80233654 +80050c20 +80050c20 +80000314 +80040812 +8005102e +80070c14 +80000314 +80050c20 +80050c20 +80000314 +80070c14 +80000314 +80050c20 +8005102e +800a1730 +8005102e +8028497c +80182d4c +8028497c +80182d4c +80182d4c +8028497c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +800b1c3c +800b1c3c +800a2458 +801c2c50 +80050c20 +800a1730 +80050c20 +80000314 +80050c20 +80050c20 +80313336 +8023527e +80050c20 +80050c20 +8093b1d2 +80050c20 +80050c20 +80050c20 +80111c32 +80000314 +80040812 +80313336 +80050c20 +80000314 +8005102e +80000314 +00000000 +00000000 +00000000 +00000000 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80415a86 +80476a78 +80132546 +804d6f9e +80000314 +80000000 +80000314 +80040812 +80030508 +8005102e +800a1730 +80070c14 +80050c20 +800a1730 +800a2458 +801c2c50 +80111c32 +803e4550 +80426ea6 +8005194c +80577294 +801f345c +80152542 +80414444 +80050c20 +80061744 +80050c20 +800b1c3c +80000314 +8005102e +8005102e +80000314 +8005102e +802e4c84 +80426ea6 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +800a2458 +80050c20 +8005102e +80414444 +80050c20 +80050c20 +8005102e +80050c20 +805d90ba +800a1b5c +800e1c3e +800e1c3e +80050b16 +80182d4c +80001778 +80182d4c +801e335e +801e335e +80000314 +80313336 +80050c20 +80313336 +80050c20 +80111c32 +800a1730 +80050c20 +801c2c50 +80313336 +80000314 +8005102e +80050c20 +8005102e +8005102e +80152748 +80313336 +80313336 +8005102e +80414444 +80313336 +800a1730 +800a1730 +8005102e +80050c20 +80313336 +800a1730 +00000000 +00000000 +00000000 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80385262 +80385262 +80385262 +80385262 +80050c20 +8005102e +80000314 +80050c20 +800a1730 +8005102e +80000314 +800a2458 +800b1c3c +800b1c3c +8005102e +80414444 +800b1c3c +800b1c3c +8005102e +80000314 +80313336 +80414444 +800a1730 +8005102e +80414444 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80182d4c +8005123e +8015316c +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80313336 +800b1f44 +80000314 +8005102e +80000314 +80050c20 +803e4550 +80050c20 +80000314 +80313336 +80646768 +80243f74 +80050c20 +80152542 +8016284e +8005102e +80050c20 +80414444 +80313336 +80061744 +8005102e +8005102e +8005102e +80000314 +80313336 +80050c20 +800b1c3c +8005102e +80050c20 +80050c20 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801e335e +801c2c50 +80040812 +80050c20 +80061744 +8005102e +80000314 +80414444 +801c2c50 +80070c14 +80050c20 +8028497c +80001778 +805d90ba +800a1b5c +800e1c3e +80050b16 +80050b16 +80182d4c +80001778 +80182d4c +800a1730 +80182b44 +80000314 +80414444 +802d487e +80070c14 +80122354 +8016284e +80313336 +8093b1d2 +80040812 +80050c20 +80000314 +800a2458 +8005102e +80050c20 +80061744 +80182b44 +80061744 +8004266a +8005102e +800b1c3c +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80162128 +80183b84 +80183b84 +8005102e +80061744 +80030508 +8005102e +80050c20 +80313336 +80050c20 +80050c20 +8005102e +80000314 +80000314 +80050c20 +8005102e +80061744 +8004266a +8005102e +8005102e +8013336a +80414444 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +80132030 +80476a78 +80182d4c +806081a8 +800e1626 +80132030 +80061744 +8019467a +8005102e +800a1730 +8005102e +800a1730 +80050c20 +80040812 +8005102e +800a1730 +80313336 +8016284e +800a1730 +80050c20 +80313336 +80152542 +801c2c50 +80050c20 +80050c20 +80152748 +80040812 +80000314 +80050c20 +80111c32 +80182b44 +8005102e +8005102e +80000314 +80566d82 +8005102e +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001778 +80000000 +801c2c50 +80030508 +80405476 +803f2f1a +80030508 +80212c3c +80030508 +80426ea6 +80030508 +80214062 +80182d4c +80182d4c +8028497c +8028497c +80001778 +805d90ba +800a1b5c +800e1c3e +800e1c3e +80030508 +80426ea6 +800c0e12 +8030537e +80000000 +80204572 +80313c48 +80244882 +80030508 +80264e88 +80000000 +80214062 +80030508 +8030537e +80040812 +80244882 +80040812 +80001b60 +80000000 +80000000 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80000000 +80304f74 +801c2c50 +80000000 +80000000 +801c2c50 +80030508 +80000000 +80182b44 +80000000 +80304f74 +80426ea6 +80000000 +804f6b86 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +80182d4c +806081a8 +80182d4c +80001778 +80001778 +80000000 +80191718 +80566d82 +80030508 +80212426 +803a5d88 +80030508 +80426ea6 +800b1f44 +80000000 +8024477a +80264e88 +800c0e12 +80040812 +80233654 +80131920 +801f345c +80000000 +80000000 +801c2c50 +80030508 +80000000 +803f2f1a +80030508 +80000000 +8092a4b4 +80646768 +80000000 +804f6b86 +80405476 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80050c20 +80152542 +80455c78 +8008101e +80050c20 +80006392 +800b1c3c +800b1c3c +80050c20 +80050c20 +800b1c3c +8005102e +80385262 +80132546 +8028497c +80182d4c +80182d4c +8028497c +8028497c +800a2458 +80000314 +800a1730 +800b1f44 +8093b1d2 +80050c20 +80313336 +800b1c3c +80384d76 +800a2458 +801c2c50 +800b1c3c +800a1730 +80313336 +80313336 +80313336 +80646768 +800b1f44 +80001164 +80030508 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80455c78 +80152748 +80070c14 +800a2458 +80426ea6 +80313336 +80152542 +80182b44 +80111c32 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +80001778 +80132030 +80132546 +8005102e +80212426 +800b1f44 +8005102e +80646768 +8093b1d2 +800a2458 +8004266a +803e4550 +800a1730 +80006392 +803e4550 +8093b1d2 +80384d76 +80050c20 +800a1730 +80000314 +800a2458 +80111c32 +80040812 +80414444 +80152748 +80070c14 +800a2458 +80414444 +8005102e +8016284e +802d487e +80152748 +80111c32 +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80212426 +8004266a +80050c20 +8005102e +80050c20 +8004266a +8005102e +80384d76 +801d3248 +801c2c50 +8005102e +80000314 +80050c20 +80456f8a +80162128 +80001778 +80385262 +80050c20 +80212426 +80313336 +8030537e +800b1c3c +80050c20 +80122354 +8016284e +800b1f44 +80495156 +80212426 +80006392 +80384d76 +80006392 +80006392 +8005102e +80000314 +80050c20 +80456f8a +801f3b62 +80050c20 +80040812 +80061744 +80061744 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +8093b1d2 +800b1f44 +80152748 +800a2458 +80072560 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80132030 +80132030 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +80000314 +80000000 +80050c20 +80000000 +80070c14 +80395486 +8005102e +80212426 +80001164 +80414444 +8005102e +800a1730 +800b1c3c +800b1c3c +80566d82 +8005102e +800a2458 +8008101e +8093b1d2 +80206398 +80000314 +801c2c50 +80050c20 +800a2458 +8005102e +8093b1d2 +8005102e +80495156 +80000314 +803e4550 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802d67b4 +80152748 +8008101e +80152542 +8008101e +800b1c3c +801f345c +8023538a +80244882 +80243f74 +80414444 +80414444 +8008101e +80646768 +800b1c3c +8005102e +800a2458 +800b1c3c +800b1f44 +800b1c3c +80000314 +80000314 +800a1730 +80244882 +80384d76 +80414444 +800b1c3c +800b1f44 +80050c20 +80313336 +80646768 +80384d76 +80244882 +80040812 +80050c20 +80050c20 +8093b1d2 +800b1f44 +801c2c50 +8005102e +80061744 +8005102e +80233654 +8004266a +800b1f44 +8008101e +8013336a +80414444 +800a2458 +8005102e +800b1f44 +800b1c3c +8005102e +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +80001778 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80001778 +80001778 +80001778 +80050b16 +80050b16 +80030718 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +800e1b30 +80001778 +80132030 +80225524 +80000314 +8005102e +80000000 +80264e7e +803e4550 +802f445e +801f3b62 +80071126 +80384d76 +800a2458 +800a1730 +80050c20 +8008101e +80414444 +80111c32 +80061744 +800a1730 +80001b60 +80050c20 +8005102e +80182b44 +80061744 +8004266a +80212426 +8005102e +8005102e +800b1c3c +80244882 +80243f74 +8093b1d2 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80264e88 +80000000 +80111c32 +8024477a +800c0e12 +80577294 +800c0e12 +806786ac +801a2028 +8030537e +80172334 +80646768 +80030508 +800b1c3c +80000000 +803b6492 +80030508 +8023538a +800c0e12 +80040812 +80182b44 +800b1c3c +80152542 +80243f74 +8013336a +80414444 +80172334 +8005102e +800a1730 +80050c20 +8008101e +800c0e12 +806786ac +801a2028 +8030537e +80030508 +801c2c50 +80070c14 +8005102e +800a2458 +80172334 +800a1730 +8008101e +80000000 +8013336a +800a2458 +80070c14 +800d141e +80182b44 +80030508 +80070c14 +80050c20 +80172334 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +80132030 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +80182d4c +80182d4c +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80132030 +80225524 +80183b84 +80000314 +800a224c +80061744 +80050c20 +8008101e +800a2458 +80395486 +800b1f44 +80646768 +80050c20 +80030508 +80050c20 +80006392 +80313336 +80152748 +802d487e +80000314 +800d141e +800a2458 +8008101e +80071126 +800b1c3c +800b1c3c +801f345c +80646768 +80395778 +80244882 +8030537e +80040812 +8016284e +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +803a5d88 +803b6492 +80006392 +80050c20 +80061744 +80212426 +800c1626 +80304f74 +80040812 +80050c20 +80050c20 +800a2458 +80212426 +800a1730 +80050c20 +800a2458 +80040812 +80001b60 +80111c32 +80264b72 +80006392 +800a1730 +80000314 +8092a4b4 +80455c78 +80253444 +800b1f44 +80313336 +8005102e +8005102e +80111c32 +80646768 +80061744 +80006392 +80243b60 +80111c32 +80001b60 +80040812 +80414444 +800a1730 +80111c32 +8013336a +80172334 +80243f74 +800a1730 +80001b60 +80030508 +80000314 +80233654 +8005194c +80243b60 +803f5d88 +8030537e +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +800e1626 +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +80070f1c +806081a8 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80001778 +800e1c3e +80001778 +800e1c3e +80183b84 +80385262 +80030508 +80000000 +8030537e +80001b6e +80000000 +8044719c +80000000 +80030508 +80484646 +80030508 +800c0e12 +804e6e98 +80000000 +80000000 +80455d86 +803f2f1a +80030508 +80253444 +80000000 +80131920 +80304f74 +80040812 +80000000 +806a8eb0 +80496590 +801a2028 +80244882 +80495156 +80030508 +80131920 +8016284e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +803a3f44 +80001164 +8022417a +8004266a +80334452 +8013234e +8004266a +807ca6b4 +80496590 +800a2458 +80000314 +80050c20 +8005102e +8092a4b4 +803e4550 +80384d76 +8005102e +80507798 +80416a98 +80204b74 +80204b74 +80226392 +800a224c +801b3e74 +80313336 +8005102e +8005102e +80264e7e +80121b28 +8048494c +803b6492 +800c1626 +80191718 +80121b28 +80121b28 +80204b74 +801a3354 +80416a98 +80507798 +800a2458 +80050c20 +80313336 +800b1f44 +800a2458 +80031b58 +80183b62 +8030537e +8005102e +80000314 +80000314 +80050c20 +8005102e +80000000 +80000000 +80000000 +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +804d6f9e +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +80182d4c +80000000 +80000000 +80000000 +80000000 +80000000 +8015325e +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +806081a8 +80182d4c +80001778 +80132030 +80132546 +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80122354 +80030508 +80030508 +800b1c3c +8005102e +80050c20 +800a1730 +800b1f44 +800a2458 +80313336 +8005102e +80426ea6 +80000314 +8005102e +80111c32 +80050c20 +8005102e +801f3b62 +8023527e +80000314 +803e4550 +80061744 +80395486 +801c2c50 +80244882 +80313336 +801c2c50 +803e4550 +80040812 +80070c14 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80415a86 +80243f74 +80243f74 +80264e88 +80495156 +8005102e +800b1f44 +80384d76 +80174784 +8008101e +80264e88 +80070c14 +80040812 +80244882 +800b1c3c +8005102e +80050c20 +80061744 +80604d34 +8004266a +8048494c +803a5d88 +80212426 +80426ea6 +8004266a +80031b58 +80305786 +803f2f1a +800b1c3c +8024477a +8004266a +80071126 +8004266a +8024477a +80264b72 +803a5d88 +80152748 +80163f82 +80203562 +80000314 +80000314 +8005102e +800b1f44 +80313336 +8005194c +8005102e +80000314 +80061744 +80061744 +80031b58 +80000000 +8000010c +8000010c +8000010c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +800e1b30 +80000000 +80000000 +807c7f84 +8015325e +801b4a98 +8006112c +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +8005102e +80050c20 +80061744 +8005102e +80061744 +8005102e +803e4550 +800b1f44 +80191718 +801f4d7e +80245b7e +80264e7e +80313336 +80121b28 +80313336 +80496590 +801b3e74 +808498ae +80206e98 +8006528a +80183b62 +80001164 +801a3354 +801f3568 +8005102e +80050c20 +80313336 +80030508 +80050c20 +8005102e +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001b60 +80304f74 +801c2c50 +8050718a +80212c3c +80496590 +802f3e5e +805d81a4 +801c2c50 +803f2f1a +80182b44 +8024477a +801a2028 +802f445e +80070c14 +8093b1d2 +80070c14 +80414444 +801f366e +80172334 +80496590 +801c2c50 +80607a94 +801b1e20 +80414444 +80152542 +80000000 +80111c32 +80233654 +800c0e12 +800a2458 +800c0e12 +8093b1d2 +80264b72 +8013336a +80000000 +80111c32 +80000000 +800d141e +80040812 +80072560 +80000314 +80000000 +8013336a +800c0e12 +80313336 +800d141e +80313336 +80313336 +800b1f44 +80313336 +800c1626 +80030718 +80030718 +80040b24 +80040b24 +00000000 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +8028497c +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +80070f1c +802d67b4 +800e1b30 +80001778 +80132030 +8028497c +801e335e +80001778 +8028497c +80182d4c +805d90ba +80050b16 +8005102e +80031d66 +80041b52 +80313336 +8005102e +80050c20 +80163162 +80121b28 +80071126 +80174b70 +800b1f44 +8022417a +803a3f44 +803d4e68 +80313336 +803a5d88 +80204b74 +804e6e98 +80001164 +804376a8 +80646768 +80183b62 +804f72a4 +80050c20 +80000314 +80183b62 +80050c20 +80000314 +80050c20 +80334b60 +8092a4b4 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005123e +8016284e +802b3744 +80204572 +802f445e +80174b70 +8004266a +803e4550 +80050c20 +8005102e +80050c20 +80000314 +80040812 +80041b52 +8016284e +80040812 +8013336a +80172334 +800a1730 +80566d82 +8008101e +80414444 +800b1c3c +80233654 +800b1c3c +8093b1d2 +800a2458 +800a1730 +800a2458 +80050c20 +80040812 +800a1730 +8005102e +80152748 +803f5d88 +80395486 +80008598 +80305786 +00000000 +8006112c +8000010c +801f345c +80050c20 +801f345c +80426ea6 +800a1730 +803f5d88 +80395486 +801f3568 +8023538a +8022417a +804e6e98 +8048494c +8000010c +800e1626 +00000000 +00000000 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +80415a86 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +802d67b4 +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +80001778 +80001778 +80132030 +80225524 +80183b84 +80001778 +8028497c +8028497c +800a1b5c +80050b16 +8005102e +80030508 +800c1626 +8005102e +80000000 +80071126 +8005194c +802d487e +800c1626 +80304f74 +80050c20 +80243f74 +803d4e68 +80243f74 +80496590 +80001164 +8005102e +800b1c3c +800b1f44 +801f3568 +80001164 +8023538a +80050c20 +8008101e +80000314 +80050c20 +80111c32 +800a2458 +80050c20 +80414444 +80244882 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +8005102e +80050c20 +80111c32 +800a2458 +8005102e +800a224c +80191718 +8024477a +80646768 +8023538a +8005102e +800b1c3c +80313336 +80061744 +80646768 +800a1730 +800a2458 +80646768 +803b6492 +80002772 +80384d76 +80416a98 +8005102e +80111c32 +80212426 +801d3248 +8005102e +803b6492 +80121b28 +80061744 +80000314 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +80040b24 +80040b24 +80050b16 +80050b16 +8000010c +80384d76 +803b6492 +80384d76 +800b1c3c +800b1c3c +80050c20 +80050c20 +80000314 +80061744 +80030508 +80000000 +80000314 +00000000 +00000000 +00000000 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8005123e +80132546 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80132030 +80001778 +800e1c3e +80001778 +800e1c3e +80183b84 +80385262 +80182d4c +80001778 +800a1b5c +80182d4c +801e335e +80061744 +801d3248 +804e6e98 +804376a8 +80001164 +804f72a4 +80395486 +80001b60 +80496590 +801f366e +80426ea6 +80111c32 +807791a6 +80212c3c +80455c78 +804f72a4 +80244882 +802f3e5e +804f72a4 +804f7da8 +801c2c50 +8005102e +80414444 +800d141e +80233654 +80172334 +800c0e12 +801a2028 +80152748 +80172334 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +807c9bbe +80040812 +80070c14 +80426ea6 +80050c20 +80030508 +8093b1d2 +800a1730 +800a1730 +80313336 +80050c20 +80414444 +801f345c +8023538a +80212426 +80414444 +802d487e +80313336 +803b6492 +801f3b62 +80000314 +80040812 +80000314 +80040812 +80000314 +803b6492 +80008598 +80313336 +8046638a +800e1c3e +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1626 +800e1626 +80132030 +80132030 +80132030 +80050b16 +80050b16 +80000314 +80050c20 +80152748 +80050c20 +800b1c3c +80030508 +8044719c +800b1f44 +800b1f44 +80050c20 +8005102e +80041b52 +80313336 +00000000 +00000000 +8005123e +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80102e90 +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80001778 +800e1c3e +80001778 +801e335e +80132546 +80000314 +80000314 +80070c14 +800b1f44 +800a2458 +80172334 +8013336a +80111c32 +800a1730 +80152542 +80414444 +8008101e +8008101e +80111c32 +80006392 +800a2458 +8005194c +800a2458 +80050c20 +800a2458 +80050c20 +800b1f44 +8005102e +80313336 +800a1730 +800b1c3c +80050c20 +800a1730 +80121b28 +8093b1d2 +8023527e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a224c +80050c20 +800b1c3c +800a1730 +801f3568 +800b1c3c +801f3b62 +801f345c +80384d76 +800c1626 +80122354 +80212426 +80646768 +803a3f44 +80111314 +80070c14 +80152542 +80111c32 +80070c14 +80070c14 +80040812 +80212c3c +80426ea6 +80030718 +800a142a +8028497c +80030718 +80577ca2 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +80050b16 +8003050a +8003050a +8003050a +80132030 +80132030 +80132030 +80182d4c +80182d4c +80182d4c +80061744 +80313336 +80111c32 +80152748 +800a2458 +80030508 +80050c20 +80050c20 +80050c20 +80152748 +80313336 +80000314 +80061744 +00000000 +00000000 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +80001778 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +800e1c3e +80001778 +801e3b60 +80182d4c +80225524 +80050c20 +80313336 +8005102e +80061744 +80000314 +800a1730 +80000314 +80414444 +80414444 +80414444 +80313336 +800c1626 +80191718 +80061744 +80384d76 +80646768 +80212426 +80152748 +80384d76 +80050c20 +8005102e +800b1f44 +801d3248 +800a1730 +800a1730 +803b6492 +8005194c +806489a6 +80061744 +8044719c +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80181a22 +801a3354 +80050c20 +80313336 +80000314 +80061744 +800e5b8c +80000314 +80061744 +80061744 +801f3568 +801f3b62 +8016284e +80182b44 +80152542 +8005102e +80313336 +800a1730 +800a2458 +803e4550 +801e3b60 +800e1c3e +80182d4c +80476a78 +800e1b30 +800e1b30 +80476a78 +8006112c +80000000 +8003165e +80000000 +00000000 +00000000 +00000000 +00000000 +80182d4c +80182d4c +80476a78 +80476a78 +80476a78 +800f1b28 +800f1b28 +800f1b28 +80050b16 +80050b16 +80000000 +80000000 +804376a8 +804376a8 +804376a8 +80646768 +80212c3c +800c101c +80030508 +800a2458 +80253444 +80414444 +80040812 +80212c3c +80050c20 +80070c14 +00000000 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +80385262 +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +80132030 +8028497c +801e335e +80001778 +8028497c +80182d4c +805d90ba +80050b16 +80182d4c +801e3b60 +80182d4c +802e3e46 +800d225e +80061744 +80000314 +80006392 +80313336 +800b1c3c +80313336 +80000314 +8008101e +80000314 +80050c20 +800a2458 +80264e88 +80235590 +8022417a +801f345c +8092a4b4 +80122354 +80050c20 +80426ea6 +80305786 +800b1c3c +80000314 +800a1730 +80050c20 +80121b28 +8044719c +800b1f44 +8005102e +800b1f44 +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +8005102e +8005102e +8005194c +803a3f44 +8005102e +8004266a +80384d76 +80000314 +80050c20 +80313336 +8048494c +80050c20 +80313336 +8005102e +80566d82 +8005102e +80313336 +80061744 +80132546 +80457ab2 +80457ab2 +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +80050c20 +800a101a +801b4a98 +804972a6 +80061744 +80000314 +800b1f44 +80163f82 +80313336 +8004266a +80001164 +80214a86 +80132546 +80132546 +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +803e689e +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +800e1b30 +80001778 +80132030 +80225524 +80183b84 +80001778 +8028497c +8028497c +800a1b5c +80050b16 +80182d4c +801e3b60 +805c788c +802e3e46 +801e3b60 +80132546 +80040812 +80040812 +800c101c +80000000 +80040812 +80070c14 +80040812 +8013336a +80426ea6 +8005194c +801c2c50 +800b1f44 +80646768 +80111c32 +80426ea6 +801f3b62 +800b1c3c +80111c32 +80384d76 +80000314 +80040812 +80030508 +800a1730 +8005102e +80050c20 +80040812 +8005102e +80152748 +80061744 +8005194c +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +801f4f8a +80040812 +8030537e +80000314 +803e4550 +80070c14 +800b1c3c +800b1c3c +801f3b62 +80072560 +80061744 +800b1f44 +80646768 +80426ea6 +80000314 +80000314 +800a2458 +800a1730 +80a3abae +8006112c +8006112c +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +80050c20 +80050c20 +80050c20 +800a101a +801b4a98 +80484646 +80212426 +80041b52 +80050c20 +8005102e +80334b60 +8015386c +807c7f84 +80214a86 +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +80132546 +807c7f84 +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80001778 +80225524 +80183b84 +80385262 +80182d4c +80001778 +800a1b5c +80182d4c +801e335e +80132546 +805c788c +80225524 +8005123e +80132546 +8006112c +8004266a +800a2458 +80244882 +800b1c3c +800b1c3c +803e4550 +80244882 +8005102e +8093b1d2 +8023538a +801f3568 +803e4550 +800c1626 +80122354 +80384d76 +80071126 +80008598 +800a2458 +80111520 +800c101c +80000314 +80152542 +800a2458 +80172334 +80040812 +80414444 +8013336a +800c0e12 +80212c3c +80172334 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8004266a +80313336 +802d487e +8005102e +8016284e +80313336 +8093b1d2 +8005102e +800a1730 +8093b1d2 +80334b60 +80111c32 +803a5d88 +8013336a +80191718 +80040812 +801b3e74 +80040812 +8023527e +803a5a8e +80a3abae +80102e90 +8006112c +8006112c +80132546 +804787c6 +8015316c +800d225e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80000314 +80000314 +80000314 +80000314 +8006112c +800a101a +8005102e +800a2458 +8005102e +803a3f44 +803a3f44 +80313336 +80182d4c +8015386c +8015316c +8015316c +8015316c +8005123e +8015325e +806a7678 +8015316c +8015316c +8015316c +8015316c +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +80182d4c +80001778 +800e1c3e +80001778 +801e335e +80132546 +80225524 +800d225e +8005123e +80030718 +80040b24 +80313336 +80030508 +8048494c +80000314 +800a2458 +80212426 +80426ea6 +80414444 +800b1c3c +80414444 +80426ea6 +801c2c50 +801f3568 +80646768 +8004266a +803b6492 +80212426 +800b1f44 +80000314 +8005194c +80050c20 +80163f82 +8005102e +8005102e +8004266a +8005102e +80121b28 +80050c20 +806690be +801a3354 +80041b52 +80204b74 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80000314 +80000314 +80313336 +80050c20 +8093b1d2 +800b1f44 +800a1730 +801f345c +8005102e +8023538a +80001164 +802d487e +8016284e +800a1730 +80111c32 +800a2458 +80414444 +80132546 +80040b24 +8005123e +803a5a8e +80a3abae +80a3abae +80a3abae +8015316c +80132546 +804972a6 +80457ab2 +8015325e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +804376a8 +804376a8 +804376a8 +804376a8 +804376a8 +806081a8 +8006112c +8016284e +80040812 +80061744 +800a2458 +80030508 +800b1c3c +8015325e +80182d4c +8005123e +8015325e +8005123e +804e616c +8005123e +80132546 +8015386c +800a142a +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +80182d4c +80001778 +80132030 +80132546 +8028497c +801e335e +80162128 +80132546 +80182d4c +805d90ba +80050b16 +80001778 +801e3b60 +80182d4c +802e3e46 +800e1c3e +800e1c3e +80132546 +8005123e +8005123e +8005102e +80163162 +80414444 +80050c20 +80414444 +80152748 +80244882 +8005102e +80000314 +8004266a +80152748 +800a2458 +80646768 +8023538a +801f3b62 +80050c20 +8005102e +80152748 +8005102e +8005102e +80041b52 +800b1f44 +80031b58 +80050c20 +80000314 +80050c20 +80061744 +80050c20 +80000314 +80212426 +80604d34 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +80070c14 +8004266a +80484646 +803b6492 +800a1730 +80313336 +802f445e +80050c20 +800b1c3c +80646768 +802d487e +80182b44 +801f345c +80233654 +8013336a +801c2c50 +80426ea6 +80426ea6 +800e1c3e +80182d4c +80182d4c +801e335e +80040b24 +803a5a8e +803a5a8e +8015316c +80102e90 +80040b24 +8006112c +8006112c +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +800e1c3e +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +800e1c3e +80566d82 +80566d82 +80566d82 +80566d82 +80566d82 +80566d82 +804787c6 +806081a8 +800b1f44 +801f3568 +80212426 +8013336a +80182d4c +8006112c +8015316c +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +8015316c +8015325e +80a4afb4 +80385262 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +80132546 +8028497c +801e335e +80001778 +8028497c +8028497c +805d90ba +80050b16 +80182d4c +801e3b60 +800e1c3e +80132546 +806081a8 +806081a8 +8006112c +800e1c3e +800e1c3e +800e1c3e +80000314 +80000314 +80414444 +803e4550 +80000314 +80000314 +8005102e +8093b1d2 +8005102e +80050c20 +800a1730 +80313336 +8005102e +80384d76 +80243f6e +80050c20 +800b1c3c +8005102e +80050c20 +80384d76 +8004266a +8005194c +8005102e +80050c20 +80061744 +80061744 +80002772 +8005194c +80050c20 +80313336 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +80313336 +800b1f44 +80264e88 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80233654 +80414444 +8013336a +80172334 +800d141e +802d487e +80172334 +8022619e +80182d4c +800e1c3e +801f396c +801f396c +80132546 +801e335e +8005123e +8005123e +8005123e +80102e90 +80102e90 +8006112c +8006112c +80132546 +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +8015316c +804972a6 +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80132546 +800b1c3c +8005102e +8005102e +8005102e +8005102e +80050c20 +80050c20 +80102e90 +804787c6 +80061744 +8015316c +8006112c +8015316c +8005123e +80486570 +800e1c3e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +802d67b4 +800e1b30 +80001778 +80132030 +80225524 +80183b84 +80385262 +8028497c +8028497c +800a1b5c +80182d4c +800e1c3e +804972a6 +8015316c +80182d4c +80182d4c +801e335e +800e1c3e +80132546 +80132546 +806081a8 +8006112c +800a2458 +80070c14 +804376a8 +803e4550 +80030508 +8013336a +80646768 +800c101c +800c101c +80313336 +800c101c +80111520 +80152542 +80111c32 +80111c32 +80111c32 +800b1c3c +80030508 +800b1f44 +80050c20 +80040812 +80414444 +8005102e +8005102e +80050c20 +800b1c3c +80050c20 +80313336 +80031b58 +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +800b1f44 +80313336 +80040812 +80000314 +80646768 +8024639c +80264e7e +80507798 +80244882 +80212426 +80001b60 +80566d82 +801f345c +8023538a +801c2c50 +80646768 +80000000 +80000000 +804972a6 +804972a6 +80a3abae +80182d4c +80182d4c +800e1c3e +801f396c +80132546 +80132546 +80040b24 +80040b24 +8005123e +80a3abae +80a3abae +80a3abae +8006112c +8006112c +80132546 +8015316c +80457ab2 +8015325e +8015325e +8015325e +800d225e +8015316c +804972a6 +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +801e436e +80414444 +80414444 +80414444 +80414444 +80414444 +80235590 +804972a6 +800d225e +8015316c +8006112c +804e616c +8006112c +80486570 +800e1c3e +80214a86 +80182d4c +804972a6 +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +80001778 +800e1c3e +80132030 +80225524 +80183b84 +80385262 +80182d4c +80001778 +8015316c +80182d4c +804787c6 +804787c6 +800d225e +800e1c3e +800e1c3e +804972a6 +804972a6 +8015316c +80182d4c +801e335e +800e1c3e +800e1c3e +80212426 +80384d76 +800a2458 +80414444 +8005102e +800a1730 +80384d76 +80384d76 +800a1730 +800a2458 +80152748 +80233654 +8093b1d2 +8093b1d2 +80182b44 +80334b60 +80070c14 +80070c14 +80235590 +800a1730 +80040812 +80235590 +80204b74 +800a2458 +80243f6e +803a3f44 +800a2458 +801f5b9c +801f4f8a +80070c14 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80050c20 +8005102e +80050c20 +8093b1d2 +80264e88 +80646768 +8092a4b4 +80646768 +800a1730 +800a1730 +800b1c3c +80050c20 +80182b44 +8093b1d2 +80111c32 +8005102e +8093b1d2 +801f396c +80435a74 +8006112c +8006112c +800e1b30 +804972a6 +80132546 +8022619e +800e1c3e +800e1c3e +800e1c3e +80182d4c +80132546 +801e335e +80040b24 +803a5a8e +803a5a8e +80102e90 +80a3abae +80040b24 +8006112c +804972a6 +804787c6 +800d225e +800d225e +8015325e +8015325e +800d225e +8015316c +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +8018407a +8005123e +80030508 +80030508 +80030508 +801e335e +804972a6 +800d225e +8015316c +800d225e +804e616c +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80132030 +80001778 +800e1c3e +80001778 +800e1c3e +80162128 +80132546 +8015325e +800d225e +800d225e +8006112c +8005123e +8005123e +8015316c +8015316c +80182d4c +804787c6 +800d225e +800e1c3e +800e1c3e +800e1c3e +804972a6 +8015316c +80182d4c +80050c20 +8004266a +80000314 +80000314 +80000314 +80152542 +80172334 +80001b60 +80152542 +8093b1d2 +8023538a +80426ea6 +80152748 +80152542 +800a1730 +800a2458 +800b1c3c +80264e7e +80646768 +8016284e +800b1c3c +803e4550 +80122354 +802f3e5e +8005102e +80313336 +802d487e +80313336 +80313336 +80243b60 +800c1626 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +8005102e +800a2458 +80414444 +800a2458 +80214062 +80172334 +80152748 +80172334 +800b1c3c +80414444 +80313336 +800b1c3c +80646768 +80384d76 +8023527e +801f345c +8005194c +80132546 +8021447a +801f396c +801f396c +804972a6 +8006112c +804787c6 +800e1b30 +803b67a8 +80a3abae +8022619e +800e1c3e +800e1c3e +801f396c +80182d4c +801e335e +801e335e +8005123e +8005123e +8005123e +80102e90 +80506982 +8006112c +800e1c3e +80132546 +804787c6 +80457ab2 +800d225e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +80040b24 +80506982 +8015316c +8005123e +800b1c3c +801e335e +804972a6 +800d225e +8005123e +800d225e +804e616c +8006112c +80040b24 +80132546 +807c7f84 +8015325e +804972a6 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +806081a8 +80182d4c +80001778 +80132030 +80132546 +8028497c +800e1c3e +804e616c +8006112c +8005123e +806a7678 +804e616c +8015316c +8015316c +8015325e +800d225e +8006112c +8005123e +8005123e +8005123e +8015316c +80182d4c +804787c6 +800d225e +800d225e +800e1c3e +800e1c3e +8008101e +8005194c +80212426 +80243f6e +80001164 +8005194c +80426ea6 +80172334 +800b1f44 +800b1c3c +80384d76 +800b1c3c +803f2f1a +800a1730 +80172334 +80414444 +8024477a +80264e88 +80313336 +8093b1d2 +80061744 +80050c20 +80313336 +80313336 +80070c14 +80000314 +80000314 +8005102e +80040812 +80212426 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80071126 +80243f6e +807797bc +80001164 +8023538a +80070c14 +80264e88 +80030508 +80646768 +80030508 +800a1730 +800a2458 +80000000 +8008101e +80313336 +800a1730 +80313336 +80182b44 +8015325e +8015325e +8015325e +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +804972a6 +804972a6 +800e1b30 +80a3abae +80a3abae +80182d4c +800e1c3e +800e1c3e +801f396c +80182d4c +80132546 +80040b24 +8005123e +8018407a +80a3abae +80a3abae +80a3abae +8006112c +8006112c +80132546 +80457ab2 +80457ab2 +8015325e +8015325e +8015325e +800d225e +804972a6 +800e1c3e +8015316c +806081a8 +801e335e +800e1c3e +804787c6 +8005123e +800d225e +806a7678 +804e616c +80040b24 +80132546 +807c7f84 +800a142a +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80132030 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +804e616c +8006112c +8005123e +806a7678 +806a7678 +804e616c +8015316c +8015325e +800d225e +8006112c +8006112c +8005123e +8005123e +8015316c +80182d4c +804787c6 +80414444 +80000314 +80071126 +80313336 +80071126 +800a1730 +800b1f44 +800d141e +802f445e +80182b44 +8008101e +80426ea6 +8013336a +8013336a +801f345c +800a1730 +80000314 +8005102e +802f445e +80050c20 +80313336 +8005102e +800c1626 +8093b1d2 +8004266a +8005102e +80050c20 +80243f6e +800a2458 +80050c20 +80050c20 +800b1c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80183b62 +80030508 +803e4550 +80304f74 +8005102e +80496590 +80070c14 +800a2458 +80050c20 +80243b60 +800a1730 +80000314 +8093b1d2 +80050c20 +801f345c +8013336a +80233654 +80006392 +804e6e98 +8005123e +8005123e +80a3abae +8015325e +8015325e +8015325e +8033659c +80397aa8 +80397aa8 +80435a74 +804972a6 +8006112c +804972a6 +804972a6 +804972a6 +8022619e +80182d4c +800e1c3e +800e1c3e +80132546 +80182d4c +801e436e +80040b24 +80040b24 +803a5a8e +80a3abae +80102e90 +80a3abae +8006112c +8006112c +804972a6 +804787c6 +800d225e +800d225e +8015325e +800e1c3e +806081a8 +80182d4c +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +800a142a +801b4a98 +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8006112c +802d67b4 +8028497c +800e1b30 +8028497c +80070f1c +802d67b4 +800e1b30 +80001778 +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +80486570 +804e616c +804e616c +8006112c +8005123e +8005123e +806a7678 +804e616c +8015316c +8015325e +8015325e +800d225e +8006112c +8005123e +8005123e +803e4550 +800c1626 +80071126 +80262726 +80313336 +803a3f44 +80070c14 +80000000 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +8004266a +800b1c3c +80001164 +800c1626 +8004266a +8004266a +800b1f44 +80061744 +80071126 +80071126 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80000314 +801d3248 +80243b60 +80264b72 +80305786 +8005102e +80050c20 +8093b1d2 +8004266a +80426ea6 +80313336 +8005102e +8016284e +800b1c3c +8093b1d2 +8016284e +801f345c +801f3b62 +8006112c +804e616c +800e1c3e +800e1c3e +80214a86 +80a3abae +80182d4c +8015325e +8015325e +8021447a +8021447a +801f396c +80435a74 +8006112c +8006112c +800e1b30 +804972a6 +803b67a8 +8022619e +800e1c3e +800e1c3e +800e1c3e +80182d4c +80182d4c +801e335e +801e335e +8005123e +803a5a8e +8005123e +80102e90 +80040b24 +8006112c +800e1c3e +8005123e +800e1c3e +80132546 +80182d4c +800e1c3e +80182d4c +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +80040b24 +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +800e1626 +80132030 +801b4a98 +801b4a98 +801b4a98 +801b4a98 +80182d4c +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +8006112c +8006112c +8005123e +806a7678 +804e616c +8015316c +8015316c +8015325e +800d225e +8005102e +80000314 +800a2458 +8005102e +800a2458 +80050c20 +8008101e +800b1c3c +80072560 +800b1c3c +80384d76 +801f345c +80212426 +80646768 +80233654 +80313336 +800b1f44 +800b1c3c +80384d76 +80243f74 +802e4c84 +8004266a +80313336 +8008101e +800a1730 +803a3f44 +802d487e +80030508 +80040812 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801f345c +80264570 +80000000 +80040812 +80030508 +800a2458 +80040812 +80030508 +80061744 +80000000 +800b1f44 +80030508 +80030508 +80000314 +80000314 +80152542 +80152748 +801f345c +80001164 +8005123e +8005123e +8015316c +8006112c +800e1c3e +800e1c3e +800e1c3e +80202f30 +80a3abae +8015325e +8015325e +80132546 +8021447a +80397aa8 +801f396c +8006112c +804972a6 +800e1c3e +800e1b30 +803b67a8 +80a3abae +8022619e +80182d4c +800e1c3e +801f396c +801f396c +80132546 +801e335e +80040b24 +8015316c +800d225e +8015325e +8005123e +800e1c3e +80132546 +80182d4c +800e1c3e +80182d4c +8005123e +8015316c +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80182d4c +8005123e +8015316c +8015316c +8015316c +8015325e +803e689e +80385262 +8006112c +80102e90 +800e1c3e +80415a86 +80476a78 +80132546 +804d6f9e +8033659c +800a142a +8033659c +800a142a +800a142a +800a142a +800a142a +800a142a +800a142a +8015325e +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +804e616c +804e616c +804e616c +8006112c +8005123e +806a7678 +804e616c +804e616c +8005102e +80040812 +80050c20 +80152542 +80050c20 +80646768 +800b1c3c +80264e88 +800a1730 +8005102e +80006392 +80050c20 +800b1f44 +803e4550 +800a1730 +800b1c3c +8013336a +80050c20 +800a2458 +804376a8 +80646768 +80414444 +80000314 +800b1c3c +80050c20 +80050c20 +800a2458 +80071126 +80030508 +8005102e +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +807ca6b4 +8005194c +80030508 +80000314 +80262726 +80061744 +803f5d88 +802d487e +80001164 +800a1730 +80031b58 +80030508 +80061744 +80000000 +80000000 +80030508 +8093b1d2 +80030508 +8005102e +804e616c +804e616c +8006112c +8005123e +80486570 +8015316c +8006112c +8005123e +8005123e +8005123e +80202f30 +8015325e +8015325e +8015325e +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +806081a8 +804972a6 +804972a6 +804972a6 +8018407a +8005123e +8005123e +80506982 +80506982 +80040b24 +8015316c +80040b24 +80132546 +800e1c3e +80132546 +8015316c +800e1c3e +80182d4c +8006112c +8015316c +8005123e +804e616c +800e1c3e +80214a86 +80182d4c +8033659c +8006112c +804787c6 +80132546 +800e1c3e +80182d4c +8005123e +8015316c +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132030 +80476a78 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +804972a6 +8033659c +800a142a +800a142a +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80486570 +80486570 +804e616c +804e616c +8006112c +8005123e +80030508 +800a2458 +80050c20 +80050c20 +8023538a +804f7da8 +8013336a +80414444 +80040812 +80050c20 +800a1730 +800b1c3c +80414444 +80414444 +8093b1d2 +80111c32 +803f5d88 +80233654 +80646768 +80414444 +80264e88 +801c2c50 +80426ea6 +800b1c3c +8005194c +80646768 +80313336 +80152542 +8005102e +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80061744 +80313336 +800b1f44 +8004266a +800a1730 +803e4550 +8093b1d2 +800a2458 +80050c20 +8005102e +8005194c +80050c20 +80000314 +80050c20 +80030508 +80313336 +80061744 +80050c20 +801d3248 +80040b24 +80283e60 +804e616c +8021447a +8005123e +800e1c3e +8005123e +8015316c +8015316c +804e616c +8005123e +8005123e +8005123e +80a3abae +8015325e +80182d4c +8015325e +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +80182d4c +801e436e +80040b24 +8005123e +8018407a +8005123e +8005123e +80030718 +80132546 +800e1c3e +800e1c3e +8015316c +800e1c3e +8015316c +8006112c +8015316c +8006112c +80486570 +800e1c3e +80214a86 +8015325e +804972a6 +8006112c +804787c6 +80132546 +80132546 +801e436e +8018407a +80506982 +800e1c3e +800d225e +804d6f9e +807c9bbe +804787c6 +8005123e +8005123e +80132546 +80132546 +80132546 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +80214a86 +800a101a +801b4a98 +804972a6 +8033659c +8033659c +800a142a +8015325e +80182d4c +8015386c +807c7f84 +80214a86 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +80040b24 +80040b24 +80486570 +804e616c +80030508 +800a1730 +80072560 +8005102e +8005102e +80212426 +80426ea6 +801f345c +8008101e +800b1c3c +80264e88 +8005102e +80152748 +8016284e +800a1730 +8008101e +80072560 +80191718 +80152748 +80233654 +800a2458 +80040812 +80050c20 +800b1f44 +80305a92 +80162f5c +806187b2 +80050c20 +800a2458 +80040812 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80212426 +8005102e +80313336 +801b3e74 +800b1c3c +8005102e +80000314 +803f2f1a +80050c20 +80071126 +8005102e +80050c20 +80313336 +80000314 +806d96bc +800a1730 +80313336 +806081a8 +80132546 +80132546 +800d225e +80040b24 +80283e60 +8021447a +8021447a +8006112c +800e1c3e +800d225e +800d225e +8006112c +804e616c +800e1c3e +800e1c3e +80214a86 +804787c6 +80102e90 +803b67a8 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +80182d4c +8005123e +804787c6 +80030718 +80132546 +8006112c +800e1c3e +8015316c +800d225e +8015316c +8006112c +804e616c +8006112c +80486570 +80132546 +807c7f84 +8015325e +804972a6 +806081a8 +80102e90 +80132546 +80132546 +801e436e +8018407a +80506982 +804972a6 +8015325e +80a4afb4 +80001778 +80132546 +8005123e +8005123e +8005123e +8005123e +8005123e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +804972a6 +8033659c +800a142a +8015325e +80182d4c +8015386c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +800e1c3e +8005123e +8005123e +80031d66 +80243f6e +80204b74 +807797bc +80122148 +80204b74 +80070c14 +80183b62 +8023538a +80040812 +804c647c +80264e88 +80152542 +80000000 +80030508 +800a2458 +80030508 +80507798 +8008101e +80111c32 +801f3b62 +80244882 +80646768 +80426ea6 +8024477a +80172334 +80264e88 +80040812 +8005102e +800a2458 +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8093b1d2 +8030537e +80416a98 +80050c20 +80040812 +8006143a +8013336a +80000000 +80152542 +80243f74 +80233654 +80061744 +80000314 +80121b28 +80000314 +8008101e +800b1c3c +806690be +800a142a +800e1c3e +800e1c3e +8015316c +80132546 +80132546 +80486570 +80040b24 +804787c6 +8021447a +8006112c +8006112c +8005123e +800d225e +80040b24 +8006112c +800e1c3e +800e1c3e +806081a8 +800e1c3e +804787c6 +80102e90 +803b67a8 +80132546 +80132546 +80132546 +8005123e +804787c6 +80030718 +800e1c3e +8006112c +800e1c3e +804972a6 +800d225e +8015316c +800d225e +804e616c +8006112c +80040b24 +80132546 +807c7f84 +8015325e +801b4a98 +806081a8 +80102e90 +80132546 +80132546 +80040b24 +8005123e +80040b24 +804972a6 +8015325e +80a4afb4 +80001778 +80050c20 +80050c20 +80050c20 +80050c20 +804e616c +804e616c +804e616c +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +80486570 +804787c6 +800e1c3e +806081a8 +8006112c +800a101a +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +80182d4c +80182d4c +8015386c +807c7f84 +80214a86 +80132546 +80132546 +80030508 +80264570 +801f3568 +80030508 +80000000 +80191718 +8093b1d2 +800b1f44 +80182b44 +800a2458 +80050c20 +803a5d88 +80313336 +80030508 +80030508 +800c1626 +80050c20 +80000314 +80566d82 +804e6e98 +800a1730 +8023538a +80040812 +80070c14 +803e4550 +80507798 +80212c3c +800b1c3c +80191718 +80000000 +804e6e98 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80041b52 +8093b1d2 +80071126 +80416a98 +8005102e +80050c20 +80050c20 +80244882 +8005102e +8024639c +80050c20 +80050c20 +80050c20 +80070c14 +80030508 +800c0e12 +80070c14 +80132546 +804972a6 +8015325e +800a142a +800e1c3e +800e1c3e +804787c6 +80132546 +80486570 +80486570 +80283e60 +804787c6 +804e616c +804e616c +8006112c +8005123e +80486570 +8015316c +8006112c +8005123e +8006112c +806081a8 +800e1c3e +804787c6 +80132546 +80030718 +804787c6 +80040b24 +800e1c3e +8006112c +801e335e +804972a6 +800d225e +8005123e +800d225e +806a7678 +804e616c +80040b24 +80132546 +8015386c +800a142a +801b4a98 +806081a8 +80102e90 +800e1c3e +80132546 +80040b24 +8005123e +80040b24 +8015316c +8015325e +80191718 +80191718 +80191718 +80191718 +8048494c +8048494c +8048494c +8048494c +8005123e +8005123e +8005123e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +804e616c +8006112c +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +8006112c +8006112c +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +8015325e +80182d4c +8015386c +80264e88 +80030508 +80030508 +8005102e +80000314 +80313336 +80000314 +800b1c3c +80244882 +80030508 +80000314 +800b1f44 +8005102e +8005102e +80050c20 +80040812 +8005102e +80050c20 +801f345c +80050c20 +80070c14 +8005102e +80244882 +800b1f44 +8005102e +80426ea6 +8030537e +80050c20 +80008598 +80243f6e +80050c20 +8044719c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a2458 +80244882 +80313336 +8019467a +80071126 +80313336 +800a1730 +800a2458 +80040812 +80030508 +80030508 +8004266a +80000314 +80050c20 +80061744 +8005194c +8008101e +8023527e +800e1c3e +801e335e +80132546 +80132546 +80a3abae +8015325e +806081a8 +806081a8 +804787c6 +804787c6 +80132546 +80486570 +80283e60 +80283e60 +804e616c +804e616c +8006112c +800e1c3e +8005123e +8015316c +8015316c +801b4a98 +8015386c +8000041c +80030718 +804787c6 +80040b24 +800e1c3e +806081a8 +801e335e +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +800a142a +800a101a +800e1c3e +803b67a8 +800e1c3e +80132546 +8005123e +8015316c +8015316c +8015316c +80a3abae +80264e7e +80264e7e +80264e7e +80264e7e +80264e7e +80152542 +80152542 +80152542 +80152542 +8005102e +8015316c +804e616c +804e616c +804e616c +804e616c +804e616c +806a7678 +804e616c +806a7678 +806a7678 +804e616c +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +806a7678 +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +8033659c +800a142a +8015325e +80050c20 +8005102e +80000314 +8005102e +80152542 +80414444 +80566d82 +80061744 +80050c20 +80414444 +8005102e +80313336 +80050c20 +80313336 +80050c20 +800b1c3c +8093b1d2 +80152542 +80050c20 +80006392 +80071126 +80050c20 +8093b1d2 +800a2458 +8004266a +80000314 +80000314 +803e4550 +800a224c +8005102e +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +806d96bc +80172334 +80313336 +801f345c +800a2458 +80050c20 +8005102e +80030508 +80061744 +80121b28 +80313336 +80000314 +80000314 +8004266a +80212426 +803e4550 +800b1f44 +80182d4c +806081a8 +801e335e +800e1c3e +801f396c +80132546 +80a3abae +80a3abae +800a142a +806081a8 +806081a8 +806081a8 +80132546 +80132546 +800d225e +80040b24 +80283e60 +8021447a +804e616c +8006112c +800e1c3e +800d225e +8000041c +80030718 +80040b24 +80040b24 +800e1c3e +806081a8 +80182d4c +800e1c3e +804787c6 +8005123e +8015325e +806a7678 +804e616c +8005123e +80132546 +8015386c +8033659c +800a101a +800e1c3e +803b67a8 +800e1c3e +80182d4c +8005123e +8015316c +801f396c +80132546 +80132546 +80040b24 +80040b24 +80031b58 +80031b58 +80031b58 +80031b58 +80163162 +80163162 +80163162 +80163162 +80163162 +8006112c +800d225e +800d225e +800d225e +800d225e +800d225e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +8015325e +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +806081a8 +806081a8 +8006112c +800a101a +801b4a98 +804972a6 +8048494c +800b1f44 +80000314 +80000000 +80000000 +80050c20 +80111c32 +80030508 +80070c14 +80070c14 +80040812 +80050c20 +80030508 +800a2458 +80313336 +80050c20 +80061744 +800b1c3c +8093b1d2 +800b1c3c +800a1730 +80000314 +80050c20 +80061744 +801c2c50 +80243b60 +80030508 +80334b60 +80174784 +80313336 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +800b1f44 +803b6492 +80050c20 +80111c32 +80000000 +80233654 +80030508 +80172334 +800000a8 +8005194c +80313336 +805d81a4 +807797bc +8022417a +8004266a +803e4550 +8005194c +800e1c3e +80132546 +8006112c +80182d4c +801e335e +801e335e +80132546 +801f396c +800d225e +80a3abae +800a142a +800a142a +804787c6 +806081a8 +8005123e +80132546 +80132546 +80040b24 +80040b24 +804787c6 +8021447a +8006112c +8006112c +8005123e +8005123e +800e1c3e +806081a8 +80182d4c +800e1c3e +80182d4c +8005123e +8015325e +8005123e +804e616c +8005123e +80214a86 +80182d4c +8033659c +800a101a +804787c6 +80132546 +800e1c3e +80182d4c +804972a6 +80a3abae +80182d4c +80182d4c +800e1c3e +800e1c3e +80132546 +80182d4c +801e436e +80204b74 +80204b74 +80204b74 +80204b74 +80152748 +80152748 +80152748 +80152748 +8006528a +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +800e1c3e +800e1c3e +806081a8 +8006112c +80313336 +80313336 +80000314 +8005102e +80313336 +80313336 +80243f74 +80384d76 +80264164 +801c2c50 +80243f74 +80243b60 +8005102e +802d487e +80426ea6 +800b1c3c +80050c20 +80030508 +80070c14 +80152542 +800c0e12 +8093b1d2 +80040812 +80030508 +80264b72 +80414444 +80072560 +80000314 +8005102e +80313336 +80061744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000041c +80050c20 +80061744 +801f345c +80000314 +80313336 +80001164 +80122354 +80191718 +80313336 +80121b28 +800a2458 +80243f6e +80040812 +80172334 +8050718a +8044719c +800d141e +801f345c +8006112c +80040b24 +800e1c3e +800e1c3e +80132546 +8006112c +80030718 +801e335e +80132546 +80132546 +80132546 +800d225e +800e1c3e +8015325e +804787c6 +800e1c3e +806081a8 +80132546 +80132546 +80486570 +80040b24 +804787c6 +804787c6 +804e616c +8006112c +804e616c +80182d4c +800e1c3e +80182d4c +8005123e +8015316c +8005123e +804e616c +800e1c3e +80214a86 +80182d4c +804972a6 +8006112c +804787c6 +80132546 +800a101a +80435a74 +806081a8 +8006112c +804972a6 +804972a6 +804972a6 +8022619e +8022619e +800e1c3e +800e1c3e +80132546 +80182d4c +80111520 +80111520 +80111520 +800a1730 +800a1730 +800a1730 +800a1730 +8016284e +8016284e +804787c6 +804787c6 +804787c6 +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +80182d4c +8015316c +80182d4c +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80102e90 +804787c6 +804787c6 +80313336 +8005102e +8005194c +80040812 +80384d76 +80061744 +8048494c +80061744 +800b1f44 +800b1f44 +80152542 +80152542 +80050c20 +800a1730 +80050c20 +8005102e +80040812 +80030508 +8023527e +8093b1d2 +80072560 +80204b74 +80243f6e +801f345c +80262726 +80262726 +80006392 +80414444 +80264570 +80395486 +801f345c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80071126 +803e4550 +80061744 +80000314 +80000314 +80050c20 +800b1f44 +80050c20 +80000000 +80152542 +80061744 +80313336 +8005102e +80050c20 +80050c20 +803a3f44 +80313336 +8005102e +8005123e +8005123e +8005123e +8005123e +8006112c +80040b24 +800e1c3e +80132546 +80132546 +80182d4c +80030718 +800e1c3e +80132546 +80182d4c +80132546 +800d225e +8015325e +8015325e +806081a8 +800e1c3e +804787c6 +804787c6 +80132546 +80486570 +8015325e +80283e60 +804e616c +804e616c +8006112c +8006112c +8015316c +8006112c +80486570 +800e1c3e +807c7f84 +8015325e +804972a6 +8006112c +80a3abae +80182d4c +8015325e +800a142a +8021447a +801b4a98 +801f396c +80435a74 +8006112c +8006112c +800e1b30 +800e1b30 +803b67a8 +8022619e +80132546 +800e1c3e +800e1c3e +80183b62 +80183b62 +806187b2 +806187b2 +806187b2 +806187b2 +806187b2 +804f7da8 +804f7da8 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +800d225e +801e436e +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80132546 +80132546 +803b67a8 +80344a56 +80174784 +800c1626 +801f5b8e +80313336 +803a5d88 +800c1626 +80646768 +8005102e +8004266a +803b6492 +800b1f44 +80313336 +8023527e +80313336 +80484646 +80050c20 +80000314 +80000314 +800a1730 +80646768 +800b1f44 +80204b74 +8005102e +80050c20 +80484646 +80030508 +80181a22 +8005194c +80061744 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8015386c +80050c20 +80000000 +80000314 +80030508 +801c2c50 +80253444 +80050c20 +8005102e +80050c20 +80122354 +80121b28 +8005194c +80000314 +80000314 +80000314 +80030508 +80050c20 +8000041c +80132546 +800e1c3e +801e335e +8015316c +804972a6 +800e1c3e +800e1c3e +800d225e +804787c6 +80182d4c +8005123e +80182d4c +806081a8 +800e1c3e +80132546 +80132546 +80132546 +80a3abae +8015325e +806081a8 +806081a8 +806081a8 +804787c6 +8005123e +80132546 +800d225e +80283e60 +804e616c +8021447a +8006112c +80486570 +80132546 +807c7f84 +8015325e +8006112c +804e616c +80132546 +800e1c3e +80214a86 +80a3abae +8015386c +8015325e +8015325e +80132546 +8021447a +801f396c +801f396c +804972a6 +804972a6 +800e1c3e +800e1b30 +80102e90 +80a3abae +80132546 +80182d4c +801b3e74 +801b3e74 +80006398 +80006398 +80006398 +80006398 +80203562 +80203562 +80203562 +80182d4c +8015316c +8015316c +8015316c +8015316c +8015316c +804972a6 +8015316c +8015316c +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +804972a6 +8005123e +80040b24 +801e436e +80182d4c +80132546 +80132546 +80132546 +800e1c3e +800e1c3e +80313336 +8004266a +80212426 +800a224c +80384d76 +8005102e +80384d76 +80061744 +80041b52 +800b1c3c +8005102e +80313336 +80000314 +80244882 +8005102e +80313336 +80050c20 +80071126 +80050c20 +800b1f44 +80061744 +8005102e +800a1730 +8005194c +80384d76 +803e4550 +801f3b62 +8005194c +80174784 +8005102e +8005194c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80030508 +80000314 +80030508 +8013336a +8013336a +800b1f44 +80152542 +80122354 +800b1c3c +80071126 +80030508 +80243f74 +80040812 +8005102e +80030508 +80061744 +80000314 +8003050a +800e1c3e +8006112c +806081a8 +80132546 +801e335e +80182d4c +8015316c +804972a6 +800e1c3e +800e1c3e +804787c6 +80132546 +80050b16 +8006112c +8005123e +800d225e +80040b24 +8000041c +8005123e +80030718 +80132546 +800e1c3e +800e1c3e +80182d4c +806081a8 +8005123e +80132546 +80132546 +80040b24 +80283e60 +8021447a +8021447a +8006112c +800e1c3e +8005123e +800d225e +80040b24 +8006112c +800e1c3e +800e1c3e +80132546 +80202f30 +80202f30 +8015325e +8015325e +80132546 +80132546 +804972a6 +80397aa8 +800a101a +804972a6 +806081a8 +804972a6 +804787c6 +804972a6 +80132546 +80031b58 +80050c20 +80050c20 +80050c20 +80050c20 +8048494c +8048494c +8048494c +80132546 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +8005123e +8018407a +8005123e +80040b24 +801e436e +80182d4c +80182d4c +80132546 +8005102e +801f4d7e +80040812 +800c0e12 +80040812 +80050c20 +80212c3c +80414444 +800b1c3c +800d141e +8008101e +80426ea6 +800a1730 +80040812 +80050c20 +80000314 +80050c20 +800a1730 +8005194c +80061744 +800b1c3c +80041b52 +80041b52 +80212426 +80050c20 +800b1c3c +801f5b8e +800a224c +802e456a +800a224c +80031b58 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800e1c3e +80030508 +80070c14 +80426ea6 +800a2458 +8013336a +8013336a +80305a92 +80243b60 +80061744 +80163f82 +8005102e +80030508 +8005102e +80000314 +800b1c3c +802d487e +80243f6e +8005123e +80132546 +800e1c3e +800e1c3e +800e1c3e +8006112c +80132546 +800e1c3e +801e335e +80182d4c +8015316c +80132546 +80050b16 +800e1c3e +8005123e +8015386c +80040b24 +8005123e +8005123e +80030718 +80132546 +8006112c +800e1c3e +804972a6 +800d225e +8005123e +800d225e +804e616c +804e616c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +804e616c +8005123e +80486570 +8006112c +8005123e +8005123e +8005123e +8005123e +80202f30 +8015325e +8015325e +8015325e +8015325e +8033659c +80397aa8 +801b4a98 +80435a74 +806081a8 +8006112c +804972a6 +800e1b30 +806d96bc +806d96bc +806d96bc +806d96bc +806d96bc +8004266a +8004266a +8004266a +8006112c +8006112c +8006112c +8006112c +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +806081a8 +80132546 +80132546 +80132546 +80132546 +80132546 +80506982 +8015316c +8005123e +8018407a +8005123e +80040b24 +8016284e +80000314 +80050c20 +8005102e +80061744 +8044719c +8024648a +8016284e +8087abc6 +806690be +8093b1d2 +80264e7e +80416a98 +80244080 +80416a98 +80001164 +80313336 +80426ea6 +80030508 +80030508 +80000314 +8006143a +80152542 +80172334 +802b2e32 +80050c20 +80313336 +800b1f44 +80061744 +800b1c3c +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +80111c32 +80414444 +800a2458 +80152542 +80152748 +80426ea6 +80264b72 +800b1c3c +80204b74 +803a5d88 +80235590 +80050c20 +80416a98 +801b3e74 +8004266a +80212426 +80061744 +80040b24 +80030718 +80040b24 +8005123e +80132546 +800e1c3e +800e1c3e +8006112c +806081a8 +804787c6 +80040b24 +80050b16 +800e1c3e +8005123e +8015386c +80132546 +8005123e +804787c6 +80030718 +800e1c3e +8006112c +801e335e +804972a6 +804787c6 +8005123e +800d225e +806a7678 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +807c7f84 +80a3abae +80182d4c +8015325e +800a142a +8021447a +801b4a98 +801f396c +80435a74 +804972a6 +8006112c +800e1c3e +800e1b30 +803b67a8 +80456a86 +80214062 +80214062 +80214062 +80214062 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040b24 +80506982 +8015316c +8005123e +8048494c +80061744 +8005194c +803b6492 +80050c20 +80191718 +80031d66 +803a5d88 +80384d76 +80212426 +800b1f44 +8005102e +803e4550 +8004266a +8023538a +801f3b62 +8005102e +80050c20 +80050c20 +80000314 +804376a8 +80264164 +806187b2 +80122354 +8023527e +80243f6e +80416a98 +80050c20 +80040812 +80040812 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804e616c +8022417a +80426ea6 +80264b72 +80212c3c +802d487e +80030508 +80152748 +80030508 +80040812 +800a1730 +80121b28 +8005102e +80000314 +80212426 +80050c20 +80031b58 +8093b1d2 +8005123e +804787c6 +80040b24 +80040b24 +80030718 +8005123e +80132546 +8006112c +804787c6 +80040b24 +80121416 +800e1c3e +8006112c +8015386c +80132546 +8005123e +804787c6 +80040b24 +800e1c3e +8006112c +801e335e +800e1c3e +804787c6 +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +804972a6 +800e1c3e +804972a6 +80102e90 +804972a6 +80132546 +80182d4c +800e1c3e +80040b24 +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80132546 +8005123e +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +8015316c +8015316c +80040b24 +8004266a +800a2458 +8005102e +80313336 +80030508 +800b1c3c +8019467a +8005102e +80281d10 +800b1c3c +8006528a +80646768 +80000000 +8004266a +80163f82 +80040812 +803a3f44 +80030508 +80030508 +80050c20 +80050c20 +8005102e +801f4f8a +80245b7e +80071126 +80204b74 +8048494c +80264b72 +800a2458 +8005102e +80313336 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80000314 +80050c20 +80040812 +80050c20 +80040812 +8008101e +80050c20 +801f345c +80006392 +804e6e98 +80384d76 +8013336a +80000000 +80070c14 +80040812 +80030508 +80000314 +8000041c +80030718 +8005123e +8005123e +804787c6 +802d529c +8006112c +804787c6 +80040b24 +80121416 +800e1c3e +8006112c +8015386c +80132546 +80030718 +804787c6 +80040b24 +800e1c3e +806081a8 +801e335e +800e1c3e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80040b24 +800a1730 +800a1730 +800a1730 +80061744 +80061744 +80061744 +800b1f44 +800b1f44 +80040b24 +80040b24 +80040b24 +80040b24 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +804972a6 +800e1c3e +80121b28 +800e5b8c +8005102e +800a1730 +8019467a +80a1c1dc +80313336 +80226392 +80456f8a +80050c20 +803e4550 +8093b1d2 +80050c20 +80313336 +80050c20 +80395778 +80313336 +8005102e +80030508 +80050c20 +80313336 +80000314 +804f7da8 +80030508 +8024648a +80191718 +80050c20 +80414444 +80006392 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80283e60 +80002772 +80030508 +80000000 +800a2458 +80040812 +80030508 +800b1c3c +80152542 +800a2458 +80000314 +80001164 +80313336 +8023538a +800b1c3c +801b3e74 +8023527e +801b3e74 +80040b24 +8000041c +8000041c +80040b24 +802d529c +8006112c +800e1c3e +80040b24 +80121416 +800e1c3e +8006112c +8015386c +8000041c +80030718 +80040b24 +80040b24 +800e1c3e +806081a8 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000010c +80000000 +80000000 +8005102e +8005102e +800b1c3c +800b1c3c +800b1c3c +8005102e +8005102e +8005123e +8005123e +8005123e +8005123e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +80040b24 +804787c6 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +800d225e +80050c20 +80152542 +80646768 +80040812 +80000000 +804f6b86 +80040812 +80646768 +8008101e +80000314 +80030508 +8092a4b4 +80050c20 +80050c20 +8023527e +801d3248 +80313336 +80313336 +8005102e +80000314 +80071126 +80000314 +806187b2 +80000314 +8048494c +80212426 +80030508 +80050c20 +800b1c3c +80313336 +80212426 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005102e +80000000 +80030508 +80000000 +80030508 +80050c20 +80050c20 +80000314 +8013336a +80040812 +80484646 +80264e7e +80264e88 +80646768 +80050c20 +80384d76 +8092a4b4 +80040812 +8015386c +800d225e +80040b24 +8021447a +8006112c +800e1c3e +804e616c +80121416 +800e1c3e +8050697c +8015386c +8000041c +80030718 +80040b24 +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +800a2458 +80000314 +80000314 +80000314 +8005102e +8005102e +8005102e +8005123e +8005123e +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +80030718 +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +8005123e +80050c20 +801f345c +80646768 +80050c20 +80000314 +800a1730 +80313336 +80313336 +80191718 +800a1730 +80050c20 +8022417a +80050c20 +80121b28 +80313336 +80040812 +80030508 +80111c32 +80030508 +80030508 +800a2458 +806187b2 +8023538a +80001164 +8093b1d2 +80172334 +80041b52 +80111c32 +80070c14 +80050c20 +800a1730 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804787c6 +80030508 +80233654 +80050c20 +80304f74 +80000000 +801f345c +80000000 +80304f74 +80001b60 +805a544a +8006143a +80040812 +80070c14 +800a2458 +80050c20 +80000314 +80000314 +8006112c +80040b24 +8021447a +80283e60 +800e1c3e +804e616c +800e1c3e +800e1c3e +8050697c +800d225e +8000041c +8005123e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80050c20 +80006392 +80006392 +80006392 +80006392 +80006392 +800a2458 +80132546 +80132546 +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8000041c +8005123e +8005123e +8005123e +8005123e +80000314 +8005102e +800a224c +80000314 +80000314 +80030508 +80212426 +8005102e +80000314 +80050c20 +80061744 +800a2458 +80050c20 +80050c20 +80244080 +80244080 +8005102e +80071126 +800a2458 +80050c20 +800a1730 +80313336 +80646768 +80050c20 +804f6b86 +800d141e +80070c14 +8024477a +80050c20 +800a2458 +80214062 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +8005102e +803b6492 +800a2458 +80000314 +80050c20 +80000000 +80050c20 +80050c20 +800b1c3c +800b1c3c +800a1730 +80152542 +800a2458 +80334452 +80001f6e +80214062 +802b3744 +80040812 +80040b24 +8021447a +80283e60 +8006112c +804e616c +800e1c3e +80040b24 +8050697c +800d225e +800a142a +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80000000 +80000000 +8000010c +80050c20 +80050c20 +80050c20 +8005102e +8005102e +80050c20 +80050c20 +800d225e +800d225e +800d225e +800d225e +800d225e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80243b60 +803e4550 +80030508 +80061744 +80000000 +800b1f44 +80000314 +8005102e +80000314 +8005102e +80313336 +80050c20 +803b6492 +80000000 +8005102e +803e4550 +80121b28 +80313336 +80313336 +80050c20 +80050c20 +80050c20 +80050c20 +80313336 +80061744 +80050c20 +80050c20 +8005102e +800b1f44 +80040812 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +800a1730 +801c2c50 +80313336 +801f366e +80000314 +80000314 +80030508 +800a1730 +80000314 +80000314 +80414444 +80000314 +80152542 +80050c20 +8005194c +800a1730 +803f2f1a +800e1c3e +8005123e +80283e60 +8006112c +80335372 +800e1c3e +80040b24 +8006112c +8015386c +8005123e +80040b24 +80000000 +8000041c +80000000 +80000000 +8003050a +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +8003050a +80000000 +80000000 +80000000 +80000000 +80000314 +80000314 +80000314 +80000314 +80000314 +80000314 +800d225e +800d225e +800d225e +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +8015386c +80061744 +80040812 +80050c20 +80050c20 +80000000 +80000000 +80050c20 +80313c48 +80000314 +80313336 +800a1730 +8093b1d2 +80001164 +8005102e +8005102e +80384d76 +800b1c3c +80000314 +800a2458 +80050c20 +80030508 +80000314 +80000314 +80030508 +80050c20 +800b1f44 +800a2458 +80313336 +8005102e +80313336 +800a2458 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80172334 +8008101e +805f7184 +800a1730 +80204572 +80030508 +80000000 +80000314 +800b1c3c +80000314 +8005102e +80050c20 +80050c20 +80313336 +80000314 +80000314 +80264e88 +8006112c +80283e60 +8006112c +80335372 +8006112c +803a628c +8015386c +80040b24 +8005123e +8000041c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +80000000 +80000000 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80040812 +80000314 +80000314 +8005102e +8005102e +8005102e +8005123e +8005123e +8005123e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +8050697c +800d225e +800d225e +80050c20 +800b1f44 +80000000 +80313336 +80000000 +80006392 +80061744 +802f445e +80182b44 +80566d82 +800c101c +803e4550 +801c2c50 +80070c14 +803b6492 +80050c20 +80000000 +8005102e +80050c20 +80040812 +80050c20 +8005194c +80050c20 +800b1f44 +80384d76 +80050c20 +8005102e +80000314 +8005102e +80313336 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80132546 +80233654 +80000314 +800a1730 +8005102e +8005102e +80000314 +800a2458 +8013336a +80253444 +80030508 +80000000 +8024477a +80305786 +80304f74 +803f2f1a +800a1730 +803f2f1a +800e1c3e +8006112c +801e3b60 +804972a6 +801e3b60 +80346078 +802f445e +80486e8e +8034788a +801e3b60 +8015325e +80476a78 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8006112c +80000000 +8000010c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80040812 +800a1730 +800a1730 +800a1730 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +8005123e +8005123e +8005123e +8005123e +80000314 +8023527e +80000000 +8005102e +801f345c +80050c20 +800a1730 +80172334 +80111c32 +8005102e +801f3b62 +80313336 +8005102e +800a2458 +803a3f44 +800b1f44 +8016284e +80212426 +80163f82 +800b1f44 +80243b60 +80050c20 +80030508 +80313336 +80000314 +80000000 +80313336 +80050c20 +80000000 +80000000 +80041b52 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80040812 +800b1c3c +80426ea6 +80204572 +80426ea6 +80050c20 +803b6492 +80152748 +80000000 +8024477a +8008101e +80111c32 +802e4c84 +800a1730 +8008101e +800d141e +8004266a +80132546 +80040b24 +8000010c +802e3e46 +802d67b4 +80040b24 +8006112c +800e1c3e +8005123e +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +80040b24 +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80495156 +80495156 +8093b1d2 +8093b1d2 +8093b1d2 +80040812 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +80040812 +80030508 +80050c20 +80030508 +80050c20 +80000000 +8013336a +800a2458 +801f345c +8013336a +80152542 +80233654 +80214062 +80313336 +8004266a +800c1626 +80121b28 +803a3f44 +80313336 +8005102e +80071126 +80050c20 +803e4550 +800a2458 +80000314 +800a1730 +802e4c84 +80183b62 +8092a4b4 +8008101e +80384d76 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006112c +802f445e +80000000 +8008101e +803f5684 +80243f74 +80212c3c +80505b66 +804c647c +80030508 +80000000 +80072560 +80050c20 +802d487e +80000314 +8005102e +80000314 +80000314 +8015325e +8005123e +8046638a +8005123e +800d225e +803a628c +8005123e +8000041c +8005123e +8000010c +80486e8e +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030718 +8000041c +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001164 +80001164 +80001164 +80061744 +80061744 +80335372 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80050b16 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +80121416 +800e1c3e +80313336 +80182b44 +80050c20 +80233654 +80414444 +80070c14 +80646768 +80214062 +80233654 +80152748 +800a2458 +80152748 +8030537e +8004266a +80646768 +80212426 +80384d76 +80384d76 +80061744 +80031b58 +8005194c +80121b28 +80050c20 +80000314 +80384d76 +80313336 +800a1730 +80384d76 +8005102e +8005102e +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000314 +8008101e +802f445e +80233654 +80233654 +8024477a +80172334 +80607a94 +80000000 +80182b44 +80082464 +8024477a +800b1c3c +80000314 +80030508 +80000314 +80000000 +80040b24 +80040b24 +802f445e +800d225e +800d225e +8006112c +8015325e +80040b24 +80132030 +8000041c +800e1b30 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80313336 +80050c20 +80050c20 +80132546 +80132546 +80040b24 +80040b24 +80040b24 +80040b24 +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +804e616c +80335372 +80335372 +80335372 +80111c32 +800a1730 +80313c48 +80072560 +80152542 +80253444 +80172334 +80172334 +80030508 +800b1c3c +80414444 +80172334 +80040812 +800a2452 +800a2458 +80244882 +8005102e +800a1730 +80000314 +80001164 +80000314 +80121b28 +80061744 +8005102e +80245b7e +801b3e74 +80262726 +8005102e +8005194c +80001164 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000010c +800b1c3c +80070c14 +80233654 +801c2c50 +800b1f44 +80646768 +804c647c +801c2c50 +80152542 +80384d76 +80152542 +80041b52 +80152542 +80214062 +80384d76 +80000314 +803f2f1a +80000000 +8003050a +804d6f9e +80335372 +80000000 +80000000 +80577ca2 +8006112c +80030718 +800e1c3e +80182d4c +80040b24 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +800b1f44 +800b1f44 +80061744 +800e1c3e +800e1c3e +800e1c3e +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80163162 +80030508 +80000314 +8023527e +80050c20 +8016284e +80040812 +80152748 +80414444 +80414444 +80264b72 +8004266a +80182b44 +80243f74 +80030508 +80070c14 +802f445e +80050c20 +80000314 +80426ea6 +800a1730 +80000314 +80002772 +803d4e68 +80050c20 +8005102e +80313336 +803a3f44 +80050c20 +80030508 +80496590 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80050c20 +80040812 +805a544a +80204572 +80000314 +80505b66 +80172334 +800b1f44 +80313336 +800b1c3c +80001164 +80212426 +80000314 +8005194c +80476a78 +8002618e +8028497c +800a142a +800e1b30 +8005123e +8015325e +800e1c3e +80476a78 +8000010c +8006112c +80000000 +80000000 +8000010c +8000010c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80174b70 +80174b70 +80174b70 +80000314 +80283e60 +80283e60 +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +800e1c3e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +8005102e +80050c20 +80050c20 +800b1c3c +80313336 +80000000 +8005102e +80030508 +80030508 +800a2458 +8093b1d2 +800a1730 +800a1730 +805d81a4 +80414444 +801f345c +80050c20 +80313336 +80566d82 +80191718 +805d81a4 +803a5d88 +80152542 +80313336 +80030508 +80070c14 +8013336a +80040812 +80040812 +80313336 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8000041c +80040812 +80030508 +80030508 +80152542 +800d141e +80233654 +80426ea6 +803e4550 +80212c3c +80455c78 +800a2458 +80050c20 +80313336 +8005102e +803b6492 +80646768 +800b1c3c +80040b24 +80050b16 +80001778 +80476a78 +80050b16 +8000010c +8000041c +8006112c +8006112c +8006112c +8000041c +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8005194c +8005194c +8004266a +8004266a +8005123e +80030718 +80030718 +80030718 +80030718 +80030718 +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +80040812 +800b1f44 +80313336 +80030508 +80000000 +80030508 +80000314 +8008101e +8005102e +80030508 +80414444 +800a2458 +80030508 +801f366e +801c2c50 +80000314 +80253444 +80000314 +800a1730 +8023538a +80001164 +803d4e68 +800b1c3c +8023538a +8048494c +8005102e +80334b60 +8004266a +80384d76 +8005102e +80111c32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313c48 +800c0e12 +80030508 +80030508 +80040812 +80040812 +800a2452 +80172334 +80030508 +80485364 +80111520 +805a544a +80485364 +802b2e32 +80313336 +80040812 +80040812 +80313336 +8000010c +80000000 +80000000 +8000010c +80000000 +8005123e +8000041c +8000010c +8000010c +80132030 +80000000 +80000000 +80000000 +80000000 +8003050a +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80030508 +80030508 +80030508 +802d529c +802d529c +802d529c +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8021447a +8005123e +8005123e +800b1f44 +80040812 +80070c14 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +800a2458 +80030508 +80040812 +80030508 +80000000 +80313336 +80030508 +80040812 +80030508 +80334b60 +800a2458 +8004266a +80191718 +800b1f44 +80395778 +80426ea6 +8030537e +803b6492 +8030537e +80313336 +80313336 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80383a3a +80001f6e +80030508 +80030508 +80040812 +80000000 +800c0e12 +800c0e12 +800d141e +80030508 +80001f6e +80313c48 +802b2e32 +800d141e +802b3744 +80111520 +80111314 +80131920 +80313c48 +80030718 +801e282c +8003050a +80121416 +80000000 +80050b16 +801a1b1c +80121416 +800e1626 +800f1b28 +8003050a +80121416 +8003050a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80030508 +80030508 +80040b24 +80040b24 +801e335e +801e335e +801e335e +801e335e +801e335e +801e335e +804787c6 +804787c6 +804787c6 +804787c6 +804787c6 +8005194c +80000314 +80050c20 +80050c20 +80040812 +804376a8 +80577294 +80111c32 +80000314 +80000000 +80030508 +80040812 +80070c14 +80030508 +80111c32 +80244882 +80152542 +800a2458 +80070c14 +800a2458 +80384d76 +80000314 +80152748 +8005102e +800b1c3c +8004266a +803b6492 +80191718 +80050c20 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +803f5684 +80070c14 +800e5bae +802b2e32 +800c0e12 +800c101c +802b2e32 +802b3744 +80030508 +800c0e12 +800c101c +802b3744 +80313c48 +800c0e12 +80111520 +805a544a +80142856 +80383a3a +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +8005102e +8005102e +8006112c +80182d4c +80182d4c +80182d4c +80182d4c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80000314 +800b1f44 +80000314 +80072560 +8005102e +80050c20 +8024477a +80000314 +80000314 +80000000 +80030508 +80050c20 +80000000 +80000000 +801f345c +80070c14 +80485364 +80162f5c +800d141e +80040812 +80030508 +80111314 +80000314 +80070c14 +80040812 +80050c20 +80414444 +80050c20 +800a1730 +80040812 +8005102e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801b1e20 +80201f20 +805a544a +80183e7a +800c101c +80172334 +80111314 +80485364 +80111314 +8013336a +80253444 +801a2028 +80111314 +80111520 +802b3744 +80212c3c +80456a86 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +804c647c +804c647c +804c647c +800a142a +800a142a +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8006112c +8005102e +80030508 +80061744 +800a2458 +801c2c50 +800a2458 +80030508 +80313336 +80050c20 +80000000 +80050c20 +8005102e +80000314 +80050c20 +8013336a +8023527e +80050c20 +800a1730 +80070c14 +80000314 +80152542 +80072560 +80070c14 +80334452 +80172334 +80111520 +8024477a +80646768 +80000314 +80111c32 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8006143a +80111520 +801b1e20 +80383a3a +80172334 +801a2028 +800c101c +80142856 +801a2028 +80172334 +80111520 +80111520 +800d141e +802b2e32 +80082464 +80172334 +80253444 +802b3744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +802d67b4 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80476a78 +80132546 +80132546 +80132546 +80313336 +80000314 +80050c20 +80050c20 +80000314 +80050c20 +800b1c3c +80061744 +80000314 +80000314 +80000000 +80061744 +8005102e +80000000 +80000314 +80313336 +8005102e +80050c20 +80000314 +80050c20 +80384d76 +80050c20 +800016a8 +800b1c3c +80395486 +80152542 +80414444 +801f345c +800b1c3c +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80111314 +80252424 +800a2452 +8059636a +802b2e32 +80313c48 +80001f6e +800c101c +8013336a +80072560 +80070c14 +80253444 +800d141e +800c101c +80070c14 +802e4c84 +80253444 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80050c20 +80152748 +800d225e +800d225e +800d225e +800d225e +80132546 +80132546 +80132546 +80132546 +80132546 +8008101e +8005102e +80495d68 +801f345c +80182b44 +80111c32 +80313336 +80305a92 +8005194c +8005102e +80000314 +80000314 +80000314 +80030508 +80000314 +8005102e +8005102e +80070c14 +80000314 +80000314 +80000314 +8016284e +800a2458 +80050c20 +80041b52 +80414444 +802d487e +80646768 +80426ea6 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80111f40 +80201f20 +8006143a +80455c78 +80212c3c +800c101c +801a2028 +80172334 +80253444 +80172334 +80182b44 +80111c32 +80070c14 +80111520 +80030508 +800a2452 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80001b60 +80040812 +80040812 +8006112c +8006112c +80132546 +80132546 +80132546 +80132546 +80132546 +80132546 +80174b70 +80000314 +8023527e +80000314 +80000314 +80000314 +80000314 +80030508 +80000314 +80030508 +80072560 +807791a6 +80182b44 +802d487e +802d487e +80001b6e +804e4e52 +8005102e +800a2458 +8005102e +8005194c +80050c20 +8005102e +8004266a +80313336 +80000314 +80000314 +80030508 +800b1c3c +80050c20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80030508 +80030508 +80111520 +80111520 +80111520 +80233654 +800c101c +80182b44 +8013336a +800c101c +800d141e +80152542 +80111520 +80001f6e +802b2e32 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8023527e +80050c20 +80313336 +80313336 +8005102e +800b1c3c +80030508 +8005123e +80040b24 +80040b24 +80040b24 +80040b24 +80040b24 +80030718 +80050c20 +800a2458 +80000314 +8005102e +80152748 +80152542 +8093b1d2 +80061744 +8005102e +80000314 +80050c20 +80000314 +80111c32 +80030508 +8008101e +80072560 +80040812 +800a2458 +800a2458 +800b1c3c +80677784 +8013336a +80264e88 +80456a86 +80072560 +80050c20 +80040812 +800a1730 +80000314 +80000314 +80000314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +80313c48 +80072560 +80313c48 +800c101c +80030508 +800c101c +80030508 +80072560 +800a1730 +800c101c +80070c14 +80152542 +800c101c +80070c14 +800c101c +80111520 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80050c20 +80050c20 +800a1730 +80414444 +8005102e +8005102e +80000000 +80000000 +80233654 +80264e88 +800a142a +800a142a +800a142a +8006112c +8006112c +8006112c +8006112c +80152542 +8005102e +80000314 +800a1730 +8004266a +8093b1d2 +80182b44 +804f6b86 +80426ea6 +80050c20 +800a2458 +80152748 +80243f74 +80152748 +80000000 +802f445e +80152542 +80000314 +80000314 +80172334 +8005194c +80050c20 +80050c20 +80001b60 +80111314 +80212c3c +80111c32 +80416380 +807791a6 +80183b62 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80070c14 +800c0e12 +800c0e12 +80030508 +800c0e12 +80001f6e +800d141e +80072560 +8013336a +80030508 +80030508 +800d141e +80313c48 +800d141e +80253444 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000314 +80000314 +80000314 +80000314 +80111c32 +80111c32 +80000314 +8005102e +80426ea6 +80426ea6 +8004266a +8004266a +8005102e +8013336a +8013336a +800e1c3e +8006112c +8006112c +8006112c +8006112c +80264e88 +80030508 +80072560 +80040812 +80000000 +80253444 +801f366e +80577294 +80172334 +80111c32 +80152542 +80030508 +80111c32 +800b1c3c +80426ea6 +801f345c +80456a86 +80000000 +80061744 +800a2458 +80000314 +802d4674 +80111c32 +800a1730 +80050c20 +80070c14 +803e4550 +80050c20 +8005102e +80000314 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +801a2028 +800d141e +800c101c +800d141e +80030508 +80030508 +80070c14 +80152542 +8013336a +80172334 +80072560 +800c101c +80030508 +80030508 +80313c48 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313336 +80313336 +80313336 +80313336 +80455c78 +80455c78 +8005102e +8005102e +80030508 +802d487e +80313336 +80313336 +80000314 +80000314 +80050c20 +80050c20 +80000000 +80000000 +8006112c +8006112c +8006112c +8006112c +80000000 +80000000 +80152542 +80000314 +8008101e +800c101c +80206398 +801f366e +80172334 +8006143a +80111520 +80628196 +80000000 +80313c48 +800c101c +80000314 +80313336 +80030508 +800a1730 +80050c20 +8005102e +80313336 +8005102e +80000314 +80000314 +801c2c50 +8005102e +8016284e +80041b52 +80414444 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +8008101e +80040812 +800d141e +801a2028 +801a2028 +80072560 +80030508 +80070c14 +80072560 +80000000 +800c101c +80070c14 +801a2028 +800c101c +800c0e12 +80111520 +801c3d6e +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80628196 +80628196 +8024477a +8024477a +80000000 +80000000 +80000000 +80000000 +80111520 +80111520 +80030508 +80030508 +800b1c3c +800b1c3c +8005102e +8005102e +8005102e +80030508 +80030508 +800a2458 +80000000 +80132546 +80132546 +8000010c +8000010c +80000314 +80050c20 +80313336 +80233654 +80030508 +80070c14 +80505b66 +802d487e +800a2458 +802e4c84 +80485364 +804f6b86 +80072560 +80426ea6 +80455c78 +80072560 +803d4e68 +800a1730 +801b1e20 +80082464 +80628196 +80000000 +80313336 +8005102e +80000314 +8005102e +80000000 +80030508 +80050c20 +800a1730 +80233654 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80212c3c +80111c32 +80111520 +80072560 +80072560 +800c101c +80050c20 +8008101e +80111c32 +80172334 +801a2028 +80313c48 +800c0e12 +80070c14 +80070c14 +802b2e32 +80133372 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80050c20 +80204572 +80001b60 +80304f74 +80304f74 +8024477a +8024477a +80152542 +80152542 +80646768 +80646768 +80030508 +80030508 +80507798 +80030508 +803b6492 +803b6492 +80152748 +80152748 +80152748 +80426ea6 +80426ea6 +80395486 +80395486 +80000000 +80476a78 +80040b24 +80040b24 +80000000 +8005102e +80000000 +80172334 +80040812 +80030508 +801c2c50 +800a1730 +80001b6e +80233654 +80455c78 +80233654 +802f445e +80233654 +801c2c50 +80182b44 +80040812 +804c647c +800b1f44 +803f2f1a +80304f74 +80152542 +80507798 +80426ea6 +80000000 +80000000 +80214062 +800d141e +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80384654 +801a1e2c +802a334a +802c3b5e +80222e4e +802c3b5e +8026272c +80101420 +801c3360 +80344a82 +801b2b40 +8052617c +801a2b48 +80394a60 +80949b96 +801a2b48 +80424b5a +801a2b48 +801a2b48 +800d0e16 +801a2b48 +80394a60 +801a2b48 +801a2b48 +801a2028 +800a1730 +8008101e +800d141e +800c101c +80040812 +8008101e +8008101e +800d141e +80030508 +80070c14 +80182b44 +80072560 +800c0e12 +80111520 +80070c14 +8006143a +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80152748 +80152748 +800b1f44 +800b1f44 +8005102e +800b1c3c +80646768 +80646768 +80071126 +80071126 +800b1f44 +800b1f44 +80334452 +80334452 +80162f5c +80162f5c +80121b28 +80000314 +80152748 +80233654 +80253444 +80253444 +80000000 +80000000 +80030508 +80030508 +80030508 +80426ea6 +800c0e12 +80476a78 +80476a78 +8013336a +80030508 +80070c14 +80030508 +80030508 +80040812 +8005102e +80000314 +80030508 +80455c78 +80253444 +802f445e +80677784 +802d487e +80000314 +80304f74 +80505b66 +804c647c +8016284e +8005102e +80646768 +800b1c3c +80000314 +80000000 +80233654 +80484646 +80182b44 +80000314 +80455c78 +80072560 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801c2422 +80181b2a +801a2b48 +80294c74 +801a2b48 +8040507a +801a2b48 +800d1218 +801b1e26 +800e1718 +801d2d4e +801a2b48 +800d0e16 +802b447a +800e1718 +8046524c +80171820 +8012141c +80151820 +801a2b48 +801a2b48 +80232e38 +801a2b48 +801a2b48 +80212836 +800e1926 +80003360 +800f1d16 +801f2938 +80141c30 +800e1718 +801f2938 +800e1718 +80003360 +80384654 +801d2d4e +8052617c +80222e4e +801d2d4e +802a334a +800e1718 +800e1718 +8035485e +801f2938 +8052617c +800d0e16 +802b3d68 +80222e4e +80495d68 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802d487e +802d487e +80000314 +80050c20 +80050c20 +80152542 +80152542 +80233654 +80233654 +80030508 +802f445e +802d487e +802d487e +80000314 +80000314 +80050c20 +80050c20 +80070c14 +80070c14 +800a1730 +80061744 +80182b44 +80182b44 +80111314 +80111314 +8005102e +8005102e +80313336 +80313336 +8004266a +8004266a +8004266a +80001f6e +80040812 +802b2e32 +80001f6e +80313c48 +801c3d6e +80030508 +80030508 +80000000 +804f6b86 +80030508 +80253444 +80233654 +8024477a +80050c20 +8008101e +80162f5c +80264e88 +800b1c3c +8004266a +80313336 +802f445e +802d487e +80505b66 +80182b44 +80456a86 +802e4c84 +80152542 +80253444 +803f5d88 +80030508 +80050c20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8025334e +807c909e +8001040a +80b2b8be +802a3a58 +801f2b40 +801a1f32 +800f1d16 +807c8378 +800d0e16 +80141c30 +801c2540 +801a2b48 +800d0e16 +801a2b48 +801a1f32 +8043525e +80273444 +800d1218 +803b578a +802b3a50 +801a2b48 +8012141c +80172124 +80424f6a +80131b38 +80304b7a +80294988 +800e1518 +80070708 +800d0e16 +80293742 +801a2b48 +801a2b48 +80222e4e +800d0e16 +800d1218 +80344a82 +800d1218 +803d485a +802b447a +800d0e16 +801e1f2c +80212836 +80151b26 +804d5668 +801b1e26 +801e1f2c +80181b2a +801a2b48 +800d0e16 +80222e4e +801a2b48 +802b3d68 +8012141c +801a2b48 +801a2b48 +8054584a +801a1f32 +80232e38 +802a334a +800e1926 +801a2b48 +80384654 +801b1e26 +801e2534 +800d0e16 +80181b2a +800d0e16 +801a2b48 +803d485a +80222e4e +803b578a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +800c101c +801c2c50 +80040812 +80040812 +800a2458 +800a2458 +8092a4b4 +8092a4b4 +80182b44 +80182b44 +80040812 +80050c20 +80000314 +80000314 +80040812 +80040812 +80070c14 +80070c14 +80030508 +80030508 +80040812 +80040812 +80050c20 +80050c20 +80000314 +80000314 +80000314 +80000314 +8013336a +8013336a +80646768 +80646768 +802d487e +802d487e +80000000 +8006143a +802b2e32 +801b1e20 +800d141e +80313c48 +80201f20 +80030508 +800c0e12 +802b2e32 +80040812 +800a2452 +800d141e +80030508 +80172334 +80131920 +80111c32 +80212c3c +80566d82 +80070c14 +800a2458 +80050c20 +80000314 +80050c20 +80405476 +8005102e +800a2458 +80233654 +800b1c3c +80233654 +80152542 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80192434 +800d0e16 +805c6772 +801b2b40 +8026272c +801c2540 +801a2b48 +801a2b48 +800d0e16 +80334656 +801a2b48 +801b2b40 +801a1f32 +8040507a +800d0e16 +8040507a +80394a60 +800d0e16 +800d0e16 +801b2b40 +8040507a +8040507a +8052617c +80222e4e +801a2b48 +801a2b48 +8001040a +801a1f32 +801a1f32 +800d1218 +80424b5a +80424b5a +801a2b48 +800d0e16 +80101420 +80394a60 +801a2b48 +800d0e16 +8001040a +801a2b48 +801a1f32 +801a2f52 +80222f4a +80444a3a +801a2b48 +800e1718 +80566880 +804d5668 +80192434 +80424f6a +8054584a +80232e38 +801e1f2c +803d4442 +80555f5e +80243b6c +80294988 +801f2d48 +80000000 +80212836 +800d0e16 +803b578a +801a2b48 +80222e4e +802b447a +803d485a +801d2d4e +80101420 +800d0e16 +80384654 +80181b2a +801a2b48 +801a2b48 +800d0e16 +800d0e16 +80364152 +8012141c +801a2b48 +800d0e16 +801a2b48 +80273444 +80272f46 +80344a82 +801a2b48 +802c3b5e +801a2b48 +801d2d4e +80070708 +80294988 +80294988 +80424f6a +80232e38 +804b595c +8052617c +8030435e +80555f5e +805a6c72 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070708 +802e3e4c +80232e38 +80141c30 +8017212c +80101a20 +801d2d4e +80838872 +800c0c0e +801b242c +80192434 +8052617c +800d1218 +80232e38 +800f1d16 +8025334e +801f2938 +80384654 +802b3a50 +80364152 +80303744 +800d1218 +801d2d4e +800d0e16 +80151a2a +80030812 +8017212c +80151a2a +80000000 +80000000 +801d2d4e +800d0e16 +8017212c +80000000 +80151a2a +80151a2a +80151a2a +802d352c +80151a2a +80000000 +80000000 +80192434 +80000000 +800d1218 +80304152 +80141c30 +8001040a +80273444 +80070c14 +80040812 +80253444 +80001f6e +800c0e12 +802b2e32 +80172334 +800a2452 +80485364 +80212c3c +80111520 +800c0e12 +805a544a +80111520 +80111520 +80030508 +80050c20 +80313336 +8005102e +8093b1d2 +80040812 +803e4550 +8008101e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +80838872 +80182e4e +801d2f52 +801a2b48 +801a2b48 +802c3b5e +80181b2a +801a1f32 +80212836 +8043525e +80141c30 +8040507a +800d0e16 +800d0e16 +80182e4e +80222f4a +800d0e16 +8046524c +800f1220 +80394a60 +80384654 +801a2b48 +8040507a +804d5668 +801a2b48 +801c2540 +8001040a +80182e4e +8040507a +80222e4e +80030812 +801f2938 +801a2b48 +801a2b48 +806d7566 +800d0e16 +8012141c +80222f54 +801e2534 +805c6772 +802b3d68 +00000000 +00000000 +80040812 +80070c14 +8008101e +80000000 +80040812 +80030508 +80040812 +80050c20 +80070c14 +80070c14 +80040812 +80131920 +800c101c +80576050 +8064716e +80747864 +80777e6a +809ea9b2 +80555f5e +80616f9a +80222f4a +8019273a +80424f6a +803d4442 +801e1f2c +801e1f2c +803d4442 +80131b38 +80243b6c +80294988 +80304b7a +80070708 +80000000 +801d2d4e +80424f6a +8012141c +800f1d16 +80424b5a +800f1220 +800d0e16 +800f1d16 +800f1d16 +80151820 +80151820 +80243b6c +80304b7a +804c574c +80131b38 +804c574c +801c3360 +80686c5a +807c8e8e +80576050 +80636954 +806d745e +80131b38 +806d745e +80747864 +80878c7a +806d745e +8019305a +80222d40 +80686c5a +80878c7a +80686c5a +80293742 +8017212c +801b242c +80151a2a +801b242c +80030812 +80161d26 +80080b18 +8019273a +8013274e +800e101e +80444a3a +80000000 +80384654 +801a2f52 +80273444 +801f2938 +804d5a70 +80232e38 +8026272c +80070708 +80030812 +80384e68 +8040507a +80000000 +801c2422 +802a3a58 +80000000 +8030435e +801b242c +8054584a +80344a82 +8001040a +80838872 +80000000 +80000000 +802b3d68 +800d0e16 +800d0e16 +80000000 +80838872 +80000000 +80070708 +8017212c +80080b18 +80212836 +80303744 +800e1926 +80232e38 +800d1920 +80232e38 +800d1218 +80182e4e +80030812 +800d0e16 +800d1218 +80182e4e +80080b18 +80003360 +80192434 +8017212c +80000000 +80172334 +80030508 +800c0e12 +802b2e32 +80212c3c +80212c3c +800a2452 +800a2452 +80313c48 +800c0e12 +80204572 +802b2e32 +802b2e32 +80313c48 +800c0e12 +80172334 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +80182e4e +801a2b48 +801b2b40 +80273444 +80334656 +8012141c +800d1218 +8012141c +801d2d4e +80222e4e +80394a60 +802b447a +801a2b48 +800d0e16 +80101420 +800f1220 +8001040a +801a2b48 +801a2b48 +804d5668 +801a2b48 +80949b96 +80949b96 +8052617c +801a2b48 +801a2b48 +801b2b40 +8001040a +800d0e16 +80293742 +80222f54 +8001040a +80003360 +800d0e16 +80212836 +80222e4e +801a1e2c +800d0e16 +802b3d68 +802e3e4c +801e2534 +8001040a +801a2b48 +800d0e16 +801e2534 +801e2534 +801b2438 +800e1926 +80101420 +802d3344 +802d3344 +80101420 +80101420 +80182e4e +80232e38 +80232e38 +80161d26 +801b1e26 +80222e4e +801a2b48 +80273444 +8001040a +802d352c +80030812 +804d5a70 +80192434 +80151b26 +80212836 +80222e4e +80030812 +803b578a +800d1218 +80344a82 +801d3058 +80172a64 +80101a20 +801b2438 +80424f6a +800d1920 +80232e38 +80293742 +80576050 +804b595c +8019305a +8064716e +805d695e +80747864 +80686c5a +8081826e +80243b6c +80131b38 +80131b38 +80172124 +80080b18 +801d2d4e +80222d40 +80222d40 +806d745e +80262f54 +800e1720 +80777e6a +80747864 +8019305a +8081826e +80222d40 +80686c5a +80878c7a +80686c5a +80222d40 +80686c5a +80777e6a +80686c5a +803f4c66 +80243b6c +80294988 +80070708 +80080b18 +80222e4e +80070708 +800c0e12 +802b2e32 +802b2e32 +801a2028 +801a2028 +80313c48 +80313c48 +802b3744 +802b3744 +80212c3c +80131920 +80111314 +801a2f52 +80838872 +801c2422 +802e3e4c +800d0e16 +80151a2a +8017212c +801b242c +8019273a +800d0e16 +80384e68 +800d1218 +80182e4e +801f2938 +80003360 +8001040a +800e1718 +802e3e4c +80151a2a +80222e4e +80232e38 +80273444 +801f2938 +80030812 +80030812 +8017212c +80030812 +80151a2a +80222e4e +801f2938 +80151a2a +801d2d4e +80151a2a +80212836 +801f2938 +80151a2a +8054584a +800e101e +80293742 +80101a20 +80101a20 +802d3344 +800c0e12 +80082464 +801c3d6e +80002672 +80142856 +80001f6e +800a2452 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2b48 +801a2138 +800d0e16 +8001040a +801a2b48 +80273444 +804d5a70 +801d2d4e +801a2b48 +8052617c +801a2b48 +802b3d68 +80374046 +803b578a +800d0e16 +80181b2a +801b2b40 +801a2b48 +80303744 +8012141c +80212836 +80222e4e +801f2b40 +804d5668 +80101420 +80182e4e +801e2534 +801a1f32 +80334656 +8040507a +801a1f32 +8040507a +801a2138 +801a2b48 +8043525e +801a2138 +800f1220 +80101420 +801a1e2c +800d1218 +80546674 +801a2b48 +801a2b48 +801a2b48 +802b3d68 +80293742 +80364152 +801e1f2c +801a2b48 +80001f6e +80030508 +801c3d6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806d745e +80747864 +803f608a +8019305a +803f4c66 +806d745e +80747864 +80576050 +80777e6a +806d745e +800e1720 +80576050 +80686c5a +806d745e +80878c7a +80222d40 +806d745e +80222d40 +8064716e +806d745e +80636954 +803f608a +803f608a +80747b6c +800e1720 +80878c7a +806d745e +8019305a +8019305a +806d745e +80636954 +80686c5a +8081826e +80686c5a +806d745e +8081826e +80131b38 +80131b38 +80243b6c +80181b2a +80070708 +8054584a +80070708 +80070708 +80000000 +80000000 +80000000 +80000000 +8017212c +8017212c +80080b18 +80444a3a +80151a2a +800d1218 +8017212c +800f1910 +80222f4a +80182e4e +800d1218 +803d485a +802e3e4c +80232e38 +8026272c +802e3e4c +8052617c +80293742 +8040507a +80101420 +80222e4e +80384654 +803b578a +80151a2a +800e1718 +80151a2a +80161d26 +8030435e +80192434 +80151a2a +8052617c +8054584a +801d2f52 +80182e4e +806d7566 +801b242c +801f2938 +80162140 +801e2534 +80141c30 +8012141c +80384654 +80030812 +80080b18 +80232e38 +80838872 +802b3d68 +802e3e4c +800e1926 +80838872 +80080b18 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +800d0e16 +8012141c +801a2b48 +800d0e16 +801e2534 +802b3d68 +801a2b48 +801e1f2c +80101420 +801a2b48 +80222f54 +801e2534 +80374046 +801f2938 +802b447a +801a1f32 +800d0e16 +801b2b40 +807c8378 +800d0e16 +80212836 +801f2b40 +801a1e2c +801f2938 +800e1718 +801a2b48 +801a1f32 +801c2540 +801a2b48 +80182e4e +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +800c0e12 +80030508 +80040812 +80030508 +80030508 +801a2028 +80070c14 +801a2028 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +806d745e +80686c5a +80747864 +80686c5a +80878c7a +80636954 +80686c5a +80747864 +8019305a +800e1720 +8019305a +80636954 +806d745e +80747864 +806d745e +806d745e +80878c7a +806d745e +8019305a +806d745e +80686c5a +800e1720 +80777e6a +806d745e +800e1720 +806d745e +8081826e +80131b38 +80131b38 +80172124 +801a2b48 +801e1f2c +801b1e26 +80070708 +80070708 +80070708 +80000000 +80000000 +80000000 +80000000 +8017212c +80151a2a +80151a2a +80151a2a +80000000 +80000000 +80151a2a +80000000 +80151a2a +80838872 +80151a2a +80162140 +80444a3a +8040507a +80182e4e +8017212c +80080b18 +80030812 +80151a2a +80080b18 +80080b18 +8025334e +80293742 +800f1d16 +80303744 +801b242c +80101a20 +8052617c +80030812 +8017212c +801e2534 +80003360 +800e1926 +80232e38 +801d2d4e +80151b26 +80161d26 +80151a2a +801b2b40 +8006143a +80212c3c +800a2452 +802b2e32 +801a2028 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +80182e4e +801a2b48 +801a2b48 +80374046 +80424b5a +802a334a +801a2b48 +801b2b40 +80222e4e +80212836 +800d0e16 +801a2b48 +80212836 +801e2534 +8025334e +801b2b40 +80739390 +802c3b5e +801a2b48 +8025334e +8036435e +80304152 +801a2b48 +80222e4e +80151b26 +802a3a58 +801e2534 +80141c30 +801a2b48 +8001040a +801a1f32 +80030508 +80040812 +800c0e12 +802b2e32 +80030508 +80000000 +80070c14 +800c0e12 +802b2e32 +80133372 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801c2c50 +801c2c50 +80070c14 +800c101c +800c101c +80111c32 +80111c32 +80072560 +80072560 +801a2028 +801a2028 +800c101c +80131b38 +80131b38 +80222d40 +8081826e +800e1720 +806d745e +80878c7a +80636954 +8019305a +80747864 +80262f54 +80747864 +80262f54 +80747864 +80777e6a +80636954 +806d745e +80576050 +80243b6c +80172124 +801a2b48 +801e1f2c +80070708 +80070708 +80070708 +80070708 +80070708 +80080b18 +80000000 +80000000 +8017212c +80222d46 +8017212c +80444a3a +802a2f3a +802a4a80 +800d1218 +80030812 +801f2938 +800e1926 +801b242c +800e1926 +80030812 +80101a20 +803b578a +801f2938 +801f2938 +80151a2a +80303744 +800e1926 +80080b18 +800d1920 +80838872 +8001040a +800d1218 +8017212c +80080b18 +80151a2a +8005102e +8005102e +80111520 +800c0e12 +802b2e32 +80131920 +801a2028 +802b3744 +80313c48 +801a2028 +80111520 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80003360 +801b2b40 +8040507a +80141c30 +8036435e +806d7566 +8052617c +80141c30 +801a2b48 +801a2b48 +800e101e +801a2b48 +801b2b40 +80303744 +801a1f32 +800f1220 +8036435e +801f2b40 +80739390 +807c8378 +800f1d16 +801a2b48 +80182e4e +802a374a +804d5668 +800f1220 +800d0e16 +8012141c +801d2d4e +8001040a +800f1d16 +804d5668 +801a2b48 +80313c48 +80131920 +802b3744 +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80182b44 +80111c32 +80212c3c +80111c32 +801a2028 +801a2028 +80111c32 +80111c32 +801a2028 +80253444 +8013336a +8013336a +80152748 +80253444 +80253444 +80172334 +80172334 +80111c32 +80111c32 +80212c3c +80212c3c +80152542 +80152542 +80253444 +80253444 +80212c3c +80313c48 +80313c48 +802b3744 +802d487e +801e1f2c +800d1218 +801a2b48 +80070708 +80243b6c +80243b6c +80131b38 +80222d40 +80243b6c +80304b7a +8040507a +80070708 +8017212c +80070708 +8017212c +80070708 +80070708 +80070708 +80000000 +80000000 +8017212c +80141c30 +80182e4e +80080b18 +80080b18 +800e1926 +80232e38 +80101a20 +80162138 +80141c30 +802e3e4c +80080b18 +801c2422 +804d5668 +801f2938 +80273444 +80334656 +806d7566 +80152748 +800c101c +800d141e +80111c32 +80212c3c +80111f40 +80070c14 +80111520 +80212c3c +80212c3c +801a2028 +80111314 +80313c48 +80001f6e +80111520 +800c101c +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +802a374a +804d5668 +8040507a +801d2f52 +801a2f52 +8040507a +80293742 +800d0e16 +800e101e +80141c30 +80162140 +80181b2a +802b447a +8054584a +80384654 +806d7566 +80394a60 +802a3a58 +801a2b48 +801f2b40 +8036435e +801a2b48 +80040812 +80000000 +80030508 +80030508 +800c101c +800c0e12 +80030508 +80131920 +80212c3c +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +800c101c +80030508 +80030508 +80030508 +80030508 +80040812 +80070c14 +80030508 +800c0e12 +800c0e12 +80182b44 +80182b44 +800d141e +80070c14 +80070c14 +801a2028 +801a2028 +8092a4b4 +8092a4b4 +800c101c +800c101c +80111520 +80111520 +80233654 +801a2028 +80111520 +80072560 +80072560 +80111520 +80111520 +80172334 +80172334 +80072560 +80072560 +800d141e +800d141e +80212c3c +80212c3c +80111c32 +80111c32 +80040812 +80040812 +80070c14 +80070c14 +801a2028 +801a2028 +80253444 +80070708 +8017212c +80070708 +80070708 +803b578a +80070708 +80070708 +80070708 +80070708 +80000000 +80000000 +80000000 +80181b2a +80222e4e +8017212c +800c0c0e +80101a20 +800c0c0e +800d1920 +80111520 +801a2028 +80212c3c +80172334 +80172334 +800d141e +800c0e12 +80070c14 +80070c14 +80253444 +802f445e +80607a94 +80070c14 +800d141e +801f366e +80111c32 +80253444 +800d141e +80212c3c +80172334 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8040507a +800d0e16 +80222f4a +80273444 +80293742 +804d5a70 +80304152 +80364152 +803d485a +801a2b48 +801a2b48 +80040812 +80030508 +80030508 +80040812 +8008101e +80040812 +80030508 +80000000 +80000000 +80030508 +800c0e12 +80030508 +80313c48 +80212c3c +800c0e12 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80070c14 +80070c14 +80070c14 +80070c14 +80072560 +80072560 +80030508 +80030508 +80030508 +8008101e +8008101e +8008101e +8008101e +801a2028 +80030508 +80040812 +801a2028 +801a2028 +801c2c50 +801c2c50 +8013336a +80070c14 +801a2028 +8013336a +8013336a +800b1c3c +800b1c3c +800c101c +800c101c +80233654 +80233654 +80172334 +80172334 +800c101c +800c101c +800d141e +800d141e +800c101c +800c101c +800c101c +800c101c +80212c3c +80212c3c +80152542 +80152542 +80070c14 +80070c14 +800d141e +800d141e +80072560 +80072560 +80111c32 +80111c32 +80030508 +800c0e12 +800c0e12 +800c0e12 +802b2e32 +80070c14 +800c0e12 +80030508 +800c0e12 +80131920 +800c101c +80040812 +80070c14 +80111520 +80172334 +80414444 +801c2c50 +80111c32 +80111c32 +80233654 +80172334 +8013336a +80172334 +80182b44 +80001b60 +8024477a +80000314 +800c0e12 +80111520 +801a2028 +800c101c +80172334 +80111520 +80212c3c +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80040812 +80030508 +800d141e +80030508 +80030508 +80000000 +80030508 +80030508 +800d141e +80253444 +80313c48 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80070c14 +80070c14 +80001f6e +80111520 +80030508 +80030508 +80070c14 +80070c14 +800d141e +80040812 +80040812 +80212c3c +80212c3c +80172334 +80172334 +80030508 +80030508 +80030508 +800d141e +80072560 +80172334 +80172334 +80040812 +80040812 +800c101c +801a2028 +801a2028 +80070c14 +80070c14 +80072560 +80072560 +80070c14 +80070c14 +80111c32 +80111c32 +80182b44 +80182b44 +80233654 +80233654 +80152542 +80152542 +80072560 +80072560 +802d487e +80070c14 +80030508 +80030508 +80070c14 +80070c14 +8008101e +80070c14 +80040812 +800c101c +80070c14 +80070c14 +800c101c +800c101c +800a2452 +800c101c +802b3744 +80072560 +801a2028 +80070c14 +800c101c +800c101c +80030508 +80040812 +80001f6e +80172334 +80070c14 +801a2028 +80030508 +80030508 +80040812 +80040812 +80030508 +80070c14 +80162f5c +80111c32 +80172334 +80001f6e +8005102e +800a1730 +80050c20 +80001f6e +800c0e12 +801a2028 +80001f6e +800c101c +80212c3c +80172334 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80072560 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80000000 +80000000 +80030508 +80030508 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +800c101c +801a2028 +801a2028 +80030508 +80030508 +801a2028 +801a2028 +80070c14 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +800c101c +800c101c +80233654 +80111c32 +80111c32 +80040812 +80040812 +800d141e +80070c14 +80172334 +80072560 +80072560 +80072560 +80172334 +80072560 +800c0e12 +800c0e12 +800c0e12 +80111520 +80030508 +80233654 +80233654 +8008101e +8008101e +802d4674 +80111520 +80233654 +80233654 +800c0e12 +800c0e12 +801a2028 +80070c14 +80070c14 +80070c14 +80030508 +80030508 +8013336a +80111c32 +80030508 +800c101c +80131920 +800c101c +800c101c +80172334 +8006143a +80206398 +800a2452 +80001f6e +80001f6e +800c0e12 +800c0e12 +80131920 +801a2028 +801a2028 +80040812 +80070c14 +800c101c +800c101c +80030508 +80030508 +80030508 +80000000 +80072560 +80030508 +801a2028 +80050c20 +80152542 +80414444 +802f445e +80313336 +800c101c +800c0e12 +80253444 +80040812 +802b3744 +8013336a +800c101c +801a2028 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80040812 +80030508 +80040812 +80070c14 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80030508 +80070c14 +800c0e12 +800c0e12 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80182b44 +80182b44 +80072560 +800d141e +800d141e +8008101e +8008101e +80070c14 +80111c32 +80111c32 +800a2458 +800a2458 +80070c14 +80070c14 +80070c14 +80040812 +80040812 +80072560 +800a1730 +800a1730 +80030508 +80030508 +80172334 +80172334 +80040812 +80040812 +80070c14 +80070c14 +80182b44 +80182b44 +80152542 +80070c14 +80070c14 +80070c14 +800c101c +80070c14 +80070c14 +800c0e12 +800c0e12 +80072560 +80172334 +800d141e +800d141e +801a2028 +80253444 +80072560 +800c101c +800c101c +800c0e12 +800c0e12 +800c0e12 +80030508 +80111520 +800c101c +800c0e12 +80070c14 +80131920 +800c0e12 +800a2452 +80111314 +80111520 +805a544a +80001f6e +00000000 +00000000 +00000000 +00000000 +80253444 +80313c48 +80172334 +80040812 +80030508 +800d141e +800c0e12 +80172334 +800d141e +80030508 +80212c3c +80001f6e +80172334 +80030508 +80040812 +80172334 +80030508 +80040812 +80030508 +80111c32 +803b6492 +80050c20 +803f5684 +80212c3c +80233654 +800c101c +80070c14 +801a2028 +80152542 +801a2028 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80040812 +80070c14 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +800c0e12 +80030508 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80172334 +80414444 +80414444 +80030508 +801a2028 +801a2028 +80072560 +80070c14 +80070c14 +8008101e +8008101e +80050c20 +80050c20 +80050c20 +80070c14 +80070c14 +800c0e12 +800c0e12 +800d141e +800c101c +800c101c +80070c14 +8013336a +80152748 +80070c14 +80070c14 +80040812 +80040812 +80111c32 +80111c32 +80111c32 +80111c32 +80030508 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80070c14 +800d141e +800d141e +8013336a +8013336a +80070c14 +80070c14 +8013336a +8013336a +80030508 +80030508 +80070c14 +802b3744 +800d141e +800d141e +800c101c +80111520 +800d141e +800c0e12 +80030508 +80313c48 +80456a86 +801b1e20 +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80040812 +800c101c +801a2028 +800c0e12 +801a2028 +800d141e +80001f6e +800d141e +800c0e12 +80040812 +80030508 +80070c14 +80030508 +80030508 +80072560 +80111c32 +80172334 +80072560 +80172334 +802b3744 +80070c14 +80001f6e +80131920 +800c101c +800c0e12 +80030508 +800c101c +800d141e +801c2c50 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80070c14 +80070c14 +80000000 +80000000 +80070c14 +80040812 +8008101e +80030508 +80070c14 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800a1730 +800a1730 +800a1730 +80072560 +80152542 +80152542 +80152542 +80152542 +8008101e +80070c14 +80070c14 +80070c14 +80070c14 +800c101c +8008101e +8008101e +8008101e +8008101e +8013336a +80040812 +80040812 +8008101e +8008101e +80040812 +80030508 +80030508 +8008101e +8008101e +80070c14 +80070c14 +80030508 +80070c14 +80414444 +800a1730 +800a1730 +800a1730 +800a1730 +80172334 +80172334 +800d141e +800d141e +800a2458 +800a2458 +8013336a +8013336a +800c101c +80072560 +802b2e32 +800c101c +800c0e12 +800c0e12 +801a2028 +80212c3c +80206398 +800d141e +802b2e32 +800c0e12 +802b2e32 +800a2452 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800d141e +800a2458 +801a2028 +800d141e +800c0e12 +80072560 +80001f6e +801a2028 +801a2028 +80070c14 +800d141e +80030508 +800c101c +8008101e +80040812 +800c101c +80040812 +80182b44 +80070c14 +80072560 +80001f6e +80111c32 +80212c3c +80111520 +800c0e12 +80111520 +80070c14 +800c101c +80070c14 +800d141e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80040812 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80040812 +80040812 +800c0e12 +80040812 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80040812 +80040812 +800c101c +8008101e +8008101e +80172334 +800c101c +800c101c +8013336a +8013336a +80182b44 +8008101e +8008101e +8008101e +8008101e +8008101e +80111520 +80111520 +80414444 +80414444 +8008101e +800a2458 +800a2458 +8008101e +8008101e +800c101c +80111c32 +80111c32 +800c101c +80040812 +80030508 +80030508 +80030508 +80040812 +80111c32 +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +8013336a +80072560 +80172334 +80070c14 +80040812 +80111c32 +80070c14 +80070c14 +80131920 +80204572 +80072560 +80070c14 +8006143a +80000000 +802b2e32 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8008101e +800d141e +800c101c +80030508 +80070c14 +80070c14 +80111c32 +801a2028 +801a2028 +80313c48 +80131920 +80030508 +80072560 +80070c14 +80070c14 +80072560 +80111c32 +80111c32 +80030508 +80030508 +80070c14 +80111520 +802b3744 +80414444 +80070c14 +800a2452 +801a2028 +800d141e +802b2e32 +80070c14 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +800c0e12 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +800c0e12 +80040812 +80040812 +80070c14 +801a2028 +801a2028 +800a1730 +800a1730 +80040812 +80070c14 +80070c14 +8008101e +80172334 +80172334 +8008101e +8008101e +80030508 +80070c14 +80070c14 +80070c14 +80050c20 +80131920 +80072560 +80072560 +8008101e +8008101e +80070c14 +80070c14 +80111c32 +80111c32 +80111c32 +80212c3c +80212c3c +80172334 +800c101c +800d141e +80172334 +80172334 +80070c14 +80070c14 +80313c48 +8008101e +800c0e12 +80070c14 +800c101c +800d141e +800c101c +80485364 +80040812 +800c101c +80212c3c +80313c48 +8040586a +802b2e32 +801b1e20 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80313c48 +80070c14 +800c101c +80040812 +8093b1d2 +8008101e +800b1c3c +8013336a +800c101c +80072560 +800c101c +80030508 +80072560 +80050c20 +80070c14 +8008101e +80111c32 +800d141e +800a2458 +800c101c +801a2028 +80131920 +80212c3c +80253444 +801a2028 +80111520 +802b3744 +80212c3c +802b2e32 +80131920 +800c101c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +800c101c +800c101c +80070c14 +800c0e12 +800c0e12 +800d141e +80030508 +80070c14 +80040812 +80040812 +800c0e12 +800d141e +800d141e +80030508 +8008101e +8008101e +80070c14 +80070c14 +80070c14 +800c101c +800c101c +800c101c +800c101c +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80070c14 +80070c14 +80030508 +800a2458 +80131920 +80070c14 +80070c14 +80030508 +80182b44 +800d141e +80111c32 +800c101c +8013336a +80253444 +80111520 +802b2e32 +80001f6e +80111520 +8006143a +80201f20 +80133372 +80383a3a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80111520 +801a2028 +80111c32 +80030508 +80040812 +80070c14 +80131920 +801a2028 +8013336a +800a1730 +800c101c +8008101e +800c101c +800a2458 +800d141e +800c101c +800c0e12 +80070c14 +80172334 +800c101c +80111c32 +802b3744 +80070c14 +800c0e12 +80131920 +80040812 +8059636a +80111c32 +800c101c +80131920 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80070c14 +80070c14 +80040812 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80040812 +80070c14 +800a2458 +800a2458 +8008101e +8008101e +80070c14 +8008101e +800c101c +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +80040812 +800a2458 +80072560 +80040812 +80040812 +800d141e +80030508 +800c0e12 +802f445e +80142856 +801a2028 +802b3744 +802d4674 +80456a86 +80212c3c +8006143a +80001f6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +800c0e12 +80111c32 +801a2028 +80050c20 +80040812 +800d141e +80131920 +80172334 +800d141e +800d141e +801a2028 +8013336a +8008101e +8008101e +80070c14 +80040812 +80131920 +800c101c +80253444 +800d141e +800d141e +80485364 +80253444 +80030508 +80070c14 +800d141e +800a2452 +801a2028 +80070c14 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80040812 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80030508 +8008101e +800c101c +800c101c +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +80040812 +8008101e +80070c14 +80070c14 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80030508 +80030508 +80040812 +80030508 +800a2458 +80070c14 +80070c14 +801a2028 +80050c20 +800c101c +80030508 +80070c14 +80040812 +80030508 +800c101c +800c101c +800c101c +800c101c +80072560 +801a2028 +801a2028 +800c0e12 +80111520 +80111520 +80212c3c +80212c3c +800a2452 +80172334 +80313c48 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80131920 +800c101c +800c0e12 +800a2458 +800c101c +80040812 +80072560 +80131920 +80212c3c +80070c14 +80070c14 +80030508 +80253444 +80050c20 +8008101e +800c0e12 +800c101c +80212c3c +80030508 +8008101e +80414444 +80131920 +802b2e32 +80152542 +80001f6e +800c0e12 +80072560 +8006143a +800a2452 +80070c14 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +801c3d6e +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80070c14 +80070c14 +800c101c +80030508 +80030508 +80040812 +80040812 +80040812 +800c101c +800c101c +80070c14 +80040812 +80040812 +80040812 +800c101c +800c101c +80040812 +80070c14 +80070c14 +80040812 +80040812 +80030508 +80030508 +80070c14 +80070c14 +80040812 +80070c14 +80070c14 +800c101c +80040812 +800c101c +800c101c +800c0e12 +80072560 +800c0e12 +80001f6e +800c0e12 +800d141e +80313c48 +80131920 +80313c48 +802b2e32 +802b3744 +80111520 +80131920 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +801a2028 +801a2028 +801a2028 +8008101e +8008101e +8008101e +801a2028 +801a2028 +800c101c +800a1730 +800d141e +8008101e +80040812 +800c0e12 +80070c14 +80030508 +80030508 +800c101c +80072560 +800c101c +80253444 +800c101c +800c101c +80172334 +800d141e +80111c32 +801b1e20 +802b2e32 +802b3744 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80001f6e +80131920 +80030508 +80313c48 +80030508 +80000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80070c14 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80030508 +80030508 +8013336a +8008101e +80070c14 +80040812 +80070c14 +80040812 +80070c14 +80040812 +80030508 +80030508 +800c101c +800c0e12 +800d141e +80313c48 +800c101c +80313c48 +800c0e12 +801a2028 +80001f6e +80131920 +80030508 +801b1e20 +800c0e12 +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80040812 +80040812 +80070c14 +80070c14 +80070c14 +80040812 +801a2028 +80070c14 +80040812 +800d141e +80070c14 +8013336a +80040812 +80030508 +80030508 +80030508 +80030508 +80072560 +80040812 +80030508 +800d141e +80152542 +801a2028 +80313c48 +80111314 +80030508 +80133372 +8006143a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80111520 +800c0e12 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80040812 +800c0e12 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80313c48 +80111520 +80313c48 +80313c48 +802a2b26 +80133372 +800c0e12 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80030508 +80040812 +80030508 +80070c14 +800c101c +80070c14 +80030508 +80040812 +80040812 +80030508 +80040812 +80070c14 +80070c14 +80040812 +800c101c +80070c14 +80070c14 +80040812 +80072560 +800a2458 +8008101e +800d141e +80485364 +8013336a +800c0e12 +802b3744 +80070c14 +80172334 +80172334 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +80040812 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80111c32 +80040812 +800d141e +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80131920 +800c0e12 +80030508 +80070c14 +80070c14 +80000000 +800c0e12 +800d141e +800d141e +800c0e12 +800a2452 +80383a3a +80111520 +801c3d6e +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +8008101e +80040812 +80070c14 +80030508 +80030508 +80040812 +80040812 +80070c14 +80030508 +80040812 +80070c14 +80070c14 +80040812 +80070c14 +80030508 +801a2028 +80072560 +80111520 +80030508 +800d141e +800c101c +80072560 +8013336a +80313c48 +80133372 +800a2452 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80070c14 +80030508 +80030508 +800c0e12 +80070c14 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +800c101c +80040812 +80040812 +80040812 +80030508 +800c101c +80313c48 +80313c48 +8006143a +80383a3a +80133372 +80082464 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +8013336a +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +800c101c +80040812 +80070c14 +80040812 +8013336a +80030508 +80030508 +80040812 +80040812 +80040812 +80040812 +80040812 +80111520 +80070c14 +800c0e12 +800c101c +80070c14 +80111520 +800c0e12 +802b2e32 +80201f20 +80313c48 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80070c14 +80000000 +80030508 +80030508 +80040812 +80030508 +80030508 +80040812 +80030508 +80070c14 +800c101c +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +800c0e12 +80313c48 +800c0e12 +80212c3c +801a2028 +800c0e12 +800c0e12 +802b2e32 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c101c +80000000 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +80030508 +80040812 +80040812 +80040812 +80070c14 +80070c14 +8008101e +800c101c +80070c14 +800c101c +80030508 +800c101c +800c0e12 +800c101c +80070c14 +801a2028 +80070c14 +80111520 +8006143a +801b1e20 +800c0e12 +80111520 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80040812 +80030508 +80030508 +80030508 +80040812 +80040812 +80030508 +80040812 +80000000 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80040812 +80030508 +80030508 +800c101c +80030508 +800c0e12 +80070c14 +80030508 +80313c48 +800c0e12 +80313c48 +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +801a2028 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +800c0e12 +80040812 +80030508 +80040812 +80072560 +800c0e12 +80030508 +80030508 +801c3d6e +80172334 +80212c3c +802b3744 +802b3744 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80040812 +80040812 +80111520 +80030508 +800a2452 +80030508 +80030508 +800c0e12 +800c0e12 +80030508 +80111520 +802b3744 +800a2452 +8006143a +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80070c14 +8013336a +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80070c14 +800d141e +80313c48 +80131920 +80040812 +80030508 +80030508 +800c0e12 +800c0e12 +800a2452 +80111314 +80313c48 +80131920 +80002672 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +800d141e +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80030508 +80070c14 +80030508 +800c101c +80030508 +80030508 +80030508 +80030508 +80070c14 +80000000 +80070c14 +800d141e +80030508 +80040812 +80030508 +800c0e12 +80030508 +80030508 +80030508 +80030508 +800a1730 +800c0e12 +80072560 +801a2028 +80206398 +80131920 +80201f20 +802a2b26 +800a2452 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80040812 +80030508 +80030508 +80040812 +800c0e12 +80030508 +80030508 +80040812 +80030508 +800c0e12 +80030508 +800c101c +80030508 +80070c14 +80030508 +80000000 +80040812 +80030508 +80040812 +800c0e12 +80030508 +80030508 +800c0e12 +800c0e12 +80070c14 +80212c3c +80172334 +800a2452 +80082464 +80111314 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80070c14 +80030508 +80040812 +80030508 +80030508 +80070c14 +80030508 +80000000 +80000000 +80000000 +80070c14 +80030508 +8013336a +80030508 +800c101c +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +800c101c +80072560 +80070c14 +8059636a +800c0e12 +80212c3c +80030508 +8006143a +80212c3c +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80040812 +80030508 +80030508 +80040812 +80030508 +80000000 +80030508 +80030508 +80070c14 +80030508 +80070c14 +800c101c +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80030508 +80030508 +80040812 +80313c48 +80131920 +80212c3c +80313c48 +8006143a +80111520 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +800c0e12 +80040812 +80030508 +80040812 +80000000 +80030508 +80030508 +80030508 +80030508 +80072560 +80070c14 +800c0e12 +80030508 +80070c14 +80070c14 +800d141e +800c0e12 +800c101c +80040812 +80030508 +80030508 +800c0e12 +80030508 +80040812 +800a2452 +800c0e12 +80253444 +805a544a +80082464 +80082464 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80070c14 +80030508 +80040812 +80070c14 +80040812 +80040812 +80030508 +80070c14 +80030508 +80040812 +80030508 +80000000 +80000000 +80030508 +800c101c +80000000 +800c101c +80070c14 +802b2e32 +80212c3c +80000000 +802b2e32 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80030508 +80030508 +80030508 +800c101c +80030508 +80000000 +80030508 +80030508 +8008101e +80070c14 +80040812 +80030508 +800c0e12 +80070c14 +80030508 +80040812 +800c101c +80070c14 +80030508 +800c0e12 +80030508 +80000000 +80070c14 +802b3744 +800a2452 +801a2028 +801c3d6e +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80040812 +80040812 +80030508 +80030508 +80040812 +80000000 +80030508 +80030508 +80040812 +80040812 +80030508 +80030508 +801a2028 +80030508 +80000000 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +800c101c +800c101c +80030508 +80212c3c +80131920 +801b1e20 +80383a3a +801b1e20 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80040812 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +8008101e +80030508 +80040812 +80070c14 +80030508 +800c0e12 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +802b2e32 +801a2028 +802b2e32 +802b2e32 +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80070c14 +80000000 +80030508 +80040812 +80040812 +80040812 +80040812 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +80040812 +80030508 +80111520 +80313c48 +801b1e20 +80111520 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80131920 +80072560 +80082464 +801c3d6e +800c0e12 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80040812 +80040812 +800c0e12 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80313c48 +802b2e32 +80111520 +80313c48 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80070c14 +80030508 +80030508 +80030508 +801a2028 +80111520 +802b3744 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +80040812 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80313c48 +80000000 +800c101c +80030508 +80072560 +80183e7a +801b1e20 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80313c48 +80001f6e +80030508 +800c0e12 +800c0e12 +803f5684 +80313c48 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +800c0e12 +80000000 +80313c48 +80030508 +80030508 +80000000 +8006143a +80313c48 +800c0e12 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80040812 +80040812 +80030508 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80000000 +800c0e12 +80000000 +80030508 +80030508 +80313c48 +802b2e32 +800c0e12 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +80030508 +80000000 +800a2452 +80030508 +80030508 +80030508 +800c0e12 +80000000 +800c0e12 +80030508 +800c0e12 +80001f6e +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +800c0e12 +80030508 +80030508 +80111520 +80000000 +80000000 +80030508 +80000000 +80040812 +80000000 +800c0e12 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80030508 +80030508 +800c0e12 +80030508 +80030508 +80030508 +80000000 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80030508 +80030508 +80000000 +80040812 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +800c0e12 +80000000 +80030508 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80030508 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80030508 +80030508 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80030508 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +80000000 +80000000 +80000000 +80000000 +80000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640b24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640b24_epochs.txt new file mode 100644 index 0000000..55a8d5f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640b24_epochs.txt @@ -0,0 +1,14 @@ +# Ch365 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 114590 0 500 sh3_zs640b240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b240.mem 1843 204 0 +1 115229 0 500 sh3_zs640b241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b241.mem 1843 204 1 +2 115925 0 500 sh3_zs640b242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b242.mem 1843 204 1 +3 117599 0 500 sh3_zs640b243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b243.mem 1843 204 1 +4 118982 0 500 sh3_zs640b244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b244.mem 1843 204 1 +5 126542 0 500 sh3_zs640b245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b245.mem 1843 204 1 +6 127394 0 500 sh3_zs640b246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b246.mem 1843 204 1 +7 128033 0 500 sh3_zs640b247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b247.mem 1843 204 1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640c12_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640c12_epochs.txt new file mode 100644 index 0000000..668092d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640c12_epochs.txt @@ -0,0 +1,10 @@ +# Ch359 epoch descriptor table (4 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 119471 8192 480 sh3_zs640c120_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c120.mem 1843 204 0 +1 120110 8192 480 sh3_zs640c121_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c121.mem 1843 204 1 +2 120749 8192 480 sh3_zs640c122_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c122.mem 1843 204 1 +3 121388 8192 480 sh3_zs640c123_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c123.mem 1843 204 1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640c18_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640c18_epochs.txt new file mode 100644 index 0000000..418cfc4 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640c18_epochs.txt @@ -0,0 +1,12 @@ +# Ch359 epoch descriptor table (6 epochs, dump order). CLUT=bootlet preload; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 6 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 119471 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c180.mem 565 62 0 - 0x00000000 +1 120110 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c181.mem 520 57 1 - 0x00000000 +2 120749 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c182.mem 718 79 1 - 0x00000000 +3 121388 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c183.mem 538 59 1 - 0x00000000 +4 122027 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c184.mem 520 57 1 - 0x00000000 +5 129389 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c185.mem 412 45 1 - 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640c24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640c24_epochs.txt new file mode 100644 index 0000000..dc4a3ba --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640c24_epochs.txt @@ -0,0 +1,14 @@ +# Ch359 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 119471 8192 480 sh3_zs640c240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c240.mem 1843 204 0 +1 120110 8192 480 sh3_zs640c241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c241.mem 1843 204 1 +2 120749 8192 480 sh3_zs640c242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c242.mem 1843 204 1 +3 121388 8192 480 sh3_zs640c243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c243.mem 1843 204 1 +4 122027 8192 480 sh3_zs640c244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c244.mem 1843 204 1 +5 129389 8192 480 sh3_zs640c245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c245.mem 1843 204 1 +6 130241 8192 480 sh3_zs640c246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c246.mem 1843 204 1 +7 130880 8192 480 sh3_zs640c247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c247.mem 1843 204 1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640c24c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640c24c_epochs.txt new file mode 100644 index 0000000..72c1e53 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640c24c_epochs.txt @@ -0,0 +1,14 @@ +# Ch366 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 119471 8192 504 sh3_zs640c24c0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c0.mem 1843 204 0 +1 120110 8192 504 sh3_zs640c24c1_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c1.mem 1843 204 1 +2 120749 8192 504 sh3_zs640c24c2_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c2.mem 1843 204 1 +3 121388 8192 504 sh3_zs640c24c3_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c3.mem 1843 204 1 +4 122027 8192 504 sh3_zs640c24c4_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c4.mem 1843 204 1 +5 129389 8192 504 sh3_zs640c24c5_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c5.mem 1843 204 1 +6 130241 8192 504 sh3_zs640c24c6_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c6.mem 1843 204 1 +7 130880 8192 504 sh3_zs640c24c7_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c7.mem 1843 204 1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640m28_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640m28_epochs.txt new file mode 100644 index 0000000..c5eedfc --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640m28_epochs.txt @@ -0,0 +1,18 @@ +# Ch364 epoch descriptor table (12 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 12 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 5328 11264 480 sh3_zs640m280_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zs640m280.mem 493 54 0 +1 11671 10240 484 sh3_zs640m281_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zs640m281.mem 619 68 0 +2 77112 10240 488 sh3_zs640m282_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zs640m282.mem 619 68 0 +3 89164 9216 492 sh3_zs640m283_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zs640m283.mem 619 68 0 +4 119471 8192 496 sh3_zs640m284_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m284.mem 1843 204 0 +5 120110 8192 496 sh3_zs640m285_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m285.mem 1843 204 1 +6 120749 8192 496 sh3_zs640m286_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m286.mem 1843 204 1 +7 121388 8192 496 sh3_zs640m287_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m287.mem 1843 204 1 +8 122027 8192 496 sh3_zs640m288_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m288.mem 1843 204 1 +9 129389 8192 496 sh3_zs640m289_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m289.mem 1843 204 1 +10 130241 8192 496 sh3_zs640m2810_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m2810.mem 1843 204 1 +11 130880 8192 496 sh3_zs640m2811_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m2811.mem 1843 204 1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zs640mt5_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zs640mt5_epochs.txt new file mode 100644 index 0000000..1b72676 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zs640mt5_epochs.txt @@ -0,0 +1,11 @@ +# Ch357 epoch descriptor table (5 epochs, dump order). host/board: preload CLUT table via bootlet; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse +0 5328 11264 480 sh3_zs640mt50_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zs640mt50.mem 493 54 0 +1 11671 10240 484 sh3_zs640mt51_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zs640mt51.mem 619 68 0 +2 77112 10240 488 sh3_zs640mt52_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zs640mt52.mem 619 68 0 +3 89164 9216 492 sh3_zs640mt53_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zs640mt53.mem 619 68 0 +4 119471 8192 496 sh3_zs640mt54_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640mt54.mem 619 68 0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zspxy3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zspxy3_epochs.txt new file mode 100644 index 0000000..7ee693c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zspxy3_epochs.txt @@ -0,0 +1,9 @@ +# Ch416 epoch descriptor table (3 epochs, dump order). CLUT=bootlet preload; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 8634 11264 480 sh3_zspxy30_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zspxy30.mem 259 28 0 - 0x00000000 +1 12757 10240 484 sh3_zspxy31_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zspxy31.mem 97 10 0 - 0x00000000 +2 145742 12288 488 sh3_zspxy32_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zspxy32.mem 97 10 0 - 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a1_epochs.txt new file mode 100644 index 0000000..6b235c4 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a1_epochs.txt @@ -0,0 +1,11 @@ +# Ch395 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 500 sh3_zsrt139a10_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a10.mem 493 54 0 sh3_zsrt139a10_pal.mem 0x32ed74c4 +1 11671 10240 500 sh3_zsrt139a11_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a11.mem 1060 117 0 sh3_zsrt139a11_pal.mem 0x3cd88c98 +2 89548 9216 500 sh3_zsrt139a12_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a12.mem 1231 136 0 sh3_zsrt139a12_pal.mem 0x5dfce0a2 +3 89974 9216 500 sh3_zsrt139a13_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a13.mem 1231 136 1 sh3_zsrt139a13_pal.mem 0x5dfce0a2 +4 90400 9216 500 sh3_zsrt139a14_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a14.mem 1231 136 1 sh3_zsrt139a14_pal.mem 0x5dfce0a2 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a2_epochs.txt new file mode 100644 index 0000000..088edf6 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a2_epochs.txt @@ -0,0 +1,12 @@ +# Ch396 epoch descriptor table (6 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 6 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 500 sh3_zsrt139a20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a20.mem 493 54 0 sh3_zsrt139a20_pal.mem 0x32ed74c4 +1 11671 10240 500 sh3_zsrt139a21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a21.mem 1060 117 0 sh3_zsrt139a21_pal.mem 0x3cd88c98 +2 89164 9216 500 sh3_zsrt139a22_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a22.mem 1105 122 0 sh3_zsrt139a22_pal.mem 0x5dfce0a2 +3 89548 9216 500 sh3_zsrt139a23_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a23.mem 1231 136 1 sh3_zsrt139a23_pal.mem 0x5dfce0a2 +4 89974 9216 500 sh3_zsrt139a24_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a24.mem 1231 136 1 sh3_zsrt139a24_pal.mem 0x5dfce0a2 +5 90400 9216 500 sh3_zsrt139a25_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a25.mem 1231 136 1 sh3_zsrt139a25_pal.mem 0x5dfce0a2 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a3_epochs.txt new file mode 100644 index 0000000..70799a9 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a3_epochs.txt @@ -0,0 +1,9 @@ +# Ch397 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a30_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a30.mem 493 54 0 sh3_zsrt139a30_pal.mem 0x32ed74c4 +1 11671 10240 484 sh3_zsrt139a31_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a31.mem 619 68 0 sh3_zsrt139a31_pal.mem 0x3cd88c98 +2 32391 13824 488 sh3_zsrt139a32_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a32.mem 97 10 0 sh3_zsrt139a32_pal.mem 0x566e7c38 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a4_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a4_epochs.txt new file mode 100644 index 0000000..3b5a25f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a4_epochs.txt @@ -0,0 +1,11 @@ +# Ch398 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a40.mem 493 54 0 sh3_zsrt139a40_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a41.mem 619 68 0 sh3_zsrt139a41_pal.mem 0x3cd88c98 +2 31075 13824 480 sh3_zsrt139a42_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a42.mem 1231 136 0 sh3_zsrt139a42_pal.mem 0x566e7c38 +3 31820 13824 480 sh3_zsrt139a43_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a43.mem 862 95 1 sh3_zsrt139a43_pal.mem 0x566e7c38 +4 32391 13824 480 sh3_zsrt139a44_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a44.mem 709 78 1 sh3_zsrt139a44_pal.mem 0x566e7c38 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a5_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a5_epochs.txt new file mode 100644 index 0000000..fefcb80 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a5_epochs.txt @@ -0,0 +1,22 @@ +# Ch399 epoch descriptor table (16 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 16 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a50_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a50.mem 493 54 0 sh3_zsrt139a50_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a51_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a51.mem 619 68 0 sh3_zsrt139a51_pal.mem 0x3cd88c98 +2 31075 13824 480 sh3_zsrt139a52_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a52.mem 1474 163 0 sh3_zsrt139a52_pal.mem 0x566e7c38 +3 32131 13824 480 sh3_zsrt139a53_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a53.mem 1321 146 1 sh3_zsrt139a53_pal.mem 0x566e7c38 +4 33085 13824 480 sh3_zsrt139a54_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a54.mem 1843 204 1 sh3_zsrt139a54_pal.mem 0x566e7c38 +5 34387 13824 480 sh3_zsrt139a55_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a55.mem 1843 204 1 sh3_zsrt139a55_pal.mem 0x566e7c38 +6 35689 13824 480 sh3_zsrt139a56_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a56.mem 1843 204 1 sh3_zsrt139a56_pal.mem 0x566e7c38 +7 36991 13824 480 sh3_zsrt139a57_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a57.mem 1843 204 1 sh3_zsrt139a57_pal.mem 0x566e7c38 +8 38293 13824 480 sh3_zsrt139a58_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a58.mem 1843 204 1 sh3_zsrt139a58_pal.mem 0x566e7c38 +9 39520 13824 480 sh3_zsrt139a59_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a59.mem 1618 179 1 sh3_zsrt139a59_pal.mem 0x566e7c38 +10 40747 13824 480 sh3_zsrt139a510_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a510.mem 1843 204 1 sh3_zsrt139a510_pal.mem 0x566e7c38 +11 42049 13824 480 sh3_zsrt139a511_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a511.mem 1843 204 1 sh3_zsrt139a511_pal.mem 0x566e7c38 +12 43351 13824 480 sh3_zsrt139a512_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a512.mem 1843 204 1 sh3_zsrt139a512_pal.mem 0x566e7c38 +13 44653 13824 480 sh3_zsrt139a513_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a513.mem 1843 204 1 sh3_zsrt139a513_pal.mem 0x566e7c38 +14 45955 13824 480 sh3_zsrt139a514_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a514.mem 1843 204 1 sh3_zsrt139a514_pal.mem 0x566e7c38 +15 47089 13824 480 sh3_zsrt139a515_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a515.mem 115 12 1 sh3_zsrt139a515_pal.mem 0x566e7c38 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a6_epochs.txt new file mode 100644 index 0000000..bef29b1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a6_epochs.txt @@ -0,0 +1,26 @@ +# Ch400 epoch descriptor table (20 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a60.mem 493 54 0 sh3_zsrt139a60_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a61.mem 1060 117 0 sh3_zsrt139a61_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139a62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a62.mem 529 58 1 sh3_zsrt139a62_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139a63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a63.mem 781 86 0 sh3_zsrt139a63_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139a64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a64.mem 1231 136 0 sh3_zsrt139a64_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139a65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a65.mem 1231 136 1 sh3_zsrt139a65_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139a66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a66.mem 763 84 1 sh3_zsrt139a66_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139a67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a67.mem 1231 136 1 sh3_zsrt139a67_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139a68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a68.mem 709 78 1 sh3_zsrt139a68_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139a69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a69.mem 1231 136 1 sh3_zsrt139a69_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139a610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a610.mem 1231 136 1 sh3_zsrt139a610_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139a611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a611.mem 952 105 1 sh3_zsrt139a611_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139a612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a612.mem 1231 136 1 sh3_zsrt139a612_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139a613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a613.mem 1096 121 1 sh3_zsrt139a613_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139a614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a614.mem 169 18 1 sh3_zsrt139a614_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139a615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a615.mem 61 6 0 sh3_zsrt139a615_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139a616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a616.mem 619 68 0 sh3_zsrt139a616_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139a617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a617.mem 1231 136 0 sh3_zsrt139a617_pal.mem 0x566e7c38 +18 31820 13824 480 sh3_zsrt139a618_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a618.mem 862 95 1 sh3_zsrt139a618_pal.mem 0x566e7c38 +19 32391 13824 480 sh3_zsrt139a619_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a619.mem 709 78 1 sh3_zsrt139a619_pal.mem 0x566e7c38 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a7_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a7_epochs.txt new file mode 100644 index 0000000..24d93c6 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a7_epochs.txt @@ -0,0 +1,34 @@ +# Ch401 epoch descriptor table (28 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 28 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a70_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a70.mem 493 54 0 sh3_zsrt139a70_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a71_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a71.mem 1060 117 0 sh3_zsrt139a71_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139a72_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a72.mem 529 58 1 sh3_zsrt139a72_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139a73_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a73.mem 781 86 0 sh3_zsrt139a73_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139a74_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a74.mem 1231 136 0 sh3_zsrt139a74_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139a75_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a75.mem 1231 136 1 sh3_zsrt139a75_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139a76_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a76.mem 763 84 1 sh3_zsrt139a76_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139a77_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a77.mem 1231 136 1 sh3_zsrt139a77_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139a78_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a78.mem 709 78 1 sh3_zsrt139a78_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139a79_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a79.mem 1231 136 1 sh3_zsrt139a79_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139a710_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a710.mem 1231 136 1 sh3_zsrt139a710_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139a711_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a711.mem 952 105 1 sh3_zsrt139a711_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139a712_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a712.mem 1231 136 1 sh3_zsrt139a712_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139a713_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a713.mem 1096 121 1 sh3_zsrt139a713_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139a714_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a714.mem 169 18 1 sh3_zsrt139a714_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139a715_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a715.mem 61 6 0 sh3_zsrt139a715_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139a716_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a716.mem 619 68 0 sh3_zsrt139a716_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139a717_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a717.mem 619 68 0 sh3_zsrt139a717_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139a718_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a718.mem 619 68 0 sh3_zsrt139a718_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139a719_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a719.mem 619 68 0 sh3_zsrt139a719_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139a720_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a720.mem 1843 204 0 sh3_zsrt139a720_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139a721_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a721.mem 1843 204 1 sh3_zsrt139a721_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139a722_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a722.mem 1843 204 1 sh3_zsrt139a722_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139a723_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a723.mem 1843 204 1 sh3_zsrt139a723_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139a724_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a724.mem 1843 204 1 sh3_zsrt139a724_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139a725_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a725.mem 1843 204 1 sh3_zsrt139a725_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139a726_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a726.mem 1843 204 1 sh3_zsrt139a726_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139a727_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a727.mem 1843 204 1 sh3_zsrt139a727_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a8_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a8_epochs.txt new file mode 100644 index 0000000..298274f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a8_epochs.txt @@ -0,0 +1,46 @@ +# Ch402 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a80_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a80.mem 494 54 0 sh3_zsrt139a80_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a81_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a81.mem 1061 117 0 sh3_zsrt139a81_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139a82_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a82.mem 530 58 1 sh3_zsrt139a82_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139a83_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a83.mem 782 86 0 sh3_zsrt139a83_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139a84_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a84.mem 1232 136 0 sh3_zsrt139a84_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139a85_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a85.mem 1232 136 1 sh3_zsrt139a85_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139a86_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a86.mem 764 84 1 sh3_zsrt139a86_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139a87_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a87.mem 1232 136 1 sh3_zsrt139a87_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139a88_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a88.mem 710 78 1 sh3_zsrt139a88_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139a89_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a89.mem 1232 136 1 sh3_zsrt139a89_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139a810_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a810.mem 1232 136 1 sh3_zsrt139a810_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139a811_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a811.mem 953 105 1 sh3_zsrt139a811_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139a812_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a812.mem 1232 136 1 sh3_zsrt139a812_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139a813_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a813.mem 1097 121 1 sh3_zsrt139a813_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139a814_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a814.mem 170 18 1 sh3_zsrt139a814_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139a815_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a815.mem 62 6 0 sh3_zsrt139a815_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139a816_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a816.mem 620 68 0 sh3_zsrt139a816_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139a817_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a817.mem 620 68 0 sh3_zsrt139a817_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139a818_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a818.mem 620 68 0 sh3_zsrt139a818_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139a819_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a819.mem 620 68 0 sh3_zsrt139a819_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139a820_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a820.mem 1844 204 0 sh3_zsrt139a820_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139a821_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a821.mem 1844 204 1 sh3_zsrt139a821_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139a822_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a822.mem 1844 204 1 sh3_zsrt139a822_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139a823_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a823.mem 1844 204 1 sh3_zsrt139a823_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139a824_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a824.mem 1844 204 1 sh3_zsrt139a824_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139a825_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a825.mem 1844 204 1 sh3_zsrt139a825_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139a826_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a826.mem 1844 204 1 sh3_zsrt139a826_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139a827_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a827.mem 1844 204 1 sh3_zsrt139a827_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139a828_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a828.mem 1142 126 0 sh3_zsrt139a828_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139a829_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a829.mem 1178 130 1 sh3_zsrt139a829_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139a830_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a830.mem 1106 122 1 sh3_zsrt139a830_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139a831_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a831.mem 1070 118 0 sh3_zsrt139a831_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139a832_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a832.mem 998 110 1 sh3_zsrt139a832_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139a833_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a833.mem 1070 118 1 sh3_zsrt139a833_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139a834_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a834.mem 782 86 0 sh3_zsrt139a834_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139a835_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a835.mem 782 86 1 sh3_zsrt139a835_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139a836_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a836.mem 746 82 1 sh3_zsrt139a836_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139a837_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a837.mem 1070 118 0 sh3_zsrt139a837_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139a838_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a838.mem 1034 114 1 sh3_zsrt139a838_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139a839_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a839.mem 1106 122 1 sh3_zsrt139a839_pal.mem 0xc6784386 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139a9_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a9_epochs.txt new file mode 100644 index 0000000..03e623c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139a9_epochs.txt @@ -0,0 +1,46 @@ +# Ch403 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrt139a90_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a90.mem 494 54 0 sh3_zsrt139a90_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139a91_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a91.mem 1061 117 0 sh3_zsrt139a91_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139a92_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a92.mem 530 58 1 sh3_zsrt139a92_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139a93_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a93.mem 782 86 0 sh3_zsrt139a93_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139a94_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a94.mem 1232 136 0 sh3_zsrt139a94_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139a95_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a95.mem 1232 136 1 sh3_zsrt139a95_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139a96_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a96.mem 764 84 1 sh3_zsrt139a96_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139a97_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a97.mem 1232 136 1 sh3_zsrt139a97_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139a98_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a98.mem 710 78 1 sh3_zsrt139a98_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139a99_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a99.mem 1232 136 1 sh3_zsrt139a99_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139a910_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a910.mem 1232 136 1 sh3_zsrt139a910_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139a911_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a911.mem 953 105 1 sh3_zsrt139a911_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139a912_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a912.mem 1232 136 1 sh3_zsrt139a912_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139a913_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a913.mem 1097 121 1 sh3_zsrt139a913_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139a914_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a914.mem 170 18 1 sh3_zsrt139a914_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139a915_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a915.mem 62 6 0 sh3_zsrt139a915_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139a916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a916.mem 620 68 0 sh3_zsrt139a916_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139a917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a917.mem 620 68 0 sh3_zsrt139a917_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139a918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a918.mem 620 68 0 sh3_zsrt139a918_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139a919_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a919.mem 620 68 0 sh3_zsrt139a919_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139a920_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a920.mem 1844 204 0 sh3_zsrt139a920_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139a921_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a921.mem 1844 204 1 sh3_zsrt139a921_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139a922_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a922.mem 1844 204 1 sh3_zsrt139a922_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139a923_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a923.mem 1844 204 1 sh3_zsrt139a923_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139a924_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a924.mem 1844 204 1 sh3_zsrt139a924_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139a925_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a925.mem 1844 204 1 sh3_zsrt139a925_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139a926_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a926.mem 1844 204 1 sh3_zsrt139a926_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139a927_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a927.mem 1844 204 1 sh3_zsrt139a927_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139a928_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a928.mem 1142 126 0 sh3_zsrt139a928_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139a929_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a929.mem 1178 130 1 sh3_zsrt139a929_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139a930_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a930.mem 1106 122 1 sh3_zsrt139a930_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139a931_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a931.mem 1070 118 0 sh3_zsrt139a931_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139a932_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a932.mem 998 110 1 sh3_zsrt139a932_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139a933_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a933.mem 1070 118 1 sh3_zsrt139a933_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139a934_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a934.mem 782 86 0 sh3_zsrt139a934_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139a935_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a935.mem 782 86 1 sh3_zsrt139a935_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139a936_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a936.mem 746 82 1 sh3_zsrt139a936_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139a937_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a937.mem 1070 118 0 sh3_zsrt139a937_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139a938_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a938.mem 1034 114 1 sh3_zsrt139a938_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139a939_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a939.mem 1106 122 1 sh3_zsrt139a939_pal.mem 0xc6784386 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139b1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139b1_epochs.txt new file mode 100644 index 0000000..b6c0c5e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139b1_epochs.txt @@ -0,0 +1,41 @@ +# Ch404 epoch descriptor table (35 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 35 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 153218 11264 480 sh3_zsrt139b10_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b10.mem 1142 126 0 sh3_zsrt139b10_pal.mem 0xc6784386 +1 153643 11264 480 sh3_zsrt139b11_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b11.mem 1034 114 1 sh3_zsrt139b11_pal.mem 0xc6784386 +2 154029 11264 480 sh3_zsrt139b12_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b12.mem 1070 118 1 sh3_zsrt139b12_pal.mem 0xc6784386 +3 154428 11264 480 sh3_zsrt139b13_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b13.mem 1142 126 1 sh3_zsrt139b13_pal.mem 0xc6784386 +4 154853 11264 480 sh3_zsrt139b14_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b14.mem 1106 122 1 sh3_zsrt139b14_pal.mem 0xc6784386 +5 155265 11264 480 sh3_zsrt139b15_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b15.mem 1070 118 1 sh3_zsrt139b15_pal.mem 0xc6784386 +6 155664 11264 480 sh3_zsrt139b16_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b16.mem 1070 118 1 sh3_zsrt139b16_pal.mem 0xc6784386 +7 156063 11264 480 sh3_zsrt139b17_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b17.mem 1358 150 1 sh3_zsrt139b17_pal.mem 0xc6784386 +8 156566 10240 480 sh3_zsrt139b18_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b18.mem 998 110 0 sh3_zsrt139b18_pal.mem 0x00fd9028 +9 156939 10240 480 sh3_zsrt139b19_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b19.mem 890 98 1 sh3_zsrt139b19_pal.mem 0x00fd9028 +10 157273 10240 480 sh3_zsrt139b110_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b110.mem 890 98 1 sh3_zsrt139b110_pal.mem 0x00fd9028 +11 157607 10240 480 sh3_zsrt139b111_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b111.mem 962 106 1 sh3_zsrt139b111_pal.mem 0x00fd9028 +12 157967 10240 480 sh3_zsrt139b112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b112.mem 926 102 1 sh3_zsrt139b112_pal.mem 0x00fd9028 +13 158314 10240 480 sh3_zsrt139b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b113.mem 962 106 1 sh3_zsrt139b113_pal.mem 0x00fd9028 +14 158674 10240 480 sh3_zsrt139b114_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b114.mem 962 106 1 sh3_zsrt139b114_pal.mem 0x00fd9028 +15 159034 10240 480 sh3_zsrt139b115_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b115.mem 1034 114 1 sh3_zsrt139b115_pal.mem 0x00fd9028 +16 159420 10240 480 sh3_zsrt139b116_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b116.mem 890 98 1 sh3_zsrt139b116_pal.mem 0x00fd9028 +17 159754 10240 480 sh3_zsrt139b117_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b117.mem 962 106 1 sh3_zsrt139b117_pal.mem 0x00fd9028 +18 160114 10240 480 sh3_zsrt139b118_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b118.mem 566 62 1 sh3_zsrt139b118_pal.mem 0x00fd9028 +19 160331 10240 480 sh3_zsrt139b119_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b119.mem 1178 130 0 sh3_zsrt139b119_pal.mem 0xd8d19684 +20 160769 10240 480 sh3_zsrt139b120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b120.mem 1070 118 1 sh3_zsrt139b120_pal.mem 0xd8d19684 +21 161168 10240 480 sh3_zsrt139b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b121.mem 1070 118 1 sh3_zsrt139b121_pal.mem 0xd8d19684 +22 161567 10240 480 sh3_zsrt139b122_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b122.mem 1250 138 1 sh3_zsrt139b122_pal.mem 0xd8d19684 +23 162031 10240 480 sh3_zsrt139b123_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b123.mem 710 78 1 sh3_zsrt139b123_pal.mem 0xd8d19684 +24 162300 10240 480 sh3_zsrt139b124_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b124.mem 1142 126 1 sh3_zsrt139b124_pal.mem 0xd8d19684 +25 162725 10240 480 sh3_zsrt139b125_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b125.mem 1178 130 1 sh3_zsrt139b125_pal.mem 0xd8d19684 +26 163163 10240 480 sh3_zsrt139b126_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b126.mem 1106 122 1 sh3_zsrt139b126_pal.mem 0xd8d19684 +27 163575 10240 480 sh3_zsrt139b127_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b127.mem 1142 126 1 sh3_zsrt139b127_pal.mem 0xd8d19684 +28 164000 10240 480 sh3_zsrt139b128_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b128.mem 530 58 1 sh3_zsrt139b128_pal.mem 0xd8d19684 +29 164204 10240 480 sh3_zsrt139b129_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b129.mem 1322 146 0 sh3_zsrt139b129_pal.mem 0xaa4e7e05 +30 164694 10240 480 sh3_zsrt139b130_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b130.mem 674 74 1 sh3_zsrt139b130_pal.mem 0xaa4e7e05 +31 164950 10240 480 sh3_zsrt139b131_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b131.mem 602 66 1 sh3_zsrt139b131_pal.mem 0xaa4e7e05 +32 165180 10240 480 sh3_zsrt139b132_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b132.mem 458 50 1 sh3_zsrt139b132_pal.mem 0xaa4e7e05 +33 175995 12288 480 sh3_zsrt139b133_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b133.mem 1214 134 0 sh3_zsrt139b133_pal.mem 0x56ebf1d1 +34 176446 12288 480 sh3_zsrt139b134_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b134.mem 1376 152 1 sh3_zsrt139b134_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139b2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139b2_epochs.txt new file mode 100644 index 0000000..6d75ee2 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139b2_epochs.txt @@ -0,0 +1,78 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 75 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139b20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139b20.mem 494 54 0 sh3_zsrt139b20_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139b21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139b21.mem 1061 117 0 sh3_zsrt139b21_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139b22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139b22.mem 530 58 1 sh3_zsrt139b22_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139b23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139b23.mem 782 86 0 sh3_zsrt139b23_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139b24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b24.mem 1232 136 0 sh3_zsrt139b24_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139b25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b25.mem 1232 136 1 sh3_zsrt139b25_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139b26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b26.mem 764 84 1 sh3_zsrt139b26_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139b27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b27.mem 1232 136 1 sh3_zsrt139b27_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139b28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b28.mem 710 78 1 sh3_zsrt139b28_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139b29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b29.mem 1232 136 1 sh3_zsrt139b29_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139b210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b210.mem 1232 136 1 sh3_zsrt139b210_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139b211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b211.mem 953 105 1 sh3_zsrt139b211_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139b212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b212.mem 1232 136 1 sh3_zsrt139b212_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139b213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b213.mem 1097 121 1 sh3_zsrt139b213_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139b214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b214.mem 170 18 1 sh3_zsrt139b214_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139b215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b215.mem 62 6 0 sh3_zsrt139b215_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139b216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139b216.mem 620 68 0 sh3_zsrt139b216_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139b217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139b217.mem 620 68 0 sh3_zsrt139b217_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139b218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139b218.mem 620 68 0 sh3_zsrt139b218_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139b219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139b219.mem 620 68 0 sh3_zsrt139b219_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139b220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b220.mem 1844 204 0 sh3_zsrt139b220_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139b221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b221.mem 1844 204 1 sh3_zsrt139b221_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139b222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b222.mem 1844 204 1 sh3_zsrt139b222_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139b223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b223.mem 1844 204 1 sh3_zsrt139b223_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139b224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b224.mem 1844 204 1 sh3_zsrt139b224_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139b225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b225.mem 1844 204 1 sh3_zsrt139b225_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139b226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b226.mem 1844 204 1 sh3_zsrt139b226_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139b227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b227.mem 1844 204 1 sh3_zsrt139b227_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139b228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b228.mem 1142 126 0 sh3_zsrt139b228_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139b229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b229.mem 1178 130 1 sh3_zsrt139b229_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139b230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b230.mem 1106 122 1 sh3_zsrt139b230_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139b231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b231.mem 1070 118 0 sh3_zsrt139b231_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139b232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b232.mem 998 110 1 sh3_zsrt139b232_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139b233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b233.mem 1070 118 1 sh3_zsrt139b233_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139b234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b234.mem 782 86 0 sh3_zsrt139b234_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139b235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b235.mem 782 86 1 sh3_zsrt139b235_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139b236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b236.mem 746 82 1 sh3_zsrt139b236_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139b237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b237.mem 1070 118 0 sh3_zsrt139b237_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139b238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b238.mem 1034 114 1 sh3_zsrt139b238_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139b239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b239.mem 1106 122 1 sh3_zsrt139b239_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139b240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b240.mem 1142 126 0 sh3_zsrt139b240_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139b241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b241.mem 1034 114 1 sh3_zsrt139b241_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139b242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b242.mem 1070 118 1 sh3_zsrt139b242_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139b243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b243.mem 1142 126 1 sh3_zsrt139b243_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139b244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b244.mem 1106 122 1 sh3_zsrt139b244_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139b245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b245.mem 1070 118 1 sh3_zsrt139b245_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139b246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b246.mem 1070 118 1 sh3_zsrt139b246_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139b247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b247.mem 1358 150 1 sh3_zsrt139b247_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139b248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b248.mem 998 110 0 sh3_zsrt139b248_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139b249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b249.mem 890 98 1 sh3_zsrt139b249_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139b250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b250.mem 890 98 1 sh3_zsrt139b250_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139b251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b251.mem 962 106 1 sh3_zsrt139b251_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139b252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b252.mem 926 102 1 sh3_zsrt139b252_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139b253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b253.mem 962 106 1 sh3_zsrt139b253_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139b254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b254.mem 962 106 1 sh3_zsrt139b254_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139b255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b255.mem 1034 114 1 sh3_zsrt139b255_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139b256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b256.mem 890 98 1 sh3_zsrt139b256_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139b257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b257.mem 962 106 1 sh3_zsrt139b257_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139b258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b258.mem 566 62 1 sh3_zsrt139b258_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139b259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b259.mem 1178 130 0 sh3_zsrt139b259_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139b260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b260.mem 1070 118 1 sh3_zsrt139b260_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139b261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b261.mem 1070 118 1 sh3_zsrt139b261_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139b262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b262.mem 1250 138 1 sh3_zsrt139b262_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139b263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b263.mem 710 78 1 sh3_zsrt139b263_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139b264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b264.mem 1142 126 1 sh3_zsrt139b264_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139b265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b265.mem 1178 130 1 sh3_zsrt139b265_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139b266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b266.mem 1106 122 1 sh3_zsrt139b266_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139b267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b267.mem 1142 126 1 sh3_zsrt139b267_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139b268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b268.mem 530 58 1 sh3_zsrt139b268_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139b269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b269.mem 1322 146 0 sh3_zsrt139b269_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139b270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b270.mem 674 74 1 sh3_zsrt139b270_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139b271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b271.mem 602 66 1 sh3_zsrt139b271_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139b272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b272.mem 458 50 1 sh3_zsrt139b272_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139b273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b273.mem 1214 134 0 sh3_zsrt139b273_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139b274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b274.mem 1376 152 1 sh3_zsrt139b274_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139c1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c1_epochs.txt new file mode 100644 index 0000000..d63f7f7 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c1_epochs.txt @@ -0,0 +1,9 @@ +# Ch405 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139c10_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c10.mem 656 72 0 sh3_zsrt139c10_pal.mem 0x158afe76 +1 196868 10240 480 sh3_zsrt139c11_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c11.mem 656 72 1 sh3_zsrt139c11_pal.mem 0x158afe76 +2 197327 10240 480 sh3_zsrt139c12_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c12.mem 620 68 1 sh3_zsrt139c12_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139c2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c2_epochs.txt new file mode 100644 index 0000000..8c72295 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c2_epochs.txt @@ -0,0 +1,81 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1', 'zsrt139c1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 78 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139c20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139c20.mem 494 54 0 sh3_zsrt139c20_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139c21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c21.mem 1061 117 0 sh3_zsrt139c21_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139c22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c22.mem 530 58 1 sh3_zsrt139c22_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139c23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139c23.mem 782 86 0 sh3_zsrt139c23_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139c24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c24.mem 1232 136 0 sh3_zsrt139c24_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139c25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c25.mem 1232 136 1 sh3_zsrt139c25_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139c26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c26.mem 764 84 1 sh3_zsrt139c26_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139c27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c27.mem 1232 136 1 sh3_zsrt139c27_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139c28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c28.mem 710 78 1 sh3_zsrt139c28_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139c29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c29.mem 1232 136 1 sh3_zsrt139c29_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139c210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c210.mem 1232 136 1 sh3_zsrt139c210_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139c211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c211.mem 953 105 1 sh3_zsrt139c211_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139c212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c212.mem 1232 136 1 sh3_zsrt139c212_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139c213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c213.mem 1097 121 1 sh3_zsrt139c213_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139c214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c214.mem 170 18 1 sh3_zsrt139c214_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139c215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c215.mem 62 6 0 sh3_zsrt139c215_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139c216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c216.mem 620 68 0 sh3_zsrt139c216_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139c217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139c217.mem 620 68 0 sh3_zsrt139c217_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139c218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c218.mem 620 68 0 sh3_zsrt139c218_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139c219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139c219.mem 620 68 0 sh3_zsrt139c219_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139c220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c220.mem 1844 204 0 sh3_zsrt139c220_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139c221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c221.mem 1844 204 1 sh3_zsrt139c221_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139c222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c222.mem 1844 204 1 sh3_zsrt139c222_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139c223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c223.mem 1844 204 1 sh3_zsrt139c223_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139c224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c224.mem 1844 204 1 sh3_zsrt139c224_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139c225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c225.mem 1844 204 1 sh3_zsrt139c225_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139c226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c226.mem 1844 204 1 sh3_zsrt139c226_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139c227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c227.mem 1844 204 1 sh3_zsrt139c227_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139c228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c228.mem 1142 126 0 sh3_zsrt139c228_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139c229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c229.mem 1178 130 1 sh3_zsrt139c229_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139c230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c230.mem 1106 122 1 sh3_zsrt139c230_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139c231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c231.mem 1070 118 0 sh3_zsrt139c231_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139c232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c232.mem 998 110 1 sh3_zsrt139c232_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139c233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c233.mem 1070 118 1 sh3_zsrt139c233_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139c234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c234.mem 782 86 0 sh3_zsrt139c234_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139c235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c235.mem 782 86 1 sh3_zsrt139c235_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139c236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c236.mem 746 82 1 sh3_zsrt139c236_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139c237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c237.mem 1070 118 0 sh3_zsrt139c237_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139c238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c238.mem 1034 114 1 sh3_zsrt139c238_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139c239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c239.mem 1106 122 1 sh3_zsrt139c239_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139c240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c240.mem 1142 126 0 sh3_zsrt139c240_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139c241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c241.mem 1034 114 1 sh3_zsrt139c241_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139c242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c242.mem 1070 118 1 sh3_zsrt139c242_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139c243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c243.mem 1142 126 1 sh3_zsrt139c243_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139c244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c244.mem 1106 122 1 sh3_zsrt139c244_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139c245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c245.mem 1070 118 1 sh3_zsrt139c245_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139c246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c246.mem 1070 118 1 sh3_zsrt139c246_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139c247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c247.mem 1358 150 1 sh3_zsrt139c247_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139c248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c248.mem 998 110 0 sh3_zsrt139c248_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139c249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c249.mem 890 98 1 sh3_zsrt139c249_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139c250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c250.mem 890 98 1 sh3_zsrt139c250_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139c251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c251.mem 962 106 1 sh3_zsrt139c251_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139c252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c252.mem 926 102 1 sh3_zsrt139c252_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139c253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c253.mem 962 106 1 sh3_zsrt139c253_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139c254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c254.mem 962 106 1 sh3_zsrt139c254_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139c255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c255.mem 1034 114 1 sh3_zsrt139c255_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139c256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c256.mem 890 98 1 sh3_zsrt139c256_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139c257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c257.mem 962 106 1 sh3_zsrt139c257_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139c258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c258.mem 566 62 1 sh3_zsrt139c258_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139c259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c259.mem 1178 130 0 sh3_zsrt139c259_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139c260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c260.mem 1070 118 1 sh3_zsrt139c260_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139c261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c261.mem 1070 118 1 sh3_zsrt139c261_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139c262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c262.mem 1250 138 1 sh3_zsrt139c262_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139c263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c263.mem 710 78 1 sh3_zsrt139c263_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139c264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c264.mem 1142 126 1 sh3_zsrt139c264_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139c265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c265.mem 1178 130 1 sh3_zsrt139c265_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139c266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c266.mem 1106 122 1 sh3_zsrt139c266_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139c267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c267.mem 1142 126 1 sh3_zsrt139c267_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139c268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c268.mem 530 58 1 sh3_zsrt139c268_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139c269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c269.mem 1322 146 0 sh3_zsrt139c269_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139c270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c270.mem 674 74 1 sh3_zsrt139c270_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139c271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c271.mem 602 66 1 sh3_zsrt139c271_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139c272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c272.mem 458 50 1 sh3_zsrt139c272_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139c273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c273.mem 1214 134 0 sh3_zsrt139c273_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139c274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c274.mem 1376 152 1 sh3_zsrt139c274_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139c275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c275.mem 656 72 0 sh3_zsrt139c275_pal.mem 0x158afe76 +76 196868 10240 480 sh3_zsrt139c276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c276.mem 656 72 1 sh3_zsrt139c276_pal.mem 0x158afe76 +77 197327 10240 480 sh3_zsrt139c277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c277.mem 620 68 1 sh3_zsrt139c277_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139c3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c3_epochs.txt new file mode 100644 index 0000000..ab74fe4 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c3_epochs.txt @@ -0,0 +1,218 @@ +# Ch405 epoch descriptor table (212 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 212 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139c30_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c30.mem 17 1 0 sh3_zsrt139c30_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139c31_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c31.mem 17 1 1 sh3_zsrt139c31_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139c32_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c32.mem 17 1 1 sh3_zsrt139c32_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139c33_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c33.mem 17 1 1 sh3_zsrt139c33_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139c34_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c34.mem 17 1 1 sh3_zsrt139c34_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139c35_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c35.mem 17 1 1 sh3_zsrt139c35_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139c36_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c36.mem 17 1 1 sh3_zsrt139c36_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139c37_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c37.mem 17 1 1 sh3_zsrt139c37_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139c38_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c38.mem 17 1 1 sh3_zsrt139c38_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139c39_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c39.mem 17 1 1 sh3_zsrt139c39_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139c310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c310.mem 17 1 1 sh3_zsrt139c310_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139c311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c311.mem 17 1 1 sh3_zsrt139c311_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139c312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c312.mem 17 1 1 sh3_zsrt139c312_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139c313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c313.mem 17 1 1 sh3_zsrt139c313_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139c314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c314.mem 17 1 1 sh3_zsrt139c314_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139c315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c315.mem 17 1 1 sh3_zsrt139c315_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139c316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c316.mem 17 1 1 sh3_zsrt139c316_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139c317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c317.mem 17 1 1 sh3_zsrt139c317_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139c318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c318.mem 17 1 1 sh3_zsrt139c318_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139c319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c319.mem 17 1 1 sh3_zsrt139c319_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139c320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c320.mem 17 1 1 sh3_zsrt139c320_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139c321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c321.mem 17 1 1 sh3_zsrt139c321_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139c322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c322.mem 17 1 1 sh3_zsrt139c322_pal.mem 0x158afe76 +23 196494 10240 480 sh3_zsrt139c323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c323.mem 17 1 1 sh3_zsrt139c323_pal.mem 0x158afe76 +24 196494 10240 480 sh3_zsrt139c324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c324.mem 17 1 1 sh3_zsrt139c324_pal.mem 0x158afe76 +25 196494 10240 480 sh3_zsrt139c325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c325.mem 17 1 1 sh3_zsrt139c325_pal.mem 0x158afe76 +26 196494 10240 480 sh3_zsrt139c326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c326.mem 17 1 1 sh3_zsrt139c326_pal.mem 0x158afe76 +27 196494 10240 480 sh3_zsrt139c327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c327.mem 17 1 1 sh3_zsrt139c327_pal.mem 0x158afe76 +28 196494 10240 480 sh3_zsrt139c328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c328.mem 17 1 1 sh3_zsrt139c328_pal.mem 0x158afe76 +29 196494 10240 480 sh3_zsrt139c329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c329.mem 17 1 1 sh3_zsrt139c329_pal.mem 0x158afe76 +30 196494 10240 480 sh3_zsrt139c330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c330.mem 17 1 1 sh3_zsrt139c330_pal.mem 0x158afe76 +31 196494 10240 480 sh3_zsrt139c331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c331.mem 17 1 1 sh3_zsrt139c331_pal.mem 0x158afe76 +32 196494 10240 480 sh3_zsrt139c332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c332.mem 17 1 1 sh3_zsrt139c332_pal.mem 0x158afe76 +33 196494 10240 480 sh3_zsrt139c333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c333.mem 17 1 1 sh3_zsrt139c333_pal.mem 0x158afe76 +34 196494 10240 480 sh3_zsrt139c334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c334.mem 17 1 1 sh3_zsrt139c334_pal.mem 0x158afe76 +35 196494 10240 480 sh3_zsrt139c335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c335.mem 17 1 1 sh3_zsrt139c335_pal.mem 0x158afe76 +36 196494 10240 480 sh3_zsrt139c336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c336.mem 17 1 1 sh3_zsrt139c336_pal.mem 0x158afe76 +37 196494 10240 480 sh3_zsrt139c337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c337.mem 17 1 1 sh3_zsrt139c337_pal.mem 0x158afe76 +38 196494 10240 480 sh3_zsrt139c338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c338.mem 17 1 1 sh3_zsrt139c338_pal.mem 0x158afe76 +39 196494 10240 480 sh3_zsrt139c339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c339.mem 17 1 1 sh3_zsrt139c339_pal.mem 0x158afe76 +40 196494 10240 480 sh3_zsrt139c340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c340.mem 17 1 1 sh3_zsrt139c340_pal.mem 0x158afe76 +41 196494 10240 480 sh3_zsrt139c341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c341.mem 17 1 1 sh3_zsrt139c341_pal.mem 0x158afe76 +42 196494 10240 480 sh3_zsrt139c342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c342.mem 17 1 1 sh3_zsrt139c342_pal.mem 0x158afe76 +43 196494 10240 480 sh3_zsrt139c343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c343.mem 17 1 1 sh3_zsrt139c343_pal.mem 0x158afe76 +44 196494 10240 480 sh3_zsrt139c344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c344.mem 17 1 1 sh3_zsrt139c344_pal.mem 0x158afe76 +45 196494 10240 480 sh3_zsrt139c345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c345.mem 17 1 1 sh3_zsrt139c345_pal.mem 0x158afe76 +46 196494 10240 480 sh3_zsrt139c346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c346.mem 17 1 1 sh3_zsrt139c346_pal.mem 0x158afe76 +47 196494 10240 480 sh3_zsrt139c347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c347.mem 17 1 1 sh3_zsrt139c347_pal.mem 0x158afe76 +48 196494 10240 480 sh3_zsrt139c348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c348.mem 17 1 1 sh3_zsrt139c348_pal.mem 0x158afe76 +49 196494 10240 480 sh3_zsrt139c349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c349.mem 17 1 1 sh3_zsrt139c349_pal.mem 0x158afe76 +50 196494 10240 480 sh3_zsrt139c350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c350.mem 17 1 1 sh3_zsrt139c350_pal.mem 0x158afe76 +51 196494 10240 480 sh3_zsrt139c351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c351.mem 17 1 1 sh3_zsrt139c351_pal.mem 0x158afe76 +52 196494 10240 480 sh3_zsrt139c352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c352.mem 17 1 1 sh3_zsrt139c352_pal.mem 0x158afe76 +53 196494 10240 480 sh3_zsrt139c353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c353.mem 17 1 1 sh3_zsrt139c353_pal.mem 0x158afe76 +54 196494 10240 480 sh3_zsrt139c354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c354.mem 17 1 1 sh3_zsrt139c354_pal.mem 0x158afe76 +55 196494 10240 480 sh3_zsrt139c355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c355.mem 17 1 1 sh3_zsrt139c355_pal.mem 0x158afe76 +56 196494 10240 480 sh3_zsrt139c356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c356.mem 17 1 1 sh3_zsrt139c356_pal.mem 0x158afe76 +57 196494 10240 480 sh3_zsrt139c357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c357.mem 17 1 1 sh3_zsrt139c357_pal.mem 0x158afe76 +58 196494 10240 480 sh3_zsrt139c358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c358.mem 17 1 1 sh3_zsrt139c358_pal.mem 0x158afe76 +59 196494 10240 480 sh3_zsrt139c359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c359.mem 17 1 1 sh3_zsrt139c359_pal.mem 0x158afe76 +60 196494 10240 480 sh3_zsrt139c360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c360.mem 17 1 1 sh3_zsrt139c360_pal.mem 0x158afe76 +61 196494 10240 480 sh3_zsrt139c361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c361.mem 17 1 1 sh3_zsrt139c361_pal.mem 0x158afe76 +62 196494 10240 480 sh3_zsrt139c362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c362.mem 17 1 1 sh3_zsrt139c362_pal.mem 0x158afe76 +63 196494 10240 480 sh3_zsrt139c363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c363.mem 17 1 1 sh3_zsrt139c363_pal.mem 0x158afe76 +64 196494 10240 480 sh3_zsrt139c364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c364.mem 17 1 1 sh3_zsrt139c364_pal.mem 0x158afe76 +65 196494 10240 480 sh3_zsrt139c365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c365.mem 17 1 1 sh3_zsrt139c365_pal.mem 0x158afe76 +66 196494 10240 480 sh3_zsrt139c366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c366.mem 17 1 1 sh3_zsrt139c366_pal.mem 0x158afe76 +67 196494 10240 480 sh3_zsrt139c367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c367.mem 17 1 1 sh3_zsrt139c367_pal.mem 0x158afe76 +68 196494 10240 480 sh3_zsrt139c368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c368.mem 17 1 1 sh3_zsrt139c368_pal.mem 0x158afe76 +69 196494 10240 480 sh3_zsrt139c369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c369.mem 17 1 1 sh3_zsrt139c369_pal.mem 0x158afe76 +70 196494 10240 480 sh3_zsrt139c370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c370.mem 17 1 1 sh3_zsrt139c370_pal.mem 0x158afe76 +71 196494 10240 480 sh3_zsrt139c371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c371.mem 17 1 1 sh3_zsrt139c371_pal.mem 0x158afe76 +72 196868 10240 480 sh3_zsrt139c372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c372.mem 17 1 1 sh3_zsrt139c372_pal.mem 0x158afe76 +73 196868 10240 480 sh3_zsrt139c373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c373.mem 17 1 1 sh3_zsrt139c373_pal.mem 0x158afe76 +74 196868 10240 480 sh3_zsrt139c374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c374.mem 17 1 1 sh3_zsrt139c374_pal.mem 0x158afe76 +75 196868 10240 480 sh3_zsrt139c375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c375.mem 17 1 1 sh3_zsrt139c375_pal.mem 0x158afe76 +76 196868 10240 480 sh3_zsrt139c376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c376.mem 17 1 1 sh3_zsrt139c376_pal.mem 0x158afe76 +77 196868 10240 480 sh3_zsrt139c377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c377.mem 17 1 1 sh3_zsrt139c377_pal.mem 0x158afe76 +78 196868 10240 480 sh3_zsrt139c378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c378.mem 17 1 1 sh3_zsrt139c378_pal.mem 0x158afe76 +79 196868 10240 480 sh3_zsrt139c379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c379.mem 17 1 1 sh3_zsrt139c379_pal.mem 0x158afe76 +80 196868 10240 480 sh3_zsrt139c380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c380.mem 17 1 1 sh3_zsrt139c380_pal.mem 0x158afe76 +81 196868 10240 480 sh3_zsrt139c381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c381.mem 17 1 1 sh3_zsrt139c381_pal.mem 0x158afe76 +82 196868 10240 480 sh3_zsrt139c382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c382.mem 17 1 1 sh3_zsrt139c382_pal.mem 0x158afe76 +83 196868 10240 480 sh3_zsrt139c383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c383.mem 17 1 1 sh3_zsrt139c383_pal.mem 0x158afe76 +84 196868 10240 480 sh3_zsrt139c384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c384.mem 17 1 1 sh3_zsrt139c384_pal.mem 0x158afe76 +85 196868 10240 480 sh3_zsrt139c385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c385.mem 17 1 1 sh3_zsrt139c385_pal.mem 0x158afe76 +86 196868 10240 480 sh3_zsrt139c386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c386.mem 17 1 1 sh3_zsrt139c386_pal.mem 0x158afe76 +87 196868 10240 480 sh3_zsrt139c387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c387.mem 17 1 1 sh3_zsrt139c387_pal.mem 0x158afe76 +88 196868 10240 480 sh3_zsrt139c388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c388.mem 17 1 1 sh3_zsrt139c388_pal.mem 0x158afe76 +89 196868 10240 480 sh3_zsrt139c389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c389.mem 17 1 1 sh3_zsrt139c389_pal.mem 0x158afe76 +90 196868 10240 480 sh3_zsrt139c390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c390.mem 17 1 1 sh3_zsrt139c390_pal.mem 0x158afe76 +91 196868 10240 480 sh3_zsrt139c391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c391.mem 17 1 1 sh3_zsrt139c391_pal.mem 0x158afe76 +92 196868 10240 480 sh3_zsrt139c392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c392.mem 17 1 1 sh3_zsrt139c392_pal.mem 0x158afe76 +93 196868 10240 480 sh3_zsrt139c393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c393.mem 17 1 1 sh3_zsrt139c393_pal.mem 0x158afe76 +94 196868 10240 480 sh3_zsrt139c394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c394.mem 17 1 1 sh3_zsrt139c394_pal.mem 0x158afe76 +95 196868 10240 480 sh3_zsrt139c395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c395.mem 17 1 1 sh3_zsrt139c395_pal.mem 0x158afe76 +96 196868 10240 480 sh3_zsrt139c396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c396.mem 17 1 1 sh3_zsrt139c396_pal.mem 0x158afe76 +97 196868 10240 480 sh3_zsrt139c397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c397.mem 17 1 1 sh3_zsrt139c397_pal.mem 0x158afe76 +98 196868 10240 480 sh3_zsrt139c398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c398.mem 17 1 1 sh3_zsrt139c398_pal.mem 0x158afe76 +99 196868 10240 480 sh3_zsrt139c399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c399.mem 17 1 1 sh3_zsrt139c399_pal.mem 0x158afe76 +100 196868 10240 480 sh3_zsrt139c3100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3100.mem 17 1 1 sh3_zsrt139c3100_pal.mem 0x158afe76 +101 196868 10240 480 sh3_zsrt139c3101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3101.mem 17 1 1 sh3_zsrt139c3101_pal.mem 0x158afe76 +102 196868 10240 480 sh3_zsrt139c3102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3102.mem 17 1 1 sh3_zsrt139c3102_pal.mem 0x158afe76 +103 196868 10240 480 sh3_zsrt139c3103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3103.mem 17 1 1 sh3_zsrt139c3103_pal.mem 0x158afe76 +104 196868 10240 480 sh3_zsrt139c3104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3104.mem 17 1 1 sh3_zsrt139c3104_pal.mem 0x158afe76 +105 196868 10240 480 sh3_zsrt139c3105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3105.mem 17 1 1 sh3_zsrt139c3105_pal.mem 0x158afe76 +106 196868 10240 480 sh3_zsrt139c3106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3106.mem 17 1 1 sh3_zsrt139c3106_pal.mem 0x158afe76 +107 196868 10240 480 sh3_zsrt139c3107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3107.mem 17 1 1 sh3_zsrt139c3107_pal.mem 0x158afe76 +108 196868 10240 480 sh3_zsrt139c3108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3108.mem 17 1 1 sh3_zsrt139c3108_pal.mem 0x158afe76 +109 196868 10240 480 sh3_zsrt139c3109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3109.mem 17 1 1 sh3_zsrt139c3109_pal.mem 0x158afe76 +110 196868 10240 480 sh3_zsrt139c3110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3110.mem 17 1 1 sh3_zsrt139c3110_pal.mem 0x158afe76 +111 196868 10240 480 sh3_zsrt139c3111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3111.mem 17 1 1 sh3_zsrt139c3111_pal.mem 0x158afe76 +112 196868 10240 480 sh3_zsrt139c3112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3112.mem 17 1 1 sh3_zsrt139c3112_pal.mem 0x158afe76 +113 196868 10240 480 sh3_zsrt139c3113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3113.mem 17 1 1 sh3_zsrt139c3113_pal.mem 0x158afe76 +114 196868 10240 480 sh3_zsrt139c3114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3114.mem 17 1 1 sh3_zsrt139c3114_pal.mem 0x158afe76 +115 196868 10240 480 sh3_zsrt139c3115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3115.mem 17 1 1 sh3_zsrt139c3115_pal.mem 0x158afe76 +116 196868 10240 480 sh3_zsrt139c3116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3116.mem 17 1 1 sh3_zsrt139c3116_pal.mem 0x158afe76 +117 196868 10240 480 sh3_zsrt139c3117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3117.mem 17 1 1 sh3_zsrt139c3117_pal.mem 0x158afe76 +118 196868 10240 480 sh3_zsrt139c3118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3118.mem 17 1 1 sh3_zsrt139c3118_pal.mem 0x158afe76 +119 196868 10240 480 sh3_zsrt139c3119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3119.mem 17 1 1 sh3_zsrt139c3119_pal.mem 0x158afe76 +120 196868 10240 480 sh3_zsrt139c3120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3120.mem 17 1 1 sh3_zsrt139c3120_pal.mem 0x158afe76 +121 196868 10240 480 sh3_zsrt139c3121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3121.mem 17 1 1 sh3_zsrt139c3121_pal.mem 0x158afe76 +122 196868 10240 480 sh3_zsrt139c3122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3122.mem 17 1 1 sh3_zsrt139c3122_pal.mem 0x158afe76 +123 196868 10240 480 sh3_zsrt139c3123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3123.mem 17 1 1 sh3_zsrt139c3123_pal.mem 0x158afe76 +124 196868 10240 480 sh3_zsrt139c3124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3124.mem 17 1 1 sh3_zsrt139c3124_pal.mem 0x158afe76 +125 196868 10240 480 sh3_zsrt139c3125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3125.mem 17 1 1 sh3_zsrt139c3125_pal.mem 0x158afe76 +126 196868 10240 480 sh3_zsrt139c3126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3126.mem 17 1 1 sh3_zsrt139c3126_pal.mem 0x158afe76 +127 196868 10240 480 sh3_zsrt139c3127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3127.mem 17 1 1 sh3_zsrt139c3127_pal.mem 0x158afe76 +128 196868 10240 480 sh3_zsrt139c3128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3128.mem 17 1 1 sh3_zsrt139c3128_pal.mem 0x158afe76 +129 196868 10240 480 sh3_zsrt139c3129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3129.mem 17 1 1 sh3_zsrt139c3129_pal.mem 0x158afe76 +130 196868 10240 480 sh3_zsrt139c3130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3130.mem 17 1 1 sh3_zsrt139c3130_pal.mem 0x158afe76 +131 196868 10240 480 sh3_zsrt139c3131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3131.mem 17 1 1 sh3_zsrt139c3131_pal.mem 0x158afe76 +132 196868 10240 480 sh3_zsrt139c3132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3132.mem 17 1 1 sh3_zsrt139c3132_pal.mem 0x158afe76 +133 196868 10240 480 sh3_zsrt139c3133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3133.mem 17 1 1 sh3_zsrt139c3133_pal.mem 0x158afe76 +134 196868 10240 480 sh3_zsrt139c3134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3134.mem 17 1 1 sh3_zsrt139c3134_pal.mem 0x158afe76 +135 196868 10240 480 sh3_zsrt139c3135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3135.mem 17 1 1 sh3_zsrt139c3135_pal.mem 0x158afe76 +136 196868 10240 480 sh3_zsrt139c3136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3136.mem 17 1 1 sh3_zsrt139c3136_pal.mem 0x158afe76 +137 196868 10240 480 sh3_zsrt139c3137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3137.mem 17 1 1 sh3_zsrt139c3137_pal.mem 0x158afe76 +138 196868 10240 480 sh3_zsrt139c3138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3138.mem 17 1 1 sh3_zsrt139c3138_pal.mem 0x158afe76 +139 196868 10240 480 sh3_zsrt139c3139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3139.mem 17 1 1 sh3_zsrt139c3139_pal.mem 0x158afe76 +140 196868 10240 480 sh3_zsrt139c3140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3140.mem 17 1 1 sh3_zsrt139c3140_pal.mem 0x158afe76 +141 196868 10240 480 sh3_zsrt139c3141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3141.mem 17 1 1 sh3_zsrt139c3141_pal.mem 0x158afe76 +142 196868 10240 480 sh3_zsrt139c3142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3142.mem 17 1 1 sh3_zsrt139c3142_pal.mem 0x158afe76 +143 196868 10240 480 sh3_zsrt139c3143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3143.mem 17 1 1 sh3_zsrt139c3143_pal.mem 0x158afe76 +144 197327 10240 480 sh3_zsrt139c3144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3144.mem 17 1 1 sh3_zsrt139c3144_pal.mem 0x158afe76 +145 197327 10240 480 sh3_zsrt139c3145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3145.mem 17 1 1 sh3_zsrt139c3145_pal.mem 0x158afe76 +146 197327 10240 480 sh3_zsrt139c3146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3146.mem 17 1 1 sh3_zsrt139c3146_pal.mem 0x158afe76 +147 197327 10240 480 sh3_zsrt139c3147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3147.mem 17 1 1 sh3_zsrt139c3147_pal.mem 0x158afe76 +148 197327 10240 480 sh3_zsrt139c3148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3148.mem 17 1 1 sh3_zsrt139c3148_pal.mem 0x158afe76 +149 197327 10240 480 sh3_zsrt139c3149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3149.mem 17 1 1 sh3_zsrt139c3149_pal.mem 0x158afe76 +150 197327 10240 480 sh3_zsrt139c3150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3150.mem 17 1 1 sh3_zsrt139c3150_pal.mem 0x158afe76 +151 197327 10240 480 sh3_zsrt139c3151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3151.mem 17 1 1 sh3_zsrt139c3151_pal.mem 0x158afe76 +152 197327 10240 480 sh3_zsrt139c3152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3152.mem 17 1 1 sh3_zsrt139c3152_pal.mem 0x158afe76 +153 197327 10240 480 sh3_zsrt139c3153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3153.mem 17 1 1 sh3_zsrt139c3153_pal.mem 0x158afe76 +154 197327 10240 480 sh3_zsrt139c3154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3154.mem 17 1 1 sh3_zsrt139c3154_pal.mem 0x158afe76 +155 197327 10240 480 sh3_zsrt139c3155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3155.mem 17 1 1 sh3_zsrt139c3155_pal.mem 0x158afe76 +156 197327 10240 480 sh3_zsrt139c3156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3156.mem 17 1 1 sh3_zsrt139c3156_pal.mem 0x158afe76 +157 197327 10240 480 sh3_zsrt139c3157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3157.mem 17 1 1 sh3_zsrt139c3157_pal.mem 0x158afe76 +158 197327 10240 480 sh3_zsrt139c3158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3158.mem 17 1 1 sh3_zsrt139c3158_pal.mem 0x158afe76 +159 197327 10240 480 sh3_zsrt139c3159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3159.mem 17 1 1 sh3_zsrt139c3159_pal.mem 0x158afe76 +160 197327 10240 480 sh3_zsrt139c3160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3160.mem 17 1 1 sh3_zsrt139c3160_pal.mem 0x158afe76 +161 197327 10240 480 sh3_zsrt139c3161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3161.mem 17 1 1 sh3_zsrt139c3161_pal.mem 0x158afe76 +162 197327 10240 480 sh3_zsrt139c3162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3162.mem 17 1 1 sh3_zsrt139c3162_pal.mem 0x158afe76 +163 197327 10240 480 sh3_zsrt139c3163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3163.mem 17 1 1 sh3_zsrt139c3163_pal.mem 0x158afe76 +164 197327 10240 480 sh3_zsrt139c3164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3164.mem 17 1 1 sh3_zsrt139c3164_pal.mem 0x158afe76 +165 197327 10240 480 sh3_zsrt139c3165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3165.mem 17 1 1 sh3_zsrt139c3165_pal.mem 0x158afe76 +166 197327 10240 480 sh3_zsrt139c3166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3166.mem 17 1 1 sh3_zsrt139c3166_pal.mem 0x158afe76 +167 197327 10240 480 sh3_zsrt139c3167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3167.mem 17 1 1 sh3_zsrt139c3167_pal.mem 0x158afe76 +168 197327 10240 480 sh3_zsrt139c3168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3168.mem 17 1 1 sh3_zsrt139c3168_pal.mem 0x158afe76 +169 197327 10240 480 sh3_zsrt139c3169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3169.mem 17 1 1 sh3_zsrt139c3169_pal.mem 0x158afe76 +170 197327 10240 480 sh3_zsrt139c3170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3170.mem 17 1 1 sh3_zsrt139c3170_pal.mem 0x158afe76 +171 197327 10240 480 sh3_zsrt139c3171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3171.mem 17 1 1 sh3_zsrt139c3171_pal.mem 0x158afe76 +172 197327 10240 480 sh3_zsrt139c3172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3172.mem 17 1 1 sh3_zsrt139c3172_pal.mem 0x158afe76 +173 197327 10240 480 sh3_zsrt139c3173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3173.mem 17 1 1 sh3_zsrt139c3173_pal.mem 0x158afe76 +174 197327 10240 480 sh3_zsrt139c3174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3174.mem 17 1 1 sh3_zsrt139c3174_pal.mem 0x158afe76 +175 197327 10240 480 sh3_zsrt139c3175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3175.mem 17 1 1 sh3_zsrt139c3175_pal.mem 0x158afe76 +176 197327 10240 480 sh3_zsrt139c3176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3176.mem 17 1 1 sh3_zsrt139c3176_pal.mem 0x158afe76 +177 197327 10240 480 sh3_zsrt139c3177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3177.mem 17 1 1 sh3_zsrt139c3177_pal.mem 0x158afe76 +178 197327 10240 480 sh3_zsrt139c3178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3178.mem 17 1 1 sh3_zsrt139c3178_pal.mem 0x158afe76 +179 197327 10240 480 sh3_zsrt139c3179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3179.mem 17 1 1 sh3_zsrt139c3179_pal.mem 0x158afe76 +180 197327 10240 480 sh3_zsrt139c3180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3180.mem 17 1 1 sh3_zsrt139c3180_pal.mem 0x158afe76 +181 197327 10240 480 sh3_zsrt139c3181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3181.mem 17 1 1 sh3_zsrt139c3181_pal.mem 0x158afe76 +182 197327 10240 480 sh3_zsrt139c3182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3182.mem 17 1 1 sh3_zsrt139c3182_pal.mem 0x158afe76 +183 197327 10240 480 sh3_zsrt139c3183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3183.mem 17 1 1 sh3_zsrt139c3183_pal.mem 0x158afe76 +184 197327 10240 480 sh3_zsrt139c3184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3184.mem 17 1 1 sh3_zsrt139c3184_pal.mem 0x158afe76 +185 197327 10240 480 sh3_zsrt139c3185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3185.mem 17 1 1 sh3_zsrt139c3185_pal.mem 0x158afe76 +186 197327 10240 480 sh3_zsrt139c3186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3186.mem 17 1 1 sh3_zsrt139c3186_pal.mem 0x158afe76 +187 197327 10240 480 sh3_zsrt139c3187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3187.mem 17 1 1 sh3_zsrt139c3187_pal.mem 0x158afe76 +188 197327 10240 480 sh3_zsrt139c3188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3188.mem 17 1 1 sh3_zsrt139c3188_pal.mem 0x158afe76 +189 197327 10240 480 sh3_zsrt139c3189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3189.mem 17 1 1 sh3_zsrt139c3189_pal.mem 0x158afe76 +190 197327 10240 480 sh3_zsrt139c3190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3190.mem 17 1 1 sh3_zsrt139c3190_pal.mem 0x158afe76 +191 197327 10240 480 sh3_zsrt139c3191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3191.mem 17 1 1 sh3_zsrt139c3191_pal.mem 0x158afe76 +192 197327 10240 480 sh3_zsrt139c3192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3192.mem 17 1 1 sh3_zsrt139c3192_pal.mem 0x158afe76 +193 197327 10240 480 sh3_zsrt139c3193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3193.mem 17 1 1 sh3_zsrt139c3193_pal.mem 0x158afe76 +194 197327 10240 480 sh3_zsrt139c3194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3194.mem 17 1 1 sh3_zsrt139c3194_pal.mem 0x158afe76 +195 197327 10240 480 sh3_zsrt139c3195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3195.mem 17 1 1 sh3_zsrt139c3195_pal.mem 0x158afe76 +196 197327 10240 480 sh3_zsrt139c3196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3196.mem 17 1 1 sh3_zsrt139c3196_pal.mem 0x158afe76 +197 197327 10240 480 sh3_zsrt139c3197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3197.mem 17 1 1 sh3_zsrt139c3197_pal.mem 0x158afe76 +198 197327 10240 480 sh3_zsrt139c3198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3198.mem 17 1 1 sh3_zsrt139c3198_pal.mem 0x158afe76 +199 197327 10240 480 sh3_zsrt139c3199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3199.mem 17 1 1 sh3_zsrt139c3199_pal.mem 0x158afe76 +200 197327 10240 480 sh3_zsrt139c3200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3200.mem 17 1 1 sh3_zsrt139c3200_pal.mem 0x158afe76 +201 197327 10240 480 sh3_zsrt139c3201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3201.mem 17 1 1 sh3_zsrt139c3201_pal.mem 0x158afe76 +202 197327 10240 480 sh3_zsrt139c3202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3202.mem 17 1 1 sh3_zsrt139c3202_pal.mem 0x158afe76 +203 197327 10240 480 sh3_zsrt139c3203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3203.mem 17 1 1 sh3_zsrt139c3203_pal.mem 0x158afe76 +204 197327 10240 480 sh3_zsrt139c3204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3204.mem 17 1 1 sh3_zsrt139c3204_pal.mem 0x158afe76 +205 197327 10240 480 sh3_zsrt139c3205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3205.mem 17 1 1 sh3_zsrt139c3205_pal.mem 0x158afe76 +206 197327 10240 480 sh3_zsrt139c3206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3206.mem 17 1 1 sh3_zsrt139c3206_pal.mem 0x158afe76 +207 197327 10240 480 sh3_zsrt139c3207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3207.mem 17 1 1 sh3_zsrt139c3207_pal.mem 0x158afe76 +208 197327 10240 480 sh3_zsrt139c3208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3208.mem 17 1 1 sh3_zsrt139c3208_pal.mem 0x158afe76 +209 197327 10240 480 sh3_zsrt139c3209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3209.mem 17 1 1 sh3_zsrt139c3209_pal.mem 0x158afe76 +210 197327 10240 480 sh3_zsrt139c3210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3210.mem 17 1 1 sh3_zsrt139c3210_pal.mem 0x158afe76 +211 197327 10240 480 sh3_zsrt139c3211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3211.mem 17 1 1 sh3_zsrt139c3211_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139c4_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c4_epochs.txt new file mode 100644 index 0000000..c098e31 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139c4_epochs.txt @@ -0,0 +1,290 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1', 'zsrt139c3'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 287 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139c40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139c40.mem 494 54 0 sh3_zsrt139c40_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139c41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c41.mem 1061 117 0 sh3_zsrt139c41_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139c42_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c42.mem 530 58 1 sh3_zsrt139c42_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139c43_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139c43.mem 782 86 0 sh3_zsrt139c43_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139c44_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c44.mem 1232 136 0 sh3_zsrt139c44_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139c45_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c45.mem 1232 136 1 sh3_zsrt139c45_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139c46_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c46.mem 764 84 1 sh3_zsrt139c46_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139c47_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c47.mem 1232 136 1 sh3_zsrt139c47_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139c48_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c48.mem 710 78 1 sh3_zsrt139c48_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139c49_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c49.mem 1232 136 1 sh3_zsrt139c49_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139c410_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c410.mem 1232 136 1 sh3_zsrt139c410_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139c411_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c411.mem 953 105 1 sh3_zsrt139c411_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139c412_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c412.mem 1232 136 1 sh3_zsrt139c412_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139c413_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c413.mem 1097 121 1 sh3_zsrt139c413_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139c414_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c414.mem 170 18 1 sh3_zsrt139c414_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139c415_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c415.mem 62 6 0 sh3_zsrt139c415_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139c416_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c416.mem 620 68 0 sh3_zsrt139c416_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139c417_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139c417.mem 620 68 0 sh3_zsrt139c417_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139c418_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c418.mem 620 68 0 sh3_zsrt139c418_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139c419_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139c419.mem 620 68 0 sh3_zsrt139c419_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139c420_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c420.mem 1844 204 0 sh3_zsrt139c420_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139c421_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c421.mem 1844 204 1 sh3_zsrt139c421_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139c422_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c422.mem 1844 204 1 sh3_zsrt139c422_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139c423_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c423.mem 1844 204 1 sh3_zsrt139c423_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139c424_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c424.mem 1844 204 1 sh3_zsrt139c424_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139c425_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c425.mem 1844 204 1 sh3_zsrt139c425_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139c426_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c426.mem 1844 204 1 sh3_zsrt139c426_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139c427_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c427.mem 1844 204 1 sh3_zsrt139c427_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139c428_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c428.mem 1142 126 0 sh3_zsrt139c428_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139c429_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c429.mem 1178 130 1 sh3_zsrt139c429_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139c430_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c430.mem 1106 122 1 sh3_zsrt139c430_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139c431_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c431.mem 1070 118 0 sh3_zsrt139c431_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139c432_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c432.mem 998 110 1 sh3_zsrt139c432_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139c433_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c433.mem 1070 118 1 sh3_zsrt139c433_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139c434_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c434.mem 782 86 0 sh3_zsrt139c434_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139c435_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c435.mem 782 86 1 sh3_zsrt139c435_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139c436_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c436.mem 746 82 1 sh3_zsrt139c436_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139c437_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c437.mem 1070 118 0 sh3_zsrt139c437_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139c438_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c438.mem 1034 114 1 sh3_zsrt139c438_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139c439_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c439.mem 1106 122 1 sh3_zsrt139c439_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139c440_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c440.mem 1142 126 0 sh3_zsrt139c440_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139c441_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c441.mem 1034 114 1 sh3_zsrt139c441_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139c442_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c442.mem 1070 118 1 sh3_zsrt139c442_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139c443_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c443.mem 1142 126 1 sh3_zsrt139c443_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139c444_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c444.mem 1106 122 1 sh3_zsrt139c444_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139c445_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c445.mem 1070 118 1 sh3_zsrt139c445_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139c446_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c446.mem 1070 118 1 sh3_zsrt139c446_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139c447_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c447.mem 1358 150 1 sh3_zsrt139c447_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139c448_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c448.mem 998 110 0 sh3_zsrt139c448_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139c449_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c449.mem 890 98 1 sh3_zsrt139c449_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139c450_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c450.mem 890 98 1 sh3_zsrt139c450_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139c451_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c451.mem 962 106 1 sh3_zsrt139c451_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139c452_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c452.mem 926 102 1 sh3_zsrt139c452_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139c453_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c453.mem 962 106 1 sh3_zsrt139c453_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139c454_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c454.mem 962 106 1 sh3_zsrt139c454_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139c455_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c455.mem 1034 114 1 sh3_zsrt139c455_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139c456_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c456.mem 890 98 1 sh3_zsrt139c456_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139c457_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c457.mem 962 106 1 sh3_zsrt139c457_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139c458_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c458.mem 566 62 1 sh3_zsrt139c458_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139c459_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c459.mem 1178 130 0 sh3_zsrt139c459_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139c460_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c460.mem 1070 118 1 sh3_zsrt139c460_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139c461_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c461.mem 1070 118 1 sh3_zsrt139c461_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139c462_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c462.mem 1250 138 1 sh3_zsrt139c462_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139c463_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c463.mem 710 78 1 sh3_zsrt139c463_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139c464_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c464.mem 1142 126 1 sh3_zsrt139c464_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139c465_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c465.mem 1178 130 1 sh3_zsrt139c465_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139c466_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c466.mem 1106 122 1 sh3_zsrt139c466_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139c467_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c467.mem 1142 126 1 sh3_zsrt139c467_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139c468_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c468.mem 530 58 1 sh3_zsrt139c468_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139c469_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c469.mem 1322 146 0 sh3_zsrt139c469_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139c470_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c470.mem 674 74 1 sh3_zsrt139c470_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139c471_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c471.mem 602 66 1 sh3_zsrt139c471_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139c472_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c472.mem 458 50 1 sh3_zsrt139c472_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139c473_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c473.mem 1214 134 0 sh3_zsrt139c473_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139c474_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c474.mem 1376 152 1 sh3_zsrt139c474_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139c475_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c475.mem 17 1 0 sh3_zsrt139c475_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139c476_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c476.mem 17 1 1 sh3_zsrt139c476_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139c477_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c477.mem 17 1 1 sh3_zsrt139c477_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139c478_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c478.mem 17 1 1 sh3_zsrt139c478_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139c479_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c479.mem 17 1 1 sh3_zsrt139c479_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139c480_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c480.mem 17 1 1 sh3_zsrt139c480_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139c481_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c481.mem 17 1 1 sh3_zsrt139c481_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139c482_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c482.mem 17 1 1 sh3_zsrt139c482_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139c483_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c483.mem 17 1 1 sh3_zsrt139c483_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139c484_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c484.mem 17 1 1 sh3_zsrt139c484_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139c485_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c485.mem 17 1 1 sh3_zsrt139c485_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139c486_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c486.mem 17 1 1 sh3_zsrt139c486_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139c487_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c487.mem 17 1 1 sh3_zsrt139c487_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139c488_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c488.mem 17 1 1 sh3_zsrt139c488_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139c489_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c489.mem 17 1 1 sh3_zsrt139c489_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139c490_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c490.mem 17 1 1 sh3_zsrt139c490_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139c491_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c491.mem 17 1 1 sh3_zsrt139c491_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139c492_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c492.mem 17 1 1 sh3_zsrt139c492_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139c493_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c493.mem 17 1 1 sh3_zsrt139c493_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139c494_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c494.mem 17 1 1 sh3_zsrt139c494_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139c495_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c495.mem 17 1 1 sh3_zsrt139c495_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139c496_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c496.mem 17 1 1 sh3_zsrt139c496_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139c497_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c497.mem 17 1 1 sh3_zsrt139c497_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139c498_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c498.mem 17 1 1 sh3_zsrt139c498_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139c499_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c499.mem 17 1 1 sh3_zsrt139c499_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139c4100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4100.mem 17 1 1 sh3_zsrt139c4100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139c4101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4101.mem 17 1 1 sh3_zsrt139c4101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139c4102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4102.mem 17 1 1 sh3_zsrt139c4102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139c4103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4103.mem 17 1 1 sh3_zsrt139c4103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139c4104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4104.mem 17 1 1 sh3_zsrt139c4104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139c4105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4105.mem 17 1 1 sh3_zsrt139c4105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139c4106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4106.mem 17 1 1 sh3_zsrt139c4106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139c4107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4107.mem 17 1 1 sh3_zsrt139c4107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139c4108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4108.mem 17 1 1 sh3_zsrt139c4108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139c4109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4109.mem 17 1 1 sh3_zsrt139c4109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139c4110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4110.mem 17 1 1 sh3_zsrt139c4110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139c4111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4111.mem 17 1 1 sh3_zsrt139c4111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139c4112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4112.mem 17 1 1 sh3_zsrt139c4112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139c4113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4113.mem 17 1 1 sh3_zsrt139c4113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139c4114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4114.mem 17 1 1 sh3_zsrt139c4114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139c4115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4115.mem 17 1 1 sh3_zsrt139c4115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139c4116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4116.mem 17 1 1 sh3_zsrt139c4116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139c4117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4117.mem 17 1 1 sh3_zsrt139c4117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139c4118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4118.mem 17 1 1 sh3_zsrt139c4118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139c4119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4119.mem 17 1 1 sh3_zsrt139c4119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139c4120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4120.mem 17 1 1 sh3_zsrt139c4120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139c4121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4121.mem 17 1 1 sh3_zsrt139c4121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139c4122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4122.mem 17 1 1 sh3_zsrt139c4122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139c4123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4123.mem 17 1 1 sh3_zsrt139c4123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139c4124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4124.mem 17 1 1 sh3_zsrt139c4124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139c4125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4125.mem 17 1 1 sh3_zsrt139c4125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139c4126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4126.mem 17 1 1 sh3_zsrt139c4126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139c4127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4127.mem 17 1 1 sh3_zsrt139c4127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139c4128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4128.mem 17 1 1 sh3_zsrt139c4128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139c4129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4129.mem 17 1 1 sh3_zsrt139c4129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139c4130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4130.mem 17 1 1 sh3_zsrt139c4130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139c4131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4131.mem 17 1 1 sh3_zsrt139c4131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139c4132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4132.mem 17 1 1 sh3_zsrt139c4132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139c4133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4133.mem 17 1 1 sh3_zsrt139c4133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139c4134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4134.mem 17 1 1 sh3_zsrt139c4134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139c4135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4135.mem 17 1 1 sh3_zsrt139c4135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139c4136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4136.mem 17 1 1 sh3_zsrt139c4136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139c4137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4137.mem 17 1 1 sh3_zsrt139c4137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139c4138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4138.mem 17 1 1 sh3_zsrt139c4138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139c4139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4139.mem 17 1 1 sh3_zsrt139c4139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139c4140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4140.mem 17 1 1 sh3_zsrt139c4140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139c4141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4141.mem 17 1 1 sh3_zsrt139c4141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139c4142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4142.mem 17 1 1 sh3_zsrt139c4142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139c4143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4143.mem 17 1 1 sh3_zsrt139c4143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139c4144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4144.mem 17 1 1 sh3_zsrt139c4144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139c4145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4145.mem 17 1 1 sh3_zsrt139c4145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139c4146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4146.mem 17 1 1 sh3_zsrt139c4146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139c4147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4147.mem 17 1 1 sh3_zsrt139c4147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139c4148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4148.mem 17 1 1 sh3_zsrt139c4148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139c4149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4149.mem 17 1 1 sh3_zsrt139c4149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139c4150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4150.mem 17 1 1 sh3_zsrt139c4150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139c4151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4151.mem 17 1 1 sh3_zsrt139c4151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139c4152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4152.mem 17 1 1 sh3_zsrt139c4152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139c4153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4153.mem 17 1 1 sh3_zsrt139c4153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139c4154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4154.mem 17 1 1 sh3_zsrt139c4154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139c4155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4155.mem 17 1 1 sh3_zsrt139c4155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139c4156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4156.mem 17 1 1 sh3_zsrt139c4156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139c4157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4157.mem 17 1 1 sh3_zsrt139c4157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139c4158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4158.mem 17 1 1 sh3_zsrt139c4158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139c4159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4159.mem 17 1 1 sh3_zsrt139c4159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139c4160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4160.mem 17 1 1 sh3_zsrt139c4160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139c4161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4161.mem 17 1 1 sh3_zsrt139c4161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139c4162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4162.mem 17 1 1 sh3_zsrt139c4162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139c4163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4163.mem 17 1 1 sh3_zsrt139c4163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139c4164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4164.mem 17 1 1 sh3_zsrt139c4164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139c4165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4165.mem 17 1 1 sh3_zsrt139c4165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139c4166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4166.mem 17 1 1 sh3_zsrt139c4166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139c4167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4167.mem 17 1 1 sh3_zsrt139c4167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139c4168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4168.mem 17 1 1 sh3_zsrt139c4168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139c4169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4169.mem 17 1 1 sh3_zsrt139c4169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139c4170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4170.mem 17 1 1 sh3_zsrt139c4170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139c4171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4171.mem 17 1 1 sh3_zsrt139c4171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139c4172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4172.mem 17 1 1 sh3_zsrt139c4172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139c4173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4173.mem 17 1 1 sh3_zsrt139c4173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139c4174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4174.mem 17 1 1 sh3_zsrt139c4174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139c4175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4175.mem 17 1 1 sh3_zsrt139c4175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139c4176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4176.mem 17 1 1 sh3_zsrt139c4176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139c4177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4177.mem 17 1 1 sh3_zsrt139c4177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139c4178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4178.mem 17 1 1 sh3_zsrt139c4178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139c4179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4179.mem 17 1 1 sh3_zsrt139c4179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139c4180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4180.mem 17 1 1 sh3_zsrt139c4180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139c4181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4181.mem 17 1 1 sh3_zsrt139c4181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139c4182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4182.mem 17 1 1 sh3_zsrt139c4182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139c4183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4183.mem 17 1 1 sh3_zsrt139c4183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139c4184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4184.mem 17 1 1 sh3_zsrt139c4184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139c4185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4185.mem 17 1 1 sh3_zsrt139c4185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139c4186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4186.mem 17 1 1 sh3_zsrt139c4186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139c4187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4187.mem 17 1 1 sh3_zsrt139c4187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139c4188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4188.mem 17 1 1 sh3_zsrt139c4188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139c4189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4189.mem 17 1 1 sh3_zsrt139c4189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139c4190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4190.mem 17 1 1 sh3_zsrt139c4190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139c4191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4191.mem 17 1 1 sh3_zsrt139c4191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139c4192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4192.mem 17 1 1 sh3_zsrt139c4192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139c4193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4193.mem 17 1 1 sh3_zsrt139c4193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139c4194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4194.mem 17 1 1 sh3_zsrt139c4194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139c4195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4195.mem 17 1 1 sh3_zsrt139c4195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139c4196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4196.mem 17 1 1 sh3_zsrt139c4196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139c4197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4197.mem 17 1 1 sh3_zsrt139c4197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139c4198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4198.mem 17 1 1 sh3_zsrt139c4198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139c4199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4199.mem 17 1 1 sh3_zsrt139c4199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139c4200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4200.mem 17 1 1 sh3_zsrt139c4200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139c4201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4201.mem 17 1 1 sh3_zsrt139c4201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139c4202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4202.mem 17 1 1 sh3_zsrt139c4202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139c4203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4203.mem 17 1 1 sh3_zsrt139c4203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139c4204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4204.mem 17 1 1 sh3_zsrt139c4204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139c4205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4205.mem 17 1 1 sh3_zsrt139c4205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139c4206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4206.mem 17 1 1 sh3_zsrt139c4206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139c4207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4207.mem 17 1 1 sh3_zsrt139c4207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139c4208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4208.mem 17 1 1 sh3_zsrt139c4208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139c4209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4209.mem 17 1 1 sh3_zsrt139c4209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139c4210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4210.mem 17 1 1 sh3_zsrt139c4210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139c4211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4211.mem 17 1 1 sh3_zsrt139c4211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139c4212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4212.mem 17 1 1 sh3_zsrt139c4212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139c4213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4213.mem 17 1 1 sh3_zsrt139c4213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139c4214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4214.mem 17 1 1 sh3_zsrt139c4214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139c4215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4215.mem 17 1 1 sh3_zsrt139c4215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139c4216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4216.mem 17 1 1 sh3_zsrt139c4216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139c4217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4217.mem 17 1 1 sh3_zsrt139c4217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139c4218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4218.mem 17 1 1 sh3_zsrt139c4218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139c4219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4219.mem 17 1 1 sh3_zsrt139c4219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139c4220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4220.mem 17 1 1 sh3_zsrt139c4220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139c4221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4221.mem 17 1 1 sh3_zsrt139c4221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139c4222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4222.mem 17 1 1 sh3_zsrt139c4222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139c4223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4223.mem 17 1 1 sh3_zsrt139c4223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139c4224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4224.mem 17 1 1 sh3_zsrt139c4224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139c4225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4225.mem 17 1 1 sh3_zsrt139c4225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139c4226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4226.mem 17 1 1 sh3_zsrt139c4226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139c4227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4227.mem 17 1 1 sh3_zsrt139c4227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139c4228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4228.mem 17 1 1 sh3_zsrt139c4228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139c4229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4229.mem 17 1 1 sh3_zsrt139c4229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139c4230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4230.mem 17 1 1 sh3_zsrt139c4230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139c4231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4231.mem 17 1 1 sh3_zsrt139c4231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139c4232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4232.mem 17 1 1 sh3_zsrt139c4232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139c4233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4233.mem 17 1 1 sh3_zsrt139c4233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139c4234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4234.mem 17 1 1 sh3_zsrt139c4234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139c4235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4235.mem 17 1 1 sh3_zsrt139c4235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139c4236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4236.mem 17 1 1 sh3_zsrt139c4236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139c4237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4237.mem 17 1 1 sh3_zsrt139c4237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139c4238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4238.mem 17 1 1 sh3_zsrt139c4238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139c4239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4239.mem 17 1 1 sh3_zsrt139c4239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139c4240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4240.mem 17 1 1 sh3_zsrt139c4240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139c4241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4241.mem 17 1 1 sh3_zsrt139c4241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139c4242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4242.mem 17 1 1 sh3_zsrt139c4242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139c4243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4243.mem 17 1 1 sh3_zsrt139c4243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139c4244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4244.mem 17 1 1 sh3_zsrt139c4244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139c4245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4245.mem 17 1 1 sh3_zsrt139c4245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139c4246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4246.mem 17 1 1 sh3_zsrt139c4246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139c4247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4247.mem 17 1 1 sh3_zsrt139c4247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139c4248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4248.mem 17 1 1 sh3_zsrt139c4248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139c4249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4249.mem 17 1 1 sh3_zsrt139c4249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139c4250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4250.mem 17 1 1 sh3_zsrt139c4250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139c4251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4251.mem 17 1 1 sh3_zsrt139c4251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139c4252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4252.mem 17 1 1 sh3_zsrt139c4252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139c4253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4253.mem 17 1 1 sh3_zsrt139c4253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139c4254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4254.mem 17 1 1 sh3_zsrt139c4254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139c4255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4255.mem 17 1 1 sh3_zsrt139c4255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139c4256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4256.mem 17 1 1 sh3_zsrt139c4256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139c4257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4257.mem 17 1 1 sh3_zsrt139c4257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139c4258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4258.mem 17 1 1 sh3_zsrt139c4258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139c4259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4259.mem 17 1 1 sh3_zsrt139c4259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139c4260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4260.mem 17 1 1 sh3_zsrt139c4260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139c4261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4261.mem 17 1 1 sh3_zsrt139c4261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139c4262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4262.mem 17 1 1 sh3_zsrt139c4262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139c4263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4263.mem 17 1 1 sh3_zsrt139c4263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139c4264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4264.mem 17 1 1 sh3_zsrt139c4264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139c4265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4265.mem 17 1 1 sh3_zsrt139c4265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139c4266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4266.mem 17 1 1 sh3_zsrt139c4266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139c4267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4267.mem 17 1 1 sh3_zsrt139c4267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139c4268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4268.mem 17 1 1 sh3_zsrt139c4268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139c4269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4269.mem 17 1 1 sh3_zsrt139c4269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139c4270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4270.mem 17 1 1 sh3_zsrt139c4270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139c4271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4271.mem 17 1 1 sh3_zsrt139c4271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139c4272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4272.mem 17 1 1 sh3_zsrt139c4272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139c4273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4273.mem 17 1 1 sh3_zsrt139c4273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139c4274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4274.mem 17 1 1 sh3_zsrt139c4274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139c4275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4275.mem 17 1 1 sh3_zsrt139c4275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139c4276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4276.mem 17 1 1 sh3_zsrt139c4276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139c4277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4277.mem 17 1 1 sh3_zsrt139c4277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139c4278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4278.mem 17 1 1 sh3_zsrt139c4278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139c4279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4279.mem 17 1 1 sh3_zsrt139c4279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139c4280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4280.mem 17 1 1 sh3_zsrt139c4280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139c4281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4281.mem 17 1 1 sh3_zsrt139c4281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139c4282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4282.mem 17 1 1 sh3_zsrt139c4282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139c4283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4283.mem 17 1 1 sh3_zsrt139c4283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139c4284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4284.mem 17 1 1 sh3_zsrt139c4284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139c4285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4285.mem 17 1 1 sh3_zsrt139c4285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139c4286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c4286.mem 17 1 1 sh3_zsrt139c4286_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195957_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195957_epochs.txt new file mode 100644 index 0000000..c519b9d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195957_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959570.mem 35 3 0 sh3_zsrt139d1959570_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959571.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959572.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959573.mem 62 6 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959574.mem 116 12 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959575.mem 143 15 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959576.mem 62 6 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959577.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959578.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959579.mem 35 3 1 sh3_zsrt139d1959570_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d19595710.mem 17 1 1 sh3_zsrt139d1959570_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195973_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195973_epochs.txt new file mode 100644 index 0000000..fdedd83 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d195973_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959730.mem 35 3 0 sh3_zsrt139d1959730_pal.mem 0x00000000 +1 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959731.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +2 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959732.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +3 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959733.mem 62 6 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +4 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959734.mem 116 12 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +5 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959735.mem 143 15 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +6 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959736.mem 62 6 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +7 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959737.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +8 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959738.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +9 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959739.mem 35 3 1 sh3_zsrt139d1959730_pal.mem 0x00000000 +10 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d19597310.mem 17 1 1 sh3_zsrt139d1959730_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d1_epochs.txt new file mode 100644 index 0000000..cb4de7a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d1_epochs.txt @@ -0,0 +1,173 @@ +# Ch407 epoch descriptor table (167 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 167 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 198075 10240 480 sh3_zsrt139d10_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d10.mem 17 1 0 sh3_zsrt139d10_pal.mem 0x158afe76 +1 198075 10240 480 sh3_zsrt139d11_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d11.mem 17 1 1 sh3_zsrt139d11_pal.mem 0x158afe76 +2 198075 10240 480 sh3_zsrt139d12_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d12.mem 17 1 1 sh3_zsrt139d12_pal.mem 0x158afe76 +3 198075 10240 480 sh3_zsrt139d13_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d13.mem 17 1 1 sh3_zsrt139d13_pal.mem 0x158afe76 +4 198075 10240 480 sh3_zsrt139d14_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d14.mem 17 1 1 sh3_zsrt139d14_pal.mem 0x158afe76 +5 198075 10240 480 sh3_zsrt139d15_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d15.mem 17 1 1 sh3_zsrt139d15_pal.mem 0x158afe76 +6 198075 10240 480 sh3_zsrt139d16_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d16.mem 17 1 1 sh3_zsrt139d16_pal.mem 0x158afe76 +7 198092 10240 480 sh3_zsrt139d17_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d17.mem 17 1 1 sh3_zsrt139d17_pal.mem 0x158afe76 +8 198092 10240 480 sh3_zsrt139d18_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d18.mem 17 1 1 sh3_zsrt139d18_pal.mem 0x158afe76 +9 198092 10240 480 sh3_zsrt139d19_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d19.mem 17 1 1 sh3_zsrt139d19_pal.mem 0x158afe76 +10 198092 10240 480 sh3_zsrt139d110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d110.mem 17 1 1 sh3_zsrt139d110_pal.mem 0x158afe76 +11 198092 10240 480 sh3_zsrt139d111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d111.mem 17 1 1 sh3_zsrt139d111_pal.mem 0x158afe76 +12 198092 10240 480 sh3_zsrt139d112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d112.mem 17 1 1 sh3_zsrt139d112_pal.mem 0x158afe76 +13 198092 10240 480 sh3_zsrt139d113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d113.mem 17 1 1 sh3_zsrt139d113_pal.mem 0x158afe76 +14 198092 10240 480 sh3_zsrt139d114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d114.mem 17 1 1 sh3_zsrt139d114_pal.mem 0x158afe76 +15 198092 10240 480 sh3_zsrt139d115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d115.mem 17 1 1 sh3_zsrt139d115_pal.mem 0x158afe76 +16 198092 10240 480 sh3_zsrt139d116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d116.mem 17 1 1 sh3_zsrt139d116_pal.mem 0x158afe76 +17 198092 10240 480 sh3_zsrt139d117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d117.mem 17 1 1 sh3_zsrt139d117_pal.mem 0x158afe76 +18 198092 10240 480 sh3_zsrt139d118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d118.mem 17 1 1 sh3_zsrt139d118_pal.mem 0x158afe76 +19 198092 10240 480 sh3_zsrt139d119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d119.mem 17 1 1 sh3_zsrt139d119_pal.mem 0x158afe76 +20 198092 10240 480 sh3_zsrt139d120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d120.mem 17 1 1 sh3_zsrt139d120_pal.mem 0x158afe76 +21 198092 10240 480 sh3_zsrt139d121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d121.mem 17 1 1 sh3_zsrt139d121_pal.mem 0x158afe76 +22 198092 10240 480 sh3_zsrt139d122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d122.mem 17 1 1 sh3_zsrt139d122_pal.mem 0x158afe76 +23 198092 10240 480 sh3_zsrt139d123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d123.mem 17 1 1 sh3_zsrt139d123_pal.mem 0x158afe76 +24 198092 10240 480 sh3_zsrt139d124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d124.mem 17 1 1 sh3_zsrt139d124_pal.mem 0x158afe76 +25 198092 10240 480 sh3_zsrt139d125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d125.mem 17 1 1 sh3_zsrt139d125_pal.mem 0x158afe76 +26 198092 10240 480 sh3_zsrt139d126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d126.mem 17 1 1 sh3_zsrt139d126_pal.mem 0x158afe76 +27 198092 10240 480 sh3_zsrt139d127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d127.mem 17 1 1 sh3_zsrt139d127_pal.mem 0x158afe76 +28 198092 10240 480 sh3_zsrt139d128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d128.mem 17 1 1 sh3_zsrt139d128_pal.mem 0x158afe76 +29 198092 10240 480 sh3_zsrt139d129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d129.mem 17 1 1 sh3_zsrt139d129_pal.mem 0x158afe76 +30 198092 10240 480 sh3_zsrt139d130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d130.mem 17 1 1 sh3_zsrt139d130_pal.mem 0x158afe76 +31 198092 10240 480 sh3_zsrt139d131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d131.mem 17 1 1 sh3_zsrt139d131_pal.mem 0x158afe76 +32 198092 10240 480 sh3_zsrt139d132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d132.mem 17 1 1 sh3_zsrt139d132_pal.mem 0x158afe76 +33 198092 10240 480 sh3_zsrt139d133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d133.mem 17 1 1 sh3_zsrt139d133_pal.mem 0x158afe76 +34 198092 10240 480 sh3_zsrt139d134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d134.mem 17 1 1 sh3_zsrt139d134_pal.mem 0x158afe76 +35 198092 10240 480 sh3_zsrt139d135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d135.mem 17 1 1 sh3_zsrt139d135_pal.mem 0x158afe76 +36 198092 10240 480 sh3_zsrt139d136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d136.mem 17 1 1 sh3_zsrt139d136_pal.mem 0x158afe76 +37 198092 10240 480 sh3_zsrt139d137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d137.mem 17 1 1 sh3_zsrt139d137_pal.mem 0x158afe76 +38 198092 10240 480 sh3_zsrt139d138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d138.mem 17 1 1 sh3_zsrt139d138_pal.mem 0x158afe76 +39 198092 10240 480 sh3_zsrt139d139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d139.mem 17 1 1 sh3_zsrt139d139_pal.mem 0x158afe76 +40 198092 10240 480 sh3_zsrt139d140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d140.mem 17 1 1 sh3_zsrt139d140_pal.mem 0x158afe76 +41 198092 10240 480 sh3_zsrt139d141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d141.mem 17 1 1 sh3_zsrt139d141_pal.mem 0x158afe76 +42 198092 10240 480 sh3_zsrt139d142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d142.mem 17 1 1 sh3_zsrt139d142_pal.mem 0x158afe76 +43 198092 10240 480 sh3_zsrt139d143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d143.mem 17 1 1 sh3_zsrt139d143_pal.mem 0x158afe76 +44 198092 10240 480 sh3_zsrt139d144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d144.mem 17 1 1 sh3_zsrt139d144_pal.mem 0x158afe76 +45 198092 10240 480 sh3_zsrt139d145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d145.mem 17 1 1 sh3_zsrt139d145_pal.mem 0x158afe76 +46 198092 10240 480 sh3_zsrt139d146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d146.mem 17 1 1 sh3_zsrt139d146_pal.mem 0x158afe76 +47 198092 10240 480 sh3_zsrt139d147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d147.mem 17 1 1 sh3_zsrt139d147_pal.mem 0x158afe76 +48 198092 10240 480 sh3_zsrt139d148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d148.mem 17 1 1 sh3_zsrt139d148_pal.mem 0x158afe76 +49 198092 10240 480 sh3_zsrt139d149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d149.mem 17 1 1 sh3_zsrt139d149_pal.mem 0x158afe76 +50 198092 10240 480 sh3_zsrt139d150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d150.mem 17 1 1 sh3_zsrt139d150_pal.mem 0x158afe76 +51 198092 10240 480 sh3_zsrt139d151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d151.mem 17 1 1 sh3_zsrt139d151_pal.mem 0x158afe76 +52 198092 10240 480 sh3_zsrt139d152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d152.mem 17 1 1 sh3_zsrt139d152_pal.mem 0x158afe76 +53 198092 10240 480 sh3_zsrt139d153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d153.mem 17 1 1 sh3_zsrt139d153_pal.mem 0x158afe76 +54 198092 10240 480 sh3_zsrt139d154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d154.mem 17 1 1 sh3_zsrt139d154_pal.mem 0x158afe76 +55 198092 10240 480 sh3_zsrt139d155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d155.mem 17 1 1 sh3_zsrt139d155_pal.mem 0x158afe76 +56 198092 10240 480 sh3_zsrt139d156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d156.mem 17 1 1 sh3_zsrt139d156_pal.mem 0x158afe76 +57 198092 10240 480 sh3_zsrt139d157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d157.mem 17 1 1 sh3_zsrt139d157_pal.mem 0x158afe76 +58 198092 10240 480 sh3_zsrt139d158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d158.mem 17 1 1 sh3_zsrt139d158_pal.mem 0x158afe76 +59 198092 10240 480 sh3_zsrt139d159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d159.mem 17 1 1 sh3_zsrt139d159_pal.mem 0x158afe76 +60 198092 10240 480 sh3_zsrt139d160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d160.mem 17 1 1 sh3_zsrt139d160_pal.mem 0x158afe76 +61 198092 10240 480 sh3_zsrt139d161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d161.mem 17 1 1 sh3_zsrt139d161_pal.mem 0x158afe76 +62 198092 10240 480 sh3_zsrt139d162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d162.mem 17 1 1 sh3_zsrt139d162_pal.mem 0x158afe76 +63 198092 10240 480 sh3_zsrt139d163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d163.mem 17 1 1 sh3_zsrt139d163_pal.mem 0x158afe76 +64 198092 10240 480 sh3_zsrt139d164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d164.mem 17 1 1 sh3_zsrt139d164_pal.mem 0x158afe76 +65 198092 10240 480 sh3_zsrt139d165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d165.mem 17 1 1 sh3_zsrt139d165_pal.mem 0x158afe76 +66 198092 10240 480 sh3_zsrt139d166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d166.mem 17 1 1 sh3_zsrt139d166_pal.mem 0x158afe76 +67 198092 10240 480 sh3_zsrt139d167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d167.mem 17 1 1 sh3_zsrt139d167_pal.mem 0x158afe76 +68 198092 10240 480 sh3_zsrt139d168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d168.mem 17 1 1 sh3_zsrt139d168_pal.mem 0x158afe76 +69 198092 10240 480 sh3_zsrt139d169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d169.mem 17 1 1 sh3_zsrt139d169_pal.mem 0x158afe76 +70 198092 10240 480 sh3_zsrt139d170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d170.mem 17 1 1 sh3_zsrt139d170_pal.mem 0x158afe76 +71 198092 10240 480 sh3_zsrt139d171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d171.mem 17 1 1 sh3_zsrt139d171_pal.mem 0x158afe76 +72 198092 10240 480 sh3_zsrt139d172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d172.mem 17 1 1 sh3_zsrt139d172_pal.mem 0x158afe76 +73 198092 10240 480 sh3_zsrt139d173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d173.mem 17 1 1 sh3_zsrt139d173_pal.mem 0x158afe76 +74 198092 10240 480 sh3_zsrt139d174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d174.mem 17 1 1 sh3_zsrt139d174_pal.mem 0x158afe76 +75 198092 10240 480 sh3_zsrt139d175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d175.mem 17 1 1 sh3_zsrt139d175_pal.mem 0x158afe76 +76 198092 10240 480 sh3_zsrt139d176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d176.mem 17 1 1 sh3_zsrt139d176_pal.mem 0x158afe76 +77 198092 10240 480 sh3_zsrt139d177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d177.mem 17 1 1 sh3_zsrt139d177_pal.mem 0x158afe76 +78 198092 10240 480 sh3_zsrt139d178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d178.mem 17 1 1 sh3_zsrt139d178_pal.mem 0x158afe76 +79 198092 10240 480 sh3_zsrt139d179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d179.mem 17 1 1 sh3_zsrt139d179_pal.mem 0x158afe76 +80 198092 10240 480 sh3_zsrt139d180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d180.mem 17 1 1 sh3_zsrt139d180_pal.mem 0x158afe76 +81 198092 10240 480 sh3_zsrt139d181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d181.mem 17 1 1 sh3_zsrt139d181_pal.mem 0x158afe76 +82 198092 10240 480 sh3_zsrt139d182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d182.mem 17 1 1 sh3_zsrt139d182_pal.mem 0x158afe76 +83 198092 10240 480 sh3_zsrt139d183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d183.mem 17 1 1 sh3_zsrt139d183_pal.mem 0x158afe76 +84 198092 10240 480 sh3_zsrt139d184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d184.mem 17 1 1 sh3_zsrt139d184_pal.mem 0x158afe76 +85 198092 10240 480 sh3_zsrt139d185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d185.mem 17 1 1 sh3_zsrt139d185_pal.mem 0x158afe76 +86 198092 10240 480 sh3_zsrt139d186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d186.mem 17 1 1 sh3_zsrt139d186_pal.mem 0x158afe76 +87 198092 10240 480 sh3_zsrt139d187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d187.mem 17 1 1 sh3_zsrt139d187_pal.mem 0x158afe76 +88 198092 10240 480 sh3_zsrt139d188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d188.mem 17 1 1 sh3_zsrt139d188_pal.mem 0x158afe76 +89 198092 10240 480 sh3_zsrt139d189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d189.mem 17 1 1 sh3_zsrt139d189_pal.mem 0x158afe76 +90 198092 10240 480 sh3_zsrt139d190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d190.mem 17 1 1 sh3_zsrt139d190_pal.mem 0x158afe76 +91 198092 10240 480 sh3_zsrt139d191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d191.mem 17 1 1 sh3_zsrt139d191_pal.mem 0x158afe76 +92 198092 10240 480 sh3_zsrt139d192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d192.mem 17 1 1 sh3_zsrt139d192_pal.mem 0x158afe76 +93 198092 10240 480 sh3_zsrt139d193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d193.mem 17 1 1 sh3_zsrt139d193_pal.mem 0x158afe76 +94 198092 10240 480 sh3_zsrt139d194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d194.mem 17 1 1 sh3_zsrt139d194_pal.mem 0x158afe76 +95 198092 10240 480 sh3_zsrt139d195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d195.mem 17 1 1 sh3_zsrt139d195_pal.mem 0x158afe76 +96 198092 10240 480 sh3_zsrt139d196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d196.mem 17 1 1 sh3_zsrt139d196_pal.mem 0x158afe76 +97 198092 10240 480 sh3_zsrt139d197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d197.mem 17 1 1 sh3_zsrt139d197_pal.mem 0x158afe76 +98 198092 10240 480 sh3_zsrt139d198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d198.mem 17 1 1 sh3_zsrt139d198_pal.mem 0x158afe76 +99 198092 10240 480 sh3_zsrt139d199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d199.mem 17 1 1 sh3_zsrt139d199_pal.mem 0x158afe76 +100 198092 10240 480 sh3_zsrt139d1100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1100.mem 17 1 1 sh3_zsrt139d1100_pal.mem 0x158afe76 +101 198092 10240 480 sh3_zsrt139d1101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1101.mem 17 1 1 sh3_zsrt139d1101_pal.mem 0x158afe76 +102 198092 10240 480 sh3_zsrt139d1102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1102.mem 17 1 1 sh3_zsrt139d1102_pal.mem 0x158afe76 +103 198092 10240 480 sh3_zsrt139d1103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1103.mem 17 1 1 sh3_zsrt139d1103_pal.mem 0x158afe76 +104 198092 10240 480 sh3_zsrt139d1104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1104.mem 17 1 1 sh3_zsrt139d1104_pal.mem 0x158afe76 +105 198092 10240 480 sh3_zsrt139d1105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1105.mem 17 1 1 sh3_zsrt139d1105_pal.mem 0x158afe76 +106 198092 10240 480 sh3_zsrt139d1106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1106.mem 17 1 1 sh3_zsrt139d1106_pal.mem 0x158afe76 +107 198092 10240 480 sh3_zsrt139d1107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1107.mem 17 1 1 sh3_zsrt139d1107_pal.mem 0x158afe76 +108 198092 10240 480 sh3_zsrt139d1108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1108.mem 17 1 1 sh3_zsrt139d1108_pal.mem 0x158afe76 +109 198092 10240 480 sh3_zsrt139d1109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1109.mem 17 1 1 sh3_zsrt139d1109_pal.mem 0x158afe76 +110 198092 10240 480 sh3_zsrt139d1110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1110.mem 17 1 1 sh3_zsrt139d1110_pal.mem 0x158afe76 +111 198092 10240 480 sh3_zsrt139d1111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1111.mem 17 1 1 sh3_zsrt139d1111_pal.mem 0x158afe76 +112 198092 10240 480 sh3_zsrt139d1112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1112.mem 17 1 1 sh3_zsrt139d1112_pal.mem 0x158afe76 +113 198092 10240 480 sh3_zsrt139d1113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1113.mem 17 1 1 sh3_zsrt139d1113_pal.mem 0x158afe76 +114 198092 10240 480 sh3_zsrt139d1114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1114.mem 17 1 1 sh3_zsrt139d1114_pal.mem 0x158afe76 +115 198092 10240 480 sh3_zsrt139d1115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1115.mem 17 1 1 sh3_zsrt139d1115_pal.mem 0x158afe76 +116 198092 10240 480 sh3_zsrt139d1116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1116.mem 17 1 1 sh3_zsrt139d1116_pal.mem 0x158afe76 +117 198092 10240 480 sh3_zsrt139d1117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1117.mem 17 1 1 sh3_zsrt139d1117_pal.mem 0x158afe76 +118 198092 10240 480 sh3_zsrt139d1118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1118.mem 17 1 1 sh3_zsrt139d1118_pal.mem 0x158afe76 +119 198092 10240 480 sh3_zsrt139d1119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1119.mem 17 1 1 sh3_zsrt139d1119_pal.mem 0x158afe76 +120 198092 10240 480 sh3_zsrt139d1120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1120.mem 17 1 1 sh3_zsrt139d1120_pal.mem 0x158afe76 +121 198092 10240 480 sh3_zsrt139d1121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1121.mem 17 1 1 sh3_zsrt139d1121_pal.mem 0x158afe76 +122 198092 10240 480 sh3_zsrt139d1122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1122.mem 17 1 1 sh3_zsrt139d1122_pal.mem 0x158afe76 +123 198092 10240 480 sh3_zsrt139d1123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1123.mem 17 1 1 sh3_zsrt139d1123_pal.mem 0x158afe76 +124 198092 10240 480 sh3_zsrt139d1124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1124.mem 17 1 1 sh3_zsrt139d1124_pal.mem 0x158afe76 +125 198092 10240 480 sh3_zsrt139d1125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1125.mem 17 1 1 sh3_zsrt139d1125_pal.mem 0x158afe76 +126 198092 10240 480 sh3_zsrt139d1126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1126.mem 17 1 1 sh3_zsrt139d1126_pal.mem 0x158afe76 +127 198092 10240 480 sh3_zsrt139d1127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1127.mem 17 1 1 sh3_zsrt139d1127_pal.mem 0x158afe76 +128 198092 10240 480 sh3_zsrt139d1128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1128.mem 17 1 1 sh3_zsrt139d1128_pal.mem 0x158afe76 +129 198092 10240 480 sh3_zsrt139d1129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1129.mem 17 1 1 sh3_zsrt139d1129_pal.mem 0x158afe76 +130 198092 10240 480 sh3_zsrt139d1130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1130.mem 17 1 1 sh3_zsrt139d1130_pal.mem 0x158afe76 +131 198092 10240 480 sh3_zsrt139d1131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1131.mem 17 1 1 sh3_zsrt139d1131_pal.mem 0x158afe76 +132 198092 10240 480 sh3_zsrt139d1132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1132.mem 17 1 1 sh3_zsrt139d1132_pal.mem 0x158afe76 +133 198092 10240 480 sh3_zsrt139d1133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1133.mem 17 1 1 sh3_zsrt139d1133_pal.mem 0x158afe76 +134 198092 10240 480 sh3_zsrt139d1134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1134.mem 17 1 1 sh3_zsrt139d1134_pal.mem 0x158afe76 +135 198092 10240 480 sh3_zsrt139d1135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1135.mem 17 1 1 sh3_zsrt139d1135_pal.mem 0x158afe76 +136 198092 10240 480 sh3_zsrt139d1136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1136.mem 17 1 1 sh3_zsrt139d1136_pal.mem 0x158afe76 +137 198092 10240 480 sh3_zsrt139d1137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1137.mem 17 1 1 sh3_zsrt139d1137_pal.mem 0x158afe76 +138 198092 10240 480 sh3_zsrt139d1138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1138.mem 17 1 1 sh3_zsrt139d1138_pal.mem 0x158afe76 +139 198092 10240 480 sh3_zsrt139d1139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1139.mem 17 1 1 sh3_zsrt139d1139_pal.mem 0x158afe76 +140 198092 10240 480 sh3_zsrt139d1140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1140.mem 17 1 1 sh3_zsrt139d1140_pal.mem 0x158afe76 +141 198092 10240 480 sh3_zsrt139d1141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1141.mem 17 1 1 sh3_zsrt139d1141_pal.mem 0x158afe76 +142 198092 10240 480 sh3_zsrt139d1142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1142.mem 17 1 1 sh3_zsrt139d1142_pal.mem 0x158afe76 +143 198092 10240 480 sh3_zsrt139d1143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1143.mem 17 1 1 sh3_zsrt139d1143_pal.mem 0x158afe76 +144 198092 10240 480 sh3_zsrt139d1144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1144.mem 17 1 1 sh3_zsrt139d1144_pal.mem 0x158afe76 +145 198092 10240 480 sh3_zsrt139d1145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1145.mem 17 1 1 sh3_zsrt139d1145_pal.mem 0x158afe76 +146 198092 10240 480 sh3_zsrt139d1146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1146.mem 17 1 1 sh3_zsrt139d1146_pal.mem 0x158afe76 +147 198092 10240 480 sh3_zsrt139d1147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1147.mem 17 1 1 sh3_zsrt139d1147_pal.mem 0x158afe76 +148 198092 10240 480 sh3_zsrt139d1148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1148.mem 17 1 1 sh3_zsrt139d1148_pal.mem 0x158afe76 +149 198092 10240 480 sh3_zsrt139d1149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1149.mem 17 1 1 sh3_zsrt139d1149_pal.mem 0x158afe76 +150 198092 10240 480 sh3_zsrt139d1150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1150.mem 17 1 1 sh3_zsrt139d1150_pal.mem 0x158afe76 +151 198092 10240 480 sh3_zsrt139d1151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1151.mem 17 1 1 sh3_zsrt139d1151_pal.mem 0x158afe76 +152 198092 10240 480 sh3_zsrt139d1152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1152.mem 17 1 1 sh3_zsrt139d1152_pal.mem 0x158afe76 +153 198092 10240 480 sh3_zsrt139d1153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1153.mem 17 1 1 sh3_zsrt139d1153_pal.mem 0x158afe76 +154 198092 10240 480 sh3_zsrt139d1154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1154.mem 17 1 1 sh3_zsrt139d1154_pal.mem 0x158afe76 +155 198092 10240 480 sh3_zsrt139d1155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1155.mem 17 1 1 sh3_zsrt139d1155_pal.mem 0x158afe76 +156 198092 10240 480 sh3_zsrt139d1156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1156.mem 17 1 1 sh3_zsrt139d1156_pal.mem 0x158afe76 +157 198092 10240 480 sh3_zsrt139d1157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1157.mem 17 1 1 sh3_zsrt139d1157_pal.mem 0x158afe76 +158 198092 10240 480 sh3_zsrt139d1158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1158.mem 17 1 1 sh3_zsrt139d1158_pal.mem 0x158afe76 +159 198092 10240 480 sh3_zsrt139d1159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1159.mem 17 1 1 sh3_zsrt139d1159_pal.mem 0x158afe76 +160 198092 10240 480 sh3_zsrt139d1160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1160.mem 17 1 1 sh3_zsrt139d1160_pal.mem 0x158afe76 +161 198092 10240 480 sh3_zsrt139d1161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1161.mem 17 1 1 sh3_zsrt139d1161_pal.mem 0x158afe76 +162 198092 10240 480 sh3_zsrt139d1162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1162.mem 17 1 1 sh3_zsrt139d1162_pal.mem 0x158afe76 +163 198092 10240 480 sh3_zsrt139d1163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1163.mem 17 1 1 sh3_zsrt139d1163_pal.mem 0x158afe76 +164 198092 10240 480 sh3_zsrt139d1164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1164.mem 17 1 1 sh3_zsrt139d1164_pal.mem 0x158afe76 +165 198092 10240 480 sh3_zsrt139d1165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1165.mem 17 1 1 sh3_zsrt139d1165_pal.mem 0x158afe76 +166 198092 10240 480 sh3_zsrt139d1166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1166.mem 17 1 1 sh3_zsrt139d1166_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d2_epochs.txt new file mode 100644 index 0000000..3030bcd --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d2_epochs.txt @@ -0,0 +1,457 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 454 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139d20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d20.mem 494 54 0 sh3_zsrt139d20_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139d21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d21.mem 1061 117 0 sh3_zsrt139d21_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139d22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d22.mem 530 58 1 sh3_zsrt139d22_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139d23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d23.mem 782 86 0 sh3_zsrt139d23_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139d24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d24.mem 1232 136 0 sh3_zsrt139d24_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139d25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d25.mem 1232 136 1 sh3_zsrt139d25_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139d26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d26.mem 764 84 1 sh3_zsrt139d26_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139d27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d27.mem 1232 136 1 sh3_zsrt139d27_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139d28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d28.mem 710 78 1 sh3_zsrt139d28_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139d29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d29.mem 1232 136 1 sh3_zsrt139d29_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139d210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d210.mem 1232 136 1 sh3_zsrt139d210_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139d211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d211.mem 953 105 1 sh3_zsrt139d211_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139d212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d212.mem 1232 136 1 sh3_zsrt139d212_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139d213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d213.mem 1097 121 1 sh3_zsrt139d213_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139d214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d214.mem 170 18 1 sh3_zsrt139d214_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139d215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d215.mem 62 6 0 sh3_zsrt139d215_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139d216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d216.mem 620 68 0 sh3_zsrt139d216_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139d217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d217.mem 620 68 0 sh3_zsrt139d217_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139d218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d218.mem 620 68 0 sh3_zsrt139d218_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139d219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d219.mem 620 68 0 sh3_zsrt139d219_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139d220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d220.mem 1844 204 0 sh3_zsrt139d220_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139d221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d221.mem 1844 204 1 sh3_zsrt139d221_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139d222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d222.mem 1844 204 1 sh3_zsrt139d222_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139d223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d223.mem 1844 204 1 sh3_zsrt139d223_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139d224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d224.mem 1844 204 1 sh3_zsrt139d224_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139d225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d225.mem 1844 204 1 sh3_zsrt139d225_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139d226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d226.mem 1844 204 1 sh3_zsrt139d226_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139d227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d227.mem 1844 204 1 sh3_zsrt139d227_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139d228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d228.mem 1142 126 0 sh3_zsrt139d228_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139d229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d229.mem 1178 130 1 sh3_zsrt139d229_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139d230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d230.mem 1106 122 1 sh3_zsrt139d230_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139d231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d231.mem 1070 118 0 sh3_zsrt139d231_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139d232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d232.mem 998 110 1 sh3_zsrt139d232_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139d233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d233.mem 1070 118 1 sh3_zsrt139d233_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139d234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d234.mem 782 86 0 sh3_zsrt139d234_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139d235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d235.mem 782 86 1 sh3_zsrt139d235_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139d236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d236.mem 746 82 1 sh3_zsrt139d236_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139d237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d237.mem 1070 118 0 sh3_zsrt139d237_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139d238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d238.mem 1034 114 1 sh3_zsrt139d238_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139d239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d239.mem 1106 122 1 sh3_zsrt139d239_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139d240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d240.mem 1142 126 0 sh3_zsrt139d240_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139d241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d241.mem 1034 114 1 sh3_zsrt139d241_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139d242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d242.mem 1070 118 1 sh3_zsrt139d242_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139d243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d243.mem 1142 126 1 sh3_zsrt139d243_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139d244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d244.mem 1106 122 1 sh3_zsrt139d244_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139d245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d245.mem 1070 118 1 sh3_zsrt139d245_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139d246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d246.mem 1070 118 1 sh3_zsrt139d246_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139d247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d247.mem 1358 150 1 sh3_zsrt139d247_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139d248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d248.mem 998 110 0 sh3_zsrt139d248_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139d249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d249.mem 890 98 1 sh3_zsrt139d249_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139d250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d250.mem 890 98 1 sh3_zsrt139d250_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139d251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d251.mem 962 106 1 sh3_zsrt139d251_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139d252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d252.mem 926 102 1 sh3_zsrt139d252_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139d253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d253.mem 962 106 1 sh3_zsrt139d253_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139d254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d254.mem 962 106 1 sh3_zsrt139d254_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139d255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d255.mem 1034 114 1 sh3_zsrt139d255_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139d256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d256.mem 890 98 1 sh3_zsrt139d256_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139d257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d257.mem 962 106 1 sh3_zsrt139d257_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139d258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d258.mem 566 62 1 sh3_zsrt139d258_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139d259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d259.mem 1178 130 0 sh3_zsrt139d259_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139d260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d260.mem 1070 118 1 sh3_zsrt139d260_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139d261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d261.mem 1070 118 1 sh3_zsrt139d261_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139d262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d262.mem 1250 138 1 sh3_zsrt139d262_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139d263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d263.mem 710 78 1 sh3_zsrt139d263_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139d264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d264.mem 1142 126 1 sh3_zsrt139d264_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139d265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d265.mem 1178 130 1 sh3_zsrt139d265_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139d266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d266.mem 1106 122 1 sh3_zsrt139d266_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139d267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d267.mem 1142 126 1 sh3_zsrt139d267_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139d268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d268.mem 530 58 1 sh3_zsrt139d268_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139d269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d269.mem 1322 146 0 sh3_zsrt139d269_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139d270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d270.mem 674 74 1 sh3_zsrt139d270_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139d271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d271.mem 602 66 1 sh3_zsrt139d271_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139d272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d272.mem 458 50 1 sh3_zsrt139d272_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139d273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d273.mem 1214 134 0 sh3_zsrt139d273_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139d274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d274.mem 1376 152 1 sh3_zsrt139d274_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139d275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d275.mem 17 1 0 sh3_zsrt139d275_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139d276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d276.mem 17 1 1 sh3_zsrt139d276_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139d277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d277.mem 17 1 1 sh3_zsrt139d277_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139d278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d278.mem 17 1 1 sh3_zsrt139d278_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139d279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d279.mem 17 1 1 sh3_zsrt139d279_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139d280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d280.mem 17 1 1 sh3_zsrt139d280_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139d281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d281.mem 17 1 1 sh3_zsrt139d281_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139d282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d282.mem 17 1 1 sh3_zsrt139d282_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139d283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d283.mem 17 1 1 sh3_zsrt139d283_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139d284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d284.mem 17 1 1 sh3_zsrt139d284_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139d285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d285.mem 17 1 1 sh3_zsrt139d285_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139d286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d286.mem 17 1 1 sh3_zsrt139d286_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139d287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d287.mem 17 1 1 sh3_zsrt139d287_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139d288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d288.mem 17 1 1 sh3_zsrt139d288_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139d289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d289.mem 17 1 1 sh3_zsrt139d289_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139d290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d290.mem 17 1 1 sh3_zsrt139d290_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139d291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d291.mem 17 1 1 sh3_zsrt139d291_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139d292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d292.mem 17 1 1 sh3_zsrt139d292_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139d293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d293.mem 17 1 1 sh3_zsrt139d293_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139d294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d294.mem 17 1 1 sh3_zsrt139d294_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139d295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d295.mem 17 1 1 sh3_zsrt139d295_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139d296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d296.mem 17 1 1 sh3_zsrt139d296_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139d297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d297.mem 17 1 1 sh3_zsrt139d297_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139d298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d298.mem 17 1 1 sh3_zsrt139d298_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139d299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d299.mem 17 1 1 sh3_zsrt139d299_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139d2100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2100.mem 17 1 1 sh3_zsrt139d2100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139d2101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2101.mem 17 1 1 sh3_zsrt139d2101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139d2102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2102.mem 17 1 1 sh3_zsrt139d2102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139d2103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2103.mem 17 1 1 sh3_zsrt139d2103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139d2104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2104.mem 17 1 1 sh3_zsrt139d2104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139d2105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2105.mem 17 1 1 sh3_zsrt139d2105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139d2106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2106.mem 17 1 1 sh3_zsrt139d2106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139d2107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2107.mem 17 1 1 sh3_zsrt139d2107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139d2108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2108.mem 17 1 1 sh3_zsrt139d2108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139d2109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2109.mem 17 1 1 sh3_zsrt139d2109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139d2110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2110.mem 17 1 1 sh3_zsrt139d2110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139d2111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2111.mem 17 1 1 sh3_zsrt139d2111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139d2112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2112.mem 17 1 1 sh3_zsrt139d2112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139d2113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2113.mem 17 1 1 sh3_zsrt139d2113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139d2114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2114.mem 17 1 1 sh3_zsrt139d2114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139d2115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2115.mem 17 1 1 sh3_zsrt139d2115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139d2116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2116.mem 17 1 1 sh3_zsrt139d2116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139d2117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2117.mem 17 1 1 sh3_zsrt139d2117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139d2118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2118.mem 17 1 1 sh3_zsrt139d2118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139d2119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2119.mem 17 1 1 sh3_zsrt139d2119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139d2120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2120.mem 17 1 1 sh3_zsrt139d2120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139d2121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2121.mem 17 1 1 sh3_zsrt139d2121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139d2122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2122.mem 17 1 1 sh3_zsrt139d2122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139d2123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2123.mem 17 1 1 sh3_zsrt139d2123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139d2124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2124.mem 17 1 1 sh3_zsrt139d2124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139d2125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2125.mem 17 1 1 sh3_zsrt139d2125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139d2126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2126.mem 17 1 1 sh3_zsrt139d2126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139d2127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2127.mem 17 1 1 sh3_zsrt139d2127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139d2128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2128.mem 17 1 1 sh3_zsrt139d2128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139d2129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2129.mem 17 1 1 sh3_zsrt139d2129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139d2130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2130.mem 17 1 1 sh3_zsrt139d2130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139d2131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2131.mem 17 1 1 sh3_zsrt139d2131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139d2132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2132.mem 17 1 1 sh3_zsrt139d2132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139d2133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2133.mem 17 1 1 sh3_zsrt139d2133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139d2134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2134.mem 17 1 1 sh3_zsrt139d2134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139d2135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2135.mem 17 1 1 sh3_zsrt139d2135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139d2136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2136.mem 17 1 1 sh3_zsrt139d2136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139d2137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2137.mem 17 1 1 sh3_zsrt139d2137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139d2138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2138.mem 17 1 1 sh3_zsrt139d2138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139d2139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2139.mem 17 1 1 sh3_zsrt139d2139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139d2140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2140.mem 17 1 1 sh3_zsrt139d2140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139d2141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2141.mem 17 1 1 sh3_zsrt139d2141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139d2142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2142.mem 17 1 1 sh3_zsrt139d2142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139d2143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2143.mem 17 1 1 sh3_zsrt139d2143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139d2144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2144.mem 17 1 1 sh3_zsrt139d2144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139d2145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2145.mem 17 1 1 sh3_zsrt139d2145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139d2146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2146.mem 17 1 1 sh3_zsrt139d2146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139d2147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2147.mem 17 1 1 sh3_zsrt139d2147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139d2148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2148.mem 17 1 1 sh3_zsrt139d2148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139d2149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2149.mem 17 1 1 sh3_zsrt139d2149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139d2150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2150.mem 17 1 1 sh3_zsrt139d2150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139d2151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2151.mem 17 1 1 sh3_zsrt139d2151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139d2152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2152.mem 17 1 1 sh3_zsrt139d2152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139d2153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2153.mem 17 1 1 sh3_zsrt139d2153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139d2154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2154.mem 17 1 1 sh3_zsrt139d2154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139d2155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2155.mem 17 1 1 sh3_zsrt139d2155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139d2156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2156.mem 17 1 1 sh3_zsrt139d2156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139d2157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2157.mem 17 1 1 sh3_zsrt139d2157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139d2158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2158.mem 17 1 1 sh3_zsrt139d2158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139d2159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2159.mem 17 1 1 sh3_zsrt139d2159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139d2160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2160.mem 17 1 1 sh3_zsrt139d2160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139d2161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2161.mem 17 1 1 sh3_zsrt139d2161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139d2162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2162.mem 17 1 1 sh3_zsrt139d2162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139d2163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2163.mem 17 1 1 sh3_zsrt139d2163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139d2164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2164.mem 17 1 1 sh3_zsrt139d2164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139d2165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2165.mem 17 1 1 sh3_zsrt139d2165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139d2166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2166.mem 17 1 1 sh3_zsrt139d2166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139d2167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2167.mem 17 1 1 sh3_zsrt139d2167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139d2168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2168.mem 17 1 1 sh3_zsrt139d2168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139d2169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2169.mem 17 1 1 sh3_zsrt139d2169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139d2170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2170.mem 17 1 1 sh3_zsrt139d2170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139d2171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2171.mem 17 1 1 sh3_zsrt139d2171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139d2172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2172.mem 17 1 1 sh3_zsrt139d2172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139d2173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2173.mem 17 1 1 sh3_zsrt139d2173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139d2174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2174.mem 17 1 1 sh3_zsrt139d2174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139d2175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2175.mem 17 1 1 sh3_zsrt139d2175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139d2176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2176.mem 17 1 1 sh3_zsrt139d2176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139d2177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2177.mem 17 1 1 sh3_zsrt139d2177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139d2178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2178.mem 17 1 1 sh3_zsrt139d2178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139d2179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2179.mem 17 1 1 sh3_zsrt139d2179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139d2180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2180.mem 17 1 1 sh3_zsrt139d2180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139d2181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2181.mem 17 1 1 sh3_zsrt139d2181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139d2182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2182.mem 17 1 1 sh3_zsrt139d2182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139d2183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2183.mem 17 1 1 sh3_zsrt139d2183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139d2184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2184.mem 17 1 1 sh3_zsrt139d2184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139d2185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2185.mem 17 1 1 sh3_zsrt139d2185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139d2186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2186.mem 17 1 1 sh3_zsrt139d2186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139d2187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2187.mem 17 1 1 sh3_zsrt139d2187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139d2188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2188.mem 17 1 1 sh3_zsrt139d2188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139d2189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2189.mem 17 1 1 sh3_zsrt139d2189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139d2190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2190.mem 17 1 1 sh3_zsrt139d2190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139d2191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2191.mem 17 1 1 sh3_zsrt139d2191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139d2192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2192.mem 17 1 1 sh3_zsrt139d2192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139d2193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2193.mem 17 1 1 sh3_zsrt139d2193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139d2194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2194.mem 17 1 1 sh3_zsrt139d2194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139d2195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2195.mem 17 1 1 sh3_zsrt139d2195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139d2196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2196.mem 17 1 1 sh3_zsrt139d2196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139d2197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2197.mem 17 1 1 sh3_zsrt139d2197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139d2198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2198.mem 17 1 1 sh3_zsrt139d2198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139d2199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2199.mem 17 1 1 sh3_zsrt139d2199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139d2200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2200.mem 17 1 1 sh3_zsrt139d2200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139d2201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2201.mem 17 1 1 sh3_zsrt139d2201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139d2202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2202.mem 17 1 1 sh3_zsrt139d2202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139d2203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2203.mem 17 1 1 sh3_zsrt139d2203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139d2204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2204.mem 17 1 1 sh3_zsrt139d2204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139d2205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2205.mem 17 1 1 sh3_zsrt139d2205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139d2206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2206.mem 17 1 1 sh3_zsrt139d2206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139d2207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2207.mem 17 1 1 sh3_zsrt139d2207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139d2208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2208.mem 17 1 1 sh3_zsrt139d2208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139d2209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2209.mem 17 1 1 sh3_zsrt139d2209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139d2210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2210.mem 17 1 1 sh3_zsrt139d2210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139d2211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2211.mem 17 1 1 sh3_zsrt139d2211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139d2212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2212.mem 17 1 1 sh3_zsrt139d2212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139d2213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2213.mem 17 1 1 sh3_zsrt139d2213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139d2214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2214.mem 17 1 1 sh3_zsrt139d2214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139d2215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2215.mem 17 1 1 sh3_zsrt139d2215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139d2216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2216.mem 17 1 1 sh3_zsrt139d2216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139d2217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2217.mem 17 1 1 sh3_zsrt139d2217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139d2218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2218.mem 17 1 1 sh3_zsrt139d2218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139d2219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2219.mem 17 1 1 sh3_zsrt139d2219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139d2220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2220.mem 17 1 1 sh3_zsrt139d2220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139d2221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2221.mem 17 1 1 sh3_zsrt139d2221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139d2222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2222.mem 17 1 1 sh3_zsrt139d2222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139d2223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2223.mem 17 1 1 sh3_zsrt139d2223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139d2224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2224.mem 17 1 1 sh3_zsrt139d2224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139d2225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2225.mem 17 1 1 sh3_zsrt139d2225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139d2226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2226.mem 17 1 1 sh3_zsrt139d2226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139d2227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2227.mem 17 1 1 sh3_zsrt139d2227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139d2228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2228.mem 17 1 1 sh3_zsrt139d2228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139d2229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2229.mem 17 1 1 sh3_zsrt139d2229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139d2230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2230.mem 17 1 1 sh3_zsrt139d2230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139d2231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2231.mem 17 1 1 sh3_zsrt139d2231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139d2232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2232.mem 17 1 1 sh3_zsrt139d2232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139d2233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2233.mem 17 1 1 sh3_zsrt139d2233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139d2234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2234.mem 17 1 1 sh3_zsrt139d2234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139d2235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2235.mem 17 1 1 sh3_zsrt139d2235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139d2236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2236.mem 17 1 1 sh3_zsrt139d2236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139d2237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2237.mem 17 1 1 sh3_zsrt139d2237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139d2238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2238.mem 17 1 1 sh3_zsrt139d2238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139d2239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2239.mem 17 1 1 sh3_zsrt139d2239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139d2240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2240.mem 17 1 1 sh3_zsrt139d2240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139d2241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2241.mem 17 1 1 sh3_zsrt139d2241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139d2242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2242.mem 17 1 1 sh3_zsrt139d2242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139d2243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2243.mem 17 1 1 sh3_zsrt139d2243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139d2244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2244.mem 17 1 1 sh3_zsrt139d2244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139d2245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2245.mem 17 1 1 sh3_zsrt139d2245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139d2246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2246.mem 17 1 1 sh3_zsrt139d2246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139d2247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2247.mem 17 1 1 sh3_zsrt139d2247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139d2248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2248.mem 17 1 1 sh3_zsrt139d2248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139d2249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2249.mem 17 1 1 sh3_zsrt139d2249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139d2250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2250.mem 17 1 1 sh3_zsrt139d2250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139d2251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2251.mem 17 1 1 sh3_zsrt139d2251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139d2252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2252.mem 17 1 1 sh3_zsrt139d2252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139d2253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2253.mem 17 1 1 sh3_zsrt139d2253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139d2254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2254.mem 17 1 1 sh3_zsrt139d2254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139d2255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2255.mem 17 1 1 sh3_zsrt139d2255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139d2256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2256.mem 17 1 1 sh3_zsrt139d2256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139d2257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2257.mem 17 1 1 sh3_zsrt139d2257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139d2258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2258.mem 17 1 1 sh3_zsrt139d2258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139d2259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2259.mem 17 1 1 sh3_zsrt139d2259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139d2260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2260.mem 17 1 1 sh3_zsrt139d2260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139d2261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2261.mem 17 1 1 sh3_zsrt139d2261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139d2262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2262.mem 17 1 1 sh3_zsrt139d2262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139d2263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2263.mem 17 1 1 sh3_zsrt139d2263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139d2264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2264.mem 17 1 1 sh3_zsrt139d2264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139d2265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2265.mem 17 1 1 sh3_zsrt139d2265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139d2266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2266.mem 17 1 1 sh3_zsrt139d2266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139d2267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2267.mem 17 1 1 sh3_zsrt139d2267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139d2268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2268.mem 17 1 1 sh3_zsrt139d2268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139d2269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2269.mem 17 1 1 sh3_zsrt139d2269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139d2270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2270.mem 17 1 1 sh3_zsrt139d2270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139d2271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2271.mem 17 1 1 sh3_zsrt139d2271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139d2272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2272.mem 17 1 1 sh3_zsrt139d2272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139d2273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2273.mem 17 1 1 sh3_zsrt139d2273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139d2274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2274.mem 17 1 1 sh3_zsrt139d2274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139d2275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2275.mem 17 1 1 sh3_zsrt139d2275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139d2276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2276.mem 17 1 1 sh3_zsrt139d2276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139d2277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2277.mem 17 1 1 sh3_zsrt139d2277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139d2278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2278.mem 17 1 1 sh3_zsrt139d2278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139d2279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2279.mem 17 1 1 sh3_zsrt139d2279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139d2280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2280.mem 17 1 1 sh3_zsrt139d2280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139d2281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2281.mem 17 1 1 sh3_zsrt139d2281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139d2282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2282.mem 17 1 1 sh3_zsrt139d2282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139d2283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2283.mem 17 1 1 sh3_zsrt139d2283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139d2284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2284.mem 17 1 1 sh3_zsrt139d2284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139d2285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2285.mem 17 1 1 sh3_zsrt139d2285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139d2286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2286.mem 17 1 1 sh3_zsrt139d2286_pal.mem 0x158afe76 +287 198075 10240 480 sh3_zsrt139d2287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2287.mem 17 1 0 sh3_zsrt139d2287_pal.mem 0x158afe76 +288 198075 10240 480 sh3_zsrt139d2288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2288.mem 17 1 1 sh3_zsrt139d2288_pal.mem 0x158afe76 +289 198075 10240 480 sh3_zsrt139d2289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2289.mem 17 1 1 sh3_zsrt139d2289_pal.mem 0x158afe76 +290 198075 10240 480 sh3_zsrt139d2290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2290.mem 17 1 1 sh3_zsrt139d2290_pal.mem 0x158afe76 +291 198075 10240 480 sh3_zsrt139d2291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2291.mem 17 1 1 sh3_zsrt139d2291_pal.mem 0x158afe76 +292 198075 10240 480 sh3_zsrt139d2292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2292.mem 17 1 1 sh3_zsrt139d2292_pal.mem 0x158afe76 +293 198075 10240 480 sh3_zsrt139d2293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2293.mem 17 1 1 sh3_zsrt139d2293_pal.mem 0x158afe76 +294 198092 10240 480 sh3_zsrt139d2294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2294.mem 17 1 1 sh3_zsrt139d2294_pal.mem 0x158afe76 +295 198092 10240 480 sh3_zsrt139d2295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2295.mem 17 1 1 sh3_zsrt139d2295_pal.mem 0x158afe76 +296 198092 10240 480 sh3_zsrt139d2296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2296.mem 17 1 1 sh3_zsrt139d2296_pal.mem 0x158afe76 +297 198092 10240 480 sh3_zsrt139d2297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2297.mem 17 1 1 sh3_zsrt139d2297_pal.mem 0x158afe76 +298 198092 10240 480 sh3_zsrt139d2298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2298.mem 17 1 1 sh3_zsrt139d2298_pal.mem 0x158afe76 +299 198092 10240 480 sh3_zsrt139d2299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2299.mem 17 1 1 sh3_zsrt139d2299_pal.mem 0x158afe76 +300 198092 10240 480 sh3_zsrt139d2300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2300.mem 17 1 1 sh3_zsrt139d2300_pal.mem 0x158afe76 +301 198092 10240 480 sh3_zsrt139d2301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2301.mem 17 1 1 sh3_zsrt139d2301_pal.mem 0x158afe76 +302 198092 10240 480 sh3_zsrt139d2302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2302.mem 17 1 1 sh3_zsrt139d2302_pal.mem 0x158afe76 +303 198092 10240 480 sh3_zsrt139d2303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2303.mem 17 1 1 sh3_zsrt139d2303_pal.mem 0x158afe76 +304 198092 10240 480 sh3_zsrt139d2304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2304.mem 17 1 1 sh3_zsrt139d2304_pal.mem 0x158afe76 +305 198092 10240 480 sh3_zsrt139d2305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2305.mem 17 1 1 sh3_zsrt139d2305_pal.mem 0x158afe76 +306 198092 10240 480 sh3_zsrt139d2306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2306.mem 17 1 1 sh3_zsrt139d2306_pal.mem 0x158afe76 +307 198092 10240 480 sh3_zsrt139d2307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2307.mem 17 1 1 sh3_zsrt139d2307_pal.mem 0x158afe76 +308 198092 10240 480 sh3_zsrt139d2308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2308.mem 17 1 1 sh3_zsrt139d2308_pal.mem 0x158afe76 +309 198092 10240 480 sh3_zsrt139d2309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2309.mem 17 1 1 sh3_zsrt139d2309_pal.mem 0x158afe76 +310 198092 10240 480 sh3_zsrt139d2310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2310.mem 17 1 1 sh3_zsrt139d2310_pal.mem 0x158afe76 +311 198092 10240 480 sh3_zsrt139d2311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2311.mem 17 1 1 sh3_zsrt139d2311_pal.mem 0x158afe76 +312 198092 10240 480 sh3_zsrt139d2312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2312.mem 17 1 1 sh3_zsrt139d2312_pal.mem 0x158afe76 +313 198092 10240 480 sh3_zsrt139d2313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2313.mem 17 1 1 sh3_zsrt139d2313_pal.mem 0x158afe76 +314 198092 10240 480 sh3_zsrt139d2314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2314.mem 17 1 1 sh3_zsrt139d2314_pal.mem 0x158afe76 +315 198092 10240 480 sh3_zsrt139d2315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2315.mem 17 1 1 sh3_zsrt139d2315_pal.mem 0x158afe76 +316 198092 10240 480 sh3_zsrt139d2316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2316.mem 17 1 1 sh3_zsrt139d2316_pal.mem 0x158afe76 +317 198092 10240 480 sh3_zsrt139d2317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2317.mem 17 1 1 sh3_zsrt139d2317_pal.mem 0x158afe76 +318 198092 10240 480 sh3_zsrt139d2318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2318.mem 17 1 1 sh3_zsrt139d2318_pal.mem 0x158afe76 +319 198092 10240 480 sh3_zsrt139d2319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2319.mem 17 1 1 sh3_zsrt139d2319_pal.mem 0x158afe76 +320 198092 10240 480 sh3_zsrt139d2320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2320.mem 17 1 1 sh3_zsrt139d2320_pal.mem 0x158afe76 +321 198092 10240 480 sh3_zsrt139d2321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2321.mem 17 1 1 sh3_zsrt139d2321_pal.mem 0x158afe76 +322 198092 10240 480 sh3_zsrt139d2322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2322.mem 17 1 1 sh3_zsrt139d2322_pal.mem 0x158afe76 +323 198092 10240 480 sh3_zsrt139d2323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2323.mem 17 1 1 sh3_zsrt139d2323_pal.mem 0x158afe76 +324 198092 10240 480 sh3_zsrt139d2324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2324.mem 17 1 1 sh3_zsrt139d2324_pal.mem 0x158afe76 +325 198092 10240 480 sh3_zsrt139d2325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2325.mem 17 1 1 sh3_zsrt139d2325_pal.mem 0x158afe76 +326 198092 10240 480 sh3_zsrt139d2326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2326.mem 17 1 1 sh3_zsrt139d2326_pal.mem 0x158afe76 +327 198092 10240 480 sh3_zsrt139d2327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2327.mem 17 1 1 sh3_zsrt139d2327_pal.mem 0x158afe76 +328 198092 10240 480 sh3_zsrt139d2328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2328.mem 17 1 1 sh3_zsrt139d2328_pal.mem 0x158afe76 +329 198092 10240 480 sh3_zsrt139d2329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2329.mem 17 1 1 sh3_zsrt139d2329_pal.mem 0x158afe76 +330 198092 10240 480 sh3_zsrt139d2330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2330.mem 17 1 1 sh3_zsrt139d2330_pal.mem 0x158afe76 +331 198092 10240 480 sh3_zsrt139d2331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2331.mem 17 1 1 sh3_zsrt139d2331_pal.mem 0x158afe76 +332 198092 10240 480 sh3_zsrt139d2332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2332.mem 17 1 1 sh3_zsrt139d2332_pal.mem 0x158afe76 +333 198092 10240 480 sh3_zsrt139d2333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2333.mem 17 1 1 sh3_zsrt139d2333_pal.mem 0x158afe76 +334 198092 10240 480 sh3_zsrt139d2334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2334.mem 17 1 1 sh3_zsrt139d2334_pal.mem 0x158afe76 +335 198092 10240 480 sh3_zsrt139d2335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2335.mem 17 1 1 sh3_zsrt139d2335_pal.mem 0x158afe76 +336 198092 10240 480 sh3_zsrt139d2336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2336.mem 17 1 1 sh3_zsrt139d2336_pal.mem 0x158afe76 +337 198092 10240 480 sh3_zsrt139d2337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2337.mem 17 1 1 sh3_zsrt139d2337_pal.mem 0x158afe76 +338 198092 10240 480 sh3_zsrt139d2338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2338.mem 17 1 1 sh3_zsrt139d2338_pal.mem 0x158afe76 +339 198092 10240 480 sh3_zsrt139d2339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2339.mem 17 1 1 sh3_zsrt139d2339_pal.mem 0x158afe76 +340 198092 10240 480 sh3_zsrt139d2340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2340.mem 17 1 1 sh3_zsrt139d2340_pal.mem 0x158afe76 +341 198092 10240 480 sh3_zsrt139d2341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2341.mem 17 1 1 sh3_zsrt139d2341_pal.mem 0x158afe76 +342 198092 10240 480 sh3_zsrt139d2342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2342.mem 17 1 1 sh3_zsrt139d2342_pal.mem 0x158afe76 +343 198092 10240 480 sh3_zsrt139d2343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2343.mem 17 1 1 sh3_zsrt139d2343_pal.mem 0x158afe76 +344 198092 10240 480 sh3_zsrt139d2344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2344.mem 17 1 1 sh3_zsrt139d2344_pal.mem 0x158afe76 +345 198092 10240 480 sh3_zsrt139d2345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2345.mem 17 1 1 sh3_zsrt139d2345_pal.mem 0x158afe76 +346 198092 10240 480 sh3_zsrt139d2346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2346.mem 17 1 1 sh3_zsrt139d2346_pal.mem 0x158afe76 +347 198092 10240 480 sh3_zsrt139d2347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2347.mem 17 1 1 sh3_zsrt139d2347_pal.mem 0x158afe76 +348 198092 10240 480 sh3_zsrt139d2348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2348.mem 17 1 1 sh3_zsrt139d2348_pal.mem 0x158afe76 +349 198092 10240 480 sh3_zsrt139d2349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2349.mem 17 1 1 sh3_zsrt139d2349_pal.mem 0x158afe76 +350 198092 10240 480 sh3_zsrt139d2350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2350.mem 17 1 1 sh3_zsrt139d2350_pal.mem 0x158afe76 +351 198092 10240 480 sh3_zsrt139d2351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2351.mem 17 1 1 sh3_zsrt139d2351_pal.mem 0x158afe76 +352 198092 10240 480 sh3_zsrt139d2352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2352.mem 17 1 1 sh3_zsrt139d2352_pal.mem 0x158afe76 +353 198092 10240 480 sh3_zsrt139d2353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2353.mem 17 1 1 sh3_zsrt139d2353_pal.mem 0x158afe76 +354 198092 10240 480 sh3_zsrt139d2354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2354.mem 17 1 1 sh3_zsrt139d2354_pal.mem 0x158afe76 +355 198092 10240 480 sh3_zsrt139d2355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2355.mem 17 1 1 sh3_zsrt139d2355_pal.mem 0x158afe76 +356 198092 10240 480 sh3_zsrt139d2356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2356.mem 17 1 1 sh3_zsrt139d2356_pal.mem 0x158afe76 +357 198092 10240 480 sh3_zsrt139d2357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2357.mem 17 1 1 sh3_zsrt139d2357_pal.mem 0x158afe76 +358 198092 10240 480 sh3_zsrt139d2358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2358.mem 17 1 1 sh3_zsrt139d2358_pal.mem 0x158afe76 +359 198092 10240 480 sh3_zsrt139d2359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2359.mem 17 1 1 sh3_zsrt139d2359_pal.mem 0x158afe76 +360 198092 10240 480 sh3_zsrt139d2360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2360.mem 17 1 1 sh3_zsrt139d2360_pal.mem 0x158afe76 +361 198092 10240 480 sh3_zsrt139d2361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2361.mem 17 1 1 sh3_zsrt139d2361_pal.mem 0x158afe76 +362 198092 10240 480 sh3_zsrt139d2362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2362.mem 17 1 1 sh3_zsrt139d2362_pal.mem 0x158afe76 +363 198092 10240 480 sh3_zsrt139d2363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2363.mem 17 1 1 sh3_zsrt139d2363_pal.mem 0x158afe76 +364 198092 10240 480 sh3_zsrt139d2364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2364.mem 17 1 1 sh3_zsrt139d2364_pal.mem 0x158afe76 +365 198092 10240 480 sh3_zsrt139d2365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2365.mem 17 1 1 sh3_zsrt139d2365_pal.mem 0x158afe76 +366 198092 10240 480 sh3_zsrt139d2366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2366.mem 17 1 1 sh3_zsrt139d2366_pal.mem 0x158afe76 +367 198092 10240 480 sh3_zsrt139d2367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2367.mem 17 1 1 sh3_zsrt139d2367_pal.mem 0x158afe76 +368 198092 10240 480 sh3_zsrt139d2368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2368.mem 17 1 1 sh3_zsrt139d2368_pal.mem 0x158afe76 +369 198092 10240 480 sh3_zsrt139d2369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2369.mem 17 1 1 sh3_zsrt139d2369_pal.mem 0x158afe76 +370 198092 10240 480 sh3_zsrt139d2370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2370.mem 17 1 1 sh3_zsrt139d2370_pal.mem 0x158afe76 +371 198092 10240 480 sh3_zsrt139d2371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2371.mem 17 1 1 sh3_zsrt139d2371_pal.mem 0x158afe76 +372 198092 10240 480 sh3_zsrt139d2372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2372.mem 17 1 1 sh3_zsrt139d2372_pal.mem 0x158afe76 +373 198092 10240 480 sh3_zsrt139d2373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2373.mem 17 1 1 sh3_zsrt139d2373_pal.mem 0x158afe76 +374 198092 10240 480 sh3_zsrt139d2374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2374.mem 17 1 1 sh3_zsrt139d2374_pal.mem 0x158afe76 +375 198092 10240 480 sh3_zsrt139d2375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2375.mem 17 1 1 sh3_zsrt139d2375_pal.mem 0x158afe76 +376 198092 10240 480 sh3_zsrt139d2376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2376.mem 17 1 1 sh3_zsrt139d2376_pal.mem 0x158afe76 +377 198092 10240 480 sh3_zsrt139d2377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2377.mem 17 1 1 sh3_zsrt139d2377_pal.mem 0x158afe76 +378 198092 10240 480 sh3_zsrt139d2378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2378.mem 17 1 1 sh3_zsrt139d2378_pal.mem 0x158afe76 +379 198092 10240 480 sh3_zsrt139d2379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2379.mem 17 1 1 sh3_zsrt139d2379_pal.mem 0x158afe76 +380 198092 10240 480 sh3_zsrt139d2380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2380.mem 17 1 1 sh3_zsrt139d2380_pal.mem 0x158afe76 +381 198092 10240 480 sh3_zsrt139d2381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2381.mem 17 1 1 sh3_zsrt139d2381_pal.mem 0x158afe76 +382 198092 10240 480 sh3_zsrt139d2382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2382.mem 17 1 1 sh3_zsrt139d2382_pal.mem 0x158afe76 +383 198092 10240 480 sh3_zsrt139d2383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2383.mem 17 1 1 sh3_zsrt139d2383_pal.mem 0x158afe76 +384 198092 10240 480 sh3_zsrt139d2384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2384.mem 17 1 1 sh3_zsrt139d2384_pal.mem 0x158afe76 +385 198092 10240 480 sh3_zsrt139d2385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2385.mem 17 1 1 sh3_zsrt139d2385_pal.mem 0x158afe76 +386 198092 10240 480 sh3_zsrt139d2386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2386.mem 17 1 1 sh3_zsrt139d2386_pal.mem 0x158afe76 +387 198092 10240 480 sh3_zsrt139d2387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2387.mem 17 1 1 sh3_zsrt139d2387_pal.mem 0x158afe76 +388 198092 10240 480 sh3_zsrt139d2388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2388.mem 17 1 1 sh3_zsrt139d2388_pal.mem 0x158afe76 +389 198092 10240 480 sh3_zsrt139d2389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2389.mem 17 1 1 sh3_zsrt139d2389_pal.mem 0x158afe76 +390 198092 10240 480 sh3_zsrt139d2390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2390.mem 17 1 1 sh3_zsrt139d2390_pal.mem 0x158afe76 +391 198092 10240 480 sh3_zsrt139d2391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2391.mem 17 1 1 sh3_zsrt139d2391_pal.mem 0x158afe76 +392 198092 10240 480 sh3_zsrt139d2392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2392.mem 17 1 1 sh3_zsrt139d2392_pal.mem 0x158afe76 +393 198092 10240 480 sh3_zsrt139d2393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2393.mem 17 1 1 sh3_zsrt139d2393_pal.mem 0x158afe76 +394 198092 10240 480 sh3_zsrt139d2394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2394.mem 17 1 1 sh3_zsrt139d2394_pal.mem 0x158afe76 +395 198092 10240 480 sh3_zsrt139d2395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2395.mem 17 1 1 sh3_zsrt139d2395_pal.mem 0x158afe76 +396 198092 10240 480 sh3_zsrt139d2396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2396.mem 17 1 1 sh3_zsrt139d2396_pal.mem 0x158afe76 +397 198092 10240 480 sh3_zsrt139d2397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2397.mem 17 1 1 sh3_zsrt139d2397_pal.mem 0x158afe76 +398 198092 10240 480 sh3_zsrt139d2398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2398.mem 17 1 1 sh3_zsrt139d2398_pal.mem 0x158afe76 +399 198092 10240 480 sh3_zsrt139d2399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2399.mem 17 1 1 sh3_zsrt139d2399_pal.mem 0x158afe76 +400 198092 10240 480 sh3_zsrt139d2400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2400.mem 17 1 1 sh3_zsrt139d2400_pal.mem 0x158afe76 +401 198092 10240 480 sh3_zsrt139d2401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2401.mem 17 1 1 sh3_zsrt139d2401_pal.mem 0x158afe76 +402 198092 10240 480 sh3_zsrt139d2402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2402.mem 17 1 1 sh3_zsrt139d2402_pal.mem 0x158afe76 +403 198092 10240 480 sh3_zsrt139d2403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2403.mem 17 1 1 sh3_zsrt139d2403_pal.mem 0x158afe76 +404 198092 10240 480 sh3_zsrt139d2404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2404.mem 17 1 1 sh3_zsrt139d2404_pal.mem 0x158afe76 +405 198092 10240 480 sh3_zsrt139d2405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2405.mem 17 1 1 sh3_zsrt139d2405_pal.mem 0x158afe76 +406 198092 10240 480 sh3_zsrt139d2406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2406.mem 17 1 1 sh3_zsrt139d2406_pal.mem 0x158afe76 +407 198092 10240 480 sh3_zsrt139d2407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2407.mem 17 1 1 sh3_zsrt139d2407_pal.mem 0x158afe76 +408 198092 10240 480 sh3_zsrt139d2408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2408.mem 17 1 1 sh3_zsrt139d2408_pal.mem 0x158afe76 +409 198092 10240 480 sh3_zsrt139d2409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2409.mem 17 1 1 sh3_zsrt139d2409_pal.mem 0x158afe76 +410 198092 10240 480 sh3_zsrt139d2410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2410.mem 17 1 1 sh3_zsrt139d2410_pal.mem 0x158afe76 +411 198092 10240 480 sh3_zsrt139d2411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2411.mem 17 1 1 sh3_zsrt139d2411_pal.mem 0x158afe76 +412 198092 10240 480 sh3_zsrt139d2412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2412.mem 17 1 1 sh3_zsrt139d2412_pal.mem 0x158afe76 +413 198092 10240 480 sh3_zsrt139d2413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2413.mem 17 1 1 sh3_zsrt139d2413_pal.mem 0x158afe76 +414 198092 10240 480 sh3_zsrt139d2414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2414.mem 17 1 1 sh3_zsrt139d2414_pal.mem 0x158afe76 +415 198092 10240 480 sh3_zsrt139d2415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2415.mem 17 1 1 sh3_zsrt139d2415_pal.mem 0x158afe76 +416 198092 10240 480 sh3_zsrt139d2416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2416.mem 17 1 1 sh3_zsrt139d2416_pal.mem 0x158afe76 +417 198092 10240 480 sh3_zsrt139d2417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2417.mem 17 1 1 sh3_zsrt139d2417_pal.mem 0x158afe76 +418 198092 10240 480 sh3_zsrt139d2418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2418.mem 17 1 1 sh3_zsrt139d2418_pal.mem 0x158afe76 +419 198092 10240 480 sh3_zsrt139d2419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2419.mem 17 1 1 sh3_zsrt139d2419_pal.mem 0x158afe76 +420 198092 10240 480 sh3_zsrt139d2420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2420.mem 17 1 1 sh3_zsrt139d2420_pal.mem 0x158afe76 +421 198092 10240 480 sh3_zsrt139d2421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2421.mem 17 1 1 sh3_zsrt139d2421_pal.mem 0x158afe76 +422 198092 10240 480 sh3_zsrt139d2422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2422.mem 17 1 1 sh3_zsrt139d2422_pal.mem 0x158afe76 +423 198092 10240 480 sh3_zsrt139d2423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2423.mem 17 1 1 sh3_zsrt139d2423_pal.mem 0x158afe76 +424 198092 10240 480 sh3_zsrt139d2424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2424.mem 17 1 1 sh3_zsrt139d2424_pal.mem 0x158afe76 +425 198092 10240 480 sh3_zsrt139d2425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2425.mem 17 1 1 sh3_zsrt139d2425_pal.mem 0x158afe76 +426 198092 10240 480 sh3_zsrt139d2426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2426.mem 17 1 1 sh3_zsrt139d2426_pal.mem 0x158afe76 +427 198092 10240 480 sh3_zsrt139d2427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2427.mem 17 1 1 sh3_zsrt139d2427_pal.mem 0x158afe76 +428 198092 10240 480 sh3_zsrt139d2428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2428.mem 17 1 1 sh3_zsrt139d2428_pal.mem 0x158afe76 +429 198092 10240 480 sh3_zsrt139d2429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2429.mem 17 1 1 sh3_zsrt139d2429_pal.mem 0x158afe76 +430 198092 10240 480 sh3_zsrt139d2430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2430.mem 17 1 1 sh3_zsrt139d2430_pal.mem 0x158afe76 +431 198092 10240 480 sh3_zsrt139d2431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2431.mem 17 1 1 sh3_zsrt139d2431_pal.mem 0x158afe76 +432 198092 10240 480 sh3_zsrt139d2432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2432.mem 17 1 1 sh3_zsrt139d2432_pal.mem 0x158afe76 +433 198092 10240 480 sh3_zsrt139d2433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2433.mem 17 1 1 sh3_zsrt139d2433_pal.mem 0x158afe76 +434 198092 10240 480 sh3_zsrt139d2434_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2434.mem 17 1 1 sh3_zsrt139d2434_pal.mem 0x158afe76 +435 198092 10240 480 sh3_zsrt139d2435_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2435.mem 17 1 1 sh3_zsrt139d2435_pal.mem 0x158afe76 +436 198092 10240 480 sh3_zsrt139d2436_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2436.mem 17 1 1 sh3_zsrt139d2436_pal.mem 0x158afe76 +437 198092 10240 480 sh3_zsrt139d2437_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2437.mem 17 1 1 sh3_zsrt139d2437_pal.mem 0x158afe76 +438 198092 10240 480 sh3_zsrt139d2438_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2438.mem 17 1 1 sh3_zsrt139d2438_pal.mem 0x158afe76 +439 198092 10240 480 sh3_zsrt139d2439_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2439.mem 17 1 1 sh3_zsrt139d2439_pal.mem 0x158afe76 +440 198092 10240 480 sh3_zsrt139d2440_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2440.mem 17 1 1 sh3_zsrt139d2440_pal.mem 0x158afe76 +441 198092 10240 480 sh3_zsrt139d2441_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2441.mem 17 1 1 sh3_zsrt139d2441_pal.mem 0x158afe76 +442 198092 10240 480 sh3_zsrt139d2442_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2442.mem 17 1 1 sh3_zsrt139d2442_pal.mem 0x158afe76 +443 198092 10240 480 sh3_zsrt139d2443_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2443.mem 17 1 1 sh3_zsrt139d2443_pal.mem 0x158afe76 +444 198092 10240 480 sh3_zsrt139d2444_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2444.mem 17 1 1 sh3_zsrt139d2444_pal.mem 0x158afe76 +445 198092 10240 480 sh3_zsrt139d2445_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2445.mem 17 1 1 sh3_zsrt139d2445_pal.mem 0x158afe76 +446 198092 10240 480 sh3_zsrt139d2446_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2446.mem 17 1 1 sh3_zsrt139d2446_pal.mem 0x158afe76 +447 198092 10240 480 sh3_zsrt139d2447_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2447.mem 17 1 1 sh3_zsrt139d2447_pal.mem 0x158afe76 +448 198092 10240 480 sh3_zsrt139d2448_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2448.mem 17 1 1 sh3_zsrt139d2448_pal.mem 0x158afe76 +449 198092 10240 480 sh3_zsrt139d2449_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2449.mem 17 1 1 sh3_zsrt139d2449_pal.mem 0x158afe76 +450 198092 10240 480 sh3_zsrt139d2450_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2450.mem 17 1 1 sh3_zsrt139d2450_pal.mem 0x158afe76 +451 198092 10240 480 sh3_zsrt139d2451_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2451.mem 17 1 1 sh3_zsrt139d2451_pal.mem 0x158afe76 +452 198092 10240 480 sh3_zsrt139d2452_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2452.mem 17 1 1 sh3_zsrt139d2452_pal.mem 0x158afe76 +453 198092 10240 480 sh3_zsrt139d2453_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2453.mem 17 1 1 sh3_zsrt139d2453_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d3_epochs.txt new file mode 100644 index 0000000..59b231f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d3_epochs.txt @@ -0,0 +1,193 @@ +# Ch407 epoch descriptor table (187 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 187 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 198075 10240 480 sh3_zsrt139d30_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d30.mem 557 61 0 sh3_zsrt139d30_pal.mem 0x158afe76 +1 198075 10240 480 sh3_zsrt139d31_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d31.mem 323 35 1 sh3_zsrt139d31_pal.mem 0x158afe76 +2 198075 10240 480 sh3_zsrt139d32_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d32.mem 53 5 1 sh3_zsrt139d32_pal.mem 0x158afe76 +3 198092 10240 480 sh3_zsrt139d33_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d33.mem 665 73 1 sh3_zsrt139d33_pal.mem 0x158afe76 +4 198092 10240 480 sh3_zsrt139d34_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d34.mem 215 23 1 sh3_zsrt139d34_pal.mem 0x158afe76 +5 198092 10240 480 sh3_zsrt139d35_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d35.mem 458 50 1 sh3_zsrt139d35_pal.mem 0x158afe76 +6 198092 10240 480 sh3_zsrt139d36_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d36.mem 431 47 1 sh3_zsrt139d36_pal.mem 0x158afe76 +7 198092 10240 480 sh3_zsrt139d37_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d37.mem 395 43 1 sh3_zsrt139d37_pal.mem 0x158afe76 +8 198092 10240 480 sh3_zsrt139d38_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d38.mem 206 22 1 sh3_zsrt139d38_pal.mem 0x158afe76 +9 198092 10240 480 sh3_zsrt139d39_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d39.mem 170 18 1 sh3_zsrt139d39_pal.mem 0x158afe76 +10 198092 10240 480 sh3_zsrt139d310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d310.mem 242 26 1 sh3_zsrt139d310_pal.mem 0x158afe76 +11 198092 10240 480 sh3_zsrt139d311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d311.mem 359 39 1 sh3_zsrt139d311_pal.mem 0x158afe76 +12 198092 10240 480 sh3_zsrt139d312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d312.mem 323 35 1 sh3_zsrt139d312_pal.mem 0x158afe76 +13 198092 10240 480 sh3_zsrt139d313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d313.mem 215 23 1 sh3_zsrt139d313_pal.mem 0x158afe76 +14 198092 10240 480 sh3_zsrt139d314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d314.mem 314 34 1 sh3_zsrt139d314_pal.mem 0x158afe76 +15 198092 10240 480 sh3_zsrt139d315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d315.mem 278 30 1 sh3_zsrt139d315_pal.mem 0x158afe76 +16 198092 10240 480 sh3_zsrt139d316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d316.mem 116 12 1 sh3_zsrt139d316_pal.mem 0x158afe76 +17 198092 10240 480 sh3_zsrt139d317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d317.mem 197 21 1 sh3_zsrt139d317_pal.mem 0x158afe76 +18 198092 10240 480 sh3_zsrt139d318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d318.mem 458 50 1 sh3_zsrt139d318_pal.mem 0x158afe76 +19 198092 10240 480 sh3_zsrt139d319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d319.mem 269 29 1 sh3_zsrt139d319_pal.mem 0x158afe76 +20 198092 10240 480 sh3_zsrt139d320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d320.mem 206 22 1 sh3_zsrt139d320_pal.mem 0x158afe76 +21 198092 10240 480 sh3_zsrt139d321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d321.mem 323 35 1 sh3_zsrt139d321_pal.mem 0x158afe76 +22 198092 10240 480 sh3_zsrt139d322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d322.mem 494 54 1 sh3_zsrt139d322_pal.mem 0x158afe76 +23 198092 10240 480 sh3_zsrt139d323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d323.mem 566 62 1 sh3_zsrt139d323_pal.mem 0x158afe76 +24 198092 10240 480 sh3_zsrt139d324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d324.mem 287 31 1 sh3_zsrt139d324_pal.mem 0x158afe76 +25 198092 10240 480 sh3_zsrt139d325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d325.mem 260 28 1 sh3_zsrt139d325_pal.mem 0x158afe76 +26 198092 10240 480 sh3_zsrt139d326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d326.mem 89 9 1 sh3_zsrt139d326_pal.mem 0x158afe76 +27 198092 10240 480 sh3_zsrt139d327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d327.mem 359 39 1 sh3_zsrt139d327_pal.mem 0x158afe76 +28 198092 10240 480 sh3_zsrt139d328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d328.mem 539 59 1 sh3_zsrt139d328_pal.mem 0x158afe76 +29 198092 10240 480 sh3_zsrt139d329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d329.mem 323 35 1 sh3_zsrt139d329_pal.mem 0x158afe76 +30 198092 10240 480 sh3_zsrt139d330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d330.mem 179 19 1 sh3_zsrt139d330_pal.mem 0x158afe76 +31 198092 10240 480 sh3_zsrt139d331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d331.mem 494 54 1 sh3_zsrt139d331_pal.mem 0x158afe76 +32 198092 10240 480 sh3_zsrt139d332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d332.mem 251 27 1 sh3_zsrt139d332_pal.mem 0x158afe76 +33 198092 10240 480 sh3_zsrt139d333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d333.mem 116 12 1 sh3_zsrt139d333_pal.mem 0x158afe76 +34 198092 10240 480 sh3_zsrt139d334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d334.mem 251 27 1 sh3_zsrt139d334_pal.mem 0x158afe76 +35 198092 10240 480 sh3_zsrt139d335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d335.mem 251 27 1 sh3_zsrt139d335_pal.mem 0x158afe76 +36 198092 10240 480 sh3_zsrt139d336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d336.mem 170 18 1 sh3_zsrt139d336_pal.mem 0x158afe76 +37 198092 10240 480 sh3_zsrt139d337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d337.mem 188 20 1 sh3_zsrt139d337_pal.mem 0x158afe76 +38 198092 10240 480 sh3_zsrt139d338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d338.mem 170 18 1 sh3_zsrt139d338_pal.mem 0x158afe76 +39 198092 10240 480 sh3_zsrt139d339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d339.mem 71 7 1 sh3_zsrt139d339_pal.mem 0x158afe76 +40 198092 10240 480 sh3_zsrt139d340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d340.mem 224 24 1 sh3_zsrt139d340_pal.mem 0x158afe76 +41 198092 10240 480 sh3_zsrt139d341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d341.mem 143 15 1 sh3_zsrt139d341_pal.mem 0x158afe76 +42 198092 10240 480 sh3_zsrt139d342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d342.mem 305 33 1 sh3_zsrt139d342_pal.mem 0x158afe76 +43 198092 10240 480 sh3_zsrt139d343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d343.mem 143 15 1 sh3_zsrt139d343_pal.mem 0x158afe76 +44 198092 10240 480 sh3_zsrt139d344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d344.mem 71 7 1 sh3_zsrt139d344_pal.mem 0x158afe76 +45 198092 10240 480 sh3_zsrt139d345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d345.mem 233 25 1 sh3_zsrt139d345_pal.mem 0x158afe76 +46 198092 10240 480 sh3_zsrt139d346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d346.mem 260 28 1 sh3_zsrt139d346_pal.mem 0x158afe76 +47 198092 10240 480 sh3_zsrt139d347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d347.mem 350 38 1 sh3_zsrt139d347_pal.mem 0x158afe76 +48 198092 10240 480 sh3_zsrt139d348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d348.mem 188 20 1 sh3_zsrt139d348_pal.mem 0x158afe76 +49 198092 10240 480 sh3_zsrt139d349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d349.mem 80 8 1 sh3_zsrt139d349_pal.mem 0x158afe76 +50 198092 10240 480 sh3_zsrt139d350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d350.mem 251 27 1 sh3_zsrt139d350_pal.mem 0x158afe76 +51 198092 10240 480 sh3_zsrt139d351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d351.mem 125 13 1 sh3_zsrt139d351_pal.mem 0x158afe76 +52 198092 10240 480 sh3_zsrt139d352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d352.mem 269 29 1 sh3_zsrt139d352_pal.mem 0x158afe76 +53 198092 10240 480 sh3_zsrt139d353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d353.mem 179 19 1 sh3_zsrt139d353_pal.mem 0x158afe76 +54 198092 10240 480 sh3_zsrt139d354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d354.mem 341 37 1 sh3_zsrt139d354_pal.mem 0x158afe76 +55 198092 10240 480 sh3_zsrt139d355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d355.mem 206 22 1 sh3_zsrt139d355_pal.mem 0x158afe76 +56 198092 10240 480 sh3_zsrt139d356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d356.mem 179 19 1 sh3_zsrt139d356_pal.mem 0x158afe76 +57 198092 10240 480 sh3_zsrt139d357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d357.mem 98 10 1 sh3_zsrt139d357_pal.mem 0x158afe76 +58 198092 10240 480 sh3_zsrt139d358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d358.mem 242 26 1 sh3_zsrt139d358_pal.mem 0x158afe76 +59 198092 10240 480 sh3_zsrt139d359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d359.mem 80 8 1 sh3_zsrt139d359_pal.mem 0x158afe76 +60 198092 10240 480 sh3_zsrt139d360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d360.mem 53 5 1 sh3_zsrt139d360_pal.mem 0x158afe76 +61 198092 10240 480 sh3_zsrt139d361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d361.mem 44 4 1 sh3_zsrt139d361_pal.mem 0x158afe76 +62 198092 10240 480 sh3_zsrt139d362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d362.mem 116 12 1 sh3_zsrt139d362_pal.mem 0x158afe76 +63 198092 10240 480 sh3_zsrt139d363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d363.mem 107 11 1 sh3_zsrt139d363_pal.mem 0x158afe76 +64 198092 10240 480 sh3_zsrt139d364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d364.mem 224 24 1 sh3_zsrt139d364_pal.mem 0x158afe76 +65 198092 10240 480 sh3_zsrt139d365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d365.mem 107 11 1 sh3_zsrt139d365_pal.mem 0x158afe76 +66 198092 10240 480 sh3_zsrt139d366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d366.mem 629 69 1 sh3_zsrt139d366_pal.mem 0x158afe76 +67 198092 10240 480 sh3_zsrt139d367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d367.mem 287 31 1 sh3_zsrt139d367_pal.mem 0x158afe76 +68 198092 10240 480 sh3_zsrt139d368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d368.mem 116 12 1 sh3_zsrt139d368_pal.mem 0x158afe76 +69 198092 10240 480 sh3_zsrt139d369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d369.mem 134 14 1 sh3_zsrt139d369_pal.mem 0x158afe76 +70 198092 10240 480 sh3_zsrt139d370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d370.mem 287 31 1 sh3_zsrt139d370_pal.mem 0x158afe76 +71 198092 10240 480 sh3_zsrt139d371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d371.mem 224 24 1 sh3_zsrt139d371_pal.mem 0x158afe76 +72 198092 10240 480 sh3_zsrt139d372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d372.mem 431 47 1 sh3_zsrt139d372_pal.mem 0x158afe76 +73 198092 10240 480 sh3_zsrt139d373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d373.mem 53 5 1 sh3_zsrt139d373_pal.mem 0x158afe76 +74 198092 10240 480 sh3_zsrt139d374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d374.mem 53 5 1 sh3_zsrt139d374_pal.mem 0x158afe76 +75 198092 10240 480 sh3_zsrt139d375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d375.mem 71 7 1 sh3_zsrt139d375_pal.mem 0x158afe76 +76 198092 10240 480 sh3_zsrt139d376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d376.mem 161 17 1 sh3_zsrt139d376_pal.mem 0x158afe76 +77 198092 10240 480 sh3_zsrt139d377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d377.mem 206 22 1 sh3_zsrt139d377_pal.mem 0x158afe76 +78 198092 10240 480 sh3_zsrt139d378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d378.mem 89 9 1 sh3_zsrt139d378_pal.mem 0x158afe76 +79 198092 10240 480 sh3_zsrt139d379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d379.mem 89 9 1 sh3_zsrt139d379_pal.mem 0x158afe76 +80 198092 10240 480 sh3_zsrt139d380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d380.mem 143 15 1 sh3_zsrt139d380_pal.mem 0x158afe76 +81 198092 10240 480 sh3_zsrt139d381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d381.mem 368 40 1 sh3_zsrt139d381_pal.mem 0x158afe76 +82 198092 10240 480 sh3_zsrt139d382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d382.mem 80 8 1 sh3_zsrt139d382_pal.mem 0x158afe76 +83 198092 10240 480 sh3_zsrt139d383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d383.mem 152 16 1 sh3_zsrt139d383_pal.mem 0x158afe76 +84 198092 10240 480 sh3_zsrt139d384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d384.mem 314 34 1 sh3_zsrt139d384_pal.mem 0x158afe76 +85 198092 10240 480 sh3_zsrt139d385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d385.mem 116 12 1 sh3_zsrt139d385_pal.mem 0x158afe76 +86 198092 10240 480 sh3_zsrt139d386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d386.mem 179 19 1 sh3_zsrt139d386_pal.mem 0x158afe76 +87 198092 10240 480 sh3_zsrt139d387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d387.mem 62 6 1 sh3_zsrt139d387_pal.mem 0x158afe76 +88 198092 10240 480 sh3_zsrt139d388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d388.mem 89 9 1 sh3_zsrt139d388_pal.mem 0x158afe76 +89 198092 10240 480 sh3_zsrt139d389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d389.mem 278 30 1 sh3_zsrt139d389_pal.mem 0x158afe76 +90 198092 10240 480 sh3_zsrt139d390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d390.mem 350 38 1 sh3_zsrt139d390_pal.mem 0x158afe76 +91 198092 10240 480 sh3_zsrt139d391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d391.mem 134 14 1 sh3_zsrt139d391_pal.mem 0x158afe76 +92 198092 10240 480 sh3_zsrt139d392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d392.mem 332 36 1 sh3_zsrt139d392_pal.mem 0x158afe76 +93 198092 10240 480 sh3_zsrt139d393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d393.mem 404 44 1 sh3_zsrt139d393_pal.mem 0x158afe76 +94 198092 10240 480 sh3_zsrt139d394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d394.mem 179 19 1 sh3_zsrt139d394_pal.mem 0x158afe76 +95 198092 10240 480 sh3_zsrt139d395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d395.mem 107 11 1 sh3_zsrt139d395_pal.mem 0x158afe76 +96 198092 10240 480 sh3_zsrt139d396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d396.mem 161 17 1 sh3_zsrt139d396_pal.mem 0x158afe76 +97 198092 10240 480 sh3_zsrt139d397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d397.mem 539 59 1 sh3_zsrt139d397_pal.mem 0x158afe76 +98 198092 10240 480 sh3_zsrt139d398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d398.mem 143 15 1 sh3_zsrt139d398_pal.mem 0x158afe76 +99 198092 10240 480 sh3_zsrt139d399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d399.mem 332 36 1 sh3_zsrt139d399_pal.mem 0x158afe76 +100 198092 10240 480 sh3_zsrt139d3100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3100.mem 161 17 1 sh3_zsrt139d3100_pal.mem 0x158afe76 +101 198092 10240 480 sh3_zsrt139d3101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3101.mem 107 11 1 sh3_zsrt139d3101_pal.mem 0x158afe76 +102 198092 10240 480 sh3_zsrt139d3102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3102.mem 368 40 1 sh3_zsrt139d3102_pal.mem 0x158afe76 +103 198092 10240 480 sh3_zsrt139d3103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3103.mem 368 40 1 sh3_zsrt139d3103_pal.mem 0x158afe76 +104 198092 10240 480 sh3_zsrt139d3104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3104.mem 80 8 1 sh3_zsrt139d3104_pal.mem 0x158afe76 +105 198092 10240 480 sh3_zsrt139d3105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3105.mem 62 6 1 sh3_zsrt139d3105_pal.mem 0x158afe76 +106 198092 10240 480 sh3_zsrt139d3106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3106.mem 53 5 1 sh3_zsrt139d3106_pal.mem 0x158afe76 +107 198092 10240 480 sh3_zsrt139d3107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3107.mem 143 15 1 sh3_zsrt139d3107_pal.mem 0x158afe76 +108 198092 10240 480 sh3_zsrt139d3108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3108.mem 107 11 1 sh3_zsrt139d3108_pal.mem 0x158afe76 +109 198092 10240 480 sh3_zsrt139d3109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3109.mem 89 9 1 sh3_zsrt139d3109_pal.mem 0x158afe76 +110 198092 10240 480 sh3_zsrt139d3110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3110.mem 152 16 1 sh3_zsrt139d3110_pal.mem 0x158afe76 +111 198092 10240 480 sh3_zsrt139d3111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3111.mem 314 34 1 sh3_zsrt139d3111_pal.mem 0x158afe76 +112 198092 10240 480 sh3_zsrt139d3112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3112.mem 44 4 1 sh3_zsrt139d3112_pal.mem 0x158afe76 +113 198092 10240 480 sh3_zsrt139d3113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3113.mem 44 4 1 sh3_zsrt139d3113_pal.mem 0x158afe76 +114 198092 10240 480 sh3_zsrt139d3114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3114.mem 62 6 1 sh3_zsrt139d3114_pal.mem 0x158afe76 +115 198092 10240 480 sh3_zsrt139d3115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3115.mem 206 22 1 sh3_zsrt139d3115_pal.mem 0x158afe76 +116 198092 10240 480 sh3_zsrt139d3116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3116.mem 359 39 1 sh3_zsrt139d3116_pal.mem 0x158afe76 +117 198092 10240 480 sh3_zsrt139d3117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3117.mem 215 23 1 sh3_zsrt139d3117_pal.mem 0x158afe76 +118 198092 10240 480 sh3_zsrt139d3118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3118.mem 206 22 1 sh3_zsrt139d3118_pal.mem 0x158afe76 +119 198092 10240 480 sh3_zsrt139d3119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3119.mem 116 12 1 sh3_zsrt139d3119_pal.mem 0x158afe76 +120 198092 10240 480 sh3_zsrt139d3120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3120.mem 638 70 1 sh3_zsrt139d3120_pal.mem 0x158afe76 +121 198092 10240 480 sh3_zsrt139d3121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3121.mem 179 19 1 sh3_zsrt139d3121_pal.mem 0x158afe76 +122 198092 10240 480 sh3_zsrt139d3122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3122.mem 152 16 1 sh3_zsrt139d3122_pal.mem 0x158afe76 +123 198092 10240 480 sh3_zsrt139d3123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3123.mem 368 40 1 sh3_zsrt139d3123_pal.mem 0x158afe76 +124 198092 10240 480 sh3_zsrt139d3124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3124.mem 125 13 1 sh3_zsrt139d3124_pal.mem 0x158afe76 +125 198092 10240 480 sh3_zsrt139d3125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3125.mem 53 5 1 sh3_zsrt139d3125_pal.mem 0x158afe76 +126 198092 10240 480 sh3_zsrt139d3126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3126.mem 71 7 1 sh3_zsrt139d3126_pal.mem 0x158afe76 +127 198092 10240 480 sh3_zsrt139d3127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3127.mem 431 47 1 sh3_zsrt139d3127_pal.mem 0x158afe76 +128 198092 10240 480 sh3_zsrt139d3128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3128.mem 143 15 1 sh3_zsrt139d3128_pal.mem 0x158afe76 +129 198092 10240 480 sh3_zsrt139d3129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3129.mem 125 13 1 sh3_zsrt139d3129_pal.mem 0x158afe76 +130 198092 10240 480 sh3_zsrt139d3130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3130.mem 503 55 1 sh3_zsrt139d3130_pal.mem 0x158afe76 +131 198092 10240 480 sh3_zsrt139d3131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3131.mem 116 12 1 sh3_zsrt139d3131_pal.mem 0x158afe76 +132 198092 10240 480 sh3_zsrt139d3132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3132.mem 62 6 1 sh3_zsrt139d3132_pal.mem 0x158afe76 +133 198092 10240 480 sh3_zsrt139d3133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3133.mem 53 5 1 sh3_zsrt139d3133_pal.mem 0x158afe76 +134 198092 10240 480 sh3_zsrt139d3134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3134.mem 188 20 1 sh3_zsrt139d3134_pal.mem 0x158afe76 +135 198092 10240 480 sh3_zsrt139d3135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3135.mem 251 27 1 sh3_zsrt139d3135_pal.mem 0x158afe76 +136 198092 10240 480 sh3_zsrt139d3136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3136.mem 89 9 1 sh3_zsrt139d3136_pal.mem 0x158afe76 +137 198092 10240 480 sh3_zsrt139d3137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3137.mem 71 7 1 sh3_zsrt139d3137_pal.mem 0x158afe76 +138 198092 10240 480 sh3_zsrt139d3138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3138.mem 71 7 1 sh3_zsrt139d3138_pal.mem 0x158afe76 +139 198092 10240 480 sh3_zsrt139d3139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3139.mem 80 8 1 sh3_zsrt139d3139_pal.mem 0x158afe76 +140 198092 10240 480 sh3_zsrt139d3140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3140.mem 179 19 1 sh3_zsrt139d3140_pal.mem 0x158afe76 +141 198092 10240 480 sh3_zsrt139d3141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3141.mem 251 27 1 sh3_zsrt139d3141_pal.mem 0x158afe76 +142 198092 10240 480 sh3_zsrt139d3142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3142.mem 161 17 1 sh3_zsrt139d3142_pal.mem 0x158afe76 +143 198092 10240 480 sh3_zsrt139d3143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3143.mem 161 17 1 sh3_zsrt139d3143_pal.mem 0x158afe76 +144 198092 10240 480 sh3_zsrt139d3144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3144.mem 71 7 1 sh3_zsrt139d3144_pal.mem 0x158afe76 +145 198092 10240 480 sh3_zsrt139d3145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3145.mem 71 7 1 sh3_zsrt139d3145_pal.mem 0x158afe76 +146 198092 10240 480 sh3_zsrt139d3146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3146.mem 80 8 1 sh3_zsrt139d3146_pal.mem 0x158afe76 +147 198092 10240 480 sh3_zsrt139d3147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3147.mem 125 13 1 sh3_zsrt139d3147_pal.mem 0x158afe76 +148 198092 10240 480 sh3_zsrt139d3148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3148.mem 251 27 1 sh3_zsrt139d3148_pal.mem 0x158afe76 +149 198092 10240 480 sh3_zsrt139d3149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3149.mem 80 8 1 sh3_zsrt139d3149_pal.mem 0x158afe76 +150 198092 10240 480 sh3_zsrt139d3150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3150.mem 62 6 1 sh3_zsrt139d3150_pal.mem 0x158afe76 +151 198092 10240 480 sh3_zsrt139d3151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3151.mem 44 4 1 sh3_zsrt139d3151_pal.mem 0x158afe76 +152 198092 10240 480 sh3_zsrt139d3152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3152.mem 44 4 1 sh3_zsrt139d3152_pal.mem 0x158afe76 +153 198092 10240 480 sh3_zsrt139d3153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3153.mem 35 3 1 sh3_zsrt139d3153_pal.mem 0x158afe76 +154 198092 10240 480 sh3_zsrt139d3154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3154.mem 35 3 1 sh3_zsrt139d3154_pal.mem 0x158afe76 +155 198092 10240 480 sh3_zsrt139d3155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3155.mem 35 3 1 sh3_zsrt139d3155_pal.mem 0x158afe76 +156 198092 10240 480 sh3_zsrt139d3156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3156.mem 53 5 1 sh3_zsrt139d3156_pal.mem 0x158afe76 +157 198092 10240 480 sh3_zsrt139d3157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3157.mem 107 11 1 sh3_zsrt139d3157_pal.mem 0x158afe76 +158 198092 10240 480 sh3_zsrt139d3158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3158.mem 71 7 1 sh3_zsrt139d3158_pal.mem 0x158afe76 +159 198092 10240 480 sh3_zsrt139d3159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3159.mem 71 7 1 sh3_zsrt139d3159_pal.mem 0x158afe76 +160 198092 10240 480 sh3_zsrt139d3160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3160.mem 98 10 1 sh3_zsrt139d3160_pal.mem 0x158afe76 +161 198092 10240 480 sh3_zsrt139d3161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3161.mem 215 23 1 sh3_zsrt139d3161_pal.mem 0x158afe76 +162 198092 10240 480 sh3_zsrt139d3162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3162.mem 521 57 1 sh3_zsrt139d3162_pal.mem 0x158afe76 +163 198092 10240 480 sh3_zsrt139d3163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3163.mem 701 77 1 sh3_zsrt139d3163_pal.mem 0x158afe76 +164 198092 10240 480 sh3_zsrt139d3164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3164.mem 80 8 1 sh3_zsrt139d3164_pal.mem 0x158afe76 +165 198092 10240 480 sh3_zsrt139d3165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3165.mem 125 13 1 sh3_zsrt139d3165_pal.mem 0x158afe76 +166 198092 10240 480 sh3_zsrt139d3166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3166.mem 287 31 1 sh3_zsrt139d3166_pal.mem 0x158afe76 +167 198092 10240 480 sh3_zsrt139d3167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3167.mem 107 11 1 sh3_zsrt139d3167_pal.mem 0x158afe76 +168 198092 10240 480 sh3_zsrt139d3168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3168.mem 89 9 1 sh3_zsrt139d3168_pal.mem 0x158afe76 +169 198092 10240 480 sh3_zsrt139d3169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3169.mem 161 17 1 sh3_zsrt139d3169_pal.mem 0x158afe76 +170 198092 10240 480 sh3_zsrt139d3170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3170.mem 125 13 1 sh3_zsrt139d3170_pal.mem 0x158afe76 +171 198092 10240 480 sh3_zsrt139d3171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3171.mem 80 8 1 sh3_zsrt139d3171_pal.mem 0x158afe76 +172 198092 10240 480 sh3_zsrt139d3172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3172.mem 53 5 1 sh3_zsrt139d3172_pal.mem 0x158afe76 +173 198092 10240 480 sh3_zsrt139d3173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3173.mem 53 5 1 sh3_zsrt139d3173_pal.mem 0x158afe76 +174 198092 10240 480 sh3_zsrt139d3174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3174.mem 62 6 1 sh3_zsrt139d3174_pal.mem 0x158afe76 +175 198092 10240 480 sh3_zsrt139d3175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3175.mem 98 10 1 sh3_zsrt139d3175_pal.mem 0x158afe76 +176 198092 10240 480 sh3_zsrt139d3176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3176.mem 170 18 1 sh3_zsrt139d3176_pal.mem 0x158afe76 +177 198092 10240 480 sh3_zsrt139d3177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3177.mem 341 37 1 sh3_zsrt139d3177_pal.mem 0x158afe76 +178 198092 10240 480 sh3_zsrt139d3178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3178.mem 242 26 1 sh3_zsrt139d3178_pal.mem 0x158afe76 +179 198092 10240 480 sh3_zsrt139d3179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3179.mem 53 5 1 sh3_zsrt139d3179_pal.mem 0x158afe76 +180 198092 10240 480 sh3_zsrt139d3180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3180.mem 35 3 1 sh3_zsrt139d3180_pal.mem 0x158afe76 +181 198092 10240 480 sh3_zsrt139d3181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3181.mem 35 3 1 sh3_zsrt139d3181_pal.mem 0x158afe76 +182 198092 10240 480 sh3_zsrt139d3182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3182.mem 35 3 1 sh3_zsrt139d3182_pal.mem 0x158afe76 +183 198092 10240 480 sh3_zsrt139d3183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3183.mem 35 3 1 sh3_zsrt139d3183_pal.mem 0x158afe76 +184 198092 10240 480 sh3_zsrt139d3184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3184.mem 44 4 1 sh3_zsrt139d3184_pal.mem 0x158afe76 +185 198092 10240 480 sh3_zsrt139d3185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3185.mem 62 6 1 sh3_zsrt139d3185_pal.mem 0x158afe76 +186 198092 10240 480 sh3_zsrt139d3186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3186.mem 98 10 1 sh3_zsrt139d3186_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d4_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d4_epochs.txt new file mode 100644 index 0000000..46ba5b5 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d4_epochs.txt @@ -0,0 +1,477 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d3'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 474 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139d40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d40.mem 494 54 0 sh3_zsrt139d40_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139d41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d41.mem 1061 117 0 sh3_zsrt139d41_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139d42_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d42.mem 530 58 1 sh3_zsrt139d42_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139d43_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d43.mem 782 86 0 sh3_zsrt139d43_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139d44_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d44.mem 1232 136 0 sh3_zsrt139d44_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139d45_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d45.mem 1232 136 1 sh3_zsrt139d45_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139d46_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d46.mem 764 84 1 sh3_zsrt139d46_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139d47_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d47.mem 1232 136 1 sh3_zsrt139d47_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139d48_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d48.mem 710 78 1 sh3_zsrt139d48_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139d49_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d49.mem 1232 136 1 sh3_zsrt139d49_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139d410_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d410.mem 1232 136 1 sh3_zsrt139d410_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139d411_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d411.mem 953 105 1 sh3_zsrt139d411_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139d412_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d412.mem 1232 136 1 sh3_zsrt139d412_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139d413_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d413.mem 1097 121 1 sh3_zsrt139d413_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139d414_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d414.mem 170 18 1 sh3_zsrt139d414_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139d415_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d415.mem 62 6 0 sh3_zsrt139d415_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139d416_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d416.mem 620 68 0 sh3_zsrt139d416_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139d417_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d417.mem 620 68 0 sh3_zsrt139d417_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139d418_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d418.mem 620 68 0 sh3_zsrt139d418_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139d419_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d419.mem 620 68 0 sh3_zsrt139d419_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139d420_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d420.mem 1844 204 0 sh3_zsrt139d420_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139d421_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d421.mem 1844 204 1 sh3_zsrt139d421_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139d422_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d422.mem 1844 204 1 sh3_zsrt139d422_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139d423_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d423.mem 1844 204 1 sh3_zsrt139d423_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139d424_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d424.mem 1844 204 1 sh3_zsrt139d424_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139d425_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d425.mem 1844 204 1 sh3_zsrt139d425_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139d426_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d426.mem 1844 204 1 sh3_zsrt139d426_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139d427_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d427.mem 1844 204 1 sh3_zsrt139d427_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139d428_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d428.mem 1142 126 0 sh3_zsrt139d428_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139d429_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d429.mem 1178 130 1 sh3_zsrt139d429_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139d430_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d430.mem 1106 122 1 sh3_zsrt139d430_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139d431_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d431.mem 1070 118 0 sh3_zsrt139d431_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139d432_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d432.mem 998 110 1 sh3_zsrt139d432_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139d433_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d433.mem 1070 118 1 sh3_zsrt139d433_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139d434_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d434.mem 782 86 0 sh3_zsrt139d434_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139d435_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d435.mem 782 86 1 sh3_zsrt139d435_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139d436_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d436.mem 746 82 1 sh3_zsrt139d436_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139d437_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d437.mem 1070 118 0 sh3_zsrt139d437_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139d438_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d438.mem 1034 114 1 sh3_zsrt139d438_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139d439_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d439.mem 1106 122 1 sh3_zsrt139d439_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139d440_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d440.mem 1142 126 0 sh3_zsrt139d440_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139d441_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d441.mem 1034 114 1 sh3_zsrt139d441_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139d442_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d442.mem 1070 118 1 sh3_zsrt139d442_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139d443_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d443.mem 1142 126 1 sh3_zsrt139d443_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139d444_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d444.mem 1106 122 1 sh3_zsrt139d444_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139d445_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d445.mem 1070 118 1 sh3_zsrt139d445_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139d446_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d446.mem 1070 118 1 sh3_zsrt139d446_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139d447_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d447.mem 1358 150 1 sh3_zsrt139d447_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139d448_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d448.mem 998 110 0 sh3_zsrt139d448_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139d449_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d449.mem 890 98 1 sh3_zsrt139d449_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139d450_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d450.mem 890 98 1 sh3_zsrt139d450_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139d451_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d451.mem 962 106 1 sh3_zsrt139d451_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139d452_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d452.mem 926 102 1 sh3_zsrt139d452_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139d453_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d453.mem 962 106 1 sh3_zsrt139d453_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139d454_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d454.mem 962 106 1 sh3_zsrt139d454_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139d455_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d455.mem 1034 114 1 sh3_zsrt139d455_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139d456_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d456.mem 890 98 1 sh3_zsrt139d456_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139d457_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d457.mem 962 106 1 sh3_zsrt139d457_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139d458_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d458.mem 566 62 1 sh3_zsrt139d458_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139d459_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d459.mem 1178 130 0 sh3_zsrt139d459_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139d460_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d460.mem 1070 118 1 sh3_zsrt139d460_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139d461_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d461.mem 1070 118 1 sh3_zsrt139d461_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139d462_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d462.mem 1250 138 1 sh3_zsrt139d462_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139d463_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d463.mem 710 78 1 sh3_zsrt139d463_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139d464_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d464.mem 1142 126 1 sh3_zsrt139d464_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139d465_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d465.mem 1178 130 1 sh3_zsrt139d465_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139d466_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d466.mem 1106 122 1 sh3_zsrt139d466_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139d467_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d467.mem 1142 126 1 sh3_zsrt139d467_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139d468_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d468.mem 530 58 1 sh3_zsrt139d468_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139d469_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d469.mem 1322 146 0 sh3_zsrt139d469_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139d470_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d470.mem 674 74 1 sh3_zsrt139d470_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139d471_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d471.mem 602 66 1 sh3_zsrt139d471_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139d472_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d472.mem 458 50 1 sh3_zsrt139d472_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139d473_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d473.mem 1214 134 0 sh3_zsrt139d473_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139d474_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d474.mem 1376 152 1 sh3_zsrt139d474_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139d475_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d475.mem 17 1 0 sh3_zsrt139d475_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139d476_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d476.mem 17 1 1 sh3_zsrt139d476_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139d477_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d477.mem 17 1 1 sh3_zsrt139d477_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139d478_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d478.mem 17 1 1 sh3_zsrt139d478_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139d479_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d479.mem 17 1 1 sh3_zsrt139d479_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139d480_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d480.mem 17 1 1 sh3_zsrt139d480_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139d481_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d481.mem 17 1 1 sh3_zsrt139d481_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139d482_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d482.mem 17 1 1 sh3_zsrt139d482_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139d483_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d483.mem 17 1 1 sh3_zsrt139d483_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139d484_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d484.mem 17 1 1 sh3_zsrt139d484_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139d485_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d485.mem 17 1 1 sh3_zsrt139d485_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139d486_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d486.mem 17 1 1 sh3_zsrt139d486_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139d487_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d487.mem 17 1 1 sh3_zsrt139d487_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139d488_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d488.mem 17 1 1 sh3_zsrt139d488_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139d489_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d489.mem 17 1 1 sh3_zsrt139d489_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139d490_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d490.mem 17 1 1 sh3_zsrt139d490_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139d491_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d491.mem 17 1 1 sh3_zsrt139d491_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139d492_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d492.mem 17 1 1 sh3_zsrt139d492_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139d493_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d493.mem 17 1 1 sh3_zsrt139d493_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139d494_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d494.mem 17 1 1 sh3_zsrt139d494_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139d495_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d495.mem 17 1 1 sh3_zsrt139d495_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139d496_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d496.mem 17 1 1 sh3_zsrt139d496_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139d497_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d497.mem 17 1 1 sh3_zsrt139d497_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139d498_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d498.mem 17 1 1 sh3_zsrt139d498_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139d499_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d499.mem 17 1 1 sh3_zsrt139d499_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139d4100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4100.mem 17 1 1 sh3_zsrt139d4100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139d4101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4101.mem 17 1 1 sh3_zsrt139d4101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139d4102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4102.mem 17 1 1 sh3_zsrt139d4102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139d4103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4103.mem 17 1 1 sh3_zsrt139d4103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139d4104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4104.mem 17 1 1 sh3_zsrt139d4104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139d4105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4105.mem 17 1 1 sh3_zsrt139d4105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139d4106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4106.mem 17 1 1 sh3_zsrt139d4106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139d4107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4107.mem 17 1 1 sh3_zsrt139d4107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139d4108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4108.mem 17 1 1 sh3_zsrt139d4108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139d4109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4109.mem 17 1 1 sh3_zsrt139d4109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139d4110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4110.mem 17 1 1 sh3_zsrt139d4110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139d4111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4111.mem 17 1 1 sh3_zsrt139d4111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139d4112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4112.mem 17 1 1 sh3_zsrt139d4112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139d4113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4113.mem 17 1 1 sh3_zsrt139d4113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139d4114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4114.mem 17 1 1 sh3_zsrt139d4114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139d4115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4115.mem 17 1 1 sh3_zsrt139d4115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139d4116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4116.mem 17 1 1 sh3_zsrt139d4116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139d4117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4117.mem 17 1 1 sh3_zsrt139d4117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139d4118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4118.mem 17 1 1 sh3_zsrt139d4118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139d4119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4119.mem 17 1 1 sh3_zsrt139d4119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139d4120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4120.mem 17 1 1 sh3_zsrt139d4120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139d4121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4121.mem 17 1 1 sh3_zsrt139d4121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139d4122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4122.mem 17 1 1 sh3_zsrt139d4122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139d4123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4123.mem 17 1 1 sh3_zsrt139d4123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139d4124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4124.mem 17 1 1 sh3_zsrt139d4124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139d4125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4125.mem 17 1 1 sh3_zsrt139d4125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139d4126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4126.mem 17 1 1 sh3_zsrt139d4126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139d4127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4127.mem 17 1 1 sh3_zsrt139d4127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139d4128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4128.mem 17 1 1 sh3_zsrt139d4128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139d4129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4129.mem 17 1 1 sh3_zsrt139d4129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139d4130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4130.mem 17 1 1 sh3_zsrt139d4130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139d4131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4131.mem 17 1 1 sh3_zsrt139d4131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139d4132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4132.mem 17 1 1 sh3_zsrt139d4132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139d4133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4133.mem 17 1 1 sh3_zsrt139d4133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139d4134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4134.mem 17 1 1 sh3_zsrt139d4134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139d4135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4135.mem 17 1 1 sh3_zsrt139d4135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139d4136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4136.mem 17 1 1 sh3_zsrt139d4136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139d4137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4137.mem 17 1 1 sh3_zsrt139d4137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139d4138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4138.mem 17 1 1 sh3_zsrt139d4138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139d4139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4139.mem 17 1 1 sh3_zsrt139d4139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139d4140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4140.mem 17 1 1 sh3_zsrt139d4140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139d4141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4141.mem 17 1 1 sh3_zsrt139d4141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139d4142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4142.mem 17 1 1 sh3_zsrt139d4142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139d4143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4143.mem 17 1 1 sh3_zsrt139d4143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139d4144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4144.mem 17 1 1 sh3_zsrt139d4144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139d4145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4145.mem 17 1 1 sh3_zsrt139d4145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139d4146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4146.mem 17 1 1 sh3_zsrt139d4146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139d4147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4147.mem 17 1 1 sh3_zsrt139d4147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139d4148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4148.mem 17 1 1 sh3_zsrt139d4148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139d4149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4149.mem 17 1 1 sh3_zsrt139d4149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139d4150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4150.mem 17 1 1 sh3_zsrt139d4150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139d4151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4151.mem 17 1 1 sh3_zsrt139d4151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139d4152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4152.mem 17 1 1 sh3_zsrt139d4152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139d4153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4153.mem 17 1 1 sh3_zsrt139d4153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139d4154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4154.mem 17 1 1 sh3_zsrt139d4154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139d4155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4155.mem 17 1 1 sh3_zsrt139d4155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139d4156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4156.mem 17 1 1 sh3_zsrt139d4156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139d4157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4157.mem 17 1 1 sh3_zsrt139d4157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139d4158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4158.mem 17 1 1 sh3_zsrt139d4158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139d4159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4159.mem 17 1 1 sh3_zsrt139d4159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139d4160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4160.mem 17 1 1 sh3_zsrt139d4160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139d4161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4161.mem 17 1 1 sh3_zsrt139d4161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139d4162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4162.mem 17 1 1 sh3_zsrt139d4162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139d4163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4163.mem 17 1 1 sh3_zsrt139d4163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139d4164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4164.mem 17 1 1 sh3_zsrt139d4164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139d4165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4165.mem 17 1 1 sh3_zsrt139d4165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139d4166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4166.mem 17 1 1 sh3_zsrt139d4166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139d4167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4167.mem 17 1 1 sh3_zsrt139d4167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139d4168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4168.mem 17 1 1 sh3_zsrt139d4168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139d4169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4169.mem 17 1 1 sh3_zsrt139d4169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139d4170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4170.mem 17 1 1 sh3_zsrt139d4170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139d4171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4171.mem 17 1 1 sh3_zsrt139d4171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139d4172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4172.mem 17 1 1 sh3_zsrt139d4172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139d4173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4173.mem 17 1 1 sh3_zsrt139d4173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139d4174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4174.mem 17 1 1 sh3_zsrt139d4174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139d4175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4175.mem 17 1 1 sh3_zsrt139d4175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139d4176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4176.mem 17 1 1 sh3_zsrt139d4176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139d4177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4177.mem 17 1 1 sh3_zsrt139d4177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139d4178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4178.mem 17 1 1 sh3_zsrt139d4178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139d4179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4179.mem 17 1 1 sh3_zsrt139d4179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139d4180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4180.mem 17 1 1 sh3_zsrt139d4180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139d4181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4181.mem 17 1 1 sh3_zsrt139d4181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139d4182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4182.mem 17 1 1 sh3_zsrt139d4182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139d4183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4183.mem 17 1 1 sh3_zsrt139d4183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139d4184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4184.mem 17 1 1 sh3_zsrt139d4184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139d4185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4185.mem 17 1 1 sh3_zsrt139d4185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139d4186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4186.mem 17 1 1 sh3_zsrt139d4186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139d4187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4187.mem 17 1 1 sh3_zsrt139d4187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139d4188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4188.mem 17 1 1 sh3_zsrt139d4188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139d4189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4189.mem 17 1 1 sh3_zsrt139d4189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139d4190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4190.mem 17 1 1 sh3_zsrt139d4190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139d4191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4191.mem 17 1 1 sh3_zsrt139d4191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139d4192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4192.mem 17 1 1 sh3_zsrt139d4192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139d4193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4193.mem 17 1 1 sh3_zsrt139d4193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139d4194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4194.mem 17 1 1 sh3_zsrt139d4194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139d4195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4195.mem 17 1 1 sh3_zsrt139d4195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139d4196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4196.mem 17 1 1 sh3_zsrt139d4196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139d4197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4197.mem 17 1 1 sh3_zsrt139d4197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139d4198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4198.mem 17 1 1 sh3_zsrt139d4198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139d4199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4199.mem 17 1 1 sh3_zsrt139d4199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139d4200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4200.mem 17 1 1 sh3_zsrt139d4200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139d4201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4201.mem 17 1 1 sh3_zsrt139d4201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139d4202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4202.mem 17 1 1 sh3_zsrt139d4202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139d4203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4203.mem 17 1 1 sh3_zsrt139d4203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139d4204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4204.mem 17 1 1 sh3_zsrt139d4204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139d4205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4205.mem 17 1 1 sh3_zsrt139d4205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139d4206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4206.mem 17 1 1 sh3_zsrt139d4206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139d4207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4207.mem 17 1 1 sh3_zsrt139d4207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139d4208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4208.mem 17 1 1 sh3_zsrt139d4208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139d4209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4209.mem 17 1 1 sh3_zsrt139d4209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139d4210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4210.mem 17 1 1 sh3_zsrt139d4210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139d4211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4211.mem 17 1 1 sh3_zsrt139d4211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139d4212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4212.mem 17 1 1 sh3_zsrt139d4212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139d4213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4213.mem 17 1 1 sh3_zsrt139d4213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139d4214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4214.mem 17 1 1 sh3_zsrt139d4214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139d4215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4215.mem 17 1 1 sh3_zsrt139d4215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139d4216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4216.mem 17 1 1 sh3_zsrt139d4216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139d4217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4217.mem 17 1 1 sh3_zsrt139d4217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139d4218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4218.mem 17 1 1 sh3_zsrt139d4218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139d4219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4219.mem 17 1 1 sh3_zsrt139d4219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139d4220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4220.mem 17 1 1 sh3_zsrt139d4220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139d4221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4221.mem 17 1 1 sh3_zsrt139d4221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139d4222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4222.mem 17 1 1 sh3_zsrt139d4222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139d4223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4223.mem 17 1 1 sh3_zsrt139d4223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139d4224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4224.mem 17 1 1 sh3_zsrt139d4224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139d4225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4225.mem 17 1 1 sh3_zsrt139d4225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139d4226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4226.mem 17 1 1 sh3_zsrt139d4226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139d4227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4227.mem 17 1 1 sh3_zsrt139d4227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139d4228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4228.mem 17 1 1 sh3_zsrt139d4228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139d4229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4229.mem 17 1 1 sh3_zsrt139d4229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139d4230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4230.mem 17 1 1 sh3_zsrt139d4230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139d4231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4231.mem 17 1 1 sh3_zsrt139d4231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139d4232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4232.mem 17 1 1 sh3_zsrt139d4232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139d4233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4233.mem 17 1 1 sh3_zsrt139d4233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139d4234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4234.mem 17 1 1 sh3_zsrt139d4234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139d4235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4235.mem 17 1 1 sh3_zsrt139d4235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139d4236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4236.mem 17 1 1 sh3_zsrt139d4236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139d4237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4237.mem 17 1 1 sh3_zsrt139d4237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139d4238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4238.mem 17 1 1 sh3_zsrt139d4238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139d4239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4239.mem 17 1 1 sh3_zsrt139d4239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139d4240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4240.mem 17 1 1 sh3_zsrt139d4240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139d4241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4241.mem 17 1 1 sh3_zsrt139d4241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139d4242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4242.mem 17 1 1 sh3_zsrt139d4242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139d4243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4243.mem 17 1 1 sh3_zsrt139d4243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139d4244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4244.mem 17 1 1 sh3_zsrt139d4244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139d4245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4245.mem 17 1 1 sh3_zsrt139d4245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139d4246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4246.mem 17 1 1 sh3_zsrt139d4246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139d4247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4247.mem 17 1 1 sh3_zsrt139d4247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139d4248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4248.mem 17 1 1 sh3_zsrt139d4248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139d4249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4249.mem 17 1 1 sh3_zsrt139d4249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139d4250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4250.mem 17 1 1 sh3_zsrt139d4250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139d4251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4251.mem 17 1 1 sh3_zsrt139d4251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139d4252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4252.mem 17 1 1 sh3_zsrt139d4252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139d4253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4253.mem 17 1 1 sh3_zsrt139d4253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139d4254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4254.mem 17 1 1 sh3_zsrt139d4254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139d4255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4255.mem 17 1 1 sh3_zsrt139d4255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139d4256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4256.mem 17 1 1 sh3_zsrt139d4256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139d4257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4257.mem 17 1 1 sh3_zsrt139d4257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139d4258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4258.mem 17 1 1 sh3_zsrt139d4258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139d4259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4259.mem 17 1 1 sh3_zsrt139d4259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139d4260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4260.mem 17 1 1 sh3_zsrt139d4260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139d4261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4261.mem 17 1 1 sh3_zsrt139d4261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139d4262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4262.mem 17 1 1 sh3_zsrt139d4262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139d4263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4263.mem 17 1 1 sh3_zsrt139d4263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139d4264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4264.mem 17 1 1 sh3_zsrt139d4264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139d4265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4265.mem 17 1 1 sh3_zsrt139d4265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139d4266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4266.mem 17 1 1 sh3_zsrt139d4266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139d4267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4267.mem 17 1 1 sh3_zsrt139d4267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139d4268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4268.mem 17 1 1 sh3_zsrt139d4268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139d4269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4269.mem 17 1 1 sh3_zsrt139d4269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139d4270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4270.mem 17 1 1 sh3_zsrt139d4270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139d4271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4271.mem 17 1 1 sh3_zsrt139d4271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139d4272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4272.mem 17 1 1 sh3_zsrt139d4272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139d4273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4273.mem 17 1 1 sh3_zsrt139d4273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139d4274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4274.mem 17 1 1 sh3_zsrt139d4274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139d4275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4275.mem 17 1 1 sh3_zsrt139d4275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139d4276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4276.mem 17 1 1 sh3_zsrt139d4276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139d4277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4277.mem 17 1 1 sh3_zsrt139d4277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139d4278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4278.mem 17 1 1 sh3_zsrt139d4278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139d4279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4279.mem 17 1 1 sh3_zsrt139d4279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139d4280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4280.mem 17 1 1 sh3_zsrt139d4280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139d4281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4281.mem 17 1 1 sh3_zsrt139d4281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139d4282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4282.mem 17 1 1 sh3_zsrt139d4282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139d4283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4283.mem 17 1 1 sh3_zsrt139d4283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139d4284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4284.mem 17 1 1 sh3_zsrt139d4284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139d4285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4285.mem 17 1 1 sh3_zsrt139d4285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139d4286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4286.mem 17 1 1 sh3_zsrt139d4286_pal.mem 0x158afe76 +287 198075 10240 480 sh3_zsrt139d4287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4287.mem 557 61 0 sh3_zsrt139d4287_pal.mem 0x158afe76 +288 198075 10240 480 sh3_zsrt139d4288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4288.mem 323 35 1 sh3_zsrt139d4288_pal.mem 0x158afe76 +289 198075 10240 480 sh3_zsrt139d4289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4289.mem 53 5 1 sh3_zsrt139d4289_pal.mem 0x158afe76 +290 198092 10240 480 sh3_zsrt139d4290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4290.mem 665 73 1 sh3_zsrt139d4290_pal.mem 0x158afe76 +291 198092 10240 480 sh3_zsrt139d4291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4291.mem 215 23 1 sh3_zsrt139d4291_pal.mem 0x158afe76 +292 198092 10240 480 sh3_zsrt139d4292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4292.mem 458 50 1 sh3_zsrt139d4292_pal.mem 0x158afe76 +293 198092 10240 480 sh3_zsrt139d4293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4293.mem 431 47 1 sh3_zsrt139d4293_pal.mem 0x158afe76 +294 198092 10240 480 sh3_zsrt139d4294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4294.mem 395 43 1 sh3_zsrt139d4294_pal.mem 0x158afe76 +295 198092 10240 480 sh3_zsrt139d4295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4295.mem 206 22 1 sh3_zsrt139d4295_pal.mem 0x158afe76 +296 198092 10240 480 sh3_zsrt139d4296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4296.mem 170 18 1 sh3_zsrt139d4296_pal.mem 0x158afe76 +297 198092 10240 480 sh3_zsrt139d4297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4297.mem 242 26 1 sh3_zsrt139d4297_pal.mem 0x158afe76 +298 198092 10240 480 sh3_zsrt139d4298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4298.mem 359 39 1 sh3_zsrt139d4298_pal.mem 0x158afe76 +299 198092 10240 480 sh3_zsrt139d4299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4299.mem 323 35 1 sh3_zsrt139d4299_pal.mem 0x158afe76 +300 198092 10240 480 sh3_zsrt139d4300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4300.mem 215 23 1 sh3_zsrt139d4300_pal.mem 0x158afe76 +301 198092 10240 480 sh3_zsrt139d4301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4301.mem 314 34 1 sh3_zsrt139d4301_pal.mem 0x158afe76 +302 198092 10240 480 sh3_zsrt139d4302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4302.mem 278 30 1 sh3_zsrt139d4302_pal.mem 0x158afe76 +303 198092 10240 480 sh3_zsrt139d4303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4303.mem 116 12 1 sh3_zsrt139d4303_pal.mem 0x158afe76 +304 198092 10240 480 sh3_zsrt139d4304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4304.mem 197 21 1 sh3_zsrt139d4304_pal.mem 0x158afe76 +305 198092 10240 480 sh3_zsrt139d4305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4305.mem 458 50 1 sh3_zsrt139d4305_pal.mem 0x158afe76 +306 198092 10240 480 sh3_zsrt139d4306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4306.mem 269 29 1 sh3_zsrt139d4306_pal.mem 0x158afe76 +307 198092 10240 480 sh3_zsrt139d4307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4307.mem 206 22 1 sh3_zsrt139d4307_pal.mem 0x158afe76 +308 198092 10240 480 sh3_zsrt139d4308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4308.mem 323 35 1 sh3_zsrt139d4308_pal.mem 0x158afe76 +309 198092 10240 480 sh3_zsrt139d4309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4309.mem 494 54 1 sh3_zsrt139d4309_pal.mem 0x158afe76 +310 198092 10240 480 sh3_zsrt139d4310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4310.mem 566 62 1 sh3_zsrt139d4310_pal.mem 0x158afe76 +311 198092 10240 480 sh3_zsrt139d4311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4311.mem 287 31 1 sh3_zsrt139d4311_pal.mem 0x158afe76 +312 198092 10240 480 sh3_zsrt139d4312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4312.mem 260 28 1 sh3_zsrt139d4312_pal.mem 0x158afe76 +313 198092 10240 480 sh3_zsrt139d4313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4313.mem 89 9 1 sh3_zsrt139d4313_pal.mem 0x158afe76 +314 198092 10240 480 sh3_zsrt139d4314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4314.mem 359 39 1 sh3_zsrt139d4314_pal.mem 0x158afe76 +315 198092 10240 480 sh3_zsrt139d4315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4315.mem 539 59 1 sh3_zsrt139d4315_pal.mem 0x158afe76 +316 198092 10240 480 sh3_zsrt139d4316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4316.mem 323 35 1 sh3_zsrt139d4316_pal.mem 0x158afe76 +317 198092 10240 480 sh3_zsrt139d4317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4317.mem 179 19 1 sh3_zsrt139d4317_pal.mem 0x158afe76 +318 198092 10240 480 sh3_zsrt139d4318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4318.mem 494 54 1 sh3_zsrt139d4318_pal.mem 0x158afe76 +319 198092 10240 480 sh3_zsrt139d4319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4319.mem 251 27 1 sh3_zsrt139d4319_pal.mem 0x158afe76 +320 198092 10240 480 sh3_zsrt139d4320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4320.mem 116 12 1 sh3_zsrt139d4320_pal.mem 0x158afe76 +321 198092 10240 480 sh3_zsrt139d4321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4321.mem 251 27 1 sh3_zsrt139d4321_pal.mem 0x158afe76 +322 198092 10240 480 sh3_zsrt139d4322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4322.mem 251 27 1 sh3_zsrt139d4322_pal.mem 0x158afe76 +323 198092 10240 480 sh3_zsrt139d4323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4323.mem 170 18 1 sh3_zsrt139d4323_pal.mem 0x158afe76 +324 198092 10240 480 sh3_zsrt139d4324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4324.mem 188 20 1 sh3_zsrt139d4324_pal.mem 0x158afe76 +325 198092 10240 480 sh3_zsrt139d4325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4325.mem 170 18 1 sh3_zsrt139d4325_pal.mem 0x158afe76 +326 198092 10240 480 sh3_zsrt139d4326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4326.mem 71 7 1 sh3_zsrt139d4326_pal.mem 0x158afe76 +327 198092 10240 480 sh3_zsrt139d4327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4327.mem 224 24 1 sh3_zsrt139d4327_pal.mem 0x158afe76 +328 198092 10240 480 sh3_zsrt139d4328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4328.mem 143 15 1 sh3_zsrt139d4328_pal.mem 0x158afe76 +329 198092 10240 480 sh3_zsrt139d4329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4329.mem 305 33 1 sh3_zsrt139d4329_pal.mem 0x158afe76 +330 198092 10240 480 sh3_zsrt139d4330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4330.mem 143 15 1 sh3_zsrt139d4330_pal.mem 0x158afe76 +331 198092 10240 480 sh3_zsrt139d4331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4331.mem 71 7 1 sh3_zsrt139d4331_pal.mem 0x158afe76 +332 198092 10240 480 sh3_zsrt139d4332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4332.mem 233 25 1 sh3_zsrt139d4332_pal.mem 0x158afe76 +333 198092 10240 480 sh3_zsrt139d4333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4333.mem 260 28 1 sh3_zsrt139d4333_pal.mem 0x158afe76 +334 198092 10240 480 sh3_zsrt139d4334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4334.mem 350 38 1 sh3_zsrt139d4334_pal.mem 0x158afe76 +335 198092 10240 480 sh3_zsrt139d4335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4335.mem 188 20 1 sh3_zsrt139d4335_pal.mem 0x158afe76 +336 198092 10240 480 sh3_zsrt139d4336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4336.mem 80 8 1 sh3_zsrt139d4336_pal.mem 0x158afe76 +337 198092 10240 480 sh3_zsrt139d4337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4337.mem 251 27 1 sh3_zsrt139d4337_pal.mem 0x158afe76 +338 198092 10240 480 sh3_zsrt139d4338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4338.mem 125 13 1 sh3_zsrt139d4338_pal.mem 0x158afe76 +339 198092 10240 480 sh3_zsrt139d4339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4339.mem 269 29 1 sh3_zsrt139d4339_pal.mem 0x158afe76 +340 198092 10240 480 sh3_zsrt139d4340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4340.mem 179 19 1 sh3_zsrt139d4340_pal.mem 0x158afe76 +341 198092 10240 480 sh3_zsrt139d4341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4341.mem 341 37 1 sh3_zsrt139d4341_pal.mem 0x158afe76 +342 198092 10240 480 sh3_zsrt139d4342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4342.mem 206 22 1 sh3_zsrt139d4342_pal.mem 0x158afe76 +343 198092 10240 480 sh3_zsrt139d4343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4343.mem 179 19 1 sh3_zsrt139d4343_pal.mem 0x158afe76 +344 198092 10240 480 sh3_zsrt139d4344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4344.mem 98 10 1 sh3_zsrt139d4344_pal.mem 0x158afe76 +345 198092 10240 480 sh3_zsrt139d4345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4345.mem 242 26 1 sh3_zsrt139d4345_pal.mem 0x158afe76 +346 198092 10240 480 sh3_zsrt139d4346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4346.mem 80 8 1 sh3_zsrt139d4346_pal.mem 0x158afe76 +347 198092 10240 480 sh3_zsrt139d4347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4347.mem 53 5 1 sh3_zsrt139d4347_pal.mem 0x158afe76 +348 198092 10240 480 sh3_zsrt139d4348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4348.mem 44 4 1 sh3_zsrt139d4348_pal.mem 0x158afe76 +349 198092 10240 480 sh3_zsrt139d4349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4349.mem 116 12 1 sh3_zsrt139d4349_pal.mem 0x158afe76 +350 198092 10240 480 sh3_zsrt139d4350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4350.mem 107 11 1 sh3_zsrt139d4350_pal.mem 0x158afe76 +351 198092 10240 480 sh3_zsrt139d4351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4351.mem 224 24 1 sh3_zsrt139d4351_pal.mem 0x158afe76 +352 198092 10240 480 sh3_zsrt139d4352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4352.mem 107 11 1 sh3_zsrt139d4352_pal.mem 0x158afe76 +353 198092 10240 480 sh3_zsrt139d4353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4353.mem 629 69 1 sh3_zsrt139d4353_pal.mem 0x158afe76 +354 198092 10240 480 sh3_zsrt139d4354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4354.mem 287 31 1 sh3_zsrt139d4354_pal.mem 0x158afe76 +355 198092 10240 480 sh3_zsrt139d4355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4355.mem 116 12 1 sh3_zsrt139d4355_pal.mem 0x158afe76 +356 198092 10240 480 sh3_zsrt139d4356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4356.mem 134 14 1 sh3_zsrt139d4356_pal.mem 0x158afe76 +357 198092 10240 480 sh3_zsrt139d4357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4357.mem 287 31 1 sh3_zsrt139d4357_pal.mem 0x158afe76 +358 198092 10240 480 sh3_zsrt139d4358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4358.mem 224 24 1 sh3_zsrt139d4358_pal.mem 0x158afe76 +359 198092 10240 480 sh3_zsrt139d4359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4359.mem 431 47 1 sh3_zsrt139d4359_pal.mem 0x158afe76 +360 198092 10240 480 sh3_zsrt139d4360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4360.mem 53 5 1 sh3_zsrt139d4360_pal.mem 0x158afe76 +361 198092 10240 480 sh3_zsrt139d4361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4361.mem 53 5 1 sh3_zsrt139d4361_pal.mem 0x158afe76 +362 198092 10240 480 sh3_zsrt139d4362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4362.mem 71 7 1 sh3_zsrt139d4362_pal.mem 0x158afe76 +363 198092 10240 480 sh3_zsrt139d4363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4363.mem 161 17 1 sh3_zsrt139d4363_pal.mem 0x158afe76 +364 198092 10240 480 sh3_zsrt139d4364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4364.mem 206 22 1 sh3_zsrt139d4364_pal.mem 0x158afe76 +365 198092 10240 480 sh3_zsrt139d4365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4365.mem 89 9 1 sh3_zsrt139d4365_pal.mem 0x158afe76 +366 198092 10240 480 sh3_zsrt139d4366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4366.mem 89 9 1 sh3_zsrt139d4366_pal.mem 0x158afe76 +367 198092 10240 480 sh3_zsrt139d4367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4367.mem 143 15 1 sh3_zsrt139d4367_pal.mem 0x158afe76 +368 198092 10240 480 sh3_zsrt139d4368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4368.mem 368 40 1 sh3_zsrt139d4368_pal.mem 0x158afe76 +369 198092 10240 480 sh3_zsrt139d4369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4369.mem 80 8 1 sh3_zsrt139d4369_pal.mem 0x158afe76 +370 198092 10240 480 sh3_zsrt139d4370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4370.mem 152 16 1 sh3_zsrt139d4370_pal.mem 0x158afe76 +371 198092 10240 480 sh3_zsrt139d4371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4371.mem 314 34 1 sh3_zsrt139d4371_pal.mem 0x158afe76 +372 198092 10240 480 sh3_zsrt139d4372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4372.mem 116 12 1 sh3_zsrt139d4372_pal.mem 0x158afe76 +373 198092 10240 480 sh3_zsrt139d4373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4373.mem 179 19 1 sh3_zsrt139d4373_pal.mem 0x158afe76 +374 198092 10240 480 sh3_zsrt139d4374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4374.mem 62 6 1 sh3_zsrt139d4374_pal.mem 0x158afe76 +375 198092 10240 480 sh3_zsrt139d4375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4375.mem 89 9 1 sh3_zsrt139d4375_pal.mem 0x158afe76 +376 198092 10240 480 sh3_zsrt139d4376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4376.mem 278 30 1 sh3_zsrt139d4376_pal.mem 0x158afe76 +377 198092 10240 480 sh3_zsrt139d4377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4377.mem 350 38 1 sh3_zsrt139d4377_pal.mem 0x158afe76 +378 198092 10240 480 sh3_zsrt139d4378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4378.mem 134 14 1 sh3_zsrt139d4378_pal.mem 0x158afe76 +379 198092 10240 480 sh3_zsrt139d4379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4379.mem 332 36 1 sh3_zsrt139d4379_pal.mem 0x158afe76 +380 198092 10240 480 sh3_zsrt139d4380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4380.mem 404 44 1 sh3_zsrt139d4380_pal.mem 0x158afe76 +381 198092 10240 480 sh3_zsrt139d4381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4381.mem 179 19 1 sh3_zsrt139d4381_pal.mem 0x158afe76 +382 198092 10240 480 sh3_zsrt139d4382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4382.mem 107 11 1 sh3_zsrt139d4382_pal.mem 0x158afe76 +383 198092 10240 480 sh3_zsrt139d4383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4383.mem 161 17 1 sh3_zsrt139d4383_pal.mem 0x158afe76 +384 198092 10240 480 sh3_zsrt139d4384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4384.mem 539 59 1 sh3_zsrt139d4384_pal.mem 0x158afe76 +385 198092 10240 480 sh3_zsrt139d4385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4385.mem 143 15 1 sh3_zsrt139d4385_pal.mem 0x158afe76 +386 198092 10240 480 sh3_zsrt139d4386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4386.mem 332 36 1 sh3_zsrt139d4386_pal.mem 0x158afe76 +387 198092 10240 480 sh3_zsrt139d4387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4387.mem 161 17 1 sh3_zsrt139d4387_pal.mem 0x158afe76 +388 198092 10240 480 sh3_zsrt139d4388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4388.mem 107 11 1 sh3_zsrt139d4388_pal.mem 0x158afe76 +389 198092 10240 480 sh3_zsrt139d4389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4389.mem 368 40 1 sh3_zsrt139d4389_pal.mem 0x158afe76 +390 198092 10240 480 sh3_zsrt139d4390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4390.mem 368 40 1 sh3_zsrt139d4390_pal.mem 0x158afe76 +391 198092 10240 480 sh3_zsrt139d4391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4391.mem 80 8 1 sh3_zsrt139d4391_pal.mem 0x158afe76 +392 198092 10240 480 sh3_zsrt139d4392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4392.mem 62 6 1 sh3_zsrt139d4392_pal.mem 0x158afe76 +393 198092 10240 480 sh3_zsrt139d4393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4393.mem 53 5 1 sh3_zsrt139d4393_pal.mem 0x158afe76 +394 198092 10240 480 sh3_zsrt139d4394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4394.mem 143 15 1 sh3_zsrt139d4394_pal.mem 0x158afe76 +395 198092 10240 480 sh3_zsrt139d4395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4395.mem 107 11 1 sh3_zsrt139d4395_pal.mem 0x158afe76 +396 198092 10240 480 sh3_zsrt139d4396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4396.mem 89 9 1 sh3_zsrt139d4396_pal.mem 0x158afe76 +397 198092 10240 480 sh3_zsrt139d4397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4397.mem 152 16 1 sh3_zsrt139d4397_pal.mem 0x158afe76 +398 198092 10240 480 sh3_zsrt139d4398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4398.mem 314 34 1 sh3_zsrt139d4398_pal.mem 0x158afe76 +399 198092 10240 480 sh3_zsrt139d4399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4399.mem 44 4 1 sh3_zsrt139d4399_pal.mem 0x158afe76 +400 198092 10240 480 sh3_zsrt139d4400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4400.mem 44 4 1 sh3_zsrt139d4400_pal.mem 0x158afe76 +401 198092 10240 480 sh3_zsrt139d4401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4401.mem 62 6 1 sh3_zsrt139d4401_pal.mem 0x158afe76 +402 198092 10240 480 sh3_zsrt139d4402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4402.mem 206 22 1 sh3_zsrt139d4402_pal.mem 0x158afe76 +403 198092 10240 480 sh3_zsrt139d4403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4403.mem 359 39 1 sh3_zsrt139d4403_pal.mem 0x158afe76 +404 198092 10240 480 sh3_zsrt139d4404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4404.mem 215 23 1 sh3_zsrt139d4404_pal.mem 0x158afe76 +405 198092 10240 480 sh3_zsrt139d4405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4405.mem 206 22 1 sh3_zsrt139d4405_pal.mem 0x158afe76 +406 198092 10240 480 sh3_zsrt139d4406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4406.mem 116 12 1 sh3_zsrt139d4406_pal.mem 0x158afe76 +407 198092 10240 480 sh3_zsrt139d4407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4407.mem 638 70 1 sh3_zsrt139d4407_pal.mem 0x158afe76 +408 198092 10240 480 sh3_zsrt139d4408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4408.mem 179 19 1 sh3_zsrt139d4408_pal.mem 0x158afe76 +409 198092 10240 480 sh3_zsrt139d4409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4409.mem 152 16 1 sh3_zsrt139d4409_pal.mem 0x158afe76 +410 198092 10240 480 sh3_zsrt139d4410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4410.mem 368 40 1 sh3_zsrt139d4410_pal.mem 0x158afe76 +411 198092 10240 480 sh3_zsrt139d4411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4411.mem 125 13 1 sh3_zsrt139d4411_pal.mem 0x158afe76 +412 198092 10240 480 sh3_zsrt139d4412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4412.mem 53 5 1 sh3_zsrt139d4412_pal.mem 0x158afe76 +413 198092 10240 480 sh3_zsrt139d4413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4413.mem 71 7 1 sh3_zsrt139d4413_pal.mem 0x158afe76 +414 198092 10240 480 sh3_zsrt139d4414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4414.mem 431 47 1 sh3_zsrt139d4414_pal.mem 0x158afe76 +415 198092 10240 480 sh3_zsrt139d4415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4415.mem 143 15 1 sh3_zsrt139d4415_pal.mem 0x158afe76 +416 198092 10240 480 sh3_zsrt139d4416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4416.mem 125 13 1 sh3_zsrt139d4416_pal.mem 0x158afe76 +417 198092 10240 480 sh3_zsrt139d4417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4417.mem 503 55 1 sh3_zsrt139d4417_pal.mem 0x158afe76 +418 198092 10240 480 sh3_zsrt139d4418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4418.mem 116 12 1 sh3_zsrt139d4418_pal.mem 0x158afe76 +419 198092 10240 480 sh3_zsrt139d4419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4419.mem 62 6 1 sh3_zsrt139d4419_pal.mem 0x158afe76 +420 198092 10240 480 sh3_zsrt139d4420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4420.mem 53 5 1 sh3_zsrt139d4420_pal.mem 0x158afe76 +421 198092 10240 480 sh3_zsrt139d4421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4421.mem 188 20 1 sh3_zsrt139d4421_pal.mem 0x158afe76 +422 198092 10240 480 sh3_zsrt139d4422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4422.mem 251 27 1 sh3_zsrt139d4422_pal.mem 0x158afe76 +423 198092 10240 480 sh3_zsrt139d4423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4423.mem 89 9 1 sh3_zsrt139d4423_pal.mem 0x158afe76 +424 198092 10240 480 sh3_zsrt139d4424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4424.mem 71 7 1 sh3_zsrt139d4424_pal.mem 0x158afe76 +425 198092 10240 480 sh3_zsrt139d4425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4425.mem 71 7 1 sh3_zsrt139d4425_pal.mem 0x158afe76 +426 198092 10240 480 sh3_zsrt139d4426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4426.mem 80 8 1 sh3_zsrt139d4426_pal.mem 0x158afe76 +427 198092 10240 480 sh3_zsrt139d4427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4427.mem 179 19 1 sh3_zsrt139d4427_pal.mem 0x158afe76 +428 198092 10240 480 sh3_zsrt139d4428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4428.mem 251 27 1 sh3_zsrt139d4428_pal.mem 0x158afe76 +429 198092 10240 480 sh3_zsrt139d4429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4429.mem 161 17 1 sh3_zsrt139d4429_pal.mem 0x158afe76 +430 198092 10240 480 sh3_zsrt139d4430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4430.mem 161 17 1 sh3_zsrt139d4430_pal.mem 0x158afe76 +431 198092 10240 480 sh3_zsrt139d4431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4431.mem 71 7 1 sh3_zsrt139d4431_pal.mem 0x158afe76 +432 198092 10240 480 sh3_zsrt139d4432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4432.mem 71 7 1 sh3_zsrt139d4432_pal.mem 0x158afe76 +433 198092 10240 480 sh3_zsrt139d4433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4433.mem 80 8 1 sh3_zsrt139d4433_pal.mem 0x158afe76 +434 198092 10240 480 sh3_zsrt139d4434_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4434.mem 125 13 1 sh3_zsrt139d4434_pal.mem 0x158afe76 +435 198092 10240 480 sh3_zsrt139d4435_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4435.mem 251 27 1 sh3_zsrt139d4435_pal.mem 0x158afe76 +436 198092 10240 480 sh3_zsrt139d4436_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4436.mem 80 8 1 sh3_zsrt139d4436_pal.mem 0x158afe76 +437 198092 10240 480 sh3_zsrt139d4437_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4437.mem 62 6 1 sh3_zsrt139d4437_pal.mem 0x158afe76 +438 198092 10240 480 sh3_zsrt139d4438_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4438.mem 44 4 1 sh3_zsrt139d4438_pal.mem 0x158afe76 +439 198092 10240 480 sh3_zsrt139d4439_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4439.mem 44 4 1 sh3_zsrt139d4439_pal.mem 0x158afe76 +440 198092 10240 480 sh3_zsrt139d4440_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4440.mem 35 3 1 sh3_zsrt139d4440_pal.mem 0x158afe76 +441 198092 10240 480 sh3_zsrt139d4441_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4441.mem 35 3 1 sh3_zsrt139d4441_pal.mem 0x158afe76 +442 198092 10240 480 sh3_zsrt139d4442_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4442.mem 35 3 1 sh3_zsrt139d4442_pal.mem 0x158afe76 +443 198092 10240 480 sh3_zsrt139d4443_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4443.mem 53 5 1 sh3_zsrt139d4443_pal.mem 0x158afe76 +444 198092 10240 480 sh3_zsrt139d4444_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4444.mem 107 11 1 sh3_zsrt139d4444_pal.mem 0x158afe76 +445 198092 10240 480 sh3_zsrt139d4445_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4445.mem 71 7 1 sh3_zsrt139d4445_pal.mem 0x158afe76 +446 198092 10240 480 sh3_zsrt139d4446_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4446.mem 71 7 1 sh3_zsrt139d4446_pal.mem 0x158afe76 +447 198092 10240 480 sh3_zsrt139d4447_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4447.mem 98 10 1 sh3_zsrt139d4447_pal.mem 0x158afe76 +448 198092 10240 480 sh3_zsrt139d4448_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4448.mem 215 23 1 sh3_zsrt139d4448_pal.mem 0x158afe76 +449 198092 10240 480 sh3_zsrt139d4449_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4449.mem 521 57 1 sh3_zsrt139d4449_pal.mem 0x158afe76 +450 198092 10240 480 sh3_zsrt139d4450_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4450.mem 701 77 1 sh3_zsrt139d4450_pal.mem 0x158afe76 +451 198092 10240 480 sh3_zsrt139d4451_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4451.mem 80 8 1 sh3_zsrt139d4451_pal.mem 0x158afe76 +452 198092 10240 480 sh3_zsrt139d4452_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4452.mem 125 13 1 sh3_zsrt139d4452_pal.mem 0x158afe76 +453 198092 10240 480 sh3_zsrt139d4453_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4453.mem 287 31 1 sh3_zsrt139d4453_pal.mem 0x158afe76 +454 198092 10240 480 sh3_zsrt139d4454_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4454.mem 107 11 1 sh3_zsrt139d4454_pal.mem 0x158afe76 +455 198092 10240 480 sh3_zsrt139d4455_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4455.mem 89 9 1 sh3_zsrt139d4455_pal.mem 0x158afe76 +456 198092 10240 480 sh3_zsrt139d4456_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4456.mem 161 17 1 sh3_zsrt139d4456_pal.mem 0x158afe76 +457 198092 10240 480 sh3_zsrt139d4457_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4457.mem 125 13 1 sh3_zsrt139d4457_pal.mem 0x158afe76 +458 198092 10240 480 sh3_zsrt139d4458_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4458.mem 80 8 1 sh3_zsrt139d4458_pal.mem 0x158afe76 +459 198092 10240 480 sh3_zsrt139d4459_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4459.mem 53 5 1 sh3_zsrt139d4459_pal.mem 0x158afe76 +460 198092 10240 480 sh3_zsrt139d4460_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4460.mem 53 5 1 sh3_zsrt139d4460_pal.mem 0x158afe76 +461 198092 10240 480 sh3_zsrt139d4461_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4461.mem 62 6 1 sh3_zsrt139d4461_pal.mem 0x158afe76 +462 198092 10240 480 sh3_zsrt139d4462_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4462.mem 98 10 1 sh3_zsrt139d4462_pal.mem 0x158afe76 +463 198092 10240 480 sh3_zsrt139d4463_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4463.mem 170 18 1 sh3_zsrt139d4463_pal.mem 0x158afe76 +464 198092 10240 480 sh3_zsrt139d4464_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4464.mem 341 37 1 sh3_zsrt139d4464_pal.mem 0x158afe76 +465 198092 10240 480 sh3_zsrt139d4465_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4465.mem 242 26 1 sh3_zsrt139d4465_pal.mem 0x158afe76 +466 198092 10240 480 sh3_zsrt139d4466_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4466.mem 53 5 1 sh3_zsrt139d4466_pal.mem 0x158afe76 +467 198092 10240 480 sh3_zsrt139d4467_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4467.mem 35 3 1 sh3_zsrt139d4467_pal.mem 0x158afe76 +468 198092 10240 480 sh3_zsrt139d4468_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4468.mem 35 3 1 sh3_zsrt139d4468_pal.mem 0x158afe76 +469 198092 10240 480 sh3_zsrt139d4469_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4469.mem 35 3 1 sh3_zsrt139d4469_pal.mem 0x158afe76 +470 198092 10240 480 sh3_zsrt139d4470_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4470.mem 35 3 1 sh3_zsrt139d4470_pal.mem 0x158afe76 +471 198092 10240 480 sh3_zsrt139d4471_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4471.mem 44 4 1 sh3_zsrt139d4471_pal.mem 0x158afe76 +472 198092 10240 480 sh3_zsrt139d4472_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4472.mem 62 6 1 sh3_zsrt139d4472_pal.mem 0x158afe76 +473 198092 10240 480 sh3_zsrt139d4473_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4473.mem 98 10 1 sh3_zsrt139d4473_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d5_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d5_epochs.txt new file mode 100644 index 0000000..cba445f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d5_epochs.txt @@ -0,0 +1,153 @@ +# Ch407 epoch descriptor table (147 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 147 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 198075 10240 480 sh3_zsrt139d50_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d50.mem 485 53 0 sh3_zsrt139d50_pal.mem 0x158afe76 +1 198092 10240 480 sh3_zsrt139d51_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d51.mem 665 73 1 sh3_zsrt139d51_pal.mem 0x158afe76 +2 198092 10240 480 sh3_zsrt139d52_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d52.mem 215 23 1 sh3_zsrt139d52_pal.mem 0x158afe76 +3 198092 10240 480 sh3_zsrt139d53_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d53.mem 458 50 1 sh3_zsrt139d53_pal.mem 0x158afe76 +4 198092 10240 480 sh3_zsrt139d54_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d54.mem 431 47 1 sh3_zsrt139d54_pal.mem 0x158afe76 +5 198092 10240 480 sh3_zsrt139d55_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d55.mem 395 43 1 sh3_zsrt139d55_pal.mem 0x158afe76 +6 198092 10240 480 sh3_zsrt139d56_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d56.mem 206 22 1 sh3_zsrt139d56_pal.mem 0x158afe76 +7 198092 10240 480 sh3_zsrt139d57_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d57.mem 170 18 1 sh3_zsrt139d57_pal.mem 0x158afe76 +8 198092 10240 480 sh3_zsrt139d58_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d58.mem 242 26 1 sh3_zsrt139d58_pal.mem 0x158afe76 +9 198092 10240 480 sh3_zsrt139d59_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d59.mem 359 39 1 sh3_zsrt139d59_pal.mem 0x158afe76 +10 198092 10240 480 sh3_zsrt139d510_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d510.mem 323 35 1 sh3_zsrt139d510_pal.mem 0x158afe76 +11 198092 10240 480 sh3_zsrt139d511_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d511.mem 215 23 1 sh3_zsrt139d511_pal.mem 0x158afe76 +12 198092 10240 480 sh3_zsrt139d512_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d512.mem 314 34 1 sh3_zsrt139d512_pal.mem 0x158afe76 +13 198092 10240 480 sh3_zsrt139d513_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d513.mem 278 30 1 sh3_zsrt139d513_pal.mem 0x158afe76 +14 198092 10240 480 sh3_zsrt139d514_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d514.mem 116 12 1 sh3_zsrt139d514_pal.mem 0x158afe76 +15 198092 10240 480 sh3_zsrt139d515_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d515.mem 197 21 1 sh3_zsrt139d515_pal.mem 0x158afe76 +16 198092 10240 480 sh3_zsrt139d516_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d516.mem 458 50 1 sh3_zsrt139d516_pal.mem 0x158afe76 +17 198092 10240 480 sh3_zsrt139d517_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d517.mem 269 29 1 sh3_zsrt139d517_pal.mem 0x158afe76 +18 198092 10240 480 sh3_zsrt139d518_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d518.mem 206 22 1 sh3_zsrt139d518_pal.mem 0x158afe76 +19 198092 10240 480 sh3_zsrt139d519_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d519.mem 323 35 1 sh3_zsrt139d519_pal.mem 0x158afe76 +20 198092 10240 480 sh3_zsrt139d520_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d520.mem 494 54 1 sh3_zsrt139d520_pal.mem 0x158afe76 +21 198092 10240 480 sh3_zsrt139d521_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d521.mem 566 62 1 sh3_zsrt139d521_pal.mem 0x158afe76 +22 198092 10240 480 sh3_zsrt139d522_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d522.mem 287 31 1 sh3_zsrt139d522_pal.mem 0x158afe76 +23 198092 10240 480 sh3_zsrt139d523_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d523.mem 260 28 1 sh3_zsrt139d523_pal.mem 0x158afe76 +24 198092 10240 480 sh3_zsrt139d524_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d524.mem 89 9 1 sh3_zsrt139d524_pal.mem 0x158afe76 +25 198092 10240 480 sh3_zsrt139d525_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d525.mem 359 39 1 sh3_zsrt139d525_pal.mem 0x158afe76 +26 198092 10240 480 sh3_zsrt139d526_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d526.mem 539 59 1 sh3_zsrt139d526_pal.mem 0x158afe76 +27 198092 10240 480 sh3_zsrt139d527_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d527.mem 323 35 1 sh3_zsrt139d527_pal.mem 0x158afe76 +28 198092 10240 480 sh3_zsrt139d528_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d528.mem 179 19 1 sh3_zsrt139d528_pal.mem 0x158afe76 +29 198092 10240 480 sh3_zsrt139d529_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d529.mem 494 54 1 sh3_zsrt139d529_pal.mem 0x158afe76 +30 198092 10240 480 sh3_zsrt139d530_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d530.mem 431 47 1 sh3_zsrt139d530_pal.mem 0x158afe76 +31 198092 10240 480 sh3_zsrt139d531_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d531.mem 107 11 1 sh3_zsrt139d531_pal.mem 0x158afe76 +32 198092 10240 480 sh3_zsrt139d532_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d532.mem 278 30 1 sh3_zsrt139d532_pal.mem 0x158afe76 +33 198092 10240 480 sh3_zsrt139d533_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d533.mem 413 45 1 sh3_zsrt139d533_pal.mem 0x158afe76 +34 198092 10240 480 sh3_zsrt139d534_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d534.mem 98 10 1 sh3_zsrt139d534_pal.mem 0x158afe76 +35 198092 10240 480 sh3_zsrt139d535_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d535.mem 278 30 1 sh3_zsrt139d535_pal.mem 0x158afe76 +36 198092 10240 480 sh3_zsrt139d536_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d536.mem 62 6 1 sh3_zsrt139d536_pal.mem 0x158afe76 +37 198092 10240 480 sh3_zsrt139d537_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d537.mem 98 10 1 sh3_zsrt139d537_pal.mem 0x158afe76 +38 198092 10240 480 sh3_zsrt139d538_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d538.mem 251 27 1 sh3_zsrt139d538_pal.mem 0x158afe76 +39 198092 10240 480 sh3_zsrt139d539_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d539.mem 215 23 1 sh3_zsrt139d539_pal.mem 0x158afe76 +40 198092 10240 480 sh3_zsrt139d540_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d540.mem 215 23 1 sh3_zsrt139d540_pal.mem 0x158afe76 +41 198092 10240 480 sh3_zsrt139d541_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d541.mem 107 11 1 sh3_zsrt139d541_pal.mem 0x158afe76 +42 198092 10240 480 sh3_zsrt139d542_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d542.mem 152 16 1 sh3_zsrt139d542_pal.mem 0x158afe76 +43 198092 10240 480 sh3_zsrt139d543_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d543.mem 278 30 1 sh3_zsrt139d543_pal.mem 0x158afe76 +44 198092 10240 480 sh3_zsrt139d544_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d544.mem 503 55 1 sh3_zsrt139d544_pal.mem 0x158afe76 +45 198092 10240 480 sh3_zsrt139d545_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d545.mem 62 6 1 sh3_zsrt139d545_pal.mem 0x158afe76 +46 198092 10240 480 sh3_zsrt139d546_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d546.mem 98 10 1 sh3_zsrt139d546_pal.mem 0x158afe76 +47 198092 10240 480 sh3_zsrt139d547_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d547.mem 260 28 1 sh3_zsrt139d547_pal.mem 0x158afe76 +48 198092 10240 480 sh3_zsrt139d548_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d548.mem 116 12 1 sh3_zsrt139d548_pal.mem 0x158afe76 +49 198092 10240 480 sh3_zsrt139d549_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d549.mem 323 35 1 sh3_zsrt139d549_pal.mem 0x158afe76 +50 198092 10240 480 sh3_zsrt139d550_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d550.mem 242 26 1 sh3_zsrt139d550_pal.mem 0x158afe76 +51 198092 10240 480 sh3_zsrt139d551_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d551.mem 233 25 1 sh3_zsrt139d551_pal.mem 0x158afe76 +52 198092 10240 480 sh3_zsrt139d552_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d552.mem 233 25 1 sh3_zsrt139d552_pal.mem 0x158afe76 +53 198092 10240 480 sh3_zsrt139d553_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d553.mem 152 16 1 sh3_zsrt139d553_pal.mem 0x158afe76 +54 198092 10240 480 sh3_zsrt139d554_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d554.mem 449 49 1 sh3_zsrt139d554_pal.mem 0x158afe76 +55 198092 10240 480 sh3_zsrt139d555_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d555.mem 125 13 1 sh3_zsrt139d555_pal.mem 0x158afe76 +56 198092 10240 480 sh3_zsrt139d556_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d556.mem 62 6 1 sh3_zsrt139d556_pal.mem 0x158afe76 +57 198092 10240 480 sh3_zsrt139d557_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d557.mem 53 5 1 sh3_zsrt139d557_pal.mem 0x158afe76 +58 198092 10240 480 sh3_zsrt139d558_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d558.mem 125 13 1 sh3_zsrt139d558_pal.mem 0x158afe76 +59 198092 10240 480 sh3_zsrt139d559_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d559.mem 125 13 1 sh3_zsrt139d559_pal.mem 0x158afe76 +60 198092 10240 480 sh3_zsrt139d560_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d560.mem 377 41 1 sh3_zsrt139d560_pal.mem 0x158afe76 +61 198092 10240 480 sh3_zsrt139d561_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d561.mem 512 56 1 sh3_zsrt139d561_pal.mem 0x158afe76 +62 198092 10240 480 sh3_zsrt139d562_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d562.mem 539 59 1 sh3_zsrt139d562_pal.mem 0x158afe76 +63 198092 10240 480 sh3_zsrt139d563_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d563.mem 53 5 1 sh3_zsrt139d563_pal.mem 0x158afe76 +64 198092 10240 480 sh3_zsrt139d564_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d564.mem 53 5 1 sh3_zsrt139d564_pal.mem 0x158afe76 +65 198092 10240 480 sh3_zsrt139d565_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d565.mem 71 7 1 sh3_zsrt139d565_pal.mem 0x158afe76 +66 198092 10240 480 sh3_zsrt139d566_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d566.mem 161 17 1 sh3_zsrt139d566_pal.mem 0x158afe76 +67 198092 10240 480 sh3_zsrt139d567_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d567.mem 206 22 1 sh3_zsrt139d567_pal.mem 0x158afe76 +68 198092 10240 480 sh3_zsrt139d568_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d568.mem 89 9 1 sh3_zsrt139d568_pal.mem 0x158afe76 +69 198092 10240 480 sh3_zsrt139d569_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d569.mem 89 9 1 sh3_zsrt139d569_pal.mem 0x158afe76 +70 198092 10240 480 sh3_zsrt139d570_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d570.mem 143 15 1 sh3_zsrt139d570_pal.mem 0x158afe76 +71 198092 10240 480 sh3_zsrt139d571_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d571.mem 368 40 1 sh3_zsrt139d571_pal.mem 0x158afe76 +72 198092 10240 480 sh3_zsrt139d572_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d572.mem 80 8 1 sh3_zsrt139d572_pal.mem 0x158afe76 +73 198092 10240 480 sh3_zsrt139d573_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d573.mem 152 16 1 sh3_zsrt139d573_pal.mem 0x158afe76 +74 198092 10240 480 sh3_zsrt139d574_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d574.mem 314 34 1 sh3_zsrt139d574_pal.mem 0x158afe76 +75 198092 10240 480 sh3_zsrt139d575_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d575.mem 116 12 1 sh3_zsrt139d575_pal.mem 0x158afe76 +76 198092 10240 480 sh3_zsrt139d576_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d576.mem 197 21 1 sh3_zsrt139d576_pal.mem 0x158afe76 +77 198092 10240 480 sh3_zsrt139d577_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d577.mem 143 15 1 sh3_zsrt139d577_pal.mem 0x158afe76 +78 198092 10240 480 sh3_zsrt139d578_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d578.mem 503 55 1 sh3_zsrt139d578_pal.mem 0x158afe76 +79 198092 10240 480 sh3_zsrt139d579_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d579.mem 449 49 1 sh3_zsrt139d579_pal.mem 0x158afe76 +80 198092 10240 480 sh3_zsrt139d580_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d580.mem 395 43 1 sh3_zsrt139d580_pal.mem 0x158afe76 +81 198092 10240 480 sh3_zsrt139d581_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d581.mem 413 45 1 sh3_zsrt139d581_pal.mem 0x158afe76 +82 198092 10240 480 sh3_zsrt139d582_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d582.mem 449 49 1 sh3_zsrt139d582_pal.mem 0x158afe76 +83 198092 10240 480 sh3_zsrt139d583_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d583.mem 584 64 1 sh3_zsrt139d583_pal.mem 0x158afe76 +84 198092 10240 480 sh3_zsrt139d584_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d584.mem 125 13 1 sh3_zsrt139d584_pal.mem 0x158afe76 +85 198092 10240 480 sh3_zsrt139d585_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d585.mem 80 8 1 sh3_zsrt139d585_pal.mem 0x158afe76 +86 198092 10240 480 sh3_zsrt139d586_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d586.mem 152 16 1 sh3_zsrt139d586_pal.mem 0x158afe76 +87 198092 10240 480 sh3_zsrt139d587_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d587.mem 107 11 1 sh3_zsrt139d587_pal.mem 0x158afe76 +88 198092 10240 480 sh3_zsrt139d588_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d588.mem 98 10 1 sh3_zsrt139d588_pal.mem 0x158afe76 +89 198092 10240 480 sh3_zsrt139d589_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d589.mem 152 16 1 sh3_zsrt139d589_pal.mem 0x158afe76 +90 198092 10240 480 sh3_zsrt139d590_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d590.mem 314 34 1 sh3_zsrt139d590_pal.mem 0x158afe76 +91 198092 10240 480 sh3_zsrt139d591_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d591.mem 53 5 1 sh3_zsrt139d591_pal.mem 0x158afe76 +92 198092 10240 480 sh3_zsrt139d592_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d592.mem 62 6 1 sh3_zsrt139d592_pal.mem 0x158afe76 +93 198092 10240 480 sh3_zsrt139d593_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d593.mem 152 16 1 sh3_zsrt139d593_pal.mem 0x158afe76 +94 198092 10240 480 sh3_zsrt139d594_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d594.mem 197 21 1 sh3_zsrt139d594_pal.mem 0x158afe76 +95 198092 10240 480 sh3_zsrt139d595_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d595.mem 287 31 1 sh3_zsrt139d595_pal.mem 0x158afe76 +96 198092 10240 480 sh3_zsrt139d596_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d596.mem 566 62 1 sh3_zsrt139d596_pal.mem 0x158afe76 +97 198092 10240 480 sh3_zsrt139d597_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d597.mem 980 108 1 sh3_zsrt139d597_pal.mem 0x158afe76 +98 198092 10240 480 sh3_zsrt139d598_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d598.mem 107 11 1 sh3_zsrt139d598_pal.mem 0x158afe76 +99 198092 10240 480 sh3_zsrt139d599_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d599.mem 602 66 1 sh3_zsrt139d599_pal.mem 0x158afe76 +100 198092 10240 480 sh3_zsrt139d5100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5100.mem 377 41 1 sh3_zsrt139d5100_pal.mem 0x158afe76 +101 198092 10240 480 sh3_zsrt139d5101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5101.mem 89 9 1 sh3_zsrt139d5101_pal.mem 0x158afe76 +102 198092 10240 480 sh3_zsrt139d5102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5102.mem 152 16 1 sh3_zsrt139d5102_pal.mem 0x158afe76 +103 198092 10240 480 sh3_zsrt139d5103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5103.mem 305 33 1 sh3_zsrt139d5103_pal.mem 0x158afe76 +104 198092 10240 480 sh3_zsrt139d5104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5104.mem 98 10 1 sh3_zsrt139d5104_pal.mem 0x158afe76 +105 198092 10240 480 sh3_zsrt139d5105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5105.mem 71 7 1 sh3_zsrt139d5105_pal.mem 0x158afe76 +106 198092 10240 480 sh3_zsrt139d5106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5106.mem 71 7 1 sh3_zsrt139d5106_pal.mem 0x158afe76 +107 198092 10240 480 sh3_zsrt139d5107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5107.mem 80 8 1 sh3_zsrt139d5107_pal.mem 0x158afe76 +108 198092 10240 480 sh3_zsrt139d5108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5108.mem 179 19 1 sh3_zsrt139d5108_pal.mem 0x158afe76 +109 198092 10240 480 sh3_zsrt139d5109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5109.mem 251 27 1 sh3_zsrt139d5109_pal.mem 0x158afe76 +110 198092 10240 480 sh3_zsrt139d5110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5110.mem 278 30 1 sh3_zsrt139d5110_pal.mem 0x158afe76 +111 198092 10240 480 sh3_zsrt139d5111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5111.mem 125 13 1 sh3_zsrt139d5111_pal.mem 0x158afe76 +112 198092 10240 480 sh3_zsrt139d5112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5112.mem 251 27 1 sh3_zsrt139d5112_pal.mem 0x158afe76 +113 198092 10240 480 sh3_zsrt139d5113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5113.mem 449 49 1 sh3_zsrt139d5113_pal.mem 0x158afe76 +114 198092 10240 480 sh3_zsrt139d5114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5114.mem 125 13 1 sh3_zsrt139d5114_pal.mem 0x158afe76 +115 198092 10240 480 sh3_zsrt139d5115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5115.mem 71 7 1 sh3_zsrt139d5115_pal.mem 0x158afe76 +116 198092 10240 480 sh3_zsrt139d5116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5116.mem 53 5 1 sh3_zsrt139d5116_pal.mem 0x158afe76 +117 198092 10240 480 sh3_zsrt139d5117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5117.mem 53 5 1 sh3_zsrt139d5117_pal.mem 0x158afe76 +118 198092 10240 480 sh3_zsrt139d5118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5118.mem 44 4 1 sh3_zsrt139d5118_pal.mem 0x158afe76 +119 198092 10240 480 sh3_zsrt139d5119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5119.mem 44 4 1 sh3_zsrt139d5119_pal.mem 0x158afe76 +120 198092 10240 480 sh3_zsrt139d5120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5120.mem 98 10 1 sh3_zsrt139d5120_pal.mem 0x158afe76 +121 198092 10240 480 sh3_zsrt139d5121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5121.mem 80 8 1 sh3_zsrt139d5121_pal.mem 0x158afe76 +122 198092 10240 480 sh3_zsrt139d5122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5122.mem 62 6 1 sh3_zsrt139d5122_pal.mem 0x158afe76 +123 198092 10240 480 sh3_zsrt139d5123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5123.mem 80 8 1 sh3_zsrt139d5123_pal.mem 0x158afe76 +124 198092 10240 480 sh3_zsrt139d5124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5124.mem 107 11 1 sh3_zsrt139d5124_pal.mem 0x158afe76 +125 198092 10240 480 sh3_zsrt139d5125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5125.mem 206 22 1 sh3_zsrt139d5125_pal.mem 0x158afe76 +126 198092 10240 480 sh3_zsrt139d5126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5126.mem 719 79 1 sh3_zsrt139d5126_pal.mem 0x158afe76 +127 198092 10240 480 sh3_zsrt139d5127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5127.mem 494 54 1 sh3_zsrt139d5127_pal.mem 0x158afe76 +128 198092 10240 480 sh3_zsrt139d5128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5128.mem 89 9 1 sh3_zsrt139d5128_pal.mem 0x158afe76 +129 198092 10240 480 sh3_zsrt139d5129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5129.mem 179 19 1 sh3_zsrt139d5129_pal.mem 0x158afe76 +130 198092 10240 480 sh3_zsrt139d5130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5130.mem 242 26 1 sh3_zsrt139d5130_pal.mem 0x158afe76 +131 198092 10240 480 sh3_zsrt139d5131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5131.mem 89 9 1 sh3_zsrt139d5131_pal.mem 0x158afe76 +132 198092 10240 480 sh3_zsrt139d5132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5132.mem 80 8 1 sh3_zsrt139d5132_pal.mem 0x158afe76 +133 198092 10240 480 sh3_zsrt139d5133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5133.mem 170 18 1 sh3_zsrt139d5133_pal.mem 0x158afe76 +134 198092 10240 480 sh3_zsrt139d5134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5134.mem 143 15 1 sh3_zsrt139d5134_pal.mem 0x158afe76 +135 198092 10240 480 sh3_zsrt139d5135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5135.mem 80 8 1 sh3_zsrt139d5135_pal.mem 0x158afe76 +136 198092 10240 480 sh3_zsrt139d5136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5136.mem 62 6 1 sh3_zsrt139d5136_pal.mem 0x158afe76 +137 198092 10240 480 sh3_zsrt139d5137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5137.mem 125 13 1 sh3_zsrt139d5137_pal.mem 0x158afe76 +138 198092 10240 480 sh3_zsrt139d5138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5138.mem 197 21 1 sh3_zsrt139d5138_pal.mem 0x158afe76 +139 198092 10240 480 sh3_zsrt139d5139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5139.mem 188 20 1 sh3_zsrt139d5139_pal.mem 0x158afe76 +140 198092 10240 480 sh3_zsrt139d5140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5140.mem 62 6 1 sh3_zsrt139d5140_pal.mem 0x158afe76 +141 198092 10240 480 sh3_zsrt139d5141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5141.mem 44 4 1 sh3_zsrt139d5141_pal.mem 0x158afe76 +142 198092 10240 480 sh3_zsrt139d5142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5142.mem 44 4 1 sh3_zsrt139d5142_pal.mem 0x158afe76 +143 198092 10240 480 sh3_zsrt139d5143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5143.mem 35 3 1 sh3_zsrt139d5143_pal.mem 0x158afe76 +144 198092 10240 480 sh3_zsrt139d5144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5144.mem 44 4 1 sh3_zsrt139d5144_pal.mem 0x158afe76 +145 198092 10240 480 sh3_zsrt139d5145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5145.mem 62 6 1 sh3_zsrt139d5145_pal.mem 0x158afe76 +146 198092 10240 480 sh3_zsrt139d5146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5146.mem 98 10 1 sh3_zsrt139d5146_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139d6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d6_epochs.txt new file mode 100644 index 0000000..d67bcee --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139d6_epochs.txt @@ -0,0 +1,437 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d5'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 434 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139d60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d60.mem 494 54 0 sh3_zsrt139d60_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139d61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d61.mem 1061 117 0 sh3_zsrt139d61_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139d62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d62.mem 530 58 1 sh3_zsrt139d62_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139d63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d63.mem 782 86 0 sh3_zsrt139d63_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139d64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d64.mem 1232 136 0 sh3_zsrt139d64_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139d65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d65.mem 1232 136 1 sh3_zsrt139d65_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139d66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d66.mem 764 84 1 sh3_zsrt139d66_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139d67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d67.mem 1232 136 1 sh3_zsrt139d67_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139d68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d68.mem 710 78 1 sh3_zsrt139d68_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139d69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d69.mem 1232 136 1 sh3_zsrt139d69_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139d610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d610.mem 1232 136 1 sh3_zsrt139d610_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139d611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d611.mem 953 105 1 sh3_zsrt139d611_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139d612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d612.mem 1232 136 1 sh3_zsrt139d612_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139d613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d613.mem 1097 121 1 sh3_zsrt139d613_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139d614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d614.mem 170 18 1 sh3_zsrt139d614_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139d615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d615.mem 62 6 0 sh3_zsrt139d615_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139d616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d616.mem 620 68 0 sh3_zsrt139d616_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139d617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d617.mem 620 68 0 sh3_zsrt139d617_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139d618_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d618.mem 620 68 0 sh3_zsrt139d618_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139d619_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d619.mem 620 68 0 sh3_zsrt139d619_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139d620_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d620.mem 1844 204 0 sh3_zsrt139d620_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139d621_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d621.mem 1844 204 1 sh3_zsrt139d621_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139d622_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d622.mem 1844 204 1 sh3_zsrt139d622_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139d623_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d623.mem 1844 204 1 sh3_zsrt139d623_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139d624_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d624.mem 1844 204 1 sh3_zsrt139d624_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139d625_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d625.mem 1844 204 1 sh3_zsrt139d625_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139d626_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d626.mem 1844 204 1 sh3_zsrt139d626_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139d627_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d627.mem 1844 204 1 sh3_zsrt139d627_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139d628_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d628.mem 1142 126 0 sh3_zsrt139d628_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139d629_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d629.mem 1178 130 1 sh3_zsrt139d629_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139d630_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d630.mem 1106 122 1 sh3_zsrt139d630_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139d631_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d631.mem 1070 118 0 sh3_zsrt139d631_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139d632_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d632.mem 998 110 1 sh3_zsrt139d632_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139d633_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d633.mem 1070 118 1 sh3_zsrt139d633_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139d634_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d634.mem 782 86 0 sh3_zsrt139d634_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139d635_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d635.mem 782 86 1 sh3_zsrt139d635_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139d636_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d636.mem 746 82 1 sh3_zsrt139d636_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139d637_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d637.mem 1070 118 0 sh3_zsrt139d637_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139d638_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d638.mem 1034 114 1 sh3_zsrt139d638_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139d639_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d639.mem 1106 122 1 sh3_zsrt139d639_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139d640_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d640.mem 1142 126 0 sh3_zsrt139d640_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139d641_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d641.mem 1034 114 1 sh3_zsrt139d641_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139d642_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d642.mem 1070 118 1 sh3_zsrt139d642_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139d643_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d643.mem 1142 126 1 sh3_zsrt139d643_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139d644_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d644.mem 1106 122 1 sh3_zsrt139d644_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139d645_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d645.mem 1070 118 1 sh3_zsrt139d645_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139d646_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d646.mem 1070 118 1 sh3_zsrt139d646_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139d647_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d647.mem 1358 150 1 sh3_zsrt139d647_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139d648_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d648.mem 998 110 0 sh3_zsrt139d648_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139d649_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d649.mem 890 98 1 sh3_zsrt139d649_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139d650_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d650.mem 890 98 1 sh3_zsrt139d650_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139d651_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d651.mem 962 106 1 sh3_zsrt139d651_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139d652_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d652.mem 926 102 1 sh3_zsrt139d652_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139d653_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d653.mem 962 106 1 sh3_zsrt139d653_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139d654_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d654.mem 962 106 1 sh3_zsrt139d654_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139d655_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d655.mem 1034 114 1 sh3_zsrt139d655_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139d656_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d656.mem 890 98 1 sh3_zsrt139d656_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139d657_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d657.mem 962 106 1 sh3_zsrt139d657_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139d658_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d658.mem 566 62 1 sh3_zsrt139d658_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139d659_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d659.mem 1178 130 0 sh3_zsrt139d659_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139d660_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d660.mem 1070 118 1 sh3_zsrt139d660_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139d661_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d661.mem 1070 118 1 sh3_zsrt139d661_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139d662_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d662.mem 1250 138 1 sh3_zsrt139d662_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139d663_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d663.mem 710 78 1 sh3_zsrt139d663_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139d664_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d664.mem 1142 126 1 sh3_zsrt139d664_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139d665_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d665.mem 1178 130 1 sh3_zsrt139d665_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139d666_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d666.mem 1106 122 1 sh3_zsrt139d666_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139d667_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d667.mem 1142 126 1 sh3_zsrt139d667_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139d668_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d668.mem 530 58 1 sh3_zsrt139d668_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139d669_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d669.mem 1322 146 0 sh3_zsrt139d669_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139d670_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d670.mem 674 74 1 sh3_zsrt139d670_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139d671_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d671.mem 602 66 1 sh3_zsrt139d671_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139d672_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d672.mem 458 50 1 sh3_zsrt139d672_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139d673_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d673.mem 1214 134 0 sh3_zsrt139d673_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139d674_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d674.mem 1376 152 1 sh3_zsrt139d674_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139d675_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d675.mem 17 1 0 sh3_zsrt139d675_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139d676_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d676.mem 17 1 1 sh3_zsrt139d676_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139d677_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d677.mem 17 1 1 sh3_zsrt139d677_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139d678_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d678.mem 17 1 1 sh3_zsrt139d678_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139d679_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d679.mem 17 1 1 sh3_zsrt139d679_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139d680_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d680.mem 17 1 1 sh3_zsrt139d680_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139d681_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d681.mem 17 1 1 sh3_zsrt139d681_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139d682_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d682.mem 17 1 1 sh3_zsrt139d682_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139d683_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d683.mem 17 1 1 sh3_zsrt139d683_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139d684_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d684.mem 17 1 1 sh3_zsrt139d684_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139d685_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d685.mem 17 1 1 sh3_zsrt139d685_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139d686_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d686.mem 17 1 1 sh3_zsrt139d686_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139d687_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d687.mem 17 1 1 sh3_zsrt139d687_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139d688_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d688.mem 17 1 1 sh3_zsrt139d688_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139d689_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d689.mem 17 1 1 sh3_zsrt139d689_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139d690_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d690.mem 17 1 1 sh3_zsrt139d690_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139d691_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d691.mem 17 1 1 sh3_zsrt139d691_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139d692_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d692.mem 17 1 1 sh3_zsrt139d692_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139d693_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d693.mem 17 1 1 sh3_zsrt139d693_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139d694_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d694.mem 17 1 1 sh3_zsrt139d694_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139d695_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d695.mem 17 1 1 sh3_zsrt139d695_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139d696_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d696.mem 17 1 1 sh3_zsrt139d696_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139d697_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d697.mem 17 1 1 sh3_zsrt139d697_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139d698_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d698.mem 17 1 1 sh3_zsrt139d698_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139d699_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d699.mem 17 1 1 sh3_zsrt139d699_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139d6100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6100.mem 17 1 1 sh3_zsrt139d6100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139d6101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6101.mem 17 1 1 sh3_zsrt139d6101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139d6102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6102.mem 17 1 1 sh3_zsrt139d6102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139d6103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6103.mem 17 1 1 sh3_zsrt139d6103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139d6104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6104.mem 17 1 1 sh3_zsrt139d6104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139d6105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6105.mem 17 1 1 sh3_zsrt139d6105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139d6106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6106.mem 17 1 1 sh3_zsrt139d6106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139d6107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6107.mem 17 1 1 sh3_zsrt139d6107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139d6108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6108.mem 17 1 1 sh3_zsrt139d6108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139d6109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6109.mem 17 1 1 sh3_zsrt139d6109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139d6110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6110.mem 17 1 1 sh3_zsrt139d6110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139d6111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6111.mem 17 1 1 sh3_zsrt139d6111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139d6112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6112.mem 17 1 1 sh3_zsrt139d6112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139d6113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6113.mem 17 1 1 sh3_zsrt139d6113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139d6114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6114.mem 17 1 1 sh3_zsrt139d6114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139d6115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6115.mem 17 1 1 sh3_zsrt139d6115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139d6116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6116.mem 17 1 1 sh3_zsrt139d6116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139d6117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6117.mem 17 1 1 sh3_zsrt139d6117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139d6118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6118.mem 17 1 1 sh3_zsrt139d6118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139d6119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6119.mem 17 1 1 sh3_zsrt139d6119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139d6120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6120.mem 17 1 1 sh3_zsrt139d6120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139d6121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6121.mem 17 1 1 sh3_zsrt139d6121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139d6122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6122.mem 17 1 1 sh3_zsrt139d6122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139d6123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6123.mem 17 1 1 sh3_zsrt139d6123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139d6124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6124.mem 17 1 1 sh3_zsrt139d6124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139d6125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6125.mem 17 1 1 sh3_zsrt139d6125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139d6126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6126.mem 17 1 1 sh3_zsrt139d6126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139d6127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6127.mem 17 1 1 sh3_zsrt139d6127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139d6128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6128.mem 17 1 1 sh3_zsrt139d6128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139d6129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6129.mem 17 1 1 sh3_zsrt139d6129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139d6130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6130.mem 17 1 1 sh3_zsrt139d6130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139d6131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6131.mem 17 1 1 sh3_zsrt139d6131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139d6132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6132.mem 17 1 1 sh3_zsrt139d6132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139d6133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6133.mem 17 1 1 sh3_zsrt139d6133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139d6134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6134.mem 17 1 1 sh3_zsrt139d6134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139d6135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6135.mem 17 1 1 sh3_zsrt139d6135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139d6136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6136.mem 17 1 1 sh3_zsrt139d6136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139d6137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6137.mem 17 1 1 sh3_zsrt139d6137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139d6138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6138.mem 17 1 1 sh3_zsrt139d6138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139d6139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6139.mem 17 1 1 sh3_zsrt139d6139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139d6140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6140.mem 17 1 1 sh3_zsrt139d6140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139d6141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6141.mem 17 1 1 sh3_zsrt139d6141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139d6142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6142.mem 17 1 1 sh3_zsrt139d6142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139d6143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6143.mem 17 1 1 sh3_zsrt139d6143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139d6144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6144.mem 17 1 1 sh3_zsrt139d6144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139d6145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6145.mem 17 1 1 sh3_zsrt139d6145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139d6146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6146.mem 17 1 1 sh3_zsrt139d6146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139d6147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6147.mem 17 1 1 sh3_zsrt139d6147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139d6148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6148.mem 17 1 1 sh3_zsrt139d6148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139d6149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6149.mem 17 1 1 sh3_zsrt139d6149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139d6150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6150.mem 17 1 1 sh3_zsrt139d6150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139d6151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6151.mem 17 1 1 sh3_zsrt139d6151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139d6152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6152.mem 17 1 1 sh3_zsrt139d6152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139d6153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6153.mem 17 1 1 sh3_zsrt139d6153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139d6154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6154.mem 17 1 1 sh3_zsrt139d6154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139d6155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6155.mem 17 1 1 sh3_zsrt139d6155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139d6156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6156.mem 17 1 1 sh3_zsrt139d6156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139d6157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6157.mem 17 1 1 sh3_zsrt139d6157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139d6158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6158.mem 17 1 1 sh3_zsrt139d6158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139d6159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6159.mem 17 1 1 sh3_zsrt139d6159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139d6160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6160.mem 17 1 1 sh3_zsrt139d6160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139d6161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6161.mem 17 1 1 sh3_zsrt139d6161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139d6162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6162.mem 17 1 1 sh3_zsrt139d6162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139d6163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6163.mem 17 1 1 sh3_zsrt139d6163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139d6164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6164.mem 17 1 1 sh3_zsrt139d6164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139d6165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6165.mem 17 1 1 sh3_zsrt139d6165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139d6166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6166.mem 17 1 1 sh3_zsrt139d6166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139d6167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6167.mem 17 1 1 sh3_zsrt139d6167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139d6168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6168.mem 17 1 1 sh3_zsrt139d6168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139d6169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6169.mem 17 1 1 sh3_zsrt139d6169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139d6170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6170.mem 17 1 1 sh3_zsrt139d6170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139d6171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6171.mem 17 1 1 sh3_zsrt139d6171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139d6172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6172.mem 17 1 1 sh3_zsrt139d6172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139d6173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6173.mem 17 1 1 sh3_zsrt139d6173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139d6174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6174.mem 17 1 1 sh3_zsrt139d6174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139d6175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6175.mem 17 1 1 sh3_zsrt139d6175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139d6176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6176.mem 17 1 1 sh3_zsrt139d6176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139d6177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6177.mem 17 1 1 sh3_zsrt139d6177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139d6178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6178.mem 17 1 1 sh3_zsrt139d6178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139d6179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6179.mem 17 1 1 sh3_zsrt139d6179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139d6180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6180.mem 17 1 1 sh3_zsrt139d6180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139d6181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6181.mem 17 1 1 sh3_zsrt139d6181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139d6182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6182.mem 17 1 1 sh3_zsrt139d6182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139d6183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6183.mem 17 1 1 sh3_zsrt139d6183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139d6184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6184.mem 17 1 1 sh3_zsrt139d6184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139d6185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6185.mem 17 1 1 sh3_zsrt139d6185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139d6186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6186.mem 17 1 1 sh3_zsrt139d6186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139d6187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6187.mem 17 1 1 sh3_zsrt139d6187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139d6188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6188.mem 17 1 1 sh3_zsrt139d6188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139d6189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6189.mem 17 1 1 sh3_zsrt139d6189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139d6190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6190.mem 17 1 1 sh3_zsrt139d6190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139d6191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6191.mem 17 1 1 sh3_zsrt139d6191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139d6192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6192.mem 17 1 1 sh3_zsrt139d6192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139d6193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6193.mem 17 1 1 sh3_zsrt139d6193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139d6194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6194.mem 17 1 1 sh3_zsrt139d6194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139d6195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6195.mem 17 1 1 sh3_zsrt139d6195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139d6196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6196.mem 17 1 1 sh3_zsrt139d6196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139d6197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6197.mem 17 1 1 sh3_zsrt139d6197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139d6198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6198.mem 17 1 1 sh3_zsrt139d6198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139d6199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6199.mem 17 1 1 sh3_zsrt139d6199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139d6200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6200.mem 17 1 1 sh3_zsrt139d6200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139d6201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6201.mem 17 1 1 sh3_zsrt139d6201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139d6202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6202.mem 17 1 1 sh3_zsrt139d6202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139d6203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6203.mem 17 1 1 sh3_zsrt139d6203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139d6204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6204.mem 17 1 1 sh3_zsrt139d6204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139d6205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6205.mem 17 1 1 sh3_zsrt139d6205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139d6206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6206.mem 17 1 1 sh3_zsrt139d6206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139d6207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6207.mem 17 1 1 sh3_zsrt139d6207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139d6208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6208.mem 17 1 1 sh3_zsrt139d6208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139d6209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6209.mem 17 1 1 sh3_zsrt139d6209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139d6210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6210.mem 17 1 1 sh3_zsrt139d6210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139d6211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6211.mem 17 1 1 sh3_zsrt139d6211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139d6212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6212.mem 17 1 1 sh3_zsrt139d6212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139d6213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6213.mem 17 1 1 sh3_zsrt139d6213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139d6214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6214.mem 17 1 1 sh3_zsrt139d6214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139d6215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6215.mem 17 1 1 sh3_zsrt139d6215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139d6216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6216.mem 17 1 1 sh3_zsrt139d6216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139d6217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6217.mem 17 1 1 sh3_zsrt139d6217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139d6218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6218.mem 17 1 1 sh3_zsrt139d6218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139d6219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6219.mem 17 1 1 sh3_zsrt139d6219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139d6220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6220.mem 17 1 1 sh3_zsrt139d6220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139d6221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6221.mem 17 1 1 sh3_zsrt139d6221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139d6222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6222.mem 17 1 1 sh3_zsrt139d6222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139d6223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6223.mem 17 1 1 sh3_zsrt139d6223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139d6224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6224.mem 17 1 1 sh3_zsrt139d6224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139d6225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6225.mem 17 1 1 sh3_zsrt139d6225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139d6226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6226.mem 17 1 1 sh3_zsrt139d6226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139d6227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6227.mem 17 1 1 sh3_zsrt139d6227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139d6228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6228.mem 17 1 1 sh3_zsrt139d6228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139d6229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6229.mem 17 1 1 sh3_zsrt139d6229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139d6230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6230.mem 17 1 1 sh3_zsrt139d6230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139d6231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6231.mem 17 1 1 sh3_zsrt139d6231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139d6232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6232.mem 17 1 1 sh3_zsrt139d6232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139d6233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6233.mem 17 1 1 sh3_zsrt139d6233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139d6234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6234.mem 17 1 1 sh3_zsrt139d6234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139d6235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6235.mem 17 1 1 sh3_zsrt139d6235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139d6236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6236.mem 17 1 1 sh3_zsrt139d6236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139d6237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6237.mem 17 1 1 sh3_zsrt139d6237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139d6238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6238.mem 17 1 1 sh3_zsrt139d6238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139d6239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6239.mem 17 1 1 sh3_zsrt139d6239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139d6240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6240.mem 17 1 1 sh3_zsrt139d6240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139d6241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6241.mem 17 1 1 sh3_zsrt139d6241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139d6242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6242.mem 17 1 1 sh3_zsrt139d6242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139d6243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6243.mem 17 1 1 sh3_zsrt139d6243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139d6244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6244.mem 17 1 1 sh3_zsrt139d6244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139d6245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6245.mem 17 1 1 sh3_zsrt139d6245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139d6246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6246.mem 17 1 1 sh3_zsrt139d6246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139d6247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6247.mem 17 1 1 sh3_zsrt139d6247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139d6248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6248.mem 17 1 1 sh3_zsrt139d6248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139d6249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6249.mem 17 1 1 sh3_zsrt139d6249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139d6250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6250.mem 17 1 1 sh3_zsrt139d6250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139d6251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6251.mem 17 1 1 sh3_zsrt139d6251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139d6252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6252.mem 17 1 1 sh3_zsrt139d6252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139d6253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6253.mem 17 1 1 sh3_zsrt139d6253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139d6254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6254.mem 17 1 1 sh3_zsrt139d6254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139d6255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6255.mem 17 1 1 sh3_zsrt139d6255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139d6256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6256.mem 17 1 1 sh3_zsrt139d6256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139d6257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6257.mem 17 1 1 sh3_zsrt139d6257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139d6258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6258.mem 17 1 1 sh3_zsrt139d6258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139d6259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6259.mem 17 1 1 sh3_zsrt139d6259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139d6260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6260.mem 17 1 1 sh3_zsrt139d6260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139d6261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6261.mem 17 1 1 sh3_zsrt139d6261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139d6262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6262.mem 17 1 1 sh3_zsrt139d6262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139d6263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6263.mem 17 1 1 sh3_zsrt139d6263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139d6264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6264.mem 17 1 1 sh3_zsrt139d6264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139d6265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6265.mem 17 1 1 sh3_zsrt139d6265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139d6266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6266.mem 17 1 1 sh3_zsrt139d6266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139d6267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6267.mem 17 1 1 sh3_zsrt139d6267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139d6268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6268.mem 17 1 1 sh3_zsrt139d6268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139d6269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6269.mem 17 1 1 sh3_zsrt139d6269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139d6270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6270.mem 17 1 1 sh3_zsrt139d6270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139d6271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6271.mem 17 1 1 sh3_zsrt139d6271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139d6272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6272.mem 17 1 1 sh3_zsrt139d6272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139d6273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6273.mem 17 1 1 sh3_zsrt139d6273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139d6274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6274.mem 17 1 1 sh3_zsrt139d6274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139d6275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6275.mem 17 1 1 sh3_zsrt139d6275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139d6276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6276.mem 17 1 1 sh3_zsrt139d6276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139d6277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6277.mem 17 1 1 sh3_zsrt139d6277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139d6278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6278.mem 17 1 1 sh3_zsrt139d6278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139d6279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6279.mem 17 1 1 sh3_zsrt139d6279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139d6280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6280.mem 17 1 1 sh3_zsrt139d6280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139d6281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6281.mem 17 1 1 sh3_zsrt139d6281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139d6282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6282.mem 17 1 1 sh3_zsrt139d6282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139d6283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6283.mem 17 1 1 sh3_zsrt139d6283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139d6284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6284.mem 17 1 1 sh3_zsrt139d6284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139d6285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6285.mem 17 1 1 sh3_zsrt139d6285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139d6286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6286.mem 17 1 1 sh3_zsrt139d6286_pal.mem 0x158afe76 +287 198075 10240 480 sh3_zsrt139d6287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6287.mem 485 53 0 sh3_zsrt139d6287_pal.mem 0x158afe76 +288 198092 10240 480 sh3_zsrt139d6288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6288.mem 665 73 1 sh3_zsrt139d6288_pal.mem 0x158afe76 +289 198092 10240 480 sh3_zsrt139d6289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6289.mem 215 23 1 sh3_zsrt139d6289_pal.mem 0x158afe76 +290 198092 10240 480 sh3_zsrt139d6290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6290.mem 458 50 1 sh3_zsrt139d6290_pal.mem 0x158afe76 +291 198092 10240 480 sh3_zsrt139d6291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6291.mem 431 47 1 sh3_zsrt139d6291_pal.mem 0x158afe76 +292 198092 10240 480 sh3_zsrt139d6292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6292.mem 395 43 1 sh3_zsrt139d6292_pal.mem 0x158afe76 +293 198092 10240 480 sh3_zsrt139d6293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6293.mem 206 22 1 sh3_zsrt139d6293_pal.mem 0x158afe76 +294 198092 10240 480 sh3_zsrt139d6294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6294.mem 170 18 1 sh3_zsrt139d6294_pal.mem 0x158afe76 +295 198092 10240 480 sh3_zsrt139d6295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6295.mem 242 26 1 sh3_zsrt139d6295_pal.mem 0x158afe76 +296 198092 10240 480 sh3_zsrt139d6296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6296.mem 359 39 1 sh3_zsrt139d6296_pal.mem 0x158afe76 +297 198092 10240 480 sh3_zsrt139d6297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6297.mem 323 35 1 sh3_zsrt139d6297_pal.mem 0x158afe76 +298 198092 10240 480 sh3_zsrt139d6298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6298.mem 215 23 1 sh3_zsrt139d6298_pal.mem 0x158afe76 +299 198092 10240 480 sh3_zsrt139d6299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6299.mem 314 34 1 sh3_zsrt139d6299_pal.mem 0x158afe76 +300 198092 10240 480 sh3_zsrt139d6300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6300.mem 278 30 1 sh3_zsrt139d6300_pal.mem 0x158afe76 +301 198092 10240 480 sh3_zsrt139d6301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6301.mem 116 12 1 sh3_zsrt139d6301_pal.mem 0x158afe76 +302 198092 10240 480 sh3_zsrt139d6302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6302.mem 197 21 1 sh3_zsrt139d6302_pal.mem 0x158afe76 +303 198092 10240 480 sh3_zsrt139d6303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6303.mem 458 50 1 sh3_zsrt139d6303_pal.mem 0x158afe76 +304 198092 10240 480 sh3_zsrt139d6304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6304.mem 269 29 1 sh3_zsrt139d6304_pal.mem 0x158afe76 +305 198092 10240 480 sh3_zsrt139d6305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6305.mem 206 22 1 sh3_zsrt139d6305_pal.mem 0x158afe76 +306 198092 10240 480 sh3_zsrt139d6306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6306.mem 323 35 1 sh3_zsrt139d6306_pal.mem 0x158afe76 +307 198092 10240 480 sh3_zsrt139d6307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6307.mem 494 54 1 sh3_zsrt139d6307_pal.mem 0x158afe76 +308 198092 10240 480 sh3_zsrt139d6308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6308.mem 566 62 1 sh3_zsrt139d6308_pal.mem 0x158afe76 +309 198092 10240 480 sh3_zsrt139d6309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6309.mem 287 31 1 sh3_zsrt139d6309_pal.mem 0x158afe76 +310 198092 10240 480 sh3_zsrt139d6310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6310.mem 260 28 1 sh3_zsrt139d6310_pal.mem 0x158afe76 +311 198092 10240 480 sh3_zsrt139d6311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6311.mem 89 9 1 sh3_zsrt139d6311_pal.mem 0x158afe76 +312 198092 10240 480 sh3_zsrt139d6312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6312.mem 359 39 1 sh3_zsrt139d6312_pal.mem 0x158afe76 +313 198092 10240 480 sh3_zsrt139d6313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6313.mem 539 59 1 sh3_zsrt139d6313_pal.mem 0x158afe76 +314 198092 10240 480 sh3_zsrt139d6314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6314.mem 323 35 1 sh3_zsrt139d6314_pal.mem 0x158afe76 +315 198092 10240 480 sh3_zsrt139d6315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6315.mem 179 19 1 sh3_zsrt139d6315_pal.mem 0x158afe76 +316 198092 10240 480 sh3_zsrt139d6316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6316.mem 494 54 1 sh3_zsrt139d6316_pal.mem 0x158afe76 +317 198092 10240 480 sh3_zsrt139d6317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6317.mem 431 47 1 sh3_zsrt139d6317_pal.mem 0x158afe76 +318 198092 10240 480 sh3_zsrt139d6318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6318.mem 107 11 1 sh3_zsrt139d6318_pal.mem 0x158afe76 +319 198092 10240 480 sh3_zsrt139d6319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6319.mem 278 30 1 sh3_zsrt139d6319_pal.mem 0x158afe76 +320 198092 10240 480 sh3_zsrt139d6320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6320.mem 413 45 1 sh3_zsrt139d6320_pal.mem 0x158afe76 +321 198092 10240 480 sh3_zsrt139d6321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6321.mem 98 10 1 sh3_zsrt139d6321_pal.mem 0x158afe76 +322 198092 10240 480 sh3_zsrt139d6322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6322.mem 278 30 1 sh3_zsrt139d6322_pal.mem 0x158afe76 +323 198092 10240 480 sh3_zsrt139d6323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6323.mem 62 6 1 sh3_zsrt139d6323_pal.mem 0x158afe76 +324 198092 10240 480 sh3_zsrt139d6324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6324.mem 98 10 1 sh3_zsrt139d6324_pal.mem 0x158afe76 +325 198092 10240 480 sh3_zsrt139d6325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6325.mem 251 27 1 sh3_zsrt139d6325_pal.mem 0x158afe76 +326 198092 10240 480 sh3_zsrt139d6326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6326.mem 215 23 1 sh3_zsrt139d6326_pal.mem 0x158afe76 +327 198092 10240 480 sh3_zsrt139d6327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6327.mem 215 23 1 sh3_zsrt139d6327_pal.mem 0x158afe76 +328 198092 10240 480 sh3_zsrt139d6328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6328.mem 107 11 1 sh3_zsrt139d6328_pal.mem 0x158afe76 +329 198092 10240 480 sh3_zsrt139d6329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6329.mem 152 16 1 sh3_zsrt139d6329_pal.mem 0x158afe76 +330 198092 10240 480 sh3_zsrt139d6330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6330.mem 278 30 1 sh3_zsrt139d6330_pal.mem 0x158afe76 +331 198092 10240 480 sh3_zsrt139d6331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6331.mem 503 55 1 sh3_zsrt139d6331_pal.mem 0x158afe76 +332 198092 10240 480 sh3_zsrt139d6332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6332.mem 62 6 1 sh3_zsrt139d6332_pal.mem 0x158afe76 +333 198092 10240 480 sh3_zsrt139d6333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6333.mem 98 10 1 sh3_zsrt139d6333_pal.mem 0x158afe76 +334 198092 10240 480 sh3_zsrt139d6334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6334.mem 260 28 1 sh3_zsrt139d6334_pal.mem 0x158afe76 +335 198092 10240 480 sh3_zsrt139d6335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6335.mem 116 12 1 sh3_zsrt139d6335_pal.mem 0x158afe76 +336 198092 10240 480 sh3_zsrt139d6336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6336.mem 323 35 1 sh3_zsrt139d6336_pal.mem 0x158afe76 +337 198092 10240 480 sh3_zsrt139d6337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6337.mem 242 26 1 sh3_zsrt139d6337_pal.mem 0x158afe76 +338 198092 10240 480 sh3_zsrt139d6338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6338.mem 233 25 1 sh3_zsrt139d6338_pal.mem 0x158afe76 +339 198092 10240 480 sh3_zsrt139d6339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6339.mem 233 25 1 sh3_zsrt139d6339_pal.mem 0x158afe76 +340 198092 10240 480 sh3_zsrt139d6340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6340.mem 152 16 1 sh3_zsrt139d6340_pal.mem 0x158afe76 +341 198092 10240 480 sh3_zsrt139d6341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6341.mem 449 49 1 sh3_zsrt139d6341_pal.mem 0x158afe76 +342 198092 10240 480 sh3_zsrt139d6342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6342.mem 125 13 1 sh3_zsrt139d6342_pal.mem 0x158afe76 +343 198092 10240 480 sh3_zsrt139d6343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6343.mem 62 6 1 sh3_zsrt139d6343_pal.mem 0x158afe76 +344 198092 10240 480 sh3_zsrt139d6344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6344.mem 53 5 1 sh3_zsrt139d6344_pal.mem 0x158afe76 +345 198092 10240 480 sh3_zsrt139d6345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6345.mem 125 13 1 sh3_zsrt139d6345_pal.mem 0x158afe76 +346 198092 10240 480 sh3_zsrt139d6346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6346.mem 125 13 1 sh3_zsrt139d6346_pal.mem 0x158afe76 +347 198092 10240 480 sh3_zsrt139d6347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6347.mem 377 41 1 sh3_zsrt139d6347_pal.mem 0x158afe76 +348 198092 10240 480 sh3_zsrt139d6348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6348.mem 512 56 1 sh3_zsrt139d6348_pal.mem 0x158afe76 +349 198092 10240 480 sh3_zsrt139d6349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6349.mem 539 59 1 sh3_zsrt139d6349_pal.mem 0x158afe76 +350 198092 10240 480 sh3_zsrt139d6350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6350.mem 53 5 1 sh3_zsrt139d6350_pal.mem 0x158afe76 +351 198092 10240 480 sh3_zsrt139d6351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6351.mem 53 5 1 sh3_zsrt139d6351_pal.mem 0x158afe76 +352 198092 10240 480 sh3_zsrt139d6352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6352.mem 71 7 1 sh3_zsrt139d6352_pal.mem 0x158afe76 +353 198092 10240 480 sh3_zsrt139d6353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6353.mem 161 17 1 sh3_zsrt139d6353_pal.mem 0x158afe76 +354 198092 10240 480 sh3_zsrt139d6354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6354.mem 206 22 1 sh3_zsrt139d6354_pal.mem 0x158afe76 +355 198092 10240 480 sh3_zsrt139d6355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6355.mem 89 9 1 sh3_zsrt139d6355_pal.mem 0x158afe76 +356 198092 10240 480 sh3_zsrt139d6356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6356.mem 89 9 1 sh3_zsrt139d6356_pal.mem 0x158afe76 +357 198092 10240 480 sh3_zsrt139d6357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6357.mem 143 15 1 sh3_zsrt139d6357_pal.mem 0x158afe76 +358 198092 10240 480 sh3_zsrt139d6358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6358.mem 368 40 1 sh3_zsrt139d6358_pal.mem 0x158afe76 +359 198092 10240 480 sh3_zsrt139d6359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6359.mem 80 8 1 sh3_zsrt139d6359_pal.mem 0x158afe76 +360 198092 10240 480 sh3_zsrt139d6360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6360.mem 152 16 1 sh3_zsrt139d6360_pal.mem 0x158afe76 +361 198092 10240 480 sh3_zsrt139d6361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6361.mem 314 34 1 sh3_zsrt139d6361_pal.mem 0x158afe76 +362 198092 10240 480 sh3_zsrt139d6362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6362.mem 116 12 1 sh3_zsrt139d6362_pal.mem 0x158afe76 +363 198092 10240 480 sh3_zsrt139d6363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6363.mem 197 21 1 sh3_zsrt139d6363_pal.mem 0x158afe76 +364 198092 10240 480 sh3_zsrt139d6364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6364.mem 143 15 1 sh3_zsrt139d6364_pal.mem 0x158afe76 +365 198092 10240 480 sh3_zsrt139d6365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6365.mem 503 55 1 sh3_zsrt139d6365_pal.mem 0x158afe76 +366 198092 10240 480 sh3_zsrt139d6366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6366.mem 449 49 1 sh3_zsrt139d6366_pal.mem 0x158afe76 +367 198092 10240 480 sh3_zsrt139d6367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6367.mem 395 43 1 sh3_zsrt139d6367_pal.mem 0x158afe76 +368 198092 10240 480 sh3_zsrt139d6368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6368.mem 413 45 1 sh3_zsrt139d6368_pal.mem 0x158afe76 +369 198092 10240 480 sh3_zsrt139d6369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6369.mem 449 49 1 sh3_zsrt139d6369_pal.mem 0x158afe76 +370 198092 10240 480 sh3_zsrt139d6370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6370.mem 584 64 1 sh3_zsrt139d6370_pal.mem 0x158afe76 +371 198092 10240 480 sh3_zsrt139d6371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6371.mem 125 13 1 sh3_zsrt139d6371_pal.mem 0x158afe76 +372 198092 10240 480 sh3_zsrt139d6372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6372.mem 80 8 1 sh3_zsrt139d6372_pal.mem 0x158afe76 +373 198092 10240 480 sh3_zsrt139d6373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6373.mem 152 16 1 sh3_zsrt139d6373_pal.mem 0x158afe76 +374 198092 10240 480 sh3_zsrt139d6374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6374.mem 107 11 1 sh3_zsrt139d6374_pal.mem 0x158afe76 +375 198092 10240 480 sh3_zsrt139d6375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6375.mem 98 10 1 sh3_zsrt139d6375_pal.mem 0x158afe76 +376 198092 10240 480 sh3_zsrt139d6376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6376.mem 152 16 1 sh3_zsrt139d6376_pal.mem 0x158afe76 +377 198092 10240 480 sh3_zsrt139d6377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6377.mem 314 34 1 sh3_zsrt139d6377_pal.mem 0x158afe76 +378 198092 10240 480 sh3_zsrt139d6378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6378.mem 53 5 1 sh3_zsrt139d6378_pal.mem 0x158afe76 +379 198092 10240 480 sh3_zsrt139d6379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6379.mem 62 6 1 sh3_zsrt139d6379_pal.mem 0x158afe76 +380 198092 10240 480 sh3_zsrt139d6380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6380.mem 152 16 1 sh3_zsrt139d6380_pal.mem 0x158afe76 +381 198092 10240 480 sh3_zsrt139d6381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6381.mem 197 21 1 sh3_zsrt139d6381_pal.mem 0x158afe76 +382 198092 10240 480 sh3_zsrt139d6382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6382.mem 287 31 1 sh3_zsrt139d6382_pal.mem 0x158afe76 +383 198092 10240 480 sh3_zsrt139d6383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6383.mem 566 62 1 sh3_zsrt139d6383_pal.mem 0x158afe76 +384 198092 10240 480 sh3_zsrt139d6384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6384.mem 980 108 1 sh3_zsrt139d6384_pal.mem 0x158afe76 +385 198092 10240 480 sh3_zsrt139d6385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6385.mem 107 11 1 sh3_zsrt139d6385_pal.mem 0x158afe76 +386 198092 10240 480 sh3_zsrt139d6386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6386.mem 602 66 1 sh3_zsrt139d6386_pal.mem 0x158afe76 +387 198092 10240 480 sh3_zsrt139d6387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6387.mem 377 41 1 sh3_zsrt139d6387_pal.mem 0x158afe76 +388 198092 10240 480 sh3_zsrt139d6388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6388.mem 89 9 1 sh3_zsrt139d6388_pal.mem 0x158afe76 +389 198092 10240 480 sh3_zsrt139d6389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6389.mem 152 16 1 sh3_zsrt139d6389_pal.mem 0x158afe76 +390 198092 10240 480 sh3_zsrt139d6390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6390.mem 305 33 1 sh3_zsrt139d6390_pal.mem 0x158afe76 +391 198092 10240 480 sh3_zsrt139d6391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6391.mem 98 10 1 sh3_zsrt139d6391_pal.mem 0x158afe76 +392 198092 10240 480 sh3_zsrt139d6392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6392.mem 71 7 1 sh3_zsrt139d6392_pal.mem 0x158afe76 +393 198092 10240 480 sh3_zsrt139d6393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6393.mem 71 7 1 sh3_zsrt139d6393_pal.mem 0x158afe76 +394 198092 10240 480 sh3_zsrt139d6394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6394.mem 80 8 1 sh3_zsrt139d6394_pal.mem 0x158afe76 +395 198092 10240 480 sh3_zsrt139d6395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6395.mem 179 19 1 sh3_zsrt139d6395_pal.mem 0x158afe76 +396 198092 10240 480 sh3_zsrt139d6396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6396.mem 251 27 1 sh3_zsrt139d6396_pal.mem 0x158afe76 +397 198092 10240 480 sh3_zsrt139d6397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6397.mem 278 30 1 sh3_zsrt139d6397_pal.mem 0x158afe76 +398 198092 10240 480 sh3_zsrt139d6398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6398.mem 125 13 1 sh3_zsrt139d6398_pal.mem 0x158afe76 +399 198092 10240 480 sh3_zsrt139d6399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6399.mem 251 27 1 sh3_zsrt139d6399_pal.mem 0x158afe76 +400 198092 10240 480 sh3_zsrt139d6400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6400.mem 449 49 1 sh3_zsrt139d6400_pal.mem 0x158afe76 +401 198092 10240 480 sh3_zsrt139d6401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6401.mem 125 13 1 sh3_zsrt139d6401_pal.mem 0x158afe76 +402 198092 10240 480 sh3_zsrt139d6402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6402.mem 71 7 1 sh3_zsrt139d6402_pal.mem 0x158afe76 +403 198092 10240 480 sh3_zsrt139d6403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6403.mem 53 5 1 sh3_zsrt139d6403_pal.mem 0x158afe76 +404 198092 10240 480 sh3_zsrt139d6404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6404.mem 53 5 1 sh3_zsrt139d6404_pal.mem 0x158afe76 +405 198092 10240 480 sh3_zsrt139d6405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6405.mem 44 4 1 sh3_zsrt139d6405_pal.mem 0x158afe76 +406 198092 10240 480 sh3_zsrt139d6406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6406.mem 44 4 1 sh3_zsrt139d6406_pal.mem 0x158afe76 +407 198092 10240 480 sh3_zsrt139d6407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6407.mem 98 10 1 sh3_zsrt139d6407_pal.mem 0x158afe76 +408 198092 10240 480 sh3_zsrt139d6408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6408.mem 80 8 1 sh3_zsrt139d6408_pal.mem 0x158afe76 +409 198092 10240 480 sh3_zsrt139d6409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6409.mem 62 6 1 sh3_zsrt139d6409_pal.mem 0x158afe76 +410 198092 10240 480 sh3_zsrt139d6410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6410.mem 80 8 1 sh3_zsrt139d6410_pal.mem 0x158afe76 +411 198092 10240 480 sh3_zsrt139d6411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6411.mem 107 11 1 sh3_zsrt139d6411_pal.mem 0x158afe76 +412 198092 10240 480 sh3_zsrt139d6412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6412.mem 206 22 1 sh3_zsrt139d6412_pal.mem 0x158afe76 +413 198092 10240 480 sh3_zsrt139d6413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6413.mem 719 79 1 sh3_zsrt139d6413_pal.mem 0x158afe76 +414 198092 10240 480 sh3_zsrt139d6414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6414.mem 494 54 1 sh3_zsrt139d6414_pal.mem 0x158afe76 +415 198092 10240 480 sh3_zsrt139d6415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6415.mem 89 9 1 sh3_zsrt139d6415_pal.mem 0x158afe76 +416 198092 10240 480 sh3_zsrt139d6416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6416.mem 179 19 1 sh3_zsrt139d6416_pal.mem 0x158afe76 +417 198092 10240 480 sh3_zsrt139d6417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6417.mem 242 26 1 sh3_zsrt139d6417_pal.mem 0x158afe76 +418 198092 10240 480 sh3_zsrt139d6418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6418.mem 89 9 1 sh3_zsrt139d6418_pal.mem 0x158afe76 +419 198092 10240 480 sh3_zsrt139d6419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6419.mem 80 8 1 sh3_zsrt139d6419_pal.mem 0x158afe76 +420 198092 10240 480 sh3_zsrt139d6420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6420.mem 170 18 1 sh3_zsrt139d6420_pal.mem 0x158afe76 +421 198092 10240 480 sh3_zsrt139d6421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6421.mem 143 15 1 sh3_zsrt139d6421_pal.mem 0x158afe76 +422 198092 10240 480 sh3_zsrt139d6422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6422.mem 80 8 1 sh3_zsrt139d6422_pal.mem 0x158afe76 +423 198092 10240 480 sh3_zsrt139d6423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6423.mem 62 6 1 sh3_zsrt139d6423_pal.mem 0x158afe76 +424 198092 10240 480 sh3_zsrt139d6424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6424.mem 125 13 1 sh3_zsrt139d6424_pal.mem 0x158afe76 +425 198092 10240 480 sh3_zsrt139d6425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6425.mem 197 21 1 sh3_zsrt139d6425_pal.mem 0x158afe76 +426 198092 10240 480 sh3_zsrt139d6426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6426.mem 188 20 1 sh3_zsrt139d6426_pal.mem 0x158afe76 +427 198092 10240 480 sh3_zsrt139d6427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6427.mem 62 6 1 sh3_zsrt139d6427_pal.mem 0x158afe76 +428 198092 10240 480 sh3_zsrt139d6428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6428.mem 44 4 1 sh3_zsrt139d6428_pal.mem 0x158afe76 +429 198092 10240 480 sh3_zsrt139d6429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6429.mem 44 4 1 sh3_zsrt139d6429_pal.mem 0x158afe76 +430 198092 10240 480 sh3_zsrt139d6430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6430.mem 35 3 1 sh3_zsrt139d6430_pal.mem 0x158afe76 +431 198092 10240 480 sh3_zsrt139d6431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6431.mem 44 4 1 sh3_zsrt139d6431_pal.mem 0x158afe76 +432 198092 10240 480 sh3_zsrt139d6432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6432.mem 62 6 1 sh3_zsrt139d6432_pal.mem 0x158afe76 +433 198092 10240 480 sh3_zsrt139d6433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6433.mem 98 10 1 sh3_zsrt139d6433_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139e1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e1_epochs.txt new file mode 100644 index 0000000..d277900 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e1_epochs.txt @@ -0,0 +1,21 @@ +# Ch408 authentic PSMT4 post-process overlay scheduler fixture +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 18 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +1 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +2 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +3 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +4 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +5 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +6 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +7 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +8 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +9 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +10 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +11 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +12 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +13 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +14 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +15 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +16 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +17 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139e2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e2_epochs.txt new file mode 100644 index 0000000..e69d814 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e2_epochs.txt @@ -0,0 +1,455 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139d6', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 452 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139e20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139e20.mem 494 54 0 sh3_zsrt139e20_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139e21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139e21.mem 1061 117 0 sh3_zsrt139e21_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139e22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139e22.mem 530 58 1 sh3_zsrt139e22_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139e23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139e23.mem 782 86 0 sh3_zsrt139e23_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139e24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e24.mem 1232 136 0 sh3_zsrt139e24_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139e25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e25.mem 1232 136 1 sh3_zsrt139e25_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139e26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e26.mem 764 84 1 sh3_zsrt139e26_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139e27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e27.mem 1232 136 1 sh3_zsrt139e27_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139e28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e28.mem 710 78 1 sh3_zsrt139e28_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139e29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e29.mem 1232 136 1 sh3_zsrt139e29_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139e210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e210.mem 1232 136 1 sh3_zsrt139e210_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139e211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e211.mem 953 105 1 sh3_zsrt139e211_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139e212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e212.mem 1232 136 1 sh3_zsrt139e212_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139e213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e213.mem 1097 121 1 sh3_zsrt139e213_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139e214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e214.mem 170 18 1 sh3_zsrt139e214_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139e215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e215.mem 62 6 0 sh3_zsrt139e215_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139e216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139e216.mem 620 68 0 sh3_zsrt139e216_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139e217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139e217.mem 620 68 0 sh3_zsrt139e217_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139e218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139e218.mem 620 68 0 sh3_zsrt139e218_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139e219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139e219.mem 620 68 0 sh3_zsrt139e219_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139e220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e220.mem 1844 204 0 sh3_zsrt139e220_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139e221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e221.mem 1844 204 1 sh3_zsrt139e221_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139e222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e222.mem 1844 204 1 sh3_zsrt139e222_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139e223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e223.mem 1844 204 1 sh3_zsrt139e223_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139e224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e224.mem 1844 204 1 sh3_zsrt139e224_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139e225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e225.mem 1844 204 1 sh3_zsrt139e225_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139e226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e226.mem 1844 204 1 sh3_zsrt139e226_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139e227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139e227.mem 1844 204 1 sh3_zsrt139e227_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139e228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e228.mem 1142 126 0 sh3_zsrt139e228_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139e229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e229.mem 1178 130 1 sh3_zsrt139e229_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139e230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e230.mem 1106 122 1 sh3_zsrt139e230_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139e231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e231.mem 1070 118 0 sh3_zsrt139e231_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139e232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e232.mem 998 110 1 sh3_zsrt139e232_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139e233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e233.mem 1070 118 1 sh3_zsrt139e233_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139e234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e234.mem 782 86 0 sh3_zsrt139e234_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139e235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e235.mem 782 86 1 sh3_zsrt139e235_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139e236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e236.mem 746 82 1 sh3_zsrt139e236_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139e237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e237.mem 1070 118 0 sh3_zsrt139e237_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139e238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e238.mem 1034 114 1 sh3_zsrt139e238_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139e239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e239.mem 1106 122 1 sh3_zsrt139e239_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139e240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e240.mem 1142 126 0 sh3_zsrt139e240_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139e241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e241.mem 1034 114 1 sh3_zsrt139e241_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139e242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e242.mem 1070 118 1 sh3_zsrt139e242_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139e243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e243.mem 1142 126 1 sh3_zsrt139e243_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139e244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e244.mem 1106 122 1 sh3_zsrt139e244_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139e245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e245.mem 1070 118 1 sh3_zsrt139e245_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139e246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e246.mem 1070 118 1 sh3_zsrt139e246_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139e247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139e247.mem 1358 150 1 sh3_zsrt139e247_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139e248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e248.mem 998 110 0 sh3_zsrt139e248_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139e249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e249.mem 890 98 1 sh3_zsrt139e249_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139e250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e250.mem 890 98 1 sh3_zsrt139e250_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139e251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e251.mem 962 106 1 sh3_zsrt139e251_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139e252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e252.mem 926 102 1 sh3_zsrt139e252_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139e253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e253.mem 962 106 1 sh3_zsrt139e253_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139e254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e254.mem 962 106 1 sh3_zsrt139e254_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139e255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e255.mem 1034 114 1 sh3_zsrt139e255_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139e256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e256.mem 890 98 1 sh3_zsrt139e256_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139e257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e257.mem 962 106 1 sh3_zsrt139e257_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139e258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e258.mem 566 62 1 sh3_zsrt139e258_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139e259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e259.mem 1178 130 0 sh3_zsrt139e259_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139e260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e260.mem 1070 118 1 sh3_zsrt139e260_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139e261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e261.mem 1070 118 1 sh3_zsrt139e261_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139e262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e262.mem 1250 138 1 sh3_zsrt139e262_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139e263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e263.mem 710 78 1 sh3_zsrt139e263_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139e264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e264.mem 1142 126 1 sh3_zsrt139e264_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139e265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e265.mem 1178 130 1 sh3_zsrt139e265_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139e266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e266.mem 1106 122 1 sh3_zsrt139e266_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139e267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e267.mem 1142 126 1 sh3_zsrt139e267_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139e268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e268.mem 530 58 1 sh3_zsrt139e268_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139e269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e269.mem 1322 146 0 sh3_zsrt139e269_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139e270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e270.mem 674 74 1 sh3_zsrt139e270_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139e271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e271.mem 602 66 1 sh3_zsrt139e271_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139e272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139e272.mem 458 50 1 sh3_zsrt139e272_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139e273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139e273.mem 1214 134 0 sh3_zsrt139e273_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139e274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139e274.mem 1376 152 1 sh3_zsrt139e274_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139e275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e275.mem 17 1 0 sh3_zsrt139e275_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139e276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e276.mem 17 1 1 sh3_zsrt139e276_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139e277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e277.mem 17 1 1 sh3_zsrt139e277_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139e278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e278.mem 17 1 1 sh3_zsrt139e278_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139e279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e279.mem 17 1 1 sh3_zsrt139e279_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139e280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e280.mem 17 1 1 sh3_zsrt139e280_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139e281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e281.mem 17 1 1 sh3_zsrt139e281_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139e282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e282.mem 17 1 1 sh3_zsrt139e282_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139e283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e283.mem 17 1 1 sh3_zsrt139e283_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139e284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e284.mem 17 1 1 sh3_zsrt139e284_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139e285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e285.mem 17 1 1 sh3_zsrt139e285_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139e286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e286.mem 17 1 1 sh3_zsrt139e286_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139e287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e287.mem 17 1 1 sh3_zsrt139e287_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139e288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e288.mem 17 1 1 sh3_zsrt139e288_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139e289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e289.mem 17 1 1 sh3_zsrt139e289_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139e290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e290.mem 17 1 1 sh3_zsrt139e290_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139e291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e291.mem 17 1 1 sh3_zsrt139e291_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139e292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e292.mem 17 1 1 sh3_zsrt139e292_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139e293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e293.mem 17 1 1 sh3_zsrt139e293_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139e294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e294.mem 17 1 1 sh3_zsrt139e294_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139e295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e295.mem 17 1 1 sh3_zsrt139e295_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139e296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e296.mem 17 1 1 sh3_zsrt139e296_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139e297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e297.mem 17 1 1 sh3_zsrt139e297_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139e298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e298.mem 17 1 1 sh3_zsrt139e298_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139e299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e299.mem 17 1 1 sh3_zsrt139e299_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139e2100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2100.mem 17 1 1 sh3_zsrt139e2100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139e2101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2101.mem 17 1 1 sh3_zsrt139e2101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139e2102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2102.mem 17 1 1 sh3_zsrt139e2102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139e2103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2103.mem 17 1 1 sh3_zsrt139e2103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139e2104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2104.mem 17 1 1 sh3_zsrt139e2104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139e2105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2105.mem 17 1 1 sh3_zsrt139e2105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139e2106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2106.mem 17 1 1 sh3_zsrt139e2106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139e2107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2107.mem 17 1 1 sh3_zsrt139e2107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139e2108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2108.mem 17 1 1 sh3_zsrt139e2108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139e2109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2109.mem 17 1 1 sh3_zsrt139e2109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139e2110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2110.mem 17 1 1 sh3_zsrt139e2110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139e2111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2111.mem 17 1 1 sh3_zsrt139e2111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139e2112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2112.mem 17 1 1 sh3_zsrt139e2112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139e2113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2113.mem 17 1 1 sh3_zsrt139e2113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139e2114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2114.mem 17 1 1 sh3_zsrt139e2114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139e2115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2115.mem 17 1 1 sh3_zsrt139e2115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139e2116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2116.mem 17 1 1 sh3_zsrt139e2116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139e2117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2117.mem 17 1 1 sh3_zsrt139e2117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139e2118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2118.mem 17 1 1 sh3_zsrt139e2118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139e2119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2119.mem 17 1 1 sh3_zsrt139e2119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139e2120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2120.mem 17 1 1 sh3_zsrt139e2120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139e2121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2121.mem 17 1 1 sh3_zsrt139e2121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139e2122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2122.mem 17 1 1 sh3_zsrt139e2122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139e2123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2123.mem 17 1 1 sh3_zsrt139e2123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139e2124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2124.mem 17 1 1 sh3_zsrt139e2124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139e2125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2125.mem 17 1 1 sh3_zsrt139e2125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139e2126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2126.mem 17 1 1 sh3_zsrt139e2126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139e2127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2127.mem 17 1 1 sh3_zsrt139e2127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139e2128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2128.mem 17 1 1 sh3_zsrt139e2128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139e2129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2129.mem 17 1 1 sh3_zsrt139e2129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139e2130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2130.mem 17 1 1 sh3_zsrt139e2130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139e2131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2131.mem 17 1 1 sh3_zsrt139e2131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139e2132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2132.mem 17 1 1 sh3_zsrt139e2132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139e2133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2133.mem 17 1 1 sh3_zsrt139e2133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139e2134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2134.mem 17 1 1 sh3_zsrt139e2134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139e2135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2135.mem 17 1 1 sh3_zsrt139e2135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139e2136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2136.mem 17 1 1 sh3_zsrt139e2136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139e2137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2137.mem 17 1 1 sh3_zsrt139e2137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139e2138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2138.mem 17 1 1 sh3_zsrt139e2138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139e2139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2139.mem 17 1 1 sh3_zsrt139e2139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139e2140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2140.mem 17 1 1 sh3_zsrt139e2140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139e2141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2141.mem 17 1 1 sh3_zsrt139e2141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139e2142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2142.mem 17 1 1 sh3_zsrt139e2142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139e2143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2143.mem 17 1 1 sh3_zsrt139e2143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139e2144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2144.mem 17 1 1 sh3_zsrt139e2144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139e2145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2145.mem 17 1 1 sh3_zsrt139e2145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139e2146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2146.mem 17 1 1 sh3_zsrt139e2146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139e2147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2147.mem 17 1 1 sh3_zsrt139e2147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139e2148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2148.mem 17 1 1 sh3_zsrt139e2148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139e2149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2149.mem 17 1 1 sh3_zsrt139e2149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139e2150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2150.mem 17 1 1 sh3_zsrt139e2150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139e2151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2151.mem 17 1 1 sh3_zsrt139e2151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139e2152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2152.mem 17 1 1 sh3_zsrt139e2152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139e2153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2153.mem 17 1 1 sh3_zsrt139e2153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139e2154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2154.mem 17 1 1 sh3_zsrt139e2154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139e2155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2155.mem 17 1 1 sh3_zsrt139e2155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139e2156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2156.mem 17 1 1 sh3_zsrt139e2156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139e2157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2157.mem 17 1 1 sh3_zsrt139e2157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139e2158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2158.mem 17 1 1 sh3_zsrt139e2158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139e2159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2159.mem 17 1 1 sh3_zsrt139e2159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139e2160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2160.mem 17 1 1 sh3_zsrt139e2160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139e2161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2161.mem 17 1 1 sh3_zsrt139e2161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139e2162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2162.mem 17 1 1 sh3_zsrt139e2162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139e2163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2163.mem 17 1 1 sh3_zsrt139e2163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139e2164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2164.mem 17 1 1 sh3_zsrt139e2164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139e2165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2165.mem 17 1 1 sh3_zsrt139e2165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139e2166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2166.mem 17 1 1 sh3_zsrt139e2166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139e2167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2167.mem 17 1 1 sh3_zsrt139e2167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139e2168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2168.mem 17 1 1 sh3_zsrt139e2168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139e2169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2169.mem 17 1 1 sh3_zsrt139e2169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139e2170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2170.mem 17 1 1 sh3_zsrt139e2170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139e2171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2171.mem 17 1 1 sh3_zsrt139e2171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139e2172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2172.mem 17 1 1 sh3_zsrt139e2172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139e2173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2173.mem 17 1 1 sh3_zsrt139e2173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139e2174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2174.mem 17 1 1 sh3_zsrt139e2174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139e2175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2175.mem 17 1 1 sh3_zsrt139e2175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139e2176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2176.mem 17 1 1 sh3_zsrt139e2176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139e2177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2177.mem 17 1 1 sh3_zsrt139e2177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139e2178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2178.mem 17 1 1 sh3_zsrt139e2178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139e2179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2179.mem 17 1 1 sh3_zsrt139e2179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139e2180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2180.mem 17 1 1 sh3_zsrt139e2180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139e2181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2181.mem 17 1 1 sh3_zsrt139e2181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139e2182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2182.mem 17 1 1 sh3_zsrt139e2182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139e2183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2183.mem 17 1 1 sh3_zsrt139e2183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139e2184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2184.mem 17 1 1 sh3_zsrt139e2184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139e2185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2185.mem 17 1 1 sh3_zsrt139e2185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139e2186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2186.mem 17 1 1 sh3_zsrt139e2186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139e2187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2187.mem 17 1 1 sh3_zsrt139e2187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139e2188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2188.mem 17 1 1 sh3_zsrt139e2188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139e2189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2189.mem 17 1 1 sh3_zsrt139e2189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139e2190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2190.mem 17 1 1 sh3_zsrt139e2190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139e2191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2191.mem 17 1 1 sh3_zsrt139e2191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139e2192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2192.mem 17 1 1 sh3_zsrt139e2192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139e2193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2193.mem 17 1 1 sh3_zsrt139e2193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139e2194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2194.mem 17 1 1 sh3_zsrt139e2194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139e2195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2195.mem 17 1 1 sh3_zsrt139e2195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139e2196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2196.mem 17 1 1 sh3_zsrt139e2196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139e2197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2197.mem 17 1 1 sh3_zsrt139e2197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139e2198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2198.mem 17 1 1 sh3_zsrt139e2198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139e2199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2199.mem 17 1 1 sh3_zsrt139e2199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139e2200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2200.mem 17 1 1 sh3_zsrt139e2200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139e2201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2201.mem 17 1 1 sh3_zsrt139e2201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139e2202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2202.mem 17 1 1 sh3_zsrt139e2202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139e2203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2203.mem 17 1 1 sh3_zsrt139e2203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139e2204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2204.mem 17 1 1 sh3_zsrt139e2204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139e2205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2205.mem 17 1 1 sh3_zsrt139e2205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139e2206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2206.mem 17 1 1 sh3_zsrt139e2206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139e2207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2207.mem 17 1 1 sh3_zsrt139e2207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139e2208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2208.mem 17 1 1 sh3_zsrt139e2208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139e2209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2209.mem 17 1 1 sh3_zsrt139e2209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139e2210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2210.mem 17 1 1 sh3_zsrt139e2210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139e2211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2211.mem 17 1 1 sh3_zsrt139e2211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139e2212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2212.mem 17 1 1 sh3_zsrt139e2212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139e2213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2213.mem 17 1 1 sh3_zsrt139e2213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139e2214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2214.mem 17 1 1 sh3_zsrt139e2214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139e2215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2215.mem 17 1 1 sh3_zsrt139e2215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139e2216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2216.mem 17 1 1 sh3_zsrt139e2216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139e2217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2217.mem 17 1 1 sh3_zsrt139e2217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139e2218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2218.mem 17 1 1 sh3_zsrt139e2218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139e2219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2219.mem 17 1 1 sh3_zsrt139e2219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139e2220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2220.mem 17 1 1 sh3_zsrt139e2220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139e2221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2221.mem 17 1 1 sh3_zsrt139e2221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139e2222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2222.mem 17 1 1 sh3_zsrt139e2222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139e2223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2223.mem 17 1 1 sh3_zsrt139e2223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139e2224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2224.mem 17 1 1 sh3_zsrt139e2224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139e2225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2225.mem 17 1 1 sh3_zsrt139e2225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139e2226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2226.mem 17 1 1 sh3_zsrt139e2226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139e2227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2227.mem 17 1 1 sh3_zsrt139e2227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139e2228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2228.mem 17 1 1 sh3_zsrt139e2228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139e2229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2229.mem 17 1 1 sh3_zsrt139e2229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139e2230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2230.mem 17 1 1 sh3_zsrt139e2230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139e2231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2231.mem 17 1 1 sh3_zsrt139e2231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139e2232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2232.mem 17 1 1 sh3_zsrt139e2232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139e2233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2233.mem 17 1 1 sh3_zsrt139e2233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139e2234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2234.mem 17 1 1 sh3_zsrt139e2234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139e2235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2235.mem 17 1 1 sh3_zsrt139e2235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139e2236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2236.mem 17 1 1 sh3_zsrt139e2236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139e2237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2237.mem 17 1 1 sh3_zsrt139e2237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139e2238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2238.mem 17 1 1 sh3_zsrt139e2238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139e2239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2239.mem 17 1 1 sh3_zsrt139e2239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139e2240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2240.mem 17 1 1 sh3_zsrt139e2240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139e2241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2241.mem 17 1 1 sh3_zsrt139e2241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139e2242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2242.mem 17 1 1 sh3_zsrt139e2242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139e2243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2243.mem 17 1 1 sh3_zsrt139e2243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139e2244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2244.mem 17 1 1 sh3_zsrt139e2244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139e2245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2245.mem 17 1 1 sh3_zsrt139e2245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139e2246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2246.mem 17 1 1 sh3_zsrt139e2246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139e2247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2247.mem 17 1 1 sh3_zsrt139e2247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139e2248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2248.mem 17 1 1 sh3_zsrt139e2248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139e2249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2249.mem 17 1 1 sh3_zsrt139e2249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139e2250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2250.mem 17 1 1 sh3_zsrt139e2250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139e2251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2251.mem 17 1 1 sh3_zsrt139e2251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139e2252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2252.mem 17 1 1 sh3_zsrt139e2252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139e2253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2253.mem 17 1 1 sh3_zsrt139e2253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139e2254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2254.mem 17 1 1 sh3_zsrt139e2254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139e2255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2255.mem 17 1 1 sh3_zsrt139e2255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139e2256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2256.mem 17 1 1 sh3_zsrt139e2256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139e2257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2257.mem 17 1 1 sh3_zsrt139e2257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139e2258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2258.mem 17 1 1 sh3_zsrt139e2258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139e2259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2259.mem 17 1 1 sh3_zsrt139e2259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139e2260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2260.mem 17 1 1 sh3_zsrt139e2260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139e2261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2261.mem 17 1 1 sh3_zsrt139e2261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139e2262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2262.mem 17 1 1 sh3_zsrt139e2262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139e2263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2263.mem 17 1 1 sh3_zsrt139e2263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139e2264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2264.mem 17 1 1 sh3_zsrt139e2264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139e2265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2265.mem 17 1 1 sh3_zsrt139e2265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139e2266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2266.mem 17 1 1 sh3_zsrt139e2266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139e2267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2267.mem 17 1 1 sh3_zsrt139e2267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139e2268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2268.mem 17 1 1 sh3_zsrt139e2268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139e2269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2269.mem 17 1 1 sh3_zsrt139e2269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139e2270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2270.mem 17 1 1 sh3_zsrt139e2270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139e2271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2271.mem 17 1 1 sh3_zsrt139e2271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139e2272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2272.mem 17 1 1 sh3_zsrt139e2272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139e2273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2273.mem 17 1 1 sh3_zsrt139e2273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139e2274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2274.mem 17 1 1 sh3_zsrt139e2274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139e2275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2275.mem 17 1 1 sh3_zsrt139e2275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139e2276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2276.mem 17 1 1 sh3_zsrt139e2276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139e2277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2277.mem 17 1 1 sh3_zsrt139e2277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139e2278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2278.mem 17 1 1 sh3_zsrt139e2278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139e2279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2279.mem 17 1 1 sh3_zsrt139e2279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139e2280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2280.mem 17 1 1 sh3_zsrt139e2280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139e2281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2281.mem 17 1 1 sh3_zsrt139e2281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139e2282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2282.mem 17 1 1 sh3_zsrt139e2282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139e2283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2283.mem 17 1 1 sh3_zsrt139e2283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139e2284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2284.mem 17 1 1 sh3_zsrt139e2284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139e2285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2285.mem 17 1 1 sh3_zsrt139e2285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139e2286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2286.mem 17 1 1 sh3_zsrt139e2286_pal.mem 0x158afe76 +287 198075 10240 480 sh3_zsrt139e2287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2287.mem 485 53 0 sh3_zsrt139e2287_pal.mem 0x158afe76 +288 198092 10240 480 sh3_zsrt139e2288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2288.mem 665 73 1 sh3_zsrt139e2288_pal.mem 0x158afe76 +289 198092 10240 480 sh3_zsrt139e2289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2289.mem 215 23 1 sh3_zsrt139e2289_pal.mem 0x158afe76 +290 198092 10240 480 sh3_zsrt139e2290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2290.mem 458 50 1 sh3_zsrt139e2290_pal.mem 0x158afe76 +291 198092 10240 480 sh3_zsrt139e2291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2291.mem 431 47 1 sh3_zsrt139e2291_pal.mem 0x158afe76 +292 198092 10240 480 sh3_zsrt139e2292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2292.mem 395 43 1 sh3_zsrt139e2292_pal.mem 0x158afe76 +293 198092 10240 480 sh3_zsrt139e2293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2293.mem 206 22 1 sh3_zsrt139e2293_pal.mem 0x158afe76 +294 198092 10240 480 sh3_zsrt139e2294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2294.mem 170 18 1 sh3_zsrt139e2294_pal.mem 0x158afe76 +295 198092 10240 480 sh3_zsrt139e2295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2295.mem 242 26 1 sh3_zsrt139e2295_pal.mem 0x158afe76 +296 198092 10240 480 sh3_zsrt139e2296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2296.mem 359 39 1 sh3_zsrt139e2296_pal.mem 0x158afe76 +297 198092 10240 480 sh3_zsrt139e2297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2297.mem 323 35 1 sh3_zsrt139e2297_pal.mem 0x158afe76 +298 198092 10240 480 sh3_zsrt139e2298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2298.mem 215 23 1 sh3_zsrt139e2298_pal.mem 0x158afe76 +299 198092 10240 480 sh3_zsrt139e2299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2299.mem 314 34 1 sh3_zsrt139e2299_pal.mem 0x158afe76 +300 198092 10240 480 sh3_zsrt139e2300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2300.mem 278 30 1 sh3_zsrt139e2300_pal.mem 0x158afe76 +301 198092 10240 480 sh3_zsrt139e2301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2301.mem 116 12 1 sh3_zsrt139e2301_pal.mem 0x158afe76 +302 198092 10240 480 sh3_zsrt139e2302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2302.mem 197 21 1 sh3_zsrt139e2302_pal.mem 0x158afe76 +303 198092 10240 480 sh3_zsrt139e2303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2303.mem 458 50 1 sh3_zsrt139e2303_pal.mem 0x158afe76 +304 198092 10240 480 sh3_zsrt139e2304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2304.mem 269 29 1 sh3_zsrt139e2304_pal.mem 0x158afe76 +305 198092 10240 480 sh3_zsrt139e2305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2305.mem 206 22 1 sh3_zsrt139e2305_pal.mem 0x158afe76 +306 198092 10240 480 sh3_zsrt139e2306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2306.mem 323 35 1 sh3_zsrt139e2306_pal.mem 0x158afe76 +307 198092 10240 480 sh3_zsrt139e2307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2307.mem 494 54 1 sh3_zsrt139e2307_pal.mem 0x158afe76 +308 198092 10240 480 sh3_zsrt139e2308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2308.mem 566 62 1 sh3_zsrt139e2308_pal.mem 0x158afe76 +309 198092 10240 480 sh3_zsrt139e2309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2309.mem 287 31 1 sh3_zsrt139e2309_pal.mem 0x158afe76 +310 198092 10240 480 sh3_zsrt139e2310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2310.mem 260 28 1 sh3_zsrt139e2310_pal.mem 0x158afe76 +311 198092 10240 480 sh3_zsrt139e2311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2311.mem 89 9 1 sh3_zsrt139e2311_pal.mem 0x158afe76 +312 198092 10240 480 sh3_zsrt139e2312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2312.mem 359 39 1 sh3_zsrt139e2312_pal.mem 0x158afe76 +313 198092 10240 480 sh3_zsrt139e2313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2313.mem 539 59 1 sh3_zsrt139e2313_pal.mem 0x158afe76 +314 198092 10240 480 sh3_zsrt139e2314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2314.mem 323 35 1 sh3_zsrt139e2314_pal.mem 0x158afe76 +315 198092 10240 480 sh3_zsrt139e2315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2315.mem 179 19 1 sh3_zsrt139e2315_pal.mem 0x158afe76 +316 198092 10240 480 sh3_zsrt139e2316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2316.mem 494 54 1 sh3_zsrt139e2316_pal.mem 0x158afe76 +317 198092 10240 480 sh3_zsrt139e2317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2317.mem 431 47 1 sh3_zsrt139e2317_pal.mem 0x158afe76 +318 198092 10240 480 sh3_zsrt139e2318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2318.mem 107 11 1 sh3_zsrt139e2318_pal.mem 0x158afe76 +319 198092 10240 480 sh3_zsrt139e2319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2319.mem 278 30 1 sh3_zsrt139e2319_pal.mem 0x158afe76 +320 198092 10240 480 sh3_zsrt139e2320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2320.mem 413 45 1 sh3_zsrt139e2320_pal.mem 0x158afe76 +321 198092 10240 480 sh3_zsrt139e2321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2321.mem 98 10 1 sh3_zsrt139e2321_pal.mem 0x158afe76 +322 198092 10240 480 sh3_zsrt139e2322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2322.mem 278 30 1 sh3_zsrt139e2322_pal.mem 0x158afe76 +323 198092 10240 480 sh3_zsrt139e2323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2323.mem 62 6 1 sh3_zsrt139e2323_pal.mem 0x158afe76 +324 198092 10240 480 sh3_zsrt139e2324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2324.mem 98 10 1 sh3_zsrt139e2324_pal.mem 0x158afe76 +325 198092 10240 480 sh3_zsrt139e2325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2325.mem 251 27 1 sh3_zsrt139e2325_pal.mem 0x158afe76 +326 198092 10240 480 sh3_zsrt139e2326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2326.mem 215 23 1 sh3_zsrt139e2326_pal.mem 0x158afe76 +327 198092 10240 480 sh3_zsrt139e2327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2327.mem 215 23 1 sh3_zsrt139e2327_pal.mem 0x158afe76 +328 198092 10240 480 sh3_zsrt139e2328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2328.mem 107 11 1 sh3_zsrt139e2328_pal.mem 0x158afe76 +329 198092 10240 480 sh3_zsrt139e2329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2329.mem 152 16 1 sh3_zsrt139e2329_pal.mem 0x158afe76 +330 198092 10240 480 sh3_zsrt139e2330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2330.mem 278 30 1 sh3_zsrt139e2330_pal.mem 0x158afe76 +331 198092 10240 480 sh3_zsrt139e2331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2331.mem 503 55 1 sh3_zsrt139e2331_pal.mem 0x158afe76 +332 198092 10240 480 sh3_zsrt139e2332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2332.mem 62 6 1 sh3_zsrt139e2332_pal.mem 0x158afe76 +333 198092 10240 480 sh3_zsrt139e2333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2333.mem 98 10 1 sh3_zsrt139e2333_pal.mem 0x158afe76 +334 198092 10240 480 sh3_zsrt139e2334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2334.mem 260 28 1 sh3_zsrt139e2334_pal.mem 0x158afe76 +335 198092 10240 480 sh3_zsrt139e2335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2335.mem 116 12 1 sh3_zsrt139e2335_pal.mem 0x158afe76 +336 198092 10240 480 sh3_zsrt139e2336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2336.mem 323 35 1 sh3_zsrt139e2336_pal.mem 0x158afe76 +337 198092 10240 480 sh3_zsrt139e2337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2337.mem 242 26 1 sh3_zsrt139e2337_pal.mem 0x158afe76 +338 198092 10240 480 sh3_zsrt139e2338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2338.mem 233 25 1 sh3_zsrt139e2338_pal.mem 0x158afe76 +339 198092 10240 480 sh3_zsrt139e2339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2339.mem 233 25 1 sh3_zsrt139e2339_pal.mem 0x158afe76 +340 198092 10240 480 sh3_zsrt139e2340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2340.mem 152 16 1 sh3_zsrt139e2340_pal.mem 0x158afe76 +341 198092 10240 480 sh3_zsrt139e2341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2341.mem 449 49 1 sh3_zsrt139e2341_pal.mem 0x158afe76 +342 198092 10240 480 sh3_zsrt139e2342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2342.mem 125 13 1 sh3_zsrt139e2342_pal.mem 0x158afe76 +343 198092 10240 480 sh3_zsrt139e2343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2343.mem 62 6 1 sh3_zsrt139e2343_pal.mem 0x158afe76 +344 198092 10240 480 sh3_zsrt139e2344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2344.mem 53 5 1 sh3_zsrt139e2344_pal.mem 0x158afe76 +345 198092 10240 480 sh3_zsrt139e2345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2345.mem 125 13 1 sh3_zsrt139e2345_pal.mem 0x158afe76 +346 198092 10240 480 sh3_zsrt139e2346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2346.mem 125 13 1 sh3_zsrt139e2346_pal.mem 0x158afe76 +347 198092 10240 480 sh3_zsrt139e2347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2347.mem 377 41 1 sh3_zsrt139e2347_pal.mem 0x158afe76 +348 198092 10240 480 sh3_zsrt139e2348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2348.mem 512 56 1 sh3_zsrt139e2348_pal.mem 0x158afe76 +349 198092 10240 480 sh3_zsrt139e2349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2349.mem 539 59 1 sh3_zsrt139e2349_pal.mem 0x158afe76 +350 198092 10240 480 sh3_zsrt139e2350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2350.mem 53 5 1 sh3_zsrt139e2350_pal.mem 0x158afe76 +351 198092 10240 480 sh3_zsrt139e2351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2351.mem 53 5 1 sh3_zsrt139e2351_pal.mem 0x158afe76 +352 198092 10240 480 sh3_zsrt139e2352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2352.mem 71 7 1 sh3_zsrt139e2352_pal.mem 0x158afe76 +353 198092 10240 480 sh3_zsrt139e2353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2353.mem 161 17 1 sh3_zsrt139e2353_pal.mem 0x158afe76 +354 198092 10240 480 sh3_zsrt139e2354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2354.mem 206 22 1 sh3_zsrt139e2354_pal.mem 0x158afe76 +355 198092 10240 480 sh3_zsrt139e2355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2355.mem 89 9 1 sh3_zsrt139e2355_pal.mem 0x158afe76 +356 198092 10240 480 sh3_zsrt139e2356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2356.mem 89 9 1 sh3_zsrt139e2356_pal.mem 0x158afe76 +357 198092 10240 480 sh3_zsrt139e2357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2357.mem 143 15 1 sh3_zsrt139e2357_pal.mem 0x158afe76 +358 198092 10240 480 sh3_zsrt139e2358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2358.mem 368 40 1 sh3_zsrt139e2358_pal.mem 0x158afe76 +359 198092 10240 480 sh3_zsrt139e2359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2359.mem 80 8 1 sh3_zsrt139e2359_pal.mem 0x158afe76 +360 198092 10240 480 sh3_zsrt139e2360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2360.mem 152 16 1 sh3_zsrt139e2360_pal.mem 0x158afe76 +361 198092 10240 480 sh3_zsrt139e2361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2361.mem 314 34 1 sh3_zsrt139e2361_pal.mem 0x158afe76 +362 198092 10240 480 sh3_zsrt139e2362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2362.mem 116 12 1 sh3_zsrt139e2362_pal.mem 0x158afe76 +363 198092 10240 480 sh3_zsrt139e2363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2363.mem 197 21 1 sh3_zsrt139e2363_pal.mem 0x158afe76 +364 198092 10240 480 sh3_zsrt139e2364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2364.mem 143 15 1 sh3_zsrt139e2364_pal.mem 0x158afe76 +365 198092 10240 480 sh3_zsrt139e2365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2365.mem 503 55 1 sh3_zsrt139e2365_pal.mem 0x158afe76 +366 198092 10240 480 sh3_zsrt139e2366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2366.mem 449 49 1 sh3_zsrt139e2366_pal.mem 0x158afe76 +367 198092 10240 480 sh3_zsrt139e2367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2367.mem 395 43 1 sh3_zsrt139e2367_pal.mem 0x158afe76 +368 198092 10240 480 sh3_zsrt139e2368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2368.mem 413 45 1 sh3_zsrt139e2368_pal.mem 0x158afe76 +369 198092 10240 480 sh3_zsrt139e2369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2369.mem 449 49 1 sh3_zsrt139e2369_pal.mem 0x158afe76 +370 198092 10240 480 sh3_zsrt139e2370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2370.mem 584 64 1 sh3_zsrt139e2370_pal.mem 0x158afe76 +371 198092 10240 480 sh3_zsrt139e2371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2371.mem 125 13 1 sh3_zsrt139e2371_pal.mem 0x158afe76 +372 198092 10240 480 sh3_zsrt139e2372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2372.mem 80 8 1 sh3_zsrt139e2372_pal.mem 0x158afe76 +373 198092 10240 480 sh3_zsrt139e2373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2373.mem 152 16 1 sh3_zsrt139e2373_pal.mem 0x158afe76 +374 198092 10240 480 sh3_zsrt139e2374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2374.mem 107 11 1 sh3_zsrt139e2374_pal.mem 0x158afe76 +375 198092 10240 480 sh3_zsrt139e2375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2375.mem 98 10 1 sh3_zsrt139e2375_pal.mem 0x158afe76 +376 198092 10240 480 sh3_zsrt139e2376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2376.mem 152 16 1 sh3_zsrt139e2376_pal.mem 0x158afe76 +377 198092 10240 480 sh3_zsrt139e2377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2377.mem 314 34 1 sh3_zsrt139e2377_pal.mem 0x158afe76 +378 198092 10240 480 sh3_zsrt139e2378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2378.mem 53 5 1 sh3_zsrt139e2378_pal.mem 0x158afe76 +379 198092 10240 480 sh3_zsrt139e2379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2379.mem 62 6 1 sh3_zsrt139e2379_pal.mem 0x158afe76 +380 198092 10240 480 sh3_zsrt139e2380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2380.mem 152 16 1 sh3_zsrt139e2380_pal.mem 0x158afe76 +381 198092 10240 480 sh3_zsrt139e2381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2381.mem 197 21 1 sh3_zsrt139e2381_pal.mem 0x158afe76 +382 198092 10240 480 sh3_zsrt139e2382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2382.mem 287 31 1 sh3_zsrt139e2382_pal.mem 0x158afe76 +383 198092 10240 480 sh3_zsrt139e2383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2383.mem 566 62 1 sh3_zsrt139e2383_pal.mem 0x158afe76 +384 198092 10240 480 sh3_zsrt139e2384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2384.mem 980 108 1 sh3_zsrt139e2384_pal.mem 0x158afe76 +385 198092 10240 480 sh3_zsrt139e2385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2385.mem 107 11 1 sh3_zsrt139e2385_pal.mem 0x158afe76 +386 198092 10240 480 sh3_zsrt139e2386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2386.mem 602 66 1 sh3_zsrt139e2386_pal.mem 0x158afe76 +387 198092 10240 480 sh3_zsrt139e2387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2387.mem 377 41 1 sh3_zsrt139e2387_pal.mem 0x158afe76 +388 198092 10240 480 sh3_zsrt139e2388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2388.mem 89 9 1 sh3_zsrt139e2388_pal.mem 0x158afe76 +389 198092 10240 480 sh3_zsrt139e2389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2389.mem 152 16 1 sh3_zsrt139e2389_pal.mem 0x158afe76 +390 198092 10240 480 sh3_zsrt139e2390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2390.mem 305 33 1 sh3_zsrt139e2390_pal.mem 0x158afe76 +391 198092 10240 480 sh3_zsrt139e2391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2391.mem 98 10 1 sh3_zsrt139e2391_pal.mem 0x158afe76 +392 198092 10240 480 sh3_zsrt139e2392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2392.mem 71 7 1 sh3_zsrt139e2392_pal.mem 0x158afe76 +393 198092 10240 480 sh3_zsrt139e2393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2393.mem 71 7 1 sh3_zsrt139e2393_pal.mem 0x158afe76 +394 198092 10240 480 sh3_zsrt139e2394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2394.mem 80 8 1 sh3_zsrt139e2394_pal.mem 0x158afe76 +395 198092 10240 480 sh3_zsrt139e2395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2395.mem 179 19 1 sh3_zsrt139e2395_pal.mem 0x158afe76 +396 198092 10240 480 sh3_zsrt139e2396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2396.mem 251 27 1 sh3_zsrt139e2396_pal.mem 0x158afe76 +397 198092 10240 480 sh3_zsrt139e2397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2397.mem 278 30 1 sh3_zsrt139e2397_pal.mem 0x158afe76 +398 198092 10240 480 sh3_zsrt139e2398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2398.mem 125 13 1 sh3_zsrt139e2398_pal.mem 0x158afe76 +399 198092 10240 480 sh3_zsrt139e2399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2399.mem 251 27 1 sh3_zsrt139e2399_pal.mem 0x158afe76 +400 198092 10240 480 sh3_zsrt139e2400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2400.mem 449 49 1 sh3_zsrt139e2400_pal.mem 0x158afe76 +401 198092 10240 480 sh3_zsrt139e2401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2401.mem 125 13 1 sh3_zsrt139e2401_pal.mem 0x158afe76 +402 198092 10240 480 sh3_zsrt139e2402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2402.mem 71 7 1 sh3_zsrt139e2402_pal.mem 0x158afe76 +403 198092 10240 480 sh3_zsrt139e2403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2403.mem 53 5 1 sh3_zsrt139e2403_pal.mem 0x158afe76 +404 198092 10240 480 sh3_zsrt139e2404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2404.mem 53 5 1 sh3_zsrt139e2404_pal.mem 0x158afe76 +405 198092 10240 480 sh3_zsrt139e2405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2405.mem 44 4 1 sh3_zsrt139e2405_pal.mem 0x158afe76 +406 198092 10240 480 sh3_zsrt139e2406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2406.mem 44 4 1 sh3_zsrt139e2406_pal.mem 0x158afe76 +407 198092 10240 480 sh3_zsrt139e2407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2407.mem 98 10 1 sh3_zsrt139e2407_pal.mem 0x158afe76 +408 198092 10240 480 sh3_zsrt139e2408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2408.mem 80 8 1 sh3_zsrt139e2408_pal.mem 0x158afe76 +409 198092 10240 480 sh3_zsrt139e2409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2409.mem 62 6 1 sh3_zsrt139e2409_pal.mem 0x158afe76 +410 198092 10240 480 sh3_zsrt139e2410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2410.mem 80 8 1 sh3_zsrt139e2410_pal.mem 0x158afe76 +411 198092 10240 480 sh3_zsrt139e2411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2411.mem 107 11 1 sh3_zsrt139e2411_pal.mem 0x158afe76 +412 198092 10240 480 sh3_zsrt139e2412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2412.mem 206 22 1 sh3_zsrt139e2412_pal.mem 0x158afe76 +413 198092 10240 480 sh3_zsrt139e2413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2413.mem 719 79 1 sh3_zsrt139e2413_pal.mem 0x158afe76 +414 198092 10240 480 sh3_zsrt139e2414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2414.mem 494 54 1 sh3_zsrt139e2414_pal.mem 0x158afe76 +415 198092 10240 480 sh3_zsrt139e2415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2415.mem 89 9 1 sh3_zsrt139e2415_pal.mem 0x158afe76 +416 198092 10240 480 sh3_zsrt139e2416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2416.mem 179 19 1 sh3_zsrt139e2416_pal.mem 0x158afe76 +417 198092 10240 480 sh3_zsrt139e2417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2417.mem 242 26 1 sh3_zsrt139e2417_pal.mem 0x158afe76 +418 198092 10240 480 sh3_zsrt139e2418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2418.mem 89 9 1 sh3_zsrt139e2418_pal.mem 0x158afe76 +419 198092 10240 480 sh3_zsrt139e2419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2419.mem 80 8 1 sh3_zsrt139e2419_pal.mem 0x158afe76 +420 198092 10240 480 sh3_zsrt139e2420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2420.mem 170 18 1 sh3_zsrt139e2420_pal.mem 0x158afe76 +421 198092 10240 480 sh3_zsrt139e2421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2421.mem 143 15 1 sh3_zsrt139e2421_pal.mem 0x158afe76 +422 198092 10240 480 sh3_zsrt139e2422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2422.mem 80 8 1 sh3_zsrt139e2422_pal.mem 0x158afe76 +423 198092 10240 480 sh3_zsrt139e2423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2423.mem 62 6 1 sh3_zsrt139e2423_pal.mem 0x158afe76 +424 198092 10240 480 sh3_zsrt139e2424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2424.mem 125 13 1 sh3_zsrt139e2424_pal.mem 0x158afe76 +425 198092 10240 480 sh3_zsrt139e2425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2425.mem 197 21 1 sh3_zsrt139e2425_pal.mem 0x158afe76 +426 198092 10240 480 sh3_zsrt139e2426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2426.mem 188 20 1 sh3_zsrt139e2426_pal.mem 0x158afe76 +427 198092 10240 480 sh3_zsrt139e2427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2427.mem 62 6 1 sh3_zsrt139e2427_pal.mem 0x158afe76 +428 198092 10240 480 sh3_zsrt139e2428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2428.mem 44 4 1 sh3_zsrt139e2428_pal.mem 0x158afe76 +429 198092 10240 480 sh3_zsrt139e2429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2429.mem 44 4 1 sh3_zsrt139e2429_pal.mem 0x158afe76 +430 198092 10240 480 sh3_zsrt139e2430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2430.mem 35 3 1 sh3_zsrt139e2430_pal.mem 0x158afe76 +431 198092 10240 480 sh3_zsrt139e2431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2431.mem 44 4 1 sh3_zsrt139e2431_pal.mem 0x158afe76 +432 198092 10240 480 sh3_zsrt139e2432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2432.mem 62 6 1 sh3_zsrt139e2432_pal.mem 0x158afe76 +433 198092 10240 480 sh3_zsrt139e2433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139e2433.mem 98 10 1 sh3_zsrt139e2433_pal.mem 0x158afe76 +434 198945 13376 480 sh3_zsrt139e2434_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2434.mem 134 14 0 sh3_zsrt139e2434_pal.mem 0x870d2bd0 +435 198945 13376 480 sh3_zsrt139e2435_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2435.mem 134 14 1 sh3_zsrt139e2435_pal.mem 0x870d2bd0 +436 198945 13376 480 sh3_zsrt139e2436_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2436.mem 134 14 1 sh3_zsrt139e2436_pal.mem 0x870d2bd0 +437 198945 13376 480 sh3_zsrt139e2437_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2437.mem 134 14 1 sh3_zsrt139e2437_pal.mem 0x870d2bd0 +438 198945 13376 480 sh3_zsrt139e2438_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2438.mem 134 14 1 sh3_zsrt139e2438_pal.mem 0x870d2bd0 +439 198945 13376 480 sh3_zsrt139e2439_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2439.mem 134 14 1 sh3_zsrt139e2439_pal.mem 0x870d2bd0 +440 198945 13376 480 sh3_zsrt139e2440_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2440.mem 134 14 1 sh3_zsrt139e2440_pal.mem 0x870d2bd0 +441 198945 13376 480 sh3_zsrt139e2441_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2441.mem 134 14 1 sh3_zsrt139e2441_pal.mem 0x870d2bd0 +442 198945 13376 480 sh3_zsrt139e2442_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2442.mem 134 14 1 sh3_zsrt139e2442_pal.mem 0x870d2bd0 +443 198945 13376 480 sh3_zsrt139e2443_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2443.mem 134 14 1 sh3_zsrt139e2443_pal.mem 0x870d2bd0 +444 198945 13376 480 sh3_zsrt139e2444_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2444.mem 134 14 1 sh3_zsrt139e2444_pal.mem 0x870d2bd0 +445 198945 13376 480 sh3_zsrt139e2445_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2445.mem 134 14 1 sh3_zsrt139e2445_pal.mem 0x870d2bd0 +446 198945 13376 480 sh3_zsrt139e2446_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2446.mem 134 14 1 sh3_zsrt139e2446_pal.mem 0x870d2bd0 +447 198945 13376 480 sh3_zsrt139e2447_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2447.mem 134 14 1 sh3_zsrt139e2447_pal.mem 0x870d2bd0 +448 198945 13376 480 sh3_zsrt139e2448_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2448.mem 134 14 1 sh3_zsrt139e2448_pal.mem 0x870d2bd0 +449 198945 13376 480 sh3_zsrt139e2449_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2449.mem 134 14 1 sh3_zsrt139e2449_pal.mem 0x870d2bd0 +450 198945 13376 480 sh3_zsrt139e2450_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2450.mem 134 14 1 sh3_zsrt139e2450_pal.mem 0x870d2bd0 +451 198945 13376 480 sh3_zsrt139e2451_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2451.mem 26 2 1 sh3_zsrt139e2451_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139e3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e3_epochs.txt new file mode 100644 index 0000000..67cb683 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139e3_epochs.txt @@ -0,0 +1,455 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139d6', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 452 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 5328 11264 480 sh3_zsrt139d60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d60.mem 494 54 0 sh3_zsrt139d60_pal.mem 0x32ed74c4 +1 11671 10240 480 sh3_zsrt139d61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d61.mem 1061 117 0 sh3_zsrt139d61_pal.mem 0x3cd88c98 +2 12757 10240 480 sh3_zsrt139d62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d62.mem 530 58 1 sh3_zsrt139d62_pal.mem 0x3cd88c98 +3 15277 12288 480 sh3_zsrt139d63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d63.mem 782 86 0 sh3_zsrt139d63_pal.mem 0x4812d6f2 +4 16217 11264 480 sh3_zsrt139d64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d64.mem 1232 136 0 sh3_zsrt139d64_pal.mem 0x5cbf8bb4 +5 16643 11264 480 sh3_zsrt139d65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d65.mem 1232 136 1 sh3_zsrt139d65_pal.mem 0x5cbf8bb4 +6 17069 11264 480 sh3_zsrt139d66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d66.mem 764 84 1 sh3_zsrt139d66_pal.mem 0x5cbf8bb4 +7 17339 11264 480 sh3_zsrt139d67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d67.mem 1232 136 1 sh3_zsrt139d67_pal.mem 0x5cbf8bb4 +8 17765 11264 480 sh3_zsrt139d68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d68.mem 710 78 1 sh3_zsrt139d68_pal.mem 0x5cbf8bb4 +9 19136 11264 480 sh3_zsrt139d69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d69.mem 1232 136 1 sh3_zsrt139d69_pal.mem 0x5cbf8bb4 +10 19562 11264 480 sh3_zsrt139d610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d610.mem 1232 136 1 sh3_zsrt139d610_pal.mem 0x5cbf8bb4 +11 20246 11264 480 sh3_zsrt139d611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d611.mem 953 105 1 sh3_zsrt139d611_pal.mem 0x5cbf8bb4 +12 20579 11264 480 sh3_zsrt139d612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d612.mem 1232 136 1 sh3_zsrt139d612_pal.mem 0x5cbf8bb4 +13 21005 11264 480 sh3_zsrt139d613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d613.mem 1097 121 1 sh3_zsrt139d613_pal.mem 0x5cbf8bb4 +14 21599 11264 480 sh3_zsrt139d614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d614.mem 170 18 1 sh3_zsrt139d614_pal.mem 0x5cbf8bb4 +15 26066 11264 480 sh3_zsrt139d615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d615.mem 62 6 0 sh3_zsrt139d615_pal.mem 0x44679578 +16 30859 10240 480 sh3_zsrt139d616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d616.mem 620 68 0 sh3_zsrt139d616_pal.mem 0x47405cb0 +17 31075 13824 480 sh3_zsrt139d617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d617.mem 620 68 0 sh3_zsrt139d617_pal.mem 0x566e7c38 +18 77112 10240 480 sh3_zsrt139d618_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d618.mem 620 68 0 sh3_zsrt139d618_pal.mem 0x43ece1ae +19 89164 9216 480 sh3_zsrt139d619_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d619.mem 620 68 0 sh3_zsrt139d619_pal.mem 0x5dfce0a2 +20 119471 8192 480 sh3_zsrt139d620_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d620.mem 1844 204 0 sh3_zsrt139d620_pal.mem 0x47097d4c +21 120110 8192 480 sh3_zsrt139d621_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d621.mem 1844 204 1 sh3_zsrt139d621_pal.mem 0x47097d4c +22 120749 8192 480 sh3_zsrt139d622_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d622.mem 1844 204 1 sh3_zsrt139d622_pal.mem 0x47097d4c +23 121388 8192 480 sh3_zsrt139d623_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d623.mem 1844 204 1 sh3_zsrt139d623_pal.mem 0x47097d4c +24 122027 8192 480 sh3_zsrt139d624_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d624.mem 1844 204 1 sh3_zsrt139d624_pal.mem 0x47097d4c +25 129389 8192 480 sh3_zsrt139d625_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d625.mem 1844 204 1 sh3_zsrt139d625_pal.mem 0x47097d4c +26 130241 8192 480 sh3_zsrt139d626_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d626.mem 1844 204 1 sh3_zsrt139d626_pal.mem 0x47097d4c +27 130880 8192 480 sh3_zsrt139d627_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d627.mem 1844 204 1 sh3_zsrt139d627_pal.mem 0x47097d4c +28 146205 11264 480 sh3_zsrt139d628_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d628.mem 1142 126 0 sh3_zsrt139d628_pal.mem 0xfd978fd9 +29 146630 11264 480 sh3_zsrt139d629_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d629.mem 1178 130 1 sh3_zsrt139d629_pal.mem 0xfd978fd9 +30 147068 11264 480 sh3_zsrt139d630_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d630.mem 1106 122 1 sh3_zsrt139d630_pal.mem 0xfd978fd9 +31 147480 11264 480 sh3_zsrt139d631_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d631.mem 1070 118 0 sh3_zsrt139d631_pal.mem 0xd5ed05ff +32 147888 11264 480 sh3_zsrt139d632_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d632.mem 998 110 1 sh3_zsrt139d632_pal.mem 0xd5ed05ff +33 148264 11264 480 sh3_zsrt139d633_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d633.mem 1070 118 1 sh3_zsrt139d633_pal.mem 0xd5ed05ff +34 148919 11264 480 sh3_zsrt139d634_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d634.mem 782 86 0 sh3_zsrt139d634_pal.mem 0xcdf8a4d8 +35 149214 11264 480 sh3_zsrt139d635_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d635.mem 782 86 1 sh3_zsrt139d635_pal.mem 0xcdf8a4d8 +36 149509 11264 480 sh3_zsrt139d636_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d636.mem 746 82 1 sh3_zsrt139d636_pal.mem 0xcdf8a4d8 +37 152021 11264 480 sh3_zsrt139d637_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d637.mem 1070 118 0 sh3_zsrt139d637_pal.mem 0xc6784386 +38 152420 11264 480 sh3_zsrt139d638_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d638.mem 1034 114 1 sh3_zsrt139d638_pal.mem 0xc6784386 +39 152806 11264 480 sh3_zsrt139d639_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d639.mem 1106 122 1 sh3_zsrt139d639_pal.mem 0xc6784386 +40 153218 11264 480 sh3_zsrt139d640_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d640.mem 1142 126 0 sh3_zsrt139d640_pal.mem 0xc6784386 +41 153643 11264 480 sh3_zsrt139d641_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d641.mem 1034 114 1 sh3_zsrt139d641_pal.mem 0xc6784386 +42 154029 11264 480 sh3_zsrt139d642_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d642.mem 1070 118 1 sh3_zsrt139d642_pal.mem 0xc6784386 +43 154428 11264 480 sh3_zsrt139d643_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d643.mem 1142 126 1 sh3_zsrt139d643_pal.mem 0xc6784386 +44 154853 11264 480 sh3_zsrt139d644_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d644.mem 1106 122 1 sh3_zsrt139d644_pal.mem 0xc6784386 +45 155265 11264 480 sh3_zsrt139d645_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d645.mem 1070 118 1 sh3_zsrt139d645_pal.mem 0xc6784386 +46 155664 11264 480 sh3_zsrt139d646_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d646.mem 1070 118 1 sh3_zsrt139d646_pal.mem 0xc6784386 +47 156063 11264 480 sh3_zsrt139d647_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d647.mem 1358 150 1 sh3_zsrt139d647_pal.mem 0xc6784386 +48 156566 10240 480 sh3_zsrt139d648_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d648.mem 998 110 0 sh3_zsrt139d648_pal.mem 0x00fd9028 +49 156939 10240 480 sh3_zsrt139d649_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d649.mem 890 98 1 sh3_zsrt139d649_pal.mem 0x00fd9028 +50 157273 10240 480 sh3_zsrt139d650_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d650.mem 890 98 1 sh3_zsrt139d650_pal.mem 0x00fd9028 +51 157607 10240 480 sh3_zsrt139d651_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d651.mem 962 106 1 sh3_zsrt139d651_pal.mem 0x00fd9028 +52 157967 10240 480 sh3_zsrt139d652_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d652.mem 926 102 1 sh3_zsrt139d652_pal.mem 0x00fd9028 +53 158314 10240 480 sh3_zsrt139d653_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d653.mem 962 106 1 sh3_zsrt139d653_pal.mem 0x00fd9028 +54 158674 10240 480 sh3_zsrt139d654_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d654.mem 962 106 1 sh3_zsrt139d654_pal.mem 0x00fd9028 +55 159034 10240 480 sh3_zsrt139d655_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d655.mem 1034 114 1 sh3_zsrt139d655_pal.mem 0x00fd9028 +56 159420 10240 480 sh3_zsrt139d656_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d656.mem 890 98 1 sh3_zsrt139d656_pal.mem 0x00fd9028 +57 159754 10240 480 sh3_zsrt139d657_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d657.mem 962 106 1 sh3_zsrt139d657_pal.mem 0x00fd9028 +58 160114 10240 480 sh3_zsrt139d658_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d658.mem 566 62 1 sh3_zsrt139d658_pal.mem 0x00fd9028 +59 160331 10240 480 sh3_zsrt139d659_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d659.mem 1178 130 0 sh3_zsrt139d659_pal.mem 0xd8d19684 +60 160769 10240 480 sh3_zsrt139d660_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d660.mem 1070 118 1 sh3_zsrt139d660_pal.mem 0xd8d19684 +61 161168 10240 480 sh3_zsrt139d661_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d661.mem 1070 118 1 sh3_zsrt139d661_pal.mem 0xd8d19684 +62 161567 10240 480 sh3_zsrt139d662_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d662.mem 1250 138 1 sh3_zsrt139d662_pal.mem 0xd8d19684 +63 162031 10240 480 sh3_zsrt139d663_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d663.mem 710 78 1 sh3_zsrt139d663_pal.mem 0xd8d19684 +64 162300 10240 480 sh3_zsrt139d664_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d664.mem 1142 126 1 sh3_zsrt139d664_pal.mem 0xd8d19684 +65 162725 10240 480 sh3_zsrt139d665_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d665.mem 1178 130 1 sh3_zsrt139d665_pal.mem 0xd8d19684 +66 163163 10240 480 sh3_zsrt139d666_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d666.mem 1106 122 1 sh3_zsrt139d666_pal.mem 0xd8d19684 +67 163575 10240 480 sh3_zsrt139d667_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d667.mem 1142 126 1 sh3_zsrt139d667_pal.mem 0xd8d19684 +68 164000 10240 480 sh3_zsrt139d668_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d668.mem 530 58 1 sh3_zsrt139d668_pal.mem 0xd8d19684 +69 164204 10240 480 sh3_zsrt139d669_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d669.mem 1322 146 0 sh3_zsrt139d669_pal.mem 0xaa4e7e05 +70 164694 10240 480 sh3_zsrt139d670_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d670.mem 674 74 1 sh3_zsrt139d670_pal.mem 0xaa4e7e05 +71 164950 10240 480 sh3_zsrt139d671_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d671.mem 602 66 1 sh3_zsrt139d671_pal.mem 0xaa4e7e05 +72 165180 10240 480 sh3_zsrt139d672_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d672.mem 458 50 1 sh3_zsrt139d672_pal.mem 0xaa4e7e05 +73 175995 12288 480 sh3_zsrt139d673_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d673.mem 1214 134 0 sh3_zsrt139d673_pal.mem 0x56ebf1d1 +74 176446 12288 480 sh3_zsrt139d674_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d674.mem 1376 152 1 sh3_zsrt139d674_pal.mem 0x56ebf1d1 +75 196494 10240 480 sh3_zsrt139d675_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d675.mem 17 1 0 sh3_zsrt139d675_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139d676_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d676.mem 17 1 1 sh3_zsrt139d676_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139d677_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d677.mem 17 1 1 sh3_zsrt139d677_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139d678_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d678.mem 17 1 1 sh3_zsrt139d678_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139d679_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d679.mem 17 1 1 sh3_zsrt139d679_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139d680_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d680.mem 17 1 1 sh3_zsrt139d680_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139d681_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d681.mem 17 1 1 sh3_zsrt139d681_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139d682_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d682.mem 17 1 1 sh3_zsrt139d682_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139d683_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d683.mem 17 1 1 sh3_zsrt139d683_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139d684_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d684.mem 17 1 1 sh3_zsrt139d684_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139d685_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d685.mem 17 1 1 sh3_zsrt139d685_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139d686_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d686.mem 17 1 1 sh3_zsrt139d686_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139d687_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d687.mem 17 1 1 sh3_zsrt139d687_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139d688_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d688.mem 17 1 1 sh3_zsrt139d688_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139d689_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d689.mem 17 1 1 sh3_zsrt139d689_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139d690_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d690.mem 17 1 1 sh3_zsrt139d690_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139d691_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d691.mem 17 1 1 sh3_zsrt139d691_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139d692_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d692.mem 17 1 1 sh3_zsrt139d692_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139d693_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d693.mem 17 1 1 sh3_zsrt139d693_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139d694_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d694.mem 17 1 1 sh3_zsrt139d694_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139d695_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d695.mem 17 1 1 sh3_zsrt139d695_pal.mem 0x158afe76 +96 196494 10240 480 sh3_zsrt139d696_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d696.mem 17 1 1 sh3_zsrt139d696_pal.mem 0x158afe76 +97 196494 10240 480 sh3_zsrt139d697_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d697.mem 17 1 1 sh3_zsrt139d697_pal.mem 0x158afe76 +98 196494 10240 480 sh3_zsrt139d698_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d698.mem 17 1 1 sh3_zsrt139d698_pal.mem 0x158afe76 +99 196494 10240 480 sh3_zsrt139d699_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d699.mem 17 1 1 sh3_zsrt139d699_pal.mem 0x158afe76 +100 196494 10240 480 sh3_zsrt139d6100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6100.mem 17 1 1 sh3_zsrt139d6100_pal.mem 0x158afe76 +101 196494 10240 480 sh3_zsrt139d6101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6101.mem 17 1 1 sh3_zsrt139d6101_pal.mem 0x158afe76 +102 196494 10240 480 sh3_zsrt139d6102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6102.mem 17 1 1 sh3_zsrt139d6102_pal.mem 0x158afe76 +103 196494 10240 480 sh3_zsrt139d6103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6103.mem 17 1 1 sh3_zsrt139d6103_pal.mem 0x158afe76 +104 196494 10240 480 sh3_zsrt139d6104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6104.mem 17 1 1 sh3_zsrt139d6104_pal.mem 0x158afe76 +105 196494 10240 480 sh3_zsrt139d6105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6105.mem 17 1 1 sh3_zsrt139d6105_pal.mem 0x158afe76 +106 196494 10240 480 sh3_zsrt139d6106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6106.mem 17 1 1 sh3_zsrt139d6106_pal.mem 0x158afe76 +107 196494 10240 480 sh3_zsrt139d6107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6107.mem 17 1 1 sh3_zsrt139d6107_pal.mem 0x158afe76 +108 196494 10240 480 sh3_zsrt139d6108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6108.mem 17 1 1 sh3_zsrt139d6108_pal.mem 0x158afe76 +109 196494 10240 480 sh3_zsrt139d6109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6109.mem 17 1 1 sh3_zsrt139d6109_pal.mem 0x158afe76 +110 196494 10240 480 sh3_zsrt139d6110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6110.mem 17 1 1 sh3_zsrt139d6110_pal.mem 0x158afe76 +111 196494 10240 480 sh3_zsrt139d6111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6111.mem 17 1 1 sh3_zsrt139d6111_pal.mem 0x158afe76 +112 196494 10240 480 sh3_zsrt139d6112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6112.mem 17 1 1 sh3_zsrt139d6112_pal.mem 0x158afe76 +113 196494 10240 480 sh3_zsrt139d6113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6113.mem 17 1 1 sh3_zsrt139d6113_pal.mem 0x158afe76 +114 196494 10240 480 sh3_zsrt139d6114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6114.mem 17 1 1 sh3_zsrt139d6114_pal.mem 0x158afe76 +115 196494 10240 480 sh3_zsrt139d6115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6115.mem 17 1 1 sh3_zsrt139d6115_pal.mem 0x158afe76 +116 196494 10240 480 sh3_zsrt139d6116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6116.mem 17 1 1 sh3_zsrt139d6116_pal.mem 0x158afe76 +117 196494 10240 480 sh3_zsrt139d6117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6117.mem 17 1 1 sh3_zsrt139d6117_pal.mem 0x158afe76 +118 196494 10240 480 sh3_zsrt139d6118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6118.mem 17 1 1 sh3_zsrt139d6118_pal.mem 0x158afe76 +119 196494 10240 480 sh3_zsrt139d6119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6119.mem 17 1 1 sh3_zsrt139d6119_pal.mem 0x158afe76 +120 196494 10240 480 sh3_zsrt139d6120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6120.mem 17 1 1 sh3_zsrt139d6120_pal.mem 0x158afe76 +121 196494 10240 480 sh3_zsrt139d6121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6121.mem 17 1 1 sh3_zsrt139d6121_pal.mem 0x158afe76 +122 196494 10240 480 sh3_zsrt139d6122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6122.mem 17 1 1 sh3_zsrt139d6122_pal.mem 0x158afe76 +123 196494 10240 480 sh3_zsrt139d6123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6123.mem 17 1 1 sh3_zsrt139d6123_pal.mem 0x158afe76 +124 196494 10240 480 sh3_zsrt139d6124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6124.mem 17 1 1 sh3_zsrt139d6124_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139d6125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6125.mem 17 1 1 sh3_zsrt139d6125_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139d6126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6126.mem 17 1 1 sh3_zsrt139d6126_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139d6127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6127.mem 17 1 1 sh3_zsrt139d6127_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139d6128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6128.mem 17 1 1 sh3_zsrt139d6128_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139d6129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6129.mem 17 1 1 sh3_zsrt139d6129_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139d6130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6130.mem 17 1 1 sh3_zsrt139d6130_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139d6131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6131.mem 17 1 1 sh3_zsrt139d6131_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139d6132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6132.mem 17 1 1 sh3_zsrt139d6132_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139d6133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6133.mem 17 1 1 sh3_zsrt139d6133_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139d6134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6134.mem 17 1 1 sh3_zsrt139d6134_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139d6135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6135.mem 17 1 1 sh3_zsrt139d6135_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139d6136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6136.mem 17 1 1 sh3_zsrt139d6136_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139d6137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6137.mem 17 1 1 sh3_zsrt139d6137_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139d6138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6138.mem 17 1 1 sh3_zsrt139d6138_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139d6139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6139.mem 17 1 1 sh3_zsrt139d6139_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139d6140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6140.mem 17 1 1 sh3_zsrt139d6140_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139d6141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6141.mem 17 1 1 sh3_zsrt139d6141_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139d6142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6142.mem 17 1 1 sh3_zsrt139d6142_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139d6143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6143.mem 17 1 1 sh3_zsrt139d6143_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139d6144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6144.mem 17 1 1 sh3_zsrt139d6144_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139d6145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6145.mem 17 1 1 sh3_zsrt139d6145_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139d6146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6146.mem 17 1 1 sh3_zsrt139d6146_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139d6147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6147.mem 17 1 1 sh3_zsrt139d6147_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139d6148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6148.mem 17 1 1 sh3_zsrt139d6148_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139d6149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6149.mem 17 1 1 sh3_zsrt139d6149_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139d6150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6150.mem 17 1 1 sh3_zsrt139d6150_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139d6151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6151.mem 17 1 1 sh3_zsrt139d6151_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139d6152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6152.mem 17 1 1 sh3_zsrt139d6152_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139d6153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6153.mem 17 1 1 sh3_zsrt139d6153_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139d6154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6154.mem 17 1 1 sh3_zsrt139d6154_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139d6155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6155.mem 17 1 1 sh3_zsrt139d6155_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139d6156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6156.mem 17 1 1 sh3_zsrt139d6156_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139d6157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6157.mem 17 1 1 sh3_zsrt139d6157_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139d6158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6158.mem 17 1 1 sh3_zsrt139d6158_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139d6159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6159.mem 17 1 1 sh3_zsrt139d6159_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139d6160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6160.mem 17 1 1 sh3_zsrt139d6160_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139d6161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6161.mem 17 1 1 sh3_zsrt139d6161_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139d6162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6162.mem 17 1 1 sh3_zsrt139d6162_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139d6163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6163.mem 17 1 1 sh3_zsrt139d6163_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139d6164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6164.mem 17 1 1 sh3_zsrt139d6164_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139d6165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6165.mem 17 1 1 sh3_zsrt139d6165_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139d6166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6166.mem 17 1 1 sh3_zsrt139d6166_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139d6167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6167.mem 17 1 1 sh3_zsrt139d6167_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139d6168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6168.mem 17 1 1 sh3_zsrt139d6168_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139d6169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6169.mem 17 1 1 sh3_zsrt139d6169_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139d6170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6170.mem 17 1 1 sh3_zsrt139d6170_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139d6171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6171.mem 17 1 1 sh3_zsrt139d6171_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139d6172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6172.mem 17 1 1 sh3_zsrt139d6172_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139d6173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6173.mem 17 1 1 sh3_zsrt139d6173_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139d6174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6174.mem 17 1 1 sh3_zsrt139d6174_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139d6175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6175.mem 17 1 1 sh3_zsrt139d6175_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139d6176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6176.mem 17 1 1 sh3_zsrt139d6176_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139d6177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6177.mem 17 1 1 sh3_zsrt139d6177_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139d6178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6178.mem 17 1 1 sh3_zsrt139d6178_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139d6179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6179.mem 17 1 1 sh3_zsrt139d6179_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139d6180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6180.mem 17 1 1 sh3_zsrt139d6180_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139d6181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6181.mem 17 1 1 sh3_zsrt139d6181_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139d6182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6182.mem 17 1 1 sh3_zsrt139d6182_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139d6183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6183.mem 17 1 1 sh3_zsrt139d6183_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139d6184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6184.mem 17 1 1 sh3_zsrt139d6184_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139d6185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6185.mem 17 1 1 sh3_zsrt139d6185_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139d6186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6186.mem 17 1 1 sh3_zsrt139d6186_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139d6187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6187.mem 17 1 1 sh3_zsrt139d6187_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139d6188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6188.mem 17 1 1 sh3_zsrt139d6188_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139d6189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6189.mem 17 1 1 sh3_zsrt139d6189_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139d6190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6190.mem 17 1 1 sh3_zsrt139d6190_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139d6191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6191.mem 17 1 1 sh3_zsrt139d6191_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139d6192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6192.mem 17 1 1 sh3_zsrt139d6192_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139d6193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6193.mem 17 1 1 sh3_zsrt139d6193_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139d6194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6194.mem 17 1 1 sh3_zsrt139d6194_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139d6195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6195.mem 17 1 1 sh3_zsrt139d6195_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139d6196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6196.mem 17 1 1 sh3_zsrt139d6196_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139d6197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6197.mem 17 1 1 sh3_zsrt139d6197_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139d6198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6198.mem 17 1 1 sh3_zsrt139d6198_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139d6199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6199.mem 17 1 1 sh3_zsrt139d6199_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139d6200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6200.mem 17 1 1 sh3_zsrt139d6200_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139d6201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6201.mem 17 1 1 sh3_zsrt139d6201_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139d6202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6202.mem 17 1 1 sh3_zsrt139d6202_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139d6203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6203.mem 17 1 1 sh3_zsrt139d6203_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139d6204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6204.mem 17 1 1 sh3_zsrt139d6204_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139d6205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6205.mem 17 1 1 sh3_zsrt139d6205_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139d6206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6206.mem 17 1 1 sh3_zsrt139d6206_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139d6207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6207.mem 17 1 1 sh3_zsrt139d6207_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139d6208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6208.mem 17 1 1 sh3_zsrt139d6208_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139d6209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6209.mem 17 1 1 sh3_zsrt139d6209_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139d6210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6210.mem 17 1 1 sh3_zsrt139d6210_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139d6211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6211.mem 17 1 1 sh3_zsrt139d6211_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139d6212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6212.mem 17 1 1 sh3_zsrt139d6212_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139d6213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6213.mem 17 1 1 sh3_zsrt139d6213_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139d6214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6214.mem 17 1 1 sh3_zsrt139d6214_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139d6215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6215.mem 17 1 1 sh3_zsrt139d6215_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139d6216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6216.mem 17 1 1 sh3_zsrt139d6216_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139d6217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6217.mem 17 1 1 sh3_zsrt139d6217_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139d6218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6218.mem 17 1 1 sh3_zsrt139d6218_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139d6219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6219.mem 17 1 1 sh3_zsrt139d6219_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139d6220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6220.mem 17 1 1 sh3_zsrt139d6220_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139d6221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6221.mem 17 1 1 sh3_zsrt139d6221_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139d6222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6222.mem 17 1 1 sh3_zsrt139d6222_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139d6223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6223.mem 17 1 1 sh3_zsrt139d6223_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139d6224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6224.mem 17 1 1 sh3_zsrt139d6224_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139d6225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6225.mem 17 1 1 sh3_zsrt139d6225_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139d6226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6226.mem 17 1 1 sh3_zsrt139d6226_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139d6227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6227.mem 17 1 1 sh3_zsrt139d6227_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139d6228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6228.mem 17 1 1 sh3_zsrt139d6228_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139d6229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6229.mem 17 1 1 sh3_zsrt139d6229_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139d6230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6230.mem 17 1 1 sh3_zsrt139d6230_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139d6231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6231.mem 17 1 1 sh3_zsrt139d6231_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139d6232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6232.mem 17 1 1 sh3_zsrt139d6232_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139d6233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6233.mem 17 1 1 sh3_zsrt139d6233_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139d6234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6234.mem 17 1 1 sh3_zsrt139d6234_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139d6235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6235.mem 17 1 1 sh3_zsrt139d6235_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139d6236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6236.mem 17 1 1 sh3_zsrt139d6236_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139d6237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6237.mem 17 1 1 sh3_zsrt139d6237_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139d6238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6238.mem 17 1 1 sh3_zsrt139d6238_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139d6239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6239.mem 17 1 1 sh3_zsrt139d6239_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139d6240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6240.mem 17 1 1 sh3_zsrt139d6240_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139d6241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6241.mem 17 1 1 sh3_zsrt139d6241_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139d6242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6242.mem 17 1 1 sh3_zsrt139d6242_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139d6243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6243.mem 17 1 1 sh3_zsrt139d6243_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139d6244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6244.mem 17 1 1 sh3_zsrt139d6244_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139d6245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6245.mem 17 1 1 sh3_zsrt139d6245_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139d6246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6246.mem 17 1 1 sh3_zsrt139d6246_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139d6247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6247.mem 17 1 1 sh3_zsrt139d6247_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139d6248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6248.mem 17 1 1 sh3_zsrt139d6248_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139d6249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6249.mem 17 1 1 sh3_zsrt139d6249_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139d6250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6250.mem 17 1 1 sh3_zsrt139d6250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139d6251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6251.mem 17 1 1 sh3_zsrt139d6251_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139d6252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6252.mem 17 1 1 sh3_zsrt139d6252_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139d6253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6253.mem 17 1 1 sh3_zsrt139d6253_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139d6254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6254.mem 17 1 1 sh3_zsrt139d6254_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139d6255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6255.mem 17 1 1 sh3_zsrt139d6255_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139d6256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6256.mem 17 1 1 sh3_zsrt139d6256_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139d6257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6257.mem 17 1 1 sh3_zsrt139d6257_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139d6258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6258.mem 17 1 1 sh3_zsrt139d6258_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139d6259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6259.mem 17 1 1 sh3_zsrt139d6259_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139d6260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6260.mem 17 1 1 sh3_zsrt139d6260_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139d6261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6261.mem 17 1 1 sh3_zsrt139d6261_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139d6262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6262.mem 17 1 1 sh3_zsrt139d6262_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139d6263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6263.mem 17 1 1 sh3_zsrt139d6263_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139d6264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6264.mem 17 1 1 sh3_zsrt139d6264_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139d6265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6265.mem 17 1 1 sh3_zsrt139d6265_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139d6266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6266.mem 17 1 1 sh3_zsrt139d6266_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139d6267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6267.mem 17 1 1 sh3_zsrt139d6267_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139d6268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6268.mem 17 1 1 sh3_zsrt139d6268_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139d6269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6269.mem 17 1 1 sh3_zsrt139d6269_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139d6270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6270.mem 17 1 1 sh3_zsrt139d6270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139d6271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6271.mem 17 1 1 sh3_zsrt139d6271_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139d6272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6272.mem 17 1 1 sh3_zsrt139d6272_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139d6273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6273.mem 17 1 1 sh3_zsrt139d6273_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139d6274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6274.mem 17 1 1 sh3_zsrt139d6274_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139d6275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6275.mem 17 1 1 sh3_zsrt139d6275_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139d6276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6276.mem 17 1 1 sh3_zsrt139d6276_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139d6277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6277.mem 17 1 1 sh3_zsrt139d6277_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139d6278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6278.mem 17 1 1 sh3_zsrt139d6278_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139d6279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6279.mem 17 1 1 sh3_zsrt139d6279_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139d6280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6280.mem 17 1 1 sh3_zsrt139d6280_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139d6281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6281.mem 17 1 1 sh3_zsrt139d6281_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139d6282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6282.mem 17 1 1 sh3_zsrt139d6282_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139d6283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6283.mem 17 1 1 sh3_zsrt139d6283_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139d6284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6284.mem 17 1 1 sh3_zsrt139d6284_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139d6285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6285.mem 17 1 1 sh3_zsrt139d6285_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139d6286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6286.mem 17 1 1 sh3_zsrt139d6286_pal.mem 0x158afe76 +287 198075 10240 480 sh3_zsrt139d6287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6287.mem 485 53 0 sh3_zsrt139d6287_pal.mem 0x158afe76 +288 198092 10240 480 sh3_zsrt139d6288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6288.mem 665 73 1 sh3_zsrt139d6288_pal.mem 0x158afe76 +289 198092 10240 480 sh3_zsrt139d6289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6289.mem 215 23 1 sh3_zsrt139d6289_pal.mem 0x158afe76 +290 198092 10240 480 sh3_zsrt139d6290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6290.mem 458 50 1 sh3_zsrt139d6290_pal.mem 0x158afe76 +291 198092 10240 480 sh3_zsrt139d6291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6291.mem 431 47 1 sh3_zsrt139d6291_pal.mem 0x158afe76 +292 198092 10240 480 sh3_zsrt139d6292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6292.mem 395 43 1 sh3_zsrt139d6292_pal.mem 0x158afe76 +293 198092 10240 480 sh3_zsrt139d6293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6293.mem 206 22 1 sh3_zsrt139d6293_pal.mem 0x158afe76 +294 198092 10240 480 sh3_zsrt139d6294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6294.mem 170 18 1 sh3_zsrt139d6294_pal.mem 0x158afe76 +295 198092 10240 480 sh3_zsrt139d6295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6295.mem 242 26 1 sh3_zsrt139d6295_pal.mem 0x158afe76 +296 198092 10240 480 sh3_zsrt139d6296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6296.mem 359 39 1 sh3_zsrt139d6296_pal.mem 0x158afe76 +297 198092 10240 480 sh3_zsrt139d6297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6297.mem 323 35 1 sh3_zsrt139d6297_pal.mem 0x158afe76 +298 198092 10240 480 sh3_zsrt139d6298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6298.mem 215 23 1 sh3_zsrt139d6298_pal.mem 0x158afe76 +299 198092 10240 480 sh3_zsrt139d6299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6299.mem 314 34 1 sh3_zsrt139d6299_pal.mem 0x158afe76 +300 198092 10240 480 sh3_zsrt139d6300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6300.mem 278 30 1 sh3_zsrt139d6300_pal.mem 0x158afe76 +301 198092 10240 480 sh3_zsrt139d6301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6301.mem 116 12 1 sh3_zsrt139d6301_pal.mem 0x158afe76 +302 198092 10240 480 sh3_zsrt139d6302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6302.mem 197 21 1 sh3_zsrt139d6302_pal.mem 0x158afe76 +303 198092 10240 480 sh3_zsrt139d6303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6303.mem 458 50 1 sh3_zsrt139d6303_pal.mem 0x158afe76 +304 198092 10240 480 sh3_zsrt139d6304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6304.mem 269 29 1 sh3_zsrt139d6304_pal.mem 0x158afe76 +305 198092 10240 480 sh3_zsrt139d6305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6305.mem 206 22 1 sh3_zsrt139d6305_pal.mem 0x158afe76 +306 198092 10240 480 sh3_zsrt139d6306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6306.mem 323 35 1 sh3_zsrt139d6306_pal.mem 0x158afe76 +307 198092 10240 480 sh3_zsrt139d6307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6307.mem 494 54 1 sh3_zsrt139d6307_pal.mem 0x158afe76 +308 198092 10240 480 sh3_zsrt139d6308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6308.mem 566 62 1 sh3_zsrt139d6308_pal.mem 0x158afe76 +309 198092 10240 480 sh3_zsrt139d6309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6309.mem 287 31 1 sh3_zsrt139d6309_pal.mem 0x158afe76 +310 198092 10240 480 sh3_zsrt139d6310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6310.mem 260 28 1 sh3_zsrt139d6310_pal.mem 0x158afe76 +311 198092 10240 480 sh3_zsrt139d6311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6311.mem 89 9 1 sh3_zsrt139d6311_pal.mem 0x158afe76 +312 198092 10240 480 sh3_zsrt139d6312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6312.mem 359 39 1 sh3_zsrt139d6312_pal.mem 0x158afe76 +313 198092 10240 480 sh3_zsrt139d6313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6313.mem 539 59 1 sh3_zsrt139d6313_pal.mem 0x158afe76 +314 198092 10240 480 sh3_zsrt139d6314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6314.mem 323 35 1 sh3_zsrt139d6314_pal.mem 0x158afe76 +315 198092 10240 480 sh3_zsrt139d6315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6315.mem 179 19 1 sh3_zsrt139d6315_pal.mem 0x158afe76 +316 198092 10240 480 sh3_zsrt139d6316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6316.mem 494 54 1 sh3_zsrt139d6316_pal.mem 0x158afe76 +317 198092 10240 480 sh3_zsrt139d6317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6317.mem 431 47 1 sh3_zsrt139d6317_pal.mem 0x158afe76 +318 198092 10240 480 sh3_zsrt139d6318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6318.mem 107 11 1 sh3_zsrt139d6318_pal.mem 0x158afe76 +319 198092 10240 480 sh3_zsrt139d6319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6319.mem 278 30 1 sh3_zsrt139d6319_pal.mem 0x158afe76 +320 198092 10240 480 sh3_zsrt139d6320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6320.mem 413 45 1 sh3_zsrt139d6320_pal.mem 0x158afe76 +321 198092 10240 480 sh3_zsrt139d6321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6321.mem 98 10 1 sh3_zsrt139d6321_pal.mem 0x158afe76 +322 198092 10240 480 sh3_zsrt139d6322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6322.mem 278 30 1 sh3_zsrt139d6322_pal.mem 0x158afe76 +323 198092 10240 480 sh3_zsrt139d6323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6323.mem 62 6 1 sh3_zsrt139d6323_pal.mem 0x158afe76 +324 198092 10240 480 sh3_zsrt139d6324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6324.mem 98 10 1 sh3_zsrt139d6324_pal.mem 0x158afe76 +325 198092 10240 480 sh3_zsrt139d6325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6325.mem 251 27 1 sh3_zsrt139d6325_pal.mem 0x158afe76 +326 198092 10240 480 sh3_zsrt139d6326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6326.mem 215 23 1 sh3_zsrt139d6326_pal.mem 0x158afe76 +327 198092 10240 480 sh3_zsrt139d6327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6327.mem 215 23 1 sh3_zsrt139d6327_pal.mem 0x158afe76 +328 198092 10240 480 sh3_zsrt139d6328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6328.mem 107 11 1 sh3_zsrt139d6328_pal.mem 0x158afe76 +329 198092 10240 480 sh3_zsrt139d6329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6329.mem 152 16 1 sh3_zsrt139d6329_pal.mem 0x158afe76 +330 198092 10240 480 sh3_zsrt139d6330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6330.mem 278 30 1 sh3_zsrt139d6330_pal.mem 0x158afe76 +331 198092 10240 480 sh3_zsrt139d6331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6331.mem 503 55 1 sh3_zsrt139d6331_pal.mem 0x158afe76 +332 198092 10240 480 sh3_zsrt139d6332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6332.mem 62 6 1 sh3_zsrt139d6332_pal.mem 0x158afe76 +333 198092 10240 480 sh3_zsrt139d6333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6333.mem 98 10 1 sh3_zsrt139d6333_pal.mem 0x158afe76 +334 198092 10240 480 sh3_zsrt139d6334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6334.mem 260 28 1 sh3_zsrt139d6334_pal.mem 0x158afe76 +335 198092 10240 480 sh3_zsrt139d6335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6335.mem 116 12 1 sh3_zsrt139d6335_pal.mem 0x158afe76 +336 198092 10240 480 sh3_zsrt139d6336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6336.mem 323 35 1 sh3_zsrt139d6336_pal.mem 0x158afe76 +337 198092 10240 480 sh3_zsrt139d6337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6337.mem 242 26 1 sh3_zsrt139d6337_pal.mem 0x158afe76 +338 198092 10240 480 sh3_zsrt139d6338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6338.mem 233 25 1 sh3_zsrt139d6338_pal.mem 0x158afe76 +339 198092 10240 480 sh3_zsrt139d6339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6339.mem 233 25 1 sh3_zsrt139d6339_pal.mem 0x158afe76 +340 198092 10240 480 sh3_zsrt139d6340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6340.mem 152 16 1 sh3_zsrt139d6340_pal.mem 0x158afe76 +341 198092 10240 480 sh3_zsrt139d6341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6341.mem 449 49 1 sh3_zsrt139d6341_pal.mem 0x158afe76 +342 198092 10240 480 sh3_zsrt139d6342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6342.mem 125 13 1 sh3_zsrt139d6342_pal.mem 0x158afe76 +343 198092 10240 480 sh3_zsrt139d6343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6343.mem 62 6 1 sh3_zsrt139d6343_pal.mem 0x158afe76 +344 198092 10240 480 sh3_zsrt139d6344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6344.mem 53 5 1 sh3_zsrt139d6344_pal.mem 0x158afe76 +345 198092 10240 480 sh3_zsrt139d6345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6345.mem 125 13 1 sh3_zsrt139d6345_pal.mem 0x158afe76 +346 198092 10240 480 sh3_zsrt139d6346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6346.mem 125 13 1 sh3_zsrt139d6346_pal.mem 0x158afe76 +347 198092 10240 480 sh3_zsrt139d6347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6347.mem 377 41 1 sh3_zsrt139d6347_pal.mem 0x158afe76 +348 198092 10240 480 sh3_zsrt139d6348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6348.mem 512 56 1 sh3_zsrt139d6348_pal.mem 0x158afe76 +349 198092 10240 480 sh3_zsrt139d6349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6349.mem 539 59 1 sh3_zsrt139d6349_pal.mem 0x158afe76 +350 198092 10240 480 sh3_zsrt139d6350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6350.mem 53 5 1 sh3_zsrt139d6350_pal.mem 0x158afe76 +351 198092 10240 480 sh3_zsrt139d6351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6351.mem 53 5 1 sh3_zsrt139d6351_pal.mem 0x158afe76 +352 198092 10240 480 sh3_zsrt139d6352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6352.mem 71 7 1 sh3_zsrt139d6352_pal.mem 0x158afe76 +353 198092 10240 480 sh3_zsrt139d6353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6353.mem 161 17 1 sh3_zsrt139d6353_pal.mem 0x158afe76 +354 198092 10240 480 sh3_zsrt139d6354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6354.mem 206 22 1 sh3_zsrt139d6354_pal.mem 0x158afe76 +355 198092 10240 480 sh3_zsrt139d6355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6355.mem 89 9 1 sh3_zsrt139d6355_pal.mem 0x158afe76 +356 198092 10240 480 sh3_zsrt139d6356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6356.mem 89 9 1 sh3_zsrt139d6356_pal.mem 0x158afe76 +357 198092 10240 480 sh3_zsrt139d6357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6357.mem 143 15 1 sh3_zsrt139d6357_pal.mem 0x158afe76 +358 198092 10240 480 sh3_zsrt139d6358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6358.mem 368 40 1 sh3_zsrt139d6358_pal.mem 0x158afe76 +359 198092 10240 480 sh3_zsrt139d6359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6359.mem 80 8 1 sh3_zsrt139d6359_pal.mem 0x158afe76 +360 198092 10240 480 sh3_zsrt139d6360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6360.mem 152 16 1 sh3_zsrt139d6360_pal.mem 0x158afe76 +361 198092 10240 480 sh3_zsrt139d6361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6361.mem 314 34 1 sh3_zsrt139d6361_pal.mem 0x158afe76 +362 198092 10240 480 sh3_zsrt139d6362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6362.mem 116 12 1 sh3_zsrt139d6362_pal.mem 0x158afe76 +363 198092 10240 480 sh3_zsrt139d6363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6363.mem 197 21 1 sh3_zsrt139d6363_pal.mem 0x158afe76 +364 198092 10240 480 sh3_zsrt139d6364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6364.mem 143 15 1 sh3_zsrt139d6364_pal.mem 0x158afe76 +365 198092 10240 480 sh3_zsrt139d6365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6365.mem 503 55 1 sh3_zsrt139d6365_pal.mem 0x158afe76 +366 198092 10240 480 sh3_zsrt139d6366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6366.mem 449 49 1 sh3_zsrt139d6366_pal.mem 0x158afe76 +367 198092 10240 480 sh3_zsrt139d6367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6367.mem 395 43 1 sh3_zsrt139d6367_pal.mem 0x158afe76 +368 198092 10240 480 sh3_zsrt139d6368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6368.mem 413 45 1 sh3_zsrt139d6368_pal.mem 0x158afe76 +369 198092 10240 480 sh3_zsrt139d6369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6369.mem 449 49 1 sh3_zsrt139d6369_pal.mem 0x158afe76 +370 198092 10240 480 sh3_zsrt139d6370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6370.mem 584 64 1 sh3_zsrt139d6370_pal.mem 0x158afe76 +371 198092 10240 480 sh3_zsrt139d6371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6371.mem 125 13 1 sh3_zsrt139d6371_pal.mem 0x158afe76 +372 198092 10240 480 sh3_zsrt139d6372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6372.mem 80 8 1 sh3_zsrt139d6372_pal.mem 0x158afe76 +373 198092 10240 480 sh3_zsrt139d6373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6373.mem 152 16 1 sh3_zsrt139d6373_pal.mem 0x158afe76 +374 198092 10240 480 sh3_zsrt139d6374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6374.mem 107 11 1 sh3_zsrt139d6374_pal.mem 0x158afe76 +375 198092 10240 480 sh3_zsrt139d6375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6375.mem 98 10 1 sh3_zsrt139d6375_pal.mem 0x158afe76 +376 198092 10240 480 sh3_zsrt139d6376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6376.mem 152 16 1 sh3_zsrt139d6376_pal.mem 0x158afe76 +377 198092 10240 480 sh3_zsrt139d6377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6377.mem 314 34 1 sh3_zsrt139d6377_pal.mem 0x158afe76 +378 198092 10240 480 sh3_zsrt139d6378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6378.mem 53 5 1 sh3_zsrt139d6378_pal.mem 0x158afe76 +379 198092 10240 480 sh3_zsrt139d6379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6379.mem 62 6 1 sh3_zsrt139d6379_pal.mem 0x158afe76 +380 198092 10240 480 sh3_zsrt139d6380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6380.mem 152 16 1 sh3_zsrt139d6380_pal.mem 0x158afe76 +381 198092 10240 480 sh3_zsrt139d6381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6381.mem 197 21 1 sh3_zsrt139d6381_pal.mem 0x158afe76 +382 198092 10240 480 sh3_zsrt139d6382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6382.mem 287 31 1 sh3_zsrt139d6382_pal.mem 0x158afe76 +383 198092 10240 480 sh3_zsrt139d6383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6383.mem 566 62 1 sh3_zsrt139d6383_pal.mem 0x158afe76 +384 198092 10240 480 sh3_zsrt139d6384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6384.mem 980 108 1 sh3_zsrt139d6384_pal.mem 0x158afe76 +385 198092 10240 480 sh3_zsrt139d6385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6385.mem 107 11 1 sh3_zsrt139d6385_pal.mem 0x158afe76 +386 198092 10240 480 sh3_zsrt139d6386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6386.mem 602 66 1 sh3_zsrt139d6386_pal.mem 0x158afe76 +387 198092 10240 480 sh3_zsrt139d6387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6387.mem 377 41 1 sh3_zsrt139d6387_pal.mem 0x158afe76 +388 198092 10240 480 sh3_zsrt139d6388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6388.mem 89 9 1 sh3_zsrt139d6388_pal.mem 0x158afe76 +389 198092 10240 480 sh3_zsrt139d6389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6389.mem 152 16 1 sh3_zsrt139d6389_pal.mem 0x158afe76 +390 198092 10240 480 sh3_zsrt139d6390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6390.mem 305 33 1 sh3_zsrt139d6390_pal.mem 0x158afe76 +391 198092 10240 480 sh3_zsrt139d6391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6391.mem 98 10 1 sh3_zsrt139d6391_pal.mem 0x158afe76 +392 198092 10240 480 sh3_zsrt139d6392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6392.mem 71 7 1 sh3_zsrt139d6392_pal.mem 0x158afe76 +393 198092 10240 480 sh3_zsrt139d6393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6393.mem 71 7 1 sh3_zsrt139d6393_pal.mem 0x158afe76 +394 198092 10240 480 sh3_zsrt139d6394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6394.mem 80 8 1 sh3_zsrt139d6394_pal.mem 0x158afe76 +395 198092 10240 480 sh3_zsrt139d6395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6395.mem 179 19 1 sh3_zsrt139d6395_pal.mem 0x158afe76 +396 198092 10240 480 sh3_zsrt139d6396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6396.mem 251 27 1 sh3_zsrt139d6396_pal.mem 0x158afe76 +397 198092 10240 480 sh3_zsrt139d6397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6397.mem 278 30 1 sh3_zsrt139d6397_pal.mem 0x158afe76 +398 198092 10240 480 sh3_zsrt139d6398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6398.mem 125 13 1 sh3_zsrt139d6398_pal.mem 0x158afe76 +399 198092 10240 480 sh3_zsrt139d6399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6399.mem 251 27 1 sh3_zsrt139d6399_pal.mem 0x158afe76 +400 198092 10240 480 sh3_zsrt139d6400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6400.mem 449 49 1 sh3_zsrt139d6400_pal.mem 0x158afe76 +401 198092 10240 480 sh3_zsrt139d6401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6401.mem 125 13 1 sh3_zsrt139d6401_pal.mem 0x158afe76 +402 198092 10240 480 sh3_zsrt139d6402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6402.mem 71 7 1 sh3_zsrt139d6402_pal.mem 0x158afe76 +403 198092 10240 480 sh3_zsrt139d6403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6403.mem 53 5 1 sh3_zsrt139d6403_pal.mem 0x158afe76 +404 198092 10240 480 sh3_zsrt139d6404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6404.mem 53 5 1 sh3_zsrt139d6404_pal.mem 0x158afe76 +405 198092 10240 480 sh3_zsrt139d6405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6405.mem 44 4 1 sh3_zsrt139d6405_pal.mem 0x158afe76 +406 198092 10240 480 sh3_zsrt139d6406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6406.mem 44 4 1 sh3_zsrt139d6406_pal.mem 0x158afe76 +407 198092 10240 480 sh3_zsrt139d6407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6407.mem 98 10 1 sh3_zsrt139d6407_pal.mem 0x158afe76 +408 198092 10240 480 sh3_zsrt139d6408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6408.mem 80 8 1 sh3_zsrt139d6408_pal.mem 0x158afe76 +409 198092 10240 480 sh3_zsrt139d6409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6409.mem 62 6 1 sh3_zsrt139d6409_pal.mem 0x158afe76 +410 198092 10240 480 sh3_zsrt139d6410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6410.mem 80 8 1 sh3_zsrt139d6410_pal.mem 0x158afe76 +411 198092 10240 480 sh3_zsrt139d6411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6411.mem 107 11 1 sh3_zsrt139d6411_pal.mem 0x158afe76 +412 198092 10240 480 sh3_zsrt139d6412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6412.mem 206 22 1 sh3_zsrt139d6412_pal.mem 0x158afe76 +413 198092 10240 480 sh3_zsrt139d6413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6413.mem 719 79 1 sh3_zsrt139d6413_pal.mem 0x158afe76 +414 198092 10240 480 sh3_zsrt139d6414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6414.mem 494 54 1 sh3_zsrt139d6414_pal.mem 0x158afe76 +415 198092 10240 480 sh3_zsrt139d6415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6415.mem 89 9 1 sh3_zsrt139d6415_pal.mem 0x158afe76 +416 198092 10240 480 sh3_zsrt139d6416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6416.mem 179 19 1 sh3_zsrt139d6416_pal.mem 0x158afe76 +417 198092 10240 480 sh3_zsrt139d6417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6417.mem 242 26 1 sh3_zsrt139d6417_pal.mem 0x158afe76 +418 198092 10240 480 sh3_zsrt139d6418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6418.mem 89 9 1 sh3_zsrt139d6418_pal.mem 0x158afe76 +419 198092 10240 480 sh3_zsrt139d6419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6419.mem 80 8 1 sh3_zsrt139d6419_pal.mem 0x158afe76 +420 198092 10240 480 sh3_zsrt139d6420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6420.mem 170 18 1 sh3_zsrt139d6420_pal.mem 0x158afe76 +421 198092 10240 480 sh3_zsrt139d6421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6421.mem 143 15 1 sh3_zsrt139d6421_pal.mem 0x158afe76 +422 198092 10240 480 sh3_zsrt139d6422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6422.mem 80 8 1 sh3_zsrt139d6422_pal.mem 0x158afe76 +423 198092 10240 480 sh3_zsrt139d6423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6423.mem 62 6 1 sh3_zsrt139d6423_pal.mem 0x158afe76 +424 198092 10240 480 sh3_zsrt139d6424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6424.mem 125 13 1 sh3_zsrt139d6424_pal.mem 0x158afe76 +425 198092 10240 480 sh3_zsrt139d6425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6425.mem 197 21 1 sh3_zsrt139d6425_pal.mem 0x158afe76 +426 198092 10240 480 sh3_zsrt139d6426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6426.mem 188 20 1 sh3_zsrt139d6426_pal.mem 0x158afe76 +427 198092 10240 480 sh3_zsrt139d6427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6427.mem 62 6 1 sh3_zsrt139d6427_pal.mem 0x158afe76 +428 198092 10240 480 sh3_zsrt139d6428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6428.mem 44 4 1 sh3_zsrt139d6428_pal.mem 0x158afe76 +429 198092 10240 480 sh3_zsrt139d6429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6429.mem 44 4 1 sh3_zsrt139d6429_pal.mem 0x158afe76 +430 198092 10240 480 sh3_zsrt139d6430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6430.mem 35 3 1 sh3_zsrt139d6430_pal.mem 0x158afe76 +431 198092 10240 480 sh3_zsrt139d6431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6431.mem 44 4 1 sh3_zsrt139d6431_pal.mem 0x158afe76 +432 198092 10240 480 sh3_zsrt139d6432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6432.mem 62 6 1 sh3_zsrt139d6432_pal.mem 0x158afe76 +433 198092 10240 480 sh3_zsrt139d6433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6433.mem 98 10 1 sh3_zsrt139d6433_pal.mem 0x158afe76 +434 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +435 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +436 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +437 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +438 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +439 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +440 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +441 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +442 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +443 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +444 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +445 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +446 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +447 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +448 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +449 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +450 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +451 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10_epochs.txt new file mode 100644 index 0000000..494dd18 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10_epochs.txt @@ -0,0 +1,128 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:73', 'zsrt139f10g', 'zsrt139f5@77:124'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g0.mem 485 53 0 sh3_zsrt139f10g0_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g1.mem 557 61 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g2.mem 143 15 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +76 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g3.mem 575 63 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +77 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g4.mem 494 54 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10g_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10g_epochs.txt new file mode 100644 index 0000000..3853353 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f10g_epochs.txt @@ -0,0 +1,11 @@ +# Ch413 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g0.mem 485 53 0 sh3_zsrt139f10g0_pal.mem 0x47097d4c +1 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g1.mem 557 61 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +2 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g2.mem 143 15 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +3 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g3.mem 575 63 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +4 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g4.mem 494 54 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11_epochs.txt new file mode 100644 index 0000000..4126966 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11_epochs.txt @@ -0,0 +1,148 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f10', 'zsrt139f11d'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 145 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g0.mem 485 53 0 sh3_zsrt139f10g0_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g1.mem 557 61 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g2.mem 143 15 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +76 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g3.mem 575 63 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +77 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g4.mem 494 54 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +125 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +126 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +127 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11d_epochs.txt new file mode 100644 index 0000000..3ae321c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f11d_epochs.txt @@ -0,0 +1,23 @@ +# Ch414 authentic PSMCT32 intermediate darkening sprites +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +1 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +2 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +3 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +4 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +5 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +6 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +7 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +8 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +9 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +10 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +11 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +12 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +13 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +14 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +15 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +16 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +17 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +18 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +19 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f15_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f15_epochs.txt new file mode 100644 index 0000000..b3edfe2 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f15_epochs.txt @@ -0,0 +1,130 @@ +# Ch415 epoch descriptor table (124 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f150_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f150.mem 44 4 0 sh3_zsrt139f150_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f151_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f151.mem 1547 171 0 sh3_zsrt139f151_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f151_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f152.mem 1772 196 1 sh3_zsrt139f151_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f153_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f153.mem 350 38 0 sh3_zsrt139f153_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f154.mem 1277 141 0 sh3_zsrt139f154_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f155.mem 107 11 1 sh3_zsrt139f154_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f156.mem 620 68 1 sh3_zsrt139f154_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f157.mem 224 24 0 sh3_zsrt139f157_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f158.mem 593 65 1 sh3_zsrt139f157_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f159.mem 332 36 1 sh3_zsrt139f157_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1510.mem 53 5 0 sh3_zsrt139f1510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1511.mem 359 39 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1512.mem 602 66 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1513.mem 944 104 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1514.mem 557 61 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1515.mem 737 81 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1516.mem 1115 123 1 sh3_zsrt139f1510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1517.mem 728 80 0 sh3_zsrt139f1517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1518.mem 341 37 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1519.mem 296 32 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1520.mem 530 58 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1521.mem 683 75 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1522.mem 422 46 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1523.mem 665 73 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1524.mem 1151 127 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1525.mem 566 62 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1526.mem 638 70 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1527.mem 458 50 0 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1528.mem 476 52 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1529.mem 845 93 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1530.mem 629 69 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1531.mem 728 80 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1532.mem 476 52 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1533.mem 854 94 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1534.mem 602 66 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1535.mem 395 43 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1536.mem 26 2 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1537.mem 2042 226 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1538.mem 899 99 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1539.mem 1745 193 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1540.mem 485 53 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1541.mem 188 20 0 sh3_zsrt139f1541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1542.mem 1376 152 0 sh3_zsrt139f1542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1543.mem 2042 226 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1544.mem 170 18 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1545.mem 2042 226 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1546.mem 224 24 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1547.mem 1421 157 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1548.mem 1457 161 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1549.mem 1988 220 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1550.mem 1547 171 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1551.mem 1187 131 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1552.mem 503 55 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1553.mem 1331 147 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1554.mem 1502 166 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1555.mem 575 63 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1556.mem 1070 118 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1557.mem 863 95 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1558.mem 791 87 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1559.mem 152 16 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1560.mem 260 28 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1561.mem 314 34 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1562.mem 62 6 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1563.mem 359 39 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1564.mem 359 39 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1565.mem 557 61 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1566.mem 467 51 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1567.mem 449 49 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1568.mem 62 6 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1569.mem 1205 133 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1570.mem 1025 113 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1571.mem 1673 185 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1572.mem 233 25 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1573.mem 485 53 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1574.mem 557 61 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1575.mem 521 57 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1576.mem 683 75 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1577.mem 1376 152 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1578.mem 944 104 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1579.mem 620 68 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1580.mem 53 5 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1581.mem 26 2 1 sh3_zsrt139f1542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f1582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1582.mem 179 19 0 sh3_zsrt139f1582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f1582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1583.mem 116 12 1 sh3_zsrt139f1582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1584.mem 1052 116 0 sh3_zsrt139f1584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1585.mem 278 30 1 sh3_zsrt139f1584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1586.mem 332 36 1 sh3_zsrt139f1584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1587.mem 710 78 0 sh3_zsrt139f1587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1588.mem 638 70 1 sh3_zsrt139f1587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1589.mem 1016 112 1 sh3_zsrt139f1587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1590.mem 1043 115 0 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1591.mem 854 94 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1592.mem 701 77 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1593.mem 701 77 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1594.mem 377 41 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1595.mem 314 34 0 sh3_zsrt139f1595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1596.mem 269 29 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1597.mem 377 41 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1598.mem 179 19 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1599.mem 44 4 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15100.mem 359 39 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15101.mem 206 22 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15102.mem 206 22 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15103.mem 188 20 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15104.mem 98 10 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15105.mem 89 9 1 sh3_zsrt139f1595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15106.mem 1268 140 0 sh3_zsrt139f15106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15107.mem 1106 122 1 sh3_zsrt139f15106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15108.mem 755 83 1 sh3_zsrt139f15106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15109.mem 809 89 1 sh3_zsrt139f15106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15110.mem 503 55 1 sh3_zsrt139f15106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15111.mem 116 12 1 sh3_zsrt139f15106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15112.mem 368 40 0 sh3_zsrt139f15112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15113.mem 287 31 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15114.mem 440 48 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15115.mem 296 32 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15116.mem 395 43 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15117.mem 377 41 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15118.mem 251 27 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15119.mem 314 34 1 sh3_zsrt139f15112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f15120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15120.mem 647 71 0 sh3_zsrt139f15120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f15120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15121.mem 377 41 1 sh3_zsrt139f15120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f15122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f15122.mem 395 43 0 sh3_zsrt139f15122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f15122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f15123.mem 251 27 1 sh3_zsrt139f15122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_board_run.log new file mode 100644 index 0000000..7eac441 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_board_run.log @@ -0,0 +1,762 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f16_epochs.txt: 124 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 171 tris/1547 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 196 tris/1772 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 141 tris/1277 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 11 tris/107 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 68 tris/620 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 24 tris/224 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 5 tris/53 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 39 tris/359 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 61 tris/557 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 123 tris/1115 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 80 tris/728 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 37 tris/341 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 58 tris/530 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 73 tris/665 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 127 tris/1151 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 62 tris/566 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 70 tris/638 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 50 tris/458 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 93 tris/845 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 69 tris/629 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 80 tris/728 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 94 tris/854 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 66 tris/602 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 43 tris/395 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 99 tris/899 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 193 tris/1745 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 53 tris/485 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 152 tris/1376 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 157 tris/1421 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 161 tris/1457 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 50: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 171 tris/1547 words +[sched] epoch 51: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 131 tris/1187 words +[sched] epoch 52: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 55 tris/503 words +[sched] epoch 53: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 147 tris/1331 words +[sched] epoch 54: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 56: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 118 tris/1070 words +[sched] epoch 57: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 95 tris/863 words +[sched] epoch 58: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 87 tris/791 words +[sched] epoch 59: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 16 tris/152 words +[sched] epoch 60: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 28 tris/260 words +[sched] epoch 61: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 34 tris/314 words +[sched] epoch 62: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 63: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 39 tris/359 words +[sched] epoch 64: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 39 tris/359 words +[sched] epoch 65: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 66: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 51 tris/467 words +[sched] epoch 67: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 49 tris/449 words +[sched] epoch 68: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 69: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 133 tris/1205 words +[sched] epoch 70: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 113 tris/1025 words +[sched] epoch 71: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 185 tris/1673 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 25 tris/233 words +[sched] epoch 73: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 75 tris/683 words +[sched] epoch 77: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 152 tris/1376 words +[sched] epoch 78: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 104 tris/944 words +[sched] epoch 79: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 81: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 82: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 83: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 84: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 116 tris/1052 words +[sched] epoch 85: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 86: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 87: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 78 tris/710 words +[sched] epoch 88: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 70 tris/638 words +[sched] epoch 89: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 112 tris/1016 words +[sched] epoch 90: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 115 tris/1043 words +[sched] epoch 91: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 94 tris/854 words +[sched] epoch 92: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 93: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 41 tris/377 words +[sched] epoch 95: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 34 tris/314 words +[sched] epoch 96: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 29 tris/269 words +[sched] epoch 97: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 41 tris/377 words +[sched] epoch 98: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 19 tris/179 words +[sched] epoch 99: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 100: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 39 tris/359 words +[sched] epoch 101: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 22 tris/206 words +[sched] epoch 102: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 22 tris/206 words +[sched] epoch 103: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 10 tris/98 words +[sched] epoch 105: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 9 tris/89 words +[sched] epoch 106: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 140 tris/1268 words +[sched] epoch 107: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 122 tris/1106 words +[sched] epoch 108: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 83 tris/755 words +[sched] epoch 109: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 89 tris/809 words +[sched] epoch 110: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 55 tris/503 words +[sched] epoch 111: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 12 tris/116 words +[sched] epoch 112: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 40 tris/368 words +[sched] epoch 113: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 48 tris/440 words +[sched] epoch 115: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 32 tris/296 words +[sched] epoch 116: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 43 tris/395 words +[sched] epoch 117: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 41 tris/377 words +[sched] epoch 118: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 27 tris/251 words +[sched] epoch 119: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 34 tris/314 words +[sched] epoch 120: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 71 tris/647 words +[sched] epoch 121: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 41 tris/377 words +[sched] epoch 122: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 43 tris/395 words +[sched] epoch 123: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 27 tris/251 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=34 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1547 words, staged_addr=1547 (exp 1547, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=171 (exp 171), FB beats=2066 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1772 words, staged_addr=1772 (exp 1772, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=196 (exp 196), FB beats=4632 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=5094 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1277 words, staged_addr=1277 (exp 1277, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=141 (exp 141), FB beats=8015 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=8337 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=9732 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=9765 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=10023 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=10247 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->5, FB beats 10247->10255) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=10255 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=10372 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=10609 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=10990 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=11236 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=11637 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1115 words, staged_addr=1115 (exp 1115, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=123 (exp 123), FB beats=12479 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=12809 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=12914 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=13002 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=13298 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=13685 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=13838 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=14294 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1151 words, staged_addr=1151 (exp 1151, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=127 (exp 127), FB beats=15058 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=15448 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 638 words, staged_addr=638 (exp 638, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=70 (exp 70), FB beats=15839 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=16231 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=16373 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=16892 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=17083 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=17302 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=17490 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 854 words, staged_addr=854 (exp 854, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=17808 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=17893 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=17938 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 43->2, FB beats 17938->17950) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=17950 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=20519 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 899 words, staged_addr=899 (exp 899, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=99 (exp 99), FB beats=21291 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1745 words, staged_addr=1745 (exp 1745, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=193 (exp 193), FB beats=24321 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=24699 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=24817 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1376 words, staged_addr=1376 (exp 1376, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=152 (exp 152), FB beats=25231 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=25977 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=26081 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=27529 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=27726 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1421 words, staged_addr=1421 (exp 1421, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=157 (exp 157), FB beats=28790 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=29665 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=30739 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 1547 words, staged_addr=1547 (exp 1547, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=171 (exp 171), FB beats=31294 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=32069 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=32474 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=33463 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=36312 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=36998 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=38441 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 863 words, staged_addr=863 (exp 863, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=95 (exp 95), FB beats=39615 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=41245 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=41272 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=41366 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=41513 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 62: drain low pulse completed between host polls; counters advanced (records 34->6, FB beats 41513->41560) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41560 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=41756 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=42002 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=42527 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=42946 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=43181 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 68: drain low pulse completed between host polls; counters advanced (records 49->6, FB beats 43181->43211) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=43211 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=43985 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=44782 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1673 words, staged_addr=1673 (exp 1673, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=185 (exp 185), FB beats=47595 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=48240 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=50226 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=52274 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=54506 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=56054 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 1376 words, staged_addr=1376 (exp 1376, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=152 (exp 152), FB beats=57480 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=59865 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=62334 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=62537 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 81: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 62537->62538) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=62538 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 82 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 82: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=62581 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=62659 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 84 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 84: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=62879 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=62964 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=63038 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 87 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 87: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=63310 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 638 words, staged_addr=638 (exp 638, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=70 (exp 70), FB beats=63695 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=64192 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 90 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 90: streamed 1043 words, staged_addr=1043 (exp 1043, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=115 (exp 115), FB beats=64564 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 854 words, staged_addr=854 (exp 854, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=64911 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=65128 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=65337 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=65473 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 95 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 95: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=65518 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=65565 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=65609 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=65627 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 99: drain low pulse completed between host polls; counters advanced (records 19->4, FB beats 65627->65630) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=65630 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=65679 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65752 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65780 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=65847 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 104: drain low pulse completed between host polls; counters advanced (records 20->10, FB beats 65847->65860) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=65860 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 105: drain low pulse completed between host polls; counters advanced (records 10->9, FB beats 65860->65870) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=65870 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 106 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 106: streamed 1268 words, staged_addr=1268 (exp 1268, < 4096) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=140 (exp 140), FB beats=66277 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1106 words, staged_addr=1106 (exp 1106, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=122 (exp 122), FB beats=66683 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=67016 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=67306 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=67479 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 111: drain low pulse completed between host polls; counters advanced (records 55->12, FB beats 67479->67510) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=67510 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 112 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 112: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=67584 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=67627 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=67673 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=67738 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=67779 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=67820 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=67858 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=67881 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 120 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 120: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=67996 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=68055 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 122 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 122: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=68127 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 123: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=68157 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f16_board_fb.mem sum32=0x7471b496 xor32=0x81d4dea0 nonzero=114231 bounds=(1,11)..(512,478) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (124-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_epochs.txt new file mode 100644 index 0000000..6da834d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_epochs.txt @@ -0,0 +1,130 @@ +# Ch415 epoch descriptor table (124 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f160_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f160.mem 44 4 0 sh3_zsrt139f160_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f161_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f161.mem 1547 171 0 sh3_zsrt139f161_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f161_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f162.mem 1772 196 1 sh3_zsrt139f161_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f163_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f163.mem 350 38 0 sh3_zsrt139f163_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f164.mem 1277 141 0 sh3_zsrt139f164_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f165.mem 107 11 1 sh3_zsrt139f164_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f166.mem 620 68 1 sh3_zsrt139f164_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f167.mem 224 24 0 sh3_zsrt139f167_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f168.mem 593 65 1 sh3_zsrt139f167_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f169.mem 332 36 1 sh3_zsrt139f167_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1610.mem 53 5 0 sh3_zsrt139f1610_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1611.mem 359 39 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1612.mem 602 66 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1613.mem 944 104 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1614.mem 557 61 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1615.mem 737 81 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1616.mem 1115 123 1 sh3_zsrt139f1610_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1617.mem 728 80 0 sh3_zsrt139f1617_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1618.mem 341 37 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1619.mem 296 32 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1620.mem 530 58 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1621.mem 683 75 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1622.mem 422 46 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1623.mem 665 73 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1624.mem 1151 127 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1625.mem 566 62 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1626.mem 638 70 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1627.mem 458 50 0 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1628.mem 476 52 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1629.mem 845 93 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1630.mem 629 69 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1631.mem 728 80 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1632.mem 476 52 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1633.mem 854 94 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1634.mem 602 66 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1635.mem 395 43 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1636.mem 26 2 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1637.mem 2042 226 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1638.mem 899 99 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1639.mem 1745 193 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1640.mem 485 53 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1641_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1641.mem 188 20 0 sh3_zsrt139f1641_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1642.mem 1376 152 0 sh3_zsrt139f1642_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1643.mem 2042 226 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1644.mem 170 18 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1645.mem 2042 226 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1646.mem 224 24 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1647.mem 1421 157 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1648.mem 1457 161 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1649.mem 1988 220 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1650.mem 1547 171 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1651.mem 1187 131 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1652.mem 503 55 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1653.mem 1331 147 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1654.mem 1502 166 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1655.mem 575 63 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1656.mem 1070 118 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1657.mem 863 95 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1658.mem 791 87 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1659.mem 152 16 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1660.mem 260 28 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1661.mem 314 34 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1662.mem 62 6 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1663.mem 359 39 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1664.mem 359 39 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1665.mem 557 61 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1666.mem 467 51 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1667.mem 449 49 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1668.mem 62 6 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1669.mem 1205 133 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1670.mem 1025 113 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1671.mem 1673 185 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1672.mem 233 25 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1673.mem 485 53 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1674.mem 557 61 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1675.mem 521 57 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1676.mem 683 75 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1677.mem 1376 152 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1678.mem 944 104 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1679.mem 620 68 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1680.mem 53 5 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1681.mem 26 2 1 sh3_zsrt139f1642_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f1682_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1682.mem 179 19 0 sh3_zsrt139f1682_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f1682_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1683.mem 116 12 1 sh3_zsrt139f1682_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1684.mem 1052 116 0 sh3_zsrt139f1684_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1685.mem 278 30 1 sh3_zsrt139f1684_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1686.mem 332 36 1 sh3_zsrt139f1684_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f1687_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1687.mem 710 78 0 sh3_zsrt139f1687_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f1687_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1688.mem 638 70 1 sh3_zsrt139f1687_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f1687_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1689.mem 1016 112 1 sh3_zsrt139f1687_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1690.mem 1043 115 0 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1691.mem 854 94 1 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1692.mem 701 77 1 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1693.mem 701 77 1 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1694.mem 377 41 1 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1695.mem 314 34 0 sh3_zsrt139f1695_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1696.mem 269 29 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1697.mem 377 41 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1698.mem 179 19 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1699.mem 44 4 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16100.mem 359 39 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16101.mem 206 22 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16102.mem 206 22 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16103.mem 188 20 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16104.mem 98 10 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f1695_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f16105.mem 89 9 1 sh3_zsrt139f1695_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16106.mem 1268 140 0 sh3_zsrt139f16106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16107.mem 1106 122 1 sh3_zsrt139f16106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16108.mem 755 83 1 sh3_zsrt139f16106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16109.mem 809 89 1 sh3_zsrt139f16106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16110.mem 503 55 1 sh3_zsrt139f16106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f16106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16111.mem 116 12 1 sh3_zsrt139f16106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16112.mem 368 40 0 sh3_zsrt139f16112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16113.mem 287 31 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16114.mem 440 48 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16115.mem 296 32 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16116.mem 395 43 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16117.mem 377 41 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16118.mem 251 27 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f16112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16119.mem 314 34 1 sh3_zsrt139f16112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f16120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16120.mem 647 71 0 sh3_zsrt139f16120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f16120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f16121.mem 377 41 1 sh3_zsrt139f16120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f16122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f16122.mem 395 43 0 sh3_zsrt139f16122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f16122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f16123.mem 251 27 1 sh3_zsrt139f16122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_board_run.log new file mode 100644 index 0000000..b3cd15c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_board_run.log @@ -0,0 +1,1589 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f17_epochs.txt: 263 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 2: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 3: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 4: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 10 tris/98 words +[sched] epoch 5: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 6: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 7: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 8: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 9: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 10: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 11: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 74 tris/674 words +[sched] epoch 12: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 19 tris/179 words +[sched] epoch 13: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 31 tris/287 words +[sched] epoch 14: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 15: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 16: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 17: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 18: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 19: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 13 tris/125 words +[sched] epoch 20: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 21: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 22: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 23: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 24: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 38 tris/350 words +[sched] epoch 25: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 42 tris/386 words +[sched] epoch 26: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 27: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 28: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 29: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 30: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 31: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 32: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 33: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 34: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 18 tris/170 words +[sched] epoch 35: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 36: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 14 tris/134 words +[sched] epoch 37: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 38: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 39: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 40: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 41: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 42: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 43: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 44: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 45: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 1 tris/17 words +[sched] epoch 46: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 57 tris/521 words +[sched] epoch 47: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 53 tris/485 words +[sched] epoch 48: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 24 tris/224 words +[sched] epoch 49: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 2 tris/26 words +[sched] epoch 50: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 197 tris/1781 words +[sched] epoch 51: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 226 tris/2042 words +[sched] epoch 52: idx12757 tbp10240 cbp480 REUSE resident tex (crc 0x26a88b77) 29 tris/269 words +[sched] epoch 53: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 226 tris/2042 words +[sched] epoch 54: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 87 tris/791 words +[sched] epoch 55: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 78 tris/710 words +[sched] epoch 56: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 25 tris/233 words +[sched] epoch 57: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 93 tris/845 words +[sched] epoch 58: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 149 tris/1349 words +[sched] epoch 59: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 18 tris/170 words +[sched] epoch 60: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 61: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 62: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 63: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 64: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 65: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 36 tris/332 words +[sched] epoch 66: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 67: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 68: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 69: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 70: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 71: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 72: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 73: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 74: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 75: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 60 tris/548 words +[sched] epoch 76: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 19 tris/179 words +[sched] epoch 77: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 78: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 79: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 40 tris/368 words +[sched] epoch 80: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 22 tris/206 words +[sched] epoch 81: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 82: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 83: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 84: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 85: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 86: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 87: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 88: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 89: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 23 tris/215 words +[sched] epoch 90: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 91: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 92: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 93: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 94: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 95: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 96: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 97: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 98: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 99: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 100: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 101: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 102: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 103: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 104: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 105: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 106: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 12 tris/116 words +[sched] epoch 107: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 108: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 109: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 110: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 111: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 112: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 113: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 114: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 13 tris/125 words +[sched] epoch 115: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 116: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 117: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 118: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 119: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 120: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 121: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 122: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 33 tris/305 words +[sched] epoch 123: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 124: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 125: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 16 tris/152 words +[sched] epoch 126: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 127: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 128: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 129: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 130: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 131: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 132: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 133: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 17 tris/161 words +[sched] epoch 134: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 135: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 136: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 137: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 1 tris/17 words +[sched] epoch 138: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 196 tris/1772 words +[sched] epoch 139: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 113 tris/1025 words +[sched] epoch 140: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 147 tris/1331 words +[sched] epoch 141: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 176 tris/1592 words +[sched] epoch 142: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 143: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 29 tris/269 words +[sched] epoch 144: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 105 tris/953 words +[sched] epoch 145: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 208 tris/1880 words +[sched] epoch 146: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 147: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 192 tris/1736 words +[sched] epoch 148: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 140 tris/1268 words +[sched] epoch 149: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 189 tris/1709 words +[sched] epoch 150: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 151: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 150 tris/1358 words +[sched] epoch 152: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 146 tris/1322 words +[sched] epoch 153: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 127 tris/1151 words +[sched] epoch 154: idx83323 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 63 tris/575 words +[sched] epoch 155: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 110 tris/998 words +[sched] epoch 156: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 101 tris/917 words +[sched] epoch 157: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 143 tris/1295 words +[sched] epoch 158: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 216 tris/1952 words +[sched] epoch 159: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 91 tris/827 words +[sched] epoch 160: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 88 tris/800 words +[sched] epoch 161: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 162: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 163: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 169 tris/1529 words +[sched] epoch 164: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 165: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 115 tris/1043 words +[sched] epoch 166: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 48 tris/440 words +[sched] epoch 167: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 8 tris/80 words +[sched] epoch 168: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 169: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 4 tris/44 words +[sched] epoch 170: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 76 tris/692 words +[sched] epoch 171: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 172: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 173: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 126 tris/1142 words +[sched] epoch 174: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 175: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 176: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 132 tris/1196 words +[sched] epoch 177: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 178: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 179: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 180: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 11 tris/107 words +[sched] epoch 181: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 182: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 224 tris/2024 words +[sched] epoch 183: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 184: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 185: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 186: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 119 tris/1079 words +[sched] epoch 187: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 188: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 189: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 128 tris/1160 words +[sched] epoch 190: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 110 tris/998 words +[sched] epoch 191: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 100 tris/908 words +[sched] epoch 192: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 114 tris/1034 words +[sched] epoch 193: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 194: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 195: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 29 tris/269 words +[sched] epoch 196: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 197: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 218 tris/1970 words +[sched] epoch 198: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 199: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 13 tris/125 words +[sched] epoch 200: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 201: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 202: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 147 tris/1331 words +[sched] epoch 203: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 204: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 205: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 168 tris/1520 words +[sched] epoch 206: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 207: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 208: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 28 tris/260 words +[sched] epoch 209: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 73 tris/665 words +[sched] epoch 210: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 211: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 65 tris/593 words +[sched] epoch 212: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 213: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 214: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 34 tris/314 words +[sched] epoch 215: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 169 tris/1529 words +[sched] epoch 216: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 182 tris/1646 words +[sched] epoch 217: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 218: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 219: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 220: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 3 tris/35 words +[sched] epoch 221: idx145712 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 2 tris/26 words +[sched] epoch 222: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 143 tris/1295 words +[sched] epoch 223: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 129 tris/1169 words +[sched] epoch 224: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 150 tris/1358 words +[sched] epoch 225: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 161 tris/1457 words +[sched] epoch 226: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 226 tris/2042 words +[sched] epoch 227: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 33 tris/305 words +[sched] epoch 228: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 214 tris/1934 words +[sched] epoch 229: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 104 tris/944 words +[sched] epoch 230: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 123 tris/1115 words +[sched] epoch 231: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 139 tris/1259 words +[sched] epoch 232: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 155 tris/1403 words +[sched] epoch 233: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 158 tris/1430 words +[sched] epoch 234: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 58 tris/530 words +[sched] epoch 235: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 85 tris/773 words +[sched] epoch 236: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 237: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 53 tris/485 words +[sched] epoch 238: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 94 tris/854 words +[sched] epoch 239: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 240: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 241: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 97 tris/881 words +[sched] epoch 242: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 243: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 244: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 61 tris/557 words +[sched] epoch 245: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 159 tris/1439 words +[sched] epoch 246: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 247: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 248: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 161 tris/1457 words +[sched] epoch 249: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 116 tris/1052 words +[sched] epoch 250: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 48 tris/440 words +[sched] epoch 251: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 97 tris/881 words +[sched] epoch 252: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 98 tris/890 words +[sched] epoch 253: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 95 tris/863 words +[sched] epoch 254: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 110 tris/998 words +[sched] epoch 255: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 256: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 75 tris/683 words +[sched] epoch 257: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 60 tris/548 words +[sched] epoch 258: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 67 tris/611 words +[sched] epoch 259: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 119 tris/1079 words +[sched] epoch 260: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 77 tris/701 words +[sched] epoch 261: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 72 tris/656 words +[sched] epoch 262: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 86 tris/782 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=1656 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 1 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 1: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=3504 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 2: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=5137 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 3 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 3: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=6998 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 4 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 4: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=8870 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 5: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=10751 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 6: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=12335 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 7 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 7: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=14086 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 8: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=15891 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 9: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=17764 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 10 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 10: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=19700 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 11: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=22216 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 12: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=24191 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 13: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25956 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 14: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=27578 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 15: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=29385 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 16: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=31245 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 17 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 17: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=32991 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 18: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=34898 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 19: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=36698 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 20: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=38243 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 21: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=39952 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 22: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41699 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 23: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=43500 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 24: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=45664 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 25: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=47729 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 26: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=49309 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 27 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 27: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=50815 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 28: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=52667 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 29: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=54370 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 30: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=55930 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 31: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=57636 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 32: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=59412 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 33: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=61246 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 34: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=63183 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 35: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=65080 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 36: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=67012 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 37: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=68855 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 38: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=70607 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 39: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=72298 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 40: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=73806 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 41 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 41: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=75452 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 42 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 42: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=77233 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 43: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=78658 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 44: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=80154 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 45: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=80678 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 46 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 46: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=83166 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 47: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=85493 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 48: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=87552 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 49: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=87778 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 50: streamed 1781 words, staged_addr=1781 (exp 1781, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=197 (exp 197), FB beats=87875 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 51 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 51: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=87955 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 52: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=87965 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 53 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 53: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=90040 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 54: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=90976 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 55: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=91771 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 56 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 56: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=91775 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 57: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=91871 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 58: streamed 1349 words, staged_addr=1349 (exp 1349, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=149 (exp 149), FB beats=92292 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 59 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 59: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=94183 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 60: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=96047 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 61: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=97797 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 62: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=99595 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 63: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=101517 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 64: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=103279 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 65: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=105511 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 66: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=107103 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 67: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=108494 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 68: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=109921 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 69: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=111663 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 70: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=113193 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 71: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=114823 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 72: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=116694 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 73: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=118277 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 74: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=119984 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 75: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=122420 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 76: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=124435 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 77: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=126207 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 78: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=127979 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 79: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=130183 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 80: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=132117 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 81: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=133607 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 82: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=135013 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 83 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 83: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=136771 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 84: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=138391 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 85 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 85: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=140233 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 86: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=141847 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 87: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=143508 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 88 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 88: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=145248 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 89: streamed 215 words, staged_addr=215 (exp 215, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=23 (exp 23), FB beats=147314 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 90: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=149211 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 91 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 91: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=150981 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 92: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=152739 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 93: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=154511 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 94: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=156178 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 95: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=158009 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 96 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 96: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=159601 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 97: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=161247 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 98: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=163097 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 99: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=164786 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 100: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=166238 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 101: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=168018 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 102: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=169812 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 103: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=171595 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 104: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=173317 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 105: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=174919 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 106: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=176536 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 107 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 107: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=178301 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 108: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=180044 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 109: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=181794 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 110: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=183537 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 111: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=185222 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 112: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=186795 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 113 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 113: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=188657 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 114: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=190533 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 115: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=192343 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 116: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=194099 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 117: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=195614 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 118: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=197343 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 119: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=199277 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 120: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=201070 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 121 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 121: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=202797 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 122: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=204739 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 123 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 123: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=206551 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 124 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 124: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=208425 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 125: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=210225 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 126 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 126: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=211853 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 127: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=213574 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 128: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=215420 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 129: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=217309 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 130 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 130: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=218977 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 131 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 131: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=220674 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 132 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 132: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=222473 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 133 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 133: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=224375 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 134 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 134: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=226315 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 135: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=228306 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 136: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=230179 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 137: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=230285 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 138 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 138: streamed 1772 words, staged_addr=1772 (exp 1772, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=196 (exp 196), FB beats=230292 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 139: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=230292 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 140: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=230296 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 141 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 141: streamed 1592 words, staged_addr=1592 (exp 1592, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=176 (exp 176), FB beats=230336 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 142: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=230361 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 143 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 143: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=230361 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 144 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 144: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=230595 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 145: streamed 1880 words, staged_addr=1880 (exp 1880, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=208 (exp 208), FB beats=230807 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 146: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=230828 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 147: streamed 1736 words, staged_addr=1736 (exp 1736, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=192 (exp 192), FB beats=231249 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 148: streamed 1268 words, staged_addr=1268 (exp 1268, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=140 (exp 140), FB beats=231683 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 149: streamed 1709 words, staged_addr=1709 (exp 1709, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=189 (exp 189), FB beats=232062 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 150: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=232495 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 151: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=232694 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 152: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=233026 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 153: streamed 1151 words, staged_addr=1151 (exp 1151, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=127 (exp 127), FB beats=233029 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 154 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 154: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=233030 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 155: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=233038 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 156: streamed 917 words, staged_addr=917 (exp 917, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=101 (exp 101), FB beats=233039 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 157: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=233043 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 158: streamed 1952 words, staged_addr=1952 (exp 1952, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=216 (exp 216), FB beats=233044 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 159: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=233047 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 160: streamed 800 words, staged_addr=800 (exp 800, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=88 (exp 88), FB beats=233048 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 161: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=234844 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 162: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=237254 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 163: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=239193 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 164: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=239585 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 165: streamed 1043 words, staged_addr=1043 (exp 1043, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=115 (exp 115), FB beats=240558 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 166 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 166: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=240559 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 167 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 167: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=242199 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 168: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=243945 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 169: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=245649 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 170: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=248156 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 171: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=248194 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 172: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=248201 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 173: streamed 1142 words, staged_addr=1142 (exp 1142, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=126 (exp 126), FB beats=248204 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 174: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248294 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 175: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=248304 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 176: streamed 1196 words, staged_addr=1196 (exp 1196, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=132 (exp 132), FB beats=248307 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 177: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248309 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 178: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=248312 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 179: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248317 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 180: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 180: drain low pulse completed between host polls; counters advanced (records 226->11, FB beats 248317->248317) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=248317 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 181: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=248317 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 182 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 182: streamed 2024 words, staged_addr=2024 (exp 2024, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=224 (exp 224), FB beats=248450 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 183: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248592 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 184: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=248609 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 185: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248696 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 186: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=248780 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 187: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248814 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 188: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249099 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 189: streamed 1160 words, staged_addr=1160 (exp 1160, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=128 (exp 128), FB beats=249293 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 190: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=249323 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 191: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=249607 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 192: streamed 1034 words, staged_addr=1034 (exp 1034, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=114 (exp 114), FB beats=249607 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 193: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=249607 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 194: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=249607 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 195: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=249607 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 196: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=249611 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 197: streamed 1970 words, staged_addr=1970 (exp 1970, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=218 (exp 218), FB beats=249625 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 198: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=249636 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 199: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=249637 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 200: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249944 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 201: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=250033 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 202: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=250420 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 203: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=253417 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 204: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254428 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 205: streamed 1520 words, staged_addr=1520 (exp 1520, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=168 (exp 168), FB beats=254430 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 206: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254439 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 207: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=254475 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 208: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=254479 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 209: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=256073 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 210: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=257844 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 211: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=258778 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=260331 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 213: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=260938 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 214: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=262339 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 215: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=265264 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 216: streamed 1646 words, staged_addr=1646 (exp 1646, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=182 (exp 182), FB beats=265607 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 217: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=267187 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 218: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=268641 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 219: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=269890 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 220: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 220: drain low pulse completed between host polls; counters advanced (records 80->3, FB beats 269890->269890) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=269890 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 221 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 221: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=269890 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 222 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 222: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=270196 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 223: streamed 1169 words, staged_addr=1169 (exp 1169, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=129 (exp 129), FB beats=270593 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 224: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=271056 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 225 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 225: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=271668 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 226: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=272905 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 227: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=273047 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 228: streamed 1934 words, staged_addr=1934 (exp 1934, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=214 (exp 214), FB beats=274381 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 229 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 229: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=274593 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 230: streamed 1115 words, staged_addr=1115 (exp 1115, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=123 (exp 123), FB beats=275089 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 231: streamed 1259 words, staged_addr=1259 (exp 1259, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=139 (exp 139), FB beats=275595 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 232: streamed 1403 words, staged_addr=1403 (exp 1403, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=155 (exp 155), FB beats=276144 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 233: streamed 1430 words, staged_addr=1430 (exp 1430, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=158 (exp 158), FB beats=276766 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 234 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 234: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=276816 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 235: streamed 773 words, staged_addr=773 (exp 773, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=85 (exp 85), FB beats=276949 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 236: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=277087 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 237: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=277149 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 238: streamed 854 words, staged_addr=854 (exp 854, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=277322 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 239: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=277512 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 240: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=277700 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 241: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=277984 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 242: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=278267 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 243: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=278455 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 244: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=278588 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 245 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 245: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=279153 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 246: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=279611 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 247: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=280204 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 248: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=280820 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 249: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=281308 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 250: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=281504 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 251 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 251: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=281644 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 252: streamed 890 words, staged_addr=890 (exp 890, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=98 (exp 98), FB beats=281793 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 253: streamed 863 words, staged_addr=863 (exp 863, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=95 (exp 95), FB beats=281951 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 254: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=282150 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 255: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=282271 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 256: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=282348 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 257: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=282449 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 258: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=282544 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 259 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 259: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=282793 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 260: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=282962 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 261 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 261: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=283086 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 262: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=283289 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f17_board_fb.mem sum32=0x19291e79 xor32=0x05d6395b nonzero=235346 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (263-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_ch417b_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_ch417b_board_run.log new file mode 100644 index 0000000..df4f2bf --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_ch417b_board_run.log @@ -0,0 +1,1588 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f17_epochs.txt: 263 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 2: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 3: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 4: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 10 tris/98 words +[sched] epoch 5: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 6: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 7: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 8: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 9: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 10: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 11: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 74 tris/674 words +[sched] epoch 12: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 19 tris/179 words +[sched] epoch 13: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 31 tris/287 words +[sched] epoch 14: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 15: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 16: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 17: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 18: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 19: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 13 tris/125 words +[sched] epoch 20: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 21: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 22: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 23: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 24: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 38 tris/350 words +[sched] epoch 25: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 42 tris/386 words +[sched] epoch 26: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 27: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 28: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 29: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 30: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 31: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 32: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 33: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 34: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 18 tris/170 words +[sched] epoch 35: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 36: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 14 tris/134 words +[sched] epoch 37: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 38: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 39: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 40: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 41: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 42: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 43: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 44: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 45: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 1 tris/17 words +[sched] epoch 46: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 57 tris/521 words +[sched] epoch 47: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 53 tris/485 words +[sched] epoch 48: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 24 tris/224 words +[sched] epoch 49: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 2 tris/26 words +[sched] epoch 50: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 197 tris/1781 words +[sched] epoch 51: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 226 tris/2042 words +[sched] epoch 52: idx12757 tbp10240 cbp480 REUSE resident tex (crc 0x26a88b77) 29 tris/269 words +[sched] epoch 53: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 226 tris/2042 words +[sched] epoch 54: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 87 tris/791 words +[sched] epoch 55: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 78 tris/710 words +[sched] epoch 56: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 25 tris/233 words +[sched] epoch 57: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 93 tris/845 words +[sched] epoch 58: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 149 tris/1349 words +[sched] epoch 59: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 18 tris/170 words +[sched] epoch 60: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 61: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 62: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 63: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 64: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 65: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 36 tris/332 words +[sched] epoch 66: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 67: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 68: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 69: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 70: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 71: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 72: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 73: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 74: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 75: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 60 tris/548 words +[sched] epoch 76: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 19 tris/179 words +[sched] epoch 77: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 78: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 79: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 40 tris/368 words +[sched] epoch 80: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 22 tris/206 words +[sched] epoch 81: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 82: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 83: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 84: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 85: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 86: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 87: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 88: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 89: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 23 tris/215 words +[sched] epoch 90: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 91: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 92: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 93: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 94: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 95: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 96: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 97: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 98: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 99: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 100: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 101: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 102: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 103: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 104: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 105: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 106: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 12 tris/116 words +[sched] epoch 107: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 108: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 109: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 110: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 111: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 112: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 113: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 114: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 13 tris/125 words +[sched] epoch 115: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 116: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 117: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 118: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 119: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 120: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 121: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 122: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 33 tris/305 words +[sched] epoch 123: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 124: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 125: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 16 tris/152 words +[sched] epoch 126: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 127: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 128: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 129: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 130: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 131: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 132: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 133: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 17 tris/161 words +[sched] epoch 134: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 135: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 136: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 137: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 1 tris/17 words +[sched] epoch 138: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 196 tris/1772 words +[sched] epoch 139: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 113 tris/1025 words +[sched] epoch 140: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 147 tris/1331 words +[sched] epoch 141: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 176 tris/1592 words +[sched] epoch 142: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 143: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 29 tris/269 words +[sched] epoch 144: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 105 tris/953 words +[sched] epoch 145: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 208 tris/1880 words +[sched] epoch 146: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 147: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 192 tris/1736 words +[sched] epoch 148: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 140 tris/1268 words +[sched] epoch 149: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 189 tris/1709 words +[sched] epoch 150: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 151: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 150 tris/1358 words +[sched] epoch 152: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 146 tris/1322 words +[sched] epoch 153: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 127 tris/1151 words +[sched] epoch 154: idx83323 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 63 tris/575 words +[sched] epoch 155: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 110 tris/998 words +[sched] epoch 156: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 101 tris/917 words +[sched] epoch 157: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 143 tris/1295 words +[sched] epoch 158: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 216 tris/1952 words +[sched] epoch 159: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 91 tris/827 words +[sched] epoch 160: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 88 tris/800 words +[sched] epoch 161: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 162: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 163: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 169 tris/1529 words +[sched] epoch 164: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 165: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 115 tris/1043 words +[sched] epoch 166: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 48 tris/440 words +[sched] epoch 167: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 8 tris/80 words +[sched] epoch 168: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 169: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 4 tris/44 words +[sched] epoch 170: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 76 tris/692 words +[sched] epoch 171: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 172: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 173: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 126 tris/1142 words +[sched] epoch 174: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 175: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 176: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 132 tris/1196 words +[sched] epoch 177: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 178: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 179: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 180: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 11 tris/107 words +[sched] epoch 181: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 182: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 224 tris/2024 words +[sched] epoch 183: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 184: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 185: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 186: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 119 tris/1079 words +[sched] epoch 187: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 188: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 189: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 128 tris/1160 words +[sched] epoch 190: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 110 tris/998 words +[sched] epoch 191: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 100 tris/908 words +[sched] epoch 192: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 114 tris/1034 words +[sched] epoch 193: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 194: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 195: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 29 tris/269 words +[sched] epoch 196: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 197: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 218 tris/1970 words +[sched] epoch 198: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 199: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 13 tris/125 words +[sched] epoch 200: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 201: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 202: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 147 tris/1331 words +[sched] epoch 203: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 204: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 205: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 168 tris/1520 words +[sched] epoch 206: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 207: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 208: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 28 tris/260 words +[sched] epoch 209: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 73 tris/665 words +[sched] epoch 210: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 211: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 65 tris/593 words +[sched] epoch 212: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 213: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 214: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 34 tris/314 words +[sched] epoch 215: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 169 tris/1529 words +[sched] epoch 216: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 182 tris/1646 words +[sched] epoch 217: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 218: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 219: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 220: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 3 tris/35 words +[sched] epoch 221: idx145712 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 2 tris/26 words +[sched] epoch 222: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 143 tris/1295 words +[sched] epoch 223: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 129 tris/1169 words +[sched] epoch 224: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 150 tris/1358 words +[sched] epoch 225: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 161 tris/1457 words +[sched] epoch 226: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 226 tris/2042 words +[sched] epoch 227: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 33 tris/305 words +[sched] epoch 228: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 214 tris/1934 words +[sched] epoch 229: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 104 tris/944 words +[sched] epoch 230: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 123 tris/1115 words +[sched] epoch 231: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 139 tris/1259 words +[sched] epoch 232: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 155 tris/1403 words +[sched] epoch 233: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 158 tris/1430 words +[sched] epoch 234: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 58 tris/530 words +[sched] epoch 235: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 85 tris/773 words +[sched] epoch 236: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 237: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 53 tris/485 words +[sched] epoch 238: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 94 tris/854 words +[sched] epoch 239: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 240: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 241: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 97 tris/881 words +[sched] epoch 242: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 243: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 244: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 61 tris/557 words +[sched] epoch 245: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 159 tris/1439 words +[sched] epoch 246: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 247: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 248: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 161 tris/1457 words +[sched] epoch 249: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 116 tris/1052 words +[sched] epoch 250: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 48 tris/440 words +[sched] epoch 251: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 97 tris/881 words +[sched] epoch 252: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 98 tris/890 words +[sched] epoch 253: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 95 tris/863 words +[sched] epoch 254: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 110 tris/998 words +[sched] epoch 255: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 256: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 75 tris/683 words +[sched] epoch 257: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 60 tris/548 words +[sched] epoch 258: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 67 tris/611 words +[sched] epoch 259: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 119 tris/1079 words +[sched] epoch 260: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 77 tris/701 words +[sched] epoch 261: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 72 tris/656 words +[sched] epoch 262: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 86 tris/782 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=1656 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 1 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 1: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=3504 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 2: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=5137 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 3 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 3: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=6998 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 4 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 4: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=8870 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 5: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=10751 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 6: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=12335 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 7 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 7: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=14086 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 8: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=15891 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 9: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=17764 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 10 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 10: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=19700 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 11: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=22229 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 12: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=24204 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 13: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25969 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 14: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=27591 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 15: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=29398 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 16: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=31258 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 17 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 17: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=33004 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 18: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=34911 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 19: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=36711 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 20: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=38256 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 21: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=39965 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 22: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41712 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 23: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=43513 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 24: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=45677 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 25: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=47742 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 26: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=49322 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 27 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 27: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=50828 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 28: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=52680 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 29: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=54383 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 30: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=55943 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 31: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=57649 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 32: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=59425 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 33: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=61259 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 34: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=63196 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 35: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=65093 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 36: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=67025 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 37: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=68868 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 38: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=70620 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 39: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=72311 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 40: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=73819 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 41 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 41: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=75465 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 42 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 42: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=77246 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 43: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=78671 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 44: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=80167 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 45: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=80691 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 46 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 46: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=83179 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 47: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=85506 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 48: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=87565 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 49: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=87791 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 50: streamed 1781 words, staged_addr=1781 (exp 1781, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=197 (exp 197), FB beats=87889 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 51 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 51: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=87971 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 52: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=87983 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 53 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 53: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=90099 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 54: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=91040 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 55: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=91880 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 56 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 56: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=91886 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 57: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=91983 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 58: streamed 1349 words, staged_addr=1349 (exp 1349, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=149 (exp 149), FB beats=92417 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 59 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 59: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=94310 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 60: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=96174 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 61: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=97924 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 62: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=99722 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 63: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=101644 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 64: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=103406 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 65: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=105638 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 66: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=107230 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 67: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=108621 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 68: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=110048 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 69: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=111790 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 70: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=113320 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 71: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=114950 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 72: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=116821 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 73: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=118404 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 74: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=120111 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 75: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=122547 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 76: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=124562 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 77: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=126334 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 78: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=128106 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 79: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=130310 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 80: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=132244 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 81: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=133734 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 82: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=135140 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 83 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 83: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=136898 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 84: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=138518 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 85 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 85: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=140360 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 86: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=141974 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 87: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=143635 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 88 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 88: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=145375 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 89: streamed 215 words, staged_addr=215 (exp 215, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=23 (exp 23), FB beats=147441 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 90: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=149338 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 91 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 91: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=151108 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 92: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=152866 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 93: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=154638 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 94: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=156305 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 95: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=158136 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 96 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 96: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=159728 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 97: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=161374 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 98: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=163224 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 99: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=164913 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 100: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=166365 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 101: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=168145 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 102: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=169939 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 103: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=171722 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 104: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=173444 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 105: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=175046 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 106: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=176663 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 107 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 107: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=178428 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 108: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=180171 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 109: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=181921 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 110: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=183664 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 111: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=185349 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 112: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=186922 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 113 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 113: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=188784 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 114: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=190660 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 115: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=192487 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 116: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=194243 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 117: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=195758 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 118: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=197487 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 119: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=199421 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 120: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=201214 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 121 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 121: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=202941 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 122: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=204883 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 123 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 123: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=206695 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 124 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 124: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=208569 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 125: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=210369 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 126 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 126: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=211997 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 127: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=213718 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 128: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=215564 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 129: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=217453 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 130 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 130: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=219121 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 131 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 131: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=220818 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 132 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 132: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=222617 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 133 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 133: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=224519 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 134 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 134: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=226459 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 135: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=228450 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 136: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=230323 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 137: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=230429 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 138 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 138: streamed 1772 words, staged_addr=1772 (exp 1772, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=196 (exp 196), FB beats=230438 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 139: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=230438 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 140: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=230442 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 141 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 141: streamed 1592 words, staged_addr=1592 (exp 1592, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=176 (exp 176), FB beats=230486 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 142: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=230511 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 143 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 143: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=230511 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 144 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 144: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=230752 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 145: streamed 1880 words, staged_addr=1880 (exp 1880, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=208 (exp 208), FB beats=230967 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 146: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=230989 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 147: streamed 1736 words, staged_addr=1736 (exp 1736, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=192 (exp 192), FB beats=231410 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 148: streamed 1268 words, staged_addr=1268 (exp 1268, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=140 (exp 140), FB beats=231851 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 149: streamed 1709 words, staged_addr=1709 (exp 1709, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=189 (exp 189), FB beats=232252 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 150: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=232711 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 151: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=232907 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 152: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=233244 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 153: streamed 1151 words, staged_addr=1151 (exp 1151, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=127 (exp 127), FB beats=233247 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 154 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 154: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=233249 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 155: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=233257 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 156: streamed 917 words, staged_addr=917 (exp 917, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=101 (exp 101), FB beats=233258 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 157: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=233262 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 158: streamed 1952 words, staged_addr=1952 (exp 1952, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=216 (exp 216), FB beats=233263 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 159: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=233266 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 160: streamed 800 words, staged_addr=800 (exp 800, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=88 (exp 88), FB beats=233267 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 161: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=235152 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 162: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=237615 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 163: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=239579 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 164: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=240010 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 165: streamed 1043 words, staged_addr=1043 (exp 1043, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=115 (exp 115), FB beats=241032 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 166 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 166: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=241033 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 167 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 167: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=242673 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 168: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=244419 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 169: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=246123 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 170: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=248644 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 171: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=248682 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 172: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=248689 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 173: streamed 1142 words, staged_addr=1142 (exp 1142, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=126 (exp 126), FB beats=248691 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 174: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248783 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 175: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=248795 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 176: streamed 1196 words, staged_addr=1196 (exp 1196, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=132 (exp 132), FB beats=248798 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 177: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248800 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 178: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=248803 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 179: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248808 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 180: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=248808 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 181: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=248808 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 182 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 182: streamed 2024 words, staged_addr=2024 (exp 2024, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=224 (exp 224), FB beats=248939 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 183: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249081 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 184: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=249098 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 185: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249189 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 186: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=249266 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 187: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249300 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 188: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249583 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 189: streamed 1160 words, staged_addr=1160 (exp 1160, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=128 (exp 128), FB beats=249774 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 190: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=249797 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 191: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=250096 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 192: streamed 1034 words, staged_addr=1034 (exp 1034, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=114 (exp 114), FB beats=250096 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 193: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=250096 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 194: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=250096 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 195: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=250096 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 196: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=250101 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 197: streamed 1970 words, staged_addr=1970 (exp 1970, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=218 (exp 218), FB beats=250115 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 198: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=250126 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 199: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=250127 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 200: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=250463 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 201: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=250559 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 202: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=250957 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 203: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=253941 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 204: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254955 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 205: streamed 1520 words, staged_addr=1520 (exp 1520, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=168 (exp 168), FB beats=254960 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 206: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254970 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 207: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=255013 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 208: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=255017 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 209: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=256610 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 210: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=258373 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 211: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=259320 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=260867 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 213: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=261449 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 214: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=262854 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 215: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=265786 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 216: streamed 1646 words, staged_addr=1646 (exp 1646, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=182 (exp 182), FB beats=266190 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 217: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=267806 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 218: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=269264 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 219: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=270535 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 220: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 220: drain low pulse completed between host polls; counters advanced (records 80->3, FB beats 270535->270535) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=270535 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 221 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 221: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=270535 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 222 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 222: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=270851 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 223: streamed 1169 words, staged_addr=1169 (exp 1169, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=129 (exp 129), FB beats=271256 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 224: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=271733 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 225 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 225: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=272371 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 226: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=273673 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 227: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=273833 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 228: streamed 1934 words, staged_addr=1934 (exp 1934, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=214 (exp 214), FB beats=275211 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 229 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 229: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=275460 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 230: streamed 1115 words, staged_addr=1115 (exp 1115, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=123 (exp 123), FB beats=275988 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 231: streamed 1259 words, staged_addr=1259 (exp 1259, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=139 (exp 139), FB beats=276527 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 232: streamed 1403 words, staged_addr=1403 (exp 1403, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=155 (exp 155), FB beats=277136 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 233: streamed 1430 words, staged_addr=1430 (exp 1430, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=158 (exp 158), FB beats=277823 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 234 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 234: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=277892 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 235: streamed 773 words, staged_addr=773 (exp 773, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=85 (exp 85), FB beats=278033 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 236: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=278177 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 237: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=278261 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 238: streamed 854 words, staged_addr=854 (exp 854, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=278468 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 239: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=278670 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 240: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=278881 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 241: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=279186 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 242: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=279507 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 243: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=279714 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 244: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=279865 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 245 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 245: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=280445 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 246: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=280934 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 247: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=281566 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 248: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=282208 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 249: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=282712 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 250: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=282935 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 251 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 251: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=283099 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 252: streamed 890 words, staged_addr=890 (exp 890, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=98 (exp 98), FB beats=283276 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 253: streamed 863 words, staged_addr=863 (exp 863, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=95 (exp 95), FB beats=283449 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 254: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=283679 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 255: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=283827 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 256: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=283927 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 257: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=284042 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 258: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=284158 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 259 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 259: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=284428 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 260: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=284606 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 261 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 261: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=284748 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 262: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=284984 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f17_ch417b_board_fb.mem sum32=0xc552c256 xor32=0x90a0ec16 nonzero=235280 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (263-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_epochs.txt new file mode 100644 index 0000000..94d0543 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_epochs.txt @@ -0,0 +1,269 @@ +# Ch416 epoch descriptor table (263 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 263 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 44 4 0 sh3_zsrt139f170_pal.mem 0x60778774 +1 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +2 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +3 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774 +4 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 98 10 1 sh3_zsrt139f170_pal.mem 0x60778774 +5 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774 +6 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +7 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +8 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +9 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +10 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1710.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774 +11 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1711.mem 674 74 1 sh3_zsrt139f170_pal.mem 0x60778774 +12 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1712.mem 179 19 1 sh3_zsrt139f170_pal.mem 0x60778774 +13 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1713.mem 287 31 1 sh3_zsrt139f170_pal.mem 0x60778774 +14 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1714.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +15 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +16 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1716.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +17 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1717.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774 +18 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1718.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774 +19 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1719.mem 125 13 1 sh3_zsrt139f170_pal.mem 0x60778774 +20 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1720.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +21 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1721.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +22 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1722.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +23 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1723.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +24 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1724.mem 350 38 1 sh3_zsrt139f170_pal.mem 0x60778774 +25 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1725.mem 386 42 1 sh3_zsrt139f170_pal.mem 0x60778774 +26 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1726.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +27 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1727.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +28 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1728.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +29 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1729.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +30 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1730.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +31 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1731.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +32 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1732.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +33 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1733.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +34 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1734.mem 170 18 1 sh3_zsrt139f170_pal.mem 0x60778774 +35 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1735.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774 +36 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1736.mem 134 14 1 sh3_zsrt139f170_pal.mem 0x60778774 +37 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1737.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +38 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1738.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +39 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1739.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +40 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1740.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +41 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1741.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +42 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1742.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +43 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1743.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +44 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1744.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +45 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1745.mem 17 1 1 sh3_zsrt139f170_pal.mem 0x60778774 +46 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1746.mem 521 57 0 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +47 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1747.mem 485 53 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +48 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1748.mem 224 24 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +49 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1749.mem 26 2 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +50 8151 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1750.mem 1781 197 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +51 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1751.mem 2042 226 0 sh3_zsrt139f1751_pal.mem 0x3cd88c98 +52 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1752.mem 269 29 1 sh3_zsrt139f1751_pal.mem 0x3cd88c98 +53 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1753.mem 2042 226 0 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +54 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1754.mem 791 87 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +55 15931 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1755.mem 710 78 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +56 20246 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1756.mem 233 25 0 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +57 20792 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1757.mem 845 93 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +58 21386 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1758.mem 1349 149 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +59 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1759.mem 170 18 0 sh3_zsrt139f1759_pal.mem 0x47405cb0 +60 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1760.mem 143 15 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +61 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1761.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +62 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1762.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +63 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1763.mem 188 20 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +64 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1764.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +65 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1765.mem 332 36 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +66 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1766.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +67 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1767.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +68 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1768.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +69 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1769.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +70 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1770.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +71 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1771.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +72 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1772.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +73 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1773.mem 134 14 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +74 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1774.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +75 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1775.mem 548 60 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +76 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1776.mem 179 19 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +77 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1777.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +78 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1778.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +79 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1779.mem 368 40 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +80 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1780.mem 206 22 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +81 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1781.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +82 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1782.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +83 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1783.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +84 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1784.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +85 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1785.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +86 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1786.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +87 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1787.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +88 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1788.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +89 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1789.mem 215 23 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +90 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1790.mem 170 18 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +91 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1791.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +92 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1792.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +93 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1793.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +94 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1794.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +95 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1795.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +96 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1796.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +97 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1797.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +98 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1798.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +99 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1799.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +100 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17100.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +101 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17101.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +102 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17102.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +103 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17103.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +104 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17104.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +105 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17105.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +106 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17106.mem 116 12 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +107 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17107.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +108 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17108.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +109 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17109.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +110 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17110.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +111 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17111.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +112 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17112.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +113 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17113.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +114 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17114.mem 125 13 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +115 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17115.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +116 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17116.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +117 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17117.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +118 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17118.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +119 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17119.mem 170 18 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +120 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17120.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +121 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17121.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +122 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17122.mem 305 33 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +123 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17123.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +124 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17124.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +125 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17125.mem 152 16 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +126 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17126.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +127 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17127.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +128 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17128.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +129 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17129.mem 143 15 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +130 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17130.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +131 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17131.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +132 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17132.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +133 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17133.mem 161 17 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +134 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17134.mem 134 14 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +135 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17135.mem 188 20 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +136 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17136.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +137 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17137.mem 17 1 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +138 33303 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17138.mem 1772 196 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +139 34605 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17139.mem 1025 113 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +140 35907 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17140.mem 1331 147 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +141 37209 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17141.mem 1592 176 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +142 38511 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17142.mem 2042 226 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +143 38511 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17143.mem 269 29 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +144 71148 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17144.mem 953 105 0 sh3_zsrt139f17144_pal.mem 0x43ece1ae +145 71787 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17145.mem 1880 208 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +146 72426 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17146.mem 1187 131 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +147 73065 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17147.mem 1736 192 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +148 73704 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17148.mem 1268 140 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +149 74343 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17149.mem 1709 189 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +150 74982 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17150.mem 1187 131 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +151 75621 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17151.mem 1358 150 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +152 76260 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17152.mem 1322 146 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +153 76899 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17153.mem 1151 127 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +154 83323 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17154.mem 575 63 0 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +155 83944 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17155.mem 998 110 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +156 84565 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17156.mem 917 101 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +157 85186 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17157.mem 1295 143 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +158 85807 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17158.mem 1952 216 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +159 86428 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17159.mem 827 91 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +160 87049 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17160.mem 800 88 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +161 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17161.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +162 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17162.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +163 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17163.mem 1529 169 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +164 90187 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17164.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +165 90187 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17165.mem 1043 115 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +166 91678 9216 480 sh3_zsrt139f17166_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17166.mem 440 48 0 sh3_zsrt139f17166_pal.mem 0x181b2ac2 +167 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17167.mem 80 8 0 sh3_zsrt139f17167_pal.mem 0x47097d4c +168 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17168.mem 62 6 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +169 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17169.mem 44 4 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +170 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17170.mem 692 76 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +171 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17171.mem 26 2 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +172 115016 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17172.mem 1988 220 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +173 115655 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17173.mem 1142 126 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +174 116351 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17174.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +175 116351 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17175.mem 377 41 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +176 117050 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17176.mem 1196 132 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +177 117599 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17177.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +178 117599 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17178.mem 368 40 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +179 118238 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17179.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +180 118238 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17180.mem 107 11 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +181 118877 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17181.mem 395 43 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +182 119471 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17182.mem 2024 224 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +183 120110 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17183.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +184 120110 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17184.mem 935 103 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +185 120749 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17185.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +186 120749 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17186.mem 1079 119 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +187 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17187.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +188 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17188.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +189 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17189.mem 1160 128 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +190 122027 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17190.mem 998 110 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +191 122600 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17191.mem 908 100 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +192 123869 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17192.mem 1034 114 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +193 124508 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17193.mem 377 41 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +194 125786 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17194.mem 413 45 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +195 126434 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17195.mem 269 29 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +196 126968 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17196.mem 620 68 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +197 127607 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17197.mem 1970 218 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +198 128246 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17198.mem 521 57 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +199 128885 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17199.mem 125 13 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +200 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17200.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +201 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17201.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +202 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17202.mem 1331 147 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +203 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17203.mem 1493 165 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +204 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17204.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +205 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17205.mem 1520 168 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +206 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17206.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +207 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17207.mem 1628 180 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +208 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17208.mem 260 28 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +209 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17209.mem 665 73 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +210 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17210.mem 728 80 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +211 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17211.mem 593 65 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +212 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17212.mem 395 43 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +213 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17213.mem 530 58 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +214 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17214.mem 314 34 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +215 131945 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17215.mem 1529 169 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +216 131945 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17216.mem 1646 182 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +217 132584 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17217.mem 1988 220 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +218 132584 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17218.mem 935 103 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +219 133262 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17219.mem 728 80 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +220 135869 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17220.mem 35 3 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +221 145712 12288 480 sh3_zsrt139f17221_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f17221.mem 26 2 0 sh3_zsrt139f17221_pal.mem 0x3e849a98 +222 146205 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17222.mem 1295 143 0 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +223 146630 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17223.mem 1169 129 1 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +224 147068 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17224.mem 1358 150 1 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +225 147480 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17225.mem 1457 161 0 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +226 147888 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17226.mem 2042 226 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +227 147888 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17227.mem 305 33 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +228 148264 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17228.mem 1934 214 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +229 148919 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17229.mem 944 104 0 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +230 149509 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17230.mem 1115 123 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +231 150125 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17231.mem 1259 139 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +232 150741 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17232.mem 1403 155 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +233 151344 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17233.mem 1430 158 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +234 152021 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17234.mem 530 58 0 sh3_zsrt139f17234_pal.mem 0xc6784386 +235 152420 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17235.mem 773 85 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +236 152806 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17236.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +237 153218 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17237.mem 485 53 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +238 153643 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17238.mem 854 94 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +239 154029 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17239.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +240 154428 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17240.mem 665 73 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +241 154853 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17241.mem 881 97 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +242 155265 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17242.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +243 155664 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17243.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +244 156063 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17244.mem 557 61 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +245 156566 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17245.mem 1439 159 0 sh3_zsrt139f17245_pal.mem 0x00fd9028 +246 157273 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17246.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +247 157967 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17247.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +248 158674 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17248.mem 1457 161 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +249 159420 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17249.mem 1052 116 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +250 160114 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17250.mem 440 48 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +251 160331 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17251.mem 881 97 0 sh3_zsrt139f17251_pal.mem 0xd8d19684 +252 160769 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17252.mem 890 98 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +253 161168 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17253.mem 863 95 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +254 161567 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17254.mem 998 110 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +255 162300 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17255.mem 845 93 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +256 162725 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17256.mem 683 75 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +257 163163 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17257.mem 548 60 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +258 163575 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17258.mem 611 67 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +259 164204 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17259.mem 1079 119 0 sh3_zsrt139f17259_pal.mem 0xaa4e7e05 +260 164950 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17260.mem 701 77 1 sh3_zsrt139f17259_pal.mem 0xaa4e7e05 +261 175995 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17261.mem 656 72 0 sh3_zsrt139f17261_pal.mem 0x56ebf1d1 +262 176446 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17262.mem 782 86 1 sh3_zsrt139f17261_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_ch423_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_ch423_board_run.log new file mode 100644 index 0000000..7a399c4 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_ch423_board_run.log @@ -0,0 +1,1711 @@ +[sudo] password for terasic: [sched] feeder ready=1 +[sched] scene sh3_zsrt139f18_epochs.txt: 283 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 2: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 3: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 4: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 10 tris/98 words +[sched] epoch 5: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 6: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 7: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 8: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 9: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 10: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 16 tris/152 words +[sched] epoch 11: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 74 tris/674 words +[sched] epoch 12: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 19 tris/179 words +[sched] epoch 13: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 31 tris/287 words +[sched] epoch 14: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 15: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 16: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 17: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 7 tris/71 words +[sched] epoch 18: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 19: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 13 tris/125 words +[sched] epoch 20: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 21: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 22: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 23: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 24: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 38 tris/350 words +[sched] epoch 25: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 42 tris/386 words +[sched] epoch 26: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 27: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 28: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 29: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 30: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 31: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 32: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 33: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 34: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 18 tris/170 words +[sched] epoch 35: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 12 tris/116 words +[sched] epoch 36: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 14 tris/134 words +[sched] epoch 37: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 8 tris/80 words +[sched] epoch 38: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 6 tris/62 words +[sched] epoch 39: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 5 tris/53 words +[sched] epoch 40: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 41: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 42: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 4 tris/44 words +[sched] epoch 43: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 44: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 3 tris/35 words +[sched] epoch 45: idx1772 tbp12288 cbp480 REUSE resident tex (crc 0x42d367ae) 1 tris/17 words +[sched] epoch 46: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 57 tris/521 words +[sched] epoch 47: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 53 tris/485 words +[sched] epoch 48: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 24 tris/224 words +[sched] epoch 49: idx6822 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 2 tris/26 words +[sched] epoch 50: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 197 tris/1781 words +[sched] epoch 51: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 226 tris/2042 words +[sched] epoch 52: idx12757 tbp10240 cbp480 REUSE resident tex (crc 0x26a88b77) 29 tris/269 words +[sched] epoch 53: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 226 tris/2042 words +[sched] epoch 54: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 87 tris/791 words +[sched] epoch 55: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 78 tris/710 words +[sched] epoch 56: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 25 tris/233 words +[sched] epoch 57: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 93 tris/845 words +[sched] epoch 58: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 149 tris/1349 words +[sched] epoch 59: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 18 tris/170 words +[sched] epoch 60: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 61: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 62: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 63: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 64: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 65: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 36 tris/332 words +[sched] epoch 66: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 67: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 68: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 69: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 70: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 71: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 72: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 73: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 74: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 75: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 60 tris/548 words +[sched] epoch 76: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 19 tris/179 words +[sched] epoch 77: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 78: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 79: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 40 tris/368 words +[sched] epoch 80: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 22 tris/206 words +[sched] epoch 81: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 82: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 83: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 84: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 85: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 86: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 87: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 88: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 89: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 23 tris/215 words +[sched] epoch 90: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 91: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 92: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 93: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 94: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 95: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 96: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 97: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 10 tris/98 words +[sched] epoch 98: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 99: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 100: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 3 tris/35 words +[sched] epoch 101: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 102: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 103: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 104: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 105: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 106: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 12 tris/116 words +[sched] epoch 107: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 108: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 109: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 110: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 111: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 112: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 113: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 114: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 13 tris/125 words +[sched] epoch 115: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 116: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 9 tris/89 words +[sched] epoch 117: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 118: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 6 tris/62 words +[sched] epoch 119: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 18 tris/170 words +[sched] epoch 120: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 8 tris/80 words +[sched] epoch 121: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 122: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 33 tris/305 words +[sched] epoch 123: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 124: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 125: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 16 tris/152 words +[sched] epoch 126: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 127: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 4 tris/44 words +[sched] epoch 128: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 129: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 15 tris/143 words +[sched] epoch 130: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 131: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 5 tris/53 words +[sched] epoch 132: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 7 tris/71 words +[sched] epoch 133: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 17 tris/161 words +[sched] epoch 134: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 14 tris/134 words +[sched] epoch 135: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 20 tris/188 words +[sched] epoch 136: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 11 tris/107 words +[sched] epoch 137: idx30461 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 1 tris/17 words +[sched] epoch 138: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 196 tris/1772 words +[sched] epoch 139: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 113 tris/1025 words +[sched] epoch 140: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 147 tris/1331 words +[sched] epoch 141: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 176 tris/1592 words +[sched] epoch 142: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 143: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 29 tris/269 words +[sched] epoch 144: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 105 tris/953 words +[sched] epoch 145: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 208 tris/1880 words +[sched] epoch 146: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 147: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 192 tris/1736 words +[sched] epoch 148: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 140 tris/1268 words +[sched] epoch 149: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 189 tris/1709 words +[sched] epoch 150: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 151: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 150 tris/1358 words +[sched] epoch 152: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 146 tris/1322 words +[sched] epoch 153: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 127 tris/1151 words +[sched] epoch 154: idx83323 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 63 tris/575 words +[sched] epoch 155: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 110 tris/998 words +[sched] epoch 156: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 101 tris/917 words +[sched] epoch 157: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 143 tris/1295 words +[sched] epoch 158: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 216 tris/1952 words +[sched] epoch 159: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 91 tris/827 words +[sched] epoch 160: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 88 tris/800 words +[sched] epoch 161: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 162: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 163: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 169 tris/1529 words +[sched] epoch 164: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 165: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 115 tris/1043 words +[sched] epoch 166: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 48 tris/440 words +[sched] epoch 167: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 8 tris/80 words +[sched] epoch 168: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 169: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 4 tris/44 words +[sched] epoch 170: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 76 tris/692 words +[sched] epoch 171: idx114431 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 172: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 173: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 126 tris/1142 words +[sched] epoch 174: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 175: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 176: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 132 tris/1196 words +[sched] epoch 177: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 178: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 179: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 180: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 11 tris/107 words +[sched] epoch 181: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 182: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 224 tris/2024 words +[sched] epoch 183: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 184: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 185: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 186: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 119 tris/1079 words +[sched] epoch 187: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 188: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 189: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 128 tris/1160 words +[sched] epoch 190: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 110 tris/998 words +[sched] epoch 191: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 100 tris/908 words +[sched] epoch 192: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 114 tris/1034 words +[sched] epoch 193: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 41 tris/377 words +[sched] epoch 194: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 195: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 29 tris/269 words +[sched] epoch 196: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 197: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 218 tris/1970 words +[sched] epoch 198: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 199: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 13 tris/125 words +[sched] epoch 200: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 201: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 202: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 147 tris/1331 words +[sched] epoch 203: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 204: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 205: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 168 tris/1520 words +[sched] epoch 206: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 207: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 208: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 28 tris/260 words +[sched] epoch 209: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 73 tris/665 words +[sched] epoch 210: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 211: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 65 tris/593 words +[sched] epoch 212: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 43 tris/395 words +[sched] epoch 213: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 214: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 34 tris/314 words +[sched] epoch 215: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 169 tris/1529 words +[sched] epoch 216: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 182 tris/1646 words +[sched] epoch 217: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 220 tris/1988 words +[sched] epoch 218: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 103 tris/935 words +[sched] epoch 219: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 80 tris/728 words +[sched] epoch 220: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 3 tris/35 words +[sched] epoch 221: idx145712 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 2 tris/26 words +[sched] epoch 222: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 143 tris/1295 words +[sched] epoch 223: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 129 tris/1169 words +[sched] epoch 224: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 150 tris/1358 words +[sched] epoch 225: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 161 tris/1457 words +[sched] epoch 226: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 226 tris/2042 words +[sched] epoch 227: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 33 tris/305 words +[sched] epoch 228: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 214 tris/1934 words +[sched] epoch 229: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 104 tris/944 words +[sched] epoch 230: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 123 tris/1115 words +[sched] epoch 231: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 139 tris/1259 words +[sched] epoch 232: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 155 tris/1403 words +[sched] epoch 233: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 158 tris/1430 words +[sched] epoch 234: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 58 tris/530 words +[sched] epoch 235: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 85 tris/773 words +[sched] epoch 236: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 237: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 53 tris/485 words +[sched] epoch 238: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 94 tris/854 words +[sched] epoch 239: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 240: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 241: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 97 tris/881 words +[sched] epoch 242: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 90 tris/818 words +[sched] epoch 243: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 87 tris/791 words +[sched] epoch 244: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 61 tris/557 words +[sched] epoch 245: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 159 tris/1439 words +[sched] epoch 246: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 247: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 143 tris/1295 words +[sched] epoch 248: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 161 tris/1457 words +[sched] epoch 249: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 116 tris/1052 words +[sched] epoch 250: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 48 tris/440 words +[sched] epoch 251: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 97 tris/881 words +[sched] epoch 252: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 98 tris/890 words +[sched] epoch 253: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 95 tris/863 words +[sched] epoch 254: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 110 tris/998 words +[sched] epoch 255: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 256: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 75 tris/683 words +[sched] epoch 257: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 60 tris/548 words +[sched] epoch 258: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 67 tris/611 words +[sched] epoch 259: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 119 tris/1079 words +[sched] epoch 260: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 77 tris/701 words +[sched] epoch 261: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 72 tris/656 words +[sched] epoch 262: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 86 tris/782 words +[sched] epoch 263: idx71361 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 226 tris/2042 words +[sched] epoch 264: idx71361 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 265: idx71361 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 17 tris/161 words +[sched] epoch 266: idx72213 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 267: idx72213 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 268: idx72213 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 2 tris/26 words +[sched] epoch 269: idx73278 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 270: idx73278 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 212 tris/1916 words +[sched] epoch 271: idx74130 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 272: idx74130 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 273: idx74130 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 69 tris/629 words +[sched] epoch 274: idx75195 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 275: idx75195 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 276: idx75195 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 116 tris/1052 words +[sched] epoch 277: idx76047 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 278: idx76047 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 279: idx76047 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 88 tris/800 words +[sched] epoch 280: idx77112 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 281: idx77112 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 226 tris/2042 words +[sched] epoch 282: idx77112 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 50 tris/458 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=1656 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 1 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 1: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=3504 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 2: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=5137 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 3 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 3: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=6998 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 4 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 4: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=8870 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 5: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=10751 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 6: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=12335 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 7 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 7: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=14086 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 8: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=15891 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 9: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=17764 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 10 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 10: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=19700 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 11: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=22229 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 12: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=24204 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 13: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25969 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 14: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=27591 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 15: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=29398 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 16: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=31258 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 17 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 17: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=33004 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 18: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=34911 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 19: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=36711 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 20: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=38256 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 21: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=39965 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 22: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41712 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 23: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=43513 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 24: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=45677 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 25: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=47742 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 26: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=49322 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 27 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 27: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=50828 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 28: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=52680 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 29: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=54383 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 30: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=55943 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 31: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=57649 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 32: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=59425 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 33: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=61259 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 34: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=63196 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 35: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=65093 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 36: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=67025 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 37: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=68868 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 38: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=70620 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 39: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=72311 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 40: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=73819 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 41 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 41: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=75465 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 42 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 42: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=77246 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 43: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=78671 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 44: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=80167 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 45: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=80691 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 46 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 46: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=83179 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 47: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=85506 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 48: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=87565 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 49: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=87791 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 50: streamed 1781 words, staged_addr=1781 (exp 1781, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=197 (exp 197), FB beats=87889 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 51 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 51: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=87971 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 52: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=87983 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 53 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 53: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=90099 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 54: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=91040 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 55: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=91880 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 56 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 56: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=91886 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 57: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=91983 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 58: streamed 1349 words, staged_addr=1349 (exp 1349, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=149 (exp 149), FB beats=92417 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 59 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 59: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=94310 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 60: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=96174 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 61: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=97924 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 62: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=99722 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 63: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=101644 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 64: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=103406 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 65: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=105638 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 66: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=107230 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 67: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=108621 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 68: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=110048 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 69: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=111790 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 70: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=113320 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 71: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=114950 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 72: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=116821 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 73: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=118404 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 74: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=120111 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 75: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=122547 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 76: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=124562 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 77: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=126334 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 78: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=128106 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 79: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=130310 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 80: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=132244 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 81: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=133734 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 82: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=135140 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 83 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 83: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=136898 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 84: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=138518 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 85 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 85: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=140360 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 86: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=141974 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 87: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=143635 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 88 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 88: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=145375 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 89: streamed 215 words, staged_addr=215 (exp 215, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=23 (exp 23), FB beats=147441 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 90: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=149338 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 91 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 91: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=151108 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 92: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=152866 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 93: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=154638 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 94: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=156305 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 95: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=158136 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 96 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 96: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=159728 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 97: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=161374 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 98: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=163224 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 99: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=164913 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 100: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=166365 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 101: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=168145 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 102: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=169939 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 103: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=171722 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 104: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=173444 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 105: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=175046 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 106: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=176663 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 107 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 107: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=178428 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 108: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=180171 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 109: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=181921 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 110: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=183664 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 111: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=185349 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 112: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=186922 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 113 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 113: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=188784 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 114: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=190660 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 115: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=192487 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 116: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=194243 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 117: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=195758 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 118: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=197487 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 119: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=199421 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 120: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=201214 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 121 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 121: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=202941 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 122: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=204883 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 123 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 123: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=206695 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 124 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 124: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=208569 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 125: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=210369 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 126 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 126: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=211997 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 127: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=213718 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 128: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=215564 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 129: streamed 143 words, staged_addr=143 (exp 143, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=15 (exp 15), FB beats=217453 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 130 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 130: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=219121 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 131 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 131: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=220818 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 132 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 132: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=222617 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 133 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 133: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=224519 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 134 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 134: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=226459 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 135: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=228450 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 136: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=230323 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 137: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=230429 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 138 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 138: streamed 1772 words, staged_addr=1772 (exp 1772, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=196 (exp 196), FB beats=230438 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 139: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=230438 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 140: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=230442 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 141 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 141: streamed 1592 words, staged_addr=1592 (exp 1592, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=176 (exp 176), FB beats=230486 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 142: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=230511 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 143 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 143: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=230511 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 144 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 144: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=230752 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 145: streamed 1880 words, staged_addr=1880 (exp 1880, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=208 (exp 208), FB beats=230967 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 146: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=230989 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 147: streamed 1736 words, staged_addr=1736 (exp 1736, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=192 (exp 192), FB beats=231410 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 148: streamed 1268 words, staged_addr=1268 (exp 1268, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=140 (exp 140), FB beats=231851 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 149: streamed 1709 words, staged_addr=1709 (exp 1709, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=189 (exp 189), FB beats=232252 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 150: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=232711 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 151: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=232907 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 152: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=233244 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 153: streamed 1151 words, staged_addr=1151 (exp 1151, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=127 (exp 127), FB beats=233247 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 154 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 154: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=233249 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 155: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=233257 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 156: streamed 917 words, staged_addr=917 (exp 917, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=101 (exp 101), FB beats=233258 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 157: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=233262 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 158: streamed 1952 words, staged_addr=1952 (exp 1952, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=216 (exp 216), FB beats=233263 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 159: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=233266 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 160: streamed 800 words, staged_addr=800 (exp 800, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=88 (exp 88), FB beats=233267 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 161: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=235152 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 162: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=237615 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 163: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=239579 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 164: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=240010 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 165: streamed 1043 words, staged_addr=1043 (exp 1043, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=115 (exp 115), FB beats=241032 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 166 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 166: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=241033 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 167 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 167: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=242673 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 168: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=244419 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 169: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=246123 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 170: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=248644 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 171: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=248682 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 172: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=248689 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 173: streamed 1142 words, staged_addr=1142 (exp 1142, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=126 (exp 126), FB beats=248691 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 174: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248783 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 175: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=248795 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 176: streamed 1196 words, staged_addr=1196 (exp 1196, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=132 (exp 132), FB beats=248798 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 177: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248800 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 178: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=248803 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 179: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=248808 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 180: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 180: drain low pulse completed between host polls; counters advanced (records 226->11, FB beats 248808->248808) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=248808 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 181: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=248808 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 182 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 182: streamed 2024 words, staged_addr=2024 (exp 2024, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=224 (exp 224), FB beats=248939 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 183: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249081 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 184: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=249098 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 185: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249189 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 186: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=249266 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 187: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249300 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 188: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=249583 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 189: streamed 1160 words, staged_addr=1160 (exp 1160, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=128 (exp 128), FB beats=249774 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 190: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=249797 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 191: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=250096 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 192: streamed 1034 words, staged_addr=1034 (exp 1034, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=114 (exp 114), FB beats=250096 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 193: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=250096 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 194: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=250096 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 195: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=250096 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 196: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=250101 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 197: streamed 1970 words, staged_addr=1970 (exp 1970, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=218 (exp 218), FB beats=250115 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 198: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=250126 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 199: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=250127 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 200: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=250463 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 201: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=250559 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 202: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=250957 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 203: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=253941 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 204: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254955 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 205: streamed 1520 words, staged_addr=1520 (exp 1520, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=168 (exp 168), FB beats=254960 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 206: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=254970 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 207: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=255013 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 208: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=255017 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 209: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=256610 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 210: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=258373 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 211: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=259320 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=260867 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 213: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=261449 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 214: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=262854 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 215: streamed 1529 words, staged_addr=1529 (exp 1529, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=169 (exp 169), FB beats=265786 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 216: streamed 1646 words, staged_addr=1646 (exp 1646, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=182 (exp 182), FB beats=266190 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 217: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=267806 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 218: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=269264 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 219: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=270535 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 220: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 220: drain low pulse completed between host polls; counters advanced (records 80->3, FB beats 270535->270535) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=270535 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 221 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 221: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 221: drain low pulse completed between host polls; counters advanced (records 3->2, FB beats 270535->270535) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=270535 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 222 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 222: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=270851 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 223: streamed 1169 words, staged_addr=1169 (exp 1169, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=129 (exp 129), FB beats=271256 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 224: streamed 1358 words, staged_addr=1358 (exp 1358, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=150 (exp 150), FB beats=271733 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 225 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 225: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=272371 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 226: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=273673 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 227: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=273833 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 228: streamed 1934 words, staged_addr=1934 (exp 1934, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=214 (exp 214), FB beats=275211 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 229 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 229: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=275460 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 230: streamed 1115 words, staged_addr=1115 (exp 1115, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=123 (exp 123), FB beats=275988 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 231: streamed 1259 words, staged_addr=1259 (exp 1259, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=139 (exp 139), FB beats=276527 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 232: streamed 1403 words, staged_addr=1403 (exp 1403, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=155 (exp 155), FB beats=277136 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 233: streamed 1430 words, staged_addr=1430 (exp 1430, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=158 (exp 158), FB beats=277823 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 234 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 234: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=277892 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 235: streamed 773 words, staged_addr=773 (exp 773, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=85 (exp 85), FB beats=278033 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 236: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=278177 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 237: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=278261 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 238: streamed 854 words, staged_addr=854 (exp 854, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=278468 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 239: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=278670 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 240: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=278881 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 241: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=279186 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 242: streamed 818 words, staged_addr=818 (exp 818, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=90 (exp 90), FB beats=279507 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 243: streamed 791 words, staged_addr=791 (exp 791, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=279714 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 244: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=279865 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 245 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 245: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=280445 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 246: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=280934 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 247: streamed 1295 words, staged_addr=1295 (exp 1295, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=143 (exp 143), FB beats=281566 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 248: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=282208 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 249: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=282712 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 250: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=282935 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 251 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 251: streamed 881 words, staged_addr=881 (exp 881, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=97 (exp 97), FB beats=283099 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 252: streamed 890 words, staged_addr=890 (exp 890, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=98 (exp 98), FB beats=283276 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 253: streamed 863 words, staged_addr=863 (exp 863, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=95 (exp 95), FB beats=283449 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 254: streamed 998 words, staged_addr=998 (exp 998, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=110 (exp 110), FB beats=283679 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 255: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=283827 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 256: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=283927 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 257: streamed 548 words, staged_addr=548 (exp 548, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=60 (exp 60), FB beats=284042 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 258: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=284158 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 259 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 259: streamed 1079 words, staged_addr=1079 (exp 1079, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=119 (exp 119), FB beats=284428 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 260: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=284606 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 261 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 261: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=284748 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 262: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=284984 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 263 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 263: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=285701 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 264: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=285993 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 265: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=285993 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 266: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=286212 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 267: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=286566 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 268: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 268: drain low pulse completed between host polls; counters advanced (records 226->2, FB beats 286566->286566) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=286566 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 269: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=286664 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 270: streamed 1916 words, staged_addr=1916 (exp 1916, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=212 (exp 212), FB beats=287188 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 271: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=287825 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 272: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=288730 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 273: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=288737 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 274: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=289421 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 275: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=290188 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 276: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=290712 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 277: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=291810 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 278: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=292780 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 279: streamed 800 words, staged_addr=800 (exp 800, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=88 (exp 88), FB beats=292871 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 280: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=293793 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 281: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=295280 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 282: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=295358 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f18_ch423_board_fb.mem sum32=0x95be02bb xor32=0x02b90f15 nonzero=235292 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (283-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_epochs.txt new file mode 100644 index 0000000..7f1f1c0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_epochs.txt @@ -0,0 +1,286 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f17', 'zsrt139f18r'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 283 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 44 4 0 sh3_zsrt139f170_pal.mem 0x60778774 +1 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +2 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +3 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774 +4 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 98 10 1 sh3_zsrt139f170_pal.mem 0x60778774 +5 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774 +6 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +7 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +8 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +9 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +10 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1710.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774 +11 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1711.mem 674 74 1 sh3_zsrt139f170_pal.mem 0x60778774 +12 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1712.mem 179 19 1 sh3_zsrt139f170_pal.mem 0x60778774 +13 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1713.mem 287 31 1 sh3_zsrt139f170_pal.mem 0x60778774 +14 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1714.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +15 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +16 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1716.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +17 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1717.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774 +18 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1718.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774 +19 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1719.mem 125 13 1 sh3_zsrt139f170_pal.mem 0x60778774 +20 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1720.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +21 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1721.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +22 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1722.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +23 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1723.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +24 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1724.mem 350 38 1 sh3_zsrt139f170_pal.mem 0x60778774 +25 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1725.mem 386 42 1 sh3_zsrt139f170_pal.mem 0x60778774 +26 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1726.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +27 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1727.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +28 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1728.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +29 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1729.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +30 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1730.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +31 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1731.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +32 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1732.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +33 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1733.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +34 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1734.mem 170 18 1 sh3_zsrt139f170_pal.mem 0x60778774 +35 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1735.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774 +36 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1736.mem 134 14 1 sh3_zsrt139f170_pal.mem 0x60778774 +37 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1737.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774 +38 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1738.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774 +39 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1739.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774 +40 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1740.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +41 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1741.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +42 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1742.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774 +43 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1743.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +44 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1744.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774 +45 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1745.mem 17 1 1 sh3_zsrt139f170_pal.mem 0x60778774 +46 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1746.mem 521 57 0 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +47 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1747.mem 485 53 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +48 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1748.mem 224 24 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +49 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1749.mem 26 2 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +50 8151 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1750.mem 1781 197 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4 +51 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1751.mem 2042 226 0 sh3_zsrt139f1751_pal.mem 0x3cd88c98 +52 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1752.mem 269 29 1 sh3_zsrt139f1751_pal.mem 0x3cd88c98 +53 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1753.mem 2042 226 0 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +54 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1754.mem 791 87 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +55 15931 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1755.mem 710 78 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2 +56 20246 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1756.mem 233 25 0 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +57 20792 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1757.mem 845 93 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +58 21386 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1758.mem 1349 149 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4 +59 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1759.mem 170 18 0 sh3_zsrt139f1759_pal.mem 0x47405cb0 +60 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1760.mem 143 15 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +61 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1761.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +62 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1762.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +63 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1763.mem 188 20 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +64 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1764.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +65 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1765.mem 332 36 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +66 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1766.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +67 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1767.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +68 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1768.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +69 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1769.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +70 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1770.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +71 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1771.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +72 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1772.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +73 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1773.mem 134 14 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +74 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1774.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +75 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1775.mem 548 60 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +76 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1776.mem 179 19 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +77 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1777.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +78 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1778.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +79 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1779.mem 368 40 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +80 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1780.mem 206 22 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +81 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1781.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +82 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1782.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +83 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1783.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +84 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1784.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +85 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1785.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +86 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1786.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +87 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1787.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +88 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1788.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +89 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1789.mem 215 23 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +90 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1790.mem 170 18 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +91 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1791.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +92 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1792.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +93 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1793.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +94 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1794.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +95 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1795.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +96 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1796.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +97 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1797.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +98 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1798.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +99 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1799.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +100 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17100.mem 35 3 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +101 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17101.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +102 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17102.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +103 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17103.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +104 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17104.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +105 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17105.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +106 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17106.mem 116 12 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +107 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17107.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +108 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17108.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +109 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17109.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +110 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17110.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +111 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17111.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +112 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17112.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +113 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17113.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +114 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17114.mem 125 13 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +115 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17115.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +116 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17116.mem 89 9 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +117 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17117.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +118 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17118.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +119 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17119.mem 170 18 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +120 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17120.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +121 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17121.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +122 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17122.mem 305 33 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +123 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17123.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +124 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17124.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +125 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17125.mem 152 16 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +126 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17126.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +127 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17127.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +128 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17128.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +129 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17129.mem 143 15 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +130 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17130.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +131 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17131.mem 53 5 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +132 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17132.mem 71 7 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +133 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17133.mem 161 17 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +134 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17134.mem 134 14 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +135 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17135.mem 188 20 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +136 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17136.mem 107 11 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +137 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17137.mem 17 1 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +138 33303 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17138.mem 1772 196 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +139 34605 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17139.mem 1025 113 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +140 35907 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17140.mem 1331 147 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +141 37209 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17141.mem 1592 176 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +142 38511 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17142.mem 2042 226 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +143 38511 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17143.mem 269 29 1 sh3_zsrt139f1759_pal.mem 0x47405cb0 +144 71148 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17144.mem 953 105 0 sh3_zsrt139f17144_pal.mem 0x43ece1ae +145 71787 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17145.mem 1880 208 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +146 72426 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17146.mem 1187 131 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +147 73065 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17147.mem 1736 192 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +148 73704 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17148.mem 1268 140 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +149 74343 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17149.mem 1709 189 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +150 74982 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17150.mem 1187 131 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +151 75621 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17151.mem 1358 150 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +152 76260 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17152.mem 1322 146 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +153 76899 10240 480 sh3_zsrt139f17144_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f17153.mem 1151 127 1 sh3_zsrt139f17144_pal.mem 0x43ece1ae +154 83323 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17154.mem 575 63 0 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +155 83944 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17155.mem 998 110 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +156 84565 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17156.mem 917 101 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +157 85186 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17157.mem 1295 143 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +158 85807 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17158.mem 1952 216 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +159 86428 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17159.mem 827 91 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +160 87049 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17160.mem 800 88 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +161 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17161.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +162 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17162.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +163 89548 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17163.mem 1529 169 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +164 90187 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17164.mem 2042 226 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +165 90187 9216 480 sh3_zsrt139f17154_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17165.mem 1043 115 1 sh3_zsrt139f17154_pal.mem 0x5dfce0a2 +166 91678 9216 480 sh3_zsrt139f17166_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f17166.mem 440 48 0 sh3_zsrt139f17166_pal.mem 0x181b2ac2 +167 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17167.mem 80 8 0 sh3_zsrt139f17167_pal.mem 0x47097d4c +168 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17168.mem 62 6 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +169 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17169.mem 44 4 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +170 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17170.mem 692 76 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +171 114431 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17171.mem 26 2 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +172 115016 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17172.mem 1988 220 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +173 115655 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17173.mem 1142 126 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +174 116351 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17174.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +175 116351 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17175.mem 377 41 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +176 117050 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17176.mem 1196 132 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +177 117599 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17177.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +178 117599 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17178.mem 368 40 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +179 118238 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17179.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +180 118238 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17180.mem 107 11 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +181 118877 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17181.mem 395 43 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +182 119471 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17182.mem 2024 224 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +183 120110 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17183.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +184 120110 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17184.mem 935 103 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +185 120749 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17185.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +186 120749 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17186.mem 1079 119 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +187 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17187.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +188 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17188.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +189 121388 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17189.mem 1160 128 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +190 122027 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17190.mem 998 110 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +191 122600 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17191.mem 908 100 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +192 123869 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17192.mem 1034 114 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +193 124508 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17193.mem 377 41 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +194 125786 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17194.mem 413 45 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +195 126434 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17195.mem 269 29 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +196 126968 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17196.mem 620 68 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +197 127607 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17197.mem 1970 218 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +198 128246 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17198.mem 521 57 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +199 128885 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17199.mem 125 13 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +200 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17200.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +201 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17201.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +202 129389 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17202.mem 1331 147 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +203 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17203.mem 1493 165 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +204 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17204.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +205 130028 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17205.mem 1520 168 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +206 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17206.mem 2042 226 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +207 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17207.mem 1628 180 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +208 130667 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17208.mem 260 28 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +209 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17209.mem 665 73 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +210 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17210.mem 728 80 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +211 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17211.mem 593 65 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +212 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17212.mem 395 43 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +213 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17213.mem 530 58 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +214 131306 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17214.mem 314 34 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +215 131945 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17215.mem 1529 169 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +216 131945 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17216.mem 1646 182 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +217 132584 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17217.mem 1988 220 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +218 132584 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17218.mem 935 103 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +219 133262 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17219.mem 728 80 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +220 135869 8192 480 sh3_zsrt139f17167_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f17220.mem 35 3 1 sh3_zsrt139f17167_pal.mem 0x47097d4c +221 145712 12288 480 sh3_zsrt139f17221_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f17221.mem 26 2 0 sh3_zsrt139f17221_pal.mem 0x3e849a98 +222 146205 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17222.mem 1295 143 0 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +223 146630 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17223.mem 1169 129 1 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +224 147068 11264 480 sh3_zsrt139f17222_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17224.mem 1358 150 1 sh3_zsrt139f17222_pal.mem 0xfd978fd9 +225 147480 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17225.mem 1457 161 0 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +226 147888 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17226.mem 2042 226 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +227 147888 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17227.mem 305 33 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +228 148264 11264 480 sh3_zsrt139f17225_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17228.mem 1934 214 1 sh3_zsrt139f17225_pal.mem 0xd5ed05ff +229 148919 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17229.mem 944 104 0 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +230 149509 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17230.mem 1115 123 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +231 150125 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17231.mem 1259 139 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +232 150741 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17232.mem 1403 155 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +233 151344 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17233.mem 1430 158 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8 +234 152021 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17234.mem 530 58 0 sh3_zsrt139f17234_pal.mem 0xc6784386 +235 152420 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17235.mem 773 85 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +236 152806 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17236.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +237 153218 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17237.mem 485 53 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +238 153643 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17238.mem 854 94 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +239 154029 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17239.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +240 154428 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17240.mem 665 73 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +241 154853 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17241.mem 881 97 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +242 155265 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17242.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +243 155664 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17243.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +244 156063 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17244.mem 557 61 1 sh3_zsrt139f17234_pal.mem 0xc6784386 +245 156566 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17245.mem 1439 159 0 sh3_zsrt139f17245_pal.mem 0x00fd9028 +246 157273 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17246.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +247 157967 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17247.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +248 158674 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17248.mem 1457 161 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +249 159420 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17249.mem 1052 116 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +250 160114 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17250.mem 440 48 1 sh3_zsrt139f17245_pal.mem 0x00fd9028 +251 160331 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17251.mem 881 97 0 sh3_zsrt139f17251_pal.mem 0xd8d19684 +252 160769 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17252.mem 890 98 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +253 161168 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17253.mem 863 95 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +254 161567 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17254.mem 998 110 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +255 162300 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17255.mem 845 93 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +256 162725 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17256.mem 683 75 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +257 163163 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17257.mem 548 60 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +258 163575 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17258.mem 611 67 1 sh3_zsrt139f17251_pal.mem 0xd8d19684 +259 164204 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17259.mem 1079 119 0 sh3_zsrt139f17259_pal.mem 0xaa4e7e05 +260 164950 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17260.mem 701 77 1 sh3_zsrt139f17259_pal.mem 0xaa4e7e05 +261 175995 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17261.mem 656 72 0 sh3_zsrt139f17261_pal.mem 0x56ebf1d1 +262 176446 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17262.mem 782 86 1 sh3_zsrt139f17261_pal.mem 0x56ebf1d1 +263 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r0.mem 2042 226 0 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +264 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r1.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +265 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r2.mem 161 17 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +266 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r3.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +267 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r4.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +268 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r5.mem 26 2 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +269 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r6.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +270 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r7.mem 1916 212 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +271 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r8.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +272 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r9.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +273 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r10.mem 629 69 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +274 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r11.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +275 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r12.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +276 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r13.mem 1052 116 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +277 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r14.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +278 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r15.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +279 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r16.mem 800 88 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +280 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r17.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +281 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r18.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +282 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r19.mem 458 50 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18r_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18r_epochs.txt new file mode 100644 index 0000000..7f1451a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f18r_epochs.txt @@ -0,0 +1,26 @@ +# Ch419 epoch descriptor table (20 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r0.mem 2042 226 0 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +1 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r1.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +2 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r2.mem 161 17 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +3 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r3.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +4 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r4.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +5 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r5.mem 26 2 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +6 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r6.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +7 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r7.mem 1916 212 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +8 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r8.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +9 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r9.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +10 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r10.mem 629 69 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +11 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r11.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +12 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r12.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +13 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r13.mem 1052 116 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +14 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r14.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +15 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r15.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +16 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r16.mem 800 88 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +17 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r17.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +18 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r18.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae +19 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r19.mem 458 50 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_ch424_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_ch424_board_run.log new file mode 100644 index 0000000..8d75b90 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_ch424_board_run.log @@ -0,0 +1,766 @@ +[sudo] password for terasic: [sched] feeder ready=1 +[sched] scene sh3_zsrt139f19_epochs.txt: 125 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 124: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=295377 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=297460 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=300051 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=300517 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=303426 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=303757 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=305178 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=305208 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=305480 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=305720 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 305720->305723) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=305723 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=305846 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=306096 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=306492 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=306745 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=307149 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=307958 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=308303 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=308403 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=308494 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=308812 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=309214 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=309367 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=309839 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=310603 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=310978 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=311360 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=311770 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=311901 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=312428 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=312625 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=312831 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=313040 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=313324 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=313422 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=313466 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 313466->313475) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=313475 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=315960 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=316754 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=319842 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=320226 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=320351 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=320722 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=321315 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=321469 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=322696 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=322928 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=323955 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=324795 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=325754 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=325778 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=326295 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=327083 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=327484 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=328517 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=331437 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=332134 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=333647 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=334865 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=336538 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=336571 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=336661 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=336832 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=336870 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=337067 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=337319 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=337826 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=338279 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=338516 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: drain low pulse completed between host polls; counters advanced (records 48->6, FB beats 338516->338549) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=338549 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=339338 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=340155 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=342996 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=343639 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=345657 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=347738 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=350017 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=351596 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=352982 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=355410 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=357906 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=358108 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 358108->358110) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=358110 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=358150 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=358230 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=358480 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=358582 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=358661 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=358934 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=359322 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=359857 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=360209 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=360561 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=360797 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=361033 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=361174 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=361209 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=361263 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=361310 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=361330 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 361330->361334) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=361334 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=361385 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=361463 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=361486 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=361562 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=361578 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 361578->361588) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=361588 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=362004 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=362404 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=362733 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=363043 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=363228 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: drain low pulse completed between host polls; counters advanced (records 58->10, FB beats 363228->363259) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=363259 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=363317 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=363364 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=363415 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=363472 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=363514 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=363551 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=363586 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=363615 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=363748 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=363817 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 123: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=363888 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 124 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 124: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=363923 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f19_ch424_board_fb.mem sum32=0x42ee1faa xor32=0x0dc19c66 nonzero=114504 bounds=(0,10)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (125-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_epochs.txt new file mode 100644 index 0000000..0b3c530 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_epochs.txt @@ -0,0 +1,131 @@ +# Ch424 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f1_epochs.txt new file mode 100644 index 0000000..55981b0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f1_epochs.txt @@ -0,0 +1,3232 @@ +# Ch409 epoch descriptor table (3226 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3226 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f10.mem 188 20 0 sh3_zsrt139f10_pal.mem 0x60778774 +1 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f11.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +2 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f12.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +3 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f13.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +4 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f14.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +5 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f15.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +6 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f16.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +7 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f17.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +8 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f18.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +9 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f19.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +10 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f110.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +11 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f111.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +12 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f112.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +13 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f113.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +14 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f114.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +15 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f115.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +16 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f116.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +17 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f117.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +18 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f118.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +19 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f119.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +20 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f120.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +21 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f121.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +22 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f122.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +23 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f123.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +24 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f124.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +25 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f125.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +26 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f126.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +27 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f127.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +28 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f128.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +29 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f129.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +30 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f130.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +31 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f131.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +32 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f132.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +33 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f133.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +34 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f134.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +35 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f135.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +36 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f136.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +37 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f137.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +38 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f138.mem 260 28 1 sh3_zsrt139f10_pal.mem 0x60778774 +39 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f139.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +40 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f140.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +41 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f141.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +42 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f142.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +43 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f143.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +44 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f144.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +45 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f145.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +46 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f146.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +47 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f147.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +48 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f148.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +49 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f149.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +50 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f150.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +51 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f151.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +52 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f152.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +53 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f153.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +54 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f154.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +55 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f155.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +56 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f156.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +57 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f157.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +58 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f158.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +59 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f159.mem 386 42 1 sh3_zsrt139f10_pal.mem 0x60778774 +60 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f160.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +61 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f161.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +62 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f162.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +63 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f163.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +64 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f164.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +65 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f165.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +66 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f166.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +67 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f167.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +68 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f168.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +69 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f169.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +70 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +71 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +72 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +73 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 242 26 1 sh3_zsrt139f10_pal.mem 0x60778774 +74 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +75 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 278 30 1 sh3_zsrt139f10_pal.mem 0x60778774 +76 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +77 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +78 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +79 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +80 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f180.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +81 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f181.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +82 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f182.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +83 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f183.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +84 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f184.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +85 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f185.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +86 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f186.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +87 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f187.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +88 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f188.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +89 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f189.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +90 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +91 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f191.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +92 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f192.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +93 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f193.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +94 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f194.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +95 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f195.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +96 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f196.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +97 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f197.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +98 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f198.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +99 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f199.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +100 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1100.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +101 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1101.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +102 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1102.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +103 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1103.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +104 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1104.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +105 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1105.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +106 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1106.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +107 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1107.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +108 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1108.mem 809 89 1 sh3_zsrt139f10_pal.mem 0x60778774 +109 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1109.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +110 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1110.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +111 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1111.mem 332 36 1 sh3_zsrt139f10_pal.mem 0x60778774 +112 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1112.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +113 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1113.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +114 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1114.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +115 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1115.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +116 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1116.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +117 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1117.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +118 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1118.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +119 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1119.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +120 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1120.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +121 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1121.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +122 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1122.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +123 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1123.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +124 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1124.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +125 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1125.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +126 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1126.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +127 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1127.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +128 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1128.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +129 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1129.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +130 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1130.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +131 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1131.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +132 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1132.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +133 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1133.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +134 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1134.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +135 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1135.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +136 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1136.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +137 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1137.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +138 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1138.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +139 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1139.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +140 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1140.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +141 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1141.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +142 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1142.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +143 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1143.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +144 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1144.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +145 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1145.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +146 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1146.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +147 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1147.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +148 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1148.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +149 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1149.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +150 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1150.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +151 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1151.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +152 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1152.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +153 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1153.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +154 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1154.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +155 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1155.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +156 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1156.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +157 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1157.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +158 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1158.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +159 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1159.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +160 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1160.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +161 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1161.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +162 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1162.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +163 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1163.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +164 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1164.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +165 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1165.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +166 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1166.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +167 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1167.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +168 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1168.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +169 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1169.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +170 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1170.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +171 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1171.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +172 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1172.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +173 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1173.mem 350 38 1 sh3_zsrt139f10_pal.mem 0x60778774 +174 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1174.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +175 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1175.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +176 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1176.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +177 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1177.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +178 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1178.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +179 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1179.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +180 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1180.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +181 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1181.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +182 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1182.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +183 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1183.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +184 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1184.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +185 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1185.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +186 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1186.mem 332 36 1 sh3_zsrt139f10_pal.mem 0x60778774 +187 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1187.mem 260 28 1 sh3_zsrt139f10_pal.mem 0x60778774 +188 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1188.mem 377 41 1 sh3_zsrt139f10_pal.mem 0x60778774 +189 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1189.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +190 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1190.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +191 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1191.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +192 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1192.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +193 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1193.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +194 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1194.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +195 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1195.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +196 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1196.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +197 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1197.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +198 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1198.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +199 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1199.mem 287 31 1 sh3_zsrt139f10_pal.mem 0x60778774 +200 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1200.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +201 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1201.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +202 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1202.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +203 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1203.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +204 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1204.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +205 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1205.mem 197 21 1 sh3_zsrt139f10_pal.mem 0x60778774 +206 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1206.mem 701 77 1 sh3_zsrt139f10_pal.mem 0x60778774 +207 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1207.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +208 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1208.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +209 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1209.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +210 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1210.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +211 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1211.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +212 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1212.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +213 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1213.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +214 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1214.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +215 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1215.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +216 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1216.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +217 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1217.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +218 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1218.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +219 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1219.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +220 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1220.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +221 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1221.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +222 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1222.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +223 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1223.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +224 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1224.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +225 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1225.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +226 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1226.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +227 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1227.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +228 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1228.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +229 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1229.mem 296 32 1 sh3_zsrt139f10_pal.mem 0x60778774 +230 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1230.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +231 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1231.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +232 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1232.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +233 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1233.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +234 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1234.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +235 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1235.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +236 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1236.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +237 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1237.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +238 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1238.mem 242 26 1 sh3_zsrt139f10_pal.mem 0x60778774 +239 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1239.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +240 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1240.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +241 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1241.mem 296 32 1 sh3_zsrt139f10_pal.mem 0x60778774 +242 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1242.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +243 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1243.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +244 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1244.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +245 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1245.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +246 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1246.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +247 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1247.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +248 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1248.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +249 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1249.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +250 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1250.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +251 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1251.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +252 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1252.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +253 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1253.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +254 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1254.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +255 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1255.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +256 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1256.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +257 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1257.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +258 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1258.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +259 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1259.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +260 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1260.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +261 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1261.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +262 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1262.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +263 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1263.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +264 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1264.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +265 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1265.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +266 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1266.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +267 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1267.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +268 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1268.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +269 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1269.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +270 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1270.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +271 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1271.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +272 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1272.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +273 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1273.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +274 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1274.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +275 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1275.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +276 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1276.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +277 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1277.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +278 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1278.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +279 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1279.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +280 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1280.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +281 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1281.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +282 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1282.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +283 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1283.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +284 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1284.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +285 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1285.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +286 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1286.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +287 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1287.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +288 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1288.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +289 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1289.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +290 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1290.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +291 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1291.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +292 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1292.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +293 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1293.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +294 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1294.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +295 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1295.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +296 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1296.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +297 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1297.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +298 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1298.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +299 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1299.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +300 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1300.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +301 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1301.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +302 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1302.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +303 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1303.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +304 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1304.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +305 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1305.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +306 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1306.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +307 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1307.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +308 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1308.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +309 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1309.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +310 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1310.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +311 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1311.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +312 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1312.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +313 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1313.mem 341 37 1 sh3_zsrt139f10_pal.mem 0x60778774 +314 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1314.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +315 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1315.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +316 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1316.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +317 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1317.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +318 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1318.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +319 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1319.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +320 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1320.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +321 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1321.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +322 2108 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1322.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +323 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1323.mem 368 40 0 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +324 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1324.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +325 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1325.mem 206 22 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +326 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1326.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +327 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1327.mem 656 72 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +328 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1328.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +329 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1329.mem 116 12 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +330 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1330.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +331 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1331.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +332 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1332.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +333 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1333.mem 152 16 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +334 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1334.mem 521 57 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +335 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1335.mem 215 23 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +336 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1336.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +337 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1337.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +338 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1338.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +339 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1339.mem 782 86 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +340 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1340.mem 953 105 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +341 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1341.mem 629 69 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +342 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1342.mem 602 66 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +343 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1343.mem 377 41 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +344 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1344.mem 485 53 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +345 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1345.mem 683 75 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +346 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1346.mem 854 94 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +347 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1347.mem 440 48 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +348 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1348.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +349 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1349.mem 233 25 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +350 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1350.mem 449 49 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +351 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1351.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +352 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1352.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +353 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1353.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +354 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1354.mem 179 19 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +355 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1355.mem 107 11 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +356 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1356.mem 80 8 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +357 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1357.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +358 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1358.mem 152 16 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +359 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1359.mem 728 80 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +360 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1360.mem 143 15 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +361 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1361.mem 782 86 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +362 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1362.mem 845 93 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +363 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1363.mem 1268 140 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +364 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1364.mem 809 89 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +365 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1365.mem 719 79 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +366 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1366.mem 1043 115 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +367 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1367.mem 890 98 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +368 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1368.mem 1241 137 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +369 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1369.mem 926 102 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +370 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1370.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +371 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1371.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +372 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1372.mem 170 18 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +373 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1373.mem 53 5 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +374 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1374.mem 89 9 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +375 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1375.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +376 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1376.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +377 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1377.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +378 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1378.mem 197 21 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +379 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1379.mem 107 11 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +380 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1380.mem 341 37 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +381 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1381.mem 188 20 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +382 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1382.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +383 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1383.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +384 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1384.mem 89 9 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +385 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1385.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +386 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1386.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +387 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1387.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +388 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1388.mem 494 54 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +389 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1389.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +390 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1390.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +391 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1391.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +392 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1392.mem 1295 143 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +393 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1393.mem 521 57 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +394 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1394.mem 485 53 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +395 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1395.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +396 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1396.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +397 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1397.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +398 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1398.mem 908 100 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +399 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1399.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +400 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1400.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +401 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1401.mem 143 15 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +402 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1402.mem 854 94 0 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +403 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1403.mem 449 49 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +404 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1404.mem 476 52 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +405 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1405.mem 692 76 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +406 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1406.mem 1034 114 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +407 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1407.mem 620 68 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +408 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1408.mem 1160 128 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +409 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1409.mem 971 107 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +410 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1410.mem 737 81 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +411 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1411.mem 1106 122 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +412 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1412.mem 737 81 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +413 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1413.mem 1682 186 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +414 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1414.mem 1727 191 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +415 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1415.mem 1358 150 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +416 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1416.mem 1196 132 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +417 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1417.mem 1871 207 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +418 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1418.mem 494 54 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +419 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1419.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +420 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1420.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +421 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1421.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +422 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1422.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +423 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1423.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +424 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1424.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +425 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1425.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +426 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1426.mem 278 30 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +427 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1427.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +428 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1428.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +429 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1429.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +430 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1430.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +431 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1431.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +432 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1432.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +433 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1433.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +434 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1434.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +435 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1435.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +436 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1436.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +437 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1437.mem 125 13 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +438 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1438.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +439 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1439.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +440 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1440.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +441 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1441.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +442 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1442.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +443 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1443.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +444 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1444.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +445 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1445.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +446 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1446.mem 188 20 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +447 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1447.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +448 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1448.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +449 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1449.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +450 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1450.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +451 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1451.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +452 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1452.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +453 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1453.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +454 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1454.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +455 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1455.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +456 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1456.mem 269 29 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +457 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1457.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +458 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1458.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +459 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1459.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +460 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1460.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +461 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1461.mem 215 23 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +462 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1462.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +463 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1463.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +464 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1464.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +465 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1465.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +466 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1466.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +467 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1467.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +468 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1468.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +469 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1469.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +470 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1470.mem 233 25 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +471 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1471.mem 179 19 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +472 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1472.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +473 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1473.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +474 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1474.mem 170 18 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +475 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1475.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +476 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1476.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +477 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1477.mem 179 19 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +478 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1478.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +479 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1479.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +480 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1480.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +481 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1481.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +482 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1482.mem 35 3 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +483 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1483.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +484 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1484.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +485 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1485.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +486 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1486.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +487 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1487.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +488 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1488.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +489 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1489.mem 125 13 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +490 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1490.mem 224 24 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +491 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1491.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +492 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1492.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +493 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1493.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +494 12757 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1494.mem 2042 226 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +495 12757 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1495.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +496 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1496.mem 2042 226 0 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +497 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1497.mem 2042 226 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +498 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1498.mem 755 83 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +499 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1499.mem 44 4 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +500 15931 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1500.mem 1475 163 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +501 16217 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1501.mem 2042 226 0 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +502 16217 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1502.mem 1043 115 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +503 16856 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1503.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +504 16856 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1504.mem 1304 144 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +505 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1505.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +506 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1506.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +507 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1507.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +508 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1508.mem 665 73 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +509 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1509.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +510 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1510.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +511 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1511.mem 152 16 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +512 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1512.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +513 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1513.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +514 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1514.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +515 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1515.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +516 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1516.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +517 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1517.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +518 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1518.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +519 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1519.mem 161 17 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +520 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1520.mem 2006 222 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +521 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1521.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +522 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1522.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +523 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1523.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +524 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1524.mem 1493 165 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +525 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1525.mem 917 101 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +526 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1526.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +527 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1527.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +528 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1528.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +529 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1529.mem 206 22 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +530 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1530.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +531 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1531.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +532 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1532.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +533 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1533.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +534 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1534.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +535 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1535.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +536 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1536.mem 143 15 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +537 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1537.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +538 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1538.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +539 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1539.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +540 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1540.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +541 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1541.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +542 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1542.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +543 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1543.mem 152 16 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +544 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1544.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +545 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1545.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +546 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1546.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +547 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1547.mem 125 13 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +548 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1548.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +549 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1549.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +550 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1550.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +551 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1551.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +552 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1552.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +553 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1553.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +554 20246 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1554.mem 1592 176 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +555 20792 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1555.mem 2006 222 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +556 21386 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1556.mem 1439 159 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +557 26066 11264 480 sh3_zsrt139f1557_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1557.mem 179 19 0 sh3_zsrt139f1557_pal.mem 0x44679578 +558 26121 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1558.mem 323 35 0 sh3_zsrt139f1558_pal.mem 0x47405cb0 +559 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1559.mem 746 82 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +560 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1560.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +561 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1561.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +562 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1562.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +563 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1563.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +564 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1564.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +565 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1565.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +566 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1566.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +567 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1567.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +568 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1568.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +569 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1569.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +570 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1570.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +571 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1571.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +572 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1572.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +573 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1573.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +574 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1574.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +575 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1575.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +576 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1576.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +577 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1577.mem 404 44 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +578 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1578.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +579 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1579.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +580 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1580.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +581 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1581.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +582 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1582.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +583 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1583.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +584 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1584.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +585 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1585.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +586 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1586.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +587 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1587.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +588 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1588.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +589 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1589.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +590 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1590.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +591 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1591.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +592 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1592.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +593 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1593.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +594 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1594.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +595 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1595.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +596 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1596.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +597 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1597.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +598 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1598.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +599 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1599.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +600 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1600.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +601 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1601.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +602 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1602.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +603 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1603.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +604 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1604.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +605 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1605.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +606 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1606.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +607 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1607.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +608 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1608.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +609 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1609.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +610 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1610.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +611 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1611.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +612 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1612.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +613 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1613.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +614 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1614.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +615 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1615.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +616 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1616.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +617 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1617.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +618 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1618.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +619 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1619.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +620 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1620.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +621 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1621.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +622 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1622.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +623 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1623.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +624 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1624.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +625 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1625.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +626 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1626.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +627 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1627.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +628 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1628.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +629 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1629.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +630 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1630.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +631 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1631.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +632 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1632.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +633 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1633.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +634 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1634.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +635 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1635.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +636 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1636.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +637 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1637.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +638 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1638.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +639 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1639.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +640 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1640.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +641 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1641.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +642 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1642.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +643 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1643.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +644 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1644.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +645 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1645.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +646 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1646.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +647 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1647.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +648 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1648.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +649 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1649.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +650 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1650.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +651 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1651.mem 431 47 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +652 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1652.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +653 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1653.mem 413 45 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +654 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1654.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +655 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1655.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +656 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1656.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +657 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1657.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +658 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1658.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +659 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1659.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +660 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1660.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +661 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1661.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +662 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1662.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +663 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1663.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +664 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1664.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +665 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1665.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +666 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1666.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +667 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1667.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +668 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1668.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +669 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1669.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +670 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1670.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +671 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1671.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +672 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1672.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +673 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1673.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +674 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1674.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +675 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1675.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +676 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1676.mem 296 32 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +677 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1677.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +678 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1678.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +679 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1679.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +680 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1680.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +681 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1681.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +682 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1682.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +683 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1683.mem 395 43 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +684 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1684.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +685 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1685.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +686 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1686.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +687 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1687.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +688 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1688.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +689 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1689.mem 440 48 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +690 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1690.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +691 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1691.mem 476 52 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +692 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1692.mem 503 55 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +693 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1693.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +694 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1694.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +695 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1695.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +696 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1696.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +697 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1697.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +698 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1698.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +699 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1699.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +700 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1700.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +701 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1701.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +702 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1702.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +703 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1703.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +704 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1704.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +705 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1705.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +706 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1706.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +707 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1707.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +708 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1708.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +709 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1709.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +710 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1710.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +711 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1711.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +712 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1712.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +713 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1713.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +714 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1714.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +715 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +716 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1716.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +717 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1717.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +718 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1718.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +719 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1719.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +720 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1720.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +721 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1721.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +722 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1722.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +723 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1723.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +724 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1724.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +725 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1725.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +726 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1726.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +727 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1727.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +728 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1728.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +729 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1729.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +730 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1730.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +731 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1731.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +732 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1732.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +733 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1733.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +734 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1734.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +735 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1735.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +736 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1736.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +737 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1737.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +738 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1738.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +739 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1739.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +740 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1740.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +741 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1741.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +742 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1742.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +743 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1743.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +744 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1744.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +745 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1745.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +746 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1746.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +747 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1747.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +748 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1748.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +749 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1749.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +750 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1750.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +751 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1751.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +752 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1752.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +753 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1753.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +754 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1754.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +755 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1755.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +756 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1756.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +757 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1757.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +758 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1758.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +759 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1759.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +760 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1760.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +761 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1761.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +762 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1762.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +763 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1763.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +764 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1764.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +765 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1765.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +766 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1766.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +767 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1767.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +768 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1768.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +769 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1769.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +770 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1770.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +771 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1771.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +772 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1772.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +773 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1773.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +774 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1774.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +775 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1775.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +776 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1776.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +777 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1777.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +778 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1778.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +779 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1779.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +780 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1780.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +781 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1781.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +782 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1782.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +783 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1783.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +784 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1784.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +785 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1785.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +786 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1786.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +787 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1787.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +788 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1788.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +789 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1789.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +790 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1790.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +791 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1791.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +792 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1792.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +793 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1793.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +794 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1794.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +795 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1795.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +796 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1796.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +797 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1797.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +798 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1798.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +799 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1799.mem 386 42 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +800 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1800.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +801 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1801.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +802 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1802.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +803 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1803.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +804 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1804.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +805 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1805.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +806 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1806.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +807 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1807.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +808 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1808.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +809 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1809.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +810 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1810.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +811 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1811.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +812 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1812.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +813 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1813.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +814 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1814.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +815 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1815.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +816 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1816.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +817 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1817.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +818 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1818.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +819 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1819.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +820 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1820.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +821 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1821.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +822 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1822.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +823 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1823.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +824 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1824.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +825 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1825.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +826 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1826.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +827 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1827.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +828 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1828.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +829 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1829.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +830 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1830.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +831 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1831.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +832 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1832.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +833 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1833.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +834 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1834.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +835 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1835.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +836 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1836.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +837 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1837.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +838 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1838.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +839 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1839.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +840 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1840.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +841 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1841.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +842 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1842.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +843 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1843.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +844 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1844.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +845 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1845.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +846 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1846.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +847 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1847.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +848 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1848.mem 17 1 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +849 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1849.mem 404 44 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +850 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1850.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +851 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1851.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +852 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1852.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +853 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1853.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +854 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1854.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +855 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1855.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +856 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1856.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +857 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1857.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +858 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1858.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +859 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1859.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +860 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1860.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +861 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1861.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +862 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1862.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +863 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1863.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +864 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1864.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +865 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1865.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +866 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1866.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +867 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1867.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +868 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1868.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +869 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1869.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +870 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1870.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +871 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1871.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +872 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1872.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +873 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1873.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +874 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1874.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +875 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1875.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +876 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1876.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +877 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1877.mem 260 28 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +878 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1878.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +879 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1879.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +880 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1880.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +881 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1881.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +882 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1882.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +883 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1883.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +884 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1884.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +885 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1885.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +886 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1886.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +887 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1887.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +888 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1888.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +889 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1889.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +890 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1890.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +891 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1891.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +892 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1892.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +893 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1893.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +894 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1894.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +895 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1895.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +896 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1896.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +897 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1897.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +898 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1898.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +899 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1899.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +900 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1900.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +901 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1901.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +902 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1902.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +903 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1903.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +904 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1904.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +905 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1905.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +906 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1906.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +907 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1907.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +908 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1908.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +909 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1909.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +910 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +911 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +912 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +913 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +914 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +915 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +916 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +917 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +918 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +919 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +920 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +921 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +922 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +923 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +924 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +925 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +926 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +927 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1927.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +928 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1928.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +929 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1929.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +930 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1930.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +931 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1931.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +932 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1932.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +933 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1933.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +934 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1934.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +935 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1935.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +936 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1936.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +937 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1937.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +938 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1938.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +939 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1939.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +940 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1940.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +941 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1941.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +942 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1942.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +943 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1943.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +944 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1944.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +945 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1945.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +946 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1946.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +947 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1947.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +948 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1948.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +949 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1949.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +950 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1950.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +951 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1951.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +952 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1952.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +953 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1953.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +954 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1954.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +955 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1955.mem 224 24 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +956 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1956.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +957 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1957.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +958 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1958.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +959 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1959.mem 539 59 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +960 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1960.mem 683 75 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +961 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1961.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +962 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1962.mem 224 24 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +963 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1963.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +964 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1964.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +965 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1965.mem 323 35 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +966 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1966.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +967 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1967.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +968 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1968.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +969 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1969.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +970 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1970.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +971 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1971.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +972 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1972.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +973 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1973.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +974 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1974.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +975 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1975.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +976 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1976.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +977 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1977.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +978 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1978.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +979 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1979.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +980 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1980.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +981 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1981.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +982 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1982.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +983 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1983.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +984 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1984.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +985 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1985.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +986 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1986.mem 215 23 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +987 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1987.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +988 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1988.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +989 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1989.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +990 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1990.mem 368 40 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +991 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1991.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +992 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1992.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +993 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1993.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +994 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1994.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +995 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1995.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +996 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1996.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +997 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1997.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +998 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1998.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +999 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1999.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1000 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11000.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1001 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11001.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1002 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11002.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1003 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11003.mem 332 36 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1004 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11004.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1005 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11005.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1006 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11006.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1007 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11007.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1008 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11008.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1009 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11009.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1010 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11010.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1011 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11011.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1012 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11012.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1013 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11013.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1014 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11014.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1015 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11015.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1016 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11016.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1017 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11017.mem 377 41 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1018 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11018.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1019 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11019.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1020 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11020.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1021 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11021.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1022 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11022.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1023 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11023.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1024 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11024.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1025 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11025.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1026 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11026.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1027 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11027.mem 215 23 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1028 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11028.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1029 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11029.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1030 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11030.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1031 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11031.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1032 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11032.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1033 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11033.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1034 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11034.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1035 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11035.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1036 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11036.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1037 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11037.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1038 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11038.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1039 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11039.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1040 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11040.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1041 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11041.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1042 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11042.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1043 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11043.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1044 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11044.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1045 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11045.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1046 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11046.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1047 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11047.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1048 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11048.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1049 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11049.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1050 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11050.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1051 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11051.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1052 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11052.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1053 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11053.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1054 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11054.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1055 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11055.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1056 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11056.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1057 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11057.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1058 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11058.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1059 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11059.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1060 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11060.mem 314 34 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1061 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11061.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1062 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11062.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1063 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11063.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1064 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11064.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1065 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11065.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1066 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11066.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1067 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11067.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1068 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11068.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1069 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11069.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1070 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11070.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1071 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11071.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1072 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11072.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1073 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11073.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1074 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11074.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1075 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11075.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1076 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11076.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1077 31915 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11077.mem 2033 225 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1078 33303 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11078.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1079 33303 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11079.mem 1349 149 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1080 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11080.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1081 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11081.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1082 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11082.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1083 35907 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11083.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1084 35907 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11084.mem 1907 211 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1085 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11085.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1086 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11086.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1087 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11087.mem 17 1 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1088 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11088.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1089 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11089.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1090 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11090.mem 971 107 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1091 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11091.mem 521 57 0 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1092 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11092.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1093 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11093.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1094 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11094.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1095 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11095.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1096 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11096.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1097 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11097.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1098 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11098.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1099 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11099.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1100 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11100.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1101 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11101.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1102 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11102.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1103 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11103.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1104 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11104.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1105 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11105.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1106 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11106.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1107 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11107.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1108 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11108.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1109 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11109.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1110 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11110.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1111 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11111.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1112 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11112.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1113 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11113.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1114 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11114.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1115 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11115.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1116 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11116.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1117 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11117.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1118 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11118.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1119 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11119.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1120 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11120.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1121 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11121.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1122 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11122.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1123 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11123.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1124 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11124.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1125 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11125.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1126 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11126.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1127 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11127.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1128 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11128.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1129 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11129.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1130 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11130.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1131 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11131.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1132 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11132.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1133 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11133.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1134 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11134.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1135 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11135.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1136 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11136.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1137 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11137.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1138 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11138.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1139 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11139.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1140 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11140.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1141 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11141.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1142 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11142.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1143 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11143.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1144 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11144.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1145 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11145.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1146 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11146.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1147 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11147.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1148 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11148.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1149 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11149.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1150 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11150.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1151 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11151.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1152 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11152.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1153 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11153.mem 476 52 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1154 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11154.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1155 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11155.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1156 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11156.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1157 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11157.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1158 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11158.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1159 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11159.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1160 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11160.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1161 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11161.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1162 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11162.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1163 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11163.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1164 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11164.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1165 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11165.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1166 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11166.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1167 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11167.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1168 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11168.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1169 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11169.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1170 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11170.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1171 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11171.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1172 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11172.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1173 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11173.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1174 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11174.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1175 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11175.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1176 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11176.mem 386 42 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1177 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11177.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1178 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11178.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1179 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11179.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1180 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11180.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1181 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11181.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1182 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11182.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1183 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11183.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1184 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11184.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1185 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11185.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1186 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11186.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1187 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11187.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1188 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11188.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1189 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11189.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1190 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11190.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1191 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11191.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1192 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11192.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1193 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11193.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1194 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11194.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1195 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11195.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1196 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11196.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1197 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11197.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1198 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11198.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1199 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11199.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1200 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11200.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1201 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11201.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1202 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11202.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1203 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11203.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1204 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11204.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1205 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11205.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1206 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11206.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1207 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11207.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1208 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11208.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1209 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11209.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1210 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11210.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1211 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11211.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1212 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11212.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1213 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11213.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1214 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11214.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1215 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11215.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1216 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11216.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1217 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11217.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1218 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11218.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1219 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11219.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1220 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11220.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1221 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11221.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1222 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11222.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1223 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11223.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1224 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11224.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1225 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11225.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1226 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11226.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1227 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11227.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1228 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11228.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1229 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11229.mem 431 47 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1230 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11230.mem 467 51 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1231 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11231.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1232 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11232.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1233 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11233.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1234 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11234.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1235 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11235.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1236 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11236.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1237 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11237.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1238 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11238.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1239 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11239.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1240 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11240.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1241 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11241.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1242 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11242.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1243 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11243.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1244 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11244.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1245 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11245.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1246 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11246.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1247 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11247.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1248 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11248.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1249 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11249.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1250 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11250.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1251 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11251.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1252 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11252.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1253 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11253.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1254 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11254.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1255 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11255.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1256 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11256.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1257 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11257.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1258 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11258.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1259 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11259.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1260 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11260.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1261 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11261.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1262 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11262.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1263 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11263.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1264 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11264.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1265 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11265.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1266 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11266.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1267 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11267.mem 413 45 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1268 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11268.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1269 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11269.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1270 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11270.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1271 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11271.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1272 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11272.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1273 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11273.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1274 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11274.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1275 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11275.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1276 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11276.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1277 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11277.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1278 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11278.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1279 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11279.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1280 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11280.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1281 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11281.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1282 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11282.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1283 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11283.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1284 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11284.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1285 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11285.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1286 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11286.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1287 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11287.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1288 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11288.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1289 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11289.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1290 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11290.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1291 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11291.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1292 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11292.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1293 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11293.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1294 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11294.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1295 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11295.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1296 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11296.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1297 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11297.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1298 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11298.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1299 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11299.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1300 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11300.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1301 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11301.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1302 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11302.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1303 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11303.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1304 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11304.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1305 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11305.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1306 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11306.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1307 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11307.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1308 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11308.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1309 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11309.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1310 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11310.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1311 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11311.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1312 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11312.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1313 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11313.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1314 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11314.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1315 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11315.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1316 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11316.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1317 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11317.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1318 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11318.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1319 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11319.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1320 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11320.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1321 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11321.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1322 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11322.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1323 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11323.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1324 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11324.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1325 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11325.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1326 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11326.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1327 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11327.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1328 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11328.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1329 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11329.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1330 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11330.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1331 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11331.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1332 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11332.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1333 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11333.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1334 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11334.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1335 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11335.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1336 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11336.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1337 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11337.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1338 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11338.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1339 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11339.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1340 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11340.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1341 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11341.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1342 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11342.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1343 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11343.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1344 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11344.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1345 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11345.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1346 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11346.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1347 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11347.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1348 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11348.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1349 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11349.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1350 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11350.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1351 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11351.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1352 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11352.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1353 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11353.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1354 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11354.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1355 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11355.mem 548 60 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1356 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11356.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1357 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11357.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1358 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11358.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1359 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11359.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1360 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11360.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1361 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11361.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1362 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11362.mem 512 56 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1363 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11363.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1364 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11364.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1365 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11365.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1366 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11366.mem 611 67 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1367 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11367.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1368 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11368.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1369 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11369.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1370 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11370.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1371 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11371.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1372 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11372.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1373 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11373.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1374 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11374.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1375 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11375.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1376 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11376.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1377 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11377.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1378 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11378.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1379 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11379.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1380 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11380.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1381 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11381.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1382 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11382.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1383 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11383.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1384 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11384.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1385 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11385.mem 602 66 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1386 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11386.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1387 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11387.mem 593 65 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1388 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11388.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1389 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11389.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1390 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11390.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1391 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11391.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1392 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11392.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1393 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11393.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1394 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11394.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1395 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11395.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1396 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11396.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1397 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11397.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1398 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11398.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1399 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11399.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1400 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11400.mem 1088 120 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1401 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11401.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1402 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11402.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1403 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11403.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1404 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11404.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1405 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11405.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1406 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11406.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1407 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11407.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1408 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11408.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1409 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11409.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1410 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11410.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1411 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11411.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1412 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11412.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1413 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11413.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1414 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11414.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1415 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11415.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1416 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11416.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1417 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11417.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1418 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11418.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1419 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11419.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1420 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11420.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1421 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11421.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1422 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11422.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1423 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11423.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1424 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11424.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1425 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11425.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1426 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11426.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1427 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11427.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1428 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11428.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1429 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11429.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1430 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11430.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1431 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11431.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1432 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11432.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1433 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11433.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1434 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11434.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1435 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11435.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1436 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11436.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1437 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11437.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1438 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11438.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1439 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11439.mem 512 56 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1440 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11440.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1441 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11441.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1442 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11442.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1443 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11443.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1444 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11444.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1445 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11445.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1446 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11446.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1447 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11447.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1448 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11448.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1449 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11449.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1450 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11450.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1451 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11451.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1452 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11452.mem 665 73 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1453 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11453.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1454 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11454.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1455 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11455.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1456 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11456.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1457 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11457.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1458 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11458.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1459 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11459.mem 629 69 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1460 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11460.mem 710 78 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1461 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11461.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1462 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11462.mem 701 77 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1463 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11463.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1464 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11464.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1465 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11465.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1466 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11466.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1467 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11467.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1468 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11468.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1469 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11469.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1470 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11470.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1471 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11471.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1472 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11472.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1473 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11473.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1474 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11474.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1475 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11475.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1476 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11476.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1477 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11477.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1478 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11478.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1479 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11479.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1480 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11480.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1481 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11481.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1482 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11482.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1483 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11483.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1484 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11484.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1485 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11485.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1486 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11486.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1487 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11487.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1488 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11488.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1489 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11489.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1490 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11490.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1491 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11491.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1492 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11492.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1493 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11493.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1494 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11494.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1495 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11495.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1496 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11496.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1497 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11497.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1498 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11498.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1499 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11499.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1500 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11500.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1501 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11501.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1502 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11502.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1503 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11503.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1504 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11504.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1505 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11505.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1506 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11506.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1507 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11507.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1508 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11508.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1509 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11509.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1510 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11510.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1511 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11511.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1512 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11512.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1513 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11513.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1514 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11514.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1515 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11515.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1516 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11516.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1517 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11517.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1518 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11518.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1519 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11519.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1520 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11520.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1521 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11521.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1522 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11522.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1523 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11523.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1524 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11524.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1525 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11525.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1526 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11526.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1527 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11527.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1528 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11528.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1529 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11529.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1530 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11530.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1531 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11531.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1532 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11532.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1533 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11533.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1534 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11534.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1535 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11535.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1536 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11536.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1537 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11537.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1538 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11538.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1539 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11539.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1540 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11540.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1541 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11541.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1542 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11542.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1543 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11543.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1544 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11544.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1545 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11545.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1546 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11546.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1547 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11547.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1548 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11548.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1549 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11549.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1550 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11550.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1551 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11551.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1552 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11552.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1553 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11553.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1554 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11554.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1555 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11555.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1556 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11556.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1557 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11557.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1558 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11558.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1559 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11559.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1560 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11560.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1561 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11561.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1562 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11562.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1563 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11563.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1564 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11564.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1565 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11565.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1566 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11566.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1567 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11567.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1568 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11568.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1569 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11569.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1570 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11570.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1571 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11571.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1572 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11572.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1573 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11573.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1574 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11574.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1575 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11575.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1576 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11576.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1577 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11577.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1578 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11578.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1579 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11579.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1580 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11580.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1581 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11581.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1582 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11582.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1583 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11583.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1584 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11584.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1585 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11585.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1586 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11586.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1587 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11587.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1588 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11588.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1589 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11589.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1590 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11590.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1591 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11591.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1592 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11592.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1593 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11593.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1594 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11594.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1595 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11595.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1596 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11596.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1597 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11597.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1598 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11598.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1599 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11599.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1600 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11600.mem 593 65 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1601 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11601.mem 647 71 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1602 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11602.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1603 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11603.mem 728 80 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1604 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11604.mem 665 73 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1605 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11605.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1606 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11606.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1607 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11607.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1608 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11608.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1609 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11609.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1610 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11610.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1611 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11611.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1612 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11612.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1613 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11613.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1614 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11614.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1615 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11615.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1616 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11616.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1617 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11617.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1618 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11618.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1619 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11619.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1620 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11620.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1621 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11621.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1622 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11622.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1623 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11623.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1624 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11624.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1625 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11625.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1626 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11626.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1627 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11627.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1628 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11628.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1629 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11629.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1630 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11630.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1631 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11631.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1632 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11632.mem 611 67 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1633 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11633.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1634 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11634.mem 809 89 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1635 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11635.mem 377 41 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1636 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11636.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1637 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11637.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1638 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11638.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1639 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11639.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1640 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11640.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1641 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11641.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1642 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11642.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1643 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11643.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1644 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11644.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1645 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11645.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1646 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11646.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1647 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11647.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1648 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11648.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1649 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11649.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1650 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11650.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1651 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11651.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1652 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11652.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1653 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11653.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1654 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11654.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1655 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11655.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1656 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11656.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1657 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11657.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1658 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11658.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1659 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11659.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1660 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11660.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1661 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11661.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1662 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11662.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1663 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11663.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1664 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11664.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1665 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11665.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1666 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11666.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1667 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11667.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1668 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11668.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1669 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11669.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1670 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11670.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1671 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11671.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1672 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11672.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1673 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11673.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1674 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11674.mem 845 93 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1675 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11675.mem 1457 161 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1676 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11676.mem 602 66 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1677 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11677.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1678 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11678.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1679 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11679.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1680 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11680.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1681 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11681.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1682 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11682.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1683 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11683.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1684 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11684.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1685 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11685.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1686 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11686.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1687 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11687.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1688 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11688.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1689 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11689.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1690 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11690.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1691 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11691.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1692 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11692.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1693 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11693.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1694 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11694.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1695 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11695.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1696 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11696.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1697 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11697.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1698 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11698.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1699 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11699.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1700 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11700.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1701 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11701.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1702 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11702.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1703 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11703.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1704 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11704.mem 485 53 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1705 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11705.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1706 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11706.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1707 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11707.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1708 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11708.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1709 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11709.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1710 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11710.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1711 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11711.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1712 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11712.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1713 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11713.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1714 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11714.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1715 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11715.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1716 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11716.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1717 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11717.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1718 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11718.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1719 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11719.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1720 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11720.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1721 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11721.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1722 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11722.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1723 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11723.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1724 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11724.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1725 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11725.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1726 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11726.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1727 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11727.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1728 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11728.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1729 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11729.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1730 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11730.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1731 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11731.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1732 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11732.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1733 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11733.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1734 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11734.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1735 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11735.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1736 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11736.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1737 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11737.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1738 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11738.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1739 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11739.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1740 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11740.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1741 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11741.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1742 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11742.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1743 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11743.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1744 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11744.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1745 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11745.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1746 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11746.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1747 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11747.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1748 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11748.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1749 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11749.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1750 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11750.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1751 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11751.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1752 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11752.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1753 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11753.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1754 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11754.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1755 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11755.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1756 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11756.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1757 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11757.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1758 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11758.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1759 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11759.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1760 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11760.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1761 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11761.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1762 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11762.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1763 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11763.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1764 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11764.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1765 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11765.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1766 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11766.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1767 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11767.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1768 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11768.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1769 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11769.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1770 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11770.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1771 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11771.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1772 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11772.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1773 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11773.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1774 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11774.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1775 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11775.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1776 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11776.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1777 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11777.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1778 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11778.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1779 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11779.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1780 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11780.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1781 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11781.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1782 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11782.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1783 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11783.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1784 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11784.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1785 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11785.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1786 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11786.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1787 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11787.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1788 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11788.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1789 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11789.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1790 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11790.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1791 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11791.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1792 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11792.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1793 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11793.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1794 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11794.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1795 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11795.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1796 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11796.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1797 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11797.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1798 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11798.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1799 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11799.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1800 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11800.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1801 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11801.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1802 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11802.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1803 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11803.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1804 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11804.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1805 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11805.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1806 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11806.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1807 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11807.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1808 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11808.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1809 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11809.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1810 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11810.mem 476 52 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1811 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11811.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1812 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11812.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1813 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11813.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1814 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11814.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1815 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11815.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1816 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11816.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1817 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11817.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1818 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11818.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1819 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11819.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1820 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11820.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1821 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11821.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1822 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11822.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1823 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11823.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1824 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11824.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1825 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11825.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1826 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11826.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1827 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11827.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1828 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11828.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1829 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11829.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1830 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11830.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1831 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11831.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1832 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11832.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1833 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11833.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1834 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11834.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1835 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11835.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1836 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11836.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1837 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11837.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1838 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11838.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1839 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11839.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1840 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11840.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1841 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11841.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1842 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11842.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1843 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11843.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1844 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11844.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1845 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11845.mem 467 51 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1846 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11846.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1847 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11847.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1848 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11848.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1849 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11849.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1850 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11850.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1851 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11851.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1852 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11852.mem 341 37 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1853 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11853.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1854 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11854.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1855 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11855.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1856 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11856.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1857 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11857.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1858 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11858.mem 413 45 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1859 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11859.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1860 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11860.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1861 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11861.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1862 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11862.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1863 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11863.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1864 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11864.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1865 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11865.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1866 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11866.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1867 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11867.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1868 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11868.mem 1781 197 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1869 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11869.mem 1394 154 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1870 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11870.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1871 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11871.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1872 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11872.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1873 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11873.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1874 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11874.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1875 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11875.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1876 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11876.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1877 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11877.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1878 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11878.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1879 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11879.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1880 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11880.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1881 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11881.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1882 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11882.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1883 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11883.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1884 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11884.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1885 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11885.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1886 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11886.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1887 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11887.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1888 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11888.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1889 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11889.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1890 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11890.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1891 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11891.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1892 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11892.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1893 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11893.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1894 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11894.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1895 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11895.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1896 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11896.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1897 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11897.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1898 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11898.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1899 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11899.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1900 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11900.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1901 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11901.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1902 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11902.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1903 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11903.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1904 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11904.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1905 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11905.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1906 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11906.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1907 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11907.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1908 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11908.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1909 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11909.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1910 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11910.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1911 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11911.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1912 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11912.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1913 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11913.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1914 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11914.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1915 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11915.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1916 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11916.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1917 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11917.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1918 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11918.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1919 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11919.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1920 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11920.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1921 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11921.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1922 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11922.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1923 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11923.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1924 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11924.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1925 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11925.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1926 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11926.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1927 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11927.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1928 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11928.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1929 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11929.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1930 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11930.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1931 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11931.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1932 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11932.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1933 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11933.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1934 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11934.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1935 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11935.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1936 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11936.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1937 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11937.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1938 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11938.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1939 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11939.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1940 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11940.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1941 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11941.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1942 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11942.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1943 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11943.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1944 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11944.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1945 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11945.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1946 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11946.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1947 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11947.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1948 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11948.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1949 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11949.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1950 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11950.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1951 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11951.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1952 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11952.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1953 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11953.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1954 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11954.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1955 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11955.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1956 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11956.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1957 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11957.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1958 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11958.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1959 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11959.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1960 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11960.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1961 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11961.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1962 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11962.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1963 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11963.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1964 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11964.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1965 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11965.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1966 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11966.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1967 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11967.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1968 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11968.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1969 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11969.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1970 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11970.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1971 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11971.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1972 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11972.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1973 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11973.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1974 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11974.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1975 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11975.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1976 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11976.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1977 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11977.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1978 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11978.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1979 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11979.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1980 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11980.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1981 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11981.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1982 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11982.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1983 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11983.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1984 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11984.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1985 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11985.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1986 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11986.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1987 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11987.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1988 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11988.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1989 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11989.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1990 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11990.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1991 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11991.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1992 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11992.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1993 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11993.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1994 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11994.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1995 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11995.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1996 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11996.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1997 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11997.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1998 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11998.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1999 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11999.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2000 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12000.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2001 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12001.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2002 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12002.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2003 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12003.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2004 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12004.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2005 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12005.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2006 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12006.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2007 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12007.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2008 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12008.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2009 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12009.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2010 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12010.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2011 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12011.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2012 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12012.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2013 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12013.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2014 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12014.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2015 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12015.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2016 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12016.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2017 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12017.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2018 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12018.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2019 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12019.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2020 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12020.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2021 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12021.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2022 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12022.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2023 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12023.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2024 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12024.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2025 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12025.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2026 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12026.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2027 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12027.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2028 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12028.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2029 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12029.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2030 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12030.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2031 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12031.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2032 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12032.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2033 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12033.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2034 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12034.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2035 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12035.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2036 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12036.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2037 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12037.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2038 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12038.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2039 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12039.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2040 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12040.mem 827 91 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2041 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12041.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2042 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12042.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2043 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12043.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2044 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12044.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2045 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12045.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2046 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12046.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2047 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12047.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2048 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12048.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2049 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12049.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2050 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12050.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2051 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12051.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2052 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12052.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2053 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12053.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2054 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12054.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2055 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12055.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2056 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12056.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2057 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12057.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2058 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12058.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2059 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12059.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2060 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12060.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2061 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12061.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2062 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12062.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2063 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12063.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2064 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12064.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2065 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12065.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2066 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12066.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2067 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12067.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2068 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12068.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2069 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12069.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2070 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12070.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2071 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12071.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2072 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12072.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2073 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12073.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2074 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12074.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2075 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12075.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2076 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12076.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2077 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12077.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2078 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12078.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2079 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12079.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2080 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12080.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2081 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12081.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2082 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12082.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2083 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12083.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2084 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12084.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2085 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12085.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2086 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12086.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2087 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12087.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2088 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12088.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2089 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12089.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2090 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12090.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2091 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12091.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2092 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12092.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2093 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12093.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2094 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12094.mem 26 2 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2095 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12095.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2096 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12096.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2097 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12097.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2098 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12098.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2099 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12099.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2100 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12100.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2101 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12101.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2102 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12102.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2103 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12103.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2104 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12104.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2105 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12105.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2106 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12106.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2107 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12107.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2108 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12108.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2109 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12109.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2110 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12110.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2111 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12111.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2112 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12112.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2113 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12113.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2114 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12114.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2115 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12115.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2116 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12116.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2117 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12117.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2118 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12118.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2119 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12119.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2120 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12120.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2121 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12121.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2122 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12122.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2123 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12123.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2124 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12124.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2125 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12125.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2126 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12126.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2127 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12127.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2128 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12128.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2129 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12129.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2130 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12130.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2131 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12131.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2132 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12132.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2133 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12133.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2134 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12134.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2135 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12135.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2136 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12136.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2137 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12137.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2138 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12138.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2139 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12139.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2140 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12140.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2141 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12141.mem 323 35 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2142 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12142.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2143 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12143.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2144 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12144.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2145 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12145.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2146 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12146.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2147 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12147.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2148 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12148.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2149 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12149.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2150 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12150.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2151 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12151.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2152 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12152.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2153 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12153.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2154 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12154.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2155 71148 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12155.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2156 71148 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12156.mem 1727 191 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2157 71787 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12157.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2158 71787 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12158.mem 1754 194 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2159 72426 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12159.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2160 72426 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12160.mem 1736 192 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2161 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12161.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2162 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12162.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2163 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12163.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2164 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12164.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2165 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12165.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2166 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12166.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2167 74343 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12167.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2168 74343 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12168.mem 1763 195 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2169 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12169.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2170 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12170.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2171 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12171.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2172 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12172.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2173 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12173.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2174 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12174.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2175 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12175.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2176 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12176.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2177 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12177.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2178 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12178.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2179 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12179.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2180 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12180.mem 1061 117 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2181 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12181.mem 341 37 0 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2182 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12182.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2183 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12183.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2184 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12184.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2185 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12185.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2186 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12186.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2187 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12187.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2188 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12188.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2189 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12189.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2190 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12190.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2191 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12191.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2192 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12192.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2193 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12193.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2194 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12194.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2195 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12195.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2196 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12196.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2197 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12197.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2198 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12198.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2199 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12199.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2200 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12200.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2201 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12201.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2202 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12202.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2203 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12203.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2204 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12204.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2205 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12205.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2206 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12206.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2207 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12207.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2208 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12208.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2209 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12209.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2210 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12210.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2211 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12211.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2212 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12212.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2213 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12213.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2214 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12214.mem 548 60 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2215 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12215.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2216 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12216.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2217 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12217.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2218 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12218.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2219 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12219.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2220 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12220.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2221 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12221.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2222 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12222.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2223 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12223.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2224 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12224.mem 269 29 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2225 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12225.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2226 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12226.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2227 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12227.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2228 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12228.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2229 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12229.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2230 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12230.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2231 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12231.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2232 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12232.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2233 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12233.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2234 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12234.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2235 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12235.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2236 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12236.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2237 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12237.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2238 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12238.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2239 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12239.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2240 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12240.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2241 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12241.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2242 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12242.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2243 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12243.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2244 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12244.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2245 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12245.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2246 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12246.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2247 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12247.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2248 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12248.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2249 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12249.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2250 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12250.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2251 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12251.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2252 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12252.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2253 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12253.mem 512 56 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2254 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12254.mem 719 79 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2255 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12255.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2256 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12256.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2257 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12257.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2258 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12258.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2259 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12259.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2260 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12260.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2261 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12261.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2262 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12262.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2263 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12263.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2264 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12264.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2265 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12265.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2266 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12266.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2267 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12267.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2268 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12268.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2269 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12269.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2270 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12270.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2271 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12271.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2272 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12272.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2273 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12273.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2274 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12274.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2275 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12275.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2276 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12276.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2277 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12277.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2278 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12278.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2279 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12279.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2280 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12280.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2281 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12281.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2282 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12282.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2283 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12283.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2284 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12284.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2285 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12285.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2286 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12286.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2287 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12287.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2288 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12288.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2289 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12289.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2290 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12290.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2291 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12291.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2292 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12292.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2293 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12293.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2294 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12294.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2295 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12295.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2296 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12296.mem 836 92 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2297 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12297.mem 395 43 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2298 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12298.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2299 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12299.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2300 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12300.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2301 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12301.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2302 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12302.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2303 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12303.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2304 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12304.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2305 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12305.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2306 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12306.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2307 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12307.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2308 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12308.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2309 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12309.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2310 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12310.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2311 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12311.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2312 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12312.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2313 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12313.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2314 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12314.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2315 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12315.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2316 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12316.mem 395 43 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2317 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12317.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2318 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12318.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2319 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12319.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2320 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12320.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2321 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12321.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2322 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12322.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2323 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12323.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2324 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12324.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2325 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12325.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2326 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12326.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2327 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12327.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2328 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12328.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2329 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12329.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2330 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12330.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2331 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12331.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2332 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12332.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2333 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12333.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2334 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12334.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2335 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12335.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2336 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12336.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2337 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12337.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2338 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12338.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2339 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12339.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2340 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12340.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2341 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12341.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2342 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12342.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2343 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12343.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2344 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12344.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2345 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12345.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2346 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12346.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2347 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12347.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2348 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12348.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2349 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12349.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2350 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12350.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2351 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12351.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2352 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12352.mem 494 54 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2353 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12353.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2354 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12354.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2355 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12355.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2356 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12356.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2357 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12357.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2358 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12358.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2359 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12359.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2360 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12360.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2361 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12361.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2362 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12362.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2363 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12363.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2364 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12364.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2365 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12365.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2366 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12366.mem 710 78 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2367 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12367.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2368 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12368.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2369 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12369.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2370 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12370.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2371 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12371.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2372 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12372.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2373 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12373.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2374 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12374.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2375 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12375.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2376 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12376.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2377 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12377.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2378 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12378.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2379 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12379.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2380 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12380.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2381 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12381.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2382 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12382.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2383 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12383.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2384 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12384.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2385 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12385.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2386 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12386.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2387 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12387.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2388 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12388.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2389 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12389.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2390 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12390.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2391 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12391.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2392 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12392.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2393 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12393.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2394 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12394.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2395 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12395.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2396 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12396.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2397 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12397.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2398 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12398.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2399 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12399.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2400 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12400.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2401 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12401.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2402 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12402.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2403 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12403.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2404 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12404.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2405 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12405.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2406 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12406.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2407 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12407.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2408 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12408.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2409 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12409.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2410 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12410.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2411 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12411.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2412 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12412.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2413 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12413.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2414 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12414.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2415 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12415.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2416 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12416.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2417 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12417.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2418 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12418.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2419 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12419.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2420 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12420.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2421 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12421.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2422 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12422.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2423 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12423.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2424 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12424.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2425 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12425.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2426 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12426.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2427 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12427.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2428 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12428.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2429 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12429.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2430 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12430.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2431 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12431.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2432 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12432.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2433 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12433.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2434 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12434.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2435 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12435.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2436 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12436.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2437 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12437.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2438 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12438.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2439 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12439.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2440 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12440.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2441 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12441.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2442 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12442.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2443 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12443.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2444 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12444.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2445 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12445.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2446 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12446.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2447 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12447.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2448 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12448.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2449 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12449.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2450 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12450.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2451 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12451.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2452 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12452.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2453 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12453.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2454 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12454.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2455 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12455.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2456 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12456.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2457 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12457.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2458 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12458.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2459 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12459.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2460 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12460.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2461 78319 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12461.mem 1880 208 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2462 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12462.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2463 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12463.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2464 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12464.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2465 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12465.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2466 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12466.mem 449 49 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2467 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12467.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2468 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12468.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2469 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12469.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2470 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12470.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2471 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12471.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2472 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12472.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2473 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12473.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2474 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12474.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2475 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12475.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2476 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12476.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2477 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12477.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2478 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12478.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2479 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12479.mem 440 48 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2480 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12480.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2481 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12481.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2482 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12482.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2483 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12483.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2484 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12484.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2485 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12485.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2486 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12486.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2487 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12487.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2488 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12488.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2489 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12489.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2490 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12490.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2491 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12491.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2492 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12492.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2493 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12493.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2494 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12494.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2495 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12495.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2496 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12496.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2497 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12497.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2498 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12498.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2499 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12499.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2500 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12500.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2501 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12501.mem 638 70 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2502 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12502.mem 746 82 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2503 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12503.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2504 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12504.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2505 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12505.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2506 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12506.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2507 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12507.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2508 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12508.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2509 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12509.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2510 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12510.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2511 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12511.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2512 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12512.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2513 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12513.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2514 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12514.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2515 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12515.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2516 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12516.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2517 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12517.mem 620 68 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2518 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12518.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2519 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12519.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2520 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12520.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2521 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12521.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2522 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12522.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2523 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12523.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2524 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12524.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2525 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12525.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2526 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12526.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2527 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12527.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2528 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12528.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2529 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12529.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2530 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12530.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2531 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12531.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2532 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12532.mem 323 35 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2533 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12533.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2534 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12534.mem 377 41 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2535 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12535.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2536 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12536.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2537 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12537.mem 863 95 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2538 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12538.mem 404 44 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2539 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12539.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2540 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12540.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2541 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12541.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2542 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12542.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2543 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12543.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2544 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12544.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2545 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12545.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2546 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12546.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2547 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12547.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2548 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12548.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2549 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12549.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2550 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12550.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2551 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12551.mem 224 24 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2552 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12552.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2553 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12553.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2554 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12554.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2555 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12555.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2556 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12556.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2557 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12557.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2558 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12558.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2559 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12559.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2560 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12560.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2561 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12561.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2562 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12562.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2563 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12563.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2564 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12564.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2565 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12565.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2566 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12566.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2567 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12567.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2568 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12568.mem 350 38 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2569 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12569.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2570 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12570.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2571 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12571.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2572 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12572.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2573 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12573.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2574 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12574.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2575 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12575.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2576 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12576.mem 449 49 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2577 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12577.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2578 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12578.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2579 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12579.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2580 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12580.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2581 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12581.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2582 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12582.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2583 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12583.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2584 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12584.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2585 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12585.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2586 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12586.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2587 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12587.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2588 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12588.mem 350 38 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2589 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12589.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2590 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12590.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2591 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12591.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2592 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12592.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2593 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12593.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2594 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12594.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2595 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12595.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2596 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12596.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2597 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12597.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2598 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12598.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2599 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12599.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2600 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12600.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2601 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12601.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2602 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12602.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2603 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12603.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2604 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12604.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2605 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12605.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2606 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12606.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2607 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12607.mem 368 40 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2608 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12608.mem 296 32 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2609 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12609.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2610 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12610.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2611 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12611.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2612 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12612.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2613 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12613.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2614 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12614.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2615 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12615.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2616 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12616.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2617 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12617.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2618 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12618.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2619 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12619.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2620 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12620.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2621 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12621.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2622 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12622.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2623 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12623.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2624 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12624.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2625 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12625.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2626 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12626.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2627 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12627.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2628 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12628.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2629 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12629.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2630 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12630.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2631 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12631.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2632 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12632.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2633 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12633.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2634 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12634.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2635 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12635.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2636 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12636.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2637 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12637.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2638 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12638.mem 422 46 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2639 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12639.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2640 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12640.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2641 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12641.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2642 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12642.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2643 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12643.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2644 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12644.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2645 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12645.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2646 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12646.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2647 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12647.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2648 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12648.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2649 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12649.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2650 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12650.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2651 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12651.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2652 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12652.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2653 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12653.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2654 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12654.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2655 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12655.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2656 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12656.mem 296 32 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2657 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12657.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2658 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12658.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2659 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12659.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2660 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12660.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2661 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12661.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2662 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12662.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2663 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12663.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2664 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12664.mem 440 48 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2665 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12665.mem 224 24 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2666 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12666.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2667 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12667.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2668 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12668.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2669 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12669.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2670 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12670.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2671 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12671.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2672 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12672.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2673 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12673.mem 935 103 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2674 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12674.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2675 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12675.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2676 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12676.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2677 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12677.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2678 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12678.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2679 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12679.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2680 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12680.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2681 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12681.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2682 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12682.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2683 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12683.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2684 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12684.mem 377 41 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2685 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12685.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2686 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12686.mem 566 62 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2687 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12687.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2688 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12688.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2689 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12689.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2690 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12690.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2691 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12691.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2692 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12692.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2693 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12693.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2694 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12694.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2695 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12695.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2696 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12696.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2697 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12697.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2698 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12698.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2699 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12699.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2700 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12700.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2701 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12701.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2702 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12702.mem 512 56 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2703 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12703.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2704 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12704.mem 422 46 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2705 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12705.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2706 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12706.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2707 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12707.mem 413 45 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2708 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12708.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2709 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12709.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2710 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12710.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2711 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12711.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2712 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12712.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2713 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12713.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2714 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12714.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2715 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12715.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2716 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12716.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2717 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12717.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2718 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12718.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2719 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12719.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2720 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12720.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2721 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12721.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2722 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12722.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2723 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12723.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2724 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12724.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2725 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12725.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2726 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12726.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2727 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12727.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2728 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12728.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2729 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12729.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2730 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12730.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2731 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12731.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2732 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12732.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2733 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12733.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2734 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12734.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2735 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12735.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2736 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12736.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2737 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12737.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2738 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12738.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2739 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12739.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2740 79606 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12740.mem 368 40 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2741 80167 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12741.mem 575 63 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2742 82720 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12742.mem 1736 192 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2743 83323 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12743.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2744 83323 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12744.mem 1349 149 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2745 83944 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12745.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2746 83944 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12746.mem 665 73 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2747 84565 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12747.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2748 84565 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12748.mem 1214 134 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2749 85186 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12749.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2750 85186 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12750.mem 485 53 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2751 85807 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12751.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2752 85807 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12752.mem 1754 194 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2753 86428 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12753.mem 1826 202 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2754 87049 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12754.mem 1412 156 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2755 88918 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12755.mem 1484 164 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2756 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12756.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2757 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12757.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2758 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12758.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2759 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12759.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2760 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12760.mem 818 90 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2761 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12761.mem 1664 184 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2762 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12762.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2763 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12763.mem 1223 135 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2764 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12764.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2765 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12765.mem 1880 208 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2766 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12766.mem 1061 117 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2767 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12767.mem 935 103 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2768 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12768.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2769 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12769.mem 1538 170 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2770 91678 9216 480 sh3_zsrt139f12770_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12770.mem 449 49 0 sh3_zsrt139f12770_pal.mem 0x181b2ac2 +2771 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12771.mem 98 10 0 sh3_zsrt139f12771_pal.mem 0x47097d4c +2772 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12772.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2773 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12773.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2774 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12774.mem 593 65 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2775 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12775.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2776 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12776.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2777 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12777.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2778 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12778.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2779 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12779.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2780 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12780.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2781 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12781.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2782 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12782.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2783 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12783.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2784 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12784.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2785 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12785.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2786 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12786.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2787 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12787.mem 503 55 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2788 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12788.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2789 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12789.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2790 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12790.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2791 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12791.mem 620 68 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2792 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12792.mem 287 31 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2793 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12793.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2794 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12794.mem 242 26 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2795 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12795.mem 269 29 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2796 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12796.mem 719 79 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2797 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12797.mem 296 32 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2798 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12798.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2799 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12799.mem 764 84 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2800 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12800.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2801 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12801.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2802 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12802.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2803 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12803.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2804 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12804.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2805 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12805.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2806 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12806.mem 368 40 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2807 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12807.mem 710 78 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2808 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12808.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2809 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12809.mem 548 60 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2810 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12810.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2811 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12811.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2812 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12812.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2813 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12813.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2814 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12814.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2815 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12815.mem 611 67 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2816 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12816.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2817 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12817.mem 323 35 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2818 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12818.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2819 102065 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12819.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2820 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12820.mem 1286 142 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2821 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12821.mem 1259 139 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2822 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12822.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2823 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12823.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2824 104012 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12824.mem 1223 135 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2825 104012 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12825.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2826 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12826.mem 1151 127 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2827 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12827.mem 1106 122 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2828 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12828.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2829 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12829.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2830 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12830.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2831 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12831.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2832 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12832.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2833 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12833.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2834 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12834.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2835 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12835.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2836 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12836.mem 575 63 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2837 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12837.mem 854 94 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2838 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12838.mem 989 109 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2839 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12839.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2840 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12840.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2841 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12841.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2842 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12842.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2843 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12843.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2844 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12844.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2845 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12845.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2846 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12846.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2847 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12847.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2848 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12848.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2849 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12849.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2850 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12850.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2851 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12851.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2852 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12852.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2853 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12853.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2854 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12854.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2855 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12855.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2856 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12856.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2857 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12857.mem 242 26 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2858 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12858.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2859 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12859.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2860 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12860.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2861 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12861.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2862 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12862.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2863 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12863.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2864 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12864.mem 206 22 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2865 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12865.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2866 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12866.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2867 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12867.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2868 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12868.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2869 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12869.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2870 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12870.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2871 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12871.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2872 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12872.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2873 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12873.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2874 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12874.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2875 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12875.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2876 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12876.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2877 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12877.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2878 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12878.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2879 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12879.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2880 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12880.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2881 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12881.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2882 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12882.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2883 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12883.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2884 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12884.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2885 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12885.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2886 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12886.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2887 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12887.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2888 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12888.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2889 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12889.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2890 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12890.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2891 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12891.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2892 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12892.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2893 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12893.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2894 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12894.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2895 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12895.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2896 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12896.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2897 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12897.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2898 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12898.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2899 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12899.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2900 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12900.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2901 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12901.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2902 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12902.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2903 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12903.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2904 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12904.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2905 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12905.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2906 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12906.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2907 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12907.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2908 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12908.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2909 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12909.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2910 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12910.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2911 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12911.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2912 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12912.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2913 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12913.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2914 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12914.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2915 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12915.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2916 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12916.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2917 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12917.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2918 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12918.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2919 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12919.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2920 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12920.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2921 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12921.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2922 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12922.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2923 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12923.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2924 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12924.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2925 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12925.mem 170 18 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2926 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12926.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2927 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12927.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2928 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12928.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2929 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12929.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2930 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12930.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2931 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12931.mem 602 66 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2932 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12932.mem 305 33 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2933 112475 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12933.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2934 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12934.mem 449 49 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2935 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12935.mem 521 57 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2936 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12936.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2937 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12937.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2938 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12938.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2939 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12939.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2940 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12940.mem 584 64 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2941 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12941.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2942 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12942.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2943 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12943.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2944 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12944.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2945 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12945.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2946 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12946.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2947 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12947.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2948 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12948.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2949 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12949.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2950 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12950.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2951 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12951.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2952 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12952.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2953 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12953.mem 404 44 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2954 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12954.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2955 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12955.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2956 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12956.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2957 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12957.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2958 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12958.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2959 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12959.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2960 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12960.mem 179 19 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2961 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12961.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2962 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12962.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2963 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12963.mem 539 59 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2964 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12964.mem 17 1 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2965 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12965.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2966 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12966.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2967 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12967.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2968 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12968.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2969 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12969.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2970 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12970.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2971 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12971.mem 314 34 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2972 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12972.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2973 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12973.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2974 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12974.mem 2015 223 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2975 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12975.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2976 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12976.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2977 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12977.mem 1601 177 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2978 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12978.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2979 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12979.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2980 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12980.mem 620 68 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2981 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12981.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2982 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12982.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2983 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12983.mem 998 110 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2984 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12984.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2985 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12985.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2986 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12986.mem 1646 182 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2987 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12987.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2988 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12988.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2989 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12989.mem 1322 146 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2990 118877 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12990.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2991 118877 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12991.mem 935 103 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2992 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12992.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2993 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12993.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2994 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12994.mem 1718 190 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2995 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12995.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2996 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12996.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2997 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12997.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2998 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12998.mem 2033 225 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2999 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12999.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3000 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13000.mem 1286 142 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3001 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13001.mem 1961 217 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3002 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13002.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3003 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13003.mem 1025 113 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3004 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13004.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3005 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13005.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3006 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13006.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3007 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13007.mem 557 61 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3008 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13008.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3009 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13009.mem 2033 225 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3010 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13010.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3011 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13011.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3012 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13012.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3013 122600 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13013.mem 1745 193 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3014 122600 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13014.mem 944 104 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3015 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13015.mem 917 101 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3016 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13016.mem 1970 218 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3017 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13017.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3018 123869 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13018.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3019 123869 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13019.mem 206 22 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3020 124508 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13020.mem 989 109 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3021 125147 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13021.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3022 125786 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13022.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3023 125786 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13023.mem 557 61 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3024 126434 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13024.mem 1124 124 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3025 126968 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13025.mem 1925 213 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3026 127607 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13026.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3027 127607 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13027.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3028 128246 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13028.mem 1394 154 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3029 128885 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13029.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3030 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13030.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3031 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13031.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3032 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13032.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3033 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13033.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3034 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13034.mem 1079 119 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3035 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13035.mem 1457 161 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3036 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13036.mem 1673 185 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3037 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13037.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3038 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13038.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3039 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13039.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3040 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13040.mem 377 41 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3041 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13041.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3042 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13042.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3043 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13043.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3044 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13044.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3045 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13045.mem 1358 150 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3046 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13046.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3047 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13047.mem 1394 154 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3048 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13048.mem 521 57 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3049 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13049.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3050 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13050.mem 656 72 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3051 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13051.mem 728 80 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3052 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13052.mem 584 64 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3053 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13053.mem 395 43 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3054 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13054.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3055 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13055.mem 566 62 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3056 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13056.mem 656 72 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3057 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13057.mem 764 84 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3058 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13058.mem 251 27 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3059 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13059.mem 350 38 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3060 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13060.mem 1925 213 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3061 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13061.mem 1241 137 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3062 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13062.mem 1484 164 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3063 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13063.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3064 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13064.mem 1673 185 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3065 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13065.mem 1214 134 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3066 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13066.mem 1682 186 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3067 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13067.mem 1637 181 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3068 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13068.mem 1880 208 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3069 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13069.mem 1358 150 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3070 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13070.mem 971 107 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3071 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13071.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3072 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13072.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3073 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13073.mem 170 18 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3074 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13074.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3075 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13075.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3076 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13076.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3077 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13077.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3078 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13078.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3079 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13079.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3080 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13080.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3081 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13081.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3082 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13082.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3083 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13083.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3084 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13084.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3085 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13085.mem 827 91 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3086 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13086.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3087 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13087.mem 125 13 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3088 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13088.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3089 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13089.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3090 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13090.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3091 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13091.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3092 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13092.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3093 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13093.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3094 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13094.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3095 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13095.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3096 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13096.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3097 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13097.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3098 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13098.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3099 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13099.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3100 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13100.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3101 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13101.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3102 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13102.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3103 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13103.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3104 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13104.mem 359 39 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3105 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13105.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3106 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13106.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3107 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13107.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3108 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13108.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3109 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13109.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3110 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13110.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3111 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13111.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3112 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13112.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3113 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13113.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3114 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13114.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3115 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13115.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3116 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13116.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3117 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13117.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3118 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13118.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3119 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13119.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3120 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13120.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3121 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13121.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3122 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13122.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3123 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13123.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3124 135656 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13124.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3125 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13125.mem 674 74 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3126 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13126.mem 1016 112 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3127 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13127.mem 539 59 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3128 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13128.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3129 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13129.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3130 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13130.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3131 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13131.mem 800 88 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3132 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13132.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3133 143357 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13133.mem 548 60 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3134 143996 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13134.mem 512 56 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3135 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13135.mem 566 62 0 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3136 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13136.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3137 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13137.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3138 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13138.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3139 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13139.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3140 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13140.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3141 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13141.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3142 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13142.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3143 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13143.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3144 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13144.mem 206 22 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3145 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13145.mem 161 17 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3146 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13146.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3147 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13147.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3148 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13148.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3149 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13149.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3150 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13150.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3151 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13151.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3152 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13152.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3153 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13153.mem 107 11 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3154 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13154.mem 125 13 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3155 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13155.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3156 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13156.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3157 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13157.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3158 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13158.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3159 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13159.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3160 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13160.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3161 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13161.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3162 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13162.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3163 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13163.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3164 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13164.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3165 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13165.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3166 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13166.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3167 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13167.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3168 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13168.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3169 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13169.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3170 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13170.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3171 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13171.mem 89 9 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3172 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13172.mem 557 61 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3173 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13173.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3174 146205 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13174.mem 1367 151 0 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3175 146630 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13175.mem 1214 134 1 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3176 147068 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13176.mem 1322 146 1 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3177 147480 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13177.mem 1430 158 0 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3178 147888 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13178.mem 2042 226 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3179 147888 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13179.mem 296 32 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3180 148264 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13180.mem 2042 226 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3181 148264 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13181.mem 935 103 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3182 148919 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13182.mem 2042 226 0 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3183 148919 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13183.mem 44 4 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3184 149509 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13184.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3185 149509 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13185.mem 431 47 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3186 150125 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13186.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3187 150125 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13187.mem 215 23 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3188 150741 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13188.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3189 150741 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13189.mem 386 42 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3190 151344 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13190.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3191 151344 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13191.mem 296 32 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3192 152021 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13192.mem 692 76 0 sh3_zsrt139f13192_pal.mem 0xc6784386 +3193 152420 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13193.mem 917 101 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3194 152806 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13194.mem 926 102 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3195 153218 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13195.mem 566 62 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3196 153643 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13196.mem 881 97 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3197 154029 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13197.mem 863 95 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3198 154428 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13198.mem 809 89 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3199 154853 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13199.mem 863 95 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3200 155265 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13200.mem 791 87 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3201 155664 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13201.mem 764 84 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3202 156063 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13202.mem 674 74 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3203 156566 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13203.mem 2042 226 0 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3204 156566 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13204.mem 602 66 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3205 157273 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13205.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3206 157273 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13206.mem 773 85 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3207 157967 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13207.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3208 157967 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13208.mem 539 59 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3209 158674 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13209.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3210 158674 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13210.mem 755 83 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3211 159420 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13211.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3212 159420 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13212.mem 611 67 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3213 160114 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13213.mem 413 45 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3214 160331 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13214.mem 1097 121 0 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3215 160769 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13215.mem 971 107 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3216 161168 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13216.mem 935 103 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3217 161567 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13217.mem 1412 156 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3218 162300 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13218.mem 962 106 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3219 162725 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13219.mem 818 90 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3220 163163 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13220.mem 638 70 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3221 163575 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13221.mem 971 107 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3222 164204 10240 480 sh3_zsrt139f13222_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13222.mem 1745 193 0 sh3_zsrt139f13222_pal.mem 0xaa4e7e05 +3223 164950 10240 480 sh3_zsrt139f13222_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13223.mem 836 92 1 sh3_zsrt139f13222_pal.mem 0xaa4e7e05 +3224 175995 12288 480 sh3_zsrt139f13224_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f13224.mem 746 82 0 sh3_zsrt139f13224_pal.mem 0x56ebf1d1 +3225 176446 12288 480 sh3_zsrt139f13224_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f13225.mem 926 102 1 sh3_zsrt139f13224_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f20_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f20_epochs.txt new file mode 100644 index 0000000..03d477a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f20_epochs.txt @@ -0,0 +1,378 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139c3', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 375 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +126 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +127 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +145 196494 10240 480 sh3_zsrt139c30_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c30.mem 17 1 0 sh3_zsrt139c30_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139c31_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c31.mem 17 1 1 sh3_zsrt139c31_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139c32_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c32.mem 17 1 1 sh3_zsrt139c32_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139c33_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c33.mem 17 1 1 sh3_zsrt139c33_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139c34_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c34.mem 17 1 1 sh3_zsrt139c34_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139c35_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c35.mem 17 1 1 sh3_zsrt139c35_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139c36_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c36.mem 17 1 1 sh3_zsrt139c36_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139c37_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c37.mem 17 1 1 sh3_zsrt139c37_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139c38_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c38.mem 17 1 1 sh3_zsrt139c38_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139c39_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c39.mem 17 1 1 sh3_zsrt139c39_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139c310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c310.mem 17 1 1 sh3_zsrt139c310_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139c311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c311.mem 17 1 1 sh3_zsrt139c311_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139c312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c312.mem 17 1 1 sh3_zsrt139c312_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139c313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c313.mem 17 1 1 sh3_zsrt139c313_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139c314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c314.mem 17 1 1 sh3_zsrt139c314_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139c315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c315.mem 17 1 1 sh3_zsrt139c315_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139c316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c316.mem 17 1 1 sh3_zsrt139c316_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139c317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c317.mem 17 1 1 sh3_zsrt139c317_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139c318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c318.mem 17 1 1 sh3_zsrt139c318_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139c319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c319.mem 17 1 1 sh3_zsrt139c319_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139c320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c320.mem 17 1 1 sh3_zsrt139c320_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139c321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c321.mem 17 1 1 sh3_zsrt139c321_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139c322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c322.mem 17 1 1 sh3_zsrt139c322_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139c323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c323.mem 17 1 1 sh3_zsrt139c323_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139c324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c324.mem 17 1 1 sh3_zsrt139c324_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139c325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c325.mem 17 1 1 sh3_zsrt139c325_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139c326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c326.mem 17 1 1 sh3_zsrt139c326_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139c327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c327.mem 17 1 1 sh3_zsrt139c327_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139c328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c328.mem 17 1 1 sh3_zsrt139c328_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139c329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c329.mem 17 1 1 sh3_zsrt139c329_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139c330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c330.mem 17 1 1 sh3_zsrt139c330_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139c331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c331.mem 17 1 1 sh3_zsrt139c331_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139c332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c332.mem 17 1 1 sh3_zsrt139c332_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139c333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c333.mem 17 1 1 sh3_zsrt139c333_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139c334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c334.mem 17 1 1 sh3_zsrt139c334_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139c335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c335.mem 17 1 1 sh3_zsrt139c335_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139c336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c336.mem 17 1 1 sh3_zsrt139c336_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139c337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c337.mem 17 1 1 sh3_zsrt139c337_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139c338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c338.mem 17 1 1 sh3_zsrt139c338_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139c339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c339.mem 17 1 1 sh3_zsrt139c339_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139c340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c340.mem 17 1 1 sh3_zsrt139c340_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139c341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c341.mem 17 1 1 sh3_zsrt139c341_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139c342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c342.mem 17 1 1 sh3_zsrt139c342_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139c343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c343.mem 17 1 1 sh3_zsrt139c343_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139c344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c344.mem 17 1 1 sh3_zsrt139c344_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139c345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c345.mem 17 1 1 sh3_zsrt139c345_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139c346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c346.mem 17 1 1 sh3_zsrt139c346_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139c347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c347.mem 17 1 1 sh3_zsrt139c347_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139c348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c348.mem 17 1 1 sh3_zsrt139c348_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139c349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c349.mem 17 1 1 sh3_zsrt139c349_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139c350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c350.mem 17 1 1 sh3_zsrt139c350_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139c351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c351.mem 17 1 1 sh3_zsrt139c351_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139c352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c352.mem 17 1 1 sh3_zsrt139c352_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139c353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c353.mem 17 1 1 sh3_zsrt139c353_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139c354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c354.mem 17 1 1 sh3_zsrt139c354_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139c355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c355.mem 17 1 1 sh3_zsrt139c355_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139c356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c356.mem 17 1 1 sh3_zsrt139c356_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139c357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c357.mem 17 1 1 sh3_zsrt139c357_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139c358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c358.mem 17 1 1 sh3_zsrt139c358_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139c359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c359.mem 17 1 1 sh3_zsrt139c359_pal.mem 0x158afe76 +205 196494 10240 480 sh3_zsrt139c360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c360.mem 17 1 1 sh3_zsrt139c360_pal.mem 0x158afe76 +206 196494 10240 480 sh3_zsrt139c361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c361.mem 17 1 1 sh3_zsrt139c361_pal.mem 0x158afe76 +207 196494 10240 480 sh3_zsrt139c362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c362.mem 17 1 1 sh3_zsrt139c362_pal.mem 0x158afe76 +208 196494 10240 480 sh3_zsrt139c363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c363.mem 17 1 1 sh3_zsrt139c363_pal.mem 0x158afe76 +209 196494 10240 480 sh3_zsrt139c364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c364.mem 17 1 1 sh3_zsrt139c364_pal.mem 0x158afe76 +210 196494 10240 480 sh3_zsrt139c365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c365.mem 17 1 1 sh3_zsrt139c365_pal.mem 0x158afe76 +211 196494 10240 480 sh3_zsrt139c366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c366.mem 17 1 1 sh3_zsrt139c366_pal.mem 0x158afe76 +212 196494 10240 480 sh3_zsrt139c367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c367.mem 17 1 1 sh3_zsrt139c367_pal.mem 0x158afe76 +213 196494 10240 480 sh3_zsrt139c368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c368.mem 17 1 1 sh3_zsrt139c368_pal.mem 0x158afe76 +214 196494 10240 480 sh3_zsrt139c369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c369.mem 17 1 1 sh3_zsrt139c369_pal.mem 0x158afe76 +215 196494 10240 480 sh3_zsrt139c370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c370.mem 17 1 1 sh3_zsrt139c370_pal.mem 0x158afe76 +216 196494 10240 480 sh3_zsrt139c371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c371.mem 17 1 1 sh3_zsrt139c371_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139c372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c372.mem 17 1 1 sh3_zsrt139c372_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139c373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c373.mem 17 1 1 sh3_zsrt139c373_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139c374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c374.mem 17 1 1 sh3_zsrt139c374_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139c375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c375.mem 17 1 1 sh3_zsrt139c375_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139c376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c376.mem 17 1 1 sh3_zsrt139c376_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139c377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c377.mem 17 1 1 sh3_zsrt139c377_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139c378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c378.mem 17 1 1 sh3_zsrt139c378_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139c379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c379.mem 17 1 1 sh3_zsrt139c379_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139c380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c380.mem 17 1 1 sh3_zsrt139c380_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139c381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c381.mem 17 1 1 sh3_zsrt139c381_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139c382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c382.mem 17 1 1 sh3_zsrt139c382_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139c383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c383.mem 17 1 1 sh3_zsrt139c383_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139c384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c384.mem 17 1 1 sh3_zsrt139c384_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139c385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c385.mem 17 1 1 sh3_zsrt139c385_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139c386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c386.mem 17 1 1 sh3_zsrt139c386_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139c387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c387.mem 17 1 1 sh3_zsrt139c387_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139c388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c388.mem 17 1 1 sh3_zsrt139c388_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139c389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c389.mem 17 1 1 sh3_zsrt139c389_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139c390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c390.mem 17 1 1 sh3_zsrt139c390_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139c391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c391.mem 17 1 1 sh3_zsrt139c391_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139c392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c392.mem 17 1 1 sh3_zsrt139c392_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139c393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c393.mem 17 1 1 sh3_zsrt139c393_pal.mem 0x158afe76 +239 196868 10240 480 sh3_zsrt139c394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c394.mem 17 1 1 sh3_zsrt139c394_pal.mem 0x158afe76 +240 196868 10240 480 sh3_zsrt139c395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c395.mem 17 1 1 sh3_zsrt139c395_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139c396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c396.mem 17 1 1 sh3_zsrt139c396_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139c397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c397.mem 17 1 1 sh3_zsrt139c397_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139c398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c398.mem 17 1 1 sh3_zsrt139c398_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139c399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c399.mem 17 1 1 sh3_zsrt139c399_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139c3100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3100.mem 17 1 1 sh3_zsrt139c3100_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139c3101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3101.mem 17 1 1 sh3_zsrt139c3101_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139c3102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3102.mem 17 1 1 sh3_zsrt139c3102_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139c3103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3103.mem 17 1 1 sh3_zsrt139c3103_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139c3104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3104.mem 17 1 1 sh3_zsrt139c3104_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139c3105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3105.mem 17 1 1 sh3_zsrt139c3105_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139c3106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3106.mem 17 1 1 sh3_zsrt139c3106_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139c3107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3107.mem 17 1 1 sh3_zsrt139c3107_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139c3108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3108.mem 17 1 1 sh3_zsrt139c3108_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139c3109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3109.mem 17 1 1 sh3_zsrt139c3109_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139c3110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3110.mem 17 1 1 sh3_zsrt139c3110_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139c3111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3111.mem 17 1 1 sh3_zsrt139c3111_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139c3112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3112.mem 17 1 1 sh3_zsrt139c3112_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139c3113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3113.mem 17 1 1 sh3_zsrt139c3113_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139c3114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3114.mem 17 1 1 sh3_zsrt139c3114_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139c3115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3115.mem 17 1 1 sh3_zsrt139c3115_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139c3116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3116.mem 17 1 1 sh3_zsrt139c3116_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139c3117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3117.mem 17 1 1 sh3_zsrt139c3117_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139c3118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3118.mem 17 1 1 sh3_zsrt139c3118_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139c3119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3119.mem 17 1 1 sh3_zsrt139c3119_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139c3120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3120.mem 17 1 1 sh3_zsrt139c3120_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139c3121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3121.mem 17 1 1 sh3_zsrt139c3121_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139c3122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3122.mem 17 1 1 sh3_zsrt139c3122_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139c3123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3123.mem 17 1 1 sh3_zsrt139c3123_pal.mem 0x158afe76 +269 196868 10240 480 sh3_zsrt139c3124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3124.mem 17 1 1 sh3_zsrt139c3124_pal.mem 0x158afe76 +270 196868 10240 480 sh3_zsrt139c3125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3125.mem 17 1 1 sh3_zsrt139c3125_pal.mem 0x158afe76 +271 196868 10240 480 sh3_zsrt139c3126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3126.mem 17 1 1 sh3_zsrt139c3126_pal.mem 0x158afe76 +272 196868 10240 480 sh3_zsrt139c3127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3127.mem 17 1 1 sh3_zsrt139c3127_pal.mem 0x158afe76 +273 196868 10240 480 sh3_zsrt139c3128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3128.mem 17 1 1 sh3_zsrt139c3128_pal.mem 0x158afe76 +274 196868 10240 480 sh3_zsrt139c3129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3129.mem 17 1 1 sh3_zsrt139c3129_pal.mem 0x158afe76 +275 196868 10240 480 sh3_zsrt139c3130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3130.mem 17 1 1 sh3_zsrt139c3130_pal.mem 0x158afe76 +276 196868 10240 480 sh3_zsrt139c3131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3131.mem 17 1 1 sh3_zsrt139c3131_pal.mem 0x158afe76 +277 196868 10240 480 sh3_zsrt139c3132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3132.mem 17 1 1 sh3_zsrt139c3132_pal.mem 0x158afe76 +278 196868 10240 480 sh3_zsrt139c3133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3133.mem 17 1 1 sh3_zsrt139c3133_pal.mem 0x158afe76 +279 196868 10240 480 sh3_zsrt139c3134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3134.mem 17 1 1 sh3_zsrt139c3134_pal.mem 0x158afe76 +280 196868 10240 480 sh3_zsrt139c3135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3135.mem 17 1 1 sh3_zsrt139c3135_pal.mem 0x158afe76 +281 196868 10240 480 sh3_zsrt139c3136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3136.mem 17 1 1 sh3_zsrt139c3136_pal.mem 0x158afe76 +282 196868 10240 480 sh3_zsrt139c3137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3137.mem 17 1 1 sh3_zsrt139c3137_pal.mem 0x158afe76 +283 196868 10240 480 sh3_zsrt139c3138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3138.mem 17 1 1 sh3_zsrt139c3138_pal.mem 0x158afe76 +284 196868 10240 480 sh3_zsrt139c3139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3139.mem 17 1 1 sh3_zsrt139c3139_pal.mem 0x158afe76 +285 196868 10240 480 sh3_zsrt139c3140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3140.mem 17 1 1 sh3_zsrt139c3140_pal.mem 0x158afe76 +286 196868 10240 480 sh3_zsrt139c3141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3141.mem 17 1 1 sh3_zsrt139c3141_pal.mem 0x158afe76 +287 196868 10240 480 sh3_zsrt139c3142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3142.mem 17 1 1 sh3_zsrt139c3142_pal.mem 0x158afe76 +288 196868 10240 480 sh3_zsrt139c3143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3143.mem 17 1 1 sh3_zsrt139c3143_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139c3144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3144.mem 17 1 1 sh3_zsrt139c3144_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139c3145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3145.mem 17 1 1 sh3_zsrt139c3145_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139c3146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3146.mem 17 1 1 sh3_zsrt139c3146_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139c3147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3147.mem 17 1 1 sh3_zsrt139c3147_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139c3148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3148.mem 17 1 1 sh3_zsrt139c3148_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139c3149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3149.mem 17 1 1 sh3_zsrt139c3149_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139c3150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3150.mem 17 1 1 sh3_zsrt139c3150_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139c3151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3151.mem 17 1 1 sh3_zsrt139c3151_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139c3152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3152.mem 17 1 1 sh3_zsrt139c3152_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139c3153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3153.mem 17 1 1 sh3_zsrt139c3153_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139c3154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3154.mem 17 1 1 sh3_zsrt139c3154_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139c3155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3155.mem 17 1 1 sh3_zsrt139c3155_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139c3156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3156.mem 17 1 1 sh3_zsrt139c3156_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139c3157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3157.mem 17 1 1 sh3_zsrt139c3157_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139c3158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3158.mem 17 1 1 sh3_zsrt139c3158_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139c3159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3159.mem 17 1 1 sh3_zsrt139c3159_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139c3160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3160.mem 17 1 1 sh3_zsrt139c3160_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139c3161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3161.mem 17 1 1 sh3_zsrt139c3161_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139c3162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3162.mem 17 1 1 sh3_zsrt139c3162_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139c3163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3163.mem 17 1 1 sh3_zsrt139c3163_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139c3164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3164.mem 17 1 1 sh3_zsrt139c3164_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139c3165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3165.mem 17 1 1 sh3_zsrt139c3165_pal.mem 0x158afe76 +311 197327 10240 480 sh3_zsrt139c3166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3166.mem 17 1 1 sh3_zsrt139c3166_pal.mem 0x158afe76 +312 197327 10240 480 sh3_zsrt139c3167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3167.mem 17 1 1 sh3_zsrt139c3167_pal.mem 0x158afe76 +313 197327 10240 480 sh3_zsrt139c3168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3168.mem 17 1 1 sh3_zsrt139c3168_pal.mem 0x158afe76 +314 197327 10240 480 sh3_zsrt139c3169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3169.mem 17 1 1 sh3_zsrt139c3169_pal.mem 0x158afe76 +315 197327 10240 480 sh3_zsrt139c3170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3170.mem 17 1 1 sh3_zsrt139c3170_pal.mem 0x158afe76 +316 197327 10240 480 sh3_zsrt139c3171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3171.mem 17 1 1 sh3_zsrt139c3171_pal.mem 0x158afe76 +317 197327 10240 480 sh3_zsrt139c3172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3172.mem 17 1 1 sh3_zsrt139c3172_pal.mem 0x158afe76 +318 197327 10240 480 sh3_zsrt139c3173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3173.mem 17 1 1 sh3_zsrt139c3173_pal.mem 0x158afe76 +319 197327 10240 480 sh3_zsrt139c3174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3174.mem 17 1 1 sh3_zsrt139c3174_pal.mem 0x158afe76 +320 197327 10240 480 sh3_zsrt139c3175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3175.mem 17 1 1 sh3_zsrt139c3175_pal.mem 0x158afe76 +321 197327 10240 480 sh3_zsrt139c3176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3176.mem 17 1 1 sh3_zsrt139c3176_pal.mem 0x158afe76 +322 197327 10240 480 sh3_zsrt139c3177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3177.mem 17 1 1 sh3_zsrt139c3177_pal.mem 0x158afe76 +323 197327 10240 480 sh3_zsrt139c3178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3178.mem 17 1 1 sh3_zsrt139c3178_pal.mem 0x158afe76 +324 197327 10240 480 sh3_zsrt139c3179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3179.mem 17 1 1 sh3_zsrt139c3179_pal.mem 0x158afe76 +325 197327 10240 480 sh3_zsrt139c3180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3180.mem 17 1 1 sh3_zsrt139c3180_pal.mem 0x158afe76 +326 197327 10240 480 sh3_zsrt139c3181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3181.mem 17 1 1 sh3_zsrt139c3181_pal.mem 0x158afe76 +327 197327 10240 480 sh3_zsrt139c3182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3182.mem 17 1 1 sh3_zsrt139c3182_pal.mem 0x158afe76 +328 197327 10240 480 sh3_zsrt139c3183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3183.mem 17 1 1 sh3_zsrt139c3183_pal.mem 0x158afe76 +329 197327 10240 480 sh3_zsrt139c3184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3184.mem 17 1 1 sh3_zsrt139c3184_pal.mem 0x158afe76 +330 197327 10240 480 sh3_zsrt139c3185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3185.mem 17 1 1 sh3_zsrt139c3185_pal.mem 0x158afe76 +331 197327 10240 480 sh3_zsrt139c3186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3186.mem 17 1 1 sh3_zsrt139c3186_pal.mem 0x158afe76 +332 197327 10240 480 sh3_zsrt139c3187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3187.mem 17 1 1 sh3_zsrt139c3187_pal.mem 0x158afe76 +333 197327 10240 480 sh3_zsrt139c3188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3188.mem 17 1 1 sh3_zsrt139c3188_pal.mem 0x158afe76 +334 197327 10240 480 sh3_zsrt139c3189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3189.mem 17 1 1 sh3_zsrt139c3189_pal.mem 0x158afe76 +335 197327 10240 480 sh3_zsrt139c3190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3190.mem 17 1 1 sh3_zsrt139c3190_pal.mem 0x158afe76 +336 197327 10240 480 sh3_zsrt139c3191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3191.mem 17 1 1 sh3_zsrt139c3191_pal.mem 0x158afe76 +337 197327 10240 480 sh3_zsrt139c3192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3192.mem 17 1 1 sh3_zsrt139c3192_pal.mem 0x158afe76 +338 197327 10240 480 sh3_zsrt139c3193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3193.mem 17 1 1 sh3_zsrt139c3193_pal.mem 0x158afe76 +339 197327 10240 480 sh3_zsrt139c3194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3194.mem 17 1 1 sh3_zsrt139c3194_pal.mem 0x158afe76 +340 197327 10240 480 sh3_zsrt139c3195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3195.mem 17 1 1 sh3_zsrt139c3195_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139c3196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3196.mem 17 1 1 sh3_zsrt139c3196_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139c3197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3197.mem 17 1 1 sh3_zsrt139c3197_pal.mem 0x158afe76 +343 197327 10240 480 sh3_zsrt139c3198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3198.mem 17 1 1 sh3_zsrt139c3198_pal.mem 0x158afe76 +344 197327 10240 480 sh3_zsrt139c3199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3199.mem 17 1 1 sh3_zsrt139c3199_pal.mem 0x158afe76 +345 197327 10240 480 sh3_zsrt139c3200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3200.mem 17 1 1 sh3_zsrt139c3200_pal.mem 0x158afe76 +346 197327 10240 480 sh3_zsrt139c3201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3201.mem 17 1 1 sh3_zsrt139c3201_pal.mem 0x158afe76 +347 197327 10240 480 sh3_zsrt139c3202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3202.mem 17 1 1 sh3_zsrt139c3202_pal.mem 0x158afe76 +348 197327 10240 480 sh3_zsrt139c3203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3203.mem 17 1 1 sh3_zsrt139c3203_pal.mem 0x158afe76 +349 197327 10240 480 sh3_zsrt139c3204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3204.mem 17 1 1 sh3_zsrt139c3204_pal.mem 0x158afe76 +350 197327 10240 480 sh3_zsrt139c3205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3205.mem 17 1 1 sh3_zsrt139c3205_pal.mem 0x158afe76 +351 197327 10240 480 sh3_zsrt139c3206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3206.mem 17 1 1 sh3_zsrt139c3206_pal.mem 0x158afe76 +352 197327 10240 480 sh3_zsrt139c3207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3207.mem 17 1 1 sh3_zsrt139c3207_pal.mem 0x158afe76 +353 197327 10240 480 sh3_zsrt139c3208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3208.mem 17 1 1 sh3_zsrt139c3208_pal.mem 0x158afe76 +354 197327 10240 480 sh3_zsrt139c3209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3209.mem 17 1 1 sh3_zsrt139c3209_pal.mem 0x158afe76 +355 197327 10240 480 sh3_zsrt139c3210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3210.mem 17 1 1 sh3_zsrt139c3210_pal.mem 0x158afe76 +356 197327 10240 480 sh3_zsrt139c3211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3211.mem 17 1 1 sh3_zsrt139c3211_pal.mem 0x158afe76 +357 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +358 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +359 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +360 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +361 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +362 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +363 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +364 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +365 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +366 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +367 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +368 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +369 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +370 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +371 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +372 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +373 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +374 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f21_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f21_epochs.txt new file mode 100644 index 0000000..37fb1c0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f21_epochs.txt @@ -0,0 +1,146 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 143 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +126 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +127 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +128 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +129 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +130 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +131 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +132 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +133 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +134 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +135 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +136 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +137 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +138 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +139 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +140 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +141 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +142 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f22_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f22_epochs.txt new file mode 100644 index 0000000..be3a1d0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f22_epochs.txt @@ -0,0 +1,224 @@ +# Ch426 epoch descriptor table (218 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 218 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f220.mem 17 1 0 sh3_zsrt139f220_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2218.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2219.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2220.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +23 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +24 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +25 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +26 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +27 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +28 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +29 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +30 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2230.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +31 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2231.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +32 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2232.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +33 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2233.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +34 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2234.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +35 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2235.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +36 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2236.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +37 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2237.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +38 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2238.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +39 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2239.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +40 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2240.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +41 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2241.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +42 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2242.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +43 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2243.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +44 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2244.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +45 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2245.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +46 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2246.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +47 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2247.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +48 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2248.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +49 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2249.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +50 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2250.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +51 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2251.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +52 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2252.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +53 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2253.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +54 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2254.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +55 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2255.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +56 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2256.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +57 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2257.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +58 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2258.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +59 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2259.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +60 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2260.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +61 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2261.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +62 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2262.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +63 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2263.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +64 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2264.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +65 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2265.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +66 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2266.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +67 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2267.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +68 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2268.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +69 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2269.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +70 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2270.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +71 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2271.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +72 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2272.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +73 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2273.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +74 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2274.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +75 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2275.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +76 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2276.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +77 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2277.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +78 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2278.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +79 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2279.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +80 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2280.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +81 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2281.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +82 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2282.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +83 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2283.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +84 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2284.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +85 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2285.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +86 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2286.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +87 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2287.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +88 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2288.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +89 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2289.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +90 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2290.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +91 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2291.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +92 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2292.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +93 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2293.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +94 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2294.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +95 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2295.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +96 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2296.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +97 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2297.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +98 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2298.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +99 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2299.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +100 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22100.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +101 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22101.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +102 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22102.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +103 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22103.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +104 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22104.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +105 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22105.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +106 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22106.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +107 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22107.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +108 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22108.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +109 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22109.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +110 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22110.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +111 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22111.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +112 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22112.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +113 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22113.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +114 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22114.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +115 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22115.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +116 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22116.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +117 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22117.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +118 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22118.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +119 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22119.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +120 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22120.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +121 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22121.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +122 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22122.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +123 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22123.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +124 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22124.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +125 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22125.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +126 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22126.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +127 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22127.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +128 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22128.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +129 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22129.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +130 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22130.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +131 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22131.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +132 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22132.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +133 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22133.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +134 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22134.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +135 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22135.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +136 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22136.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +137 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22137.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +138 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22138.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +139 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22139.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +140 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22140.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +141 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22141.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +142 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22142.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +143 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22143.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +144 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22144.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +145 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22145.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +146 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22146.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +147 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22147.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +148 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22148.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +149 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22149.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +150 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22150.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +151 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22151.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +152 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22152.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +153 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22153.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +154 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22154.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +155 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22155.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +156 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22156.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +157 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22157.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +158 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22158.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +159 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22159.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +160 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22160.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +161 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22161.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +162 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22162.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +163 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22163.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +164 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22164.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +165 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22165.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +166 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22166.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +167 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22167.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +168 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22168.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +169 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22169.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +170 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22170.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +171 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22171.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +172 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22172.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +173 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22173.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +174 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22174.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +175 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22175.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +176 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22176.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +177 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22177.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +178 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22178.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +179 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22179.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +180 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22180.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +181 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22181.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +182 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22182.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +183 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22183.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +184 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22184.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +185 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22185.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +186 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22186.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +187 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22187.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +188 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22188.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +189 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22189.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +190 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22190.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +191 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22191.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +192 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22192.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +193 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22193.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +194 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22194.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +195 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22195.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +196 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22196.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +197 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22197.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +198 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22198.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +199 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22199.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +200 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22200.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +201 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22201.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +202 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22202.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +203 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22203.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +204 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22204.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +205 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22205.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +206 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22206.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +207 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22207.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +208 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22208.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +209 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22209.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +210 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +211 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +212 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +213 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +214 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +215 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +216 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f23_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f23_epochs.txt new file mode 100644 index 0000000..b513332 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f23_epochs.txt @@ -0,0 +1,366 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f22'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 363 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +126 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +127 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +145 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f220.mem 17 1 0 sh3_zsrt139f220_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2218.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2219.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2220.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2230.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2231.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2232.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2233.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2234.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2235.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2236.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2237.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2238.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2239.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2240.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2241.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2242.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2243.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2244.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2245.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2246.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2247.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2248.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2249.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2250.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2251.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2252.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2253.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2254.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2255.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2256.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2257.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2258.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2259.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +205 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2260.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +206 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2261.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +207 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2262.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +208 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2263.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +209 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2264.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +210 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2265.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +211 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2266.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +212 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2267.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +213 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2268.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +214 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2269.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +215 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2270.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +216 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2271.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2272.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2273.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2274.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2275.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2276.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2277.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2278.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2279.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2280.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2281.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2282.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2283.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2284.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2285.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2286.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2287.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2288.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2289.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2290.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2291.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2292.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2293.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +239 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2294.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +240 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2295.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2296.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2297.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2298.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2299.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22100.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22101.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22102.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22103.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22104.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22105.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22106.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22107.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22108.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22109.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22110.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22111.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22112.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22113.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22114.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22115.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22116.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22117.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22118.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22119.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22120.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22121.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22122.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22123.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +269 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22124.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +270 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22125.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +271 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22126.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +272 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22127.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +273 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22128.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +274 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22129.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +275 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22130.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +276 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22131.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +277 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22132.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +278 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22133.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +279 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22134.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +280 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22135.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +281 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22136.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +282 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22137.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +283 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22138.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +284 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22139.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +285 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22140.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +286 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22141.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +287 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22142.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +288 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22143.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22144.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22145.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22146.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22147.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22148.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22149.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22150.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22151.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22152.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22153.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22154.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22155.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22156.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22157.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22158.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22159.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22160.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22161.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22162.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22163.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22164.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22165.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +311 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22166.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +312 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22167.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +313 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22168.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +314 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22169.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +315 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22170.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +316 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22171.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +317 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22172.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +318 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22173.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +319 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22174.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +320 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22175.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +321 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22176.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +322 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22177.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +323 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22178.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +324 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22179.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +325 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22180.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +326 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22181.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +327 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22182.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +328 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22183.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +329 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22184.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +330 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22185.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +331 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22186.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +332 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22187.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +333 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22188.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +334 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22189.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +335 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22190.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +336 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22191.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +337 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22192.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +338 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22193.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +339 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22194.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +340 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22195.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22196.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22197.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +343 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22198.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +344 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22199.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +345 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22200.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +346 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22201.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +347 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22202.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +348 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22203.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +349 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22204.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +350 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22205.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +351 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22206.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +352 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22207.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +353 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22208.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +354 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22209.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +355 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +356 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +357 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +358 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +359 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +360 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +361 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +362 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f24_epochs.txt new file mode 100644 index 0000000..bf548ff --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f24_epochs.txt @@ -0,0 +1,346 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f22'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 343 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f220.mem 17 1 0 sh3_zsrt139f220_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2218.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2219.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2220.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2230.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2231.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2232.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2233.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2234.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2235.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2236.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2237.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2238.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2239.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2240.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2241.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2242.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2243.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2244.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2245.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2246.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2247.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2248.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2249.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2250.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2251.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2252.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2253.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2254.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2255.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2256.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2257.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2258.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2259.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2260.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2261.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2262.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2263.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2264.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2265.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2266.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2267.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2268.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2269.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2270.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2271.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2272.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2273.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2274.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2275.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2276.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2277.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2278.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2279.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2280.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2281.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2282.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2283.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2284.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2285.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2286.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2287.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2288.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2289.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2290.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2291.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2292.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2293.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2294.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2295.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2296.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2297.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2298.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2299.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22100.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22101.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22102.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22103.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22104.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22105.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22106.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22107.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22108.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22109.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22110.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22111.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22112.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22113.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +239 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22114.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +240 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22115.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22116.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22117.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22118.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22119.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22120.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22121.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22122.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22123.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22124.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22125.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22126.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22127.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22128.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22129.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22130.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22131.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22132.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22133.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22134.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22135.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22136.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22137.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22138.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22139.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22140.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22141.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22142.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22143.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22144.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22145.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22146.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22147.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22148.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22149.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22150.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22151.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22152.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22153.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22154.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22155.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22156.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22157.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22158.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22159.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22160.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22161.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22162.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22163.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22164.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22165.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22166.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22167.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22168.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22169.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22170.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22171.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22172.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22173.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22174.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22175.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22176.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22177.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22178.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22179.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22180.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22181.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22182.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22183.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22184.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22185.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +311 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22186.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +312 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22187.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +313 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22188.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +314 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22189.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +315 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22190.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +316 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22191.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +317 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22192.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +318 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22193.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +319 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22194.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +320 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22195.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +321 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22196.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +322 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22197.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +323 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22198.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +324 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22199.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +325 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22200.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +326 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22201.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +327 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22202.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +328 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22203.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +329 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22204.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +330 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22205.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +331 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22206.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +332 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22207.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +333 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22208.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +334 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22209.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +335 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +336 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +337 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +338 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +339 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +340 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f25_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f25_epochs.txt new file mode 100644 index 0000000..9383437 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f25_epochs.txt @@ -0,0 +1,414 @@ +# Ch427 epoch descriptor table (408 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 408 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f250.mem 17 1 0 sh3_zsrt139f250_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f251.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f252.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f253.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f254.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f255.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f256.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f257.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f258.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f259.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2510.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2511.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2512.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2513.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2514.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2515.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2516.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2517.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2518.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2519.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2520.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2521.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2522.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +23 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2523.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +24 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2524.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +25 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2525.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +26 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2526.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +27 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2527.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +28 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2528.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +29 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2529.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +30 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2530.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +31 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2531.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +32 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2532.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +33 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2533.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +34 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2534.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +35 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2535.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +36 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2536.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +37 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2537.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +38 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2538.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +39 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2539.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +40 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2540.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +41 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2541.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +42 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2542.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +43 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2543.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +44 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2544.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +45 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2545.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +46 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2546.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +47 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2547.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +48 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2548.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +49 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2549.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +50 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2550.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +51 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2551.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +52 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2552.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +53 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2553.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +54 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2554.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +55 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2555.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +56 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2556.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +57 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2557.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +58 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2558.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +59 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2559.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +60 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2560.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +61 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2561.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +62 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2562.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +63 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2563.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +64 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2564.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +65 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2565.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +66 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2566.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +67 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2567.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +68 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2568.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +69 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2569.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +70 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2570.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +71 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2571.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +72 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2572.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +73 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2573.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +74 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2574.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +75 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2575.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2576.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2577.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2578.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2579.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2580.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2581.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2582.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2583.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2584.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2585.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2586.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2587.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2588.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2589.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2590.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2591.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2592.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2593.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2594.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2595.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +96 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2596.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +97 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2597.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +98 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2598.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +99 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2599.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +100 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25100.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +101 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25101.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +102 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25102.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +103 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25103.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +104 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25104.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +105 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25105.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +106 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25106.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +107 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25107.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +108 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25108.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +109 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25109.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +110 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25110.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +111 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25111.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +112 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25112.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +113 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25113.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +114 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25114.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +115 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25115.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +116 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25116.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +117 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25117.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +118 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25118.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +119 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25119.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +120 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25120.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +121 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25121.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +122 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25122.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +123 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25123.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +124 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25124.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +125 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25125.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +126 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25126.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +127 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25127.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +128 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25128.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +129 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25129.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +130 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25130.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +131 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25131.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +132 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25132.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +133 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25133.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +134 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25134.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +135 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25135.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +136 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25136.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +137 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25137.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +138 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25138.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +139 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25139.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +140 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25140.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +141 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25141.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +142 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25142.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +143 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25143.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +144 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25144.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +145 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25145.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +146 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25146.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25147.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25148.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25149.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25150.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25151.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25152.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25153.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25154.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25155.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25156.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25157.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25158.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25159.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25160.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25161.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25162.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25163.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25164.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25165.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25166.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25167.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25168.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25169.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25170.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25171.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25172.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25173.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25174.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25175.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25176.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25177.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25178.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25179.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25180.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25181.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25182.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25183.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25184.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25185.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25186.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25187.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25188.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25189.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25190.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25191.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25192.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25193.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25194.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25195.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25196.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25197.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25198.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25199.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25200.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25201.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25202.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25203.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25204.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25205.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25206.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25207.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25208.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25209.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25210.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25211.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25212.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25213.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25214.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25215.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25216.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25217.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25218.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25219.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25220.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25221.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25222.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25223.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25224.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25225.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25226.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25227.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25228.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25229.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25230.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25231.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25232.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25233.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25234.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25235.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25236.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25237.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25238.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25239.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25240.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25241.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25242.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25243.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25244.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25245.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25246.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25247.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25248.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25249.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25250.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25251.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25252.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25253.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25254.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25255.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25256.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25257.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25258.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25259.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25260.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25261.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25262.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25263.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25264.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25265.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25266.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25267.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25268.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25269.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25270.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25271.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25272.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25273.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25274.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25275.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25276.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25277.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25278.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25279.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25280.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25281.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25282.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25283.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25284.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25285.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25286.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25287.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25288.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25289.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25290.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25291.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25292.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25293.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25294.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25295.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25296.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25297.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25298.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25299.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25300.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25301.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25302.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25303.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25304.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25305.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25306.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25307.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25308.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25309.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25310.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +311 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25311.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +312 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25312.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +313 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25313.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +314 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25314.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +315 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25315.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +316 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25316.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +317 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25317.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +318 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25318.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +319 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25319.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +320 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25320.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +321 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25321.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +322 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25322.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +323 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25323.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +324 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25324.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +325 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25325.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +326 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25326.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +327 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25327.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +328 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25328.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +329 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25329.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +330 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25330.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +331 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25331.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +332 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25332.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +333 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25333.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +334 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25334.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +335 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25335.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +336 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25336.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +337 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25337.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +338 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25338.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +339 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25339.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +340 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25340.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25341.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25342.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +343 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25343.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +344 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25344.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +345 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25345.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +346 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25346.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +347 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25347.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +348 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25348.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +349 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25349.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +350 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25350.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +351 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25351.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +352 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25352.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +353 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25353.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +354 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25354.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +355 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25355.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +356 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25356.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +357 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25357.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +358 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25358.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +359 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25359.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +360 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25360.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +361 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25361.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +362 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25362.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +363 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25363.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +364 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25364.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +365 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25365.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +366 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25366.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +367 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25367.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +368 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25368.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +369 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25369.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +370 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25370.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +371 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25371.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +372 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25372.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +373 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25373.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +374 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25374.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +375 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25375.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +376 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25376.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +377 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25377.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +378 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25378.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +379 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25379.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +380 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25380.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +381 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25381.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +382 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25382.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +383 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25383.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +384 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25384.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +385 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25385.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +386 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25386.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +387 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25387.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +388 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25388.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +389 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25389.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +390 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25390.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +391 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25391.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +392 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25392.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +393 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25393.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +394 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25394.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +395 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25395.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +396 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25396.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +397 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25397.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +398 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25398.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +399 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25399.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +400 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25400.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +401 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25401.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +402 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25402.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +403 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25403.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +404 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25404.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +405 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25405.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +406 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25406.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +407 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25407.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f26_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f26_epochs.txt new file mode 100644 index 0000000..eee7084 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f26_epochs.txt @@ -0,0 +1,556 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f25'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 553 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +126 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +127 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +145 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f250.mem 17 1 0 sh3_zsrt139f250_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f251.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f252.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f253.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f254.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f255.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f256.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f257.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f258.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f259.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2510.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2511.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2512.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2513.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2514.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2515.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2516.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2517.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2518.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2519.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2520.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2521.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2522.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2523.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2524.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2525.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2526.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2527.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2528.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2529.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2530.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2531.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2532.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2533.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2534.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2535.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2536.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2537.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2538.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2539.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2540.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2541.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2542.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2543.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2544.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2545.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2546.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2547.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2548.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2549.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2550.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2551.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2552.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2553.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2554.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2555.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2556.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2557.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2558.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2559.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +205 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2560.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +206 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2561.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +207 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2562.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +208 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2563.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +209 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2564.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +210 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2565.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +211 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2566.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +212 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2567.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +213 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2568.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +214 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2569.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +215 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2570.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +216 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2571.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +217 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2572.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +218 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2573.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +219 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2574.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +220 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2575.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +221 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2576.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +222 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2577.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +223 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2578.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +224 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2579.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +225 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2580.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +226 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2581.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +227 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2582.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +228 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2583.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +229 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2584.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +230 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2585.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +231 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2586.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +232 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2587.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +233 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2588.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +234 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2589.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +235 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2590.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +236 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2591.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +237 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2592.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +238 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2593.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +239 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2594.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +240 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2595.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2596.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2597.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2598.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2599.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25100.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25101.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25102.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25103.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25104.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25105.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25106.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25107.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25108.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25109.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25110.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25111.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25112.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25113.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25114.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25115.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25116.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25117.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25118.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25119.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25120.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25121.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25122.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25123.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +269 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25124.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +270 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25125.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +271 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25126.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +272 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25127.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +273 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25128.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +274 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25129.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +275 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25130.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +276 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25131.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +277 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25132.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +278 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25133.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +279 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25134.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +280 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25135.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +281 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25136.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +282 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25137.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +283 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25138.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +284 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25139.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +285 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25140.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +286 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25141.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +287 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25142.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +288 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25143.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +289 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25144.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +290 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25145.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +291 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25146.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +292 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25147.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +293 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25148.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +294 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25149.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +295 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25150.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +296 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25151.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +297 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25152.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +298 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25153.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +299 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25154.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +300 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25155.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +301 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25156.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +302 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25157.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +303 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25158.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +304 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25159.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +305 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25160.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +306 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25161.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +307 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25162.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +308 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25163.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +309 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25164.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +310 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25165.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +311 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25166.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +312 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25167.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +313 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25168.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +314 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25169.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +315 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25170.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +316 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25171.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +317 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25172.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +318 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25173.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +319 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25174.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +320 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25175.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +321 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25176.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +322 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25177.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +323 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25178.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +324 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25179.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +325 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25180.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +326 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25181.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +327 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25182.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +328 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25183.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +329 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25184.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +330 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25185.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +331 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25186.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +332 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25187.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +333 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25188.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +334 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25189.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +335 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25190.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +336 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25191.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +337 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25192.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +338 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25193.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +339 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25194.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +340 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25195.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +341 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25196.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +342 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25197.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +343 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25198.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +344 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25199.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +345 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25200.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +346 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25201.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +347 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25202.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +348 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25203.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +349 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25204.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +350 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25205.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +351 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25206.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +352 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25207.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +353 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25208.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +354 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25209.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +355 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25210.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +356 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25211.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +357 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25212.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +358 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25213.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +359 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25214.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +360 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25215.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +361 196868 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25216.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +362 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25217.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +363 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25218.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +364 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25219.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +365 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25220.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +366 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25221.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +367 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25222.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +368 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25223.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +369 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25224.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +370 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25225.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +371 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25226.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +372 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25227.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +373 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25228.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +374 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25229.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +375 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25230.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +376 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25231.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +377 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25232.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +378 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25233.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +379 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25234.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +380 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25235.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +381 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25236.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +382 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25237.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +383 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25238.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +384 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25239.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +385 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25240.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +386 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25241.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +387 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25242.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +388 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25243.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +389 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25244.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +390 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25245.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +391 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25246.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +392 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25247.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +393 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25248.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +394 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25249.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +395 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25250.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +396 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25251.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +397 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25252.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +398 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25253.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +399 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25254.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +400 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25255.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +401 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25256.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +402 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25257.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +403 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25258.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +404 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25259.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +405 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25260.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +406 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25261.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +407 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25262.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +408 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25263.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +409 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25264.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +410 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25265.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +411 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25266.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +412 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25267.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +413 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25268.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +414 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25269.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +415 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25270.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +416 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25271.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +417 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25272.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +418 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25273.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +419 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25274.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +420 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25275.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +421 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25276.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +422 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25277.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +423 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25278.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +424 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25279.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +425 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25280.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +426 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25281.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +427 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25282.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +428 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25283.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +429 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25284.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +430 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25285.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +431 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25286.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +432 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25287.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +433 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25288.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +434 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25289.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +435 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25290.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +436 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25291.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +437 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25292.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +438 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25293.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +439 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25294.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +440 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25295.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +441 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25296.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +442 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25297.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +443 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25298.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +444 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25299.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +445 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25300.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +446 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25301.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +447 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25302.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +448 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25303.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +449 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25304.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +450 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25305.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +451 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25306.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +452 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25307.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +453 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25308.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +454 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25309.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +455 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25310.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +456 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25311.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +457 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25312.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +458 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25313.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +459 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25314.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +460 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25315.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +461 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25316.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +462 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25317.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +463 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25318.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +464 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25319.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +465 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25320.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +466 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25321.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +467 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25322.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +468 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25323.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +469 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25324.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +470 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25325.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +471 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25326.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +472 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25327.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +473 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25328.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +474 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25329.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +475 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25330.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +476 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25331.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +477 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25332.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +478 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25333.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +479 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25334.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +480 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25335.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +481 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25336.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +482 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25337.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +483 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25338.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +484 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25339.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +485 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25340.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +486 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25341.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +487 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25342.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +488 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25343.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +489 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25344.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +490 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25345.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +491 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25346.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +492 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25347.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +493 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25348.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +494 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25349.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +495 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25350.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +496 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25351.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +497 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25352.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +498 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25353.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +499 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25354.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +500 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25355.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +501 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25356.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +502 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25357.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +503 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25358.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +504 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25359.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +505 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25360.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +506 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25361.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +507 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25362.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +508 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25363.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +509 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25364.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +510 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25365.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +511 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25366.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +512 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25367.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +513 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25368.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +514 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25369.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +515 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25370.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +516 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25371.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +517 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25372.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +518 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25373.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +519 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25374.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +520 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25375.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +521 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25376.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +522 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25377.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +523 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25378.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +524 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25379.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +525 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25380.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +526 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25381.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +527 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25382.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +528 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25383.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +529 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25384.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +530 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25385.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +531 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25386.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +532 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25387.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +533 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25388.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +534 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25389.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +535 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25390.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +536 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25391.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +537 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25392.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +538 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25393.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +539 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25394.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +540 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25395.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +541 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25396.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +542 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25397.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +543 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25398.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +544 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25399.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +545 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25400.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +546 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25401.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +547 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25402.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +548 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25403.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +549 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25404.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +550 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25405.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +551 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25406.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 +552 197327 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f25407.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27_epochs.txt new file mode 100644 index 0000000..59be3af --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27_epochs.txt @@ -0,0 +1,135 @@ +# Ch427 epoch descriptor table (129 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 129 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +23 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +24 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +25 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +26 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +27 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +28 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +29 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +30 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +31 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +32 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +33 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +34 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +35 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +36 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +37 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +38 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +39 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +40 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +41 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +42 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +43 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +44 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +45 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +46 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +47 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +48 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +49 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +50 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +51 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +52 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +53 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +54 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +55 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +56 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +57 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +58 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +59 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +60 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +61 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +62 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +63 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +64 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +65 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +66 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +67 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +68 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +69 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +70 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +71 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +72 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +73 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +74 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +75 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +76 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +77 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +78 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +79 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +80 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +81 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +82 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +83 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +84 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +85 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +86 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +87 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +88 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +89 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +90 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +91 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +92 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +93 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +94 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +95 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +96 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +97 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +98 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +99 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +100 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +101 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +102 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +103 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +104 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +105 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +106 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +107 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +108 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +109 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +110 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +111 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +112 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +113 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +114 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +115 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +116 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +117 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +118 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +119 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +120 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +121 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +122 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +123 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +124 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +125 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +126 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +127 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +128 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27c_epochs.txt new file mode 100644 index 0000000..77c2cc6 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f27c_epochs.txt @@ -0,0 +1,135 @@ +# Ch435 epoch descriptor table (129 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 129 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c0.mem 467 51 0 sh3_zsrt139f27c0_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c1.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c2.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c3.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c4.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c5.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c6.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c7.mem 521 57 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c8.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c9.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c10.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c11.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c12.mem 530 58 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c13.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c14.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c15.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c16.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c17.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c18.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c19.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c20.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c21.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c22.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +23 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c23.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +24 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c24.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +25 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c25.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +26 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c26.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +27 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c27.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +28 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c28.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +29 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c29.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +30 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c30.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +31 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c31.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +32 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c32.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +33 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c33.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +34 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c34.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +35 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c35.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +36 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c36.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +37 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c37.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +38 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c38.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +39 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c39.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +40 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c40.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +41 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c41.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +42 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c42.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +43 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c43.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +44 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c44.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +45 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c45.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +46 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c46.mem 431 47 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +47 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c47.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +48 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c48.mem 710 78 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +49 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c49.mem 575 63 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +50 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c50.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +51 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c51.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +52 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c52.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +53 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c53.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +54 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c54.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +55 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c55.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +56 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c56.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +57 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c57.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +58 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c58.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +59 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c59.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +60 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c60.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +61 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c61.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +62 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c62.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +63 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c63.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +64 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c64.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +65 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c65.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +66 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c66.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +67 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c67.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +68 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c68.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +69 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c69.mem 692 76 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +70 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c70.mem 665 73 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +71 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c71.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +72 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c72.mem 620 68 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +73 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c73.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +74 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c74.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +75 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c75.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +76 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c76.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +77 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c77.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +78 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c78.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +79 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c79.mem 584 64 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +80 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c80.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +81 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c81.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +82 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c82.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +83 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c83.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +84 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c84.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +85 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c85.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +86 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c86.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +87 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c87.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +88 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c88.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +89 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c89.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +90 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c90.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +91 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c91.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +92 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c92.mem 287 31 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +93 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c93.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +94 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c94.mem 233 25 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +95 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c95.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +96 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c96.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +97 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c97.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +98 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c98.mem 647 71 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +99 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c99.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +100 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c100.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +101 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c101.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +102 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c102.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +103 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c103.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +104 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c104.mem 611 67 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +105 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c105.mem 359 39 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +106 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c106.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +107 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c107.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +108 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c108.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +109 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c109.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +110 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c110.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +111 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c111.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +112 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c112.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +113 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c113.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +114 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c114.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +115 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c115.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +116 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c116.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +117 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c117.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +118 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c118.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +119 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c119.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +120 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c120.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +121 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c121.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +122 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c122.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +123 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +124 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +125 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +126 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +127 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +128 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f28_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f28_epochs.txt new file mode 100644 index 0000000..190166b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f28_epochs.txt @@ -0,0 +1,277 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 274 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +125 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +126 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +127 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +145 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f29_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f29_epochs.txt new file mode 100644 index 0000000..aa19034 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f29_epochs.txt @@ -0,0 +1,164 @@ +# Ch428 epoch descriptor table (158 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 158 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f290_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f290.mem 44 4 0 sh3_zsrt139f290_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f291.mem 1583 175 0 sh3_zsrt139f291_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f292.mem 1835 203 1 sh3_zsrt139f291_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f293_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f293.mem 350 38 0 sh3_zsrt139f293_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f294.mem 1322 146 0 sh3_zsrt139f294_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f295.mem 116 12 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f296.mem 629 69 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f297.mem 260 28 0 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f298.mem 593 65 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f299.mem 332 36 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +10 30859 10240 480 sh3_zsrt139f2910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2910.mem 26 2 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +11 31075 13824 480 sh3_zsrt139f2911_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2911.mem 26 2 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +12 31727 10240 480 sh3_zsrt139f2912_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2912.mem 17 1 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +13 31820 13824 480 sh3_zsrt139f2913_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2913.mem 17 1 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +14 32435 10240 480 sh3_zsrt139f2914_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2914.mem 134 14 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +15 32651 13824 480 sh3_zsrt139f2915_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2915.mem 134 14 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +16 32869 10240 480 sh3_zsrt139f2916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2916.mem 224 24 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +17 33085 13824 480 sh3_zsrt139f2917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2917.mem 224 24 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +18 33303 10240 480 sh3_zsrt139f2918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2918.mem 170 18 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +19 33519 13824 480 sh3_zsrt139f2919_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2919.mem 170 18 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +20 33737 10240 480 sh3_zsrt139f2920_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2920.mem 143 15 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +21 33953 13824 480 sh3_zsrt139f2921_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2921.mem 143 15 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +22 34171 10240 480 sh3_zsrt139f2922_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2922.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +23 34387 13824 480 sh3_zsrt139f2923_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2923.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +24 34605 10240 480 sh3_zsrt139f2924_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2924.mem 242 26 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +25 34821 13824 480 sh3_zsrt139f2925_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2925.mem 242 26 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +26 35039 10240 480 sh3_zsrt139f2926_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2926.mem 377 41 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +27 35255 13824 480 sh3_zsrt139f2927_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2927.mem 377 41 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +28 35473 10240 480 sh3_zsrt139f2928_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2928.mem 341 37 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +29 35689 13824 480 sh3_zsrt139f2929_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2929.mem 341 37 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +30 35907 10240 480 sh3_zsrt139f2930_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2930.mem 98 10 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +31 36123 13824 480 sh3_zsrt139f2931_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2931.mem 98 10 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +32 36341 10240 480 sh3_zsrt139f2932_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2932.mem 197 21 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +33 36557 13824 480 sh3_zsrt139f2933_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2933.mem 197 21 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +34 36775 10240 480 sh3_zsrt139f2934_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2934.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +35 36991 13824 480 sh3_zsrt139f2935_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2935.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +36 37209 10240 480 sh3_zsrt139f2936_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2936.mem 233 25 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +37 37425 13824 480 sh3_zsrt139f2937_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2937.mem 233 25 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +38 37643 10240 480 sh3_zsrt139f2938_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2938.mem 206 22 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +39 37859 13824 480 sh3_zsrt139f2939_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2939.mem 206 22 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +40 38077 10240 480 sh3_zsrt139f2940_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2940.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +41 38293 13824 480 sh3_zsrt139f2941_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2941.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +42 38511 10240 480 sh3_zsrt139f2942_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2942.mem 503 55 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +43 38727 13824 480 sh3_zsrt139f2943_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2943.mem 503 55 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +44 38945 10240 480 sh3_zsrt139f2944_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2944.mem 395 43 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +45 39161 13824 480 sh3_zsrt139f2945_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2945.mem 395 43 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +46 39379 10240 480 sh3_zsrt139f2946_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2946.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +47 39520 13824 480 sh3_zsrt139f2947_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2947.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +48 71148 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2948.mem 674 74 0 sh3_zsrt139f2948_pal.mem 0x43ece1ae +49 71787 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2949.mem 323 35 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +50 72426 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2950.mem 296 32 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +51 73065 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2951.mem 521 57 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +52 73704 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2952.mem 701 77 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +53 74343 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2953.mem 422 46 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +54 74982 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2954.mem 683 75 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +55 75621 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2955.mem 1070 118 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +56 76260 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2956.mem 539 59 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +57 76899 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2957.mem 674 74 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +58 78319 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2958.mem 476 52 0 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +59 82720 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2959.mem 449 49 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +60 83323 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2960.mem 809 89 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +61 83944 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2961.mem 593 65 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +62 84565 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2962.mem 701 77 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +63 85186 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2963.mem 476 52 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +64 85807 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2964.mem 935 103 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +65 86428 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2965.mem 584 64 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +66 87049 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2966.mem 314 34 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +67 88918 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2967.mem 26 2 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +68 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2968.mem 2042 226 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +69 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2969.mem 1016 112 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +70 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2970.mem 1808 200 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +71 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2971.mem 494 54 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +72 91678 9216 480 sh3_zsrt139f2972_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2972.mem 188 20 0 sh3_zsrt139f2972_pal.mem 0x181b2ac2 +73 91804 9216 480 sh3_zsrt139f2973_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2973.mem 224 24 0 sh3_zsrt139f2973_pal.mem 0x9d847d4e +74 114431 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2974.mem 1466 162 0 sh3_zsrt139f2974_pal.mem 0x47097d4c +75 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2975.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +76 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2976.mem 287 31 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +77 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2977.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +78 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2978.mem 413 45 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +79 116351 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2979.mem 1754 194 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +80 117050 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2980.mem 1556 172 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +81 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2981.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +82 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2982.mem 98 10 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +83 118238 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2983.mem 1790 198 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +84 118877 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2984.mem 1178 130 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +85 119471 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2985.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +86 120110 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2986.mem 1889 209 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +87 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2987.mem 1502 166 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +88 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2988.mem 575 63 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +89 121388 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2989.mem 1016 112 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +90 122027 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2990.mem 872 96 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +91 122600 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2991.mem 782 86 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +92 123239 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2992.mem 170 18 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +93 123869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2993.mem 251 27 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +94 124508 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2994.mem 323 35 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +95 125147 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2995.mem 89 9 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +96 125786 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2996.mem 557 61 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +97 126434 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2997.mem 368 40 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +98 126968 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2998.mem 647 71 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +99 127607 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2999.mem 530 58 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +100 128246 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29100.mem 440 48 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +101 128885 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29101.mem 62 6 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +102 129389 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29102.mem 1493 165 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +103 130028 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29103.mem 1223 135 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +104 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29104.mem 1628 180 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +105 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29105.mem 224 24 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +106 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29106.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +107 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29107.mem 566 62 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +108 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29108.mem 521 57 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +109 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29109.mem 755 83 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +110 131945 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29110.mem 1439 159 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +111 132584 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29111.mem 953 105 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +112 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29112.mem 620 68 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +113 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29113.mem 53 5 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +114 135869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29114.mem 26 2 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +115 144890 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29115.mem 179 19 0 sh3_zsrt139f29115_pal.mem 0x3e849a98 +116 145712 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29116.mem 116 12 1 sh3_zsrt139f29115_pal.mem 0x3e849a98 +117 145913 12288 480 sh3_zsrt139f29117_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29117.mem 143 15 0 sh3_zsrt139f29117_pal.mem 0x20ffffff +118 146205 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29118.mem 1007 111 0 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +119 146630 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29119.mem 287 31 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +120 147068 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29120.mem 332 36 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +121 147480 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29121.mem 683 75 0 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +122 147888 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29122.mem 665 73 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +123 148264 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29123.mem 1025 113 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +124 148919 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29124.mem 935 103 0 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +125 149509 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29125.mem 827 91 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +126 150125 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29126.mem 701 77 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +127 150741 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29127.mem 710 78 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +128 151344 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29128.mem 404 44 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +129 152021 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29129.mem 206 22 0 sh3_zsrt139f29129_pal.mem 0xc6784386 +130 152420 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29130.mem 242 26 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +131 152806 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29131.mem 296 32 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +132 153218 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29132.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +133 153643 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29133.mem 44 4 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +134 154029 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29134.mem 278 30 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +135 154428 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29135.mem 197 21 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +136 154853 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29136.mem 188 20 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +137 155265 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29137.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +138 155664 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29138.mem 107 11 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +139 156063 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29139.mem 80 8 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +140 156566 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29140.mem 1241 137 0 sh3_zsrt139f29140_pal.mem 0x00fd9028 +141 157273 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29141.mem 1025 113 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +142 157967 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29142.mem 737 81 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +143 158674 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29143.mem 845 93 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +144 159420 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29144.mem 530 58 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +145 160114 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29145.mem 98 10 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +146 160331 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29146.mem 287 31 0 sh3_zsrt139f29146_pal.mem 0xd8d19684 +147 160769 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29147.mem 260 28 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +148 161168 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29148.mem 368 40 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +149 161567 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29149.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +150 162300 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29150.mem 341 37 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +151 162725 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29151.mem 305 33 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +152 163163 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29152.mem 206 22 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +153 163575 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29153.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +154 164204 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29154.mem 602 66 0 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +155 164950 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29155.mem 359 39 1 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +156 175995 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29156.mem 341 37 0 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 +157 176446 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29157.mem 170 18 1 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f2_epochs.txt new file mode 100644 index 0000000..dbc342d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f2_epochs.txt @@ -0,0 +1,3606 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f1', 'zsrt139d6@75:434', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 3603 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f10.mem 188 20 0 sh3_zsrt139f10_pal.mem 0x60778774 +1 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f11.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +2 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f12.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +3 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f13.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +4 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f14.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +5 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f15.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +6 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f16.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +7 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f17.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +8 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f18.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +9 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f19.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +10 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f110.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +11 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f111.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +12 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f112.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +13 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f113.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +14 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f114.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +15 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f115.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +16 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f116.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +17 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f117.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +18 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f118.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +19 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f119.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +20 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f120.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +21 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f121.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +22 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f122.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +23 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f123.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +24 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f124.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +25 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f125.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +26 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f126.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +27 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f127.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +28 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f128.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +29 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f129.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +30 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f130.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +31 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f131.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +32 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f132.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +33 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f133.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +34 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f134.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +35 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f135.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +36 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f136.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +37 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f137.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +38 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f138.mem 260 28 1 sh3_zsrt139f10_pal.mem 0x60778774 +39 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f139.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +40 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f140.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +41 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f141.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +42 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f142.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +43 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f143.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +44 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f144.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +45 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f145.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +46 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f146.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +47 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f147.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +48 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f148.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +49 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f149.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +50 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f150.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +51 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f151.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +52 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f152.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +53 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f153.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +54 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f154.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +55 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f155.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +56 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f156.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +57 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f157.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +58 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f158.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +59 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f159.mem 386 42 1 sh3_zsrt139f10_pal.mem 0x60778774 +60 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f160.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +61 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f161.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +62 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f162.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +63 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f163.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +64 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f164.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +65 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f165.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +66 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f166.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +67 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f167.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +68 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f168.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +69 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f169.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +70 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +71 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +72 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +73 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 242 26 1 sh3_zsrt139f10_pal.mem 0x60778774 +74 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +75 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 278 30 1 sh3_zsrt139f10_pal.mem 0x60778774 +76 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +77 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +78 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +79 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +80 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f180.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +81 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f181.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +82 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f182.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +83 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f183.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +84 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f184.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +85 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f185.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +86 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f186.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +87 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f187.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +88 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f188.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +89 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f189.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +90 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +91 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f191.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +92 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f192.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +93 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f193.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +94 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f194.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +95 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f195.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +96 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f196.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +97 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f197.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +98 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f198.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +99 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f199.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +100 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1100.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +101 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1101.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +102 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1102.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +103 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1103.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +104 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1104.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +105 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1105.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +106 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1106.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +107 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1107.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +108 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1108.mem 809 89 1 sh3_zsrt139f10_pal.mem 0x60778774 +109 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1109.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +110 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1110.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +111 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1111.mem 332 36 1 sh3_zsrt139f10_pal.mem 0x60778774 +112 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1112.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +113 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1113.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +114 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1114.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +115 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1115.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +116 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1116.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +117 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1117.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +118 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1118.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +119 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1119.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +120 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1120.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +121 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1121.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +122 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1122.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +123 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1123.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +124 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1124.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +125 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1125.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +126 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1126.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +127 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1127.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +128 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1128.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +129 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1129.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +130 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1130.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +131 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1131.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +132 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1132.mem 170 18 1 sh3_zsrt139f10_pal.mem 0x60778774 +133 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1133.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +134 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1134.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +135 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1135.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +136 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1136.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +137 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1137.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +138 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1138.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +139 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1139.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +140 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1140.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +141 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1141.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +142 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1142.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +143 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1143.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +144 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1144.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +145 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1145.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +146 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1146.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +147 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1147.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +148 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1148.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +149 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1149.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +150 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1150.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +151 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1151.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +152 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1152.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +153 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1153.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +154 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1154.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +155 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1155.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +156 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1156.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +157 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1157.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +158 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1158.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +159 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1159.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +160 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1160.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +161 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1161.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +162 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1162.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +163 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1163.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +164 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1164.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +165 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1165.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +166 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1166.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +167 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1167.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +168 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1168.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +169 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1169.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +170 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1170.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +171 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1171.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +172 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1172.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +173 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1173.mem 350 38 1 sh3_zsrt139f10_pal.mem 0x60778774 +174 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1174.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +175 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1175.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +176 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1176.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +177 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1177.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +178 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1178.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +179 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1179.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +180 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1180.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +181 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1181.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +182 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1182.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +183 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1183.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +184 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1184.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +185 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1185.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +186 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1186.mem 332 36 1 sh3_zsrt139f10_pal.mem 0x60778774 +187 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1187.mem 260 28 1 sh3_zsrt139f10_pal.mem 0x60778774 +188 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1188.mem 377 41 1 sh3_zsrt139f10_pal.mem 0x60778774 +189 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1189.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +190 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1190.mem 251 27 1 sh3_zsrt139f10_pal.mem 0x60778774 +191 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1191.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +192 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1192.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +193 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1193.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +194 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1194.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +195 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1195.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +196 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1196.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +197 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1197.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +198 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1198.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +199 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1199.mem 287 31 1 sh3_zsrt139f10_pal.mem 0x60778774 +200 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1200.mem 188 20 1 sh3_zsrt139f10_pal.mem 0x60778774 +201 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1201.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +202 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1202.mem 116 12 1 sh3_zsrt139f10_pal.mem 0x60778774 +203 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1203.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +204 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1204.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +205 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1205.mem 197 21 1 sh3_zsrt139f10_pal.mem 0x60778774 +206 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1206.mem 701 77 1 sh3_zsrt139f10_pal.mem 0x60778774 +207 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1207.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +208 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1208.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +209 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1209.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +210 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1210.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +211 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1211.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +212 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1212.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +213 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1213.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +214 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1214.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +215 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1215.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +216 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1216.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +217 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1217.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +218 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1218.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +219 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1219.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +220 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1220.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +221 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1221.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +222 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1222.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +223 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1223.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +224 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1224.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +225 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1225.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +226 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1226.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +227 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1227.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +228 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1228.mem 206 22 1 sh3_zsrt139f10_pal.mem 0x60778774 +229 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1229.mem 296 32 1 sh3_zsrt139f10_pal.mem 0x60778774 +230 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1230.mem 179 19 1 sh3_zsrt139f10_pal.mem 0x60778774 +231 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1231.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +232 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1232.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +233 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1233.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +234 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1234.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +235 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1235.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +236 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1236.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +237 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1237.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +238 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1238.mem 242 26 1 sh3_zsrt139f10_pal.mem 0x60778774 +239 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1239.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +240 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1240.mem 269 29 1 sh3_zsrt139f10_pal.mem 0x60778774 +241 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1241.mem 296 32 1 sh3_zsrt139f10_pal.mem 0x60778774 +242 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1242.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +243 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1243.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +244 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1244.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +245 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1245.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +246 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1246.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +247 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1247.mem 89 9 1 sh3_zsrt139f10_pal.mem 0x60778774 +248 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1248.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +249 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1249.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +250 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1250.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +251 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1251.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +252 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1252.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +253 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1253.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +254 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1254.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +255 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1255.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +256 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1256.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +257 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1257.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +258 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1258.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +259 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1259.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +260 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1260.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +261 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1261.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +262 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1262.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +263 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1263.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +264 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1264.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +265 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1265.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +266 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1266.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +267 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1267.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +268 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1268.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +269 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1269.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +270 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1270.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +271 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1271.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +272 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1272.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +273 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1273.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +274 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1274.mem 215 23 1 sh3_zsrt139f10_pal.mem 0x60778774 +275 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1275.mem 152 16 1 sh3_zsrt139f10_pal.mem 0x60778774 +276 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1276.mem 80 8 1 sh3_zsrt139f10_pal.mem 0x60778774 +277 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1277.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +278 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1278.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +279 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1279.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +280 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1280.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +281 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1281.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +282 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1282.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +283 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1283.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +284 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1284.mem 143 15 1 sh3_zsrt139f10_pal.mem 0x60778774 +285 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1285.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +286 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1286.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +287 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1287.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +288 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1288.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +289 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1289.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +290 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1290.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +291 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1291.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +292 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1292.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +293 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1293.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +294 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1294.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +295 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1295.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +296 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1296.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +297 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1297.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +298 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1298.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +299 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1299.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +300 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1300.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +301 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1301.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +302 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1302.mem 107 11 1 sh3_zsrt139f10_pal.mem 0x60778774 +303 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1303.mem 134 14 1 sh3_zsrt139f10_pal.mem 0x60778774 +304 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1304.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +305 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1305.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +306 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1306.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +307 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1307.mem 62 6 1 sh3_zsrt139f10_pal.mem 0x60778774 +308 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1308.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +309 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1309.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +310 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1310.mem 224 24 1 sh3_zsrt139f10_pal.mem 0x60778774 +311 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1311.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +312 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1312.mem 161 17 1 sh3_zsrt139f10_pal.mem 0x60778774 +313 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1313.mem 341 37 1 sh3_zsrt139f10_pal.mem 0x60778774 +314 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1314.mem 98 10 1 sh3_zsrt139f10_pal.mem 0x60778774 +315 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1315.mem 71 7 1 sh3_zsrt139f10_pal.mem 0x60778774 +316 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1316.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +317 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1317.mem 53 5 1 sh3_zsrt139f10_pal.mem 0x60778774 +318 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1318.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +319 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1319.mem 44 4 1 sh3_zsrt139f10_pal.mem 0x60778774 +320 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1320.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +321 77 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1321.mem 35 3 1 sh3_zsrt139f10_pal.mem 0x60778774 +322 2108 12288 480 sh3_zsrt139f10_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1322.mem 125 13 1 sh3_zsrt139f10_pal.mem 0x60778774 +323 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1323.mem 368 40 0 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +324 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1324.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +325 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1325.mem 206 22 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +326 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1326.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +327 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1327.mem 656 72 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +328 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1328.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +329 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1329.mem 116 12 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +330 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1330.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +331 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1331.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +332 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1332.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +333 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1333.mem 152 16 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +334 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1334.mem 521 57 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +335 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1335.mem 215 23 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +336 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1336.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +337 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1337.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +338 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1338.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +339 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1339.mem 782 86 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +340 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1340.mem 953 105 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +341 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1341.mem 629 69 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +342 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1342.mem 602 66 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +343 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1343.mem 377 41 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +344 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1344.mem 485 53 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +345 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1345.mem 683 75 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +346 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1346.mem 854 94 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +347 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1347.mem 440 48 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +348 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1348.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +349 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1349.mem 233 25 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +350 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1350.mem 449 49 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +351 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1351.mem 98 10 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +352 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1352.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +353 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1353.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +354 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1354.mem 179 19 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +355 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1355.mem 107 11 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +356 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1356.mem 80 8 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +357 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1357.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +358 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1358.mem 152 16 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +359 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1359.mem 728 80 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +360 3105 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1360.mem 143 15 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +361 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1361.mem 782 86 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +362 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1362.mem 845 93 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +363 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1363.mem 1268 140 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +364 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1364.mem 809 89 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +365 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1365.mem 719 79 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +366 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1366.mem 1043 115 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +367 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1367.mem 890 98 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +368 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1368.mem 1241 137 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +369 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1369.mem 926 102 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +370 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1370.mem 161 17 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +371 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1371.mem 287 31 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +372 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1372.mem 170 18 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +373 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1373.mem 53 5 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +374 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1374.mem 89 9 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +375 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1375.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +376 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1376.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +377 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1377.mem 62 6 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +378 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1378.mem 197 21 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +379 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1379.mem 107 11 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +380 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1380.mem 341 37 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +381 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1381.mem 188 20 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +382 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1382.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +383 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1383.mem 44 4 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +384 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1384.mem 89 9 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +385 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1385.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +386 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1386.mem 125 13 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +387 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1387.mem 71 7 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +388 4944 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1388.mem 494 54 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +389 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1389.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +390 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1390.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +391 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1391.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +392 5898 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1392.mem 1295 143 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +393 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1393.mem 521 57 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +394 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1394.mem 485 53 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +395 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1395.mem 224 24 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +396 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1396.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +397 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1397.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +398 6822 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1398.mem 908 100 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +399 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1399.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +400 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1400.mem 2042 226 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +401 8151 11264 480 sh3_zsrt139f1323_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1401.mem 143 15 1 sh3_zsrt139f1323_pal.mem 0x32ed74c4 +402 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1402.mem 854 94 0 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +403 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1403.mem 449 49 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +404 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1404.mem 476 52 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +405 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1405.mem 692 76 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +406 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1406.mem 1034 114 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +407 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1407.mem 620 68 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +408 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1408.mem 1160 128 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +409 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1409.mem 971 107 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +410 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1410.mem 737 81 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +411 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1411.mem 1106 122 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +412 10852 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1412.mem 737 81 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +413 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1413.mem 1682 186 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +414 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1414.mem 1727 191 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +415 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1415.mem 1358 150 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +416 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1416.mem 1196 132 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +417 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1417.mem 1871 207 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +418 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1418.mem 494 54 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +419 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1419.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +420 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1420.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +421 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1421.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +422 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1422.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +423 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1423.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +424 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1424.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +425 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1425.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +426 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1426.mem 278 30 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +427 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1427.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +428 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1428.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +429 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1429.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +430 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1430.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +431 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1431.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +432 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1432.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +433 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1433.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +434 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1434.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +435 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1435.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +436 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1436.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +437 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1437.mem 125 13 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +438 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1438.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +439 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1439.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +440 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1440.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +441 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1441.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +442 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1442.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +443 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1443.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +444 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1444.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +445 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1445.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +446 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1446.mem 188 20 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +447 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1447.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +448 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1448.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +449 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1449.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +450 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1450.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +451 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1451.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +452 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1452.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +453 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1453.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +454 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1454.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +455 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1455.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +456 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1456.mem 269 29 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +457 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1457.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +458 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1458.mem 80 8 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +459 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1459.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +460 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1460.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +461 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1461.mem 215 23 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +462 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1462.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +463 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1463.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +464 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1464.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +465 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1465.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +466 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1466.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +467 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1467.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +468 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1468.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +469 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1469.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +470 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1470.mem 233 25 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +471 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1471.mem 179 19 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +472 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1472.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +473 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1473.mem 143 15 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +474 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1474.mem 170 18 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +475 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1475.mem 98 10 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +476 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1476.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +477 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1477.mem 179 19 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +478 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1478.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +479 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1479.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +480 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1480.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +481 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1481.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +482 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1482.mem 35 3 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +483 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1483.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +484 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1484.mem 53 5 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +485 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1485.mem 107 11 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +486 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1486.mem 89 9 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +487 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1487.mem 62 6 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +488 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1488.mem 44 4 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +489 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1489.mem 125 13 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +490 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1490.mem 224 24 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +491 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1491.mem 116 12 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +492 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1492.mem 152 16 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +493 11512 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1493.mem 71 7 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +494 12757 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1494.mem 2042 226 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +495 12757 10240 480 sh3_zsrt139f1402_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1495.mem 206 22 1 sh3_zsrt139f1402_pal.mem 0x3cd88c98 +496 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1496.mem 2042 226 0 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +497 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1497.mem 2042 226 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +498 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1498.mem 755 83 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +499 15277 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1499.mem 44 4 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +500 15931 12288 480 sh3_zsrt139f1496_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1500.mem 1475 163 1 sh3_zsrt139f1496_pal.mem 0x4812d6f2 +501 16217 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1501.mem 2042 226 0 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +502 16217 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1502.mem 1043 115 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +503 16856 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1503.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +504 16856 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1504.mem 1304 144 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +505 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1505.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +506 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1506.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +507 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1507.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +508 17552 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1508.mem 665 73 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +509 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1509.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +510 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1510.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +511 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1511.mem 152 16 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +512 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1512.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +513 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1513.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +514 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1514.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +515 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1515.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +516 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1516.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +517 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1517.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +518 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1518.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +519 18896 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1519.mem 161 17 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +520 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1520.mem 2006 222 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +521 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1521.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +522 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1522.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +523 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1523.mem 2042 226 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +524 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1524.mem 1493 165 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +525 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1525.mem 917 101 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +526 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1526.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +527 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1527.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +528 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1528.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +529 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1529.mem 206 22 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +530 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1530.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +531 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1531.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +532 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1532.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +533 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1533.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +534 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1534.mem 80 8 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +535 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1535.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +536 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1536.mem 143 15 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +537 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1537.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +538 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1538.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +539 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1539.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +540 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1540.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +541 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1541.mem 53 5 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +542 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1542.mem 98 10 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +543 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1543.mem 152 16 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +544 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1544.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +545 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1545.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +546 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1546.mem 44 4 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +547 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1547.mem 125 13 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +548 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1548.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +549 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1549.mem 71 7 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +550 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1550.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +551 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1551.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +552 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1552.mem 89 9 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +553 19562 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1553.mem 62 6 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +554 20246 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1554.mem 1592 176 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +555 20792 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1555.mem 2006 222 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +556 21386 11264 480 sh3_zsrt139f1501_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1556.mem 1439 159 1 sh3_zsrt139f1501_pal.mem 0x5cbf8bb4 +557 26066 11264 480 sh3_zsrt139f1557_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1557.mem 179 19 0 sh3_zsrt139f1557_pal.mem 0x44679578 +558 26121 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1558.mem 323 35 0 sh3_zsrt139f1558_pal.mem 0x47405cb0 +559 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1559.mem 746 82 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +560 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1560.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +561 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1561.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +562 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1562.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +563 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1563.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +564 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1564.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +565 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1565.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +566 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1566.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +567 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1567.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +568 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1568.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +569 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1569.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +570 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1570.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +571 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1571.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +572 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1572.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +573 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1573.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +574 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1574.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +575 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1575.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +576 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1576.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +577 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1577.mem 404 44 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +578 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1578.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +579 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1579.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +580 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1580.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +581 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1581.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +582 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1582.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +583 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1583.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +584 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1584.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +585 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1585.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +586 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1586.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +587 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1587.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +588 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1588.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +589 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1589.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +590 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1590.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +591 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1591.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +592 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1592.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +593 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1593.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +594 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1594.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +595 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1595.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +596 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1596.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +597 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1597.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +598 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1598.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +599 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1599.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +600 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1600.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +601 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1601.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +602 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1602.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +603 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1603.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +604 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1604.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +605 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1605.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +606 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1606.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +607 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1607.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +608 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1608.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +609 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1609.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +610 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1610.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +611 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1611.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +612 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1612.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +613 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1613.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +614 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1614.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +615 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1615.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +616 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1616.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +617 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1617.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +618 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1618.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +619 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1619.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +620 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1620.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +621 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1621.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +622 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1622.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +623 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1623.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +624 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1624.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +625 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1625.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +626 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1626.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +627 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1627.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +628 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1628.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +629 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1629.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +630 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1630.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +631 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1631.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +632 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1632.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +633 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1633.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +634 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1634.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +635 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1635.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +636 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1636.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +637 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1637.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +638 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1638.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +639 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1639.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +640 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1640.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +641 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1641.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +642 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1642.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +643 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1643.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +644 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1644.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +645 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1645.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +646 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1646.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +647 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1647.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +648 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1648.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +649 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1649.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +650 26555 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1650.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +651 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1651.mem 431 47 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +652 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1652.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +653 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1653.mem 413 45 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +654 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1654.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +655 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1655.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +656 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1656.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +657 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1657.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +658 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1658.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +659 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1659.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +660 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1660.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +661 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1661.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +662 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1662.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +663 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1663.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +664 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1664.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +665 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1665.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +666 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1666.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +667 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1667.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +668 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1668.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +669 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1669.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +670 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1670.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +671 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1671.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +672 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1672.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +673 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1673.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +674 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1674.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +675 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1675.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +676 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1676.mem 296 32 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +677 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1677.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +678 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1678.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +679 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1679.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +680 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1680.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +681 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1681.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +682 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1682.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +683 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1683.mem 395 43 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +684 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1684.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +685 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1685.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +686 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1686.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +687 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1687.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +688 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1688.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +689 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1689.mem 440 48 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +690 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1690.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +691 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1691.mem 476 52 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +692 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1692.mem 503 55 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +693 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1693.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +694 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1694.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +695 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1695.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +696 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1696.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +697 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1697.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +698 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1698.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +699 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1699.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +700 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1700.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +701 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1701.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +702 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1702.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +703 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1703.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +704 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1704.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +705 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1705.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +706 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1706.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +707 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1707.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +708 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1708.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +709 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1709.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +710 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1710.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +711 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1711.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +712 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1712.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +713 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1713.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +714 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1714.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +715 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +716 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1716.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +717 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1717.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +718 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1718.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +719 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1719.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +720 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1720.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +721 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1721.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +722 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1722.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +723 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1723.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +724 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1724.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +725 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1725.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +726 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1726.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +727 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1727.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +728 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1728.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +729 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1729.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +730 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1730.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +731 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1731.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +732 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1732.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +733 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1733.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +734 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1734.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +735 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1735.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +736 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1736.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +737 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1737.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +738 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1738.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +739 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1739.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +740 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1740.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +741 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1741.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +742 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1742.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +743 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1743.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +744 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1744.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +745 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1745.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +746 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1746.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +747 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1747.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +748 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1748.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +749 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1749.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +750 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1750.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +751 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1751.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +752 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1752.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +753 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1753.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +754 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1754.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +755 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1755.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +756 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1756.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +757 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1757.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +758 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1758.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +759 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1759.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +760 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1760.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +761 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1761.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +762 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1762.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +763 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1763.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +764 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1764.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +765 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1765.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +766 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1766.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +767 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1767.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +768 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1768.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +769 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1769.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +770 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1770.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +771 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1771.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +772 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1772.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +773 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1773.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +774 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1774.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +775 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1775.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +776 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1776.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +777 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1777.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +778 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1778.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +779 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1779.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +780 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1780.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +781 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1781.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +782 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1782.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +783 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1783.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +784 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1784.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +785 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1785.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +786 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1786.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +787 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1787.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +788 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1788.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +789 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1789.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +790 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1790.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +791 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1791.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +792 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1792.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +793 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1793.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +794 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1794.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +795 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1795.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +796 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1796.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +797 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1797.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +798 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1798.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +799 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1799.mem 386 42 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +800 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1800.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +801 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1801.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +802 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1802.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +803 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1803.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +804 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1804.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +805 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1805.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +806 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1806.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +807 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1807.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +808 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1808.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +809 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1809.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +810 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1810.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +811 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1811.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +812 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1812.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +813 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1813.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +814 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1814.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +815 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1815.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +816 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1816.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +817 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1817.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +818 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1818.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +819 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1819.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +820 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1820.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +821 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1821.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +822 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1822.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +823 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1823.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +824 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1824.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +825 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1825.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +826 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1826.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +827 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1827.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +828 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1828.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +829 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1829.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +830 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1830.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +831 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1831.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +832 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1832.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +833 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1833.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +834 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1834.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +835 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1835.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +836 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1836.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +837 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1837.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +838 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1838.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +839 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1839.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +840 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1840.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +841 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1841.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +842 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1842.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +843 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1843.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +844 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1844.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +845 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1845.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +846 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1846.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +847 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1847.mem 269 29 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +848 27857 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1848.mem 17 1 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +849 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1849.mem 404 44 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +850 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1850.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +851 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1851.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +852 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1852.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +853 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1853.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +854 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1854.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +855 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1855.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +856 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1856.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +857 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1857.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +858 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1858.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +859 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1859.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +860 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1860.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +861 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1861.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +862 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1862.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +863 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1863.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +864 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1864.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +865 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1865.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +866 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1866.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +867 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1867.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +868 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1868.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +869 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1869.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +870 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1870.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +871 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1871.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +872 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1872.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +873 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1873.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +874 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1874.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +875 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1875.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +876 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1876.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +877 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1877.mem 260 28 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +878 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1878.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +879 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1879.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +880 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1880.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +881 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1881.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +882 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1882.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +883 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1883.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +884 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1884.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +885 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1885.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +886 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1886.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +887 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1887.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +888 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1888.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +889 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1889.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +890 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1890.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +891 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1891.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +892 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1892.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +893 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1893.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +894 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1894.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +895 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1895.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +896 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1896.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +897 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1897.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +898 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1898.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +899 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1899.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +900 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1900.mem 197 21 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +901 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1901.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +902 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1902.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +903 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1903.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +904 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1904.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +905 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1905.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +906 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1906.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +907 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1907.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +908 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1908.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +909 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1909.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +910 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +911 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +912 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +913 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +914 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +915 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +916 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +917 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +918 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +919 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +920 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +921 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +922 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +923 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +924 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +925 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +926 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +927 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1927.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +928 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1928.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +929 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1929.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +930 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1930.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +931 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1931.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +932 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1932.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +933 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1933.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +934 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1934.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +935 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1935.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +936 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1936.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +937 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1937.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +938 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1938.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +939 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1939.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +940 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1940.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +941 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1941.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +942 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1942.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +943 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1943.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +944 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1944.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +945 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1945.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +946 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1946.mem 251 27 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +947 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1947.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +948 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1948.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +949 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1949.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +950 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1950.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +951 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1951.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +952 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1952.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +953 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1953.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +954 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1954.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +955 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1955.mem 224 24 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +956 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1956.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +957 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1957.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +958 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1958.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +959 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1959.mem 539 59 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +960 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1960.mem 683 75 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +961 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1961.mem 305 33 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +962 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1962.mem 224 24 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +963 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1963.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +964 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1964.mem 233 25 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +965 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1965.mem 323 35 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +966 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1966.mem 287 31 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +967 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1967.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +968 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1968.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +969 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1969.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +970 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1970.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +971 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1971.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +972 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1972.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +973 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1973.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +974 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1974.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +975 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1975.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +976 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1976.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +977 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1977.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +978 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1978.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +979 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1979.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +980 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1980.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +981 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1981.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +982 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1982.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +983 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1983.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +984 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1984.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +985 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1985.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +986 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1986.mem 215 23 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +987 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1987.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +988 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1988.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +989 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1989.mem 278 30 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +990 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1990.mem 368 40 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +991 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1991.mem 242 26 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +992 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1992.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +993 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1993.mem 116 12 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +994 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1994.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +995 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1995.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +996 29159 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1996.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +997 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1997.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +998 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1998.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +999 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1999.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1000 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11000.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1001 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11001.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1002 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11002.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1003 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11003.mem 332 36 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1004 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11004.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1005 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11005.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1006 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11006.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1007 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11007.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1008 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11008.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1009 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11009.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1010 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11010.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1011 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11011.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1012 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11012.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1013 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11013.mem 557 61 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1014 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11014.mem 179 19 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1015 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11015.mem 98 10 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1016 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11016.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1017 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11017.mem 377 41 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1018 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11018.mem 206 22 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1019 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11019.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1020 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11020.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1021 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11021.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1022 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11022.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1023 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11023.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1024 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11024.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1025 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11025.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1026 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11026.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1027 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11027.mem 215 23 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1028 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11028.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1029 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11029.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1030 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11030.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1031 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11031.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1032 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11032.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1033 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11033.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1034 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11034.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1035 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11035.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1036 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11036.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1037 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11037.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1038 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11038.mem 35 3 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1039 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11039.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1040 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11040.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1041 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11041.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1042 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11042.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1043 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11043.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1044 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11044.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1045 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11045.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1046 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11046.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1047 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11047.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1048 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11048.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1049 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11049.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1050 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11050.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1051 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11051.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1052 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11052.mem 125 13 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1053 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11053.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1054 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11054.mem 89 9 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1055 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11055.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1056 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11056.mem 62 6 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1057 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11057.mem 170 18 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1058 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11058.mem 80 8 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1059 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11059.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1060 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11060.mem 314 34 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1061 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11061.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1062 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11062.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1063 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11063.mem 152 16 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1064 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11064.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1065 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11065.mem 44 4 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1066 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11066.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1067 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11067.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1068 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11068.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1069 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11069.mem 53 5 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1070 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11070.mem 71 7 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1071 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11071.mem 161 17 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1072 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11072.mem 134 14 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1073 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11073.mem 188 20 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1074 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11074.mem 107 11 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1075 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11075.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1076 30461 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11076.mem 602 66 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1077 31915 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11077.mem 2033 225 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1078 33303 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11078.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1079 33303 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11079.mem 1349 149 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1080 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11080.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1081 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11081.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1082 34605 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11082.mem 143 15 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1083 35907 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11083.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1084 35907 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11084.mem 1907 211 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1085 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11085.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1086 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11086.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1087 37209 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11087.mem 17 1 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1088 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11088.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1089 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11089.mem 2042 226 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1090 38511 10240 480 sh3_zsrt139f1558_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11090.mem 971 107 1 sh3_zsrt139f1558_pal.mem 0x47405cb0 +1091 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11091.mem 521 57 0 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1092 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11092.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1093 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11093.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1094 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11094.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1095 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11095.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1096 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11096.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1097 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11097.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1098 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11098.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1099 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11099.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1100 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11100.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1101 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11101.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1102 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11102.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1103 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11103.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1104 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11104.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1105 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11105.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1106 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11106.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1107 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11107.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1108 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11108.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1109 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11109.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1110 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11110.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1111 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11111.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1112 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11112.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1113 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11113.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1114 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11114.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1115 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11115.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1116 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11116.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1117 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11117.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1118 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11118.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1119 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11119.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1120 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11120.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1121 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11121.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1122 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11122.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1123 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11123.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1124 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11124.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1125 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11125.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1126 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11126.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1127 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11127.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1128 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11128.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1129 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11129.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1130 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11130.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1131 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11131.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1132 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11132.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1133 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11133.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1134 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11134.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1135 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11135.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1136 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11136.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1137 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11137.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1138 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11138.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1139 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11139.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1140 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11140.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1141 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11141.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1142 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11142.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1143 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11143.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1144 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11144.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1145 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11145.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1146 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11146.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1147 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11147.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1148 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11148.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1149 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11149.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1150 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11150.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1151 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11151.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1152 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11152.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1153 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11153.mem 476 52 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1154 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11154.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1155 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11155.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1156 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11156.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1157 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11157.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1158 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11158.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1159 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11159.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1160 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11160.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1161 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11161.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1162 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11162.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1163 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11163.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1164 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11164.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1165 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11165.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1166 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11166.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1167 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11167.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1168 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11168.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1169 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11169.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1170 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11170.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1171 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11171.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1172 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11172.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1173 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11173.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1174 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11174.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1175 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11175.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1176 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11176.mem 386 42 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1177 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11177.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1178 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11178.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1179 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11179.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1180 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11180.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1181 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11181.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1182 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11182.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1183 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11183.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1184 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11184.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1185 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11185.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1186 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11186.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1187 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11187.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1188 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11188.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1189 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11189.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1190 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11190.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1191 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11191.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1192 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11192.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1193 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11193.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1194 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11194.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1195 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11195.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1196 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11196.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1197 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11197.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1198 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11198.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1199 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11199.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1200 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11200.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1201 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11201.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1202 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11202.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1203 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11203.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1204 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11204.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1205 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11205.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1206 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11206.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1207 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11207.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1208 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11208.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1209 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11209.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1210 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11210.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1211 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11211.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1212 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11212.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1213 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11213.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1214 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11214.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1215 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11215.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1216 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11216.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1217 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11217.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1218 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11218.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1219 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11219.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1220 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11220.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1221 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11221.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1222 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11222.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1223 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11223.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1224 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11224.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1225 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11225.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1226 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11226.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1227 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11227.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1228 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11228.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1229 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11229.mem 431 47 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1230 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11230.mem 467 51 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1231 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11231.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1232 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11232.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1233 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11233.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1234 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11234.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1235 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11235.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1236 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11236.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1237 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11237.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1238 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11238.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1239 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11239.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1240 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11240.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1241 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11241.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1242 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11242.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1243 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11243.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1244 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11244.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1245 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11245.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1246 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11246.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1247 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11247.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1248 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11248.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1249 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11249.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1250 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11250.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1251 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11251.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1252 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11252.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1253 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11253.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1254 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11254.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1255 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11255.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1256 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11256.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1257 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11257.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1258 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11258.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1259 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11259.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1260 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11260.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1261 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11261.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1262 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11262.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1263 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11263.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1264 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11264.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1265 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11265.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1266 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11266.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1267 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11267.mem 413 45 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1268 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11268.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1269 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11269.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1270 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11270.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1271 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11271.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1272 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11272.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1273 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11273.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1274 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11274.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1275 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11275.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1276 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11276.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1277 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11277.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1278 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11278.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1279 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11279.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1280 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11280.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1281 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11281.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1282 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11282.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1283 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11283.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1284 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11284.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1285 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11285.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1286 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11286.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1287 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11287.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1288 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11288.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1289 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11289.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1290 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11290.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1291 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11291.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1292 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11292.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1293 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11293.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1294 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11294.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1295 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11295.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1296 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11296.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1297 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11297.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1298 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11298.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1299 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11299.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1300 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11300.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1301 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11301.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1302 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11302.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1303 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11303.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1304 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11304.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1305 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11305.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1306 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11306.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1307 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11307.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1308 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11308.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1309 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11309.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1310 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11310.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1311 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11311.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1312 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11312.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1313 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11313.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1314 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11314.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1315 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11315.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1316 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11316.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1317 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11317.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1318 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11318.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1319 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11319.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1320 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11320.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1321 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11321.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1322 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11322.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1323 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11323.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1324 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11324.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1325 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11325.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1326 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11326.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1327 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11327.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1328 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11328.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1329 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11329.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1330 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11330.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1331 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11331.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1332 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11332.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1333 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11333.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1334 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11334.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1335 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11335.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1336 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11336.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1337 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11337.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1338 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11338.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1339 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11339.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1340 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11340.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1341 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11341.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1342 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11342.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1343 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11343.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1344 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11344.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1345 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11345.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1346 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11346.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1347 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11347.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1348 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11348.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1349 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11349.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1350 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11350.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1351 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11351.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1352 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11352.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1353 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11353.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1354 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11354.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1355 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11355.mem 548 60 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1356 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11356.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1357 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11357.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1358 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11358.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1359 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11359.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1360 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11360.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1361 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11361.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1362 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11362.mem 512 56 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1363 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11363.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1364 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11364.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1365 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11365.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1366 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11366.mem 611 67 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1367 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11367.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1368 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11368.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1369 53334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11369.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1370 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11370.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1371 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11371.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1372 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11372.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1373 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11373.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1374 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11374.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1375 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11375.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1376 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11376.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1377 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11377.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1378 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11378.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1379 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11379.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1380 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11380.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1381 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11381.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1382 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11382.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1383 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11383.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1384 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11384.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1385 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11385.mem 602 66 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1386 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11386.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1387 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11387.mem 593 65 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1388 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11388.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1389 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11389.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1390 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11390.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1391 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11391.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1392 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11392.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1393 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11393.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1394 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11394.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1395 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11395.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1396 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11396.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1397 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11397.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1398 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11398.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1399 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11399.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1400 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11400.mem 1088 120 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1401 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11401.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1402 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11402.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1403 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11403.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1404 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11404.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1405 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11405.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1406 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11406.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1407 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11407.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1408 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11408.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1409 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11409.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1410 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11410.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1411 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11411.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1412 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11412.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1413 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11413.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1414 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11414.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1415 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11415.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1416 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11416.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1417 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11417.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1418 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11418.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1419 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11419.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1420 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11420.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1421 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11421.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1422 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11422.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1423 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11423.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1424 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11424.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1425 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11425.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1426 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11426.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1427 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11427.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1428 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11428.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1429 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11429.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1430 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11430.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1431 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11431.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1432 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11432.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1433 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11433.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1434 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11434.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1435 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11435.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1436 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11436.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1437 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11437.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1438 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11438.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1439 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11439.mem 512 56 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1440 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11440.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1441 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11441.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1442 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11442.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1443 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11443.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1444 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11444.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1445 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11445.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1446 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11446.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1447 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11447.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1448 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11448.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1449 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11449.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1450 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11450.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1451 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11451.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1452 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11452.mem 665 73 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1453 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11453.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1454 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11454.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1455 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11455.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1456 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11456.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1457 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11457.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1458 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11458.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1459 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11459.mem 629 69 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1460 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11460.mem 710 78 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1461 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11461.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1462 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11462.mem 701 77 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1463 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11463.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1464 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11464.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1465 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11465.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1466 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11466.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1467 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11467.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1468 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11468.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1469 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11469.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1470 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11470.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1471 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11471.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1472 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11472.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1473 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11473.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1474 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11474.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1475 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11475.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1476 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11476.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1477 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11477.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1478 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11478.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1479 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11479.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1480 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11480.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1481 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11481.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1482 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11482.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1483 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11483.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1484 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11484.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1485 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11485.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1486 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11486.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1487 53973 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11487.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1488 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11488.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1489 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11489.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1490 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11490.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1491 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11491.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1492 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11492.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1493 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11493.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1494 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11494.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1495 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11495.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1496 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11496.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1497 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11497.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1498 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11498.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1499 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11499.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1500 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11500.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1501 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11501.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1502 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11502.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1503 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11503.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1504 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11504.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1505 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11505.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1506 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11506.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1507 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11507.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1508 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11508.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1509 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11509.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1510 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11510.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1511 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11511.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1512 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11512.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1513 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11513.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1514 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11514.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1515 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11515.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1516 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11516.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1517 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11517.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1518 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11518.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1519 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11519.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1520 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11520.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1521 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11521.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1522 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11522.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1523 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11523.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1524 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11524.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1525 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11525.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1526 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11526.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1527 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11527.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1528 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11528.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1529 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11529.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1530 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11530.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1531 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11531.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1532 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11532.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1533 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11533.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1534 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11534.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1535 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11535.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1536 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11536.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1537 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11537.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1538 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11538.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1539 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11539.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1540 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11540.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1541 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11541.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1542 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11542.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1543 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11543.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1544 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11544.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1545 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11545.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1546 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11546.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1547 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11547.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1548 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11548.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1549 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11549.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1550 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11550.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1551 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11551.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1552 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11552.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1553 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11553.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1554 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11554.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1555 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11555.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1556 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11556.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1557 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11557.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1558 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11558.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1559 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11559.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1560 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11560.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1561 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11561.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1562 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11562.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1563 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11563.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1564 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11564.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1565 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11565.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1566 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11566.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1567 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11567.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1568 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11568.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1569 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11569.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1570 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11570.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1571 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11571.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1572 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11572.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1573 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11573.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1574 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11574.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1575 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11575.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1576 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11576.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1577 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11577.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1578 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11578.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1579 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11579.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1580 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11580.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1581 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11581.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1582 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11582.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1583 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11583.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1584 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11584.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1585 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11585.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1586 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11586.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1587 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11587.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1588 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11588.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1589 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11589.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1590 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11590.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1591 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11591.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1592 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11592.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1593 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11593.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1594 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11594.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1595 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11595.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1596 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11596.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1597 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11597.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1598 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11598.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1599 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11599.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1600 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11600.mem 593 65 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1601 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11601.mem 647 71 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1602 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11602.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1603 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11603.mem 728 80 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1604 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11604.mem 665 73 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1605 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11605.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1606 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11606.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1607 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11607.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1608 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11608.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1609 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11609.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1610 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11610.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1611 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11611.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1612 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11612.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1613 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11613.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1614 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11614.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1615 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11615.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1616 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11616.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1617 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11617.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1618 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11618.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1619 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11619.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1620 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11620.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1621 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11621.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1622 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11622.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1623 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11623.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1624 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11624.mem 539 59 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1625 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11625.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1626 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11626.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1627 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11627.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1628 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11628.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1629 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11629.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1630 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11630.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1631 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11631.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1632 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11632.mem 611 67 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1633 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11633.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1634 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11634.mem 809 89 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1635 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11635.mem 377 41 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1636 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11636.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1637 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11637.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1638 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11638.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1639 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11639.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1640 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11640.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1641 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11641.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1642 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11642.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1643 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11643.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1644 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11644.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1645 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11645.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1646 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11646.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1647 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11647.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1648 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11648.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1649 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11649.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1650 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11650.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1651 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11651.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1652 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11652.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1653 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11653.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1654 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11654.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1655 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11655.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1656 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11656.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1657 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11657.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1658 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11658.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1659 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11659.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1660 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11660.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1661 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11661.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1662 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11662.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1663 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11663.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1664 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11664.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1665 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11665.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1666 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11666.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1667 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11667.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1668 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11668.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1669 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11669.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1670 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11670.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1671 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11671.mem 422 46 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1672 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11672.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1673 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11673.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1674 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11674.mem 845 93 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1675 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11675.mem 1457 161 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1676 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11676.mem 602 66 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1677 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11677.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1678 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11678.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1679 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11679.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1680 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11680.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1681 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11681.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1682 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11682.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1683 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11683.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1684 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11684.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1685 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11685.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1686 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11686.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1687 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11687.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1688 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11688.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1689 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11689.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1690 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11690.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1691 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11691.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1692 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11692.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1693 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11693.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1694 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11694.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1695 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11695.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1696 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11696.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1697 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11697.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1698 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11698.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1699 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11699.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1700 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11700.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1701 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11701.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1702 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11702.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1703 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11703.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1704 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11704.mem 485 53 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1705 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11705.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1706 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11706.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1707 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11707.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1708 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11708.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1709 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11709.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1710 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11710.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1711 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11711.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1712 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11712.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1713 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11713.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1714 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11714.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1715 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11715.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1716 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11716.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1717 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11717.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1718 54612 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11718.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1719 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11719.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1720 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11720.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1721 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11721.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1722 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11722.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1723 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11723.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1724 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11724.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1725 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11725.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1726 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11726.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1727 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11727.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1728 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11728.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1729 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11729.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1730 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11730.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1731 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11731.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1732 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11732.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1733 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11733.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1734 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11734.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1735 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11735.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1736 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11736.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1737 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11737.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1738 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11738.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1739 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11739.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1740 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11740.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1741 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11741.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1742 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11742.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1743 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11743.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1744 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11744.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1745 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11745.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1746 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11746.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1747 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11747.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1748 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11748.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1749 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11749.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1750 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11750.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1751 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11751.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1752 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11752.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1753 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11753.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1754 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11754.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1755 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11755.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1756 55890 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11756.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1757 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11757.mem 368 40 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1758 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11758.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1759 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11759.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1760 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11760.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1761 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11761.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1762 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11762.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1763 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11763.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1764 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11764.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1765 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11765.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1766 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11766.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1767 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11767.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1768 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11768.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1769 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11769.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1770 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11770.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1771 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11771.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1772 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11772.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1773 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11773.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1774 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11774.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1775 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11775.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1776 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11776.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1777 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11777.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1778 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11778.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1779 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11779.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1780 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11780.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1781 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11781.mem 440 48 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1782 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11782.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1783 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11783.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1784 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11784.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1785 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11785.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1786 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11786.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1787 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11787.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1788 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11788.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1789 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11789.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1790 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11790.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1791 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11791.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1792 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11792.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1793 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11793.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1794 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11794.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1795 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11795.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1796 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11796.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1797 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11797.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1798 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11798.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1799 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11799.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1800 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11800.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1801 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11801.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1802 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11802.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1803 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11803.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1804 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11804.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1805 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11805.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1806 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11806.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1807 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11807.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1808 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11808.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1809 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11809.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1810 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11810.mem 476 52 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1811 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11811.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1812 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11812.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1813 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11813.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1814 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11814.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1815 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11815.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1816 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11816.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1817 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11817.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1818 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11818.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1819 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11819.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1820 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11820.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1821 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11821.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1822 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11822.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1823 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11823.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1824 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11824.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1825 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11825.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1826 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11826.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1827 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11827.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1828 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11828.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1829 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11829.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1830 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11830.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1831 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11831.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1832 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11832.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1833 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11833.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1834 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11834.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1835 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11835.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1836 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11836.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1837 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11837.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1838 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11838.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1839 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11839.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1840 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11840.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1841 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11841.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1842 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11842.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1843 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11843.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1844 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11844.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1845 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11845.mem 467 51 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1846 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11846.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1847 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11847.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1848 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11848.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1849 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11849.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1850 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11850.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1851 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11851.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1852 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11852.mem 341 37 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1853 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11853.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1854 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11854.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1855 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11855.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1856 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11856.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1857 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11857.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1858 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11858.mem 413 45 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1859 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11859.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1860 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11860.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1861 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11861.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1862 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11862.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1863 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11863.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1864 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11864.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1865 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11865.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1866 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11866.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1867 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11867.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1868 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11868.mem 1781 197 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1869 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11869.mem 1394 154 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1870 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11870.mem 566 62 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1871 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11871.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1872 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11872.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1873 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11873.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1874 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11874.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1875 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11875.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1876 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11876.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1877 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11877.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1878 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11878.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1879 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11879.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1880 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11880.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1881 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11881.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1882 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11882.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1883 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11883.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1884 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11884.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1885 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11885.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1886 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11886.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1887 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11887.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1888 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11888.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1889 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11889.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1890 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11890.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1891 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11891.mem 314 34 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1892 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11892.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1893 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11893.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1894 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11894.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1895 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11895.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1896 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11896.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1897 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11897.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1898 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11898.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1899 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11899.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1900 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11900.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1901 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11901.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1902 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11902.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1903 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11903.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1904 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11904.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1905 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11905.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1906 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11906.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1907 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11907.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1908 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11908.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1909 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11909.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1910 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11910.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1911 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11911.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1912 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11912.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1913 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11913.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1914 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11914.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1915 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11915.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1916 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11916.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1917 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11917.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1918 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11918.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1919 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11919.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1920 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11920.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1921 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11921.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1922 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11922.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1923 56529 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11923.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1924 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11924.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1925 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11925.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1926 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11926.mem 404 44 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1927 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11927.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1928 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11928.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1929 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11929.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1930 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11930.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1931 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11931.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1932 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11932.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1933 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11933.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1934 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11934.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1935 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11935.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1936 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11936.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1937 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11937.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1938 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11938.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1939 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11939.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1940 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11940.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1941 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11941.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1942 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11942.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1943 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11943.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1944 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11944.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1945 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11945.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1946 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11946.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1947 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11947.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1948 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11948.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1949 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11949.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1950 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11950.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1951 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11951.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1952 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11952.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1953 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11953.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1954 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11954.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1955 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11955.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1956 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11956.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1957 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11957.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1958 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11958.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1959 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11959.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1960 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11960.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1961 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11961.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1962 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11962.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1963 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11963.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1964 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11964.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1965 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11965.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1966 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11966.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1967 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11967.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1968 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11968.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1969 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11969.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1970 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11970.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1971 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11971.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1972 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11972.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1973 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11973.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1974 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11974.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1975 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11975.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1976 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11976.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1977 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11977.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1978 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11978.mem 260 28 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1979 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11979.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1980 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11980.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1981 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11981.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1982 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11982.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1983 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11983.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1984 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11984.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1985 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11985.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1986 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11986.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1987 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11987.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1988 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11988.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1989 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11989.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1990 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11990.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1991 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11991.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1992 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11992.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1993 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11993.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1994 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11994.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1995 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11995.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1996 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11996.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1997 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11997.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1998 57807 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11998.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +1999 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f11999.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2000 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12000.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2001 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12001.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2002 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12002.mem 287 31 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2003 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12003.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2004 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12004.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2005 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12005.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2006 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12006.mem 350 38 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2007 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12007.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2008 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12008.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2009 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12009.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2010 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12010.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2011 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12011.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2012 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12012.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2013 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12013.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2014 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12014.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2015 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12015.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2016 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12016.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2017 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12017.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2018 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12018.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2019 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12019.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2020 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12020.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2021 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12021.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2022 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12022.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2023 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12023.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2024 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12024.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2025 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12025.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2026 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12026.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2027 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12027.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2028 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12028.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2029 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12029.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2030 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12030.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2031 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12031.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2032 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12032.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2033 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12033.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2034 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12034.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2035 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12035.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2036 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12036.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2037 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12037.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2038 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12038.mem 638 70 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2039 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12039.mem 305 33 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2040 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12040.mem 827 91 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2041 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12041.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2042 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12042.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2043 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12043.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2044 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12044.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2045 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12045.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2046 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12046.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2047 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12047.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2048 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12048.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2049 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12049.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2050 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12050.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2051 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12051.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2052 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12052.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2053 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12053.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2054 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12054.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2055 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12055.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2056 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12056.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2057 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12057.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2058 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12058.mem 197 21 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2059 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12059.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2060 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12060.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2061 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12061.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2062 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12062.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2063 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12063.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2064 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12064.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2065 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12065.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2066 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12066.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2067 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12067.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2068 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12068.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2069 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12069.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2070 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12070.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2071 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12071.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2072 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12072.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2073 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12073.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2074 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12074.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2075 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12075.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2076 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12076.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2077 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12077.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2078 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12078.mem 44 4 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2079 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12079.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2080 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12080.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2081 58446 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12081.mem 35 3 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2082 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12082.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2083 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12083.mem 395 43 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2084 59085 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12084.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2085 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12085.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2086 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12086.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2087 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12087.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2088 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12088.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2089 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12089.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2090 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12090.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2091 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12091.mem 125 13 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2092 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12092.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2093 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12093.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2094 59778 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12094.mem 26 2 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2095 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12095.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2096 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12096.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2097 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12097.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2098 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12098.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2099 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12099.mem 233 25 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2100 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12100.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2101 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12101.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2102 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12102.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2103 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12103.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2104 60417 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12104.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2105 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12105.mem 296 32 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2106 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12106.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2107 61056 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12107.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2108 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12108.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2109 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12109.mem 215 23 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2110 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12110.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2111 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12111.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2112 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12112.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2113 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12113.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2114 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12114.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2115 61695 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12115.mem 53 5 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2116 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12116.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2117 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12117.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2118 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12118.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2119 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12119.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2120 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12120.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2121 62334 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12121.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2122 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12122.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2123 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12123.mem 188 20 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2124 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12124.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2125 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12125.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2126 62910 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12126.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2127 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12127.mem 359 39 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2128 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12128.mem 206 22 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2129 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12129.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2130 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12130.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2131 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12131.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2132 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12132.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2133 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12133.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2134 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12134.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2135 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12135.mem 107 11 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2136 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12136.mem 152 16 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2137 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12137.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2138 63549 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12138.mem 62 6 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2139 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12139.mem 575 63 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2140 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12140.mem 161 17 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2141 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12141.mem 323 35 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2142 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12142.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2143 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12143.mem 242 26 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2144 64188 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12144.mem 143 15 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2145 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12145.mem 251 27 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2146 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12146.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2147 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12147.mem 98 10 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2148 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12148.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2149 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12149.mem 116 12 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2150 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12150.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2151 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12151.mem 179 19 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2152 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12152.mem 134 14 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2153 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12153.mem 89 9 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2154 64827 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12154.mem 71 7 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2155 71148 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12155.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2156 71148 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12156.mem 1727 191 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2157 71787 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12157.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2158 71787 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12158.mem 1754 194 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2159 72426 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12159.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2160 72426 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12160.mem 1736 192 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2161 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12161.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2162 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12162.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2163 73065 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12163.mem 80 8 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2164 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12164.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2165 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12165.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2166 73704 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12166.mem 278 30 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2167 74343 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12167.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2168 74343 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12168.mem 1763 195 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2169 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12169.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2170 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12170.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2171 74982 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12171.mem 170 18 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2172 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12172.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2173 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12173.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2174 75621 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12174.mem 494 54 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2175 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12175.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2176 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12176.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2177 76260 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12177.mem 224 24 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2178 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12178.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2179 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12179.mem 2042 226 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2180 76899 10240 480 sh3_zsrt139f11091_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f12180.mem 1061 117 1 sh3_zsrt139f11091_pal.mem 0x43ece1ae +2181 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12181.mem 341 37 0 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2182 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12182.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2183 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12183.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2184 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12184.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2185 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12185.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2186 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12186.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2187 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12187.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2188 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12188.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2189 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12189.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2190 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12190.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2191 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12191.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2192 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12192.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2193 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12193.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2194 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12194.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2195 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12195.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2196 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12196.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2197 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12197.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2198 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12198.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2199 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12199.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2200 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12200.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2201 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12201.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2202 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12202.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2203 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12203.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2204 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12204.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2205 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12205.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2206 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12206.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2207 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12207.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2208 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12208.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2209 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12209.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2210 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12210.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2211 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12211.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2212 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12212.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2213 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12213.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2214 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12214.mem 548 60 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2215 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12215.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2216 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12216.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2217 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12217.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2218 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12218.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2219 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12219.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2220 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12220.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2221 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12221.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2222 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12222.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2223 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12223.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2224 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12224.mem 269 29 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2225 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12225.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2226 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12226.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2227 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12227.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2228 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12228.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2229 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12229.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2230 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12230.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2231 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12231.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2232 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12232.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2233 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12233.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2234 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12234.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2235 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12235.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2236 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12236.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2237 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12237.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2238 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12238.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2239 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12239.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2240 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12240.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2241 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12241.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2242 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12242.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2243 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12243.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2244 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12244.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2245 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12245.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2246 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12246.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2247 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12247.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2248 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12248.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2249 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12249.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2250 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12250.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2251 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12251.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2252 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12252.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2253 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12253.mem 512 56 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2254 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12254.mem 719 79 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2255 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12255.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2256 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12256.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2257 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12257.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2258 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12258.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2259 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12259.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2260 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12260.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2261 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12261.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2262 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12262.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2263 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12263.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2264 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12264.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2265 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12265.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2266 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12266.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2267 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12267.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2268 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12268.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2269 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12269.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2270 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12270.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2271 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12271.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2272 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12272.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2273 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12273.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2274 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12274.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2275 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12275.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2276 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12276.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2277 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12277.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2278 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12278.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2279 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12279.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2280 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12280.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2281 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12281.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2282 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12282.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2283 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12283.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2284 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12284.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2285 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12285.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2286 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12286.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2287 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12287.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2288 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12288.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2289 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12289.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2290 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12290.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2291 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12291.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2292 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12292.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2293 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12293.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2294 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12294.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2295 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12295.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2296 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12296.mem 836 92 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2297 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12297.mem 395 43 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2298 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12298.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2299 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12299.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2300 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12300.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2301 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12301.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2302 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12302.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2303 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12303.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2304 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12304.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2305 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12305.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2306 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12306.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2307 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12307.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2308 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12308.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2309 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12309.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2310 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12310.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2311 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12311.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2312 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12312.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2313 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12313.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2314 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12314.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2315 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12315.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2316 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12316.mem 395 43 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2317 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12317.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2318 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12318.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2319 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12319.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2320 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12320.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2321 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12321.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2322 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12322.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2323 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12323.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2324 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12324.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2325 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12325.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2326 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12326.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2327 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12327.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2328 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12328.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2329 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12329.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2330 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12330.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2331 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12331.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2332 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12332.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2333 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12333.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2334 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12334.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2335 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12335.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2336 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12336.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2337 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12337.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2338 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12338.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2339 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12339.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2340 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12340.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2341 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12341.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2342 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12342.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2343 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12343.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2344 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12344.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2345 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12345.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2346 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12346.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2347 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12347.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2348 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12348.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2349 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12349.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2350 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12350.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2351 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12351.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2352 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12352.mem 494 54 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2353 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12353.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2354 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12354.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2355 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12355.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2356 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12356.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2357 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12357.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2358 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12358.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2359 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12359.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2360 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12360.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2361 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12361.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2362 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12362.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2363 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12363.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2364 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12364.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2365 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12365.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2366 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12366.mem 710 78 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2367 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12367.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2368 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12368.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2369 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12369.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2370 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12370.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2371 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12371.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2372 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12372.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2373 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12373.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2374 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12374.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2375 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12375.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2376 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12376.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2377 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12377.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2378 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12378.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2379 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12379.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2380 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12380.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2381 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12381.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2382 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12382.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2383 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12383.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2384 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12384.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2385 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12385.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2386 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12386.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2387 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12387.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2388 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12388.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2389 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12389.mem 197 21 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2390 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12390.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2391 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12391.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2392 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12392.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2393 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12393.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2394 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12394.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2395 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12395.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2396 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12396.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2397 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12397.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2398 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12398.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2399 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12399.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2400 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12400.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2401 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12401.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2402 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12402.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2403 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12403.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2404 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12404.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2405 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12405.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2406 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12406.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2407 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12407.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2408 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12408.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2409 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12409.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2410 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12410.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2411 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12411.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2412 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12412.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2413 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12413.mem 215 23 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2414 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12414.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2415 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12415.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2416 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12416.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2417 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12417.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2418 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12418.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2419 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12419.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2420 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12420.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2421 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12421.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2422 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12422.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2423 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12423.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2424 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12424.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2425 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12425.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2426 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12426.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2427 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12427.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2428 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12428.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2429 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12429.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2430 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12430.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2431 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12431.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2432 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12432.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2433 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12433.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2434 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12434.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2435 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12435.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2436 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12436.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2437 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12437.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2438 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12438.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2439 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12439.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2440 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12440.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2441 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12441.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2442 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12442.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2443 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12443.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2444 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12444.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2445 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12445.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2446 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12446.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2447 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12447.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2448 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12448.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2449 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12449.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2450 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12450.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2451 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12451.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2452 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12452.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2453 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12453.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2454 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12454.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2455 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12455.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2456 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12456.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2457 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12457.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2458 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12458.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2459 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12459.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2460 77614 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12460.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2461 78319 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12461.mem 1880 208 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2462 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12462.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2463 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12463.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2464 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12464.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2465 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12465.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2466 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12466.mem 449 49 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2467 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12467.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2468 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12468.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2469 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12469.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2470 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12470.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2471 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12471.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2472 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12472.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2473 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12473.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2474 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12474.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2475 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12475.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2476 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12476.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2477 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12477.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2478 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12478.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2479 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12479.mem 440 48 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2480 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12480.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2481 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12481.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2482 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12482.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2483 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12483.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2484 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12484.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2485 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12485.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2486 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12486.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2487 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12487.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2488 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12488.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2489 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12489.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2490 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12490.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2491 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12491.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2492 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12492.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2493 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12493.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2494 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12494.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2495 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12495.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2496 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12496.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2497 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12497.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2498 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12498.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2499 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12499.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2500 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12500.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2501 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12501.mem 638 70 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2502 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12502.mem 746 82 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2503 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12503.mem 305 33 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2504 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12504.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2505 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12505.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2506 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12506.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2507 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12507.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2508 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12508.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2509 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12509.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2510 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12510.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2511 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12511.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2512 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12512.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2513 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12513.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2514 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12514.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2515 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12515.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2516 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12516.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2517 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12517.mem 620 68 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2518 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12518.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2519 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12519.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2520 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12520.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2521 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12521.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2522 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12522.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2523 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12523.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2524 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12524.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2525 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12525.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2526 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12526.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2527 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12527.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2528 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12528.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2529 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12529.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2530 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12530.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2531 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12531.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2532 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12532.mem 323 35 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2533 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12533.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2534 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12534.mem 377 41 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2535 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12535.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2536 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12536.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2537 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12537.mem 863 95 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2538 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12538.mem 404 44 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2539 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12539.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2540 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12540.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2541 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12541.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2542 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12542.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2543 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12543.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2544 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12544.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2545 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12545.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2546 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12546.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2547 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12547.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2548 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12548.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2549 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12549.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2550 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12550.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2551 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12551.mem 224 24 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2552 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12552.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2553 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12553.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2554 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12554.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2555 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12555.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2556 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12556.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2557 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12557.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2558 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12558.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2559 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12559.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2560 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12560.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2561 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12561.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2562 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12562.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2563 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12563.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2564 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12564.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2565 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12565.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2566 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12566.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2567 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12567.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2568 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12568.mem 350 38 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2569 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12569.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2570 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12570.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2571 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12571.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2572 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12572.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2573 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12573.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2574 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12574.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2575 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12575.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2576 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12576.mem 449 49 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2577 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12577.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2578 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12578.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2579 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12579.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2580 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12580.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2581 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12581.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2582 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12582.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2583 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12583.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2584 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12584.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2585 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12585.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2586 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12586.mem 188 20 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2587 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12587.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2588 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12588.mem 350 38 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2589 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12589.mem 143 15 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2590 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12590.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2591 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12591.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2592 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12592.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2593 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12593.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2594 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12594.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2595 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12595.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2596 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12596.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2597 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12597.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2598 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12598.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2599 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12599.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2600 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12600.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2601 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12601.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2602 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12602.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2603 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12603.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2604 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12604.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2605 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12605.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2606 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12606.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2607 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12607.mem 368 40 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2608 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12608.mem 296 32 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2609 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12609.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2610 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12610.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2611 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12611.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2612 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12612.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2613 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12613.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2614 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12614.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2615 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12615.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2616 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12616.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2617 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12617.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2618 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12618.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2619 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12619.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2620 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12620.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2621 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12621.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2622 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12622.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2623 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12623.mem 251 27 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2624 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12624.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2625 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12625.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2626 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12626.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2627 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12627.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2628 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12628.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2629 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12629.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2630 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12630.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2631 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12631.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2632 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12632.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2633 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12633.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2634 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12634.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2635 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12635.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2636 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12636.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2637 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12637.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2638 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12638.mem 422 46 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2639 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12639.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2640 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12640.mem 332 36 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2641 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12641.mem 179 19 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2642 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12642.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2643 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12643.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2644 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12644.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2645 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12645.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2646 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12646.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2647 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12647.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2648 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12648.mem 242 26 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2649 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12649.mem 287 31 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2650 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12650.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2651 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12651.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2652 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12652.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2653 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12653.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2654 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12654.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2655 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12655.mem 116 12 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2656 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12656.mem 296 32 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2657 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12657.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2658 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12658.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2659 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12659.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2660 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12660.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2661 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12661.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2662 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12662.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2663 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12663.mem 125 13 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2664 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12664.mem 440 48 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2665 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12665.mem 224 24 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2666 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12666.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2667 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12667.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2668 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12668.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2669 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12669.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2670 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12670.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2671 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12671.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2672 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12672.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2673 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12673.mem 935 103 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2674 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12674.mem 152 16 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2675 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12675.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2676 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12676.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2677 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12677.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2678 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12678.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2679 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12679.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2680 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12680.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2681 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12681.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2682 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12682.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2683 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12683.mem 386 42 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2684 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12684.mem 377 41 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2685 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12685.mem 206 22 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2686 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12686.mem 566 62 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2687 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12687.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2688 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12688.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2689 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12689.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2690 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12690.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2691 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12691.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2692 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12692.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2693 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12693.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2694 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12694.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2695 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12695.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2696 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12696.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2697 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12697.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2698 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12698.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2699 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12699.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2700 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12700.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2701 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12701.mem 107 11 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2702 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12702.mem 512 56 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2703 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12703.mem 431 47 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2704 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12704.mem 422 46 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2705 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12705.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2706 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12706.mem 161 17 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2707 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12707.mem 413 45 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2708 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12708.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2709 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12709.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2710 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12710.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2711 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12711.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2712 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12712.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2713 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12713.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2714 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12714.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2715 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12715.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2716 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12716.mem 134 14 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2717 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12717.mem 233 25 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2718 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12718.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2719 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12719.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2720 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12720.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2721 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12721.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2722 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12722.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2723 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12723.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2724 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12724.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2725 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12725.mem 35 3 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2726 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12726.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2727 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12727.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2728 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12728.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2729 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12729.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2730 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12730.mem 80 8 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2731 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12731.mem 98 10 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2732 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12732.mem 260 28 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2733 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12733.mem 170 18 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2734 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12734.mem 89 9 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2735 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12735.mem 71 7 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2736 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12736.mem 62 6 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2737 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12737.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2738 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12738.mem 53 5 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2739 78949 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12739.mem 44 4 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2740 79606 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12740.mem 368 40 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2741 80167 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12741.mem 575 63 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2742 82720 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12742.mem 1736 192 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2743 83323 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12743.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2744 83323 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12744.mem 1349 149 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2745 83944 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12745.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2746 83944 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12746.mem 665 73 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2747 84565 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12747.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2748 84565 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12748.mem 1214 134 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2749 85186 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12749.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2750 85186 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12750.mem 485 53 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2751 85807 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12751.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2752 85807 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12752.mem 1754 194 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2753 86428 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12753.mem 1826 202 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2754 87049 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12754.mem 1412 156 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2755 88918 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12755.mem 1484 164 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2756 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12756.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2757 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12757.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2758 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12758.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2759 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12759.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2760 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12760.mem 818 90 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2761 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12761.mem 1664 184 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2762 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12762.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2763 89548 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12763.mem 1223 135 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2764 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12764.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2765 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12765.mem 1880 208 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2766 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12766.mem 1061 117 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2767 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12767.mem 935 103 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2768 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12768.mem 2042 226 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2769 90187 9216 480 sh3_zsrt139f12181_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12769.mem 1538 170 1 sh3_zsrt139f12181_pal.mem 0x5dfce0a2 +2770 91678 9216 480 sh3_zsrt139f12770_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f12770.mem 449 49 0 sh3_zsrt139f12770_pal.mem 0x181b2ac2 +2771 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12771.mem 98 10 0 sh3_zsrt139f12771_pal.mem 0x47097d4c +2772 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12772.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2773 91931 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12773.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2774 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12774.mem 593 65 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2775 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12775.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2776 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12776.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2777 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12777.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2778 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12778.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2779 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12779.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2780 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12780.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2781 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12781.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2782 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12782.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2783 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12783.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2784 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12784.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2785 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12785.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2786 93209 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12786.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2787 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12787.mem 503 55 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2788 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12788.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2789 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12789.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2790 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12790.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2791 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12791.mem 620 68 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2792 94274 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12792.mem 287 31 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2793 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12793.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2794 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12794.mem 242 26 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2795 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12795.mem 269 29 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2796 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12796.mem 719 79 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2797 99554 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12797.mem 296 32 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2798 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12798.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2799 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12799.mem 764 84 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2800 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12800.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2801 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12801.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2802 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12802.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2803 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12803.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2804 100127 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12804.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2805 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12805.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2806 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12806.mem 368 40 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2807 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12807.mem 710 78 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2808 100766 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12808.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2809 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12809.mem 548 60 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2810 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12810.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2811 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12811.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2812 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12812.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2813 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12813.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2814 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12814.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2815 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12815.mem 611 67 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2816 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12816.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2817 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12817.mem 323 35 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2818 101405 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12818.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2819 102065 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12819.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2820 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12820.mem 1286 142 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2821 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12821.mem 1259 139 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2822 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12822.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2823 103373 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12823.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2824 104012 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12824.mem 1223 135 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2825 104012 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12825.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2826 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12826.mem 1151 127 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2827 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12827.mem 1106 122 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2828 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12828.mem 143 15 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2829 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12829.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2830 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12830.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2831 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12831.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2832 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12832.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2833 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12833.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2834 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12834.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2835 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12835.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2836 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12836.mem 575 63 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2837 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12837.mem 854 94 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2838 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12838.mem 989 109 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2839 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12839.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2840 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12840.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2841 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12841.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2842 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12842.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2843 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12843.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2844 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12844.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2845 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12845.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2846 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12846.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2847 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12847.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2848 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12848.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2849 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12849.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2850 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12850.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2851 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12851.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2852 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12852.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2853 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12853.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2854 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12854.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2855 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12855.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2856 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12856.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2857 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12857.mem 242 26 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2858 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12858.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2859 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12859.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2860 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12860.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2861 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12861.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2862 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12862.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2863 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12863.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2864 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12864.mem 206 22 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2865 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12865.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2866 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12866.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2867 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12867.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2868 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12868.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2869 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12869.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2870 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12870.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2871 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12871.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2872 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12872.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2873 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12873.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2874 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12874.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2875 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12875.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2876 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12876.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2877 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12877.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2878 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12878.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2879 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12879.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2880 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12880.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2881 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12881.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2882 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12882.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2883 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12883.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2884 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12884.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2885 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12885.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2886 106142 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12886.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2887 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12887.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2888 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12888.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2889 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12889.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2890 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12890.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2891 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12891.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2892 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12892.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2893 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12893.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2894 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12894.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2895 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12895.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2896 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12896.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2897 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12897.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2898 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12898.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2899 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12899.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2900 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12900.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2901 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12901.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2902 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12902.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2903 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12903.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2904 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12904.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2905 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12905.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2906 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12906.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2907 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12907.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2908 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12908.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2909 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12909.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2910 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12910.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2911 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12911.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2912 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12912.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2913 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12913.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2914 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12914.mem 134 14 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2915 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12915.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2916 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12916.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2917 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12917.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2918 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12918.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2919 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12919.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2920 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12920.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2921 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12921.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2922 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12922.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2923 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12923.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2924 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12924.mem 152 16 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2925 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12925.mem 170 18 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2926 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12926.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2927 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12927.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2928 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12928.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2929 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12929.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2930 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12930.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2931 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12931.mem 602 66 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2932 108698 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12932.mem 305 33 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2933 112475 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12933.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2934 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12934.mem 449 49 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2935 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12935.mem 521 57 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2936 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12936.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2937 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12937.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2938 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12938.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2939 113153 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12939.mem 107 11 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2940 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12940.mem 584 64 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2941 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12941.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2942 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12942.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2943 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12943.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2944 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12944.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2945 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12945.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2946 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12946.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2947 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12947.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2948 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12948.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2949 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12949.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2950 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12950.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2951 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12951.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2952 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12952.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2953 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12953.mem 404 44 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2954 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12954.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2955 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12955.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2956 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12956.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2957 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12957.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2958 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12958.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2959 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12959.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2960 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12960.mem 179 19 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2961 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12961.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2962 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12962.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2963 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12963.mem 539 59 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2964 113792 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12964.mem 17 1 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2965 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12965.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2966 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12966.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2967 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12967.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2968 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12968.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2969 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12969.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2970 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12970.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2971 114431 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12971.mem 314 34 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2972 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12972.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2973 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12973.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2974 115016 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12974.mem 2015 223 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2975 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12975.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2976 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12976.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2977 115655 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12977.mem 1601 177 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2978 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12978.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2979 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12979.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2980 116351 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12980.mem 620 68 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2981 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12981.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2982 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12982.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2983 117050 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12983.mem 998 110 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2984 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12984.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2985 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12985.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2986 117599 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12986.mem 1646 182 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2987 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12987.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2988 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12988.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2989 118238 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12989.mem 1322 146 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2990 118877 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12990.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2991 118877 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12991.mem 935 103 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2992 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12992.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2993 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12993.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2994 119471 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12994.mem 1718 190 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2995 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12995.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2996 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12996.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2997 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12997.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2998 120110 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12998.mem 2033 225 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +2999 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f12999.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3000 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13000.mem 1286 142 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3001 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13001.mem 1961 217 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3002 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13002.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3003 120749 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13003.mem 1025 113 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3004 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13004.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3005 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13005.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3006 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13006.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3007 121388 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13007.mem 557 61 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3008 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13008.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3009 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13009.mem 2033 225 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3010 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13010.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3011 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13011.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3012 122027 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13012.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3013 122600 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13013.mem 1745 193 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3014 122600 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13014.mem 944 104 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3015 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13015.mem 917 101 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3016 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13016.mem 1970 218 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3017 123239 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13017.mem 386 42 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3018 123869 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13018.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3019 123869 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13019.mem 206 22 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3020 124508 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13020.mem 989 109 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3021 125147 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13021.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3022 125786 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13022.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3023 125786 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13023.mem 557 61 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3024 126434 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13024.mem 1124 124 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3025 126968 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13025.mem 1925 213 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3026 127607 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13026.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3027 127607 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13027.mem 665 73 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3028 128246 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13028.mem 1394 154 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3029 128885 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13029.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3030 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13030.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3031 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13031.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3032 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13032.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3033 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13033.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3034 129389 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13034.mem 1079 119 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3035 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13035.mem 1457 161 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3036 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13036.mem 1673 185 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3037 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13037.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3038 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13038.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3039 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13039.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3040 130028 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13040.mem 377 41 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3041 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13041.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3042 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13042.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3043 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13043.mem 1475 163 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3044 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13044.mem 1178 130 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3045 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13045.mem 1358 150 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3046 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13046.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3047 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13047.mem 1394 154 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3048 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13048.mem 521 57 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3049 130667 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13049.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3050 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13050.mem 656 72 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3051 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13051.mem 728 80 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3052 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13052.mem 584 64 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3053 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13053.mem 395 43 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3054 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13054.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3055 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13055.mem 566 62 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3056 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13056.mem 656 72 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3057 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13057.mem 764 84 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3058 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13058.mem 251 27 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3059 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13059.mem 350 38 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3060 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13060.mem 1925 213 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3061 131306 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13061.mem 1241 137 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3062 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13062.mem 1484 164 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3063 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13063.mem 2042 226 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3064 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13064.mem 1673 185 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3065 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13065.mem 1214 134 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3066 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13066.mem 1682 186 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3067 131945 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13067.mem 1637 181 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3068 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13068.mem 1880 208 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3069 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13069.mem 1358 150 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3070 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13070.mem 971 107 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3071 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13071.mem 485 53 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3072 132584 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13072.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3073 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13073.mem 170 18 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3074 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13074.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3075 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13075.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3076 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13076.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3077 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13077.mem 161 17 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3078 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13078.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3079 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13079.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3080 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13080.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3081 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13081.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3082 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13082.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3083 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13083.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3084 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13084.mem 431 47 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3085 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13085.mem 827 91 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3086 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13086.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3087 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13087.mem 125 13 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3088 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13088.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3089 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13089.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3090 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13090.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3091 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13091.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3092 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13092.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3093 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13093.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3094 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13094.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3095 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13095.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3096 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13096.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3097 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13097.mem 89 9 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3098 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13098.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3099 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13099.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3100 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13100.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3101 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13101.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3102 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13102.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3103 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13103.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3104 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13104.mem 359 39 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3105 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13105.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3106 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13106.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3107 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13107.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3108 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13108.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3109 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13109.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3110 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13110.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3111 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13111.mem 116 12 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3112 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13112.mem 260 28 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3113 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13113.mem 98 10 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3114 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13114.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3115 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13115.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3116 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13116.mem 53 5 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3117 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13117.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3118 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13118.mem 44 4 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3119 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13119.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3120 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13120.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3121 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13121.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3122 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13122.mem 233 25 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3123 133688 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13123.mem 530 58 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3124 135656 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13124.mem 35 3 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3125 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13125.mem 674 74 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3126 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13126.mem 1016 112 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3127 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13127.mem 539 59 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3128 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13128.mem 71 7 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3129 139565 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13129.mem 80 8 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3130 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13130.mem 224 24 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3131 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13131.mem 800 88 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3132 142718 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13132.mem 62 6 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3133 143357 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13133.mem 548 60 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3134 143996 8192 480 sh3_zsrt139f12771_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f13134.mem 512 56 1 sh3_zsrt139f12771_pal.mem 0x47097d4c +3135 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13135.mem 566 62 0 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3136 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13136.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3137 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13137.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3138 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13138.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3139 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13139.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3140 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13140.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3141 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13141.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3142 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13142.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3143 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13143.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3144 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13144.mem 206 22 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3145 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13145.mem 161 17 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3146 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13146.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3147 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13147.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3148 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13148.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3149 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13149.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3150 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13150.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3151 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13151.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3152 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13152.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3153 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13153.mem 107 11 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3154 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13154.mem 125 13 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3155 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13155.mem 80 8 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3156 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13156.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3157 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13157.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3158 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13158.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3159 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13159.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3160 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13160.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3161 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13161.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3162 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13162.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3163 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13163.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3164 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13164.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3165 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13165.mem 35 3 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3166 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13166.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3167 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13167.mem 44 4 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3168 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13168.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3169 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13169.mem 53 5 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3170 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13170.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3171 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13171.mem 89 9 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3172 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13172.mem 557 61 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3173 144890 12288 480 sh3_zsrt139f13135_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f13173.mem 62 6 1 sh3_zsrt139f13135_pal.mem 0x3e849a98 +3174 146205 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13174.mem 1367 151 0 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3175 146630 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13175.mem 1214 134 1 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3176 147068 11264 480 sh3_zsrt139f13174_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13176.mem 1322 146 1 sh3_zsrt139f13174_pal.mem 0xfd978fd9 +3177 147480 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13177.mem 1430 158 0 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3178 147888 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13178.mem 2042 226 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3179 147888 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13179.mem 296 32 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3180 148264 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13180.mem 2042 226 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3181 148264 11264 480 sh3_zsrt139f13177_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13181.mem 935 103 1 sh3_zsrt139f13177_pal.mem 0xd5ed05ff +3182 148919 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13182.mem 2042 226 0 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3183 148919 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13183.mem 44 4 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3184 149509 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13184.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3185 149509 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13185.mem 431 47 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3186 150125 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13186.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3187 150125 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13187.mem 215 23 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3188 150741 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13188.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3189 150741 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13189.mem 386 42 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3190 151344 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13190.mem 2042 226 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3191 151344 11264 480 sh3_zsrt139f13182_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13191.mem 296 32 1 sh3_zsrt139f13182_pal.mem 0xcdf8a4d8 +3192 152021 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13192.mem 692 76 0 sh3_zsrt139f13192_pal.mem 0xc6784386 +3193 152420 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13193.mem 917 101 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3194 152806 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13194.mem 926 102 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3195 153218 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13195.mem 566 62 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3196 153643 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13196.mem 881 97 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3197 154029 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13197.mem 863 95 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3198 154428 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13198.mem 809 89 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3199 154853 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13199.mem 863 95 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3200 155265 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13200.mem 791 87 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3201 155664 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13201.mem 764 84 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3202 156063 11264 480 sh3_zsrt139f13192_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f13202.mem 674 74 1 sh3_zsrt139f13192_pal.mem 0xc6784386 +3203 156566 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13203.mem 2042 226 0 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3204 156566 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13204.mem 602 66 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3205 157273 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13205.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3206 157273 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13206.mem 773 85 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3207 157967 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13207.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3208 157967 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13208.mem 539 59 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3209 158674 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13209.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3210 158674 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13210.mem 755 83 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3211 159420 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13211.mem 2042 226 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3212 159420 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13212.mem 611 67 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3213 160114 10240 480 sh3_zsrt139f13203_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13213.mem 413 45 1 sh3_zsrt139f13203_pal.mem 0x00fd9028 +3214 160331 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13214.mem 1097 121 0 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3215 160769 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13215.mem 971 107 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3216 161168 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13216.mem 935 103 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3217 161567 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13217.mem 1412 156 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3218 162300 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13218.mem 962 106 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3219 162725 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13219.mem 818 90 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3220 163163 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13220.mem 638 70 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3221 163575 10240 480 sh3_zsrt139f13214_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13221.mem 971 107 1 sh3_zsrt139f13214_pal.mem 0xd8d19684 +3222 164204 10240 480 sh3_zsrt139f13222_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13222.mem 1745 193 0 sh3_zsrt139f13222_pal.mem 0xaa4e7e05 +3223 164950 10240 480 sh3_zsrt139f13222_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f13223.mem 836 92 1 sh3_zsrt139f13222_pal.mem 0xaa4e7e05 +3224 175995 12288 480 sh3_zsrt139f13224_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f13224.mem 746 82 0 sh3_zsrt139f13224_pal.mem 0x56ebf1d1 +3225 176446 12288 480 sh3_zsrt139f13224_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f13225.mem 926 102 1 sh3_zsrt139f13224_pal.mem 0x56ebf1d1 +3226 196494 10240 480 sh3_zsrt139d675_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d675.mem 17 1 0 sh3_zsrt139d675_pal.mem 0x158afe76 +3227 196494 10240 480 sh3_zsrt139d676_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d676.mem 17 1 1 sh3_zsrt139d676_pal.mem 0x158afe76 +3228 196494 10240 480 sh3_zsrt139d677_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d677.mem 17 1 1 sh3_zsrt139d677_pal.mem 0x158afe76 +3229 196494 10240 480 sh3_zsrt139d678_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d678.mem 17 1 1 sh3_zsrt139d678_pal.mem 0x158afe76 +3230 196494 10240 480 sh3_zsrt139d679_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d679.mem 17 1 1 sh3_zsrt139d679_pal.mem 0x158afe76 +3231 196494 10240 480 sh3_zsrt139d680_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d680.mem 17 1 1 sh3_zsrt139d680_pal.mem 0x158afe76 +3232 196494 10240 480 sh3_zsrt139d681_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d681.mem 17 1 1 sh3_zsrt139d681_pal.mem 0x158afe76 +3233 196494 10240 480 sh3_zsrt139d682_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d682.mem 17 1 1 sh3_zsrt139d682_pal.mem 0x158afe76 +3234 196494 10240 480 sh3_zsrt139d683_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d683.mem 17 1 1 sh3_zsrt139d683_pal.mem 0x158afe76 +3235 196494 10240 480 sh3_zsrt139d684_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d684.mem 17 1 1 sh3_zsrt139d684_pal.mem 0x158afe76 +3236 196494 10240 480 sh3_zsrt139d685_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d685.mem 17 1 1 sh3_zsrt139d685_pal.mem 0x158afe76 +3237 196494 10240 480 sh3_zsrt139d686_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d686.mem 17 1 1 sh3_zsrt139d686_pal.mem 0x158afe76 +3238 196494 10240 480 sh3_zsrt139d687_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d687.mem 17 1 1 sh3_zsrt139d687_pal.mem 0x158afe76 +3239 196494 10240 480 sh3_zsrt139d688_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d688.mem 17 1 1 sh3_zsrt139d688_pal.mem 0x158afe76 +3240 196494 10240 480 sh3_zsrt139d689_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d689.mem 17 1 1 sh3_zsrt139d689_pal.mem 0x158afe76 +3241 196494 10240 480 sh3_zsrt139d690_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d690.mem 17 1 1 sh3_zsrt139d690_pal.mem 0x158afe76 +3242 196494 10240 480 sh3_zsrt139d691_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d691.mem 17 1 1 sh3_zsrt139d691_pal.mem 0x158afe76 +3243 196494 10240 480 sh3_zsrt139d692_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d692.mem 17 1 1 sh3_zsrt139d692_pal.mem 0x158afe76 +3244 196494 10240 480 sh3_zsrt139d693_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d693.mem 17 1 1 sh3_zsrt139d693_pal.mem 0x158afe76 +3245 196494 10240 480 sh3_zsrt139d694_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d694.mem 17 1 1 sh3_zsrt139d694_pal.mem 0x158afe76 +3246 196494 10240 480 sh3_zsrt139d695_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d695.mem 17 1 1 sh3_zsrt139d695_pal.mem 0x158afe76 +3247 196494 10240 480 sh3_zsrt139d696_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d696.mem 17 1 1 sh3_zsrt139d696_pal.mem 0x158afe76 +3248 196494 10240 480 sh3_zsrt139d697_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d697.mem 17 1 1 sh3_zsrt139d697_pal.mem 0x158afe76 +3249 196494 10240 480 sh3_zsrt139d698_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d698.mem 17 1 1 sh3_zsrt139d698_pal.mem 0x158afe76 +3250 196494 10240 480 sh3_zsrt139d699_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d699.mem 17 1 1 sh3_zsrt139d699_pal.mem 0x158afe76 +3251 196494 10240 480 sh3_zsrt139d6100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6100.mem 17 1 1 sh3_zsrt139d6100_pal.mem 0x158afe76 +3252 196494 10240 480 sh3_zsrt139d6101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6101.mem 17 1 1 sh3_zsrt139d6101_pal.mem 0x158afe76 +3253 196494 10240 480 sh3_zsrt139d6102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6102.mem 17 1 1 sh3_zsrt139d6102_pal.mem 0x158afe76 +3254 196494 10240 480 sh3_zsrt139d6103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6103.mem 17 1 1 sh3_zsrt139d6103_pal.mem 0x158afe76 +3255 196494 10240 480 sh3_zsrt139d6104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6104.mem 17 1 1 sh3_zsrt139d6104_pal.mem 0x158afe76 +3256 196494 10240 480 sh3_zsrt139d6105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6105.mem 17 1 1 sh3_zsrt139d6105_pal.mem 0x158afe76 +3257 196494 10240 480 sh3_zsrt139d6106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6106.mem 17 1 1 sh3_zsrt139d6106_pal.mem 0x158afe76 +3258 196494 10240 480 sh3_zsrt139d6107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6107.mem 17 1 1 sh3_zsrt139d6107_pal.mem 0x158afe76 +3259 196494 10240 480 sh3_zsrt139d6108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6108.mem 17 1 1 sh3_zsrt139d6108_pal.mem 0x158afe76 +3260 196494 10240 480 sh3_zsrt139d6109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6109.mem 17 1 1 sh3_zsrt139d6109_pal.mem 0x158afe76 +3261 196494 10240 480 sh3_zsrt139d6110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6110.mem 17 1 1 sh3_zsrt139d6110_pal.mem 0x158afe76 +3262 196494 10240 480 sh3_zsrt139d6111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6111.mem 17 1 1 sh3_zsrt139d6111_pal.mem 0x158afe76 +3263 196494 10240 480 sh3_zsrt139d6112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6112.mem 17 1 1 sh3_zsrt139d6112_pal.mem 0x158afe76 +3264 196494 10240 480 sh3_zsrt139d6113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6113.mem 17 1 1 sh3_zsrt139d6113_pal.mem 0x158afe76 +3265 196494 10240 480 sh3_zsrt139d6114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6114.mem 17 1 1 sh3_zsrt139d6114_pal.mem 0x158afe76 +3266 196494 10240 480 sh3_zsrt139d6115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6115.mem 17 1 1 sh3_zsrt139d6115_pal.mem 0x158afe76 +3267 196494 10240 480 sh3_zsrt139d6116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6116.mem 17 1 1 sh3_zsrt139d6116_pal.mem 0x158afe76 +3268 196494 10240 480 sh3_zsrt139d6117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6117.mem 17 1 1 sh3_zsrt139d6117_pal.mem 0x158afe76 +3269 196494 10240 480 sh3_zsrt139d6118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6118.mem 17 1 1 sh3_zsrt139d6118_pal.mem 0x158afe76 +3270 196494 10240 480 sh3_zsrt139d6119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6119.mem 17 1 1 sh3_zsrt139d6119_pal.mem 0x158afe76 +3271 196494 10240 480 sh3_zsrt139d6120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6120.mem 17 1 1 sh3_zsrt139d6120_pal.mem 0x158afe76 +3272 196494 10240 480 sh3_zsrt139d6121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6121.mem 17 1 1 sh3_zsrt139d6121_pal.mem 0x158afe76 +3273 196494 10240 480 sh3_zsrt139d6122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6122.mem 17 1 1 sh3_zsrt139d6122_pal.mem 0x158afe76 +3274 196494 10240 480 sh3_zsrt139d6123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6123.mem 17 1 1 sh3_zsrt139d6123_pal.mem 0x158afe76 +3275 196494 10240 480 sh3_zsrt139d6124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6124.mem 17 1 1 sh3_zsrt139d6124_pal.mem 0x158afe76 +3276 196494 10240 480 sh3_zsrt139d6125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6125.mem 17 1 1 sh3_zsrt139d6125_pal.mem 0x158afe76 +3277 196494 10240 480 sh3_zsrt139d6126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6126.mem 17 1 1 sh3_zsrt139d6126_pal.mem 0x158afe76 +3278 196494 10240 480 sh3_zsrt139d6127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6127.mem 17 1 1 sh3_zsrt139d6127_pal.mem 0x158afe76 +3279 196494 10240 480 sh3_zsrt139d6128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6128.mem 17 1 1 sh3_zsrt139d6128_pal.mem 0x158afe76 +3280 196494 10240 480 sh3_zsrt139d6129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6129.mem 17 1 1 sh3_zsrt139d6129_pal.mem 0x158afe76 +3281 196494 10240 480 sh3_zsrt139d6130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6130.mem 17 1 1 sh3_zsrt139d6130_pal.mem 0x158afe76 +3282 196494 10240 480 sh3_zsrt139d6131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6131.mem 17 1 1 sh3_zsrt139d6131_pal.mem 0x158afe76 +3283 196494 10240 480 sh3_zsrt139d6132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6132.mem 17 1 1 sh3_zsrt139d6132_pal.mem 0x158afe76 +3284 196494 10240 480 sh3_zsrt139d6133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6133.mem 17 1 1 sh3_zsrt139d6133_pal.mem 0x158afe76 +3285 196494 10240 480 sh3_zsrt139d6134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6134.mem 17 1 1 sh3_zsrt139d6134_pal.mem 0x158afe76 +3286 196494 10240 480 sh3_zsrt139d6135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6135.mem 17 1 1 sh3_zsrt139d6135_pal.mem 0x158afe76 +3287 196494 10240 480 sh3_zsrt139d6136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6136.mem 17 1 1 sh3_zsrt139d6136_pal.mem 0x158afe76 +3288 196494 10240 480 sh3_zsrt139d6137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6137.mem 17 1 1 sh3_zsrt139d6137_pal.mem 0x158afe76 +3289 196494 10240 480 sh3_zsrt139d6138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6138.mem 17 1 1 sh3_zsrt139d6138_pal.mem 0x158afe76 +3290 196494 10240 480 sh3_zsrt139d6139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6139.mem 17 1 1 sh3_zsrt139d6139_pal.mem 0x158afe76 +3291 196494 10240 480 sh3_zsrt139d6140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6140.mem 17 1 1 sh3_zsrt139d6140_pal.mem 0x158afe76 +3292 196494 10240 480 sh3_zsrt139d6141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6141.mem 17 1 1 sh3_zsrt139d6141_pal.mem 0x158afe76 +3293 196494 10240 480 sh3_zsrt139d6142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6142.mem 17 1 1 sh3_zsrt139d6142_pal.mem 0x158afe76 +3294 196494 10240 480 sh3_zsrt139d6143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6143.mem 17 1 1 sh3_zsrt139d6143_pal.mem 0x158afe76 +3295 196494 10240 480 sh3_zsrt139d6144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6144.mem 17 1 1 sh3_zsrt139d6144_pal.mem 0x158afe76 +3296 196494 10240 480 sh3_zsrt139d6145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6145.mem 17 1 1 sh3_zsrt139d6145_pal.mem 0x158afe76 +3297 196494 10240 480 sh3_zsrt139d6146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6146.mem 17 1 1 sh3_zsrt139d6146_pal.mem 0x158afe76 +3298 196868 10240 480 sh3_zsrt139d6147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6147.mem 17 1 1 sh3_zsrt139d6147_pal.mem 0x158afe76 +3299 196868 10240 480 sh3_zsrt139d6148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6148.mem 17 1 1 sh3_zsrt139d6148_pal.mem 0x158afe76 +3300 196868 10240 480 sh3_zsrt139d6149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6149.mem 17 1 1 sh3_zsrt139d6149_pal.mem 0x158afe76 +3301 196868 10240 480 sh3_zsrt139d6150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6150.mem 17 1 1 sh3_zsrt139d6150_pal.mem 0x158afe76 +3302 196868 10240 480 sh3_zsrt139d6151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6151.mem 17 1 1 sh3_zsrt139d6151_pal.mem 0x158afe76 +3303 196868 10240 480 sh3_zsrt139d6152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6152.mem 17 1 1 sh3_zsrt139d6152_pal.mem 0x158afe76 +3304 196868 10240 480 sh3_zsrt139d6153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6153.mem 17 1 1 sh3_zsrt139d6153_pal.mem 0x158afe76 +3305 196868 10240 480 sh3_zsrt139d6154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6154.mem 17 1 1 sh3_zsrt139d6154_pal.mem 0x158afe76 +3306 196868 10240 480 sh3_zsrt139d6155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6155.mem 17 1 1 sh3_zsrt139d6155_pal.mem 0x158afe76 +3307 196868 10240 480 sh3_zsrt139d6156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6156.mem 17 1 1 sh3_zsrt139d6156_pal.mem 0x158afe76 +3308 196868 10240 480 sh3_zsrt139d6157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6157.mem 17 1 1 sh3_zsrt139d6157_pal.mem 0x158afe76 +3309 196868 10240 480 sh3_zsrt139d6158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6158.mem 17 1 1 sh3_zsrt139d6158_pal.mem 0x158afe76 +3310 196868 10240 480 sh3_zsrt139d6159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6159.mem 17 1 1 sh3_zsrt139d6159_pal.mem 0x158afe76 +3311 196868 10240 480 sh3_zsrt139d6160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6160.mem 17 1 1 sh3_zsrt139d6160_pal.mem 0x158afe76 +3312 196868 10240 480 sh3_zsrt139d6161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6161.mem 17 1 1 sh3_zsrt139d6161_pal.mem 0x158afe76 +3313 196868 10240 480 sh3_zsrt139d6162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6162.mem 17 1 1 sh3_zsrt139d6162_pal.mem 0x158afe76 +3314 196868 10240 480 sh3_zsrt139d6163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6163.mem 17 1 1 sh3_zsrt139d6163_pal.mem 0x158afe76 +3315 196868 10240 480 sh3_zsrt139d6164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6164.mem 17 1 1 sh3_zsrt139d6164_pal.mem 0x158afe76 +3316 196868 10240 480 sh3_zsrt139d6165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6165.mem 17 1 1 sh3_zsrt139d6165_pal.mem 0x158afe76 +3317 196868 10240 480 sh3_zsrt139d6166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6166.mem 17 1 1 sh3_zsrt139d6166_pal.mem 0x158afe76 +3318 196868 10240 480 sh3_zsrt139d6167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6167.mem 17 1 1 sh3_zsrt139d6167_pal.mem 0x158afe76 +3319 196868 10240 480 sh3_zsrt139d6168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6168.mem 17 1 1 sh3_zsrt139d6168_pal.mem 0x158afe76 +3320 196868 10240 480 sh3_zsrt139d6169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6169.mem 17 1 1 sh3_zsrt139d6169_pal.mem 0x158afe76 +3321 196868 10240 480 sh3_zsrt139d6170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6170.mem 17 1 1 sh3_zsrt139d6170_pal.mem 0x158afe76 +3322 196868 10240 480 sh3_zsrt139d6171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6171.mem 17 1 1 sh3_zsrt139d6171_pal.mem 0x158afe76 +3323 196868 10240 480 sh3_zsrt139d6172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6172.mem 17 1 1 sh3_zsrt139d6172_pal.mem 0x158afe76 +3324 196868 10240 480 sh3_zsrt139d6173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6173.mem 17 1 1 sh3_zsrt139d6173_pal.mem 0x158afe76 +3325 196868 10240 480 sh3_zsrt139d6174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6174.mem 17 1 1 sh3_zsrt139d6174_pal.mem 0x158afe76 +3326 196868 10240 480 sh3_zsrt139d6175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6175.mem 17 1 1 sh3_zsrt139d6175_pal.mem 0x158afe76 +3327 196868 10240 480 sh3_zsrt139d6176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6176.mem 17 1 1 sh3_zsrt139d6176_pal.mem 0x158afe76 +3328 196868 10240 480 sh3_zsrt139d6177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6177.mem 17 1 1 sh3_zsrt139d6177_pal.mem 0x158afe76 +3329 196868 10240 480 sh3_zsrt139d6178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6178.mem 17 1 1 sh3_zsrt139d6178_pal.mem 0x158afe76 +3330 196868 10240 480 sh3_zsrt139d6179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6179.mem 17 1 1 sh3_zsrt139d6179_pal.mem 0x158afe76 +3331 196868 10240 480 sh3_zsrt139d6180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6180.mem 17 1 1 sh3_zsrt139d6180_pal.mem 0x158afe76 +3332 196868 10240 480 sh3_zsrt139d6181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6181.mem 17 1 1 sh3_zsrt139d6181_pal.mem 0x158afe76 +3333 196868 10240 480 sh3_zsrt139d6182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6182.mem 17 1 1 sh3_zsrt139d6182_pal.mem 0x158afe76 +3334 196868 10240 480 sh3_zsrt139d6183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6183.mem 17 1 1 sh3_zsrt139d6183_pal.mem 0x158afe76 +3335 196868 10240 480 sh3_zsrt139d6184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6184.mem 17 1 1 sh3_zsrt139d6184_pal.mem 0x158afe76 +3336 196868 10240 480 sh3_zsrt139d6185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6185.mem 17 1 1 sh3_zsrt139d6185_pal.mem 0x158afe76 +3337 196868 10240 480 sh3_zsrt139d6186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6186.mem 17 1 1 sh3_zsrt139d6186_pal.mem 0x158afe76 +3338 196868 10240 480 sh3_zsrt139d6187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6187.mem 17 1 1 sh3_zsrt139d6187_pal.mem 0x158afe76 +3339 196868 10240 480 sh3_zsrt139d6188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6188.mem 17 1 1 sh3_zsrt139d6188_pal.mem 0x158afe76 +3340 196868 10240 480 sh3_zsrt139d6189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6189.mem 17 1 1 sh3_zsrt139d6189_pal.mem 0x158afe76 +3341 196868 10240 480 sh3_zsrt139d6190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6190.mem 17 1 1 sh3_zsrt139d6190_pal.mem 0x158afe76 +3342 196868 10240 480 sh3_zsrt139d6191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6191.mem 17 1 1 sh3_zsrt139d6191_pal.mem 0x158afe76 +3343 196868 10240 480 sh3_zsrt139d6192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6192.mem 17 1 1 sh3_zsrt139d6192_pal.mem 0x158afe76 +3344 196868 10240 480 sh3_zsrt139d6193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6193.mem 17 1 1 sh3_zsrt139d6193_pal.mem 0x158afe76 +3345 196868 10240 480 sh3_zsrt139d6194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6194.mem 17 1 1 sh3_zsrt139d6194_pal.mem 0x158afe76 +3346 196868 10240 480 sh3_zsrt139d6195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6195.mem 17 1 1 sh3_zsrt139d6195_pal.mem 0x158afe76 +3347 196868 10240 480 sh3_zsrt139d6196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6196.mem 17 1 1 sh3_zsrt139d6196_pal.mem 0x158afe76 +3348 196868 10240 480 sh3_zsrt139d6197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6197.mem 17 1 1 sh3_zsrt139d6197_pal.mem 0x158afe76 +3349 196868 10240 480 sh3_zsrt139d6198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6198.mem 17 1 1 sh3_zsrt139d6198_pal.mem 0x158afe76 +3350 196868 10240 480 sh3_zsrt139d6199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6199.mem 17 1 1 sh3_zsrt139d6199_pal.mem 0x158afe76 +3351 196868 10240 480 sh3_zsrt139d6200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6200.mem 17 1 1 sh3_zsrt139d6200_pal.mem 0x158afe76 +3352 196868 10240 480 sh3_zsrt139d6201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6201.mem 17 1 1 sh3_zsrt139d6201_pal.mem 0x158afe76 +3353 196868 10240 480 sh3_zsrt139d6202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6202.mem 17 1 1 sh3_zsrt139d6202_pal.mem 0x158afe76 +3354 196868 10240 480 sh3_zsrt139d6203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6203.mem 17 1 1 sh3_zsrt139d6203_pal.mem 0x158afe76 +3355 196868 10240 480 sh3_zsrt139d6204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6204.mem 17 1 1 sh3_zsrt139d6204_pal.mem 0x158afe76 +3356 196868 10240 480 sh3_zsrt139d6205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6205.mem 17 1 1 sh3_zsrt139d6205_pal.mem 0x158afe76 +3357 196868 10240 480 sh3_zsrt139d6206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6206.mem 17 1 1 sh3_zsrt139d6206_pal.mem 0x158afe76 +3358 196868 10240 480 sh3_zsrt139d6207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6207.mem 17 1 1 sh3_zsrt139d6207_pal.mem 0x158afe76 +3359 196868 10240 480 sh3_zsrt139d6208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6208.mem 17 1 1 sh3_zsrt139d6208_pal.mem 0x158afe76 +3360 196868 10240 480 sh3_zsrt139d6209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6209.mem 17 1 1 sh3_zsrt139d6209_pal.mem 0x158afe76 +3361 196868 10240 480 sh3_zsrt139d6210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6210.mem 17 1 1 sh3_zsrt139d6210_pal.mem 0x158afe76 +3362 196868 10240 480 sh3_zsrt139d6211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6211.mem 17 1 1 sh3_zsrt139d6211_pal.mem 0x158afe76 +3363 196868 10240 480 sh3_zsrt139d6212_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6212.mem 17 1 1 sh3_zsrt139d6212_pal.mem 0x158afe76 +3364 196868 10240 480 sh3_zsrt139d6213_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6213.mem 17 1 1 sh3_zsrt139d6213_pal.mem 0x158afe76 +3365 196868 10240 480 sh3_zsrt139d6214_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6214.mem 17 1 1 sh3_zsrt139d6214_pal.mem 0x158afe76 +3366 196868 10240 480 sh3_zsrt139d6215_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6215.mem 17 1 1 sh3_zsrt139d6215_pal.mem 0x158afe76 +3367 196868 10240 480 sh3_zsrt139d6216_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6216.mem 17 1 1 sh3_zsrt139d6216_pal.mem 0x158afe76 +3368 196868 10240 480 sh3_zsrt139d6217_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6217.mem 17 1 1 sh3_zsrt139d6217_pal.mem 0x158afe76 +3369 196868 10240 480 sh3_zsrt139d6218_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6218.mem 17 1 1 sh3_zsrt139d6218_pal.mem 0x158afe76 +3370 197327 10240 480 sh3_zsrt139d6219_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6219.mem 17 1 1 sh3_zsrt139d6219_pal.mem 0x158afe76 +3371 197327 10240 480 sh3_zsrt139d6220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6220.mem 17 1 1 sh3_zsrt139d6220_pal.mem 0x158afe76 +3372 197327 10240 480 sh3_zsrt139d6221_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6221.mem 17 1 1 sh3_zsrt139d6221_pal.mem 0x158afe76 +3373 197327 10240 480 sh3_zsrt139d6222_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6222.mem 17 1 1 sh3_zsrt139d6222_pal.mem 0x158afe76 +3374 197327 10240 480 sh3_zsrt139d6223_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6223.mem 17 1 1 sh3_zsrt139d6223_pal.mem 0x158afe76 +3375 197327 10240 480 sh3_zsrt139d6224_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6224.mem 17 1 1 sh3_zsrt139d6224_pal.mem 0x158afe76 +3376 197327 10240 480 sh3_zsrt139d6225_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6225.mem 17 1 1 sh3_zsrt139d6225_pal.mem 0x158afe76 +3377 197327 10240 480 sh3_zsrt139d6226_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6226.mem 17 1 1 sh3_zsrt139d6226_pal.mem 0x158afe76 +3378 197327 10240 480 sh3_zsrt139d6227_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6227.mem 17 1 1 sh3_zsrt139d6227_pal.mem 0x158afe76 +3379 197327 10240 480 sh3_zsrt139d6228_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6228.mem 17 1 1 sh3_zsrt139d6228_pal.mem 0x158afe76 +3380 197327 10240 480 sh3_zsrt139d6229_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6229.mem 17 1 1 sh3_zsrt139d6229_pal.mem 0x158afe76 +3381 197327 10240 480 sh3_zsrt139d6230_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6230.mem 17 1 1 sh3_zsrt139d6230_pal.mem 0x158afe76 +3382 197327 10240 480 sh3_zsrt139d6231_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6231.mem 17 1 1 sh3_zsrt139d6231_pal.mem 0x158afe76 +3383 197327 10240 480 sh3_zsrt139d6232_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6232.mem 17 1 1 sh3_zsrt139d6232_pal.mem 0x158afe76 +3384 197327 10240 480 sh3_zsrt139d6233_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6233.mem 17 1 1 sh3_zsrt139d6233_pal.mem 0x158afe76 +3385 197327 10240 480 sh3_zsrt139d6234_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6234.mem 17 1 1 sh3_zsrt139d6234_pal.mem 0x158afe76 +3386 197327 10240 480 sh3_zsrt139d6235_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6235.mem 17 1 1 sh3_zsrt139d6235_pal.mem 0x158afe76 +3387 197327 10240 480 sh3_zsrt139d6236_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6236.mem 17 1 1 sh3_zsrt139d6236_pal.mem 0x158afe76 +3388 197327 10240 480 sh3_zsrt139d6237_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6237.mem 17 1 1 sh3_zsrt139d6237_pal.mem 0x158afe76 +3389 197327 10240 480 sh3_zsrt139d6238_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6238.mem 17 1 1 sh3_zsrt139d6238_pal.mem 0x158afe76 +3390 197327 10240 480 sh3_zsrt139d6239_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6239.mem 17 1 1 sh3_zsrt139d6239_pal.mem 0x158afe76 +3391 197327 10240 480 sh3_zsrt139d6240_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6240.mem 17 1 1 sh3_zsrt139d6240_pal.mem 0x158afe76 +3392 197327 10240 480 sh3_zsrt139d6241_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6241.mem 17 1 1 sh3_zsrt139d6241_pal.mem 0x158afe76 +3393 197327 10240 480 sh3_zsrt139d6242_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6242.mem 17 1 1 sh3_zsrt139d6242_pal.mem 0x158afe76 +3394 197327 10240 480 sh3_zsrt139d6243_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6243.mem 17 1 1 sh3_zsrt139d6243_pal.mem 0x158afe76 +3395 197327 10240 480 sh3_zsrt139d6244_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6244.mem 17 1 1 sh3_zsrt139d6244_pal.mem 0x158afe76 +3396 197327 10240 480 sh3_zsrt139d6245_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6245.mem 17 1 1 sh3_zsrt139d6245_pal.mem 0x158afe76 +3397 197327 10240 480 sh3_zsrt139d6246_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6246.mem 17 1 1 sh3_zsrt139d6246_pal.mem 0x158afe76 +3398 197327 10240 480 sh3_zsrt139d6247_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6247.mem 17 1 1 sh3_zsrt139d6247_pal.mem 0x158afe76 +3399 197327 10240 480 sh3_zsrt139d6248_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6248.mem 17 1 1 sh3_zsrt139d6248_pal.mem 0x158afe76 +3400 197327 10240 480 sh3_zsrt139d6249_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6249.mem 17 1 1 sh3_zsrt139d6249_pal.mem 0x158afe76 +3401 197327 10240 480 sh3_zsrt139d6250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6250.mem 17 1 1 sh3_zsrt139d6250_pal.mem 0x158afe76 +3402 197327 10240 480 sh3_zsrt139d6251_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6251.mem 17 1 1 sh3_zsrt139d6251_pal.mem 0x158afe76 +3403 197327 10240 480 sh3_zsrt139d6252_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6252.mem 17 1 1 sh3_zsrt139d6252_pal.mem 0x158afe76 +3404 197327 10240 480 sh3_zsrt139d6253_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6253.mem 17 1 1 sh3_zsrt139d6253_pal.mem 0x158afe76 +3405 197327 10240 480 sh3_zsrt139d6254_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6254.mem 17 1 1 sh3_zsrt139d6254_pal.mem 0x158afe76 +3406 197327 10240 480 sh3_zsrt139d6255_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6255.mem 17 1 1 sh3_zsrt139d6255_pal.mem 0x158afe76 +3407 197327 10240 480 sh3_zsrt139d6256_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6256.mem 17 1 1 sh3_zsrt139d6256_pal.mem 0x158afe76 +3408 197327 10240 480 sh3_zsrt139d6257_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6257.mem 17 1 1 sh3_zsrt139d6257_pal.mem 0x158afe76 +3409 197327 10240 480 sh3_zsrt139d6258_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6258.mem 17 1 1 sh3_zsrt139d6258_pal.mem 0x158afe76 +3410 197327 10240 480 sh3_zsrt139d6259_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6259.mem 17 1 1 sh3_zsrt139d6259_pal.mem 0x158afe76 +3411 197327 10240 480 sh3_zsrt139d6260_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6260.mem 17 1 1 sh3_zsrt139d6260_pal.mem 0x158afe76 +3412 197327 10240 480 sh3_zsrt139d6261_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6261.mem 17 1 1 sh3_zsrt139d6261_pal.mem 0x158afe76 +3413 197327 10240 480 sh3_zsrt139d6262_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6262.mem 17 1 1 sh3_zsrt139d6262_pal.mem 0x158afe76 +3414 197327 10240 480 sh3_zsrt139d6263_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6263.mem 17 1 1 sh3_zsrt139d6263_pal.mem 0x158afe76 +3415 197327 10240 480 sh3_zsrt139d6264_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6264.mem 17 1 1 sh3_zsrt139d6264_pal.mem 0x158afe76 +3416 197327 10240 480 sh3_zsrt139d6265_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6265.mem 17 1 1 sh3_zsrt139d6265_pal.mem 0x158afe76 +3417 197327 10240 480 sh3_zsrt139d6266_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6266.mem 17 1 1 sh3_zsrt139d6266_pal.mem 0x158afe76 +3418 197327 10240 480 sh3_zsrt139d6267_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6267.mem 17 1 1 sh3_zsrt139d6267_pal.mem 0x158afe76 +3419 197327 10240 480 sh3_zsrt139d6268_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6268.mem 17 1 1 sh3_zsrt139d6268_pal.mem 0x158afe76 +3420 197327 10240 480 sh3_zsrt139d6269_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6269.mem 17 1 1 sh3_zsrt139d6269_pal.mem 0x158afe76 +3421 197327 10240 480 sh3_zsrt139d6270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6270.mem 17 1 1 sh3_zsrt139d6270_pal.mem 0x158afe76 +3422 197327 10240 480 sh3_zsrt139d6271_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6271.mem 17 1 1 sh3_zsrt139d6271_pal.mem 0x158afe76 +3423 197327 10240 480 sh3_zsrt139d6272_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6272.mem 17 1 1 sh3_zsrt139d6272_pal.mem 0x158afe76 +3424 197327 10240 480 sh3_zsrt139d6273_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6273.mem 17 1 1 sh3_zsrt139d6273_pal.mem 0x158afe76 +3425 197327 10240 480 sh3_zsrt139d6274_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6274.mem 17 1 1 sh3_zsrt139d6274_pal.mem 0x158afe76 +3426 197327 10240 480 sh3_zsrt139d6275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6275.mem 17 1 1 sh3_zsrt139d6275_pal.mem 0x158afe76 +3427 197327 10240 480 sh3_zsrt139d6276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6276.mem 17 1 1 sh3_zsrt139d6276_pal.mem 0x158afe76 +3428 197327 10240 480 sh3_zsrt139d6277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6277.mem 17 1 1 sh3_zsrt139d6277_pal.mem 0x158afe76 +3429 197327 10240 480 sh3_zsrt139d6278_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6278.mem 17 1 1 sh3_zsrt139d6278_pal.mem 0x158afe76 +3430 197327 10240 480 sh3_zsrt139d6279_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6279.mem 17 1 1 sh3_zsrt139d6279_pal.mem 0x158afe76 +3431 197327 10240 480 sh3_zsrt139d6280_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6280.mem 17 1 1 sh3_zsrt139d6280_pal.mem 0x158afe76 +3432 197327 10240 480 sh3_zsrt139d6281_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6281.mem 17 1 1 sh3_zsrt139d6281_pal.mem 0x158afe76 +3433 197327 10240 480 sh3_zsrt139d6282_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6282.mem 17 1 1 sh3_zsrt139d6282_pal.mem 0x158afe76 +3434 197327 10240 480 sh3_zsrt139d6283_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6283.mem 17 1 1 sh3_zsrt139d6283_pal.mem 0x158afe76 +3435 197327 10240 480 sh3_zsrt139d6284_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6284.mem 17 1 1 sh3_zsrt139d6284_pal.mem 0x158afe76 +3436 197327 10240 480 sh3_zsrt139d6285_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6285.mem 17 1 1 sh3_zsrt139d6285_pal.mem 0x158afe76 +3437 197327 10240 480 sh3_zsrt139d6286_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6286.mem 17 1 1 sh3_zsrt139d6286_pal.mem 0x158afe76 +3438 198075 10240 480 sh3_zsrt139d6287_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6287.mem 485 53 0 sh3_zsrt139d6287_pal.mem 0x158afe76 +3439 198092 10240 480 sh3_zsrt139d6288_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6288.mem 665 73 1 sh3_zsrt139d6288_pal.mem 0x158afe76 +3440 198092 10240 480 sh3_zsrt139d6289_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6289.mem 215 23 1 sh3_zsrt139d6289_pal.mem 0x158afe76 +3441 198092 10240 480 sh3_zsrt139d6290_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6290.mem 458 50 1 sh3_zsrt139d6290_pal.mem 0x158afe76 +3442 198092 10240 480 sh3_zsrt139d6291_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6291.mem 431 47 1 sh3_zsrt139d6291_pal.mem 0x158afe76 +3443 198092 10240 480 sh3_zsrt139d6292_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6292.mem 395 43 1 sh3_zsrt139d6292_pal.mem 0x158afe76 +3444 198092 10240 480 sh3_zsrt139d6293_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6293.mem 206 22 1 sh3_zsrt139d6293_pal.mem 0x158afe76 +3445 198092 10240 480 sh3_zsrt139d6294_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6294.mem 170 18 1 sh3_zsrt139d6294_pal.mem 0x158afe76 +3446 198092 10240 480 sh3_zsrt139d6295_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6295.mem 242 26 1 sh3_zsrt139d6295_pal.mem 0x158afe76 +3447 198092 10240 480 sh3_zsrt139d6296_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6296.mem 359 39 1 sh3_zsrt139d6296_pal.mem 0x158afe76 +3448 198092 10240 480 sh3_zsrt139d6297_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6297.mem 323 35 1 sh3_zsrt139d6297_pal.mem 0x158afe76 +3449 198092 10240 480 sh3_zsrt139d6298_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6298.mem 215 23 1 sh3_zsrt139d6298_pal.mem 0x158afe76 +3450 198092 10240 480 sh3_zsrt139d6299_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6299.mem 314 34 1 sh3_zsrt139d6299_pal.mem 0x158afe76 +3451 198092 10240 480 sh3_zsrt139d6300_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6300.mem 278 30 1 sh3_zsrt139d6300_pal.mem 0x158afe76 +3452 198092 10240 480 sh3_zsrt139d6301_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6301.mem 116 12 1 sh3_zsrt139d6301_pal.mem 0x158afe76 +3453 198092 10240 480 sh3_zsrt139d6302_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6302.mem 197 21 1 sh3_zsrt139d6302_pal.mem 0x158afe76 +3454 198092 10240 480 sh3_zsrt139d6303_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6303.mem 458 50 1 sh3_zsrt139d6303_pal.mem 0x158afe76 +3455 198092 10240 480 sh3_zsrt139d6304_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6304.mem 269 29 1 sh3_zsrt139d6304_pal.mem 0x158afe76 +3456 198092 10240 480 sh3_zsrt139d6305_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6305.mem 206 22 1 sh3_zsrt139d6305_pal.mem 0x158afe76 +3457 198092 10240 480 sh3_zsrt139d6306_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6306.mem 323 35 1 sh3_zsrt139d6306_pal.mem 0x158afe76 +3458 198092 10240 480 sh3_zsrt139d6307_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6307.mem 494 54 1 sh3_zsrt139d6307_pal.mem 0x158afe76 +3459 198092 10240 480 sh3_zsrt139d6308_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6308.mem 566 62 1 sh3_zsrt139d6308_pal.mem 0x158afe76 +3460 198092 10240 480 sh3_zsrt139d6309_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6309.mem 287 31 1 sh3_zsrt139d6309_pal.mem 0x158afe76 +3461 198092 10240 480 sh3_zsrt139d6310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6310.mem 260 28 1 sh3_zsrt139d6310_pal.mem 0x158afe76 +3462 198092 10240 480 sh3_zsrt139d6311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6311.mem 89 9 1 sh3_zsrt139d6311_pal.mem 0x158afe76 +3463 198092 10240 480 sh3_zsrt139d6312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6312.mem 359 39 1 sh3_zsrt139d6312_pal.mem 0x158afe76 +3464 198092 10240 480 sh3_zsrt139d6313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6313.mem 539 59 1 sh3_zsrt139d6313_pal.mem 0x158afe76 +3465 198092 10240 480 sh3_zsrt139d6314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6314.mem 323 35 1 sh3_zsrt139d6314_pal.mem 0x158afe76 +3466 198092 10240 480 sh3_zsrt139d6315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6315.mem 179 19 1 sh3_zsrt139d6315_pal.mem 0x158afe76 +3467 198092 10240 480 sh3_zsrt139d6316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6316.mem 494 54 1 sh3_zsrt139d6316_pal.mem 0x158afe76 +3468 198092 10240 480 sh3_zsrt139d6317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6317.mem 431 47 1 sh3_zsrt139d6317_pal.mem 0x158afe76 +3469 198092 10240 480 sh3_zsrt139d6318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6318.mem 107 11 1 sh3_zsrt139d6318_pal.mem 0x158afe76 +3470 198092 10240 480 sh3_zsrt139d6319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6319.mem 278 30 1 sh3_zsrt139d6319_pal.mem 0x158afe76 +3471 198092 10240 480 sh3_zsrt139d6320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6320.mem 413 45 1 sh3_zsrt139d6320_pal.mem 0x158afe76 +3472 198092 10240 480 sh3_zsrt139d6321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6321.mem 98 10 1 sh3_zsrt139d6321_pal.mem 0x158afe76 +3473 198092 10240 480 sh3_zsrt139d6322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6322.mem 278 30 1 sh3_zsrt139d6322_pal.mem 0x158afe76 +3474 198092 10240 480 sh3_zsrt139d6323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6323.mem 62 6 1 sh3_zsrt139d6323_pal.mem 0x158afe76 +3475 198092 10240 480 sh3_zsrt139d6324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6324.mem 98 10 1 sh3_zsrt139d6324_pal.mem 0x158afe76 +3476 198092 10240 480 sh3_zsrt139d6325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6325.mem 251 27 1 sh3_zsrt139d6325_pal.mem 0x158afe76 +3477 198092 10240 480 sh3_zsrt139d6326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6326.mem 215 23 1 sh3_zsrt139d6326_pal.mem 0x158afe76 +3478 198092 10240 480 sh3_zsrt139d6327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6327.mem 215 23 1 sh3_zsrt139d6327_pal.mem 0x158afe76 +3479 198092 10240 480 sh3_zsrt139d6328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6328.mem 107 11 1 sh3_zsrt139d6328_pal.mem 0x158afe76 +3480 198092 10240 480 sh3_zsrt139d6329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6329.mem 152 16 1 sh3_zsrt139d6329_pal.mem 0x158afe76 +3481 198092 10240 480 sh3_zsrt139d6330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6330.mem 278 30 1 sh3_zsrt139d6330_pal.mem 0x158afe76 +3482 198092 10240 480 sh3_zsrt139d6331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6331.mem 503 55 1 sh3_zsrt139d6331_pal.mem 0x158afe76 +3483 198092 10240 480 sh3_zsrt139d6332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6332.mem 62 6 1 sh3_zsrt139d6332_pal.mem 0x158afe76 +3484 198092 10240 480 sh3_zsrt139d6333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6333.mem 98 10 1 sh3_zsrt139d6333_pal.mem 0x158afe76 +3485 198092 10240 480 sh3_zsrt139d6334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6334.mem 260 28 1 sh3_zsrt139d6334_pal.mem 0x158afe76 +3486 198092 10240 480 sh3_zsrt139d6335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6335.mem 116 12 1 sh3_zsrt139d6335_pal.mem 0x158afe76 +3487 198092 10240 480 sh3_zsrt139d6336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6336.mem 323 35 1 sh3_zsrt139d6336_pal.mem 0x158afe76 +3488 198092 10240 480 sh3_zsrt139d6337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6337.mem 242 26 1 sh3_zsrt139d6337_pal.mem 0x158afe76 +3489 198092 10240 480 sh3_zsrt139d6338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6338.mem 233 25 1 sh3_zsrt139d6338_pal.mem 0x158afe76 +3490 198092 10240 480 sh3_zsrt139d6339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6339.mem 233 25 1 sh3_zsrt139d6339_pal.mem 0x158afe76 +3491 198092 10240 480 sh3_zsrt139d6340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6340.mem 152 16 1 sh3_zsrt139d6340_pal.mem 0x158afe76 +3492 198092 10240 480 sh3_zsrt139d6341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6341.mem 449 49 1 sh3_zsrt139d6341_pal.mem 0x158afe76 +3493 198092 10240 480 sh3_zsrt139d6342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6342.mem 125 13 1 sh3_zsrt139d6342_pal.mem 0x158afe76 +3494 198092 10240 480 sh3_zsrt139d6343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6343.mem 62 6 1 sh3_zsrt139d6343_pal.mem 0x158afe76 +3495 198092 10240 480 sh3_zsrt139d6344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6344.mem 53 5 1 sh3_zsrt139d6344_pal.mem 0x158afe76 +3496 198092 10240 480 sh3_zsrt139d6345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6345.mem 125 13 1 sh3_zsrt139d6345_pal.mem 0x158afe76 +3497 198092 10240 480 sh3_zsrt139d6346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6346.mem 125 13 1 sh3_zsrt139d6346_pal.mem 0x158afe76 +3498 198092 10240 480 sh3_zsrt139d6347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6347.mem 377 41 1 sh3_zsrt139d6347_pal.mem 0x158afe76 +3499 198092 10240 480 sh3_zsrt139d6348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6348.mem 512 56 1 sh3_zsrt139d6348_pal.mem 0x158afe76 +3500 198092 10240 480 sh3_zsrt139d6349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6349.mem 539 59 1 sh3_zsrt139d6349_pal.mem 0x158afe76 +3501 198092 10240 480 sh3_zsrt139d6350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6350.mem 53 5 1 sh3_zsrt139d6350_pal.mem 0x158afe76 +3502 198092 10240 480 sh3_zsrt139d6351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6351.mem 53 5 1 sh3_zsrt139d6351_pal.mem 0x158afe76 +3503 198092 10240 480 sh3_zsrt139d6352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6352.mem 71 7 1 sh3_zsrt139d6352_pal.mem 0x158afe76 +3504 198092 10240 480 sh3_zsrt139d6353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6353.mem 161 17 1 sh3_zsrt139d6353_pal.mem 0x158afe76 +3505 198092 10240 480 sh3_zsrt139d6354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6354.mem 206 22 1 sh3_zsrt139d6354_pal.mem 0x158afe76 +3506 198092 10240 480 sh3_zsrt139d6355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6355.mem 89 9 1 sh3_zsrt139d6355_pal.mem 0x158afe76 +3507 198092 10240 480 sh3_zsrt139d6356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6356.mem 89 9 1 sh3_zsrt139d6356_pal.mem 0x158afe76 +3508 198092 10240 480 sh3_zsrt139d6357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6357.mem 143 15 1 sh3_zsrt139d6357_pal.mem 0x158afe76 +3509 198092 10240 480 sh3_zsrt139d6358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6358.mem 368 40 1 sh3_zsrt139d6358_pal.mem 0x158afe76 +3510 198092 10240 480 sh3_zsrt139d6359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6359.mem 80 8 1 sh3_zsrt139d6359_pal.mem 0x158afe76 +3511 198092 10240 480 sh3_zsrt139d6360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6360.mem 152 16 1 sh3_zsrt139d6360_pal.mem 0x158afe76 +3512 198092 10240 480 sh3_zsrt139d6361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6361.mem 314 34 1 sh3_zsrt139d6361_pal.mem 0x158afe76 +3513 198092 10240 480 sh3_zsrt139d6362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6362.mem 116 12 1 sh3_zsrt139d6362_pal.mem 0x158afe76 +3514 198092 10240 480 sh3_zsrt139d6363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6363.mem 197 21 1 sh3_zsrt139d6363_pal.mem 0x158afe76 +3515 198092 10240 480 sh3_zsrt139d6364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6364.mem 143 15 1 sh3_zsrt139d6364_pal.mem 0x158afe76 +3516 198092 10240 480 sh3_zsrt139d6365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6365.mem 503 55 1 sh3_zsrt139d6365_pal.mem 0x158afe76 +3517 198092 10240 480 sh3_zsrt139d6366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6366.mem 449 49 1 sh3_zsrt139d6366_pal.mem 0x158afe76 +3518 198092 10240 480 sh3_zsrt139d6367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6367.mem 395 43 1 sh3_zsrt139d6367_pal.mem 0x158afe76 +3519 198092 10240 480 sh3_zsrt139d6368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6368.mem 413 45 1 sh3_zsrt139d6368_pal.mem 0x158afe76 +3520 198092 10240 480 sh3_zsrt139d6369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6369.mem 449 49 1 sh3_zsrt139d6369_pal.mem 0x158afe76 +3521 198092 10240 480 sh3_zsrt139d6370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6370.mem 584 64 1 sh3_zsrt139d6370_pal.mem 0x158afe76 +3522 198092 10240 480 sh3_zsrt139d6371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6371.mem 125 13 1 sh3_zsrt139d6371_pal.mem 0x158afe76 +3523 198092 10240 480 sh3_zsrt139d6372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6372.mem 80 8 1 sh3_zsrt139d6372_pal.mem 0x158afe76 +3524 198092 10240 480 sh3_zsrt139d6373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6373.mem 152 16 1 sh3_zsrt139d6373_pal.mem 0x158afe76 +3525 198092 10240 480 sh3_zsrt139d6374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6374.mem 107 11 1 sh3_zsrt139d6374_pal.mem 0x158afe76 +3526 198092 10240 480 sh3_zsrt139d6375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6375.mem 98 10 1 sh3_zsrt139d6375_pal.mem 0x158afe76 +3527 198092 10240 480 sh3_zsrt139d6376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6376.mem 152 16 1 sh3_zsrt139d6376_pal.mem 0x158afe76 +3528 198092 10240 480 sh3_zsrt139d6377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6377.mem 314 34 1 sh3_zsrt139d6377_pal.mem 0x158afe76 +3529 198092 10240 480 sh3_zsrt139d6378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6378.mem 53 5 1 sh3_zsrt139d6378_pal.mem 0x158afe76 +3530 198092 10240 480 sh3_zsrt139d6379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6379.mem 62 6 1 sh3_zsrt139d6379_pal.mem 0x158afe76 +3531 198092 10240 480 sh3_zsrt139d6380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6380.mem 152 16 1 sh3_zsrt139d6380_pal.mem 0x158afe76 +3532 198092 10240 480 sh3_zsrt139d6381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6381.mem 197 21 1 sh3_zsrt139d6381_pal.mem 0x158afe76 +3533 198092 10240 480 sh3_zsrt139d6382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6382.mem 287 31 1 sh3_zsrt139d6382_pal.mem 0x158afe76 +3534 198092 10240 480 sh3_zsrt139d6383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6383.mem 566 62 1 sh3_zsrt139d6383_pal.mem 0x158afe76 +3535 198092 10240 480 sh3_zsrt139d6384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6384.mem 980 108 1 sh3_zsrt139d6384_pal.mem 0x158afe76 +3536 198092 10240 480 sh3_zsrt139d6385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6385.mem 107 11 1 sh3_zsrt139d6385_pal.mem 0x158afe76 +3537 198092 10240 480 sh3_zsrt139d6386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6386.mem 602 66 1 sh3_zsrt139d6386_pal.mem 0x158afe76 +3538 198092 10240 480 sh3_zsrt139d6387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6387.mem 377 41 1 sh3_zsrt139d6387_pal.mem 0x158afe76 +3539 198092 10240 480 sh3_zsrt139d6388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6388.mem 89 9 1 sh3_zsrt139d6388_pal.mem 0x158afe76 +3540 198092 10240 480 sh3_zsrt139d6389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6389.mem 152 16 1 sh3_zsrt139d6389_pal.mem 0x158afe76 +3541 198092 10240 480 sh3_zsrt139d6390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6390.mem 305 33 1 sh3_zsrt139d6390_pal.mem 0x158afe76 +3542 198092 10240 480 sh3_zsrt139d6391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6391.mem 98 10 1 sh3_zsrt139d6391_pal.mem 0x158afe76 +3543 198092 10240 480 sh3_zsrt139d6392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6392.mem 71 7 1 sh3_zsrt139d6392_pal.mem 0x158afe76 +3544 198092 10240 480 sh3_zsrt139d6393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6393.mem 71 7 1 sh3_zsrt139d6393_pal.mem 0x158afe76 +3545 198092 10240 480 sh3_zsrt139d6394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6394.mem 80 8 1 sh3_zsrt139d6394_pal.mem 0x158afe76 +3546 198092 10240 480 sh3_zsrt139d6395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6395.mem 179 19 1 sh3_zsrt139d6395_pal.mem 0x158afe76 +3547 198092 10240 480 sh3_zsrt139d6396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6396.mem 251 27 1 sh3_zsrt139d6396_pal.mem 0x158afe76 +3548 198092 10240 480 sh3_zsrt139d6397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6397.mem 278 30 1 sh3_zsrt139d6397_pal.mem 0x158afe76 +3549 198092 10240 480 sh3_zsrt139d6398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6398.mem 125 13 1 sh3_zsrt139d6398_pal.mem 0x158afe76 +3550 198092 10240 480 sh3_zsrt139d6399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6399.mem 251 27 1 sh3_zsrt139d6399_pal.mem 0x158afe76 +3551 198092 10240 480 sh3_zsrt139d6400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6400.mem 449 49 1 sh3_zsrt139d6400_pal.mem 0x158afe76 +3552 198092 10240 480 sh3_zsrt139d6401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6401.mem 125 13 1 sh3_zsrt139d6401_pal.mem 0x158afe76 +3553 198092 10240 480 sh3_zsrt139d6402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6402.mem 71 7 1 sh3_zsrt139d6402_pal.mem 0x158afe76 +3554 198092 10240 480 sh3_zsrt139d6403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6403.mem 53 5 1 sh3_zsrt139d6403_pal.mem 0x158afe76 +3555 198092 10240 480 sh3_zsrt139d6404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6404.mem 53 5 1 sh3_zsrt139d6404_pal.mem 0x158afe76 +3556 198092 10240 480 sh3_zsrt139d6405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6405.mem 44 4 1 sh3_zsrt139d6405_pal.mem 0x158afe76 +3557 198092 10240 480 sh3_zsrt139d6406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6406.mem 44 4 1 sh3_zsrt139d6406_pal.mem 0x158afe76 +3558 198092 10240 480 sh3_zsrt139d6407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6407.mem 98 10 1 sh3_zsrt139d6407_pal.mem 0x158afe76 +3559 198092 10240 480 sh3_zsrt139d6408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6408.mem 80 8 1 sh3_zsrt139d6408_pal.mem 0x158afe76 +3560 198092 10240 480 sh3_zsrt139d6409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6409.mem 62 6 1 sh3_zsrt139d6409_pal.mem 0x158afe76 +3561 198092 10240 480 sh3_zsrt139d6410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6410.mem 80 8 1 sh3_zsrt139d6410_pal.mem 0x158afe76 +3562 198092 10240 480 sh3_zsrt139d6411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6411.mem 107 11 1 sh3_zsrt139d6411_pal.mem 0x158afe76 +3563 198092 10240 480 sh3_zsrt139d6412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6412.mem 206 22 1 sh3_zsrt139d6412_pal.mem 0x158afe76 +3564 198092 10240 480 sh3_zsrt139d6413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6413.mem 719 79 1 sh3_zsrt139d6413_pal.mem 0x158afe76 +3565 198092 10240 480 sh3_zsrt139d6414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6414.mem 494 54 1 sh3_zsrt139d6414_pal.mem 0x158afe76 +3566 198092 10240 480 sh3_zsrt139d6415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6415.mem 89 9 1 sh3_zsrt139d6415_pal.mem 0x158afe76 +3567 198092 10240 480 sh3_zsrt139d6416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6416.mem 179 19 1 sh3_zsrt139d6416_pal.mem 0x158afe76 +3568 198092 10240 480 sh3_zsrt139d6417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6417.mem 242 26 1 sh3_zsrt139d6417_pal.mem 0x158afe76 +3569 198092 10240 480 sh3_zsrt139d6418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6418.mem 89 9 1 sh3_zsrt139d6418_pal.mem 0x158afe76 +3570 198092 10240 480 sh3_zsrt139d6419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6419.mem 80 8 1 sh3_zsrt139d6419_pal.mem 0x158afe76 +3571 198092 10240 480 sh3_zsrt139d6420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6420.mem 170 18 1 sh3_zsrt139d6420_pal.mem 0x158afe76 +3572 198092 10240 480 sh3_zsrt139d6421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6421.mem 143 15 1 sh3_zsrt139d6421_pal.mem 0x158afe76 +3573 198092 10240 480 sh3_zsrt139d6422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6422.mem 80 8 1 sh3_zsrt139d6422_pal.mem 0x158afe76 +3574 198092 10240 480 sh3_zsrt139d6423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6423.mem 62 6 1 sh3_zsrt139d6423_pal.mem 0x158afe76 +3575 198092 10240 480 sh3_zsrt139d6424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6424.mem 125 13 1 sh3_zsrt139d6424_pal.mem 0x158afe76 +3576 198092 10240 480 sh3_zsrt139d6425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6425.mem 197 21 1 sh3_zsrt139d6425_pal.mem 0x158afe76 +3577 198092 10240 480 sh3_zsrt139d6426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6426.mem 188 20 1 sh3_zsrt139d6426_pal.mem 0x158afe76 +3578 198092 10240 480 sh3_zsrt139d6427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6427.mem 62 6 1 sh3_zsrt139d6427_pal.mem 0x158afe76 +3579 198092 10240 480 sh3_zsrt139d6428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6428.mem 44 4 1 sh3_zsrt139d6428_pal.mem 0x158afe76 +3580 198092 10240 480 sh3_zsrt139d6429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6429.mem 44 4 1 sh3_zsrt139d6429_pal.mem 0x158afe76 +3581 198092 10240 480 sh3_zsrt139d6430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6430.mem 35 3 1 sh3_zsrt139d6430_pal.mem 0x158afe76 +3582 198092 10240 480 sh3_zsrt139d6431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6431.mem 44 4 1 sh3_zsrt139d6431_pal.mem 0x158afe76 +3583 198092 10240 480 sh3_zsrt139d6432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6432.mem 62 6 1 sh3_zsrt139d6432_pal.mem 0x158afe76 +3584 198092 10240 480 sh3_zsrt139d6433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6433.mem 98 10 1 sh3_zsrt139d6433_pal.mem 0x158afe76 +3585 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +3586 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +3587 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +3588 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +3589 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +3590 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +3591 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +3592 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +3593 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +3594 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +3595 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +3596 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +3597 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +3598 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +3599 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +3600 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +3601 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +3602 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f30_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f30_epochs.txt new file mode 100644 index 0000000..a21981c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f30_epochs.txt @@ -0,0 +1,310 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f29', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 307 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f290_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f290.mem 44 4 0 sh3_zsrt139f290_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f291.mem 1583 175 0 sh3_zsrt139f291_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f292.mem 1835 203 1 sh3_zsrt139f291_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f293_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f293.mem 350 38 0 sh3_zsrt139f293_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f294.mem 1322 146 0 sh3_zsrt139f294_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f295.mem 116 12 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f296.mem 629 69 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f297.mem 260 28 0 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f298.mem 593 65 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f299.mem 332 36 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +10 30859 10240 480 sh3_zsrt139f2910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2910.mem 26 2 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +11 31075 13824 480 sh3_zsrt139f2911_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2911.mem 26 2 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +12 31727 10240 480 sh3_zsrt139f2912_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2912.mem 17 1 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +13 31820 13824 480 sh3_zsrt139f2913_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2913.mem 17 1 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +14 32435 10240 480 sh3_zsrt139f2914_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2914.mem 134 14 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +15 32651 13824 480 sh3_zsrt139f2915_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2915.mem 134 14 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +16 32869 10240 480 sh3_zsrt139f2916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2916.mem 224 24 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +17 33085 13824 480 sh3_zsrt139f2917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2917.mem 224 24 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +18 33303 10240 480 sh3_zsrt139f2918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2918.mem 170 18 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +19 33519 13824 480 sh3_zsrt139f2919_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2919.mem 170 18 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +20 33737 10240 480 sh3_zsrt139f2920_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2920.mem 143 15 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +21 33953 13824 480 sh3_zsrt139f2921_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2921.mem 143 15 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +22 34171 10240 480 sh3_zsrt139f2922_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2922.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +23 34387 13824 480 sh3_zsrt139f2923_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2923.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +24 34605 10240 480 sh3_zsrt139f2924_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2924.mem 242 26 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +25 34821 13824 480 sh3_zsrt139f2925_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2925.mem 242 26 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +26 35039 10240 480 sh3_zsrt139f2926_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2926.mem 377 41 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +27 35255 13824 480 sh3_zsrt139f2927_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2927.mem 377 41 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +28 35473 10240 480 sh3_zsrt139f2928_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2928.mem 341 37 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +29 35689 13824 480 sh3_zsrt139f2929_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2929.mem 341 37 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +30 35907 10240 480 sh3_zsrt139f2930_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2930.mem 98 10 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +31 36123 13824 480 sh3_zsrt139f2931_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2931.mem 98 10 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +32 36341 10240 480 sh3_zsrt139f2932_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2932.mem 197 21 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +33 36557 13824 480 sh3_zsrt139f2933_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2933.mem 197 21 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +34 36775 10240 480 sh3_zsrt139f2934_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2934.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +35 36991 13824 480 sh3_zsrt139f2935_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2935.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +36 37209 10240 480 sh3_zsrt139f2936_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2936.mem 233 25 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +37 37425 13824 480 sh3_zsrt139f2937_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2937.mem 233 25 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +38 37643 10240 480 sh3_zsrt139f2938_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2938.mem 206 22 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +39 37859 13824 480 sh3_zsrt139f2939_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2939.mem 206 22 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +40 38077 10240 480 sh3_zsrt139f2940_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2940.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +41 38293 13824 480 sh3_zsrt139f2941_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2941.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +42 38511 10240 480 sh3_zsrt139f2942_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2942.mem 503 55 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +43 38727 13824 480 sh3_zsrt139f2943_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2943.mem 503 55 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +44 38945 10240 480 sh3_zsrt139f2944_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2944.mem 395 43 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +45 39161 13824 480 sh3_zsrt139f2945_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2945.mem 395 43 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +46 39379 10240 480 sh3_zsrt139f2946_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2946.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +47 39520 13824 480 sh3_zsrt139f2947_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2947.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +48 71148 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2948.mem 674 74 0 sh3_zsrt139f2948_pal.mem 0x43ece1ae +49 71787 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2949.mem 323 35 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +50 72426 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2950.mem 296 32 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +51 73065 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2951.mem 521 57 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +52 73704 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2952.mem 701 77 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +53 74343 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2953.mem 422 46 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +54 74982 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2954.mem 683 75 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +55 75621 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2955.mem 1070 118 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +56 76260 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2956.mem 539 59 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +57 76899 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2957.mem 674 74 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +58 78319 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2958.mem 476 52 0 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +59 82720 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2959.mem 449 49 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +60 83323 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2960.mem 809 89 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +61 83944 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2961.mem 593 65 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +62 84565 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2962.mem 701 77 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +63 85186 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2963.mem 476 52 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +64 85807 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2964.mem 935 103 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +65 86428 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2965.mem 584 64 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +66 87049 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2966.mem 314 34 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +67 88918 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2967.mem 26 2 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +68 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2968.mem 2042 226 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +69 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2969.mem 1016 112 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +70 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2970.mem 1808 200 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +71 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2971.mem 494 54 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +72 91678 9216 480 sh3_zsrt139f2972_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2972.mem 188 20 0 sh3_zsrt139f2972_pal.mem 0x181b2ac2 +73 91804 9216 480 sh3_zsrt139f2973_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2973.mem 224 24 0 sh3_zsrt139f2973_pal.mem 0x9d847d4e +74 114431 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2974.mem 1466 162 0 sh3_zsrt139f2974_pal.mem 0x47097d4c +75 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2975.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +76 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2976.mem 287 31 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +77 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2977.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +78 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2978.mem 413 45 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +79 116351 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2979.mem 1754 194 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +80 117050 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2980.mem 1556 172 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +81 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2981.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +82 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2982.mem 98 10 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +83 118238 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2983.mem 1790 198 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +84 118877 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2984.mem 1178 130 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +85 119471 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2985.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +86 120110 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2986.mem 1889 209 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +87 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2987.mem 1502 166 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +88 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2988.mem 575 63 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +89 121388 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2989.mem 1016 112 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +90 122027 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2990.mem 872 96 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +91 122600 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2991.mem 782 86 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +92 123239 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2992.mem 170 18 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +93 123869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2993.mem 251 27 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +94 124508 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2994.mem 323 35 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +95 125147 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2995.mem 89 9 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +96 125786 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2996.mem 557 61 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +97 126434 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2997.mem 368 40 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +98 126968 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2998.mem 647 71 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +99 127607 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2999.mem 530 58 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +100 128246 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29100.mem 440 48 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +101 128885 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29101.mem 62 6 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +102 129389 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29102.mem 1493 165 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +103 130028 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29103.mem 1223 135 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +104 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29104.mem 1628 180 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +105 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29105.mem 224 24 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +106 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29106.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +107 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29107.mem 566 62 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +108 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29108.mem 521 57 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +109 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29109.mem 755 83 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +110 131945 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29110.mem 1439 159 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +111 132584 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29111.mem 953 105 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +112 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29112.mem 620 68 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +113 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29113.mem 53 5 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +114 135869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29114.mem 26 2 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +115 144890 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29115.mem 179 19 0 sh3_zsrt139f29115_pal.mem 0x3e849a98 +116 145712 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29116.mem 116 12 1 sh3_zsrt139f29115_pal.mem 0x3e849a98 +117 145913 12288 480 sh3_zsrt139f29117_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29117.mem 143 15 0 sh3_zsrt139f29117_pal.mem 0x20ffffff +118 146205 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29118.mem 1007 111 0 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +119 146630 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29119.mem 287 31 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +120 147068 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29120.mem 332 36 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +121 147480 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29121.mem 683 75 0 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +122 147888 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29122.mem 665 73 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +123 148264 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29123.mem 1025 113 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +124 148919 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29124.mem 935 103 0 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +125 149509 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29125.mem 827 91 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +126 150125 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29126.mem 701 77 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +127 150741 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29127.mem 710 78 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +128 151344 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29128.mem 404 44 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +129 152021 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29129.mem 206 22 0 sh3_zsrt139f29129_pal.mem 0xc6784386 +130 152420 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29130.mem 242 26 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +131 152806 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29131.mem 296 32 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +132 153218 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29132.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +133 153643 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29133.mem 44 4 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +134 154029 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29134.mem 278 30 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +135 154428 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29135.mem 197 21 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +136 154853 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29136.mem 188 20 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +137 155265 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29137.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +138 155664 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29138.mem 107 11 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +139 156063 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29139.mem 80 8 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +140 156566 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29140.mem 1241 137 0 sh3_zsrt139f29140_pal.mem 0x00fd9028 +141 157273 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29141.mem 1025 113 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +142 157967 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29142.mem 737 81 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +143 158674 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29143.mem 845 93 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +144 159420 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29144.mem 530 58 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +145 160114 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29145.mem 98 10 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +146 160331 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29146.mem 287 31 0 sh3_zsrt139f29146_pal.mem 0xd8d19684 +147 160769 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29147.mem 260 28 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +148 161168 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29148.mem 368 40 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +149 161567 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29149.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +150 162300 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29150.mem 341 37 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +151 162725 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29151.mem 305 33 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +152 163163 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29152.mem 206 22 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +153 163575 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29153.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +154 164204 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29154.mem 602 66 0 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +155 164950 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29155.mem 359 39 1 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +156 175995 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29156.mem 341 37 0 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 +157 176446 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29157.mem 170 18 1 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +161 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +162 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +163 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +164 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +165 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +166 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +167 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +168 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +169 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +170 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +171 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +172 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +173 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +174 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +175 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +176 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +177 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f31_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f31_epochs.txt new file mode 100644 index 0000000..0e4275f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f31_epochs.txt @@ -0,0 +1,9 @@ +# Ch428 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +1 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +2 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f32_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f32_epochs.txt new file mode 100644 index 0000000..a088468 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f32_epochs.txt @@ -0,0 +1,313 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f29@0:156', 'zsrt139f31', 'zsrt139f29@156:158', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 310 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f290_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f290.mem 44 4 0 sh3_zsrt139f290_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f291.mem 1583 175 0 sh3_zsrt139f291_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f292.mem 1835 203 1 sh3_zsrt139f291_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f293_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f293.mem 350 38 0 sh3_zsrt139f293_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f294.mem 1322 146 0 sh3_zsrt139f294_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f295.mem 116 12 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f296.mem 629 69 1 sh3_zsrt139f294_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f297.mem 260 28 0 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f298.mem 593 65 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f299.mem 332 36 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4 +10 30859 10240 480 sh3_zsrt139f2910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2910.mem 26 2 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +11 31075 13824 480 sh3_zsrt139f2911_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2911.mem 26 2 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +12 31727 10240 480 sh3_zsrt139f2912_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2912.mem 17 1 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +13 31820 13824 480 sh3_zsrt139f2913_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2913.mem 17 1 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +14 32435 10240 480 sh3_zsrt139f2914_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2914.mem 134 14 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +15 32651 13824 480 sh3_zsrt139f2915_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2915.mem 134 14 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +16 32869 10240 480 sh3_zsrt139f2916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2916.mem 224 24 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +17 33085 13824 480 sh3_zsrt139f2917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2917.mem 224 24 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +18 33303 10240 480 sh3_zsrt139f2918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2918.mem 170 18 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +19 33519 13824 480 sh3_zsrt139f2919_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2919.mem 170 18 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +20 33737 10240 480 sh3_zsrt139f2920_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2920.mem 143 15 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +21 33953 13824 480 sh3_zsrt139f2921_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2921.mem 143 15 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +22 34171 10240 480 sh3_zsrt139f2922_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2922.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +23 34387 13824 480 sh3_zsrt139f2923_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2923.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +24 34605 10240 480 sh3_zsrt139f2924_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2924.mem 242 26 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +25 34821 13824 480 sh3_zsrt139f2925_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2925.mem 242 26 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +26 35039 10240 480 sh3_zsrt139f2926_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2926.mem 377 41 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +27 35255 13824 480 sh3_zsrt139f2927_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2927.mem 377 41 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +28 35473 10240 480 sh3_zsrt139f2928_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2928.mem 341 37 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +29 35689 13824 480 sh3_zsrt139f2929_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2929.mem 341 37 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +30 35907 10240 480 sh3_zsrt139f2930_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2930.mem 98 10 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +31 36123 13824 480 sh3_zsrt139f2931_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2931.mem 98 10 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +32 36341 10240 480 sh3_zsrt139f2932_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2932.mem 197 21 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +33 36557 13824 480 sh3_zsrt139f2933_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2933.mem 197 21 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +34 36775 10240 480 sh3_zsrt139f2934_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2934.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +35 36991 13824 480 sh3_zsrt139f2935_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2935.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +36 37209 10240 480 sh3_zsrt139f2936_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2936.mem 233 25 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +37 37425 13824 480 sh3_zsrt139f2937_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2937.mem 233 25 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +38 37643 10240 480 sh3_zsrt139f2938_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2938.mem 206 22 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +39 37859 13824 480 sh3_zsrt139f2939_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2939.mem 206 22 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +40 38077 10240 480 sh3_zsrt139f2940_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2940.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +41 38293 13824 480 sh3_zsrt139f2941_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2941.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +42 38511 10240 480 sh3_zsrt139f2942_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2942.mem 503 55 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +43 38727 13824 480 sh3_zsrt139f2943_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2943.mem 503 55 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +44 38945 10240 480 sh3_zsrt139f2944_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2944.mem 395 43 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +45 39161 13824 480 sh3_zsrt139f2945_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2945.mem 395 43 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +46 39379 10240 480 sh3_zsrt139f2946_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2946.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0 +47 39520 13824 480 sh3_zsrt139f2947_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2947.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38 +48 71148 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2948.mem 674 74 0 sh3_zsrt139f2948_pal.mem 0x43ece1ae +49 71787 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2949.mem 323 35 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +50 72426 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2950.mem 296 32 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +51 73065 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2951.mem 521 57 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +52 73704 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2952.mem 701 77 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +53 74343 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2953.mem 422 46 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +54 74982 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2954.mem 683 75 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +55 75621 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2955.mem 1070 118 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +56 76260 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2956.mem 539 59 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +57 76899 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2957.mem 674 74 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae +58 78319 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2958.mem 476 52 0 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +59 82720 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2959.mem 449 49 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +60 83323 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2960.mem 809 89 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +61 83944 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2961.mem 593 65 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +62 84565 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2962.mem 701 77 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +63 85186 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2963.mem 476 52 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +64 85807 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2964.mem 935 103 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +65 86428 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2965.mem 584 64 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +66 87049 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2966.mem 314 34 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +67 88918 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2967.mem 26 2 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +68 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2968.mem 2042 226 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +69 89548 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2969.mem 1016 112 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +70 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2970.mem 1808 200 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +71 90187 9216 480 sh3_zsrt139f2958_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2971.mem 494 54 1 sh3_zsrt139f2958_pal.mem 0x5dfce0a2 +72 91678 9216 480 sh3_zsrt139f2972_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2972.mem 188 20 0 sh3_zsrt139f2972_pal.mem 0x181b2ac2 +73 91804 9216 480 sh3_zsrt139f2973_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f2973.mem 224 24 0 sh3_zsrt139f2973_pal.mem 0x9d847d4e +74 114431 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2974.mem 1466 162 0 sh3_zsrt139f2974_pal.mem 0x47097d4c +75 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2975.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +76 115016 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2976.mem 287 31 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +77 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2977.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +78 115655 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2978.mem 413 45 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +79 116351 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2979.mem 1754 194 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +80 117050 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2980.mem 1556 172 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +81 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2981.mem 2042 226 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +82 117599 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2982.mem 98 10 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +83 118238 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2983.mem 1790 198 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +84 118877 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2984.mem 1178 130 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +85 119471 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2985.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +86 120110 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2986.mem 1889 209 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +87 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2987.mem 1502 166 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +88 120749 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2988.mem 575 63 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +89 121388 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2989.mem 1016 112 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +90 122027 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2990.mem 872 96 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +91 122600 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2991.mem 782 86 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +92 123239 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2992.mem 170 18 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +93 123869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2993.mem 251 27 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +94 124508 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2994.mem 323 35 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +95 125147 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2995.mem 89 9 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +96 125786 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2996.mem 557 61 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +97 126434 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2997.mem 368 40 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +98 126968 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2998.mem 647 71 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +99 127607 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f2999.mem 530 58 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +100 128246 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29100.mem 440 48 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +101 128885 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29101.mem 62 6 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +102 129389 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29102.mem 1493 165 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +103 130028 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29103.mem 1223 135 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +104 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29104.mem 1628 180 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +105 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29105.mem 224 24 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +106 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29106.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +107 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29107.mem 566 62 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +108 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29108.mem 521 57 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +109 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29109.mem 755 83 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +110 131945 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29110.mem 1439 159 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +111 132584 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29111.mem 953 105 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +112 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29112.mem 620 68 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +113 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29113.mem 53 5 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +114 135869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29114.mem 26 2 1 sh3_zsrt139f2974_pal.mem 0x47097d4c +115 144890 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29115.mem 179 19 0 sh3_zsrt139f29115_pal.mem 0x3e849a98 +116 145712 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29116.mem 116 12 1 sh3_zsrt139f29115_pal.mem 0x3e849a98 +117 145913 12288 480 sh3_zsrt139f29117_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29117.mem 143 15 0 sh3_zsrt139f29117_pal.mem 0x20ffffff +118 146205 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29118.mem 1007 111 0 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +119 146630 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29119.mem 287 31 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +120 147068 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29120.mem 332 36 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9 +121 147480 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29121.mem 683 75 0 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +122 147888 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29122.mem 665 73 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +123 148264 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29123.mem 1025 113 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff +124 148919 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29124.mem 935 103 0 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +125 149509 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29125.mem 827 91 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +126 150125 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29126.mem 701 77 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +127 150741 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29127.mem 710 78 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +128 151344 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29128.mem 404 44 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8 +129 152021 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29129.mem 206 22 0 sh3_zsrt139f29129_pal.mem 0xc6784386 +130 152420 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29130.mem 242 26 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +131 152806 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29131.mem 296 32 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +132 153218 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29132.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +133 153643 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29133.mem 44 4 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +134 154029 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29134.mem 278 30 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +135 154428 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29135.mem 197 21 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +136 154853 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29136.mem 188 20 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +137 155265 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29137.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +138 155664 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29138.mem 107 11 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +139 156063 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29139.mem 80 8 1 sh3_zsrt139f29129_pal.mem 0xc6784386 +140 156566 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29140.mem 1241 137 0 sh3_zsrt139f29140_pal.mem 0x00fd9028 +141 157273 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29141.mem 1025 113 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +142 157967 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29142.mem 737 81 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +143 158674 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29143.mem 845 93 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +144 159420 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29144.mem 530 58 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +145 160114 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29145.mem 98 10 1 sh3_zsrt139f29140_pal.mem 0x00fd9028 +146 160331 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29146.mem 287 31 0 sh3_zsrt139f29146_pal.mem 0xd8d19684 +147 160769 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29147.mem 260 28 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +148 161168 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29148.mem 368 40 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +149 161567 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29149.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +150 162300 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29150.mem 341 37 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +151 162725 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29151.mem 305 33 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +152 163163 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29152.mem 206 22 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +153 163575 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29153.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684 +154 164204 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29154.mem 602 66 0 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +155 164950 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29155.mem 359 39 1 sh3_zsrt139f29154_pal.mem 0xaa4e7e05 +156 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +157 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +158 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +159 175995 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29156.mem 341 37 0 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 +160 176446 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29157.mem 170 18 1 sh3_zsrt139f29156_pal.mem 0x56ebf1d1 +161 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +162 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +163 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +164 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +165 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +166 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +167 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +168 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +169 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +170 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +171 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +172 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +173 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +174 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +175 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +176 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +177 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +178 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +179 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +180 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f33_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f33_epochs.txt new file mode 100644 index 0000000..eb143a5 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f33_epochs.txt @@ -0,0 +1,280 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 277 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +124 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +125 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +126 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +127 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +148 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f34_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f34_epochs.txt new file mode 100644 index 0000000..a8ad367 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f34_epochs.txt @@ -0,0 +1,298 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f33', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 295 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +124 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +125 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +126 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +127 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +128 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +129 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +131 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +132 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +133 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +134 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +136 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +148 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +278 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +279 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +280 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +281 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +282 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +283 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +284 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +285 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +286 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +287 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +288 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +289 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +290 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +291 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +292 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +293 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +294 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35_epochs.txt new file mode 100644 index 0000000..61be4fd --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35_epochs.txt @@ -0,0 +1,19 @@ +# Ch429 epoch descriptor table (13 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 13 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +1 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +2 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +3 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +4 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +5 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +6 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +7 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +8 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +9 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +10 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +11 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +12 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35c_epochs.txt new file mode 100644 index 0000000..e153443 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f35c_epochs.txt @@ -0,0 +1,19 @@ +# Ch435 epoch descriptor table (13 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 13 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 165536 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c0.mem 908 100 0 sh3_zsrt139f35c0_pal.mem 0x81cb400c +1 166269 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c1.mem 665 73 1 sh3_zsrt139f35c0_pal.mem 0x81cb400c +2 166950 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c2.mem 728 80 0 sh3_zsrt139f35c2_pal.mem 0x815145a3 +3 167670 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c3.mem 278 30 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +4 168416 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c4.mem 521 57 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +5 168815 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c5.mem 125 13 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +6 169227 9216 480 sh3_zsrt139f35c6_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c6.mem 656 72 0 sh3_zsrt139f35c6_pal.mem 0x829b8725 +7 169830 9216 480 sh3_zsrt139f35c7_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c7.mem 323 35 0 sh3_zsrt139f35c7_pal.mem 0x84317595 +8 170177 9216 480 sh3_zsrt139f35c8_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c8.mem 116 12 0 sh3_zsrt139f35c8_pal.mem 0x8504a80c +9 170637 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c9.mem 1205 133 0 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +10 171088 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c10.mem 962 106 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +11 171678 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c11.mem 539 59 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +12 172233 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c12.mem 278 30 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f36_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f36_epochs.txt new file mode 100644 index 0000000..23e0c98 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f36_epochs.txt @@ -0,0 +1,293 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f35', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 290 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +124 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +126 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +127 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +130 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +131 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +132 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +133 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +134 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +137 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +138 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +139 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +140 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +148 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +149 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +150 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +151 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +152 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +153 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +154 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +155 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +156 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +157 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f37_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f37_epochs.txt new file mode 100644 index 0000000..ed7333b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f37_epochs.txt @@ -0,0 +1,8 @@ +# Ch430 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f370.mem 476 52 0 sh3_zsrt139f370_pal.mem 0xcb75e100 +1 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f371.mem 71 7 1 sh3_zsrt139f370_pal.mem 0xcb75e100 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f38_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f38_epochs.txt new file mode 100644 index 0000000..367b38b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f38_epochs.txt @@ -0,0 +1,295 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f36', 'zsrt139f37'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +124 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +126 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +127 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +130 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +131 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +132 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +133 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +134 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +137 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +138 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +139 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +140 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +148 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +149 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +150 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +151 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +152 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +153 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +154 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +155 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +156 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +157 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f370.mem 476 52 0 sh3_zsrt139f370_pal.mem 0xcb75e100 +291 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f371.mem 71 7 1 sh3_zsrt139f370_pal.mem 0xcb75e100 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f39_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f39_epochs.txt new file mode 100644 index 0000000..5a61946 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f39_epochs.txt @@ -0,0 +1,10 @@ +# Ch430 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f390.mem 242 26 0 sh3_zsrt139f390_pal.mem 0xcb75e100 +1 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f391.mem 197 21 1 sh3_zsrt139f390_pal.mem 0xcb75e100 +2 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f392.mem 89 9 1 sh3_zsrt139f390_pal.mem 0xcb75e100 +3 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f393.mem 35 3 1 sh3_zsrt139f390_pal.mem 0xcb75e100 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f3_epochs.txt new file mode 100644 index 0000000..b06864e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f3_epochs.txt @@ -0,0 +1,6950 @@ +# Ch409 epoch descriptor table (6944 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 6944 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f30.mem 188 20 0 sh3_zsrt139f30_pal.mem 0x60778774 +1 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f31.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +2 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f32.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +3 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f33.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +4 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f34.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +5 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f35.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +6 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f36.mem 206 22 1 sh3_zsrt139f30_pal.mem 0x60778774 +7 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f37.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +8 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f38.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +9 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f39.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +10 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f310.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +11 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f311.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +12 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f312.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +13 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f313.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +14 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f314.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +15 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f315.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +16 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f316.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +17 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f317.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +18 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f318.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +19 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f319.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +20 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f320.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +21 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f321.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +22 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f322.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +23 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f323.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +24 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f324.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +25 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f325.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +26 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f326.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +27 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f327.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +28 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f328.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +29 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f329.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +30 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f330.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +31 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f331.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +32 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f332.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +33 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f333.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +34 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f334.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +35 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f335.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +36 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f336.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +37 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f337.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +38 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f338.mem 260 28 1 sh3_zsrt139f30_pal.mem 0x60778774 +39 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f339.mem 170 18 1 sh3_zsrt139f30_pal.mem 0x60778774 +40 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f340.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +41 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f341.mem 179 19 1 sh3_zsrt139f30_pal.mem 0x60778774 +42 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f342.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +43 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f343.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +44 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f344.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +45 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f345.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +46 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f346.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +47 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f347.mem 206 22 1 sh3_zsrt139f30_pal.mem 0x60778774 +48 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f348.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +49 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f349.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +50 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f350.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +51 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f351.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +52 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f352.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +53 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f353.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +54 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f354.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +55 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f355.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +56 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f356.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +57 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f357.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +58 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f358.mem 179 19 1 sh3_zsrt139f30_pal.mem 0x60778774 +59 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f359.mem 386 42 1 sh3_zsrt139f30_pal.mem 0x60778774 +60 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f360.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +61 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f361.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +62 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f362.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +63 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f363.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +64 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f364.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +65 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f365.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +66 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f366.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +67 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f367.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +68 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f368.mem 170 18 1 sh3_zsrt139f30_pal.mem 0x60778774 +69 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f369.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +70 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f370.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +71 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f371.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +72 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f372.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +73 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f373.mem 242 26 1 sh3_zsrt139f30_pal.mem 0x60778774 +74 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f374.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +75 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f375.mem 278 30 1 sh3_zsrt139f30_pal.mem 0x60778774 +76 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f376.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +77 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f377.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +78 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f378.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +79 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f379.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +80 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f380.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +81 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f381.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +82 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f382.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +83 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f383.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +84 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f384.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +85 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f385.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +86 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f386.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +87 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f387.mem 224 24 1 sh3_zsrt139f30_pal.mem 0x60778774 +88 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f388.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +89 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f389.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +90 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f390.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +91 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f391.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +92 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f392.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +93 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f393.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +94 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f394.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +95 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f395.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +96 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f396.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +97 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f397.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +98 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f398.mem 224 24 1 sh3_zsrt139f30_pal.mem 0x60778774 +99 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f399.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +100 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3100.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +101 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3101.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +102 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3102.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +103 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3103.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +104 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3104.mem 215 23 1 sh3_zsrt139f30_pal.mem 0x60778774 +105 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3105.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +106 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3106.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +107 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3107.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +108 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3108.mem 809 89 1 sh3_zsrt139f30_pal.mem 0x60778774 +109 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3109.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +110 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3110.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +111 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3111.mem 332 36 1 sh3_zsrt139f30_pal.mem 0x60778774 +112 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3112.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +113 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3113.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +114 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3114.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +115 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3115.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +116 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3116.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +117 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3117.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +118 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3118.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +119 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3119.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +120 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3120.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +121 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3121.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +122 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3122.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +123 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3123.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +124 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3124.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +125 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3125.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +126 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3126.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +127 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3127.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +128 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3128.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +129 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3129.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +130 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3130.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +131 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3131.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +132 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3132.mem 170 18 1 sh3_zsrt139f30_pal.mem 0x60778774 +133 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3133.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +134 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3134.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +135 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3135.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +136 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3136.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +137 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3137.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +138 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3138.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +139 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3139.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +140 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3140.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +141 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3141.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +142 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3142.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +143 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3143.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +144 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3144.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +145 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3145.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +146 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3146.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +147 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3147.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +148 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3148.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +149 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3149.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +150 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3150.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +151 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3151.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +152 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3152.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +153 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3153.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +154 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3154.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +155 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3155.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +156 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3156.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +157 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3157.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +158 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3158.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +159 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3159.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +160 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3160.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +161 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3161.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +162 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3162.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +163 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3163.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +164 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3164.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +165 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3165.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +166 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3166.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +167 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3167.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +168 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3168.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +169 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3169.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +170 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3170.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +171 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3171.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +172 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3172.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +173 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3173.mem 350 38 1 sh3_zsrt139f30_pal.mem 0x60778774 +174 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3174.mem 152 16 1 sh3_zsrt139f30_pal.mem 0x60778774 +175 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3175.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +176 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3176.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +177 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3177.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +178 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3178.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +179 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3179.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +180 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3180.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +181 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3181.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +182 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3182.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +183 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3183.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +184 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3184.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +185 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3185.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +186 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3186.mem 332 36 1 sh3_zsrt139f30_pal.mem 0x60778774 +187 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3187.mem 260 28 1 sh3_zsrt139f30_pal.mem 0x60778774 +188 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3188.mem 377 41 1 sh3_zsrt139f30_pal.mem 0x60778774 +189 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3189.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +190 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3190.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +191 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3191.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +192 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3192.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +193 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3193.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +194 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3194.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +195 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3195.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +196 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3196.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +197 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3197.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +198 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3198.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +199 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3199.mem 287 31 1 sh3_zsrt139f30_pal.mem 0x60778774 +200 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3200.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +201 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3201.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +202 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3202.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +203 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3203.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +204 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3204.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +205 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3205.mem 197 21 1 sh3_zsrt139f30_pal.mem 0x60778774 +206 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3206.mem 701 77 1 sh3_zsrt139f30_pal.mem 0x60778774 +207 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3207.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +208 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3208.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +209 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3209.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +210 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3210.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +211 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3211.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +212 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3212.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +213 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3213.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +214 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3214.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +215 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3215.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +216 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3216.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +217 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3217.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +218 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3218.mem 215 23 1 sh3_zsrt139f30_pal.mem 0x60778774 +219 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3219.mem 152 16 1 sh3_zsrt139f30_pal.mem 0x60778774 +220 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3220.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +221 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3221.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +222 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3222.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +223 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3223.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +224 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3224.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +225 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3225.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +226 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3226.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +227 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3227.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +228 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3228.mem 206 22 1 sh3_zsrt139f30_pal.mem 0x60778774 +229 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3229.mem 296 32 1 sh3_zsrt139f30_pal.mem 0x60778774 +230 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3230.mem 179 19 1 sh3_zsrt139f30_pal.mem 0x60778774 +231 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3231.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +232 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3232.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +233 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3233.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +234 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3234.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +235 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3235.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +236 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3236.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +237 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3237.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +238 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3238.mem 242 26 1 sh3_zsrt139f30_pal.mem 0x60778774 +239 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3239.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +240 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3240.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +241 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3241.mem 296 32 1 sh3_zsrt139f30_pal.mem 0x60778774 +242 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3242.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +243 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3243.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +244 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3244.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +245 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3245.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +246 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3246.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +247 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3247.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +248 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3248.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +249 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3249.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +250 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3250.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +251 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3251.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +252 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3252.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +253 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3253.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +254 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3254.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +255 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3255.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +256 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3256.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +257 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3257.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +258 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3258.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +259 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3259.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +260 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3260.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +261 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3261.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +262 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3262.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +263 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3263.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +264 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3264.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +265 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3265.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +266 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3266.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +267 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3267.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +268 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3268.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +269 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3269.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +270 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3270.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +271 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3271.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +272 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3272.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +273 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3273.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +274 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3274.mem 215 23 1 sh3_zsrt139f30_pal.mem 0x60778774 +275 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3275.mem 152 16 1 sh3_zsrt139f30_pal.mem 0x60778774 +276 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3276.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +277 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3277.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +278 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3278.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +279 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3279.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +280 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3280.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +281 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3281.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +282 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3282.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +283 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3283.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +284 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3284.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +285 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3285.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +286 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3286.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +287 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3287.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +288 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3288.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +289 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3289.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +290 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3290.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +291 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3291.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +292 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3292.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +293 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3293.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +294 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3294.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +295 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3295.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +296 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3296.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +297 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3297.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +298 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3298.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +299 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3299.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +300 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3300.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +301 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3301.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +302 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3302.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +303 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3303.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +304 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3304.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +305 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3305.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +306 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3306.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +307 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3307.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +308 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3308.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +309 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3309.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +310 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3310.mem 224 24 1 sh3_zsrt139f30_pal.mem 0x60778774 +311 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3311.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +312 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3312.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +313 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3313.mem 341 37 1 sh3_zsrt139f30_pal.mem 0x60778774 +314 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3314.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +315 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3315.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +316 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3316.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +317 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3317.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +318 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3318.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +319 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3319.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +320 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3320.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +321 77 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3321.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +322 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3322.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +323 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3323.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +324 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3324.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +325 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3325.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +326 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3326.mem 98 10 1 sh3_zsrt139f30_pal.mem 0x60778774 +327 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3327.mem 152 16 1 sh3_zsrt139f30_pal.mem 0x60778774 +328 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3328.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +329 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3329.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +330 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3330.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +331 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3331.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +332 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3332.mem 152 16 1 sh3_zsrt139f30_pal.mem 0x60778774 +333 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3333.mem 656 72 1 sh3_zsrt139f30_pal.mem 0x60778774 +334 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3334.mem 179 19 1 sh3_zsrt139f30_pal.mem 0x60778774 +335 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3335.mem 287 31 1 sh3_zsrt139f30_pal.mem 0x60778774 +336 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3336.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +337 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3337.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +338 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3338.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +339 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3339.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +340 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3340.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +341 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3341.mem 125 13 1 sh3_zsrt139f30_pal.mem 0x60778774 +342 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3342.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +343 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3343.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +344 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3344.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +345 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3345.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +346 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3346.mem 350 38 1 sh3_zsrt139f30_pal.mem 0x60778774 +347 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3347.mem 386 42 1 sh3_zsrt139f30_pal.mem 0x60778774 +348 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3348.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +349 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3349.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +350 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3350.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +351 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3351.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +352 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3352.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +353 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3353.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +354 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3354.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +355 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3355.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +356 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3356.mem 170 18 1 sh3_zsrt139f30_pal.mem 0x60778774 +357 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3357.mem 116 12 1 sh3_zsrt139f30_pal.mem 0x60778774 +358 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3358.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +359 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3359.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +360 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3360.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +361 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3361.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +362 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3362.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +363 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3363.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +364 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3364.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +365 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3365.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +366 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3366.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +367 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3367.mem 233 25 1 sh3_zsrt139f30_pal.mem 0x60778774 +368 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3368.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +369 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3369.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +370 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3370.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +371 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3371.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +372 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3372.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +373 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3373.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +374 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3374.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +375 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3375.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +376 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3376.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +377 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3377.mem 431 47 1 sh3_zsrt139f30_pal.mem 0x60778774 +378 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3378.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +379 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3379.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +380 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3380.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +381 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3381.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +382 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3382.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +383 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3383.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +384 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3384.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +385 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3385.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +386 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3386.mem 143 15 1 sh3_zsrt139f30_pal.mem 0x60778774 +387 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3387.mem 341 37 1 sh3_zsrt139f30_pal.mem 0x60778774 +388 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3388.mem 251 27 1 sh3_zsrt139f30_pal.mem 0x60778774 +389 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3389.mem 440 48 1 sh3_zsrt139f30_pal.mem 0x60778774 +390 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3390.mem 134 14 1 sh3_zsrt139f30_pal.mem 0x60778774 +391 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3391.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +392 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3392.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +393 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3393.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +394 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3394.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +395 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3395.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +396 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3396.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +397 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3397.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +398 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3398.mem 566 62 1 sh3_zsrt139f30_pal.mem 0x60778774 +399 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3399.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +400 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3400.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +401 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3401.mem 287 31 1 sh3_zsrt139f30_pal.mem 0x60778774 +402 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3402.mem 269 29 1 sh3_zsrt139f30_pal.mem 0x60778774 +403 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3403.mem 341 37 1 sh3_zsrt139f30_pal.mem 0x60778774 +404 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3404.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +405 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3405.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +406 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3406.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +407 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3407.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +408 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3408.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +409 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3409.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +410 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3410.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +411 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3411.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +412 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3412.mem 35 3 1 sh3_zsrt139f30_pal.mem 0x60778774 +413 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3413.mem 44 4 1 sh3_zsrt139f30_pal.mem 0x60778774 +414 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3414.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +415 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3415.mem 53 5 1 sh3_zsrt139f30_pal.mem 0x60778774 +416 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3416.mem 62 6 1 sh3_zsrt139f30_pal.mem 0x60778774 +417 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3417.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +418 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3418.mem 89 9 1 sh3_zsrt139f30_pal.mem 0x60778774 +419 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3419.mem 161 17 1 sh3_zsrt139f30_pal.mem 0x60778774 +420 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3420.mem 674 74 1 sh3_zsrt139f30_pal.mem 0x60778774 +421 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3421.mem 188 20 1 sh3_zsrt139f30_pal.mem 0x60778774 +422 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3422.mem 107 11 1 sh3_zsrt139f30_pal.mem 0x60778774 +423 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3423.mem 80 8 1 sh3_zsrt139f30_pal.mem 0x60778774 +424 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3424.mem 71 7 1 sh3_zsrt139f30_pal.mem 0x60778774 +425 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3425.mem 863 95 1 sh3_zsrt139f30_pal.mem 0x60778774 +426 1772 12288 480 sh3_zsrt139f30_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f3426.mem 368 40 1 sh3_zsrt139f30_pal.mem 0x60778774 +427 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3427.mem 368 40 0 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +428 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3428.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +429 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3429.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +430 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3430.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +431 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3431.mem 656 72 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +432 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3432.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +433 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3433.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +434 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3434.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +435 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3435.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +436 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3436.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +437 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3437.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +438 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3438.mem 521 57 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +439 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3439.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +440 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3440.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +441 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3441.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +442 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3442.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +443 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3443.mem 782 86 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +444 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3444.mem 953 105 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +445 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3445.mem 629 69 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +446 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3446.mem 602 66 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +447 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3447.mem 377 41 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +448 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3448.mem 485 53 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +449 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3449.mem 683 75 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +450 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3450.mem 854 94 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +451 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3451.mem 440 48 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +452 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3452.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +453 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3453.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +454 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3454.mem 449 49 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +455 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3455.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +456 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3456.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +457 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3457.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +458 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3458.mem 179 19 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +459 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3459.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +460 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3460.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +461 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3461.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +462 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3462.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +463 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3463.mem 728 80 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +464 3105 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3464.mem 143 15 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +465 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3465.mem 782 86 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +466 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3466.mem 845 93 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +467 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3467.mem 1268 140 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +468 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3468.mem 809 89 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +469 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3469.mem 719 79 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +470 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3470.mem 1043 115 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +471 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3471.mem 890 98 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +472 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3472.mem 1241 137 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +473 4944 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3473.mem 764 84 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +474 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3474.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +475 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3475.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +476 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3476.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +477 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3477.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +478 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3478.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +479 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3479.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +480 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3480.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +481 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3481.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +482 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3482.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +483 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3483.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +484 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3484.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +485 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3485.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +486 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3486.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +487 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3487.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +488 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3488.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +489 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3489.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +490 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3490.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +491 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3491.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +492 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3492.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +493 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3493.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +494 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3494.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +495 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3495.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +496 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3496.mem 143 15 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +497 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3497.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +498 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3498.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +499 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3499.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +500 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3500.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +501 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3501.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +502 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3502.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +503 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3503.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +504 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3504.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +505 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3505.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +506 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3506.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +507 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3507.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +508 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3508.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +509 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3509.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +510 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3510.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +511 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3511.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +512 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3512.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +513 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3513.mem 278 30 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +514 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3514.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +515 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3515.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +516 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3516.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +517 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3517.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +518 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3518.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +519 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3519.mem 179 19 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +520 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3520.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +521 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3521.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +522 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3522.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +523 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3523.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +524 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3524.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +525 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3525.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +526 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3526.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +527 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3527.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +528 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3528.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +529 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3529.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +530 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3530.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +531 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3531.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +532 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3532.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +533 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3533.mem 143 15 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +534 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3534.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +535 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3535.mem 197 21 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +536 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3536.mem 197 21 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +537 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3537.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +538 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3538.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +539 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3539.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +540 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3540.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +541 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3541.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +542 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3542.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +543 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3543.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +544 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3544.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +545 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3545.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +546 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3546.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +547 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3547.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +548 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3548.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +549 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3549.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +550 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3550.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +551 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3551.mem 251 27 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +552 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3552.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +553 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3553.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +554 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3554.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +555 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3555.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +556 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3556.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +557 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3557.mem 269 29 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +558 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3558.mem 314 34 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +559 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3559.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +560 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3560.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +561 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3561.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +562 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3562.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +563 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3563.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +564 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3564.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +565 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3565.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +566 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3566.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +567 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3567.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +568 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3568.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +569 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3569.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +570 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3570.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +571 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3571.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +572 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3572.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +573 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3573.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +574 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3574.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +575 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3575.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +576 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3576.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +577 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3577.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +578 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3578.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +579 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3579.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +580 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3580.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +581 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3581.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +582 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3582.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +583 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3583.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +584 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3584.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +585 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3585.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +586 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3586.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +587 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3587.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +588 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3588.mem 638 70 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +589 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3589.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +590 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3590.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +591 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3591.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +592 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3592.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +593 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3593.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +594 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3594.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +595 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3595.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +596 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3596.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +597 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3597.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +598 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3598.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +599 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3599.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +600 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3600.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +601 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3601.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +602 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3602.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +603 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3603.mem 179 19 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +604 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3604.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +605 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3605.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +606 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3606.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +607 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3607.mem 278 30 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +608 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3608.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +609 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3609.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +610 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3610.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +611 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3611.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +612 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3612.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +613 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3613.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +614 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3614.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +615 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3615.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +616 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3616.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +617 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3617.mem 242 26 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +618 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3618.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +619 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3619.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +620 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3620.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +621 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3621.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +622 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3622.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +623 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3623.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +624 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3624.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +625 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3625.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +626 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3626.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +627 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3627.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +628 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3628.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +629 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3629.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +630 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3630.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +631 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3631.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +632 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3632.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +633 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3633.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +634 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3634.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +635 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3635.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +636 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3636.mem 350 38 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +637 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3637.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +638 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3638.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +639 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3639.mem 143 15 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +640 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3640.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +641 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3641.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +642 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3642.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +643 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3643.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +644 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3644.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +645 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3645.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +646 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3646.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +647 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3647.mem 359 39 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +648 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3648.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +649 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3649.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +650 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3650.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +651 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3651.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +652 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3652.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +653 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3653.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +654 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3654.mem 251 27 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +655 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3655.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +656 5499 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3656.mem 1106 122 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +657 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3657.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +658 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3658.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +659 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3659.mem 602 66 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +660 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3660.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +661 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3661.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +662 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3662.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +663 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3663.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +664 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3664.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +665 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3665.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +666 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3666.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +667 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3667.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +668 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3668.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +669 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3669.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +670 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3670.mem 251 27 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +671 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3671.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +672 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3672.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +673 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3673.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +674 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3674.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +675 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3675.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +676 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3676.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +677 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3677.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +678 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3678.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +679 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3679.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +680 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3680.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +681 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3681.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +682 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3682.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +683 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3683.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +684 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3684.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +685 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3685.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +686 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3686.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +687 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3687.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +688 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3688.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +689 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3689.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +690 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3690.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +691 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3691.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +692 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3692.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +693 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3693.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +694 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3694.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +695 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3695.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +696 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3696.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +697 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3697.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +698 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3698.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +699 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3699.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +700 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3700.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +701 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3701.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +702 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3702.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +703 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3703.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +704 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3704.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +705 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3705.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +706 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3706.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +707 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3707.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +708 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3708.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +709 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3709.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +710 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3710.mem 602 66 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +711 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3711.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +712 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3712.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +713 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3713.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +714 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3714.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +715 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3715.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +716 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3716.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +717 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3717.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +718 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3718.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +719 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3719.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +720 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3720.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +721 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3721.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +722 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3722.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +723 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3723.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +724 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3724.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +725 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3725.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +726 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3726.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +727 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3727.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +728 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3728.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +729 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3729.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +730 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3730.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +731 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3731.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +732 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3732.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +733 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3733.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +734 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3734.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +735 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3735.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +736 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3736.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +737 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3737.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +738 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3738.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +739 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3739.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +740 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3740.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +741 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3741.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +742 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3742.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +743 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3743.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +744 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3744.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +745 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3745.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +746 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3746.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +747 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3747.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +748 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3748.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +749 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3749.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +750 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3750.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +751 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3751.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +752 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3752.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +753 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3753.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +754 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3754.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +755 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3755.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +756 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3756.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +757 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3757.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +758 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3758.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +759 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3759.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +760 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3760.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +761 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3761.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +762 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3762.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +763 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3763.mem 251 27 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +764 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3764.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +765 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3765.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +766 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3766.mem 548 60 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +767 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3767.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +768 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3768.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +769 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3769.mem 341 37 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +770 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3770.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +771 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3771.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +772 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3772.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +773 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3773.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +774 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3774.mem 233 25 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +775 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3775.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +776 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3776.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +777 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3777.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +778 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3778.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +779 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3779.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +780 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3780.mem 206 22 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +781 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3781.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +782 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3782.mem 170 18 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +783 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3783.mem 170 18 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +784 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3784.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +785 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3785.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +786 6111 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3786.mem 17 1 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +787 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3787.mem 521 57 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +788 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3788.mem 485 53 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +789 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3789.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +790 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3790.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +791 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3791.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +792 6822 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3792.mem 908 100 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +793 8151 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3793.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +794 8151 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3794.mem 2042 226 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +795 8151 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3795.mem 143 15 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +796 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3796.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +797 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3797.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +798 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3798.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +799 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3799.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +800 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3800.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +801 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3801.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +802 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3802.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +803 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3803.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +804 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3804.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +805 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3805.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +806 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3806.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +807 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3807.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +808 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3808.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +809 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3809.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +810 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3810.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +811 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3811.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +812 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3812.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +813 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3813.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +814 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3814.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +815 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3815.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +816 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3816.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +817 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3817.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +818 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3818.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +819 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3819.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +820 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3820.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +821 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3821.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +822 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3822.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +823 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3823.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +824 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3824.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +825 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3825.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +826 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3826.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +827 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3827.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +828 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3828.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +829 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3829.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +830 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3830.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +831 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3831.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +832 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3832.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +833 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3833.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +834 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3834.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +835 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3835.mem 242 26 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +836 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3836.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +837 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3837.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +838 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3838.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +839 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3839.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +840 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3840.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +841 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3841.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +842 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3842.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +843 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3843.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +844 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3844.mem 368 40 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +845 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3845.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +846 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3846.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +847 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3847.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +848 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3848.mem 620 68 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +849 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3849.mem 467 51 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +850 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3850.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +851 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3851.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +852 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3852.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +853 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3853.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +854 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3854.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +855 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3855.mem 161 17 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +856 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3856.mem 215 23 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +857 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3857.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +858 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3858.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +859 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3859.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +860 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3860.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +861 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3861.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +862 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3862.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +863 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3863.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +864 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3864.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +865 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3865.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +866 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3866.mem 548 60 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +867 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3867.mem 368 40 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +868 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3868.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +869 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3869.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +870 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3870.mem 251 27 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +871 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3871.mem 584 64 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +872 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3872.mem 1106 122 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +873 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3873.mem 224 24 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +874 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3874.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +875 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3875.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +876 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3876.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +877 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3877.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +878 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3878.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +879 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3879.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +880 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3880.mem 125 13 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +881 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3881.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +882 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3882.mem 170 18 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +883 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3883.mem 269 29 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +884 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3884.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +885 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3885.mem 323 35 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +886 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3886.mem 260 28 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +887 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3887.mem 179 19 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +888 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3888.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +889 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3889.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +890 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3890.mem 35 3 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +891 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3891.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +892 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3892.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +893 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3893.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +894 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3894.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +895 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3895.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +896 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3896.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +897 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3897.mem 134 14 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +898 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3898.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +899 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3899.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +900 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3900.mem 89 9 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +901 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3901.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +902 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3902.mem 116 12 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +903 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3903.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +904 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3904.mem 170 18 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +905 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3905.mem 98 10 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +906 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3906.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +907 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3907.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +908 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3908.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +909 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3909.mem 44 4 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +910 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3910.mem 53 5 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +911 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3911.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +912 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3912.mem 62 6 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +913 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3913.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +914 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3914.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +915 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3915.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +916 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3916.mem 287 31 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +917 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3917.mem 152 16 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +918 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3918.mem 350 38 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +919 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3919.mem 188 20 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +920 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3920.mem 107 11 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +921 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3921.mem 80 8 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +922 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3922.mem 71 7 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +923 8781 11264 480 sh3_zsrt139f3427_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f3923.mem 17 1 1 sh3_zsrt139f3427_pal.mem 0x32ed74c4 +924 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3924.mem 854 94 0 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +925 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3925.mem 449 49 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +926 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3926.mem 476 52 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +927 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3927.mem 692 76 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +928 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3928.mem 1034 114 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +929 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3929.mem 620 68 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +930 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3930.mem 1160 128 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +931 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3931.mem 971 107 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +932 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3932.mem 737 81 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +933 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3933.mem 1106 122 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +934 10852 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3934.mem 737 81 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +935 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3935.mem 1682 186 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +936 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3936.mem 1727 191 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +937 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3937.mem 1358 150 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +938 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3938.mem 1196 132 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +939 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3939.mem 1871 207 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +940 11512 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3940.mem 431 47 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +941 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3941.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +942 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3942.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +943 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3943.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +944 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3944.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +945 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3945.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +946 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3946.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +947 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3947.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +948 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3948.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +949 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3949.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +950 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3950.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +951 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3951.mem 251 27 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +952 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3952.mem 179 19 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +953 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3953.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +954 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3954.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +955 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3955.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +956 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3956.mem 359 39 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +957 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3957.mem 296 32 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +958 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3958.mem 395 43 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +959 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3959.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +960 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3960.mem 260 28 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +961 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3961.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +962 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3962.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +963 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3963.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +964 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3964.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +965 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3965.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +966 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3966.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +967 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3967.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +968 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3968.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +969 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3969.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +970 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3970.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +971 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3971.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +972 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3972.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +973 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3973.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +974 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3974.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +975 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3975.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +976 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3976.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +977 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3977.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +978 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3978.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +979 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3979.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +980 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3980.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +981 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3981.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +982 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3982.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +983 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3983.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +984 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3984.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +985 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3985.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +986 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3986.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +987 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3987.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +988 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3988.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +989 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3989.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +990 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3990.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +991 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3991.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +992 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3992.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +993 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3993.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +994 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3994.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +995 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3995.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +996 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3996.mem 188 20 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +997 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3997.mem 332 36 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +998 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3998.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +999 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f3999.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1000 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31000.mem 269 29 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1001 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31001.mem 278 30 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1002 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31002.mem 278 30 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1003 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31003.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1004 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31004.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1005 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31005.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1006 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31006.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1007 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31007.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1008 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31008.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1009 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31009.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1010 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31010.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1011 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31011.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1012 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31012.mem 269 29 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1013 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31013.mem 206 22 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1014 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31014.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1015 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31015.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1016 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31016.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1017 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31017.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1018 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31018.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1019 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31019.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1020 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31020.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1021 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31021.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1022 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31022.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1023 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31023.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1024 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31024.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1025 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31025.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1026 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31026.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1027 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31027.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1028 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31028.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1029 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31029.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1030 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31030.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1031 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31031.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1032 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31032.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1033 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31033.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1034 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31034.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1035 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31035.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1036 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31036.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1037 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31037.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1038 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31038.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1039 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31039.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1040 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31040.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1041 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31041.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1042 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31042.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1043 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31043.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1044 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31044.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1045 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31045.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1046 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31046.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1047 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31047.mem 368 40 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1048 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31048.mem 260 28 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1049 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31049.mem 161 17 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1050 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31050.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1051 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31051.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1052 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31052.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1053 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31053.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1054 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31054.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1055 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31055.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1056 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31056.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1057 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31057.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1058 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31058.mem 746 82 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1059 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31059.mem 233 25 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1060 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31060.mem 242 26 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1061 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31061.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1062 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31062.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1063 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31063.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1064 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31064.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1065 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31065.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1066 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31066.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1067 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31067.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1068 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31068.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1069 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31069.mem 566 62 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1070 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31070.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1071 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31071.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1072 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31072.mem 665 73 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1073 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31073.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1074 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31074.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1075 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31075.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1076 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31076.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1077 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31077.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1078 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31078.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1079 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31079.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1080 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31080.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1081 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31081.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1082 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31082.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1083 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31083.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1084 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31084.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1085 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31085.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1086 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31086.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1087 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31087.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1088 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31088.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1089 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31089.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1090 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31090.mem 215 23 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1091 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31091.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1092 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31092.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1093 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31093.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1094 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31094.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1095 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31095.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1096 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31096.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1097 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31097.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1098 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31098.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1099 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31099.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1100 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31100.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1101 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31101.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1102 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31102.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1103 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31103.mem 575 63 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1104 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31104.mem 179 19 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1105 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31105.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1106 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31106.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1107 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31107.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1108 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31108.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1109 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31109.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1110 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31110.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1111 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31111.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1112 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31112.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1113 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31113.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1114 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31114.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1115 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31115.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1116 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31116.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1117 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31117.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1118 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31118.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1119 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31119.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1120 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31120.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1121 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31121.mem 134 14 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1122 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31122.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1123 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31123.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1124 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31124.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1125 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31125.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1126 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31126.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1127 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31127.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1128 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31128.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1129 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31129.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1130 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31130.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1131 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31131.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1132 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31132.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1133 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31133.mem 368 40 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1134 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31134.mem 269 29 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1135 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31135.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1136 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31136.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1137 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31137.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1138 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31138.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1139 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31139.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1140 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31140.mem 161 17 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1141 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31141.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1142 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31142.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1143 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31143.mem 260 28 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1144 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31144.mem 224 24 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1145 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31145.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1146 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31146.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1147 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31147.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1148 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31148.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1149 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31149.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1150 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31150.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1151 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31151.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1152 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31152.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1153 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31153.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1154 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31154.mem 260 28 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1155 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31155.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1156 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31156.mem 332 36 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1157 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31157.mem 134 14 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1158 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31158.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1159 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31159.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1160 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31160.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1161 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31161.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1162 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31162.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1163 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31163.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1164 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31164.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1165 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31165.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1166 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31166.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1167 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31167.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1168 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31168.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1169 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31169.mem 215 23 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1170 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31170.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1171 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31171.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1172 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31172.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1173 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31173.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1174 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31174.mem 188 20 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1175 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31175.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1176 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31176.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1177 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31177.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1178 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31178.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1179 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31179.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1180 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31180.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1181 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31181.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1182 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31182.mem 233 25 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1183 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31183.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1184 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31184.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1185 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31185.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1186 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31186.mem 557 61 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1187 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31187.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1188 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31188.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1189 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31189.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1190 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31190.mem 548 60 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1191 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31191.mem 377 41 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1192 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31192.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1193 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31193.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1194 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31194.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1195 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31195.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1196 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31196.mem 134 14 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1197 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31197.mem 179 19 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1198 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31198.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1199 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31199.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1200 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31200.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1201 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31201.mem 134 14 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1202 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31202.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1203 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31203.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1204 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31204.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1205 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31205.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1206 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31206.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1207 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31207.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1208 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31208.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1209 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31209.mem 197 21 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1210 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31210.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1211 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31211.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1212 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31212.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1213 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31213.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1214 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31214.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1215 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31215.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1216 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31216.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1217 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31217.mem 287 31 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1218 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31218.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1219 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31219.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1220 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31220.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1221 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31221.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1222 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31222.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1223 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31223.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1224 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31224.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1225 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31225.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1226 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31226.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1227 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31227.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1228 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31228.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1229 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31229.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1230 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31230.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1231 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31231.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1232 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31232.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1233 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31233.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1234 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31234.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1235 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31235.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1236 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31236.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1237 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31237.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1238 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31238.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1239 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31239.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1240 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31240.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1241 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31241.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1242 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31242.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1243 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31243.mem 485 53 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1244 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31244.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1245 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31245.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1246 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31246.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1247 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31247.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1248 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31248.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1249 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31249.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1250 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31250.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1251 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31251.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1252 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31252.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1253 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31253.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1254 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31254.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1255 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31255.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1256 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31256.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1257 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31257.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1258 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31258.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1259 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31259.mem 242 26 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1260 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31260.mem 242 26 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1261 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31261.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1262 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31262.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1263 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31263.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1264 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31264.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1265 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31265.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1266 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31266.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1267 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31267.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1268 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31268.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1269 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31269.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1270 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31270.mem 215 23 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1271 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31271.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1272 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31272.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1273 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31273.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1274 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31274.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1275 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31275.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1276 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31276.mem 206 22 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1277 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31277.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1278 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31278.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1279 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31279.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1280 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31280.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1281 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31281.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1282 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31282.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1283 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31283.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1284 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31284.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1285 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31285.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1286 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31286.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1287 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31287.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1288 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31288.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1289 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31289.mem 134 14 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1290 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31290.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1291 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31291.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1292 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31292.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1293 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31293.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1294 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31294.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1295 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31295.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1296 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31296.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1297 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31297.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1298 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31298.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1299 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31299.mem 188 20 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1300 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31300.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1301 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31301.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1302 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31302.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1303 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31303.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1304 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31304.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1305 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31305.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1306 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31306.mem 269 29 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1307 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31307.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1308 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31308.mem 80 8 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1309 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31309.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1310 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31310.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1311 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31311.mem 215 23 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1312 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31312.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1313 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31313.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1314 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31314.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1315 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31315.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1316 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31316.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1317 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31317.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1318 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31318.mem 206 22 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1319 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31319.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1320 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31320.mem 233 25 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1321 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31321.mem 179 19 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1322 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31322.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1323 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31323.mem 143 15 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1324 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31324.mem 170 18 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1325 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31325.mem 98 10 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1326 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31326.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1327 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31327.mem 179 19 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1328 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31328.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1329 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31329.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1330 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31330.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1331 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31331.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1332 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31332.mem 35 3 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1333 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31333.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1334 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31334.mem 53 5 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1335 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31335.mem 107 11 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1336 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31336.mem 89 9 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1337 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31337.mem 62 6 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1338 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31338.mem 44 4 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1339 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31339.mem 125 13 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1340 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31340.mem 224 24 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1341 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31341.mem 116 12 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1342 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31342.mem 152 16 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1343 12040 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31343.mem 71 7 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1344 12757 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31344.mem 2042 226 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1345 12757 10240 480 sh3_zsrt139f3924_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f31345.mem 206 22 1 sh3_zsrt139f3924_pal.mem 0x3cd88c98 +1346 15277 12288 480 sh3_zsrt139f31346_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f31346.mem 2042 226 0 sh3_zsrt139f31346_pal.mem 0x4812d6f2 +1347 15277 12288 480 sh3_zsrt139f31346_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f31347.mem 2042 226 1 sh3_zsrt139f31346_pal.mem 0x4812d6f2 +1348 15277 12288 480 sh3_zsrt139f31346_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f31348.mem 755 83 1 sh3_zsrt139f31346_pal.mem 0x4812d6f2 +1349 15277 12288 480 sh3_zsrt139f31346_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f31349.mem 44 4 1 sh3_zsrt139f31346_pal.mem 0x4812d6f2 +1350 15931 12288 480 sh3_zsrt139f31346_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f31350.mem 1475 163 1 sh3_zsrt139f31346_pal.mem 0x4812d6f2 +1351 16217 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31351.mem 2042 226 0 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1352 16217 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31352.mem 1043 115 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1353 16856 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31353.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1354 16856 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31354.mem 1304 144 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1355 17552 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31355.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1356 17552 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31356.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1357 17552 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31357.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1358 17552 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31358.mem 665 73 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1359 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31359.mem 80 8 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1360 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31360.mem 98 10 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1361 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31361.mem 152 16 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1362 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31362.mem 44 4 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1363 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31363.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1364 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31364.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1365 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31365.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1366 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31366.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1367 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31367.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1368 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31368.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1369 18896 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31369.mem 161 17 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1370 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31370.mem 2006 222 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1371 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31371.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1372 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31372.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1373 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31373.mem 2042 226 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1374 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31374.mem 1493 165 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1375 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31375.mem 917 101 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1376 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31376.mem 62 6 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1377 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31377.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1378 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31378.mem 71 7 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1379 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31379.mem 206 22 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1380 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31380.mem 80 8 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1381 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31381.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1382 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31382.mem 44 4 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1383 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31383.mem 44 4 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1384 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31384.mem 80 8 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1385 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31385.mem 89 9 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1386 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31386.mem 143 15 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1387 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31387.mem 62 6 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1388 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31388.mem 98 10 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1389 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31389.mem 89 9 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1390 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31390.mem 71 7 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1391 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31391.mem 53 5 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1392 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31392.mem 98 10 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1393 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31393.mem 152 16 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1394 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31394.mem 62 6 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1395 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31395.mem 44 4 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1396 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31396.mem 44 4 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1397 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31397.mem 125 13 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1398 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31398.mem 71 7 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1399 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31399.mem 71 7 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1400 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31400.mem 89 9 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1401 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31401.mem 62 6 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1402 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31402.mem 89 9 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1403 19562 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31403.mem 62 6 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1404 20246 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31404.mem 1592 176 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1405 20792 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31405.mem 2006 222 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1406 21386 11264 480 sh3_zsrt139f31351_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31406.mem 1439 159 1 sh3_zsrt139f31351_pal.mem 0x5cbf8bb4 +1407 26066 11264 480 sh3_zsrt139f31407_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f31407.mem 179 19 0 sh3_zsrt139f31407_pal.mem 0x44679578 +1408 26121 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31408.mem 323 35 0 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1409 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31409.mem 746 82 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1410 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31410.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1411 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31411.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1412 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31412.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1413 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31413.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1414 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31414.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1415 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31415.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1416 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31416.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1417 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31417.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1418 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31418.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1419 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31419.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1420 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31420.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1421 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31421.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1422 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31422.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1423 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31423.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1424 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31424.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1425 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31425.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1426 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31426.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1427 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31427.mem 404 44 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1428 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31428.mem 557 61 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1429 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31429.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1430 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31430.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1431 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31431.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1432 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31432.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1433 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31433.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1434 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31434.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1435 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31435.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1436 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31436.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1437 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31437.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1438 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31438.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1439 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31439.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1440 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31440.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1441 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31441.mem 233 25 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1442 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31442.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1443 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31443.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1444 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31444.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1445 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31445.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1446 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31446.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1447 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31447.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1448 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31448.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1449 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31449.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1450 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31450.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1451 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31451.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1452 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31452.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1453 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31453.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1454 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31454.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1455 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31455.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1456 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31456.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1457 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31457.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1458 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31458.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1459 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31459.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1460 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31460.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1461 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31461.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1462 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31462.mem 251 27 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1463 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31463.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1464 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31464.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1465 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31465.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1466 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31466.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1467 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31467.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1468 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31468.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1469 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31469.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1470 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31470.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1471 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31471.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1472 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31472.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1473 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31473.mem 287 31 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1474 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31474.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1475 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31475.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1476 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31476.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1477 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31477.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1478 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31478.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1479 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31479.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1480 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31480.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1481 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31481.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1482 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31482.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1483 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31483.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1484 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31484.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1485 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31485.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1486 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31486.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1487 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31487.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1488 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31488.mem 242 26 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1489 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31489.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1490 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31490.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1491 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31491.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1492 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31492.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1493 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31493.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1494 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31494.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1495 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31495.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1496 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31496.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1497 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31497.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1498 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31498.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1499 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31499.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1500 26555 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31500.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1501 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31501.mem 431 47 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1502 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31502.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1503 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31503.mem 413 45 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1504 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31504.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1505 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31505.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1506 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31506.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1507 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31507.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1508 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31508.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1509 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31509.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1510 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31510.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1511 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31511.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1512 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31512.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1513 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31513.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1514 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31514.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1515 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31515.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1516 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31516.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1517 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31517.mem 233 25 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1518 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31518.mem 557 61 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1519 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31519.mem 602 66 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1520 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31520.mem 251 27 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1521 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31521.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1522 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31522.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1523 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31523.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1524 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31524.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1525 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31525.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1526 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31526.mem 296 32 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1527 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31527.mem 242 26 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1528 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31528.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1529 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31529.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1530 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31530.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1531 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31531.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1532 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31532.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1533 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31533.mem 395 43 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1534 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31534.mem 269 29 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1535 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31535.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1536 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31536.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1537 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31537.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1538 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31538.mem 251 27 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1539 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31539.mem 440 48 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1540 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31540.mem 305 33 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1541 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31541.mem 476 52 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1542 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31542.mem 503 55 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1543 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31543.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1544 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31544.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1545 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31545.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1546 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31546.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1547 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31547.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1548 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31548.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1549 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31549.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1550 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31550.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1551 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31551.mem 206 22 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1552 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31552.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1553 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31553.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1554 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31554.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1555 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31555.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1556 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31556.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1557 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31557.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1558 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31558.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1559 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31559.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1560 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31560.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1561 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31561.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1562 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31562.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1563 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31563.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1564 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31564.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1565 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31565.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1566 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31566.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1567 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31567.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1568 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31568.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1569 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31569.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1570 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31570.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1571 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31571.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1572 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31572.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1573 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31573.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1574 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31574.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1575 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31575.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1576 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31576.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1577 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31577.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1578 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31578.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1579 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31579.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1580 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31580.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1581 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31581.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1582 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31582.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1583 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31583.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1584 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31584.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1585 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31585.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1586 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31586.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1587 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31587.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1588 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31588.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1589 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31589.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1590 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31590.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1591 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31591.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1592 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31592.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1593 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31593.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1594 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31594.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1595 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31595.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1596 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31596.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1597 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31597.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1598 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31598.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1599 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31599.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1600 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31600.mem 152 16 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1601 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31601.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1602 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31602.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1603 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31603.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1604 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31604.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1605 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31605.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1606 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31606.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1607 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31607.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1608 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31608.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1609 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31609.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1610 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31610.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1611 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31611.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1612 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31612.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1613 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31613.mem 152 16 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1614 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31614.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1615 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31615.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1616 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31616.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1617 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31617.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1618 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31618.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1619 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31619.mem 602 66 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1620 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31620.mem 269 29 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1621 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31621.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1622 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31622.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1623 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31623.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1624 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31624.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1625 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31625.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1626 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31626.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1627 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31627.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1628 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31628.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1629 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31629.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1630 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31630.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1631 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31631.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1632 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31632.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1633 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31633.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1634 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31634.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1635 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31635.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1636 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31636.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1637 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31637.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1638 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31638.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1639 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31639.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1640 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31640.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1641 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31641.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1642 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31642.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1643 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31643.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1644 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31644.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1645 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31645.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1646 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31646.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1647 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31647.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1648 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31648.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1649 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31649.mem 386 42 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1650 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31650.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1651 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31651.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1652 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31652.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1653 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31653.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1654 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31654.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1655 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31655.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1656 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31656.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1657 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31657.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1658 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31658.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1659 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31659.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1660 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31660.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1661 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31661.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1662 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31662.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1663 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31663.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1664 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31664.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1665 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31665.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1666 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31666.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1667 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31667.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1668 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31668.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1669 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31669.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1670 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31670.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1671 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31671.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1672 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31672.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1673 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31673.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1674 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31674.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1675 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31675.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1676 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31676.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1677 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31677.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1678 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31678.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1679 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31679.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1680 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31680.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1681 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31681.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1682 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31682.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1683 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31683.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1684 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31684.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1685 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31685.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1686 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31686.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1687 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31687.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1688 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31688.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1689 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31689.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1690 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31690.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1691 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31691.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1692 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31692.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1693 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31693.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1694 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31694.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1695 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31695.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1696 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31696.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1697 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31697.mem 269 29 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1698 27857 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31698.mem 17 1 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1699 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31699.mem 404 44 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1700 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31700.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1701 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31701.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1702 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31702.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1703 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31703.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1704 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31704.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1705 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31705.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1706 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31706.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1707 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31707.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1708 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31708.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1709 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31709.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1710 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31710.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1711 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31711.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1712 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31712.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1713 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31713.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1714 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31714.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1715 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31715.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1716 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31716.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1717 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31717.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1718 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31718.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1719 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31719.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1720 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31720.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1721 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31721.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1722 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31722.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1723 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31723.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1724 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31724.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1725 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31725.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1726 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31726.mem 305 33 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1727 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31727.mem 260 28 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1728 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31728.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1729 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31729.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1730 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31730.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1731 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31731.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1732 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31732.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1733 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31733.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1734 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31734.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1735 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31735.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1736 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31736.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1737 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31737.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1738 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31738.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1739 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31739.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1740 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31740.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1741 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31741.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1742 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31742.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1743 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31743.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1744 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31744.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1745 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31745.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1746 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31746.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1747 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31747.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1748 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31748.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1749 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31749.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1750 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31750.mem 197 21 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1751 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31751.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1752 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31752.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1753 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31753.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1754 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31754.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1755 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31755.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1756 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31756.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1757 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31757.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1758 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31758.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1759 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31759.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1760 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31760.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1761 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31761.mem 242 26 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1762 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31762.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1763 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31763.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1764 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31764.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1765 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31765.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1766 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31766.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1767 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31767.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1768 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31768.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1769 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31769.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1770 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31770.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1771 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31771.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1772 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31772.mem 206 22 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1773 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31773.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1774 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31774.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1775 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31775.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1776 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31776.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1777 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31777.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1778 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31778.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1779 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31779.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1780 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31780.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1781 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31781.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1782 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31782.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1783 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31783.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1784 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31784.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1785 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31785.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1786 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31786.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1787 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31787.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1788 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31788.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1789 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31789.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1790 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31790.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1791 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31791.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1792 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31792.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1793 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31793.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1794 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31794.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1795 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31795.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1796 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31796.mem 251 27 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1797 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31797.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1798 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31798.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1799 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31799.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1800 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31800.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1801 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31801.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1802 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31802.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1803 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31803.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1804 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31804.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1805 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31805.mem 224 24 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1806 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31806.mem 287 31 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1807 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31807.mem 278 30 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1808 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31808.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1809 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31809.mem 539 59 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1810 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31810.mem 683 75 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1811 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31811.mem 305 33 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1812 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31812.mem 224 24 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1813 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31813.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1814 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31814.mem 233 25 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1815 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31815.mem 323 35 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1816 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31816.mem 287 31 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1817 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31817.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1818 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31818.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1819 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31819.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1820 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31820.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1821 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31821.mem 242 26 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1822 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31822.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1823 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31823.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1824 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31824.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1825 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31825.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1826 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31826.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1827 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31827.mem 278 30 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1828 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31828.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1829 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31829.mem 152 16 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1830 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31830.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1831 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31831.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1832 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31832.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1833 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31833.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1834 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31834.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1835 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31835.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1836 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31836.mem 215 23 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1837 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31837.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1838 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31838.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1839 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31839.mem 278 30 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1840 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31840.mem 368 40 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1841 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31841.mem 242 26 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1842 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31842.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1843 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31843.mem 116 12 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1844 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31844.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1845 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31845.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1846 29159 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31846.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1847 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31847.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1848 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31848.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1849 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31849.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1850 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31850.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1851 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31851.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1852 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31852.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1853 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31853.mem 332 36 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1854 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31854.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1855 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31855.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1856 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31856.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1857 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31857.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1858 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31858.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1859 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31859.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1860 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31860.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1861 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31861.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1862 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31862.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1863 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31863.mem 557 61 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1864 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31864.mem 179 19 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1865 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31865.mem 98 10 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1866 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31866.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1867 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31867.mem 377 41 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1868 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31868.mem 206 22 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1869 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31869.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1870 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31870.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1871 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31871.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1872 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31872.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1873 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31873.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1874 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31874.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1875 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31875.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1876 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31876.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1877 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31877.mem 215 23 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1878 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31878.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1879 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31879.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1880 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31880.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1881 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31881.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1882 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31882.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1883 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31883.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1884 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31884.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1885 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31885.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1886 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31886.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1887 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31887.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1888 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31888.mem 35 3 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1889 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31889.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1890 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31890.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1891 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31891.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1892 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31892.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1893 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31893.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1894 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31894.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1895 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31895.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1896 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31896.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1897 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31897.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1898 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31898.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1899 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31899.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1900 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31900.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1901 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31901.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1902 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31902.mem 125 13 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1903 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31903.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1904 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31904.mem 89 9 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1905 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31905.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1906 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31906.mem 62 6 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1907 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31907.mem 170 18 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1908 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31908.mem 80 8 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1909 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31909.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1910 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31910.mem 314 34 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1911 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31911.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1912 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31912.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1913 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31913.mem 152 16 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1914 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31914.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1915 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31915.mem 44 4 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1916 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31916.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1917 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31917.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1918 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31918.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1919 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31919.mem 53 5 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1920 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31920.mem 71 7 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1921 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31921.mem 161 17 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1922 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31922.mem 134 14 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1923 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31923.mem 188 20 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1924 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31924.mem 107 11 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1925 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31925.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1926 30461 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31926.mem 602 66 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1927 31915 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31927.mem 2033 225 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1928 33303 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31928.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1929 33303 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31929.mem 1349 149 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1930 34605 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31930.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1931 34605 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31931.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1932 34605 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31932.mem 143 15 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1933 35907 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31933.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1934 35907 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31934.mem 1907 211 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1935 37209 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31935.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1936 37209 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31936.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1937 37209 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31937.mem 17 1 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1938 38511 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31938.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1939 38511 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31939.mem 2042 226 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1940 38511 10240 480 sh3_zsrt139f31408_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31940.mem 971 107 1 sh3_zsrt139f31408_pal.mem 0x47405cb0 +1941 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31941.mem 521 57 0 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1942 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31942.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1943 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31943.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1944 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31944.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1945 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31945.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1946 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31946.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1947 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31947.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1948 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31948.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1949 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31949.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1950 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31950.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1951 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31951.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1952 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31952.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1953 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31953.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1954 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31954.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1955 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31955.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1956 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31956.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1957 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31957.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1958 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31958.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1959 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31959.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1960 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31960.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1961 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31961.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1962 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31962.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1963 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31963.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1964 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31964.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1965 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31965.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1966 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31966.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1967 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31967.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1968 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31968.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1969 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31969.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1970 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31970.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1971 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31971.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1972 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31972.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1973 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31973.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1974 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31974.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1975 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31975.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1976 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31976.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1977 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31977.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1978 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31978.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1979 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31979.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1980 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31980.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1981 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31981.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1982 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31982.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1983 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31983.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1984 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31984.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1985 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31985.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1986 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31986.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1987 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31987.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1988 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31988.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1989 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31989.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1990 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31990.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1991 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31991.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1992 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31992.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1993 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31993.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1994 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31994.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1995 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31995.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1996 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31996.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1997 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31997.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1998 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31998.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +1999 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f31999.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2000 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32000.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2001 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32001.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2002 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32002.mem 350 38 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2003 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32003.mem 476 52 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2004 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32004.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2005 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32005.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2006 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32006.mem 566 62 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2007 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32007.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2008 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32008.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2009 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32009.mem 440 48 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2010 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32010.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2011 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32011.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2012 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32012.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2013 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32013.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2014 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32014.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2015 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32015.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2016 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32016.mem 539 59 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2017 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32017.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2018 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32018.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2019 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32019.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2020 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32020.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2021 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32021.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2022 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32022.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2023 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32023.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2024 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32024.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2025 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32025.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2026 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32026.mem 386 42 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2027 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32027.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2028 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32028.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2029 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32029.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2030 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32030.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2031 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32031.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2032 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32032.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2033 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32033.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2034 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32034.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2035 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32035.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2036 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32036.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2037 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32037.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2038 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32038.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2039 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32039.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2040 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32040.mem 350 38 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2041 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32041.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2042 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32042.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2043 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32043.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2044 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32044.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2045 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32045.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2046 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32046.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2047 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32047.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2048 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32048.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2049 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32049.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2050 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32050.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2051 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32051.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2052 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32052.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2053 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32053.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2054 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32054.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2055 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32055.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2056 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32056.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2057 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32057.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2058 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32058.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2059 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32059.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2060 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32060.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2061 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32061.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2062 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32062.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2063 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32063.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2064 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32064.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2065 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32065.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2066 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32066.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2067 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32067.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2068 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32068.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2069 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32069.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2070 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32070.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2071 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32071.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2072 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32072.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2073 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32073.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2074 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32074.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2075 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32075.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2076 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32076.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2077 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32077.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2078 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32078.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2079 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32079.mem 431 47 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2080 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32080.mem 467 51 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2081 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32081.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2082 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32082.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2083 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32083.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2084 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32084.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2085 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32085.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2086 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32086.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2087 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32087.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2088 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32088.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2089 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32089.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2090 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32090.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2091 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32091.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2092 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32092.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2093 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32093.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2094 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32094.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2095 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32095.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2096 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32096.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2097 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32097.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2098 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32098.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2099 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32099.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2100 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32100.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2101 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32101.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2102 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32102.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2103 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32103.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2104 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32104.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2105 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32105.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2106 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32106.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2107 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32107.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2108 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32108.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2109 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32109.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2110 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32110.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2111 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32111.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2112 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32112.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2113 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32113.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2114 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32114.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2115 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32115.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2116 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32116.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2117 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32117.mem 413 45 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2118 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32118.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2119 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32119.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2120 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32120.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2121 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32121.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2122 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32122.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2123 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32123.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2124 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32124.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2125 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32125.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2126 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32126.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2127 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32127.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2128 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32128.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2129 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32129.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2130 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32130.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2131 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32131.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2132 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32132.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2133 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32133.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2134 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32134.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2135 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32135.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2136 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32136.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2137 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32137.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2138 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32138.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2139 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32139.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2140 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32140.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2141 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32141.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2142 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32142.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2143 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32143.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2144 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32144.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2145 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32145.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2146 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32146.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2147 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32147.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2148 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32148.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2149 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32149.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2150 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32150.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2151 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32151.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2152 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32152.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2153 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32153.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2154 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32154.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2155 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32155.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2156 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32156.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2157 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32157.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2158 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32158.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2159 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32159.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2160 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32160.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2161 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32161.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2162 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32162.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2163 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32163.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2164 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32164.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2165 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32165.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2166 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32166.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2167 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32167.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2168 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32168.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2169 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32169.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2170 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32170.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2171 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32171.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2172 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32172.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2173 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32173.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2174 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32174.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2175 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32175.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2176 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32176.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2177 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32177.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2178 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32178.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2179 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32179.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2180 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32180.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2181 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32181.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2182 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32182.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2183 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32183.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2184 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32184.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2185 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32185.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2186 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32186.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2187 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32187.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2188 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32188.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2189 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32189.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2190 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32190.mem 440 48 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2191 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32191.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2192 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32192.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2193 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32193.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2194 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32194.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2195 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32195.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2196 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32196.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2197 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32197.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2198 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32198.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2199 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32199.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2200 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32200.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2201 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32201.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2202 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32202.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2203 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32203.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2204 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32204.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2205 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32205.mem 548 60 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2206 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32206.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2207 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32207.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2208 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32208.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2209 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32209.mem 359 39 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2210 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32210.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2211 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32211.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2212 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32212.mem 512 56 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2213 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32213.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2214 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32214.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2215 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32215.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2216 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32216.mem 611 67 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2217 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32217.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2218 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32218.mem 539 59 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2219 53334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32219.mem 395 43 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2220 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32220.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2221 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32221.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2222 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32222.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2223 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32223.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2224 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32224.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2225 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32225.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2226 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32226.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2227 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32227.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2228 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32228.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2229 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32229.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2230 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32230.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2231 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32231.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2232 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32232.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2233 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32233.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2234 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32234.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2235 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32235.mem 602 66 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2236 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32236.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2237 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32237.mem 593 65 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2238 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32238.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2239 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32239.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2240 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32240.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2241 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32241.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2242 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32242.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2243 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32243.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2244 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32244.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2245 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32245.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2246 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32246.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2247 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32247.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2248 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32248.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2249 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32249.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2250 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32250.mem 1088 120 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2251 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32251.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2252 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32252.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2253 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32253.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2254 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32254.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2255 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32255.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2256 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32256.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2257 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32257.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2258 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32258.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2259 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32259.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2260 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32260.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2261 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32261.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2262 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32262.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2263 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32263.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2264 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32264.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2265 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32265.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2266 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32266.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2267 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32267.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2268 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32268.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2269 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32269.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2270 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32270.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2271 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32271.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2272 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32272.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2273 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32273.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2274 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32274.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2275 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32275.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2276 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32276.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2277 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32277.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2278 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32278.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2279 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32279.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2280 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32280.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2281 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32281.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2282 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32282.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2283 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32283.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2284 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32284.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2285 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32285.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2286 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32286.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2287 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32287.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2288 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32288.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2289 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32289.mem 512 56 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2290 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32290.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2291 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32291.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2292 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32292.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2293 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32293.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2294 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32294.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2295 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32295.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2296 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32296.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2297 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32297.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2298 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32298.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2299 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32299.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2300 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32300.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2301 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32301.mem 494 54 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2302 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32302.mem 665 73 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2303 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32303.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2304 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32304.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2305 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32305.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2306 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32306.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2307 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32307.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2308 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32308.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2309 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32309.mem 629 69 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2310 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32310.mem 710 78 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2311 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32311.mem 368 40 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2312 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32312.mem 701 77 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2313 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32313.mem 368 40 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2314 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32314.mem 359 39 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2315 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32315.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2316 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32316.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2317 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32317.mem 395 43 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2318 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32318.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2319 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32319.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2320 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32320.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2321 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32321.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2322 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32322.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2323 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32323.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2324 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32324.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2325 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32325.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2326 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32326.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2327 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32327.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2328 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32328.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2329 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32329.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2330 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32330.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2331 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32331.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2332 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32332.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2333 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32333.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2334 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32334.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2335 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32335.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2336 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32336.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2337 53973 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32337.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2338 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32338.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2339 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32339.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2340 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32340.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2341 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32341.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2342 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32342.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2343 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32343.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2344 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32344.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2345 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32345.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2346 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32346.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2347 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32347.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2348 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32348.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2349 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32349.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2350 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32350.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2351 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32351.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2352 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32352.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2353 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32353.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2354 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32354.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2355 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32355.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2356 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32356.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2357 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32357.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2358 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32358.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2359 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32359.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2360 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32360.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2361 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32361.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2362 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32362.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2363 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32363.mem 494 54 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2364 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32364.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2365 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32365.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2366 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32366.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2367 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32367.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2368 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32368.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2369 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32369.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2370 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32370.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2371 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32371.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2372 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32372.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2373 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32373.mem 638 70 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2374 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32374.mem 404 44 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2375 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32375.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2376 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32376.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2377 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32377.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2378 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32378.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2379 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32379.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2380 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32380.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2381 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32381.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2382 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32382.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2383 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32383.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2384 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32384.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2385 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32385.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2386 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32386.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2387 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32387.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2388 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32388.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2389 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32389.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2390 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32390.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2391 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32391.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2392 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32392.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2393 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32393.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2394 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32394.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2395 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32395.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2396 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32396.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2397 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32397.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2398 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32398.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2399 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32399.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2400 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32400.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2401 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32401.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2402 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32402.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2403 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32403.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2404 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32404.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2405 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32405.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2406 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32406.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2407 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32407.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2408 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32408.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2409 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32409.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2410 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32410.mem 422 46 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2411 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32411.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2412 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32412.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2413 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32413.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2414 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32414.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2415 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32415.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2416 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32416.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2417 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32417.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2418 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32418.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2419 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32419.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2420 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32420.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2421 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32421.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2422 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32422.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2423 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32423.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2424 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32424.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2425 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32425.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2426 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32426.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2427 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32427.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2428 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32428.mem 422 46 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2429 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32429.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2430 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32430.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2431 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32431.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2432 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32432.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2433 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32433.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2434 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32434.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2435 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32435.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2436 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32436.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2437 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32437.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2438 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32438.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2439 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32439.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2440 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32440.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2441 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32441.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2442 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32442.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2443 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32443.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2444 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32444.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2445 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32445.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2446 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32446.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2447 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32447.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2448 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32448.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2449 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32449.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2450 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32450.mem 593 65 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2451 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32451.mem 647 71 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2452 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32452.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2453 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32453.mem 728 80 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2454 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32454.mem 665 73 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2455 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32455.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2456 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32456.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2457 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32457.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2458 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32458.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2459 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32459.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2460 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32460.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2461 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32461.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2462 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32462.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2463 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32463.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2464 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32464.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2465 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32465.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2466 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32466.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2467 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32467.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2468 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32468.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2469 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32469.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2470 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32470.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2471 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32471.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2472 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32472.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2473 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32473.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2474 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32474.mem 539 59 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2475 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32475.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2476 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32476.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2477 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32477.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2478 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32478.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2479 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32479.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2480 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32480.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2481 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32481.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2482 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32482.mem 611 67 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2483 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32483.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2484 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32484.mem 809 89 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2485 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32485.mem 377 41 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2486 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32486.mem 494 54 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2487 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32487.mem 566 62 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2488 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32488.mem 404 44 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2489 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32489.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2490 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32490.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2491 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32491.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2492 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32492.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2493 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32493.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2494 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32494.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2495 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32495.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2496 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32496.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2497 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32497.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2498 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32498.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2499 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32499.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2500 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32500.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2501 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32501.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2502 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32502.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2503 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32503.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2504 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32504.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2505 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32505.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2506 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32506.mem 782 86 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2507 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32507.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2508 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32508.mem 368 40 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2509 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32509.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2510 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32510.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2511 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32511.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2512 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32512.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2513 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32513.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2514 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32514.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2515 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32515.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2516 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32516.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2517 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32517.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2518 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32518.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2519 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32519.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2520 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32520.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2521 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32521.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2522 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32522.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2523 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32523.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2524 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32524.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2525 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32525.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2526 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32526.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2527 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32527.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2528 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32528.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2529 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32529.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2530 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32530.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2531 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32531.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2532 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32532.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2533 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32533.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2534 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32534.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2535 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32535.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2536 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32536.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2537 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32537.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2538 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32538.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2539 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32539.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2540 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32540.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2541 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32541.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2542 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32542.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2543 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32543.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2544 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32544.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2545 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32545.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2546 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32546.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2547 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32547.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2548 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32548.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2549 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32549.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2550 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32550.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2551 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32551.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2552 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32552.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2553 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32553.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2554 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32554.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2555 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32555.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2556 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32556.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2557 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32557.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2558 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32558.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2559 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32559.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2560 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32560.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2561 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32561.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2562 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32562.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2563 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32563.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2564 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32564.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2565 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32565.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2566 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32566.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2567 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32567.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2568 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32568.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2569 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32569.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2570 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32570.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2571 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32571.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2572 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32572.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2573 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32573.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2574 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32574.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2575 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32575.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2576 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32576.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2577 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32577.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2578 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32578.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2579 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32579.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2580 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32580.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2581 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32581.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2582 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32582.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2583 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32583.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2584 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32584.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2585 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32585.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2586 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32586.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2587 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32587.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2588 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32588.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2589 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32589.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2590 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32590.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2591 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32591.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2592 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32592.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2593 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32593.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2594 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32594.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2595 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32595.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2596 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32596.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2597 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32597.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2598 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32598.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2599 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32599.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2600 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32600.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2601 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32601.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2602 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32602.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2603 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32603.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2604 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32604.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2605 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32605.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2606 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32606.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2607 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32607.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2608 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32608.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2609 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32609.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2610 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32610.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2611 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32611.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2612 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32612.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2613 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32613.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2614 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32614.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2615 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32615.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2616 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32616.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2617 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32617.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2618 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32618.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2619 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32619.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2620 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32620.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2621 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32621.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2622 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32622.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2623 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32623.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2624 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32624.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2625 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32625.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2626 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32626.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2627 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32627.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2628 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32628.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2629 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32629.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2630 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32630.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2631 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32631.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2632 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32632.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2633 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32633.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2634 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32634.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2635 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32635.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2636 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32636.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2637 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32637.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2638 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32638.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2639 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32639.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2640 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32640.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2641 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32641.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2642 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32642.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2643 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32643.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2644 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32644.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2645 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32645.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2646 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32646.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2647 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32647.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2648 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32648.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2649 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32649.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2650 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32650.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2651 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32651.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2652 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32652.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2653 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32653.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2654 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32654.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2655 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32655.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2656 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32656.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2657 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32657.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2658 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32658.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2659 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32659.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2660 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32660.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2661 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32661.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2662 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32662.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2663 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32663.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2664 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32664.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2665 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32665.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2666 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32666.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2667 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32667.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2668 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32668.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2669 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32669.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2670 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32670.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2671 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32671.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2672 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32672.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2673 54612 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32673.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2674 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32674.mem 548 60 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2675 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32675.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2676 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32676.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2677 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32677.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2678 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32678.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2679 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32679.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2680 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32680.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2681 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32681.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2682 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32682.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2683 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32683.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2684 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32684.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2685 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32685.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2686 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32686.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2687 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32687.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2688 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32688.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2689 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32689.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2690 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32690.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2691 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32691.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2692 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32692.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2693 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32693.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2694 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32694.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2695 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32695.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2696 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32696.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2697 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32697.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2698 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32698.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2699 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32699.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2700 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32700.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2701 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32701.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2702 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32702.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2703 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32703.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2704 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32704.mem 962 106 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2705 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32705.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2706 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32706.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2707 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32707.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2708 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32708.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2709 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32709.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2710 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32710.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2711 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32711.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2712 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32712.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2713 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32713.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2714 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32714.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2715 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32715.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2716 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32716.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2717 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32717.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2718 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32718.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2719 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32719.mem 368 40 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2720 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32720.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2721 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32721.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2722 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32722.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2723 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32723.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2724 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32724.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2725 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32725.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2726 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32726.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2727 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32727.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2728 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32728.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2729 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32729.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2730 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32730.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2731 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32731.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2732 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32732.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2733 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32733.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2734 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32734.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2735 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32735.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2736 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32736.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2737 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32737.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2738 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32738.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2739 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32739.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2740 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32740.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2741 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32741.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2742 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32742.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2743 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32743.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2744 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32744.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2745 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32745.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2746 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32746.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2747 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32747.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2748 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32748.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2749 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32749.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2750 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32750.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2751 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32751.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2752 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32752.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2753 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32753.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2754 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32754.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2755 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32755.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2756 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32756.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2757 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32757.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2758 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32758.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2759 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32759.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2760 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32760.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2761 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32761.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2762 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32762.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2763 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32763.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2764 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32764.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2765 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32765.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2766 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32766.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2767 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32767.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2768 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32768.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2769 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32769.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2770 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32770.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2771 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32771.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2772 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32772.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2773 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32773.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2774 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32774.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2775 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32775.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2776 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32776.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2777 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32777.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2778 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32778.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2779 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32779.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2780 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32780.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2781 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32781.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2782 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32782.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2783 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32783.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2784 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32784.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2785 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32785.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2786 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32786.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2787 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32787.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2788 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32788.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2789 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32789.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2790 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32790.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2791 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32791.mem 602 66 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2792 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32792.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2793 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32793.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2794 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32794.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2795 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32795.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2796 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32796.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2797 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32797.mem 656 72 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2798 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32798.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2799 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32799.mem 269 29 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2800 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32800.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2801 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32801.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2802 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32802.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2803 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32803.mem 782 86 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2804 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32804.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2805 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32805.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2806 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32806.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2807 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32807.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2808 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32808.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2809 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32809.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2810 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32810.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2811 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32811.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2812 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32812.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2813 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32813.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2814 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32814.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2815 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32815.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2816 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32816.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2817 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32817.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2818 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32818.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2819 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32819.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2820 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32820.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2821 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32821.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2822 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32822.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2823 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32823.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2824 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32824.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2825 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32825.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2826 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32826.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2827 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32827.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2828 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32828.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2829 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32829.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2830 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32830.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2831 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32831.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2832 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32832.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2833 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32833.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2834 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32834.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2835 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32835.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2836 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32836.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2837 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32837.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2838 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32838.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2839 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32839.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2840 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32840.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2841 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32841.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2842 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32842.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2843 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32843.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2844 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32844.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2845 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32845.mem 1250 138 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2846 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32846.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2847 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32847.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2848 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32848.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2849 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32849.mem 773 85 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2850 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32850.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2851 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32851.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2852 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32852.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2853 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32853.mem 755 83 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2854 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32854.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2855 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32855.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2856 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32856.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2857 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32857.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2858 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32858.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2859 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32859.mem 377 41 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2860 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32860.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2861 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32861.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2862 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32862.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2863 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32863.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2864 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32864.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2865 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32865.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2866 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32866.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2867 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32867.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2868 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32868.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2869 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32869.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2870 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32870.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2871 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32871.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2872 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32872.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2873 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32873.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2874 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32874.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2875 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32875.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2876 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32876.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2877 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32877.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2878 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32878.mem 269 29 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2879 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32879.mem 395 43 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2880 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32880.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2881 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32881.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2882 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32882.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2883 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32883.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2884 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32884.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2885 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32885.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2886 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32886.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2887 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32887.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2888 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32888.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2889 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32889.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2890 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32890.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2891 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32891.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2892 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32892.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2893 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32893.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2894 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32894.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2895 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32895.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2896 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32896.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2897 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32897.mem 692 76 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2898 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32898.mem 1313 145 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2899 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32899.mem 926 102 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2900 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32900.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2901 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32901.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2902 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32902.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2903 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32903.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2904 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32904.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2905 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32905.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2906 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32906.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2907 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32907.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2908 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32908.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2909 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32909.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2910 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32910.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2911 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32911.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2912 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32912.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2913 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32913.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2914 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32914.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2915 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32915.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2916 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32916.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2917 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32917.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2918 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32918.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2919 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32919.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2920 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32920.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2921 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32921.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2922 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32922.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2923 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32923.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2924 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32924.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2925 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32925.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2926 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32926.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2927 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32927.mem 485 53 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2928 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32928.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2929 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32929.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2930 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32930.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2931 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32931.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2932 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32932.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2933 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32933.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2934 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32934.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2935 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32935.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2936 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32936.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2937 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32937.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2938 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32938.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2939 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32939.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2940 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32940.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2941 55251 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32941.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2942 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32942.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2943 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32943.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2944 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32944.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2945 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32945.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2946 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32946.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2947 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32947.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2948 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32948.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2949 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32949.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2950 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32950.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2951 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32951.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2952 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32952.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2953 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32953.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2954 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32954.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2955 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32955.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2956 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32956.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2957 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32957.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2958 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32958.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2959 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32959.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2960 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32960.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2961 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32961.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2962 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32962.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2963 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32963.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2964 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32964.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2965 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32965.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2966 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32966.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2967 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32967.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2968 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32968.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2969 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32969.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2970 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32970.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2971 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32971.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2972 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32972.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2973 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32973.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2974 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32974.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2975 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32975.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2976 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32976.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2977 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32977.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2978 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32978.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2979 55890 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32979.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2980 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32980.mem 368 40 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2981 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32981.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2982 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32982.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2983 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32983.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2984 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32984.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2985 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32985.mem 350 38 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2986 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32986.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2987 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32987.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2988 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32988.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2989 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32989.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2990 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32990.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2991 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32991.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2992 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32992.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2993 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32993.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2994 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32994.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2995 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32995.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2996 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32996.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2997 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32997.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2998 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32998.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +2999 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f32999.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3000 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33000.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3001 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33001.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3002 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33002.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3003 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33003.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3004 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33004.mem 440 48 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3005 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33005.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3006 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33006.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3007 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33007.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3008 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33008.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3009 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33009.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3010 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33010.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3011 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33011.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3012 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33012.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3013 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33013.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3014 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33014.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3015 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33015.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3016 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33016.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3017 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33017.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3018 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33018.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3019 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33019.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3020 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33020.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3021 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33021.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3022 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33022.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3023 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33023.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3024 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33024.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3025 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33025.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3026 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33026.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3027 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33027.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3028 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33028.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3029 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33029.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3030 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33030.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3031 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33031.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3032 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33032.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3033 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33033.mem 476 52 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3034 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33034.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3035 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33035.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3036 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33036.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3037 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33037.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3038 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33038.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3039 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33039.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3040 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33040.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3041 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33041.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3042 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33042.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3043 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33043.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3044 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33044.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3045 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33045.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3046 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33046.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3047 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33047.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3048 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33048.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3049 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33049.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3050 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33050.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3051 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33051.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3052 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33052.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3053 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33053.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3054 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33054.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3055 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33055.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3056 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33056.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3057 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33057.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3058 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33058.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3059 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33059.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3060 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33060.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3061 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33061.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3062 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33062.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3063 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33063.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3064 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33064.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3065 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33065.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3066 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33066.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3067 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33067.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3068 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33068.mem 467 51 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3069 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33069.mem 359 39 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3070 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33070.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3071 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33071.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3072 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33072.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3073 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33073.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3074 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33074.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3075 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33075.mem 341 37 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3076 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33076.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3077 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33077.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3078 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33078.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3079 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33079.mem 566 62 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3080 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33080.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3081 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33081.mem 413 45 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3082 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33082.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3083 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33083.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3084 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33084.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3085 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33085.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3086 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33086.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3087 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33087.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3088 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33088.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3089 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33089.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3090 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33090.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3091 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33091.mem 1781 197 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3092 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33092.mem 1394 154 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3093 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33093.mem 566 62 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3094 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33094.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3095 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33095.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3096 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33096.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3097 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33097.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3098 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33098.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3099 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33099.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3100 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33100.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3101 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33101.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3102 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33102.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3103 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33103.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3104 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33104.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3105 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33105.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3106 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33106.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3107 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33107.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3108 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33108.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3109 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33109.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3110 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33110.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3111 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33111.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3112 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33112.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3113 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33113.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3114 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33114.mem 314 34 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3115 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33115.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3116 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33116.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3117 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33117.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3118 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33118.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3119 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33119.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3120 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33120.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3121 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33121.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3122 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33122.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3123 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33123.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3124 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33124.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3125 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33125.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3126 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33126.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3127 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33127.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3128 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33128.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3129 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33129.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3130 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33130.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3131 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33131.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3132 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33132.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3133 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33133.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3134 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33134.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3135 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33135.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3136 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33136.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3137 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33137.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3138 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33138.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3139 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33139.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3140 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33140.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3141 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33141.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3142 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33142.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3143 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33143.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3144 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33144.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3145 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33145.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3146 56529 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33146.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3147 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33147.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3148 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33148.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3149 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33149.mem 404 44 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3150 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33150.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3151 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33151.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3152 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33152.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3153 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33153.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3154 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33154.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3155 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33155.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3156 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33156.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3157 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33157.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3158 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33158.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3159 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33159.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3160 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33160.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3161 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33161.mem 350 38 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3162 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33162.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3163 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33163.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3164 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33164.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3165 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33165.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3166 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33166.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3167 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33167.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3168 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33168.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3169 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33169.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3170 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33170.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3171 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33171.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3172 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33172.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3173 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33173.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3174 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33174.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3175 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33175.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3176 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33176.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3177 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33177.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3178 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33178.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3179 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33179.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3180 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33180.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3181 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33181.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3182 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33182.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3183 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33183.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3184 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33184.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3185 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33185.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3186 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33186.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3187 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33187.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3188 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33188.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3189 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33189.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3190 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33190.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3191 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33191.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3192 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33192.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3193 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33193.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3194 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33194.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3195 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33195.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3196 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33196.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3197 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33197.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3198 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33198.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3199 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33199.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3200 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33200.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3201 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33201.mem 260 28 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3202 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33202.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3203 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33203.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3204 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33204.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3205 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33205.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3206 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33206.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3207 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33207.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3208 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33208.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3209 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33209.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3210 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33210.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3211 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33211.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3212 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33212.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3213 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33213.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3214 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33214.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3215 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33215.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3216 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33216.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3217 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33217.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3218 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33218.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3219 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33219.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3220 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33220.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3221 57807 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33221.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3222 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33222.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3223 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33223.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3224 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33224.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3225 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33225.mem 287 31 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3226 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33226.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3227 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33227.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3228 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33228.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3229 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33229.mem 350 38 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3230 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33230.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3231 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33231.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3232 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33232.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3233 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33233.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3234 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33234.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3235 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33235.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3236 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33236.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3237 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33237.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3238 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33238.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3239 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33239.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3240 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33240.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3241 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33241.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3242 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33242.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3243 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33243.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3244 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33244.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3245 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33245.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3246 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33246.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3247 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33247.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3248 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33248.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3249 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33249.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3250 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33250.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3251 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33251.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3252 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33252.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3253 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33253.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3254 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33254.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3255 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33255.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3256 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33256.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3257 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33257.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3258 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33258.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3259 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33259.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3260 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33260.mem 638 70 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3261 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33261.mem 638 70 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3262 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33262.mem 305 33 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3263 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33263.mem 827 91 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3264 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33264.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3265 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33265.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3266 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33266.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3267 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33267.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3268 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33268.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3269 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33269.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3270 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33270.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3271 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33271.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3272 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33272.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3273 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33273.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3274 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33274.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3275 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33275.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3276 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33276.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3277 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33277.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3278 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33278.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3279 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33279.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3280 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33280.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3281 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33281.mem 197 21 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3282 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33282.mem 395 43 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3283 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33283.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3284 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33284.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3285 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33285.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3286 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33286.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3287 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33287.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3288 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33288.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3289 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33289.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3290 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33290.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3291 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33291.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3292 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33292.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3293 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33293.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3294 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33294.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3295 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33295.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3296 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33296.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3297 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33297.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3298 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33298.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3299 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33299.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3300 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33300.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3301 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33301.mem 44 4 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3302 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33302.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3303 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33303.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3304 58446 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33304.mem 35 3 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3305 59085 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33305.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3306 59085 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33306.mem 395 43 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3307 59085 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33307.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3308 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33308.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3309 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33309.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3310 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33310.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3311 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33311.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3312 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33312.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3313 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33313.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3314 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33314.mem 125 13 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3315 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33315.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3316 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33316.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3317 59778 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33317.mem 26 2 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3318 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33318.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3319 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33319.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3320 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33320.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3321 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33321.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3322 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33322.mem 233 25 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3323 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33323.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3324 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33324.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3325 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33325.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3326 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33326.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3327 60417 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33327.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3328 61056 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33328.mem 296 32 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3329 61056 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33329.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3330 61056 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33330.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3331 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33331.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3332 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33332.mem 215 23 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3333 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33333.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3334 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33334.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3335 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33335.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3336 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33336.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3337 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33337.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3338 61695 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33338.mem 53 5 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3339 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33339.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3340 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33340.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3341 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33341.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3342 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33342.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3343 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33343.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3344 62334 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33344.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3345 62910 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33345.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3346 62910 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33346.mem 188 20 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3347 62910 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33347.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3348 62910 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33348.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3349 62910 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33349.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3350 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33350.mem 359 39 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3351 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33351.mem 206 22 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3352 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33352.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3353 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33353.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3354 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33354.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3355 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33355.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3356 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33356.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3357 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33357.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3358 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33358.mem 107 11 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3359 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33359.mem 152 16 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3360 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33360.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3361 63549 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33361.mem 62 6 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3362 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33362.mem 575 63 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3363 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33363.mem 161 17 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3364 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33364.mem 323 35 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3365 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33365.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3366 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33366.mem 242 26 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3367 64188 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33367.mem 143 15 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3368 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33368.mem 251 27 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3369 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33369.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3370 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33370.mem 98 10 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3371 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33371.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3372 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33372.mem 116 12 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3373 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33373.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3374 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33374.mem 179 19 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3375 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33375.mem 134 14 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3376 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33376.mem 89 9 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3377 64827 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33377.mem 71 7 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3378 71148 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33378.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3379 71148 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33379.mem 1727 191 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3380 71787 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33380.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3381 71787 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33381.mem 1754 194 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3382 72426 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33382.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3383 72426 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33383.mem 1736 192 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3384 73065 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33384.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3385 73065 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33385.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3386 73065 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33386.mem 80 8 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3387 73704 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33387.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3388 73704 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33388.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3389 73704 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33389.mem 278 30 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3390 74343 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33390.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3391 74343 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33391.mem 1763 195 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3392 74982 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33392.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3393 74982 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33393.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3394 74982 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33394.mem 170 18 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3395 75621 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33395.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3396 75621 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33396.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3397 75621 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33397.mem 494 54 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3398 76260 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33398.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3399 76260 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33399.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3400 76260 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33400.mem 224 24 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3401 76899 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33401.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3402 76899 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33402.mem 2042 226 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3403 76899 10240 480 sh3_zsrt139f31941_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f33403.mem 1061 117 1 sh3_zsrt139f31941_pal.mem 0x43ece1ae +3404 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33404.mem 341 37 0 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3405 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33405.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3406 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33406.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3407 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33407.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3408 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33408.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3409 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33409.mem 242 26 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3410 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33410.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3411 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33411.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3412 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33412.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3413 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33413.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3414 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33414.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3415 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33415.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3416 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33416.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3417 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33417.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3418 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33418.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3419 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33419.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3420 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33420.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3421 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33421.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3422 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33422.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3423 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33423.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3424 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33424.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3425 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33425.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3426 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33426.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3427 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33427.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3428 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33428.mem 260 28 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3429 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33429.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3430 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33430.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3431 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33431.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3432 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33432.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3433 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33433.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3434 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33434.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3435 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33435.mem 332 36 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3436 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33436.mem 197 21 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3437 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33437.mem 548 60 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3438 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33438.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3439 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33439.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3440 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33440.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3441 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33441.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3442 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33442.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3443 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33443.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3444 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33444.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3445 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33445.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3446 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33446.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3447 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33447.mem 269 29 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3448 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33448.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3449 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33449.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3450 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33450.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3451 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33451.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3452 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33452.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3453 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33453.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3454 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33454.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3455 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33455.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3456 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33456.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3457 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33457.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3458 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33458.mem 206 22 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3459 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33459.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3460 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33460.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3461 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33461.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3462 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33462.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3463 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33463.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3464 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33464.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3465 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33465.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3466 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33466.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3467 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33467.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3468 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33468.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3469 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33469.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3470 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33470.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3471 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33471.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3472 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33472.mem 197 21 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3473 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33473.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3474 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33474.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3475 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33475.mem 242 26 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3476 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33476.mem 512 56 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3477 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33477.mem 719 79 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3478 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33478.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3479 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33479.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3480 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33480.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3481 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33481.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3482 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33482.mem 170 18 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3483 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33483.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3484 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33484.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3485 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33485.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3486 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33486.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3487 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33487.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3488 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33488.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3489 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33489.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3490 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33490.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3491 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33491.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3492 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33492.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3493 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33493.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3494 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33494.mem 431 47 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3495 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33495.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3496 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33496.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3497 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33497.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3498 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33498.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3499 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33499.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3500 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33500.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3501 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33501.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3502 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33502.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3503 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33503.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3504 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33504.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3505 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33505.mem 260 28 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3506 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33506.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3507 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33507.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3508 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33508.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3509 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33509.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3510 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33510.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3511 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33511.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3512 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33512.mem 170 18 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3513 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33513.mem 305 33 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3514 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33514.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3515 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33515.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3516 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33516.mem 197 21 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3517 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33517.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3518 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33518.mem 287 31 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3519 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33519.mem 836 92 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3520 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33520.mem 395 43 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3521 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33521.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3522 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33522.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3523 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33523.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3524 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33524.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3525 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33525.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3526 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33526.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3527 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33527.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3528 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33528.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3529 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33529.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3530 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33530.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3531 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33531.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3532 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33532.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3533 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33533.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3534 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33534.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3535 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33535.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3536 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33536.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3537 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33537.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3538 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33538.mem 251 27 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3539 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33539.mem 395 43 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3540 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33540.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3541 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33541.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3542 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33542.mem 215 23 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3543 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33543.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3544 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33544.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3545 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33545.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3546 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33546.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3547 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33547.mem 242 26 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3548 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33548.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3549 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33549.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3550 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33550.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3551 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33551.mem 386 42 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3552 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33552.mem 197 21 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3553 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33553.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3554 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33554.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3555 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33555.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3556 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33556.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3557 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33557.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3558 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33558.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3559 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33559.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3560 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33560.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3561 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33561.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3562 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33562.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3563 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33563.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3564 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33564.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3565 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33565.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3566 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33566.mem 251 27 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3567 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33567.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3568 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33568.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3569 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33569.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3570 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33570.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3571 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33571.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3572 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33572.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3573 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33573.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3574 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33574.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3575 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33575.mem 494 54 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3576 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33576.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3577 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33577.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3578 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33578.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3579 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33579.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3580 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33580.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3581 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33581.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3582 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33582.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3583 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33583.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3584 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33584.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3585 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33585.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3586 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33586.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3587 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33587.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3588 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33588.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3589 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33589.mem 710 78 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3590 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33590.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3591 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33591.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3592 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33592.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3593 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33593.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3594 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33594.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3595 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33595.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3596 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33596.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3597 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33597.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3598 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33598.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3599 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33599.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3600 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33600.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3601 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33601.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3602 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33602.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3603 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33603.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3604 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33604.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3605 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33605.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3606 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33606.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3607 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33607.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3608 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33608.mem 431 47 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3609 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33609.mem 215 23 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3610 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33610.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3611 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33611.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3612 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33612.mem 197 21 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3613 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33613.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3614 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33614.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3615 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33615.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3616 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33616.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3617 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33617.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3618 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33618.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3619 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33619.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3620 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33620.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3621 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33621.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3622 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33622.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3623 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33623.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3624 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33624.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3625 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33625.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3626 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33626.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3627 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33627.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3628 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33628.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3629 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33629.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3630 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33630.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3631 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33631.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3632 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33632.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3633 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33633.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3634 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33634.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3635 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33635.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3636 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33636.mem 215 23 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3637 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33637.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3638 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33638.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3639 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33639.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3640 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33640.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3641 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33641.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3642 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33642.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3643 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33643.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3644 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33644.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3645 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33645.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3646 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33646.mem 179 19 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3647 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33647.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3648 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33648.mem 305 33 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3649 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33649.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3650 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33650.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3651 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33651.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3652 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33652.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3653 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33653.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3654 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33654.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3655 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33655.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3656 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33656.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3657 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33657.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3658 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33658.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3659 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33659.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3660 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33660.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3661 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33661.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3662 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33662.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3663 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33663.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3664 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33664.mem 251 27 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3665 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33665.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3666 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33666.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3667 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33667.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3668 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33668.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3669 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33669.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3670 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33670.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3671 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33671.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3672 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33672.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3673 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33673.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3674 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33674.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3675 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33675.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3676 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33676.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3677 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33677.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3678 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33678.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3679 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33679.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3680 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33680.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3681 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33681.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3682 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33682.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3683 77614 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33683.mem 170 18 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3684 78319 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33684.mem 1880 208 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3685 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33685.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3686 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33686.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3687 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33687.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3688 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33688.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3689 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33689.mem 449 49 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3690 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33690.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3691 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33691.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3692 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33692.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3693 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33693.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3694 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33694.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3695 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33695.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3696 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33696.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3697 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33697.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3698 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33698.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3699 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33699.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3700 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33700.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3701 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33701.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3702 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33702.mem 440 48 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3703 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33703.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3704 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33704.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3705 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33705.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3706 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33706.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3707 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33707.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3708 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33708.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3709 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33709.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3710 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33710.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3711 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33711.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3712 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33712.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3713 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33713.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3714 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33714.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3715 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33715.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3716 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33716.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3717 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33717.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3718 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33718.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3719 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33719.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3720 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33720.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3721 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33721.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3722 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33722.mem 206 22 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3723 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33723.mem 332 36 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3724 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33724.mem 638 70 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3725 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33725.mem 746 82 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3726 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33726.mem 305 33 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3727 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33727.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3728 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33728.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3729 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33729.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3730 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33730.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3731 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33731.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3732 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33732.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3733 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33733.mem 287 31 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3734 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33734.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3735 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33735.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3736 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33736.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3737 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33737.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3738 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33738.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3739 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33739.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3740 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33740.mem 620 68 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3741 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33741.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3742 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33742.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3743 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33743.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3744 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33744.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3745 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33745.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3746 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33746.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3747 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33747.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3748 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33748.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3749 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33749.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3750 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33750.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3751 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33751.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3752 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33752.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3753 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33753.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3754 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33754.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3755 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33755.mem 323 35 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3756 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33756.mem 287 31 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3757 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33757.mem 377 41 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3758 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33758.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3759 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33759.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3760 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33760.mem 863 95 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3761 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33761.mem 404 44 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3762 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33762.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3763 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33763.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3764 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33764.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3765 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33765.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3766 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33766.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3767 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33767.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3768 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33768.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3769 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33769.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3770 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33770.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3771 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33771.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3772 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33772.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3773 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33773.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3774 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33774.mem 224 24 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3775 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33775.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3776 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33776.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3777 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33777.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3778 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33778.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3779 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33779.mem 206 22 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3780 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33780.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3781 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33781.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3782 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33782.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3783 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33783.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3784 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33784.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3785 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33785.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3786 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33786.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3787 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33787.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3788 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33788.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3789 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33789.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3790 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33790.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3791 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33791.mem 350 38 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3792 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33792.mem 206 22 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3793 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33793.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3794 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33794.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3795 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33795.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3796 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33796.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3797 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33797.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3798 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33798.mem 179 19 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3799 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33799.mem 449 49 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3800 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33800.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3801 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33801.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3802 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33802.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3803 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33803.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3804 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33804.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3805 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33805.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3806 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33806.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3807 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33807.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3808 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33808.mem 179 19 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3809 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33809.mem 188 20 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3810 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33810.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3811 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33811.mem 350 38 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3812 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33812.mem 143 15 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3813 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33813.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3814 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33814.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3815 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33815.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3816 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33816.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3817 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33817.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3818 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33818.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3819 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33819.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3820 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33820.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3821 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33821.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3822 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33822.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3823 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33823.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3824 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33824.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3825 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33825.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3826 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33826.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3827 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33827.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3828 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33828.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3829 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33829.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3830 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33830.mem 368 40 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3831 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33831.mem 296 32 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3832 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33832.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3833 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33833.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3834 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33834.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3835 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33835.mem 386 42 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3836 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33836.mem 260 28 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3837 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33837.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3838 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33838.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3839 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33839.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3840 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33840.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3841 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33841.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3842 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33842.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3843 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33843.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3844 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33844.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3845 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33845.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3846 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33846.mem 251 27 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3847 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33847.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3848 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33848.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3849 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33849.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3850 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33850.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3851 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33851.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3852 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33852.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3853 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33853.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3854 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33854.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3855 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33855.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3856 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33856.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3857 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33857.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3858 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33858.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3859 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33859.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3860 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33860.mem 170 18 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3861 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33861.mem 422 46 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3862 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33862.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3863 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33863.mem 332 36 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3864 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33864.mem 179 19 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3865 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33865.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3866 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33866.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3867 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33867.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3868 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33868.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3869 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33869.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3870 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33870.mem 287 31 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3871 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33871.mem 242 26 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3872 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33872.mem 287 31 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3873 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33873.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3874 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33874.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3875 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33875.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3876 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33876.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3877 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33877.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3878 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33878.mem 116 12 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3879 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33879.mem 296 32 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3880 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33880.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3881 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33881.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3882 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33882.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3883 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33883.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3884 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33884.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3885 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33885.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3886 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33886.mem 125 13 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3887 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33887.mem 440 48 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3888 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33888.mem 224 24 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3889 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33889.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3890 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33890.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3891 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33891.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3892 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33892.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3893 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33893.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3894 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33894.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3895 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33895.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3896 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33896.mem 935 103 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3897 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33897.mem 152 16 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3898 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33898.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3899 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33899.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3900 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33900.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3901 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33901.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3902 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33902.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3903 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33903.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3904 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33904.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3905 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33905.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3906 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33906.mem 386 42 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3907 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33907.mem 377 41 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3908 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33908.mem 206 22 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3909 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33909.mem 566 62 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3910 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33910.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3911 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33911.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3912 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33912.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3913 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33913.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3914 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33914.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3915 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33915.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3916 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33916.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3917 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33917.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3918 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33918.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3919 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33919.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3920 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33920.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3921 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33921.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3922 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33922.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3923 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33923.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3924 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33924.mem 107 11 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3925 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33925.mem 512 56 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3926 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33926.mem 431 47 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3927 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33927.mem 422 46 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3928 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33928.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3929 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33929.mem 161 17 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3930 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33930.mem 413 45 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3931 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33931.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3932 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33932.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3933 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33933.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3934 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33934.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3935 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33935.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3936 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33936.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3937 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33937.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3938 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33938.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3939 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33939.mem 134 14 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3940 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33940.mem 233 25 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3941 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33941.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3942 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33942.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3943 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33943.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3944 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33944.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3945 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33945.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3946 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33946.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3947 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33947.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3948 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33948.mem 35 3 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3949 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33949.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3950 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33950.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3951 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33951.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3952 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33952.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3953 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33953.mem 80 8 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3954 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33954.mem 98 10 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3955 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33955.mem 260 28 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3956 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33956.mem 170 18 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3957 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33957.mem 89 9 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3958 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33958.mem 71 7 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3959 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33959.mem 62 6 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3960 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33960.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3961 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33961.mem 53 5 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3962 78949 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33962.mem 44 4 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3963 79606 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33963.mem 368 40 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3964 80167 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33964.mem 575 63 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3965 82720 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33965.mem 1736 192 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3966 83323 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33966.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3967 83323 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33967.mem 1349 149 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3968 83944 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33968.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3969 83944 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33969.mem 665 73 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3970 84565 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33970.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3971 84565 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33971.mem 1214 134 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3972 85186 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33972.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3973 85186 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33973.mem 485 53 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3974 85807 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33974.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3975 85807 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33975.mem 1754 194 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3976 86428 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33976.mem 1826 202 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3977 87049 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33977.mem 1412 156 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3978 88918 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33978.mem 1484 164 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3979 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33979.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3980 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33980.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3981 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33981.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3982 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33982.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3983 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33983.mem 818 90 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3984 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33984.mem 1664 184 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3985 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33985.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3986 89548 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33986.mem 1223 135 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3987 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33987.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3988 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33988.mem 1880 208 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3989 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33989.mem 1061 117 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3990 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33990.mem 935 103 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3991 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33991.mem 2042 226 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3992 90187 9216 480 sh3_zsrt139f33404_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33992.mem 1538 170 1 sh3_zsrt139f33404_pal.mem 0x5dfce0a2 +3993 91678 9216 480 sh3_zsrt139f33993_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f33993.mem 449 49 0 sh3_zsrt139f33993_pal.mem 0x181b2ac2 +3994 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33994.mem 98 10 0 sh3_zsrt139f33994_pal.mem 0x47097d4c +3995 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33995.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +3996 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33996.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +3997 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33997.mem 629 69 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +3998 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33998.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +3999 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f33999.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4000 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34000.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4001 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34001.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4002 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34002.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4003 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34003.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4004 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34004.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4005 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34005.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4006 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34006.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4007 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34007.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4008 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34008.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4009 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34009.mem 719 79 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4010 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34010.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4011 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34011.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4012 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34012.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4013 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34013.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4014 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34014.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4015 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34015.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4016 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34016.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4017 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34017.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4018 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34018.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4019 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34019.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4020 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34020.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4021 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34021.mem 359 39 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4022 91931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34022.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4023 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34023.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4024 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34024.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4025 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34025.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4026 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34026.mem 287 31 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4027 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34027.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4028 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34028.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4029 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34029.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4030 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34030.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4031 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34031.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4032 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34032.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4033 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34033.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4034 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34034.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4035 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34035.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4036 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34036.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4037 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34037.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4038 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34038.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4039 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34039.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4040 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34040.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4041 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34041.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4042 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34042.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4043 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34043.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4044 92570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34044.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4045 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34045.mem 593 65 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4046 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34046.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4047 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34047.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4048 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34048.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4049 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34049.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4050 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34050.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4051 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34051.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4052 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34052.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4053 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34053.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4054 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34054.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4055 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34055.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4056 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34056.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4057 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34057.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4058 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34058.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4059 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34059.mem 458 50 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4060 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34060.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4061 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34061.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4062 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34062.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4063 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34063.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4064 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34064.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4065 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34065.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4066 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34066.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4067 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34067.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4068 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34068.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4069 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34069.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4070 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34070.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4071 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34071.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4072 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34072.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4073 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34073.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4074 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34074.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4075 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34075.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4076 93209 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34076.mem 575 63 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4077 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34077.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4078 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34078.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4079 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34079.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4080 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34080.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4081 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34081.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4082 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34082.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4083 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34083.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4084 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34084.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4085 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34085.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4086 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34086.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4087 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34087.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4088 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34088.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4089 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34089.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4090 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34090.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4091 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34091.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4092 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34092.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4093 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34093.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4094 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34094.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4095 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34095.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4096 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34096.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4097 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34097.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4098 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34098.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4099 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34099.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4100 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34100.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4101 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34101.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4102 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34102.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4103 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34103.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4104 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34104.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4105 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34105.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4106 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34106.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4107 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34107.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4108 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34108.mem 314 34 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4109 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34109.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4110 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34110.mem 539 59 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4111 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34111.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4112 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34112.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4113 93848 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34113.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4114 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34114.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4115 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34115.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4116 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34116.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4117 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34117.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4118 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34118.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4119 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34119.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4120 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34120.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4121 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34121.mem 494 54 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4122 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34122.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4123 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34123.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4124 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34124.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4125 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34125.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4126 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34126.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4127 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34127.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4128 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34128.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4129 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34129.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4130 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34130.mem 422 46 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4131 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34131.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4132 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34132.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4133 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34133.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4134 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34134.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4135 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34135.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4136 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34136.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4137 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34137.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4138 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34138.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4139 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34139.mem 287 31 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4140 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34140.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4141 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34141.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4142 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34142.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4143 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34143.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4144 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34144.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4145 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34145.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4146 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34146.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4147 94487 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34147.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4148 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34148.mem 809 89 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4149 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34149.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4150 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34150.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4151 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34151.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4152 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34152.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4153 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34153.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4154 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34154.mem 332 36 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4155 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34155.mem 413 45 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4156 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34156.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4157 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34157.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4158 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34158.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4159 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34159.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4160 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34160.mem 512 56 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4161 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34161.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4162 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34162.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4163 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34163.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4164 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34164.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4165 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34165.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4166 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34166.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4167 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34167.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4168 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34168.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4169 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34169.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4170 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34170.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4171 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34171.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4172 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34172.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4173 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34173.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4174 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34174.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4175 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34175.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4176 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34176.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4177 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34177.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4178 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34178.mem 512 56 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4179 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34179.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4180 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34180.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4181 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34181.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4182 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34182.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4183 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34183.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4184 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34184.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4185 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34185.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4186 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34186.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4187 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34187.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4188 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34188.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4189 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34189.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4190 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34190.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4191 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34191.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4192 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34192.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4193 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34193.mem 422 46 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4194 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34194.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4195 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34195.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4196 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34196.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4197 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34197.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4198 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34198.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4199 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34199.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4200 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34200.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4201 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34201.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4202 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34202.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4203 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34203.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4204 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34204.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4205 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34205.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4206 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34206.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4207 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34207.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4208 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34208.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4209 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34209.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4210 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34210.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4211 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34211.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4212 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34212.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4213 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34213.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4214 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34214.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4215 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34215.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4216 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34216.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4217 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34217.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4218 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34218.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4219 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34219.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4220 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34220.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4221 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34221.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4222 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34222.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4223 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34223.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4224 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34224.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4225 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34225.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4226 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34226.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4227 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34227.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4228 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34228.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4229 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34229.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4230 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34230.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4231 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34231.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4232 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34232.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4233 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34233.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4234 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34234.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4235 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34235.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4236 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34236.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4237 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34237.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4238 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34238.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4239 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34239.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4240 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34240.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4241 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34241.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4242 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34242.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4243 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34243.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4244 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34244.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4245 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34245.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4246 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34246.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4247 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34247.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4248 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34248.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4249 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34249.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4250 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34250.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4251 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34251.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4252 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34252.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4253 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34253.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4254 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34254.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4255 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34255.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4256 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34256.mem 917 101 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4257 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34257.mem 611 67 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4258 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34258.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4259 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34259.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4260 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34260.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4261 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34261.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4262 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34262.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4263 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34263.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4264 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34264.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4265 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34265.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4266 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34266.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4267 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34267.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4268 95081 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34268.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4269 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34269.mem 1151 127 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4270 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34270.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4271 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34271.mem 413 45 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4272 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34272.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4273 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34273.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4274 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34274.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4275 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34275.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4276 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34276.mem 1349 149 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4277 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34277.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4278 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34278.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4279 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34279.mem 431 47 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4280 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34280.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4281 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34281.mem 971 107 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4282 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34282.mem 1250 138 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4283 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34283.mem 1115 123 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4284 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34284.mem 539 59 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4285 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34285.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4286 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34286.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4287 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34287.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4288 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34288.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4289 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34289.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4290 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34290.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4291 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34291.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4292 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34292.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4293 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34293.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4294 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34294.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4295 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34295.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4296 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34296.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4297 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34297.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4298 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34298.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4299 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34299.mem 1052 116 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4300 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34300.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4301 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34301.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4302 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34302.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4303 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34303.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4304 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34304.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4305 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34305.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4306 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34306.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4307 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34307.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4308 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34308.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4309 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34309.mem 629 69 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4310 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34310.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4311 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34311.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4312 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34312.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4313 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34313.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4314 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34314.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4315 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34315.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4316 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34316.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4317 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34317.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4318 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34318.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4319 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34319.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4320 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34320.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4321 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34321.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4322 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34322.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4323 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34323.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4324 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34324.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4325 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34325.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4326 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34326.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4327 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34327.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4328 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34328.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4329 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34329.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4330 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34330.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4331 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34331.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4332 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34332.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4333 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34333.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4334 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34334.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4335 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34335.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4336 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34336.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4337 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34337.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4338 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34338.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4339 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34339.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4340 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34340.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4341 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34341.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4342 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34342.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4343 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34343.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4344 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34344.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4345 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34345.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4346 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34346.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4347 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34347.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4348 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34348.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4349 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34349.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4350 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34350.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4351 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34351.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4352 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34352.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4353 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34353.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4354 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34354.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4355 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34355.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4356 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34356.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4357 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34357.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4358 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34358.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4359 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34359.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4360 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34360.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4361 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34361.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4362 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34362.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4363 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34363.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4364 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34364.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4365 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34365.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4366 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34366.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4367 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34367.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4368 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34368.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4369 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34369.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4370 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34370.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4371 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34371.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4372 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34372.mem 1250 138 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4373 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34373.mem 620 68 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4374 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34374.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4375 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34375.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4376 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34376.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4377 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34377.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4378 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34378.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4379 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34379.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4380 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34380.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4381 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34381.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4382 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34382.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4383 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34383.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4384 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34384.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4385 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34385.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4386 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34386.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4387 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34387.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4388 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34388.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4389 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34389.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4390 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34390.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4391 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34391.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4392 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34392.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4393 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34393.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4394 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34394.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4395 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34395.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4396 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34396.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4397 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34397.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4398 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34398.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4399 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34399.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4400 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34400.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4401 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34401.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4402 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34402.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4403 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34403.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4404 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34404.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4405 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34405.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4406 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34406.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4407 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34407.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4408 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34408.mem 440 48 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4409 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34409.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4410 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34410.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4411 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34411.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4412 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34412.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4413 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34413.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4414 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34414.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4415 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34415.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4416 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34416.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4417 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34417.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4418 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34418.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4419 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34419.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4420 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34420.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4421 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34421.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4422 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34422.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4423 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34423.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4424 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34424.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4425 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34425.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4426 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34426.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4427 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34427.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4428 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34428.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4429 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34429.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4430 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34430.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4431 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34431.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4432 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34432.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4433 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34433.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4434 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34434.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4435 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34435.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4436 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34436.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4437 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34437.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4438 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34438.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4439 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34439.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4440 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34440.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4441 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34441.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4442 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34442.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4443 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34443.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4444 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34444.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4445 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34445.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4446 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34446.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4447 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34447.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4448 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34448.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4449 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34449.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4450 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34450.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4451 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34451.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4452 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34452.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4453 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34453.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4454 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34454.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4455 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34455.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4456 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34456.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4457 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34457.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4458 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34458.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4459 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34459.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4460 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34460.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4461 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34461.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4462 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34462.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4463 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34463.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4464 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34464.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4465 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34465.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4466 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34466.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4467 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34467.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4468 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34468.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4469 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34469.mem 494 54 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4470 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34470.mem 935 103 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4471 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34471.mem 503 55 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4472 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34472.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4473 95720 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34473.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4474 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34474.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4475 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34475.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4476 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34476.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4477 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34477.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4478 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34478.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4479 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34479.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4480 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34480.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4481 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34481.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4482 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34482.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4483 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34483.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4484 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34484.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4485 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34485.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4486 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34486.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4487 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34487.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4488 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34488.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4489 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34489.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4490 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34490.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4491 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34491.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4492 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34492.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4493 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34493.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4494 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34494.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4495 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34495.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4496 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34496.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4497 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34497.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4498 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34498.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4499 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34499.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4500 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34500.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4501 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34501.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4502 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34502.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4503 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34503.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4504 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34504.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4505 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34505.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4506 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34506.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4507 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34507.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4508 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34508.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4509 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34509.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4510 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34510.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4511 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34511.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4512 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34512.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4513 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34513.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4514 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34514.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4515 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34515.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4516 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34516.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4517 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34517.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4518 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34518.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4519 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34519.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4520 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34520.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4521 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34521.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4522 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34522.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4523 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34523.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4524 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34524.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4525 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34525.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4526 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34526.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4527 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34527.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4528 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34528.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4529 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34529.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4530 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34530.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4531 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34531.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4532 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34532.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4533 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34533.mem 494 54 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4534 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34534.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4535 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34535.mem 368 40 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4536 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34536.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4537 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34537.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4538 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34538.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4539 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34539.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4540 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34540.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4541 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34541.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4542 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34542.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4543 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34543.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4544 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34544.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4545 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34545.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4546 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34546.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4547 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34547.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4548 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34548.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4549 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34549.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4550 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34550.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4551 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34551.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4552 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34552.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4553 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34553.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4554 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34554.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4555 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34555.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4556 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34556.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4557 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34557.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4558 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34558.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4559 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34559.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4560 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34560.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4561 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34561.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4562 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34562.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4563 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34563.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4564 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34564.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4565 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34565.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4566 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34566.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4567 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34567.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4568 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34568.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4569 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34569.mem 422 46 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4570 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34570.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4571 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34571.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4572 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34572.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4573 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34573.mem 557 61 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4574 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34574.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4575 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34575.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4576 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34576.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4577 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34577.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4578 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34578.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4579 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34579.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4580 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34580.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4581 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34581.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4582 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34582.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4583 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34583.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4584 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34584.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4585 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34585.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4586 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34586.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4587 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34587.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4588 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34588.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4589 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34589.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4590 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34590.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4591 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34591.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4592 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34592.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4593 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34593.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4594 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34594.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4595 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34595.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4596 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34596.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4597 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34597.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4598 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34598.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4599 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34599.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4600 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34600.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4601 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34601.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4602 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34602.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4603 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34603.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4604 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34604.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4605 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34605.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4606 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34606.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4607 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34607.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4608 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34608.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4609 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34609.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4610 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34610.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4611 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34611.mem 287 31 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4612 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34612.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4613 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34613.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4614 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34614.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4615 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34615.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4616 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34616.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4617 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34617.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4618 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34618.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4619 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34619.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4620 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34620.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4621 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34621.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4622 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34622.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4623 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34623.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4624 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34624.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4625 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34625.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4626 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34626.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4627 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34627.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4628 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34628.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4629 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34629.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4630 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34630.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4631 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34631.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4632 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34632.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4633 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34633.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4634 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34634.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4635 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34635.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4636 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34636.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4637 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34637.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4638 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34638.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4639 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34639.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4640 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34640.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4641 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34641.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4642 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34642.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4643 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34643.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4644 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34644.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4645 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34645.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4646 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34646.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4647 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34647.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4648 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34648.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4649 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34649.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4650 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34650.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4651 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34651.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4652 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34652.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4653 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34653.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4654 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34654.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4655 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34655.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4656 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34656.mem 350 38 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4657 96359 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34657.mem 17 1 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4658 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34658.mem 503 55 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4659 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34659.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4660 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34660.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4661 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34661.mem 485 53 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4662 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34662.mem 620 68 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4663 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34663.mem 629 69 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4664 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34664.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4665 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34665.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4666 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34666.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4667 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34667.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4668 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34668.mem 575 63 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4669 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34669.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4670 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34670.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4671 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34671.mem 521 57 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4672 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34672.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4673 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34673.mem 359 39 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4674 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34674.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4675 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34675.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4676 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34676.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4677 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34677.mem 1223 135 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4678 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34678.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4679 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34679.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4680 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34680.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4681 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34681.mem 413 45 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4682 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34682.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4683 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34683.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4684 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34684.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4685 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34685.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4686 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34686.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4687 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34687.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4688 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34688.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4689 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34689.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4690 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34690.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4691 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34691.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4692 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34692.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4693 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34693.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4694 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34694.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4695 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34695.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4696 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34696.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4697 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34697.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4698 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34698.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4699 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34699.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4700 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34700.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4701 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34701.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4702 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34702.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4703 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34703.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4704 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34704.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4705 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34705.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4706 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34706.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4707 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34707.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4708 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34708.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4709 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34709.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4710 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34710.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4711 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34711.mem 737 81 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4712 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34712.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4713 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34713.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4714 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34714.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4715 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34715.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4716 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34716.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4717 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34717.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4718 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34718.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4719 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34719.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4720 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34720.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4721 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34721.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4722 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34722.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4723 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34723.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4724 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34724.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4725 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34725.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4726 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34726.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4727 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34727.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4728 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34728.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4729 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34729.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4730 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34730.mem 647 71 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4731 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34731.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4732 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34732.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4733 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34733.mem 764 84 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4734 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34734.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4735 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34735.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4736 96983 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34736.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4737 99341 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34737.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4738 99341 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34738.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4739 99341 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34739.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4740 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34740.mem 791 87 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4741 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34741.mem 467 51 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4742 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34742.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4743 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34743.mem 872 96 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4744 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34744.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4745 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34745.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4746 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34746.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4747 99914 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34747.mem 728 80 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4748 100553 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34748.mem 926 102 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4749 100553 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34749.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4750 100553 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34750.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4751 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34751.mem 692 76 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4752 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34752.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4753 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34753.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4754 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34754.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4755 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34755.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4756 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34756.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4757 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34757.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4758 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34758.mem 602 66 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4759 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34759.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4760 101192 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34760.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4761 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34761.mem 602 66 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4762 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34762.mem 368 40 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4763 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34763.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4764 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34764.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4765 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34765.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4766 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34766.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4767 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34767.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4768 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34768.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4769 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34769.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4770 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34770.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4771 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34771.mem 467 51 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4772 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34772.mem 350 38 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4773 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34773.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4774 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34774.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4775 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34775.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4776 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34776.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4777 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34777.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4778 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34778.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4779 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34779.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4780 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34780.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4781 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34781.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4782 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34782.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4783 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34783.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4784 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34784.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4785 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34785.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4786 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34786.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4787 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34787.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4788 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34788.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4789 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34789.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4790 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34790.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4791 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34791.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4792 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34792.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4793 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34793.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4794 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34794.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4795 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34795.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4796 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34796.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4797 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34797.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4798 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34798.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4799 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34799.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4800 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34800.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4801 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34801.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4802 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34802.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4803 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34803.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4804 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34804.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4805 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34805.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4806 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34806.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4807 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34807.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4808 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34808.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4809 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34809.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4810 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34810.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4811 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34811.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4812 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34812.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4813 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34813.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4814 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34814.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4815 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34815.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4816 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34816.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4817 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34817.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4818 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34818.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4819 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34819.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4820 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34820.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4821 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34821.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4822 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34822.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4823 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34823.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4824 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34824.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4825 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34825.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4826 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34826.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4827 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34827.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4828 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34828.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4829 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34829.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4830 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34830.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4831 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34831.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4832 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34832.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4833 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34833.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4834 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34834.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4835 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34835.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4836 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34836.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4837 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34837.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4838 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34838.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4839 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34839.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4840 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34840.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4841 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34841.mem 314 34 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4842 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34842.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4843 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34843.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4844 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34844.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4845 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34845.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4846 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34846.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4847 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34847.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4848 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34848.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4849 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34849.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4850 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34850.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4851 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34851.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4852 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34852.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4853 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34853.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4854 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34854.mem 404 44 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4855 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34855.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4856 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34856.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4857 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34857.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4858 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34858.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4859 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34859.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4860 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34860.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4861 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34861.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4862 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34862.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4863 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34863.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4864 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34864.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4865 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34865.mem 656 72 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4866 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34866.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4867 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34867.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4868 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34868.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4869 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34869.mem 332 36 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4870 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34870.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4871 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34871.mem 332 36 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4872 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34872.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4873 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34873.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4874 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34874.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4875 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34875.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4876 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34876.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4877 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34877.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4878 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34878.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4879 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34879.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4880 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34880.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4881 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34881.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4882 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34882.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4883 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34883.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4884 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34884.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4885 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34885.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4886 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34886.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4887 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34887.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4888 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34888.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4889 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34889.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4890 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34890.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4891 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34891.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4892 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34892.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4893 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34893.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4894 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34894.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4895 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34895.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4896 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34896.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4897 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34897.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4898 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34898.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4899 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34899.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4900 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34900.mem 476 52 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4901 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34901.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4902 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34902.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4903 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34903.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4904 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34904.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4905 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34905.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4906 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34906.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4907 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34907.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4908 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34908.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4909 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34909.mem 368 40 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4910 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34910.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4911 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34911.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4912 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34912.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4913 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34913.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4914 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34914.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4915 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34915.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4916 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34916.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4917 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34917.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4918 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34918.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4919 101831 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34919.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4920 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34920.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4921 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34921.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4922 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34922.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4923 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34923.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4924 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34924.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4925 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34925.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4926 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34926.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4927 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34927.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4928 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34928.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4929 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34929.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4930 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34930.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4931 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34931.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4932 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34932.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4933 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34933.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4934 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34934.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4935 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34935.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4936 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34936.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4937 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34937.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4938 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34938.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4939 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34939.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4940 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34940.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4941 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34941.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4942 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34942.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4943 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34943.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4944 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34944.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4945 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34945.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4946 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34946.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4947 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34947.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4948 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34948.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4949 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34949.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4950 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34950.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4951 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34951.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4952 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34952.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4953 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34953.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4954 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34954.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4955 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34955.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4956 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34956.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4957 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34957.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4958 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34958.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4959 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34959.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4960 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34960.mem 683 75 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4961 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34961.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4962 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34962.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4963 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34963.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4964 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34964.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4965 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34965.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4966 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34966.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4967 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34967.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4968 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34968.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4969 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34969.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4970 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34970.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4971 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34971.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4972 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34972.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4973 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34973.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4974 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34974.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4975 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34975.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4976 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34976.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4977 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34977.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4978 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34978.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4979 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34979.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4980 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34980.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4981 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34981.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4982 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34982.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4983 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34983.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4984 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34984.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4985 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34985.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4986 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34986.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4987 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34987.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4988 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34988.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4989 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34989.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4990 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34990.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4991 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34991.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4992 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34992.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4993 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34993.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4994 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34994.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4995 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34995.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4996 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34996.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4997 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34997.mem 683 75 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4998 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34998.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +4999 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f34999.mem 458 50 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5000 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35000.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5001 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35001.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5002 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35002.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5003 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35003.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5004 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35004.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5005 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35005.mem 485 53 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5006 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35006.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5007 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35007.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5008 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35008.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5009 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35009.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5010 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35010.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5011 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35011.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5012 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35012.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5013 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35013.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5014 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35014.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5015 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35015.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5016 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35016.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5017 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35017.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5018 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35018.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5019 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35019.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5020 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35020.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5021 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35021.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5022 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35022.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5023 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35023.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5024 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35024.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5025 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35025.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5026 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35026.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5027 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35027.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5028 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35028.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5029 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35029.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5030 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35030.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5031 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35031.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5032 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35032.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5033 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35033.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5034 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35034.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5035 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35035.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5036 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35036.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5037 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35037.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5038 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35038.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5039 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35039.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5040 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35040.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5041 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35041.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5042 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35042.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5043 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35043.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5044 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35044.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5045 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35045.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5046 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35046.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5047 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35047.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5048 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35048.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5049 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35049.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5050 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35050.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5051 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35051.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5052 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35052.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5053 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35053.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5054 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35054.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5055 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35055.mem 773 85 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5056 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35056.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5057 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35057.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5058 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35058.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5059 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35059.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5060 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35060.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5061 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35061.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5062 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35062.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5063 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35063.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5064 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35064.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5065 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35065.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5066 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35066.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5067 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35067.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5068 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35068.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5069 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35069.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5070 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35070.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5071 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35071.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5072 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35072.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5073 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35073.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5074 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35074.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5075 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35075.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5076 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35076.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5077 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35077.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5078 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35078.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5079 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35079.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5080 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35080.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5081 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35081.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5082 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35082.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5083 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35083.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5084 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35084.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5085 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35085.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5086 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35086.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5087 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35087.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5088 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35088.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5089 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35089.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5090 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35090.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5091 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35091.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5092 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35092.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5093 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35093.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5094 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35094.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5095 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35095.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5096 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35096.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5097 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35097.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5098 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35098.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5099 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35099.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5100 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35100.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5101 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35101.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5102 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35102.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5103 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35103.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5104 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35104.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5105 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35105.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5106 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35106.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5107 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35107.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5108 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35108.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5109 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35109.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5110 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35110.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5111 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35111.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5112 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35112.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5113 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35113.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5114 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35114.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5115 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35115.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5116 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35116.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5117 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35117.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5118 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35118.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5119 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35119.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5120 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35120.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5121 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35121.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5122 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35122.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5123 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35123.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5124 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35124.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5125 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35125.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5126 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35126.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5127 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35127.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5128 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35128.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5129 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35129.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5130 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35130.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5131 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35131.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5132 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35132.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5133 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35133.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5134 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35134.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5135 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35135.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5136 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35136.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5137 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35137.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5138 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35138.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5139 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35139.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5140 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35140.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5141 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35141.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5142 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35142.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5143 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35143.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5144 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35144.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5145 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35145.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5146 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35146.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5147 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35147.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5148 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35148.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5149 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35149.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5150 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35150.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5151 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35151.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5152 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35152.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5153 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35153.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5154 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35154.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5155 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35155.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5156 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35156.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5157 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35157.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5158 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35158.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5159 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35159.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5160 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35160.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5161 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35161.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5162 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35162.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5163 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35163.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5164 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35164.mem 548 60 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5165 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35165.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5166 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35166.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5167 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35167.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5168 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35168.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5169 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35169.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5170 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35170.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5171 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35171.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5172 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35172.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5173 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35173.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5174 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35174.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5175 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35175.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5176 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35176.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5177 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35177.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5178 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35178.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5179 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35179.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5180 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35180.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5181 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35181.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5182 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35182.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5183 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35183.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5184 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35184.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5185 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35185.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5186 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35186.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5187 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35187.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5188 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35188.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5189 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35189.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5190 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35190.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5191 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35191.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5192 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35192.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5193 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35193.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5194 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35194.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5195 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35195.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5196 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35196.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5197 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35197.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5198 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35198.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5199 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35199.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5200 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35200.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5201 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35201.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5202 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35202.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5203 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35203.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5204 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35204.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5205 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35205.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5206 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35206.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5207 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35207.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5208 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35208.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5209 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35209.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5210 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35210.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5211 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35211.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5212 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35212.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5213 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35213.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5214 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35214.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5215 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35215.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5216 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35216.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5217 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35217.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5218 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35218.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5219 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35219.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5220 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35220.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5221 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35221.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5222 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35222.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5223 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35223.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5224 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35224.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5225 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35225.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5226 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35226.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5227 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35227.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5228 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35228.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5229 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35229.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5230 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35230.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5231 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35231.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5232 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35232.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5233 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35233.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5234 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35234.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5235 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35235.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5236 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35236.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5237 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35237.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5238 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35238.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5239 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35239.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5240 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35240.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5241 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35241.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5242 102425 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35242.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5243 103037 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35243.mem 701 77 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5244 103586 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35244.mem 1367 151 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5245 103586 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35245.mem 1169 129 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5246 103586 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35246.mem 1169 129 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5247 103586 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35247.mem 674 74 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5248 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35248.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5249 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35249.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5250 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35250.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5251 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35251.mem 575 63 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5252 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35252.mem 863 95 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5253 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35253.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5254 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35254.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5255 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35255.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5256 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35256.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5257 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35257.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5258 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35258.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5259 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35259.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5260 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35260.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5261 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35261.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5262 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35262.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5263 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35263.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5264 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35264.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5265 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35265.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5266 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35266.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5267 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35267.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5268 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35268.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5269 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35269.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5270 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35270.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5271 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35271.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5272 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35272.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5273 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35273.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5274 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35274.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5275 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35275.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5276 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35276.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5277 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35277.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5278 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35278.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5279 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35279.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5280 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35280.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5281 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35281.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5282 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35282.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5283 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35283.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5284 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35284.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5285 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35285.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5286 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35286.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5287 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35287.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5288 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35288.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5289 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35289.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5290 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35290.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5291 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35291.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5292 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35292.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5293 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35293.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5294 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35294.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5295 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35295.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5296 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35296.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5297 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35297.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5298 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35298.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5299 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35299.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5300 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35300.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5301 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35301.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5302 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35302.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5303 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35303.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5304 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35304.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5305 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35305.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5306 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35306.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5307 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35307.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5308 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35308.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5309 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35309.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5310 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35310.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5311 104225 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35311.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5312 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35312.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5313 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35313.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5314 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35314.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5315 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35315.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5316 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35316.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5317 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35317.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5318 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35318.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5319 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35319.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5320 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35320.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5321 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35321.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5322 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35322.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5323 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35323.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5324 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35324.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5325 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35325.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5326 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35326.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5327 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35327.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5328 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35328.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5329 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35329.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5330 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35330.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5331 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35331.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5332 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35332.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5333 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35333.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5334 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35334.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5335 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35335.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5336 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35336.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5337 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35337.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5338 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35338.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5339 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35339.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5340 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35340.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5341 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35341.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5342 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35342.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5343 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35343.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5344 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35344.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5345 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35345.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5346 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35346.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5347 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35347.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5348 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35348.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5349 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35349.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5350 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35350.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5351 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35351.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5352 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35352.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5353 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35353.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5354 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35354.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5355 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35355.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5356 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35356.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5357 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35357.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5358 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35358.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5359 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35359.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5360 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35360.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5361 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35361.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5362 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35362.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5363 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35363.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5364 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35364.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5365 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35365.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5366 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35366.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5367 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35367.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5368 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35368.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5369 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35369.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5370 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35370.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5371 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35371.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5372 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35372.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5373 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35373.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5374 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35374.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5375 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35375.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5376 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35376.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5377 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35377.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5378 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35378.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5379 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35379.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5380 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35380.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5381 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35381.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5382 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35382.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5383 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35383.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5384 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35384.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5385 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35385.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5386 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35386.mem 359 39 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5387 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35387.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5388 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35388.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5389 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35389.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5390 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35390.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5391 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35391.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5392 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35392.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5393 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35393.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5394 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35394.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5395 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35395.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5396 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35396.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5397 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35397.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5398 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35398.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5399 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35399.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5400 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35400.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5401 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35401.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5402 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35402.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5403 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35403.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5404 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35404.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5405 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35405.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5406 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35406.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5407 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35407.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5408 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35408.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5409 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35409.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5410 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35410.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5411 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35411.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5412 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35412.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5413 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35413.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5414 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35414.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5415 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35415.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5416 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35416.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5417 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35417.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5418 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35418.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5419 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35419.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5420 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35420.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5421 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35421.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5422 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35422.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5423 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35423.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5424 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35424.mem 926 102 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5425 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35425.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5426 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35426.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5427 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35427.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5428 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35428.mem 557 61 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5429 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35429.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5430 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35430.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5431 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35431.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5432 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35432.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5433 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35433.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5434 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35434.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5435 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35435.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5436 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35436.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5437 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35437.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5438 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35438.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5439 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35439.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5440 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35440.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5441 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35441.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5442 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35442.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5443 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35443.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5444 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35444.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5445 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35445.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5446 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35446.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5447 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35447.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5448 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35448.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5449 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35449.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5450 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35450.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5451 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35451.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5452 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35452.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5453 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35453.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5454 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35454.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5455 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35455.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5456 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35456.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5457 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35457.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5458 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35458.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5459 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35459.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5460 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35460.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5461 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35461.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5462 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35462.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5463 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35463.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5464 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35464.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5465 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35465.mem 701 77 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5466 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35466.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5467 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35467.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5468 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35468.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5469 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35469.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5470 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35470.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5471 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35471.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5472 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35472.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5473 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35473.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5474 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35474.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5475 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35475.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5476 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35476.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5477 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35477.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5478 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35478.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5479 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35479.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5480 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35480.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5481 104864 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35481.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5482 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35482.mem 404 44 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5483 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35483.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5484 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35484.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5485 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35485.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5486 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35486.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5487 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35487.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5488 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35488.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5489 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35489.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5490 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35490.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5491 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35491.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5492 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35492.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5493 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35493.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5494 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35494.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5495 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35495.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5496 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35496.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5497 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35497.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5498 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35498.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5499 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35499.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5500 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35500.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5501 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35501.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5502 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35502.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5503 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35503.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5504 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35504.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5505 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35505.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5506 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35506.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5507 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35507.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5508 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35508.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5509 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35509.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5510 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35510.mem 953 105 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5511 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35511.mem 665 73 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5512 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35512.mem 413 45 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5513 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35513.mem 746 82 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5514 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35514.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5515 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35515.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5516 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35516.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5517 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35517.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5518 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35518.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5519 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35519.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5520 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35520.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5521 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35521.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5522 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35522.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5523 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35523.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5524 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35524.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5525 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35525.mem 638 70 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5526 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35526.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5527 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35527.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5528 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35528.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5529 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35529.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5530 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35530.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5531 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35531.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5532 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35532.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5533 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35533.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5534 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35534.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5535 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35535.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5536 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35536.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5537 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35537.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5538 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35538.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5539 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35539.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5540 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35540.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5541 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35541.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5542 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35542.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5543 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35543.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5544 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35544.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5545 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35545.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5546 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35546.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5547 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35547.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5548 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35548.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5549 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35549.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5550 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35550.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5551 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35551.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5552 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35552.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5553 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35553.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5554 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35554.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5555 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35555.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5556 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35556.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5557 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35557.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5558 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35558.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5559 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35559.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5560 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35560.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5561 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35561.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5562 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35562.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5563 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35563.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5564 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35564.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5565 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35565.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5566 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35566.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5567 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35567.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5568 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35568.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5569 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35569.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5570 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35570.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5571 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35571.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5572 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35572.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5573 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35573.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5574 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35574.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5575 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35575.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5576 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35576.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5577 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35577.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5578 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35578.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5579 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35579.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5580 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35580.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5581 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35581.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5582 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35582.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5583 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35583.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5584 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35584.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5585 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35585.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5586 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35586.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5587 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35587.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5588 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35588.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5589 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35589.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5590 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35590.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5591 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35591.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5592 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35592.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5593 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35593.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5594 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35594.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5595 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35595.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5596 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35596.mem 458 50 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5597 105503 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35597.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5598 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35598.mem 1151 127 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5599 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35599.mem 1106 122 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5600 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35600.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5601 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35601.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5602 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35602.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5603 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35603.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5604 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35604.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5605 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35605.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5606 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35606.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5607 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35607.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5608 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35608.mem 575 63 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5609 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35609.mem 854 94 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5610 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35610.mem 989 109 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5611 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35611.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5612 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35612.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5613 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35613.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5614 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35614.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5615 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35615.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5616 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35616.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5617 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35617.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5618 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35618.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5619 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35619.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5620 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35620.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5621 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35621.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5622 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35622.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5623 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35623.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5624 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35624.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5625 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35625.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5626 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35626.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5627 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35627.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5628 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35628.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5629 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35629.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5630 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35630.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5631 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35631.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5632 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35632.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5633 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35633.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5634 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35634.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5635 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35635.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5636 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35636.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5637 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35637.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5638 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35638.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5639 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35639.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5640 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35640.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5641 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35641.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5642 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35642.mem 494 54 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5643 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35643.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5644 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35644.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5645 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35645.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5646 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35646.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5647 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35647.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5648 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35648.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5649 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35649.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5650 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35650.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5651 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35651.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5652 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35652.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5653 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35653.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5654 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35654.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5655 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35655.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5656 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35656.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5657 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35657.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5658 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35658.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5659 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35659.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5660 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35660.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5661 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35661.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5662 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35662.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5663 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35663.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5664 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35664.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5665 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35665.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5666 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35666.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5667 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35667.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5668 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35668.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5669 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35669.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5670 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35670.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5671 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35671.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5672 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35672.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5673 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35673.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5674 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35674.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5675 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35675.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5676 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35676.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5677 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35677.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5678 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35678.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5679 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35679.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5680 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35680.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5681 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35681.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5682 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35682.mem 476 52 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5683 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35683.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5684 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35684.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5685 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35685.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5686 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35686.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5687 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35687.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5688 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35688.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5689 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35689.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5690 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35690.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5691 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35691.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5692 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35692.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5693 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35693.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5694 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35694.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5695 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35695.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5696 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35696.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5697 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35697.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5698 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35698.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5699 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35699.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5700 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35700.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5701 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35701.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5702 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35702.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5703 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35703.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5704 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35704.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5705 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35705.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5706 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35706.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5707 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35707.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5708 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35708.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5709 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35709.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5710 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35710.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5711 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35711.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5712 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35712.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5713 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35713.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5714 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35714.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5715 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35715.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5716 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35716.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5717 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35717.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5718 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35718.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5719 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35719.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5720 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35720.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5721 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35721.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5722 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35722.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5723 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35723.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5724 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35724.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5725 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35725.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5726 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35726.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5727 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35727.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5728 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35728.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5729 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35729.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5730 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35730.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5731 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35731.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5732 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35732.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5733 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35733.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5734 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35734.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5735 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35735.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5736 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35736.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5737 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35737.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5738 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35738.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5739 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35739.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5740 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35740.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5741 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35741.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5742 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35742.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5743 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35743.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5744 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35744.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5745 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35745.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5746 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35746.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5747 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35747.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5748 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35748.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5749 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35749.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5750 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35750.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5751 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35751.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5752 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35752.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5753 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35753.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5754 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35754.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5755 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35755.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5756 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35756.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5757 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35757.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5758 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35758.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5759 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35759.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5760 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35760.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5761 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35761.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5762 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35762.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5763 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35763.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5764 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35764.mem 512 56 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5765 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35765.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5766 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35766.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5767 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35767.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5768 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35768.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5769 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35769.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5770 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35770.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5771 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35771.mem 350 38 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5772 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35772.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5773 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35773.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5774 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35774.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5775 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35775.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5776 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35776.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5777 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35777.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5778 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35778.mem 287 31 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5779 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35779.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5780 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35780.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5781 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35781.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5782 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35782.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5783 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35783.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5784 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35784.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5785 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35785.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5786 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35786.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5787 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35787.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5788 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35788.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5789 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35789.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5790 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35790.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5791 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35791.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5792 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35792.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5793 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35793.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5794 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35794.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5795 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35795.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5796 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35796.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5797 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35797.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5798 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35798.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5799 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35799.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5800 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35800.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5801 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35801.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5802 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35802.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5803 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35803.mem 512 56 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5804 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35804.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5805 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35805.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5806 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35806.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5807 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35807.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5808 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35808.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5809 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35809.mem 287 31 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5810 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35810.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5811 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35811.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5812 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35812.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5813 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35813.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5814 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35814.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5815 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35815.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5816 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35816.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5817 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35817.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5818 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35818.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5819 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35819.mem 476 52 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5820 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35820.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5821 106142 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35821.mem 611 67 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5822 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35822.mem 602 66 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5823 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35823.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5824 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35824.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5825 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35825.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5826 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35826.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5827 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35827.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5828 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35828.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5829 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35829.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5830 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35830.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5831 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35831.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5832 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35832.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5833 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35833.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5834 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35834.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5835 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35835.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5836 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35836.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5837 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35837.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5838 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35838.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5839 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35839.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5840 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35840.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5841 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35841.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5842 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35842.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5843 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35843.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5844 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35844.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5845 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35845.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5846 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35846.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5847 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35847.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5848 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35848.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5849 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35849.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5850 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35850.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5851 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35851.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5852 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35852.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5853 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35853.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5854 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35854.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5855 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35855.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5856 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35856.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5857 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35857.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5858 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35858.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5859 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35859.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5860 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35860.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5861 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35861.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5862 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35862.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5863 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35863.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5864 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35864.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5865 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35865.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5866 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35866.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5867 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35867.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5868 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35868.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5869 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35869.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5870 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35870.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5871 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35871.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5872 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35872.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5873 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35873.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5874 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35874.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5875 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35875.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5876 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35876.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5877 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35877.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5878 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35878.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5879 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35879.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5880 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35880.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5881 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35881.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5882 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35882.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5883 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35883.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5884 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35884.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5885 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35885.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5886 106781 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35886.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5887 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35887.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5888 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35888.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5889 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35889.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5890 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35890.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5891 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35891.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5892 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35892.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5893 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35893.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5894 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35894.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5895 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35895.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5896 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35896.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5897 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35897.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5898 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35898.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5899 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35899.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5900 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35900.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5901 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35901.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5902 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35902.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5903 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35903.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5904 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35904.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5905 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35905.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5906 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35906.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5907 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35907.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5908 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35908.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5909 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35909.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5910 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35910.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5911 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35911.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5912 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35912.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5913 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35913.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5914 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35914.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5915 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35915.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5916 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35916.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5917 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35917.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5918 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35918.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5919 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35919.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5920 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35920.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5921 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35921.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5922 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35922.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5923 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35923.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5924 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35924.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5925 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35925.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5926 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35926.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5927 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35927.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5928 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35928.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5929 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35929.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5930 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35930.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5931 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35931.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5932 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35932.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5933 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35933.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5934 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35934.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5935 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35935.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5936 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35936.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5937 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35937.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5938 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35938.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5939 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35939.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5940 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35940.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5941 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35941.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5942 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35942.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5943 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35943.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5944 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35944.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5945 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35945.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5946 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35946.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5947 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35947.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5948 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35948.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5949 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35949.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5950 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35950.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5951 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35951.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5952 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35952.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5953 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35953.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5954 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35954.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5955 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35955.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5956 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35956.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5957 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35957.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5958 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35958.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5959 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35959.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5960 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35960.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5961 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35961.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5962 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35962.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5963 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35963.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5964 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35964.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5965 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35965.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5966 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35966.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5967 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35967.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5968 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35968.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5969 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35969.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5970 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35970.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5971 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35971.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5972 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35972.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5973 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35973.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5974 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35974.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5975 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35975.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5976 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35976.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5977 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35977.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5978 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35978.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5979 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35979.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5980 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35980.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5981 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35981.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5982 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35982.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5983 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35983.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5984 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35984.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5985 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35985.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5986 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35986.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5987 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35987.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5988 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35988.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5989 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35989.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5990 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35990.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5991 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35991.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5992 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35992.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5993 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35993.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5994 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35994.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5995 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35995.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5996 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35996.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5997 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35997.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5998 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35998.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +5999 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f35999.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6000 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36000.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6001 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36001.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6002 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36002.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6003 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36003.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6004 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36004.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6005 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36005.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6006 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36006.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6007 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36007.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6008 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36008.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6009 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36009.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6010 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36010.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6011 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36011.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6012 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36012.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6013 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36013.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6014 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36014.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6015 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36015.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6016 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36016.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6017 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36017.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6018 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36018.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6019 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36019.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6020 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36020.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6021 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36021.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6022 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36022.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6023 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36023.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6024 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36024.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6025 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36025.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6026 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36026.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6027 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36027.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6028 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36028.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6029 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36029.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6030 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36030.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6031 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36031.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6032 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36032.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6033 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36033.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6034 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36034.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6035 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36035.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6036 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36036.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6037 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36037.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6038 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36038.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6039 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36039.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6040 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36040.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6041 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36041.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6042 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36042.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6043 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36043.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6044 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36044.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6045 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36045.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6046 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36046.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6047 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36047.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6048 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36048.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6049 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36049.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6050 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36050.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6051 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36051.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6052 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36052.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6053 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36053.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6054 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36054.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6055 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36055.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6056 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36056.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6057 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36057.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6058 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36058.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6059 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36059.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6060 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36060.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6061 107420 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36061.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6062 108059 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36062.mem 746 82 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6063 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36063.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6064 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36064.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6065 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36065.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6066 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36066.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6067 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36067.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6068 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36068.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6069 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36069.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6070 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36070.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6071 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36071.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6072 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36072.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6073 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36073.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6074 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36074.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6075 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36075.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6076 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36076.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6077 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36077.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6078 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36078.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6079 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36079.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6080 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36080.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6081 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36081.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6082 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36082.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6083 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36083.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6084 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36084.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6085 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36085.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6086 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36086.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6087 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36087.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6088 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36088.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6089 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36089.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6090 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36090.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6091 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36091.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6092 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36092.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6093 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36093.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6094 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36094.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6095 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36095.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6096 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36096.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6097 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36097.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6098 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36098.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6099 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36099.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6100 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36100.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6101 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36101.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6102 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36102.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6103 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36103.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6104 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36104.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6105 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36105.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6106 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36106.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6107 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36107.mem 602 66 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6108 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36108.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6109 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36109.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6110 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36110.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6111 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36111.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6112 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36112.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6113 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36113.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6114 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36114.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6115 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36115.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6116 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36116.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6117 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36117.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6118 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36118.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6119 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36119.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6120 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36120.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6121 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36121.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6122 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36122.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6123 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36123.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6124 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36124.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6125 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36125.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6126 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36126.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6127 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36127.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6128 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36128.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6129 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36129.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6130 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36130.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6131 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36131.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6132 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36132.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6133 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36133.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6134 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36134.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6135 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36135.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6136 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36136.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6137 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36137.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6138 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36138.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6139 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36139.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6140 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36140.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6141 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36141.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6142 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36142.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6143 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36143.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6144 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36144.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6145 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36145.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6146 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36146.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6147 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36147.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6148 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36148.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6149 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36149.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6150 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36150.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6151 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36151.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6152 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36152.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6153 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36153.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6154 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36154.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6155 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36155.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6156 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36156.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6157 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36157.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6158 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36158.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6159 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36159.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6160 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36160.mem 368 40 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6161 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36161.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6162 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36162.mem 242 26 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6163 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36163.mem 719 79 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6164 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36164.mem 413 45 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6165 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36165.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6166 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36166.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6167 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36167.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6168 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36168.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6169 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36169.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6170 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36170.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6171 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36171.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6172 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36172.mem 530 58 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6173 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36173.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6174 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36174.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6175 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36175.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6176 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36176.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6177 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36177.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6178 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36178.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6179 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36179.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6180 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36180.mem 530 58 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6181 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36181.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6182 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36182.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6183 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36183.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6184 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36184.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6185 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36185.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6186 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36186.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6187 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36187.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6188 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36188.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6189 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36189.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6190 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36190.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6191 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36191.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6192 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36192.mem 188 20 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6193 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36193.mem 314 34 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6194 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36194.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6195 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36195.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6196 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36196.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6197 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36197.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6198 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36198.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6199 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36199.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6200 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36200.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6201 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36201.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6202 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36202.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6203 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36203.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6204 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36204.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6205 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36205.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6206 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36206.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6207 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36207.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6208 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36208.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6209 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36209.mem 449 49 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6210 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36210.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6211 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36211.mem 593 65 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6212 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36212.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6213 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36213.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6214 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36214.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6215 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36215.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6216 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36216.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6217 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36217.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6218 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36218.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6219 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36219.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6220 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36220.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6221 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36221.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6222 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36222.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6223 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36223.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6224 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36224.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6225 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36225.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6226 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36226.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6227 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36227.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6228 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36228.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6229 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36229.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6230 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36230.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6231 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36231.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6232 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36232.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6233 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36233.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6234 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36234.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6235 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36235.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6236 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36236.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6237 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36237.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6238 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36238.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6239 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36239.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6240 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36240.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6241 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36241.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6242 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36242.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6243 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36243.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6244 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36244.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6245 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36245.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6246 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36246.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6247 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36247.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6248 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36248.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6249 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36249.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6250 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36250.mem 512 56 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6251 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36251.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6252 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36252.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6253 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36253.mem 665 73 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6254 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36254.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6255 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36255.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6256 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36256.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6257 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36257.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6258 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36258.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6259 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36259.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6260 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36260.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6261 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36261.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6262 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36262.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6263 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36263.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6264 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36264.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6265 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36265.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6266 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36266.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6267 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36267.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6268 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36268.mem 404 44 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6269 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36269.mem 647 71 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6270 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36270.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6271 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36271.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6272 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36272.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6273 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36273.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6274 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36274.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6275 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36275.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6276 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36276.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6277 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36277.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6278 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36278.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6279 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36279.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6280 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36280.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6281 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36281.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6282 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36282.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6283 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36283.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6284 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36284.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6285 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36285.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6286 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36286.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6287 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36287.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6288 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36288.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6289 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36289.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6290 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36290.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6291 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36291.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6292 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36292.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6293 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36293.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6294 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36294.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6295 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36295.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6296 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36296.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6297 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36297.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6298 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36298.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6299 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36299.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6300 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36300.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6301 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36301.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6302 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36302.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6303 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36303.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6304 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36304.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6305 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36305.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6306 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36306.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6307 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36307.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6308 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36308.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6309 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36309.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6310 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36310.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6311 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36311.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6312 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36312.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6313 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36313.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6314 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36314.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6315 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36315.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6316 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36316.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6317 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36317.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6318 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36318.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6319 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36319.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6320 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36320.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6321 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36321.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6322 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36322.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6323 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36323.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6324 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36324.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6325 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36325.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6326 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36326.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6327 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36327.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6328 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36328.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6329 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36329.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6330 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36330.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6331 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36331.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6332 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36332.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6333 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36333.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6334 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36334.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6335 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36335.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6336 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36336.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6337 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36337.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6338 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36338.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6339 108698 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36339.mem 170 18 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6340 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36340.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6341 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36341.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6342 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36342.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6343 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36343.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6344 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36344.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6345 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36345.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6346 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36346.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6347 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36347.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6348 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36348.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6349 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36349.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6350 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36350.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6351 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36351.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6352 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36352.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6353 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36353.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6354 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36354.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6355 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36355.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6356 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36356.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6357 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36357.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6358 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36358.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6359 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36359.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6360 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36360.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6361 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36361.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6362 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36362.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6363 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36363.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6364 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36364.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6365 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36365.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6366 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36366.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6367 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36367.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6368 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36368.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6369 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36369.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6370 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36370.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6371 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36371.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6372 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36372.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6373 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36373.mem 449 49 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6374 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36374.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6375 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36375.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6376 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36376.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6377 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36377.mem 575 63 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6378 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36378.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6379 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36379.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6380 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36380.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6381 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36381.mem 431 47 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6382 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36382.mem 368 40 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6383 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36383.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6384 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36384.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6385 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36385.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6386 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36386.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6387 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36387.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6388 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36388.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6389 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36389.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6390 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36390.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6391 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36391.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6392 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36392.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6393 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36393.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6394 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36394.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6395 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36395.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6396 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36396.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6397 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36397.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6398 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36398.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6399 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36399.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6400 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36400.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6401 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36401.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6402 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36402.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6403 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36403.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6404 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36404.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6405 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36405.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6406 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36406.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6407 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36407.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6408 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36408.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6409 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36409.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6410 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36410.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6411 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36411.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6412 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36412.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6413 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36413.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6414 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36414.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6415 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36415.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6416 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36416.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6417 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36417.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6418 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36418.mem 584 64 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6419 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36419.mem 431 47 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6420 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36420.mem 584 64 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6421 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36421.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6422 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36422.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6423 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36423.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6424 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36424.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6425 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36425.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6426 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36426.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6427 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36427.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6428 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36428.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6429 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36429.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6430 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36430.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6431 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36431.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6432 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36432.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6433 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36433.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6434 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36434.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6435 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36435.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6436 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36436.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6437 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36437.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6438 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36438.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6439 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36439.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6440 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36440.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6441 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36441.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6442 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36442.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6443 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36443.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6444 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36444.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6445 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36445.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6446 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36446.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6447 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36447.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6448 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36448.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6449 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36449.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6450 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36450.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6451 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36451.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6452 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36452.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6453 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36453.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6454 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36454.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6455 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36455.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6456 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36456.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6457 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36457.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6458 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36458.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6459 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36459.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6460 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36460.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6461 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36461.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6462 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36462.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6463 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36463.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6464 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36464.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6465 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36465.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6466 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36466.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6467 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36467.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6468 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36468.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6469 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36469.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6470 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36470.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6471 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36471.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6472 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36472.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6473 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36473.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6474 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36474.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6475 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36475.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6476 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36476.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6477 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36477.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6478 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36478.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6479 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36479.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6480 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36480.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6481 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36481.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6482 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36482.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6483 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36483.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6484 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36484.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6485 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36485.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6486 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36486.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6487 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36487.mem 278 30 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6488 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36488.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6489 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36489.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6490 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36490.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6491 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36491.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6492 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36492.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6493 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36493.mem 269 29 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6494 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36494.mem 359 39 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6495 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36495.mem 548 60 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6496 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36496.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6497 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36497.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6498 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36498.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6499 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36499.mem 152 16 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6500 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36500.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6501 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36501.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6502 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36502.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6503 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36503.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6504 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36504.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6505 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36505.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6506 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36506.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6507 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36507.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6508 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36508.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6509 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36509.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6510 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36510.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6511 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36511.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6512 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36512.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6513 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36513.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6514 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36514.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6515 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36515.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6516 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36516.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6517 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36517.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6518 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36518.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6519 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36519.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6520 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36520.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6521 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36521.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6522 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36522.mem 161 17 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6523 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36523.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6524 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36524.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6525 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36525.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6526 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36526.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6527 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36527.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6528 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36528.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6529 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36529.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6530 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36530.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6531 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36531.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6532 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36532.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6533 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36533.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6534 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36534.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6535 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36535.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6536 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36536.mem 503 55 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6537 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36537.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6538 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36538.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6539 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36539.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6540 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36540.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6541 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36541.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6542 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36542.mem 305 33 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6543 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36543.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6544 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36544.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6545 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36545.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6546 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36546.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6547 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36547.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6548 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36548.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6549 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36549.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6550 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36550.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6551 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36551.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6552 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36552.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6553 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36553.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6554 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36554.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6555 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36555.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6556 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36556.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6557 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36557.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6558 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36558.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6559 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36559.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6560 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36560.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6561 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36561.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6562 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36562.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6563 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36563.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6564 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36564.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6565 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36565.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6566 109337 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36566.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6567 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36567.mem 683 75 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6568 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36568.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6569 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36569.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6570 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36570.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6571 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36571.mem 143 15 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6572 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36572.mem 296 32 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6573 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36573.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6574 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36574.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6575 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36575.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6576 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36576.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6577 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36577.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6578 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36578.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6579 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36579.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6580 112475 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36580.mem 26 2 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6581 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36581.mem 449 49 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6582 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36582.mem 521 57 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6583 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36583.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6584 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36584.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6585 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36585.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6586 113153 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36586.mem 107 11 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6587 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36587.mem 584 64 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6588 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36588.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6589 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36589.mem 431 47 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6590 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36590.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6591 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36591.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6592 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36592.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6593 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36593.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6594 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36594.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6595 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36595.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6596 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36596.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6597 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36597.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6598 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36598.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6599 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36599.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6600 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36600.mem 404 44 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6601 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36601.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6602 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36602.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6603 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36603.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6604 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36604.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6605 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36605.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6606 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36606.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6607 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36607.mem 179 19 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6608 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36608.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6609 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36609.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6610 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36610.mem 539 59 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6611 113792 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36611.mem 17 1 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6612 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36612.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6613 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36613.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6614 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36614.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6615 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36615.mem 665 73 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6616 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36616.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6617 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36617.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6618 114431 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36618.mem 314 34 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6619 115016 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36619.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6620 115016 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36620.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6621 115016 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36621.mem 2015 223 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6622 115655 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36622.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6623 115655 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36623.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6624 115655 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36624.mem 1601 177 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6625 116351 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36625.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6626 116351 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36626.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6627 116351 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36627.mem 620 68 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6628 117050 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36628.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6629 117050 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36629.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6630 117050 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36630.mem 998 110 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6631 117599 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36631.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6632 117599 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36632.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6633 117599 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36633.mem 1646 182 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6634 118238 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36634.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6635 118238 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36635.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6636 118238 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36636.mem 1322 146 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6637 118877 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36637.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6638 118877 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36638.mem 935 103 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6639 119471 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36639.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6640 119471 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36640.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6641 119471 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36641.mem 1718 190 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6642 120110 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36642.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6643 120110 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36643.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6644 120110 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36644.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6645 120110 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36645.mem 2033 225 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6646 120749 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36646.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6647 120749 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36647.mem 1286 142 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6648 120749 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36648.mem 1961 217 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6649 120749 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36649.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6650 120749 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36650.mem 1025 113 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6651 121388 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36651.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6652 121388 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36652.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6653 121388 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36653.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6654 121388 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36654.mem 557 61 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6655 122027 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36655.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6656 122027 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36656.mem 2033 225 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6657 122027 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36657.mem 1475 163 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6658 122027 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36658.mem 1178 130 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6659 122027 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36659.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6660 122600 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36660.mem 1745 193 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6661 122600 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36661.mem 944 104 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6662 123239 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36662.mem 917 101 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6663 123239 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36663.mem 1970 218 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6664 123239 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36664.mem 386 42 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6665 123869 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36665.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6666 123869 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36666.mem 206 22 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6667 124508 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36667.mem 989 109 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6668 125147 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36668.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6669 125786 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36669.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6670 125786 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36670.mem 557 61 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6671 126434 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36671.mem 1124 124 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6672 126968 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36672.mem 1925 213 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6673 127607 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36673.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6674 127607 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36674.mem 665 73 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6675 128246 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36675.mem 1394 154 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6676 128885 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36676.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6677 129389 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36677.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6678 129389 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36678.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6679 129389 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36679.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6680 129389 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36680.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6681 129389 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36681.mem 1079 119 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6682 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36682.mem 1457 161 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6683 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36683.mem 1673 185 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6684 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36684.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6685 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36685.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6686 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36686.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6687 130028 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36687.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6688 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36688.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6689 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36689.mem 1475 163 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6690 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36690.mem 1475 163 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6691 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36691.mem 1178 130 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6692 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36692.mem 1358 150 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6693 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36693.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6694 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36694.mem 1394 154 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6695 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36695.mem 521 57 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6696 130667 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36696.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6697 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36697.mem 656 72 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6698 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36698.mem 728 80 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6699 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36699.mem 584 64 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6700 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36700.mem 395 43 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6701 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36701.mem 530 58 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6702 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36702.mem 566 62 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6703 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36703.mem 656 72 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6704 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36704.mem 764 84 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6705 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36705.mem 251 27 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6706 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36706.mem 350 38 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6707 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36707.mem 1925 213 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6708 131306 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36708.mem 1241 137 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6709 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36709.mem 1484 164 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6710 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36710.mem 2042 226 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6711 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36711.mem 1673 185 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6712 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36712.mem 1214 134 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6713 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36713.mem 1682 186 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6714 131945 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36714.mem 1637 181 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6715 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36715.mem 1880 208 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6716 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36716.mem 1259 139 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6717 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36717.mem 377 41 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6718 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36718.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6719 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36719.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6720 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36720.mem 1133 125 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6721 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36721.mem 215 23 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6722 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36722.mem 197 21 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6723 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36723.mem 323 35 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6724 132584 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36724.mem 494 54 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6725 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36725.mem 998 110 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6726 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36726.mem 665 73 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6727 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36727.mem 746 82 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6728 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36728.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6729 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36729.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6730 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36730.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6731 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36731.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6732 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36732.mem 134 14 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6733 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36733.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6734 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36734.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6735 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36735.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6736 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36736.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6737 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36737.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6738 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36738.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6739 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36739.mem 431 47 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6740 133262 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36740.mem 503 55 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6741 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36741.mem 341 37 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6742 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36742.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6743 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36743.mem 125 13 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6744 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36744.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6745 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36745.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6746 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36746.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6747 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36747.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6748 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36748.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6749 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36749.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6750 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36750.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6751 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36751.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6752 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36752.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6753 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36753.mem 89 9 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6754 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36754.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6755 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36755.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6756 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36756.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6757 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36757.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6758 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36758.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6759 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36759.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6760 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36760.mem 359 39 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6761 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36761.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6762 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36762.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6763 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36763.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6764 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36764.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6765 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36765.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6766 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36766.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6767 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36767.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6768 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36768.mem 260 28 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6769 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36769.mem 98 10 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6770 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36770.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6771 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36771.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6772 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36772.mem 53 5 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6773 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36773.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6774 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36774.mem 44 4 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6775 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36775.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6776 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36776.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6777 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36777.mem 62 6 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6778 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36778.mem 233 25 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6779 133901 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36779.mem 530 58 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6780 135869 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36780.mem 35 3 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6781 139736 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36781.mem 674 74 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6782 139736 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36782.mem 1016 112 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6783 139736 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36783.mem 539 59 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6784 139736 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36784.mem 71 7 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6785 139736 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36785.mem 80 8 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6786 142292 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36786.mem 224 24 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6787 142292 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36787.mem 116 12 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6788 142931 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36788.mem 746 82 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6789 143570 8192 480 sh3_zsrt139f33994_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f36789.mem 1052 116 1 sh3_zsrt139f33994_pal.mem 0x47097d4c +6790 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36790.mem 566 62 0 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6791 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36791.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6792 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36792.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6793 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36793.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6794 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36794.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6795 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36795.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6796 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36796.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6797 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36797.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6798 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36798.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6799 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36799.mem 206 22 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6800 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36800.mem 161 17 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6801 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36801.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6802 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36802.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6803 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36803.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6804 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36804.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6805 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36805.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6806 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36806.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6807 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36807.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6808 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36808.mem 107 11 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6809 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36809.mem 125 13 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6810 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36810.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6811 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36811.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6812 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36812.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6813 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36813.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6814 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36814.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6815 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36815.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6816 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36816.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6817 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36817.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6818 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36818.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6819 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36819.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6820 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36820.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6821 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36821.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6822 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36822.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6823 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36823.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6824 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36824.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6825 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36825.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6826 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36826.mem 89 9 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6827 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36827.mem 242 26 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6828 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36828.mem 161 17 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6829 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36829.mem 98 10 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6830 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36830.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6831 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36831.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6832 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36832.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6833 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36833.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6834 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36834.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6835 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36835.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6836 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36836.mem 98 10 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6837 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36837.mem 143 15 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6838 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36838.mem 386 42 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6839 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36839.mem 134 14 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6840 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36840.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6841 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36841.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6842 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36842.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6843 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36843.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6844 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36844.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6845 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36845.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6846 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36846.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6847 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36847.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6848 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36848.mem 80 8 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6849 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36849.mem 98 10 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6850 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36850.mem 152 16 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6851 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36851.mem 269 29 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6852 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36852.mem 89 9 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6853 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36853.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6854 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36854.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6855 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36855.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6856 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36856.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6857 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36857.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6858 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36858.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6859 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36859.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6860 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36860.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6861 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36861.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6862 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36862.mem 35 3 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6863 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36863.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6864 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36864.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6865 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36865.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6866 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36866.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6867 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36867.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6868 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36868.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6869 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36869.mem 107 11 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6870 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36870.mem 422 46 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6871 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36871.mem 215 23 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6872 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36872.mem 170 18 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6873 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36873.mem 350 38 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6874 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36874.mem 458 50 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6875 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36875.mem 98 10 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6876 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36876.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6877 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36877.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6878 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36878.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6879 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36879.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6880 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36880.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6881 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36881.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6882 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36882.mem 44 4 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6883 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36883.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6884 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36884.mem 53 5 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6885 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36885.mem 62 6 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6886 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36886.mem 71 7 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6887 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36887.mem 98 10 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6888 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36888.mem 215 23 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6889 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36889.mem 197 21 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6890 144890 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36890.mem 215 23 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6891 145712 12288 480 sh3_zsrt139f36790_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f36891.mem 188 20 1 sh3_zsrt139f36790_pal.mem 0x3e849a98 +6892 146205 11264 480 sh3_zsrt139f36892_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36892.mem 1367 151 0 sh3_zsrt139f36892_pal.mem 0xfd978fd9 +6893 146630 11264 480 sh3_zsrt139f36892_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36893.mem 1214 134 1 sh3_zsrt139f36892_pal.mem 0xfd978fd9 +6894 147068 11264 480 sh3_zsrt139f36892_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36894.mem 1322 146 1 sh3_zsrt139f36892_pal.mem 0xfd978fd9 +6895 147480 11264 480 sh3_zsrt139f36895_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36895.mem 1430 158 0 sh3_zsrt139f36895_pal.mem 0xd5ed05ff +6896 147888 11264 480 sh3_zsrt139f36895_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36896.mem 2042 226 1 sh3_zsrt139f36895_pal.mem 0xd5ed05ff +6897 147888 11264 480 sh3_zsrt139f36895_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36897.mem 296 32 1 sh3_zsrt139f36895_pal.mem 0xd5ed05ff +6898 148264 11264 480 sh3_zsrt139f36895_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36898.mem 2042 226 1 sh3_zsrt139f36895_pal.mem 0xd5ed05ff +6899 148264 11264 480 sh3_zsrt139f36895_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36899.mem 935 103 1 sh3_zsrt139f36895_pal.mem 0xd5ed05ff +6900 148919 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36900.mem 2042 226 0 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6901 148919 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36901.mem 44 4 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6902 149509 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36902.mem 2042 226 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6903 149509 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36903.mem 431 47 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6904 150125 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36904.mem 2042 226 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6905 150125 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36905.mem 215 23 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6906 150741 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36906.mem 2042 226 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6907 150741 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36907.mem 386 42 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6908 151344 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36908.mem 2042 226 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6909 151344 11264 480 sh3_zsrt139f36900_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36909.mem 296 32 1 sh3_zsrt139f36900_pal.mem 0xcdf8a4d8 +6910 152021 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36910.mem 692 76 0 sh3_zsrt139f36910_pal.mem 0xc6784386 +6911 152420 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36911.mem 917 101 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6912 152806 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36912.mem 926 102 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6913 153218 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36913.mem 566 62 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6914 153643 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36914.mem 881 97 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6915 154029 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36915.mem 863 95 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6916 154428 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36916.mem 809 89 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6917 154853 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36917.mem 863 95 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6918 155265 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36918.mem 791 87 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6919 155664 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36919.mem 764 84 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6920 156063 11264 480 sh3_zsrt139f36910_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f36920.mem 674 74 1 sh3_zsrt139f36910_pal.mem 0xc6784386 +6921 156566 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36921.mem 2042 226 0 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6922 156566 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36922.mem 602 66 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6923 157273 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36923.mem 2042 226 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6924 157273 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36924.mem 773 85 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6925 157967 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36925.mem 2042 226 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6926 157967 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36926.mem 539 59 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6927 158674 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36927.mem 2042 226 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6928 158674 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36928.mem 755 83 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6929 159420 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36929.mem 2042 226 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6930 159420 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36930.mem 611 67 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6931 160114 10240 480 sh3_zsrt139f36921_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36931.mem 413 45 1 sh3_zsrt139f36921_pal.mem 0x00fd9028 +6932 160331 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36932.mem 1097 121 0 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6933 160769 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36933.mem 971 107 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6934 161168 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36934.mem 935 103 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6935 161567 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36935.mem 1412 156 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6936 162300 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36936.mem 962 106 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6937 162725 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36937.mem 818 90 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6938 163163 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36938.mem 638 70 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6939 163575 10240 480 sh3_zsrt139f36932_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36939.mem 971 107 1 sh3_zsrt139f36932_pal.mem 0xd8d19684 +6940 164204 10240 480 sh3_zsrt139f36940_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36940.mem 1745 193 0 sh3_zsrt139f36940_pal.mem 0xaa4e7e05 +6941 164950 10240 480 sh3_zsrt139f36940_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f36941.mem 836 92 1 sh3_zsrt139f36940_pal.mem 0xaa4e7e05 +6942 175995 12288 480 sh3_zsrt139f36942_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f36942.mem 746 82 0 sh3_zsrt139f36942_pal.mem 0x56ebf1d1 +6943 176446 12288 480 sh3_zsrt139f36942_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f36943.mem 926 102 1 sh3_zsrt139f36942_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f40_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f40_epochs.txt new file mode 100644 index 0000000..b8849be --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f40_epochs.txt @@ -0,0 +1,297 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f36', 'zsrt139f39'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 294 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +124 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +126 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +127 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +130 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +131 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +132 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +133 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +134 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +137 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +138 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +139 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +140 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +148 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +149 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +150 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +151 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +152 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +153 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +154 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +155 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +156 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +157 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +161 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f390.mem 242 26 0 sh3_zsrt139f390_pal.mem 0xcb75e100 +291 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f391.mem 197 21 1 sh3_zsrt139f390_pal.mem 0xcb75e100 +292 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f392.mem 89 9 1 sh3_zsrt139f390_pal.mem 0xcb75e100 +293 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f393.mem 35 3 1 sh3_zsrt139f390_pal.mem 0xcb75e100 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41_epochs.txt new file mode 100644 index 0000000..412f849 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41_epochs.txt @@ -0,0 +1,8 @@ +# Ch431 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +1 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 1 sh3_zsrt139f410_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41c_epochs.txt new file mode 100644 index 0000000..9328714 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41c_epochs.txt @@ -0,0 +1,7 @@ +# Ch435 epoch descriptor table (1 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 1 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 165358 13760 480 sh3_zsrt139f41c0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41c0.mem 125 13 0 sh3_zsrt139f41c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41d_epochs.txt new file mode 100644 index 0000000..91f6f7b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f41d_epochs.txt @@ -0,0 +1,8 @@ +# Ch435 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 165358 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d0.mem 17 1 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +1 170407 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d1.mem 116 12 1 sh3_zsrt139f41d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_ch432_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_ch432_board_run.log new file mode 100644 index 0000000..052a743 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_ch432_board_run.log @@ -0,0 +1,1747 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f42_epochs.txt: 292 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx165358 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 1 tris/17 words +[sched] epoch 124: idx165536 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 100 tris/908 words +[sched] epoch 125: idx166269 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 73 tris/665 words +[sched] epoch 126: idx166950 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 80 tris/728 words +[sched] epoch 127: idx167670 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 128: idx168416 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 57 tris/521 words +[sched] epoch 129: idx168815 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 13 tris/125 words +[sched] epoch 130: idx169227 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 72 tris/656 words +[sched] epoch 131: idx169830 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 35 tris/323 words +[sched] epoch 132: idx170177 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 12 tris/116 words +[sched] epoch 133: idx170407 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 12 tris/116 words +[sched] epoch 134: idx170637 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 133 tris/1205 words +[sched] epoch 135: idx171088 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 106 tris/962 words +[sched] epoch 136: idx171678 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 59 tris/539 words +[sched] epoch 137: idx172233 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 138: idx172601 tbp8192 cbp480 tex crc=0x68e8cb9d (exp 0x68e8cb9d) 226 tris/2042 words +[sched] epoch 139: idx172601 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 43 tris/395 words +[sched] epoch 140: idx175765 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 14 tris/134 words +[sched] epoch 141: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 142: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] epoch 143: idx196167 tbp11264 cbp0 tex crc=0x57f35475 (exp 0x57f35475) 6 tris/62 words +[sched] epoch 144: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 145: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 146: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 147: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 148: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 149: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 150: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 151: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 152: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 153: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 154: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 155: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 156: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 157: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 158: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 159: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 160: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 161: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 162: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 163: idx196494 tbp10240 cbp480 tex crc=0x13cfe390 (exp 0x13cfe390) 51 tris/467 words +[sched] epoch 164: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 165: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 166: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 167: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 168: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 169: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 170: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 57 tris/521 words +[sched] epoch 171: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 172: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 173: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 174: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 175: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 58 tris/530 words +[sched] epoch 176: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 177: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 178: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 179: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 180: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 181: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 182: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 183: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 184: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 185: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 186: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 187: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 188: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 189: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 190: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 191: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 192: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 193: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 194: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 195: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 196: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 197: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 198: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 199: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 200: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 201: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 202: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 203: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 204: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 205: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 206: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 207: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 208: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 209: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 47 tris/431 words +[sched] epoch 210: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 211: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 78 tris/710 words +[sched] epoch 212: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 63 tris/575 words +[sched] epoch 213: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 214: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 215: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 216: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 217: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 218: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 219: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 220: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 221: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 222: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 223: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 224: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 225: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 226: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 227: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 228: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 229: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 230: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 231: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 232: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 76 tris/692 words +[sched] epoch 233: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 73 tris/665 words +[sched] epoch 234: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 235: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 68 tris/620 words +[sched] epoch 236: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 237: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 238: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 239: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 240: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 241: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 242: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 64 tris/584 words +[sched] epoch 243: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 244: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 245: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 246: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 247: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 248: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 249: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 250: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 251: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 252: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 253: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 254: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 255: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 31 tris/287 words +[sched] epoch 256: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 257: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 25 tris/233 words +[sched] epoch 258: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 259: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 260: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 261: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 71 tris/647 words +[sched] epoch 262: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 263: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 264: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 265: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 266: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 267: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 67 tris/611 words +[sched] epoch 268: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 39 tris/359 words +[sched] epoch 269: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 270: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 271: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 272: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 273: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 274: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 275: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 276: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 277: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 278: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 279: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 280: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 281: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 282: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 283: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 284: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 285: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 286: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 287: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 17 tris/161 words +[sched] epoch 288: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 289: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 290: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 291: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 14 tris/134 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=19 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2187 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=4861 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=5352 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=8330 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=8661 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=10114 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=10149 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=10429 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=10674 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 10674->10677) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=10677 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=10803 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=11066 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=11470 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=11727 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=12163 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=13025 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=13374 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=13467 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=13552 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=13877 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=14281 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=14425 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=14918 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=15721 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=16113 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=16496 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=16917 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=17010 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=17492 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=17627 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=17821 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=17999 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=18291 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=18376 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=18412 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 18412->18421) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=18421 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=20965 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=21734 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=24700 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=25023 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=25132 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=25350 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=25819 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25954 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=27221 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=27483 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=28543 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=29278 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=30110 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=30129 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=30504 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=30843 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=31211 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=32243 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=34923 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=35481 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=36822 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=38073 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=39745 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=39773 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=39850 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=39985 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=40023 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=40213 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=40429 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=40785 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=41099 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=41341 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41375 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=42140 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=42917 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=45572 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=46205 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=48096 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=50091 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=52341 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=53868 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=54896 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=57336 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=59870 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=60076 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 60076->60078) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=60078 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=60107 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=60113 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=60373 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=60478 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=60562 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=60852 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=61249 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=61800 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=62159 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=62527 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=62768 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=63013 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=63159 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=63197 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=63257 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=63305 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63326 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 63326->63330) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=63330 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=63381 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=63462 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=63485 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63561 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=63577 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 63577->63589) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=63589 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=64019 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=64441 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=64789 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=65106 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=65309 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=65343 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=65401 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=65452 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=65505 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65566 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=65611 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=65650 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65686 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65715 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=65855 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=65925 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 123: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 123: drain low pulse completed between host polls; counters advanced (records 39->1, FB beats 65925->65926) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=65926 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 124 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 124: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=66329 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 125: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=66798 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 126 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 126: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=67214 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 127: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=67347 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 128: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=67718 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 129: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=67813 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 130 pal: runtime copy sum32=0x829b8725 (exp 0x829b8725) +[sched] epoch 130: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=67987 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 131 pal: runtime copy sum32=0x84317595 (exp 0x84317595) +[sched] epoch 131: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=68049 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 132 pal: runtime copy sum32=0x8504a80c (exp 0x8504a80c) +[sched] epoch 132: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68092 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 133 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 133: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68149 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 134 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 134: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=68582 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 135: streamed 962 words, staged_addr=962 (exp 962, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=106 (exp 106), FB beats=68899 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 136: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=69041 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 137: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=69121 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138 tex: upload wr_errs=0 ; fill crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 138 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 138: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=70011 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 139: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=70174 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 140: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=70209 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 141 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 141: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=70286 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 142: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=70322 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143 tex: upload wr_errs=0 ; fill crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 143: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=82610 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 144: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=94898 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 145: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=107186 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 146: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=119474 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 147: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=131762 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 148: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=144050 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 149: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=156338 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 150: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=168626 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 151: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=180914 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 152: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=192946 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 153: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=205090 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 154: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=217234 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 155: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=229378 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 156: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=241522 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 157: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=253666 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 158: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=265810 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 159: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=277954 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 160: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=290098 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 161: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=302242 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 162: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=314133 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163 tex: upload wr_errs=0 ; fill crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 163 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 163: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=328203 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 164: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=342586 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 165: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=356831 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 166 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 166: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=371229 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 167 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 167: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=385391 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 168: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=399537 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 169: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=413983 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 170: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=428340 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 171: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=442450 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 172: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=456258 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 173: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=470580 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 174: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=484964 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 175: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=499210 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 176: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=513623 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 177: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=527790 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 178: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=541949 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 179: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=556294 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 180: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=570295 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 181: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=584485 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 182 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 182: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=598902 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 183: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=613330 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 184: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=627748 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 185: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=638006 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 186: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=652326 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 187: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=666286 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 188: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=679957 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 189: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=694381 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 190: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=708111 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 191: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=722466 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 192: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=736301 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 193: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=750364 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 194: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=764332 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 195: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=778410 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 196: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=792829 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 197: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=806880 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 198: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=820855 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 199: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=835272 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 200: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=849676 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 201: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=863981 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 202: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=877929 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 203: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=891982 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 204: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=905873 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 205: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=920070 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 206: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=934337 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 207: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=948663 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 208: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=962978 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 209: streamed 431 words, staged_addr=431 (exp 431, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=47 (exp 47), FB beats=977411 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 210: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=991667 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 211: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=1005927 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 212: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=1019923 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 213: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=1034176 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 214: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1048350 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 215: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1062588 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 216: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1076945 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 217: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1091341 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 218: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1105731 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 219: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1112915 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 220: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1127347 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 221 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 221: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1141733 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 222 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 222: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1155623 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 223: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=1169997 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 224: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1183961 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 225 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 225: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1198362 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 226: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1212187 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 227: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1226452 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 228: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=1240350 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 229 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 229: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=1254762 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 230: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1269052 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 231: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1283391 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 232: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=1297268 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 233: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=1311446 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 234 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 234: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1325829 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 235: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=1339852 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 236: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1353836 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 237: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1367996 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 238: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1382166 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 239: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=1396176 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 240: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1409950 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 241: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1424153 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 242: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=1438105 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 243: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1452193 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 244: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1466301 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 245 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 245: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1480737 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 246: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1494967 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 247: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1509212 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 248: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1523129 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 249: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1537205 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 250: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1551443 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 251 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 251: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1565461 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 252: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1579019 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 253: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1593178 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 254: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1607467 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 255: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=1621778 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 256: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1636079 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 257: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=1649935 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 258: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1663656 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 259 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 259: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=1676911 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 260: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=1691020 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 261 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 261: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=1704891 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 262: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1719178 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 263 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 263: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1733595 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 264: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1747513 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 265: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1761836 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 266: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1776246 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 267: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=1790103 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 268: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=1804238 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 269: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1818064 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 270: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1831869 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 271: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1844820 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 272: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1858949 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 273: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1873314 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 274: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=1887759 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 275: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1901621 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 276: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1915510 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 277: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1929755 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 278: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1943936 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 279: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1958173 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 280: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1972591 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 281: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1986824 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 282: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2000883 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] epoch 283: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 283 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 283: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 283: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=2015277 +[sched] epoch 283: zero fragment drops (snap=0, sticky=0) +[sched] epoch 284: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 284 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 284: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 284: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2029597 +[sched] epoch 284: zero fragment drops (snap=0, sticky=0) +[sched] epoch 285: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 285 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 285: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 285: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2042880 +[sched] epoch 285: zero fragment drops (snap=0, sticky=0) +[sched] epoch 286: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 286 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 286: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 286: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2057249 +[sched] epoch 286: zero fragment drops (snap=0, sticky=0) +[sched] epoch 287: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 287 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 287: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 287: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=2071071 +[sched] epoch 287: zero fragment drops (snap=0, sticky=0) +[sched] epoch 288: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 288 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 288: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 288: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2084946 +[sched] epoch 288: zero fragment drops (snap=0, sticky=0) +[sched] epoch 289: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 289 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 289: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 289: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2099105 +[sched] epoch 289: zero fragment drops (snap=0, sticky=0) +[sched] epoch 290: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 290 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 290: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 290: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2113072 +[sched] epoch 290: zero fragment drops (snap=0, sticky=0) +[sched] epoch 291: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 291 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 291: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 291: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=2117476 +[sched] epoch 291: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f42_ch432_board_fb.mem sum32=0x8304eb9b xor32=0x89a68e4f nonzero=240414 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (292-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_epochs.txt new file mode 100644 index 0000000..3cbe8de --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_epochs.txt @@ -0,0 +1,295 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +148 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +149 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +150 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +151 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +152 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +153 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +154 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +155 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +156 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +157 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +161 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +162 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_ch433_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_ch433_board_run.log new file mode 100644 index 0000000..b4cd1aa --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_ch433_board_run.log @@ -0,0 +1,764 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f43_epochs.txt: 125 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 124: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2183533 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2185701 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=2188375 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2188866 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=2191844 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2192175 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=2193628 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2193663 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2193943 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2194188 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 2194188->2194191) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2194191 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2194317 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2194580 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=2194984 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2195241 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2195677 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=2196539 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2196888 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2196981 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2197066 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2197391 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2197795 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=2197939 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2198432 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=2199235 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2199627 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2200010 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2200431 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2200524 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=2201006 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2201141 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2201335 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2201513 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2201805 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=2201890 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=2201926 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 2201926->2201935) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2201935 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2204479 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2205248 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=2208214 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2208537 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2208646 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=2208864 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2209333 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2209468 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2210735 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2210997 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=2212057 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=2212792 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2213624 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2213643 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=2214018 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=2214357 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2214725 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=2215757 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=2218437 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=2218995 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2220336 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=2221587 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=2223259 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2223287 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2223364 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2223499 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=2223537 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=2223727 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2223943 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=2224299 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2224613 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2224855 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2224889 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=2225654 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=2226431 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=2229086 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=2229719 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2231610 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=2233605 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2235855 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=2237382 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=2238410 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=2240850 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=2243384 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2243590 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 2243590->2243592) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2243592 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=2243621 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2243627 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=2243887 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2243992 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2244076 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2244366 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2244763 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2245314 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2245673 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=2246041 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2246282 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=2246527 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2246673 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2246711 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2246771 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2246819 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2246840 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 2246840->2246844) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2246844 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2246895 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=2246976 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2246999 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2247075 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=2247091 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 2247091->2247103) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=2247103 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=2247533 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2247955 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2248303 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=2248620 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2248823 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2248857 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2248915 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2248966 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2249019 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2249080 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2249125 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=2249164 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2249200 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2249229 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2249369 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=2249439 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 123: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2249516 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 124 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 124: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2249552 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f43_ch433_board_fb.mem sum32=0xde2efc28 xor32=0x5519867c nonzero=174090 bounds=(0,10)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (125-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_epochs.txt new file mode 100644 index 0000000..0738b53 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_epochs.txt @@ -0,0 +1,131 @@ +# Ch433 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_ch433_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_ch433_board_run.log new file mode 100644 index 0000000..2266aee --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_ch433_board_run.log @@ -0,0 +1,1748 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f44_epochs.txt: 292 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx165358 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 1 tris/17 words +[sched] epoch 124: idx165536 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 100 tris/908 words +[sched] epoch 125: idx166269 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 73 tris/665 words +[sched] epoch 126: idx166950 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 80 tris/728 words +[sched] epoch 127: idx167670 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 128: idx168416 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 57 tris/521 words +[sched] epoch 129: idx168815 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 13 tris/125 words +[sched] epoch 130: idx169227 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 72 tris/656 words +[sched] epoch 131: idx169830 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 35 tris/323 words +[sched] epoch 132: idx170177 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 12 tris/116 words +[sched] epoch 133: idx170407 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 12 tris/116 words +[sched] epoch 134: idx170637 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 133 tris/1205 words +[sched] epoch 135: idx171088 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 106 tris/962 words +[sched] epoch 136: idx171678 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 59 tris/539 words +[sched] epoch 137: idx172233 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 138: idx172601 tbp8192 cbp480 tex crc=0x68e8cb9d (exp 0x68e8cb9d) 226 tris/2042 words +[sched] epoch 139: idx172601 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 43 tris/395 words +[sched] epoch 140: idx175765 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 14 tris/134 words +[sched] epoch 141: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 142: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] epoch 143: idx196167 tbp11264 cbp0 tex crc=0x57f35475 (exp 0x57f35475) 6 tris/62 words +[sched] epoch 144: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 145: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 146: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 147: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 148: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 149: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 150: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 151: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 152: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 153: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 154: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 155: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 156: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 157: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 158: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 159: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 160: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 161: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 162: idx196167 tbp11264 cbp0 REUSE resident tex (crc 0x57f35475) 6 tris/62 words +[sched] epoch 163: idx196494 tbp10240 cbp480 tex crc=0x13cfe390 (exp 0x13cfe390) 51 tris/467 words +[sched] epoch 164: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 165: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 166: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 167: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 168: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 169: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 170: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 57 tris/521 words +[sched] epoch 171: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 172: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 173: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 174: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 175: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 58 tris/530 words +[sched] epoch 176: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 177: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 178: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 179: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 180: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 181: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 182: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 183: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 184: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 185: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 186: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 187: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 188: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 189: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 190: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 191: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 192: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 193: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 194: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 195: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 196: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 197: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 198: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 199: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 200: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 201: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 202: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 203: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 204: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 205: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 206: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 207: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 208: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 209: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 47 tris/431 words +[sched] epoch 210: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 211: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 78 tris/710 words +[sched] epoch 212: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 63 tris/575 words +[sched] epoch 213: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 214: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 215: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 216: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 217: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 218: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 219: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 220: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 221: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 222: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 223: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 224: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 225: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 226: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 227: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 228: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 229: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 230: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 231: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 232: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 76 tris/692 words +[sched] epoch 233: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 73 tris/665 words +[sched] epoch 234: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 235: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 68 tris/620 words +[sched] epoch 236: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 237: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 238: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 239: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 240: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 241: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 242: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 64 tris/584 words +[sched] epoch 243: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 244: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 245: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 246: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 247: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 248: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 249: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 250: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 251: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 252: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 253: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 254: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 255: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 31 tris/287 words +[sched] epoch 256: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 257: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 25 tris/233 words +[sched] epoch 258: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 259: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 260: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 261: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 71 tris/647 words +[sched] epoch 262: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 263: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 264: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 265: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 266: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 267: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 67 tris/611 words +[sched] epoch 268: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 39 tris/359 words +[sched] epoch 269: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 270: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 271: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 272: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 273: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 274: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 275: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 276: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 277: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 278: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 279: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 280: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 281: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 282: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 283: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 284: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 285: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 286: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 287: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 17 tris/161 words +[sched] epoch 288: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 289: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 290: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 291: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 14 tris/134 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2249571 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2251739 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=2254413 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2254904 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=2257882 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2258213 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=2259666 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2259701 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2259981 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2260226 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 2260226->2260229) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2260229 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2260355 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2260618 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=2261022 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2261279 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2261715 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=2262577 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2262926 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2263019 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2263104 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2263429 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2263833 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=2263977 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2264470 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=2265273 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2265665 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2266048 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2266469 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2266562 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=2267044 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2267179 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2267373 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2267551 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2267843 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=2267928 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=2267964 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 2267964->2267973) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2267973 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2270517 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2271286 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=2274252 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2274575 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2274684 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=2274902 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2275371 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2275506 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2276773 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2277035 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=2278095 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=2278830 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2279662 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2279681 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=2280056 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=2280395 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2280763 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=2281795 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=2284475 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=2285033 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2286374 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=2287625 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=2289297 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2289325 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2289402 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2289537 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=2289575 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=2289765 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2289981 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=2290337 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2290651 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2290893 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2290927 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=2291692 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=2292469 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=2295124 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=2295757 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2297648 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=2299643 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2301893 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=2303420 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=2304448 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=2306888 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=2309422 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2309628 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 2309628->2309630) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2309630 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=2309659 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2309665 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=2309925 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2310030 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2310114 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2310404 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2310801 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2311352 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2311711 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=2312079 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2312320 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=2312565 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2312711 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2312749 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2312809 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2312857 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2312878 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 2312878->2312882) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2312882 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2312933 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=2313014 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2313037 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2313113 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=2313129 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 2313129->2313141) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=2313141 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=2313571 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2313993 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2314341 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=2314658 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2314861 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2314895 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2314953 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2315004 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2315057 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2315118 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2315163 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=2315202 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2315238 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2315267 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2315407 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=2315477 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 123: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 123: drain low pulse completed between host polls; counters advanced (records 39->1, FB beats 2315477->2315478) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=2315478 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 124 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 124: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=2315881 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 125: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2316350 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 126 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 126: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=2316766 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 127: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2316899 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 128: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2317270 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 129: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=2317365 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 130 pal: runtime copy sum32=0x829b8725 (exp 0x829b8725) +[sched] epoch 130: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=2317539 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 131 pal: runtime copy sum32=0x84317595 (exp 0x84317595) +[sched] epoch 131: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2317601 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 132 pal: runtime copy sum32=0x8504a80c (exp 0x8504a80c) +[sched] epoch 132: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 132: drain low pulse completed between host polls; counters advanced (records 35->12, FB beats 2317601->2317644) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2317644 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 133 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 133: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2317701 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 134 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 134: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=2318134 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 135: streamed 962 words, staged_addr=962 (exp 962, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=106 (exp 106), FB beats=2318451 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 136: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2318593 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 137: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2318673 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138 tex: upload wr_errs=0 ; fill crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 138 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 138: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2319563 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 139: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2319726 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 140: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=2319761 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 141 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 141: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2319838 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 142: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2319874 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143 tex: upload wr_errs=0 ; fill crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 143: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2332162 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 144: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2344450 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 145: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2356738 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 146: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2369026 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 147: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2381314 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 148: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2393602 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 149: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2405890 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 150: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2418178 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 151: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2430466 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 152: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2442498 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 153: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2454642 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 154: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2466786 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 155: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2478930 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 156: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2491074 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 157: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2503218 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 158: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2515362 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 159: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2527506 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 160: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2539650 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 161: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2551794 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0x57f35475 (exp 0x57f35475) beats=8192 (exp 8192) +[sched] epoch 162: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2563685 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163 tex: upload wr_errs=0 ; fill crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 163 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 163: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2577755 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 164: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=2592138 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 165: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=2606383 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 166 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 166: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2620781 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 167 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 167: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2634943 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 168: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2649089 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 169: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2663535 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 170: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2677892 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 171: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2692002 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 172: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2705810 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 173: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2720132 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 174: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2734516 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 175: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2748762 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 176: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2763175 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 177: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2777342 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 178: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2791501 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 179: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2805846 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 180: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2819847 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 181: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2834037 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 182 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 182: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2848454 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 183: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2862882 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 184: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2877300 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 185: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=2887558 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 186: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2901878 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 187: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2915838 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 188: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2929509 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 189: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2943933 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 190: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=2957663 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 191: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2972018 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 192: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2985853 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 193: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2999916 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 194: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=3013884 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 195: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3027962 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 196: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=3042381 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 197: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3056432 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 198: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3070407 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 199: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3084824 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 200: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=3099228 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 201: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=3113533 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 202: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3127481 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 203: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3141534 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 204: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=3155425 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 205: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=3169622 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 206: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3183889 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 207: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3198215 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 208: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3212530 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 209: streamed 431 words, staged_addr=431 (exp 431, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=47 (exp 47), FB beats=3226963 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 210: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3241219 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 211: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=3255479 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 212: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=3269475 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 213: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=3283728 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 214: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=3297902 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 215: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3312140 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 216: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3326497 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 217: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=3340893 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 218: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3355283 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 219: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3362467 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 220: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3376899 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 221 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 221: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3391285 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 222 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 222: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=3405175 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 223: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3419549 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 224: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=3433513 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 225 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 225: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3447914 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 226: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=3461739 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 227: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3476004 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 228: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=3489902 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 229 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 229: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=3504314 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 230: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=3518604 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 231: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3532943 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 232: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=3546820 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 233: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=3560998 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 234 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 234: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=3575381 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 235: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=3589404 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 236: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=3603388 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 237: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3617548 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 238: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3631718 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 239: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=3645728 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 240: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3659502 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 241: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=3673705 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 242: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=3687657 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 243: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3701745 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 244: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3715853 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 245 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 245: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=3730289 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 246: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=3744519 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 247: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3758764 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 248: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=3772681 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 249: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3786757 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 250: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=3800995 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 251 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 251: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3815013 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 252: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=3828571 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 253: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3842730 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 254: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=3857019 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 255: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=3871330 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 256: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=3885631 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 257: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=3899487 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 258: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=3913208 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 259 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 259: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=3926463 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 260: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=3940572 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 261 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 261: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=3954443 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 262: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3968730 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 263 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 263: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3983147 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 264: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3997065 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 265: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=4011388 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 266: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=4025798 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 267: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=4039655 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 268: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=4053790 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 269: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=4067616 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 270: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=4081421 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 271: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=4094372 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 272: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=4108501 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 273: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=4122866 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 274: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=4137311 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 275: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4151173 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 276: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=4165062 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 277: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=4179307 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 278: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=4193488 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 279: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=4207725 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 280: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=4222143 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 281: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=4236376 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 282: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=4250435 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] epoch 283: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 283 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 283: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 283: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=4264829 +[sched] epoch 283: zero fragment drops (snap=0, sticky=0) +[sched] epoch 284: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 284 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 284: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 284: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=4279149 +[sched] epoch 284: zero fragment drops (snap=0, sticky=0) +[sched] epoch 285: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 285 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 285: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 285: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=4292432 +[sched] epoch 285: zero fragment drops (snap=0, sticky=0) +[sched] epoch 286: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 286 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 286: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 286: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4306801 +[sched] epoch 286: zero fragment drops (snap=0, sticky=0) +[sched] epoch 287: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 287 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 287: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 287: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=4320623 +[sched] epoch 287: zero fragment drops (snap=0, sticky=0) +[sched] epoch 288: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 288 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 288: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 288: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=4334498 +[sched] epoch 288: zero fragment drops (snap=0, sticky=0) +[sched] epoch 289: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 289 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 289: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 289: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4348657 +[sched] epoch 289: zero fragment drops (snap=0, sticky=0) +[sched] epoch 290: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 290 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 290: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 290: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4362624 +[sched] epoch 290: zero fragment drops (snap=0, sticky=0) +[sched] epoch 291: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 291 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 291: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 291: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=4367028 +[sched] epoch 291: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f44_ch433_board_fb.mem sum32=0x96f07662 xor32=0x0a031310 nonzero=240492 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (292-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_epochs.txt new file mode 100644 index 0000000..ef112e2 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_epochs.txt @@ -0,0 +1,295 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +145 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +146 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +147 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +148 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +149 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +150 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +151 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +152 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +153 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +154 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +155 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +156 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +157 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +158 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +159 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +160 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +161 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +162 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +163 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f45_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f45_epochs.txt new file mode 100644 index 0000000..a4dd10f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f45_epochs.txt @@ -0,0 +1,637 @@ +# Ch434 epoch descriptor table (631 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 631 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177272 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f450.mem 206 22 0 sh3_zsrt139f450_pal.mem 0x00000000 +1 177291 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f451.mem 962 106 1 sh3_zsrt139f450_pal.mem 0x00000000 +2 177331 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f452.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +3 177350 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f453.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +4 177364 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f454.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +5 177397 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f455.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +6 177638 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f456.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +7 177671 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f457.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +8 177690 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f458.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +9 177704 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f459.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +10 177723 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4510.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +11 177737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4511.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +12 177756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4512.mem 503 55 1 sh3_zsrt139f450_pal.mem 0x00000000 +13 177763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4513.mem 1466 162 1 sh3_zsrt139f450_pal.mem 0x00000000 +14 177803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4514.mem 629 69 1 sh3_zsrt139f450_pal.mem 0x00000000 +15 177810 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4515.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +16 177822 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4516.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +17 177836 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4517.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +18 177855 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4518.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +19 177862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4519.mem 530 58 1 sh3_zsrt139f450_pal.mem 0x00000000 +20 177895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4520.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +21 177909 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4521.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +22 177928 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4522.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +23 178041 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4523.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +24 178067 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4524.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +25 178099 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4525.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +26 178138 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4526.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +27 178152 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4527.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +28 178191 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4528.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +29 178205 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4529.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +30 178224 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4530.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +31 178250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4531.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +32 178257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4532.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +33 178290 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4533.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +34 178304 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4534.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +35 178323 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4535.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +36 178337 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4536.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +37 178356 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4537.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +38 178370 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4538.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +39 178389 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4539.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +40 178403 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4540.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +41 178415 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4541.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +42 178422 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4542.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +43 178448 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4543.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +44 178455 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4544.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +45 178481 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4545.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +46 178488 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4546.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +47 178502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4547.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +48 178514 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4548.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +49 178528 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4549.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +50 178547 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4550.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +51 178554 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4551.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +52 178568 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4552.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +53 178580 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4553.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +54 178587 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4554.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +55 178601 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4555.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +56 178957 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4556.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +57 178964 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4557.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +58 178978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4558.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +59 178997 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4559.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +60 179011 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4560.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +61 179030 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4561.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +62 179044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4562.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +63 179063 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4563.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +64 179077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4564.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +65 179096 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4565.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +66 179110 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4566.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +67 179129 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4567.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +68 179143 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4568.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +69 179162 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4569.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +70 179228 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4570.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +71 179242 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4571.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +72 179261 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4572.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +73 179275 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4573.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +74 179308 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4574.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +75 179327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4575.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +76 179341 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4576.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +77 179360 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4577.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +78 179374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4578.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +79 179393 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4579.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +80 179407 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4580.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +81 179426 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4581.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +82 179440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4582.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +83 179466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4583.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +84 179485 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4584.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +85 179499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4585.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +86 179518 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4586.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +87 179532 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4587.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +88 179551 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4588.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +89 179565 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4589.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +90 179584 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4590.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +91 179598 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4591.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +92 179617 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4592.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +93 179631 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4593.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +94 179650 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4594.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +95 179664 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4595.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +96 179683 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4596.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +97 179697 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4597.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +98 179716 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4598.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +99 179730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4599.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +100 179749 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45100.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +101 179763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45101.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +102 179782 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45102.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +103 179796 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45103.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +104 179815 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45104.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +105 179829 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45105.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +106 179848 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45106.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +107 179862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45107.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +108 179881 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45108.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +109 179895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45109.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +110 179914 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45110.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +111 179928 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45111.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +112 179947 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45112.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +113 179961 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45113.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +114 179980 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45114.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +115 179994 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45115.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +116 180013 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45116.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +117 180027 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45117.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +118 180046 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45118.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +119 180060 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45119.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +120 180079 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45120.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +121 180093 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45121.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +122 180112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45122.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +123 180126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45123.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +124 180145 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45124.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +125 180159 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45125.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +126 180178 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45126.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +127 180192 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45127.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +128 180211 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45128.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +129 180225 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45129.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +130 180244 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45130.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +131 180258 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45131.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +132 182665 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45132.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +133 182693 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45133.mem 656 72 1 sh3_zsrt139f450_pal.mem 0x00000000 +134 182753 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45134.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +135 183054 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45135.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +136 183080 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45136.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +137 183087 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45137.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +138 183094 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45138.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +139 183122 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45139.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +140 183136 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45140.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +141 183150 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45141.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +142 183157 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45142.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +143 183171 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45143.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +144 183192 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45144.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +145 183199 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45145.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +146 183213 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45146.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +147 183220 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45147.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +148 183227 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45148.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +149 183374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45149.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +150 183388 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45150.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +151 183395 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45151.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +152 183402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45152.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +153 183409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45153.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +154 183416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45154.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +155 183437 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45155.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +156 183451 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45156.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +157 183458 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45157.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +158 183465 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45158.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +159 183472 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45159.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +160 183479 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45160.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +161 183493 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45161.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +162 183507 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45162.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +163 183514 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45163.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +164 183528 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45164.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +165 183535 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45165.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +166 184077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45166.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +167 184084 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45167.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +168 184091 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45168.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +169 184098 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45169.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +170 184105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45170.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +171 184112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45171.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +172 184119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45172.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +173 184126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45173.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +174 184133 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45174.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +175 184154 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45175.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +176 184168 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45176.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +177 184175 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45177.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +178 184182 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45178.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +179 184210 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45179.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +180 184217 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45180.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +181 184224 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45181.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +182 184238 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45182.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +183 184252 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45183.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +184 184700 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45184.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +185 184720 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45185.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +186 184741 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45186.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +187 184769 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45187.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +188 184781 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45188.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +189 184790 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45189.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +190 184808 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45190.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +191 184817 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45191.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +192 184826 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45192.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +193 184853 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45193.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +194 184871 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45194.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +195 184889 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45195.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +196 184898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45196.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +197 184907 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45197.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +198 184925 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45198.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +199 184934 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45199.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +200 184952 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45200.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +201 185185 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45201.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +202 185205 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45202.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +203 185219 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45203.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +204 185226 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45204.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +205 185233 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45205.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +206 185240 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45206.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +207 185254 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45207.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +208 185268 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45208.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +209 185275 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45209.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +210 185492 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45210.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +211 185525 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45211.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +212 185532 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45212.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +213 185539 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45213.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +214 185546 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45214.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +215 185553 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45215.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +216 185567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45216.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +217 185574 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45217.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +218 185581 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45218.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +219 185730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45219.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +220 185748 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45220.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +221 185757 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45221.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +222 185766 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45222.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +223 185775 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45223.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +224 185784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45224.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +225 185793 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45225.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +226 185802 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45226.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +227 185811 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45227.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +228 186061 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45228.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +229 186075 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45229.mem 683 75 1 sh3_zsrt139f450_pal.mem 0x00000000 +230 186131 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45230.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +231 186138 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45231.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +232 186145 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45232.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +233 186398 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45233.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +234 186405 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45234.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +235 186412 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45235.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +236 186689 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45236.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +237 186703 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45237.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +238 186710 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45238.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +239 186717 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45239.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +240 186730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45240.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +241 186737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45241.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +242 186744 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45242.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +243 186751 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45243.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +244 186758 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45244.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +245 186765 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45245.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +246 186772 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45246.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +247 186784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45247.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +248 186814 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45248.mem 575 63 1 sh3_zsrt139f450_pal.mem 0x00000000 +249 186874 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45249.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +250 186881 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45250.mem 431 47 1 sh3_zsrt139f450_pal.mem 0x00000000 +251 186895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45251.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +252 186922 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45252.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +253 186936 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45253.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +254 186943 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45254.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +255 186977 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45255.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +256 186984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45256.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +257 186991 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45257.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +258 186998 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45258.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +259 187111 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45259.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +260 187174 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45260.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +261 187188 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45261.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +262 187202 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45262.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +263 187241 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45263.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +264 187248 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45264.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +265 187262 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45265.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +266 187289 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45266.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +267 187296 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45267.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +268 187310 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45268.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +269 187317 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45269.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +270 187331 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45270.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +271 187418 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45271.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +272 187427 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45272.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +273 187445 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45273.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +274 187454 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45274.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +275 187472 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45275.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +276 187490 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45276.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +277 187499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45277.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +278 187542 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45278.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +279 187760 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45279.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +280 187794 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45280.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +281 187808 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45281.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +282 187815 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45282.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +283 187822 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45283.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +284 187829 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45284.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +285 187856 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45285.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +286 187870 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45286.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +287 187877 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45287.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +288 187884 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45288.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +289 187957 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45289.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +290 187966 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45290.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +291 187975 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45291.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +292 187984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45292.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +293 188110 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45293.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +294 188349 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45294.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +295 188363 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45295.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +296 188383 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45296.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +297 188390 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45297.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +298 188488 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45298.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +299 188495 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45299.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +300 188502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45300.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +301 188981 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45301.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +302 189020 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45302.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +303 189029 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45303.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +304 189038 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45304.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +305 189096 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45305.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +306 189117 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45306.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +307 189124 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45307.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +308 189131 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45308.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +309 189537 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45309.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +310 189544 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45310.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +311 189578 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45311.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +312 189592 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45312.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +313 189614 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45313.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +314 189633 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45314.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +315 189691 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45315.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +316 189711 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45316.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +317 189725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45317.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +318 189789 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45318.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +319 189796 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45319.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +320 189810 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45320.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +321 189817 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45321.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +322 189836 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45322.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +323 189850 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45323.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +324 189857 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45324.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +325 190017 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45325.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +326 190080 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45326.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +327 190107 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45327.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +328 190114 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45328.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +329 190128 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45329.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +330 190135 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45330.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +331 190169 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45331.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +332 190176 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45332.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +333 190208 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45333.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +334 190215 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45334.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +335 190222 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45335.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +336 190229 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45336.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +337 190393 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45337.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +338 190425 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45338.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +339 190439 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45339.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +340 190466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45340.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +341 190493 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45341.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +342 190500 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45342.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +343 190737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45343.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +344 190770 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45344.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +345 190855 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45345.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +346 190862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45346.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +347 190889 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45347.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +348 190896 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45348.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +349 190910 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45349.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +350 190936 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45350.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +351 190943 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45351.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +352 190950 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45352.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +353 191220 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45353.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +354 191234 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45354.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +355 191268 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45355.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +356 191287 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45356.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +357 191294 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45357.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +358 191327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45358.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +359 191334 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45359.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +360 191348 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45360.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +361 191526 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45361.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +362 191533 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45362.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +363 191560 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45363.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +364 191615 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45364.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +365 191645 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45365.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +366 191712 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45366.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +367 191726 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45367.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +368 192434 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45368.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +369 192441 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45369.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +370 192448 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45370.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +371 192475 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45371.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +372 192495 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45372.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +373 192502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45373.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +374 192527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45374.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +375 192534 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45375.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +376 192541 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45376.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +377 192567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45377.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +378 192587 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45378.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +379 192601 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45379.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +380 192620 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45380.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +381 192627 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45381.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +382 192634 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45382.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +383 192666 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45383.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +384 192673 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45384.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +385 192680 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45385.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +386 192687 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45386.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +387 192694 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45387.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +388 192725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45388.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +389 192737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45389.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +390 192744 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45390.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +391 192751 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45391.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +392 192758 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45392.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +393 192770 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45393.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +394 192777 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45394.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +395 192784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45395.mem 377 41 1 sh3_zsrt139f450_pal.mem 0x00000000 +396 192798 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45396.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +397 192805 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45397.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +398 192819 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45398.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +399 192826 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45399.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +400 192840 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45400.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +401 192847 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45401.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +402 192854 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45402.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +403 192886 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45403.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +404 192898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45404.mem 512 56 1 sh3_zsrt139f450_pal.mem 0x00000000 +405 192919 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45405.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +406 192926 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45406.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +407 192933 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45407.mem 584 64 1 sh3_zsrt139f450_pal.mem 0x00000000 +408 192964 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45408.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +409 192971 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45409.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +410 192978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45410.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +411 193002 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45411.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +412 193009 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45412.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +413 193016 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45413.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +414 193023 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45414.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +415 193037 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45415.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +416 193044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45416.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +417 193058 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45417.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +418 193079 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45418.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +419 193086 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45419.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +420 193093 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45420.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +421 193105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45421.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +422 193112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45422.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +423 193119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45423.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +424 193126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45424.mem 404 44 1 sh3_zsrt139f450_pal.mem 0x00000000 +425 193152 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45425.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +426 193166 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45426.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +427 193185 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45427.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +428 193204 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45428.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +429 193211 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45429.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +430 193232 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45430.mem 665 73 1 sh3_zsrt139f450_pal.mem 0x00000000 +431 193246 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45431.mem 440 48 1 sh3_zsrt139f450_pal.mem 0x00000000 +432 193260 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45432.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +433 193274 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45433.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +434 193281 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45434.mem 467 51 1 sh3_zsrt139f450_pal.mem 0x00000000 +435 193295 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45435.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +436 193302 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45436.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +437 193309 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45437.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +438 193316 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45438.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +439 193323 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45439.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +440 193337 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45440.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +441 193344 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45441.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +442 193358 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45442.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +443 193365 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45443.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +444 193391 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45444.mem 674 74 1 sh3_zsrt139f450_pal.mem 0x00000000 +445 193405 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45445.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +446 193426 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45446.mem 584 64 1 sh3_zsrt139f450_pal.mem 0x00000000 +447 193440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45447.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +448 193447 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45448.mem 548 60 1 sh3_zsrt139f450_pal.mem 0x00000000 +449 193466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45449.mem 449 49 1 sh3_zsrt139f450_pal.mem 0x00000000 +450 193480 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45450.mem 503 55 1 sh3_zsrt139f450_pal.mem 0x00000000 +451 193499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45451.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +452 193506 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45452.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +453 193513 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45453.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +454 193520 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45454.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +455 193527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45455.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +456 193534 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45456.mem 899 99 1 sh3_zsrt139f450_pal.mem 0x00000000 +457 193570 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45457.mem 431 47 1 sh3_zsrt139f450_pal.mem 0x00000000 +458 193584 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45458.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +459 193591 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45459.mem 449 49 1 sh3_zsrt139f450_pal.mem 0x00000000 +460 193627 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45460.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +461 193656 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45461.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +462 193663 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45462.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +463 193670 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45463.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +464 193677 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45464.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +465 193684 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45465.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +466 193691 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45466.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +467 193705 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45467.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +468 193712 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45468.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +469 193719 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45469.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +470 193733 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45470.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +471 193747 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45471.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +472 193754 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45472.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +473 193761 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45473.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +474 193780 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45474.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +475 193787 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45475.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +476 193794 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45476.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +477 193806 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45477.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +478 193820 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45478.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +479 193839 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45479.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +480 193846 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45480.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +481 193872 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45481.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +482 193898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45482.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +483 193905 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45483.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +484 193912 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45484.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +485 193919 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45485.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +486 193926 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45486.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +487 193945 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45487.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +488 193952 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45488.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +489 193966 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45489.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +490 193978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45490.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +491 193985 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45491.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +492 193999 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45492.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +493 194006 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45493.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +494 194030 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45494.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +495 194037 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45495.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +496 194044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45496.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +497 194063 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45497.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +498 194070 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45498.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +499 194077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45499.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +500 194091 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45500.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +501 194105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45501.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +502 194119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45502.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +503 194126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45503.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +504 194133 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45504.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +505 194169 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45505.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +506 194176 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45506.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +507 194183 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45507.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +508 194202 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45508.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +509 194209 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45509.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +510 194216 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45510.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +511 194235 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45511.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +512 194242 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45512.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +513 194263 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45513.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +514 194277 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45514.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +515 194296 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45515.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +516 194324 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45516.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +517 194350 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45517.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +518 194381 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45518.mem 485 53 1 sh3_zsrt139f450_pal.mem 0x00000000 +519 194395 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45519.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +520 194402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45520.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +521 194409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45521.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +522 194416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45522.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +523 194423 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45523.mem 611 67 1 sh3_zsrt139f450_pal.mem 0x00000000 +524 194456 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45524.mem 692 76 1 sh3_zsrt139f450_pal.mem 0x00000000 +525 194494 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45525.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +526 194508 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45526.mem 476 52 1 sh3_zsrt139f450_pal.mem 0x00000000 +527 194527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45527.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +528 194541 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45528.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +529 194553 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45529.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +530 194560 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45530.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +531 194567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45531.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +532 194581 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45532.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +533 194609 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45533.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +534 194637 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45534.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +535 194678 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45535.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +536 194690 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45536.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +537 194697 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45537.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +538 194704 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45538.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +539 194711 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45539.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +540 194718 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45540.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +541 194725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45541.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +542 194746 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45542.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +543 194753 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45543.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +544 194760 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45544.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +545 194767 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45545.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +546 194774 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45546.mem 494 54 1 sh3_zsrt139f450_pal.mem 0x00000000 +547 194805 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45547.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +548 194819 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45548.mem 575 63 1 sh3_zsrt139f450_pal.mem 0x00000000 +549 194845 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45549.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +550 194852 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45550.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +551 194859 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45551.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +552 194883 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45552.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +553 194897 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45553.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +554 194904 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45554.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +555 194911 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45555.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +556 194918 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45556.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +557 194925 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45557.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000 +558 194939 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45558.mem 665 73 1 sh3_zsrt139f450_pal.mem 0x00000000 +559 194965 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45559.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +560 194984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45560.mem 476 52 1 sh3_zsrt139f450_pal.mem 0x00000000 +561 194998 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45561.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +562 195005 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45562.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +563 195012 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45563.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +564 195031 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45564.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +565 195038 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45565.mem 377 41 1 sh3_zsrt139f450_pal.mem 0x00000000 +566 195069 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45566.mem 566 62 1 sh3_zsrt139f450_pal.mem 0x00000000 +567 195090 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45567.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +568 195104 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45568.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +569 195111 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45569.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +570 195118 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45570.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +571 195125 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45571.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +572 195139 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45572.mem 359 39 1 sh3_zsrt139f450_pal.mem 0x00000000 +573 195163 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45573.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +574 195170 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45574.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +575 195177 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45575.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +576 195194 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45576.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +577 195201 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45577.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +578 195215 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45578.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +579 195222 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45579.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +580 195229 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45580.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +581 195236 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45581.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +582 195243 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45582.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +583 195250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45583.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +584 195257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45584.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +585 195264 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45585.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +586 195271 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45586.mem 386 42 1 sh3_zsrt139f450_pal.mem 0x00000000 +587 195292 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45587.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +588 195306 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45588.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +589 195313 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45589.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +590 195320 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45590.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +591 195327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45591.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +592 195334 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45592.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +593 195374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45593.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +594 195381 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45594.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +595 195388 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45595.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +596 195402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45596.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +597 195409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45597.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +598 195416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45598.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000 +599 195440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45599.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +600 195461 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45600.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +601 195489 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45601.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +602 195496 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45602.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000 +603 195517 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45603.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +604 195531 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45604.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +605 195538 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45605.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +606 195545 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45606.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +607 195552 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45607.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +608 195559 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45608.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +609 195566 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45609.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +610 195594 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45610.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +611 195608 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45611.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +612 195622 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45612.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +613 195634 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45613.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +614 195655 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45614.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +615 195662 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45615.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +616 195669 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45616.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +617 195693 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45617.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000 +618 195714 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45618.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +619 195728 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45619.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +620 195735 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45620.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +621 195742 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45621.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +622 195756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45622.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +623 195763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45623.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +624 195777 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45624.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +625 195789 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45625.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +626 195803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45626.mem 440 48 1 sh3_zsrt139f450_pal.mem 0x00000000 +627 195824 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45627.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +628 195838 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45628.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +629 195867 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45629.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +630 195874 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45630.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f46_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f46_epochs.txt new file mode 100644 index 0000000..eaaf964 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f46_epochs.txt @@ -0,0 +1,926 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139f45', 'zsrt139f11d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 923 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 177272 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f450.mem 206 22 0 sh3_zsrt139f450_pal.mem 0x00000000 +144 177291 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f451.mem 962 106 1 sh3_zsrt139f450_pal.mem 0x00000000 +145 177331 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f452.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +146 177350 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f453.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +147 177364 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f454.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +148 177397 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f455.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +149 177638 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f456.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +150 177671 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f457.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +151 177690 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f458.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +152 177704 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f459.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +153 177723 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4510.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +154 177737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4511.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +155 177756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4512.mem 503 55 1 sh3_zsrt139f450_pal.mem 0x00000000 +156 177763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4513.mem 1466 162 1 sh3_zsrt139f450_pal.mem 0x00000000 +157 177803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4514.mem 629 69 1 sh3_zsrt139f450_pal.mem 0x00000000 +158 177810 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4515.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +159 177822 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4516.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +160 177836 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4517.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +161 177855 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4518.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +162 177862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4519.mem 530 58 1 sh3_zsrt139f450_pal.mem 0x00000000 +163 177895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4520.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +164 177909 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4521.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +165 177928 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4522.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +166 178041 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4523.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +167 178067 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4524.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +168 178099 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4525.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +169 178138 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4526.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +170 178152 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4527.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +171 178191 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4528.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +172 178205 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4529.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +173 178224 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4530.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +174 178250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4531.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +175 178257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4532.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +176 178290 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4533.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +177 178304 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4534.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +178 178323 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4535.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +179 178337 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4536.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +180 178356 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4537.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +181 178370 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4538.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +182 178389 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4539.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +183 178403 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4540.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +184 178415 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4541.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +185 178422 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4542.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +186 178448 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4543.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +187 178455 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4544.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +188 178481 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4545.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +189 178488 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4546.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +190 178502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4547.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +191 178514 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4548.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +192 178528 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4549.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +193 178547 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4550.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +194 178554 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4551.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +195 178568 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4552.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +196 178580 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4553.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +197 178587 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4554.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +198 178601 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4555.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +199 178957 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4556.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +200 178964 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4557.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +201 178978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4558.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +202 178997 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4559.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +203 179011 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4560.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +204 179030 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4561.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +205 179044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4562.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +206 179063 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4563.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +207 179077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4564.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +208 179096 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4565.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +209 179110 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4566.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +210 179129 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4567.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +211 179143 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4568.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +212 179162 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4569.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +213 179228 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4570.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +214 179242 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4571.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +215 179261 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4572.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +216 179275 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4573.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +217 179308 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4574.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +218 179327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4575.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +219 179341 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4576.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +220 179360 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4577.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +221 179374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4578.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +222 179393 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4579.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +223 179407 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4580.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +224 179426 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4581.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +225 179440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4582.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +226 179466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4583.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +227 179485 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4584.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +228 179499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4585.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +229 179518 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4586.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +230 179532 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4587.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +231 179551 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4588.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +232 179565 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4589.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +233 179584 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4590.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +234 179598 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4591.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +235 179617 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4592.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +236 179631 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4593.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +237 179650 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4594.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +238 179664 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4595.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +239 179683 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4596.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +240 179697 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4597.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +241 179716 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4598.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +242 179730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4599.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +243 179749 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45100.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +244 179763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45101.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +245 179782 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45102.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +246 179796 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45103.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +247 179815 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45104.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +248 179829 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45105.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +249 179848 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45106.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +250 179862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45107.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +251 179881 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45108.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +252 179895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45109.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +253 179914 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45110.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +254 179928 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45111.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +255 179947 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45112.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +256 179961 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45113.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +257 179980 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45114.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +258 179994 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45115.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +259 180013 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45116.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +260 180027 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45117.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +261 180046 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45118.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +262 180060 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45119.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +263 180079 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45120.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +264 180093 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45121.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +265 180112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45122.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +266 180126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45123.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +267 180145 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45124.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +268 180159 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45125.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +269 180178 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45126.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +270 180192 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45127.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +271 180211 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45128.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +272 180225 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45129.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +273 180244 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45130.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +274 180258 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45131.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +275 182665 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45132.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +276 182693 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45133.mem 656 72 1 sh3_zsrt139f450_pal.mem 0x00000000 +277 182753 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45134.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +278 183054 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45135.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +279 183080 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45136.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +280 183087 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45137.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +281 183094 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45138.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +282 183122 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45139.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +283 183136 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45140.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +284 183150 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45141.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +285 183157 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45142.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +286 183171 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45143.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +287 183192 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45144.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +288 183199 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45145.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +289 183213 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45146.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +290 183220 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45147.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +291 183227 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45148.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +292 183374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45149.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +293 183388 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45150.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +294 183395 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45151.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +295 183402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45152.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +296 183409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45153.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +297 183416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45154.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +298 183437 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45155.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +299 183451 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45156.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +300 183458 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45157.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +301 183465 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45158.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +302 183472 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45159.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +303 183479 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45160.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +304 183493 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45161.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +305 183507 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45162.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +306 183514 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45163.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +307 183528 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45164.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +308 183535 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45165.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +309 184077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45166.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +310 184084 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45167.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +311 184091 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45168.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +312 184098 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45169.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +313 184105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45170.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +314 184112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45171.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +315 184119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45172.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +316 184126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45173.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +317 184133 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45174.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +318 184154 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45175.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +319 184168 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45176.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +320 184175 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45177.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +321 184182 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45178.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +322 184210 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45179.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +323 184217 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45180.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +324 184224 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45181.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +325 184238 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45182.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +326 184252 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45183.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +327 184700 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45184.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +328 184720 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45185.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +329 184741 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45186.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +330 184769 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45187.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +331 184781 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45188.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +332 184790 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45189.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +333 184808 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45190.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +334 184817 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45191.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +335 184826 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45192.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +336 184853 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45193.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +337 184871 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45194.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +338 184889 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45195.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +339 184898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45196.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +340 184907 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45197.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +341 184925 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45198.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +342 184934 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45199.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +343 184952 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45200.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +344 185185 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45201.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +345 185205 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45202.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +346 185219 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45203.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +347 185226 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45204.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +348 185233 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45205.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +349 185240 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45206.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +350 185254 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45207.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +351 185268 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45208.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +352 185275 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45209.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +353 185492 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45210.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +354 185525 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45211.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +355 185532 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45212.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +356 185539 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45213.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +357 185546 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45214.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +358 185553 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45215.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +359 185567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45216.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +360 185574 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45217.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +361 185581 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45218.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +362 185730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45219.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +363 185748 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45220.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +364 185757 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45221.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +365 185766 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45222.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +366 185775 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45223.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +367 185784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45224.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +368 185793 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45225.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +369 185802 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45226.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +370 185811 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45227.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +371 186061 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45228.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +372 186075 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45229.mem 683 75 1 sh3_zsrt139f450_pal.mem 0x00000000 +373 186131 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45230.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +374 186138 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45231.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +375 186145 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45232.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +376 186398 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45233.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +377 186405 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45234.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +378 186412 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45235.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +379 186689 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45236.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +380 186703 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45237.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +381 186710 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45238.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +382 186717 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45239.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +383 186730 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45240.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +384 186737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45241.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +385 186744 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45242.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +386 186751 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45243.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +387 186758 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45244.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +388 186765 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45245.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +389 186772 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45246.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +390 186784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45247.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +391 186814 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45248.mem 575 63 1 sh3_zsrt139f450_pal.mem 0x00000000 +392 186874 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45249.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +393 186881 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45250.mem 431 47 1 sh3_zsrt139f450_pal.mem 0x00000000 +394 186895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45251.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +395 186922 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45252.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +396 186936 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45253.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +397 186943 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45254.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +398 186977 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45255.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +399 186984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45256.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +400 186991 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45257.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +401 186998 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45258.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +402 187111 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45259.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +403 187174 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45260.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +404 187188 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45261.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +405 187202 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45262.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +406 187241 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45263.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +407 187248 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45264.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +408 187262 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45265.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +409 187289 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45266.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +410 187296 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45267.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +411 187310 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45268.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +412 187317 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45269.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +413 187331 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45270.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +414 187418 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45271.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +415 187427 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45272.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +416 187445 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45273.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +417 187454 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45274.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +418 187472 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45275.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +419 187490 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45276.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +420 187499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45277.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +421 187542 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45278.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +422 187760 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45279.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +423 187794 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45280.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +424 187808 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45281.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +425 187815 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45282.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +426 187822 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45283.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +427 187829 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45284.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +428 187856 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45285.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +429 187870 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45286.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +430 187877 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45287.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +431 187884 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45288.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +432 187957 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45289.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +433 187966 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45290.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +434 187975 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45291.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +435 187984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45292.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +436 188110 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45293.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +437 188349 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45294.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +438 188363 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45295.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +439 188383 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45296.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +440 188390 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45297.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +441 188488 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45298.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +442 188495 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45299.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +443 188502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45300.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +444 188981 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45301.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +445 189020 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45302.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +446 189029 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45303.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +447 189038 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45304.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +448 189096 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45305.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +449 189117 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45306.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +450 189124 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45307.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +451 189131 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45308.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +452 189537 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45309.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +453 189544 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45310.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +454 189578 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45311.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +455 189592 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45312.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +456 189614 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45313.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +457 189633 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45314.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +458 189691 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45315.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +459 189711 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45316.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +460 189725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45317.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +461 189789 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45318.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +462 189796 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45319.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +463 189810 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45320.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +464 189817 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45321.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +465 189836 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45322.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +466 189850 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45323.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +467 189857 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45324.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +468 190017 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45325.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +469 190080 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45326.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +470 190107 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45327.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +471 190114 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45328.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +472 190128 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45329.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +473 190135 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45330.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +474 190169 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45331.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +475 190176 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45332.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +476 190208 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45333.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +477 190215 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45334.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +478 190222 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45335.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +479 190229 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45336.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +480 190393 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45337.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +481 190425 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45338.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +482 190439 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45339.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +483 190466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45340.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +484 190493 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45341.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +485 190500 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45342.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +486 190737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45343.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +487 190770 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45344.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +488 190855 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45345.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +489 190862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45346.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +490 190889 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45347.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +491 190896 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45348.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +492 190910 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45349.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +493 190936 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45350.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +494 190943 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45351.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +495 190950 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45352.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +496 191220 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45353.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +497 191234 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45354.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +498 191268 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45355.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +499 191287 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45356.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +500 191294 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45357.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +501 191327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45358.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +502 191334 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45359.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +503 191348 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45360.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +504 191526 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45361.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +505 191533 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45362.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +506 191560 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45363.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +507 191615 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45364.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +508 191645 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45365.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +509 191712 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45366.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +510 191726 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45367.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +511 192434 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45368.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +512 192441 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45369.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +513 192448 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45370.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +514 192475 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45371.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +515 192495 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45372.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +516 192502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45373.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +517 192527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45374.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +518 192534 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45375.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +519 192541 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45376.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +520 192567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45377.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +521 192587 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45378.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +522 192601 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45379.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +523 192620 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45380.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +524 192627 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45381.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +525 192634 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45382.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +526 192666 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45383.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +527 192673 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45384.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +528 192680 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45385.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +529 192687 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45386.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +530 192694 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45387.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +531 192725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45388.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +532 192737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45389.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +533 192744 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45390.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +534 192751 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45391.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +535 192758 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45392.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +536 192770 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45393.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +537 192777 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45394.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +538 192784 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45395.mem 377 41 1 sh3_zsrt139f450_pal.mem 0x00000000 +539 192798 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45396.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +540 192805 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45397.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +541 192819 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45398.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +542 192826 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45399.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +543 192840 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45400.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +544 192847 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45401.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +545 192854 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45402.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +546 192886 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45403.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +547 192898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45404.mem 512 56 1 sh3_zsrt139f450_pal.mem 0x00000000 +548 192919 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45405.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +549 192926 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45406.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +550 192933 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45407.mem 584 64 1 sh3_zsrt139f450_pal.mem 0x00000000 +551 192964 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45408.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +552 192971 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45409.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +553 192978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45410.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +554 193002 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45411.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +555 193009 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45412.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +556 193016 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45413.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +557 193023 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45414.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +558 193037 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45415.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +559 193044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45416.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +560 193058 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45417.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +561 193079 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45418.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +562 193086 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45419.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +563 193093 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45420.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +564 193105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45421.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +565 193112 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45422.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +566 193119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45423.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +567 193126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45424.mem 404 44 1 sh3_zsrt139f450_pal.mem 0x00000000 +568 193152 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45425.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +569 193166 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45426.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +570 193185 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45427.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +571 193204 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45428.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +572 193211 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45429.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +573 193232 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45430.mem 665 73 1 sh3_zsrt139f450_pal.mem 0x00000000 +574 193246 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45431.mem 440 48 1 sh3_zsrt139f450_pal.mem 0x00000000 +575 193260 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45432.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +576 193274 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45433.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +577 193281 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45434.mem 467 51 1 sh3_zsrt139f450_pal.mem 0x00000000 +578 193295 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45435.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +579 193302 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45436.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +580 193309 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45437.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +581 193316 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45438.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +582 193323 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45439.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +583 193337 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45440.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +584 193344 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45441.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +585 193358 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45442.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +586 193365 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45443.mem 593 65 1 sh3_zsrt139f450_pal.mem 0x00000000 +587 193391 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45444.mem 674 74 1 sh3_zsrt139f450_pal.mem 0x00000000 +588 193405 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45445.mem 701 77 1 sh3_zsrt139f450_pal.mem 0x00000000 +589 193426 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45446.mem 584 64 1 sh3_zsrt139f450_pal.mem 0x00000000 +590 193440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45447.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +591 193447 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45448.mem 548 60 1 sh3_zsrt139f450_pal.mem 0x00000000 +592 193466 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45449.mem 449 49 1 sh3_zsrt139f450_pal.mem 0x00000000 +593 193480 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45450.mem 503 55 1 sh3_zsrt139f450_pal.mem 0x00000000 +594 193499 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45451.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +595 193506 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45452.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +596 193513 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45453.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +597 193520 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45454.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +598 193527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45455.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +599 193534 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45456.mem 899 99 1 sh3_zsrt139f450_pal.mem 0x00000000 +600 193570 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45457.mem 431 47 1 sh3_zsrt139f450_pal.mem 0x00000000 +601 193584 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45458.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +602 193591 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45459.mem 449 49 1 sh3_zsrt139f450_pal.mem 0x00000000 +603 193627 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45460.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +604 193656 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45461.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +605 193663 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45462.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +606 193670 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45463.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +607 193677 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45464.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +608 193684 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45465.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +609 193691 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45466.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +610 193705 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45467.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +611 193712 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45468.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +612 193719 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45469.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000 +613 193733 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45470.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +614 193747 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45471.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +615 193754 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45472.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +616 193761 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45473.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +617 193780 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45474.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +618 193787 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45475.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +619 193794 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45476.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +620 193806 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45477.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +621 193820 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45478.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +622 193839 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45479.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +623 193846 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45480.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +624 193872 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45481.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +625 193898 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45482.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +626 193905 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45483.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +627 193912 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45484.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +628 193919 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45485.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +629 193926 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45486.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +630 193945 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45487.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +631 193952 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45488.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +632 193966 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45489.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +633 193978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45490.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +634 193985 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45491.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +635 193999 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45492.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +636 194006 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45493.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +637 194030 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45494.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +638 194037 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45495.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +639 194044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45496.mem 179 19 1 sh3_zsrt139f450_pal.mem 0x00000000 +640 194063 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45497.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +641 194070 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45498.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +642 194077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45499.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +643 194091 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45500.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +644 194105 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45501.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +645 194119 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45502.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +646 194126 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45503.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +647 194133 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45504.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +648 194169 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45505.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +649 194176 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45506.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +650 194183 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45507.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +651 194202 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45508.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000 +652 194209 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45509.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +653 194216 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45510.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +654 194235 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45511.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +655 194242 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45512.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +656 194263 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45513.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000 +657 194277 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45514.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000 +658 194296 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45515.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +659 194324 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45516.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +660 194350 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45517.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +661 194381 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45518.mem 485 53 1 sh3_zsrt139f450_pal.mem 0x00000000 +662 194395 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45519.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +663 194402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45520.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +664 194409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45521.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +665 194416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45522.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +666 194423 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45523.mem 611 67 1 sh3_zsrt139f450_pal.mem 0x00000000 +667 194456 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45524.mem 692 76 1 sh3_zsrt139f450_pal.mem 0x00000000 +668 194494 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45525.mem 314 34 1 sh3_zsrt139f450_pal.mem 0x00000000 +669 194508 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45526.mem 476 52 1 sh3_zsrt139f450_pal.mem 0x00000000 +670 194527 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45527.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +671 194541 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45528.mem 242 26 1 sh3_zsrt139f450_pal.mem 0x00000000 +672 194553 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45529.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +673 194560 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45530.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000 +674 194567 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45531.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +675 194581 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45532.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +676 194609 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45533.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +677 194637 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45534.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +678 194678 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45535.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +679 194690 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45536.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +680 194697 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45537.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +681 194704 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45538.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +682 194711 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45539.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +683 194718 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45540.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +684 194725 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45541.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +685 194746 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45542.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +686 194753 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45543.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000 +687 194760 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45544.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +688 194767 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45545.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +689 194774 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45546.mem 494 54 1 sh3_zsrt139f450_pal.mem 0x00000000 +690 194805 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45547.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +691 194819 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45548.mem 575 63 1 sh3_zsrt139f450_pal.mem 0x00000000 +692 194845 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45549.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +693 194852 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45550.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +694 194859 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45551.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +695 194883 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45552.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +696 194897 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45553.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +697 194904 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45554.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +698 194911 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45555.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000 +699 194918 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45556.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000 +700 194925 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45557.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000 +701 194939 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45558.mem 665 73 1 sh3_zsrt139f450_pal.mem 0x00000000 +702 194965 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45559.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +703 194984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45560.mem 476 52 1 sh3_zsrt139f450_pal.mem 0x00000000 +704 194998 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45561.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +705 195005 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45562.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +706 195012 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45563.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +707 195031 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45564.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +708 195038 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45565.mem 377 41 1 sh3_zsrt139f450_pal.mem 0x00000000 +709 195069 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45566.mem 566 62 1 sh3_zsrt139f450_pal.mem 0x00000000 +710 195090 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45567.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +711 195104 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45568.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000 +712 195111 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45569.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +713 195118 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45570.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +714 195125 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45571.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000 +715 195139 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45572.mem 359 39 1 sh3_zsrt139f450_pal.mem 0x00000000 +716 195163 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45573.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +717 195170 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45574.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +718 195177 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45575.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +719 195194 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45576.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +720 195201 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45577.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +721 195215 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45578.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +722 195222 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45579.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +723 195229 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45580.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +724 195236 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45581.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +725 195243 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45582.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +726 195250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45583.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +727 195257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45584.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +728 195264 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45585.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +729 195271 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45586.mem 386 42 1 sh3_zsrt139f450_pal.mem 0x00000000 +730 195292 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45587.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +731 195306 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45588.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +732 195313 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45589.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000 +733 195320 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45590.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +734 195327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45591.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +735 195334 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45592.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000 +736 195374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45593.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000 +737 195381 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45594.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000 +738 195388 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45595.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +739 195402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45596.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +740 195409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45597.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +741 195416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45598.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000 +742 195440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45599.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000 +743 195461 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45600.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000 +744 195489 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45601.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +745 195496 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45602.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000 +746 195517 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45603.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000 +747 195531 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45604.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +748 195538 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45605.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +749 195545 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45606.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +750 195552 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45607.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000 +751 195559 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45608.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000 +752 195566 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45609.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +753 195594 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45610.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +754 195608 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45611.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +755 195622 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45612.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +756 195634 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45613.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000 +757 195655 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45614.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000 +758 195662 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45615.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000 +759 195669 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45616.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000 +760 195693 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45617.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000 +761 195714 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45618.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000 +762 195728 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45619.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +763 195735 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45620.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000 +764 195742 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45621.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000 +765 195756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45622.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000 +766 195763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45623.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000 +767 195777 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45624.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000 +768 195789 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45625.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000 +769 195803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45626.mem 440 48 1 sh3_zsrt139f450_pal.mem 0x00000000 +770 195824 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45627.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000 +771 195838 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45628.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000 +772 195867 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45629.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000 +773 195874 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45630.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000 +774 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000 +775 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000 +776 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000 +777 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000 +778 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000 +779 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000 +780 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000 +781 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000 +782 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000 +783 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000 +784 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000 +785 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000 +786 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000 +787 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000 +788 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000 +789 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000 +790 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000 +791 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000 +792 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000 +793 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000 +794 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +795 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +796 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +797 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +798 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +799 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +800 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +801 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +802 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +803 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +804 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +805 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +806 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +807 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +808 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +809 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +810 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +811 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +812 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +813 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +814 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +815 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +816 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +817 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +818 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +819 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +820 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +821 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +822 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +823 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +824 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +825 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +826 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +827 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +828 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +829 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +830 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +831 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +832 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +833 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +834 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +835 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +836 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +837 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +838 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +839 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +840 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +841 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +842 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +843 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +844 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +845 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +846 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +847 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +848 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +849 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +850 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +851 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +852 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +853 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +854 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +855 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +856 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +857 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +858 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +859 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +860 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +861 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +862 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +863 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +864 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +865 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +866 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +867 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +868 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +869 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +870 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +871 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +872 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +873 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +874 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +875 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +876 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +877 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +878 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +879 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +880 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +881 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +882 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +883 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +884 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +885 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +886 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +887 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +888 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +889 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +890 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +891 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +892 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +893 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +894 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +895 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +896 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +897 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +898 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +899 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +900 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +901 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +902 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +903 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +904 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +905 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +906 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +907 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +908 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +909 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +910 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +911 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +912 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +913 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +914 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +915 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +916 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +917 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +918 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +919 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +920 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +921 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +922 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f48_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f48_epochs.txt new file mode 100644 index 0000000..7251008 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f48_epochs.txt @@ -0,0 +1,314 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l70.mem 35 3 0 sh3_zsrt139l70_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l71.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l72.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l73.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l74.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l75.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l76.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l77.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l78.mem 89 9 1 sh3_zsrt139l70_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l79.mem 467 51 1 sh3_zsrt139l70_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l710.mem 359 39 1 sh3_zsrt139l70_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l711.mem 98 10 1 sh3_zsrt139l70_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l712.mem 71 7 1 sh3_zsrt139l70_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l713.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l714.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l715.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l716.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l717.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l718.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l719.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l720.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l721.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l722.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l723.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l724.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l725.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l726.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l727.mem 80 8 1 sh3_zsrt139l70_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l728.mem 287 31 1 sh3_zsrt139l70_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l729.mem 530 58 1 sh3_zsrt139l70_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l730.mem 107 11 1 sh3_zsrt139l70_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l731.mem 71 7 1 sh3_zsrt139l70_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l732.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l733.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l734.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l735.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l736.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l737.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l738.mem 26 2 1 sh3_zsrt139l70_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f49_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f49_epochs.txt new file mode 100644 index 0000000..a0f2750 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f49_epochs.txt @@ -0,0 +1,314 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7c', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c0.mem 35 3 0 sh3_zsrt139l7c0_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c1.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c2.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c3.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c4.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c5.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c6.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c7.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c8.mem 89 9 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c9.mem 467 51 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c10.mem 359 39 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c11.mem 98 10 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c12.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c13.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c14.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c15.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c16.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c17.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c18.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c19.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c20.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c21.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c22.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c23.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c24.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c25.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c26.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c27.mem 80 8 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c28.mem 287 31 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c29.mem 530 58 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c30.mem 107 11 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c31.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c32.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c33.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c34.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c35.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c36.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c37.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c38.mem 26 2 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f50_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f50_epochs.txt new file mode 100644 index 0000000..6dea55b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f50_epochs.txt @@ -0,0 +1,314 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7d', 'zsrt139f27'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d0.mem 35 3 0 sh3_zsrt139l7d0_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d1.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d2.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d3.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d4.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d5.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d6.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d7.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d8.mem 89 9 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d9.mem 467 51 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d10.mem 359 39 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d11.mem 98 10 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d12.mem 71 7 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d13.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d14.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d15.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d16.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d17.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d18.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d19.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d20.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d21.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d22.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d23.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d24.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d25.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d26.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d27.mem 80 8 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d28.mem 287 31 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d29.mem 530 58 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d30.mem 107 11 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d31.mem 71 7 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d32.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d33.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d34.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d35.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d36.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d37.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d38.mem 26 2 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f270.mem 467 51 0 sh3_zsrt139f270_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f271.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f272.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f273.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f274.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f275.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f276.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f277.mem 521 57 1 sh3_zsrt139f270_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f278.mem 485 53 1 sh3_zsrt139f270_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f279.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2710.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2711.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2712.mem 530 58 1 sh3_zsrt139f270_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2713.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2714.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2715.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2716.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2717.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2718.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2719.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2720.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2721.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2722.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2723.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2724.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2725.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2726.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2727.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2728.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2729.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2730.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2731.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2732.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2733.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2734.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2735.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2736.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2737.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2738.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2739.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2740.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2741.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2742.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2743.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2744.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2745.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51_epochs.txt new file mode 100644 index 0000000..24b5995 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51_epochs.txt @@ -0,0 +1,314 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f51b@0:123', 'zsrt139f41d@0:1', 'zsrt139f35c@0:9', 'zsrt139f41d@1:2', 'zsrt139f35c@9:13', 'zsrt139f31', 'zsrt139f51b@123:125', 'zsrt139l7c', 'zsrt139f27c'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b59.mem 782 86 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b60.mem 170 18 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b61.mem 251 27 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b62.mem 323 35 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b63.mem 89 9 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b64.mem 557 61 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b65.mem 368 40 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b66.mem 647 71 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b67.mem 530 58 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b68.mem 440 48 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b69.mem 62 6 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b70.mem 1493 165 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b71.mem 1223 135 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b72.mem 1628 180 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b73.mem 224 24 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b74.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b75.mem 566 62 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b76.mem 521 57 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b77.mem 755 83 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b78.mem 1439 159 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b79.mem 953 105 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b80.mem 620 68 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b81.mem 53 5 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b82.mem 26 2 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b83.mem 179 19 0 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b84.mem 116 12 1 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b85.mem 1007 111 0 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b86.mem 287 31 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b87.mem 332 36 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b88.mem 683 75 0 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b89.mem 665 73 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b90.mem 1025 113 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b91.mem 935 103 0 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b92.mem 827 91 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b93.mem 701 77 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b94.mem 710 78 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b95.mem 404 44 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b96.mem 206 22 0 sh3_zsrt139f51b96_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b97.mem 242 26 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b98.mem 296 32 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b99.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b100.mem 44 4 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b101.mem 278 30 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b102.mem 197 21 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b103.mem 188 20 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b104.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b105.mem 107 11 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b106.mem 80 8 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b107.mem 1241 137 0 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b108.mem 1025 113 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b109.mem 737 81 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b110.mem 845 93 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b111.mem 530 58 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b112.mem 98 10 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b113.mem 287 31 0 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b114.mem 260 28 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b115.mem 368 40 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b116.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b117.mem 341 37 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b118.mem 305 33 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b119.mem 206 22 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b120.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b121.mem 602 66 0 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b122.mem 359 39 1 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d0.mem 17 1 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c0.mem 908 100 0 sh3_zsrt139f35c0_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c1.mem 665 73 1 sh3_zsrt139f35c0_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c2.mem 728 80 0 sh3_zsrt139f35c2_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c3.mem 278 30 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c4.mem 521 57 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c5.mem 125 13 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f35c6_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c6.mem 656 72 0 sh3_zsrt139f35c6_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f35c7_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c7.mem 323 35 0 sh3_zsrt139f35c7_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f35c8_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c8.mem 116 12 0 sh3_zsrt139f35c8_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d1.mem 116 12 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c9.mem 1205 133 0 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c10.mem 962 106 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c11.mem 539 59 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c12.mem 278 30 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b123.mem 341 37 0 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b124.mem 170 18 1 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c0.mem 35 3 0 sh3_zsrt139l7c0_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c1.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c2.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c3.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c4.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c5.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c6.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c7.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c8.mem 89 9 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c9.mem 467 51 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c10.mem 359 39 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c11.mem 98 10 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c12.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c13.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c14.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c15.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c16.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c17.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c18.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c19.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c20.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c21.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c22.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c23.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c24.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c25.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c26.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c27.mem 80 8 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c28.mem 287 31 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c29.mem 530 58 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c30.mem 107 11 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c31.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c32.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c33.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c34.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c35.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c36.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c37.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c38.mem 26 2 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c0.mem 467 51 0 sh3_zsrt139f27c0_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c1.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c2.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c3.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c4.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c5.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c6.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c7.mem 521 57 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c8.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c9.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c10.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c11.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c12.mem 530 58 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c13.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c14.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c15.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c16.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c17.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c18.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c19.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c20.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c21.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c22.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c23.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c24.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c25.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c26.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c27.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c28.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c29.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c30.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c31.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c32.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c33.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c34.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c35.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c36.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c37.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c38.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c39.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c40.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c41.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c42.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c43.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c44.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c45.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c46.mem 431 47 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c47.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c48.mem 710 78 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c49.mem 575 63 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c50.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c51.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c52.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c53.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c54.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c55.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c56.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c57.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c58.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c59.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c60.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c61.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c62.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c63.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c64.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c65.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c66.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c67.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c68.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c69.mem 692 76 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c70.mem 665 73 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c71.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c72.mem 620 68 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c73.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c74.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c75.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c76.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c77.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c78.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c79.mem 584 64 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c80.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c81.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c82.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c83.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c84.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c85.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c86.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c87.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c88.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c89.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c90.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c91.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c92.mem 287 31 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c93.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c94.mem 233 25 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c95.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c96.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c97.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c98.mem 647 71 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c99.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c100.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c101.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c102.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c103.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c104.mem 611 67 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c105.mem 359 39 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c106.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c107.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c108.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c109.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c110.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c111.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c112.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c113.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c114.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c115.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c116.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c117.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c118.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c119.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c120.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c121.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c122.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51b_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51b_epochs.txt new file mode 100644 index 0000000..8d32655 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f51b_epochs.txt @@ -0,0 +1,131 @@ +# Ch435 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b59.mem 782 86 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b60.mem 170 18 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b61.mem 251 27 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b62.mem 323 35 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b63.mem 89 9 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b64.mem 557 61 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b65.mem 368 40 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b66.mem 647 71 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b67.mem 530 58 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b68.mem 440 48 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b69.mem 62 6 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b70.mem 1493 165 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b71.mem 1223 135 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b72.mem 1628 180 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b73.mem 224 24 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b74.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b75.mem 566 62 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b76.mem 521 57 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b77.mem 755 83 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b78.mem 1439 159 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b79.mem 953 105 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b80.mem 620 68 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b81.mem 53 5 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b82.mem 26 2 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b83.mem 179 19 0 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b84.mem 116 12 1 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b85.mem 1007 111 0 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b86.mem 287 31 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b87.mem 332 36 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b88.mem 683 75 0 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b89.mem 665 73 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b90.mem 1025 113 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b91.mem 935 103 0 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b92.mem 827 91 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b93.mem 701 77 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b94.mem 710 78 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b95.mem 404 44 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b96.mem 206 22 0 sh3_zsrt139f51b96_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b97.mem 242 26 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b98.mem 296 32 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b99.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b100.mem 44 4 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b101.mem 278 30 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b102.mem 197 21 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b103.mem 188 20 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b104.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b105.mem 107 11 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b106.mem 80 8 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b107.mem 1241 137 0 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b108.mem 1025 113 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b109.mem 737 81 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b110.mem 845 93 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b111.mem 530 58 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b112.mem 98 10 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b113.mem 287 31 0 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b114.mem 260 28 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b115.mem 368 40 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b116.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b117.mem 341 37 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b118.mem 305 33 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b119.mem 206 22 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b120.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b121.mem 602 66 0 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b122.mem 359 39 1 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b123.mem 341 37 0 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b124.mem 170 18 1 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439_board_run.log new file mode 100644 index 0000000..a22d08e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439_board_run.log @@ -0,0 +1,1883 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f52_epochs.txt: 311 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx165358 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 1 tris/17 words +[sched] epoch 124: idx165536 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 100 tris/908 words +[sched] epoch 125: idx166269 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 73 tris/665 words +[sched] epoch 126: idx166950 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 80 tris/728 words +[sched] epoch 127: idx167670 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 128: idx168416 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 57 tris/521 words +[sched] epoch 129: idx168815 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 13 tris/125 words +[sched] epoch 130: idx169227 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 72 tris/656 words +[sched] epoch 131: idx169830 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 35 tris/323 words +[sched] epoch 132: idx170177 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 12 tris/116 words +[sched] epoch 133: idx170407 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 12 tris/116 words +[sched] epoch 134: idx170637 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 133 tris/1205 words +[sched] epoch 135: idx171088 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 106 tris/962 words +[sched] epoch 136: idx171678 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 59 tris/539 words +[sched] epoch 137: idx172233 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 138: idx172601 tbp8192 cbp480 tex crc=0x68e8cb9d (exp 0x68e8cb9d) 226 tris/2042 words +[sched] epoch 139: idx172601 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 43 tris/395 words +[sched] epoch 140: idx175765 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 14 tris/134 words +[sched] epoch 141: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 142: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] epoch 143: idx196167 tbp11264 cbp480 tex crc=0xfcffae83 (exp 0xfcffae83) 3 tris/35 words +[sched] epoch 144: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 145: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 146: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 147: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 148: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 149: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 150: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 151: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 9 tris/89 words +[sched] epoch 152: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 52 tris/476 words +[sched] epoch 153: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 39 tris/359 words +[sched] epoch 154: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 10 tris/98 words +[sched] epoch 155: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 156: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 157: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 158: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 159: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 160: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 161: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 162: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 163: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 164: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 165: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 166: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 167: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 168: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 169: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 170: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 8 tris/80 words +[sched] epoch 171: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 30 tris/278 words +[sched] epoch 172: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 59 tris/539 words +[sched] epoch 173: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 11 tris/107 words +[sched] epoch 174: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 175: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 176: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 177: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 178: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 179: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 180: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 181: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 2 tris/26 words +[sched] epoch 182: idx196494 tbp10240 cbp480 tex crc=0x13cfe390 (exp 0x13cfe390) 51 tris/467 words +[sched] epoch 183: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 184: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 185: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 186: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 187: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 188: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 189: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 57 tris/521 words +[sched] epoch 190: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 191: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 192: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 193: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 194: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 58 tris/530 words +[sched] epoch 195: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 196: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 197: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 198: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 199: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 200: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 201: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 202: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 203: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 204: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 205: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 206: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 207: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 208: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 209: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 210: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 211: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 212: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 213: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 214: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 215: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 216: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 217: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 218: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 219: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 220: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 221: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 222: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 223: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 224: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 225: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 226: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 227: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 228: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 47 tris/431 words +[sched] epoch 229: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 230: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 78 tris/710 words +[sched] epoch 231: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 63 tris/575 words +[sched] epoch 232: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 233: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 234: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 235: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 236: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 237: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 238: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 239: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 240: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 241: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 242: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 243: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 244: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 245: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 246: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 247: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 248: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 249: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 250: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 251: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 76 tris/692 words +[sched] epoch 252: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 73 tris/665 words +[sched] epoch 253: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 254: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 68 tris/620 words +[sched] epoch 255: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 256: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 257: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 258: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 259: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 260: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 261: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 64 tris/584 words +[sched] epoch 262: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 263: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 264: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 265: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 266: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 267: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 268: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 269: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 270: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 271: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 272: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 273: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 274: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 31 tris/287 words +[sched] epoch 275: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 276: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 25 tris/233 words +[sched] epoch 277: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 278: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 279: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 280: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 71 tris/647 words +[sched] epoch 281: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 282: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 283: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 284: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 285: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 286: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 67 tris/611 words +[sched] epoch 287: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 39 tris/359 words +[sched] epoch 288: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 289: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 290: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 291: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 292: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 293: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 294: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 295: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 296: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 297: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 298: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 299: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 300: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 301: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 302: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 303: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 304: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 305: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 306: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 17 tris/161 words +[sched] epoch 307: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 308: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 309: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 310: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 14 tris/134 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=19 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2187 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=4861 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=5352 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=8330 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=8661 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=10114 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=10149 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=10429 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=10674 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 10674->10677) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=10677 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=10803 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=11066 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=11470 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=11727 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=12163 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=13025 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=13374 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=13467 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=13552 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=13877 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=14281 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=14425 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=14918 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=15721 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=16113 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=16496 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=16917 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=17010 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=17492 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=17627 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=17821 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=17999 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=18291 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=18376 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=18412 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 18412->18421) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=18421 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=20965 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=21734 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=24700 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=25023 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=25132 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=25350 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=25819 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25954 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=27221 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=27483 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=28543 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=29278 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=30110 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=30129 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=30504 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=30843 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=31211 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=32243 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=34923 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=35481 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=36822 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=38073 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=39745 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=39773 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=39850 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=39985 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=40023 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=40213 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=40429 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=40785 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=41099 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=41341 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41375 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=42140 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=42917 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=45572 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=46205 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=48096 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=50091 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=52341 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=53868 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=54896 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=57336 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=59870 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=60076 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 60076->60078) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=60078 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=60107 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=60113 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=60373 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=60478 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=60562 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=60852 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=61249 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=61800 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=62159 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=62527 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=62768 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=63013 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=63159 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=63197 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=63257 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=63305 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63326 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 63326->63330) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=63330 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=63381 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=63462 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=63485 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63561 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=63577 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 63577->63589) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=63589 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=64019 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=64441 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=64789 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=65106 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=65309 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=65343 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=65401 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=65452 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=65505 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65566 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=65611 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=65650 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65686 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65715 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=65855 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=65925 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 123: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 123: drain low pulse completed between host polls; counters advanced (records 39->1, FB beats 65925->65926) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=65926 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 124 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 124: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=66329 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 125: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=66798 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 126 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 126: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=67214 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 127: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=67347 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 128: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=67718 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 129: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=67813 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 130 pal: runtime copy sum32=0x829b8725 (exp 0x829b8725) +[sched] epoch 130: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=67987 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 131 pal: runtime copy sum32=0x84317595 (exp 0x84317595) +[sched] epoch 131: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=68049 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 132 pal: runtime copy sum32=0x8504a80c (exp 0x8504a80c) +[sched] epoch 132: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 132: drain low pulse completed between host polls; counters advanced (records 35->12, FB beats 68049->68092) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68092 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 133 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 133: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 133: drain low pulse completed between host polls; counters advanced (records 12->12, FB beats 68092->68149) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68149 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 134 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 134: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=68582 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 135: streamed 962 words, staged_addr=962 (exp 962, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=106 (exp 106), FB beats=68899 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 136: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=69041 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 137: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=69121 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138 tex: upload wr_errs=0 ; fill crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 138 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 138: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=70011 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 139: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=70174 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 140: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=70209 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 141 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 141: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=70286 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 142: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=70322 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143 tex: upload wr_errs=0 ; fill crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 143 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 143: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=76263 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 144 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 144: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=81996 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 145: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=87319 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 146: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=94009 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 147: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=100154 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 148: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=107116 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 149: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=113128 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 150: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=119271 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 151: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=126231 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 152: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=133144 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 153: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=139698 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 154 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 154: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=146418 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 155: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=153074 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 156: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=159986 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 157: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=166578 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 158: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=172466 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 159: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=178866 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 160: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=185778 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 161: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=191354 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 162: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=197186 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 163: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=202844 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 164: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=208312 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 165: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=215062 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 166 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 166: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=221268 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 167 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 167: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=228217 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 168: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=234428 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 169: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=240694 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 170: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=247177 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 171: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=254122 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 172: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=260710 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 173: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=267554 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 174: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=273834 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 175: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=280482 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 176: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=286947 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 177: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=292651 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 178: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=298858 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 179: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=305577 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 180: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=310906 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 181: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=314642 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182 tex: upload wr_errs=0 ; fill crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 182 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 182: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=328712 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 183: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=343095 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 184: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=357340 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 185: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=371738 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 186: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=385900 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 187: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=400046 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 188: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=414492 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 189: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=428849 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 190: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=442959 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 191: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=456767 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 192: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=471089 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 193: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=485473 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 194: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=499719 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 195: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=514132 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 196: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=528299 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 197: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=542458 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 198: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=556803 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 199: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=570804 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 200: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=584994 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 201: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=599411 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 202: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=613839 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 203: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=628257 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 204: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=638515 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 205: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=652835 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 206: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=666795 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 207: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=680466 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 208: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=694890 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 209: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=708620 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 210: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=722975 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 211: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=736810 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=750873 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 213: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=764841 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 214: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=778919 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 215: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=793338 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 216: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=807389 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 217: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=821364 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 218: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=835781 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 219: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=850185 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 220: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=864490 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 221 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 221: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=878438 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 222 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 222: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=892491 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 223: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=906382 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 224: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=920579 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 225 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 225: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=934846 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 226: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=949172 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 227: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=963487 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 228: streamed 431 words, staged_addr=431 (exp 431, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=47 (exp 47), FB beats=977920 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 229 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 229: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=992176 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 230: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=1006436 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 231: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=1020432 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 232: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=1034685 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 233: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1048859 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 234 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 234: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1063097 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 235: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1077454 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 236: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1091850 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 237: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1106240 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 238: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1113424 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 239: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1127856 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 240: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1142242 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 241: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1156132 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 242: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=1170506 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 243: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1184470 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 244: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1198871 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 245 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 245: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1212696 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 246: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1226961 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 247: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=1240859 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 248: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=1255271 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 249: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1269561 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 250: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1283900 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 251 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 251: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=1297777 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 252: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=1311955 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 253: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1326338 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 254: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=1340361 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 255: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1354345 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 256: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1368505 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 257: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1382675 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 258: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=1396685 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 259 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 259: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1410459 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 260: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1424662 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 261 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 261: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=1438614 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 262: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1452702 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 263 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 263: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1466810 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 264: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1481246 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 265: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1495476 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 266: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1509721 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 267: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1523638 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 268: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1537714 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 269: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1551952 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 270: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1565970 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 271: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1579528 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 272: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1593687 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 273: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1607976 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 274: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=1622287 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 275: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1636588 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 276: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=1650444 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 277: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1664165 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 278: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=1677420 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 279: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=1691529 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 280: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=1705400 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 281: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1719687 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 282: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1734104 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] epoch 283: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 283 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 283: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 283: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1748022 +[sched] epoch 283: zero fragment drops (snap=0, sticky=0) +[sched] epoch 284: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 284 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 284: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 284: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1762345 +[sched] epoch 284: zero fragment drops (snap=0, sticky=0) +[sched] epoch 285: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 285 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 285: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 285: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1776755 +[sched] epoch 285: zero fragment drops (snap=0, sticky=0) +[sched] epoch 286: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 286 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 286: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 286: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=1790612 +[sched] epoch 286: zero fragment drops (snap=0, sticky=0) +[sched] epoch 287: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 287 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 287: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 287: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=1804747 +[sched] epoch 287: zero fragment drops (snap=0, sticky=0) +[sched] epoch 288: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 288 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 288: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 288: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1818573 +[sched] epoch 288: zero fragment drops (snap=0, sticky=0) +[sched] epoch 289: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 289 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 289: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 289: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1832378 +[sched] epoch 289: zero fragment drops (snap=0, sticky=0) +[sched] epoch 290: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 290 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 290: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 290: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1845329 +[sched] epoch 290: zero fragment drops (snap=0, sticky=0) +[sched] epoch 291: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 291 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 291: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 291: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1859458 +[sched] epoch 291: zero fragment drops (snap=0, sticky=0) +[sched] epoch 292: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 292 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 292: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 292: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1873823 +[sched] epoch 292: zero fragment drops (snap=0, sticky=0) +[sched] epoch 293: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 293 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 293: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 293: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=1888268 +[sched] epoch 293: zero fragment drops (snap=0, sticky=0) +[sched] epoch 294: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 294 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 294: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 294: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1902130 +[sched] epoch 294: zero fragment drops (snap=0, sticky=0) +[sched] epoch 295: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 295 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 295: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 295: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1916019 +[sched] epoch 295: zero fragment drops (snap=0, sticky=0) +[sched] epoch 296: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 296 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 296: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 296: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1930264 +[sched] epoch 296: zero fragment drops (snap=0, sticky=0) +[sched] epoch 297: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 297 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 297: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 297: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1944445 +[sched] epoch 297: zero fragment drops (snap=0, sticky=0) +[sched] epoch 298: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 298 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 298: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 298: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1958682 +[sched] epoch 298: zero fragment drops (snap=0, sticky=0) +[sched] epoch 299: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 299 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 299: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 299: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1973100 +[sched] epoch 299: zero fragment drops (snap=0, sticky=0) +[sched] epoch 300: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 300 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 300: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 300: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1987333 +[sched] epoch 300: zero fragment drops (snap=0, sticky=0) +[sched] epoch 301: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 301 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 301: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 301: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2001392 +[sched] epoch 301: zero fragment drops (snap=0, sticky=0) +[sched] epoch 302: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 302 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 302: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 302: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=2015786 +[sched] epoch 302: zero fragment drops (snap=0, sticky=0) +[sched] epoch 303: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 303 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 303: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 303: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2030106 +[sched] epoch 303: zero fragment drops (snap=0, sticky=0) +[sched] epoch 304: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 304 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 304: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 304: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2043389 +[sched] epoch 304: zero fragment drops (snap=0, sticky=0) +[sched] epoch 305: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 305 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 305: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 305: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2057758 +[sched] epoch 305: zero fragment drops (snap=0, sticky=0) +[sched] epoch 306: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 306 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 306: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 306: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=2071580 +[sched] epoch 306: zero fragment drops (snap=0, sticky=0) +[sched] epoch 307: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 307 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 307: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 307: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2085455 +[sched] epoch 307: zero fragment drops (snap=0, sticky=0) +[sched] epoch 308: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 308 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 308: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 308: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2099614 +[sched] epoch 308: zero fragment drops (snap=0, sticky=0) +[sched] epoch 309: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 309 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 309: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 309: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2113581 +[sched] epoch 309: zero fragment drops (snap=0, sticky=0) +[sched] epoch 310: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 310 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 310: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 310: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=2117985 +[sched] epoch 310: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f52_ch439_board_fb.mem sum32=0xaad0b94d xor32=0x33138181 nonzero=245155 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (311-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439b_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439b_board_run.log new file mode 100644 index 0000000..a9cf360 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_ch439b_board_run.log @@ -0,0 +1,1882 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f52_epochs.txt: 311 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx165358 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 1 tris/17 words +[sched] epoch 124: idx165536 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 100 tris/908 words +[sched] epoch 125: idx166269 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 73 tris/665 words +[sched] epoch 126: idx166950 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 80 tris/728 words +[sched] epoch 127: idx167670 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 128: idx168416 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 57 tris/521 words +[sched] epoch 129: idx168815 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 13 tris/125 words +[sched] epoch 130: idx169227 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 72 tris/656 words +[sched] epoch 131: idx169830 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 35 tris/323 words +[sched] epoch 132: idx170177 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 12 tris/116 words +[sched] epoch 133: idx170407 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 12 tris/116 words +[sched] epoch 134: idx170637 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 133 tris/1205 words +[sched] epoch 135: idx171088 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 106 tris/962 words +[sched] epoch 136: idx171678 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 59 tris/539 words +[sched] epoch 137: idx172233 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 138: idx172601 tbp8192 cbp480 tex crc=0x68e8cb9d (exp 0x68e8cb9d) 226 tris/2042 words +[sched] epoch 139: idx172601 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 43 tris/395 words +[sched] epoch 140: idx175765 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 14 tris/134 words +[sched] epoch 141: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 142: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] epoch 143: idx196167 tbp11264 cbp480 tex crc=0xfcffae83 (exp 0xfcffae83) 3 tris/35 words +[sched] epoch 144: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 145: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 146: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 147: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 148: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 149: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 150: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 151: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 9 tris/89 words +[sched] epoch 152: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 52 tris/476 words +[sched] epoch 153: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 39 tris/359 words +[sched] epoch 154: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 10 tris/98 words +[sched] epoch 155: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 156: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 157: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 158: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 159: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 160: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 161: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 162: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 163: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 164: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 165: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 166: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 167: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 168: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 169: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 170: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 8 tris/80 words +[sched] epoch 171: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 30 tris/278 words +[sched] epoch 172: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 59 tris/539 words +[sched] epoch 173: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 11 tris/107 words +[sched] epoch 174: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 175: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 176: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 177: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 178: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 179: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 180: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 181: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 2 tris/26 words +[sched] epoch 182: idx196494 tbp10240 cbp480 tex crc=0x13cfe390 (exp 0x13cfe390) 51 tris/467 words +[sched] epoch 183: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 184: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 185: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 186: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 187: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 188: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 189: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 57 tris/521 words +[sched] epoch 190: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 191: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 192: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 193: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 194: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 58 tris/530 words +[sched] epoch 195: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 196: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 197: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 198: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 199: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 200: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 201: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 202: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 203: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 204: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 205: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 206: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 207: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 208: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 209: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 210: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 211: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 212: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 213: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 214: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 215: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 216: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 217: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 218: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 219: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 220: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 221: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 222: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 223: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 224: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 225: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 226: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 227: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 228: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 47 tris/431 words +[sched] epoch 229: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 230: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 78 tris/710 words +[sched] epoch 231: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 63 tris/575 words +[sched] epoch 232: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 233: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 234: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 235: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 236: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 237: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 238: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 239: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 240: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 241: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 242: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 243: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 244: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 245: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 246: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 247: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 248: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 249: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 250: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 251: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 76 tris/692 words +[sched] epoch 252: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 73 tris/665 words +[sched] epoch 253: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 254: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 68 tris/620 words +[sched] epoch 255: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 256: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 257: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 258: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 259: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 260: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 261: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 64 tris/584 words +[sched] epoch 262: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 263: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 264: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 265: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 266: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 267: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 268: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 269: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 270: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 271: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 272: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 273: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 274: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 31 tris/287 words +[sched] epoch 275: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 276: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 25 tris/233 words +[sched] epoch 277: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 278: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 279: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 280: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 71 tris/647 words +[sched] epoch 281: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 282: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 283: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 284: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 285: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 286: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 67 tris/611 words +[sched] epoch 287: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 39 tris/359 words +[sched] epoch 288: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 289: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 290: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 291: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 292: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 293: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 294: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 295: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 296: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 297: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 298: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 299: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 300: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 301: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 302: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 303: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 304: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 305: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 306: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 17 tris/161 words +[sched] epoch 307: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 308: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 309: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 310: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 14 tris/134 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=19 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2187 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=4861 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=5352 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=8330 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=8661 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=10114 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=10149 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=10429 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=10674 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 10674->10677) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=10677 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=10803 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=11066 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=11470 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=11727 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=12163 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=13025 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=13374 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=13467 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=13552 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=13877 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=14281 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=14425 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=14918 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=15721 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=16113 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=16496 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=16917 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=17010 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=17492 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=17627 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=17821 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=17999 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=18291 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=18376 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=18412 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 18412->18421) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=18421 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=20965 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=21734 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=24700 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=25023 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=25132 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=25350 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=25819 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=25954 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=27221 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=27483 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=28543 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=29278 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=30110 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=30129 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=30504 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=30843 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=31211 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=32243 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=34923 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=35481 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=36822 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=38073 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=39745 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=39773 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=39850 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=39985 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=40023 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=40213 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=40429 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=40785 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=41099 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=41341 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41375 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=42140 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=42917 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=45572 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=46205 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=48096 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=50091 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=52341 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=53868 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=54896 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=57336 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=59870 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=60076 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 60076->60078) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=60078 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=60107 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=60113 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=60373 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=60478 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=60562 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=60852 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=61249 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=61800 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=62159 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=62527 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=62768 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=63013 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=63159 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=63197 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=63257 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=63305 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63326 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 63326->63330) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=63330 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=63381 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=63462 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=63485 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=63561 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=63577 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 63577->63589) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=63589 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=64019 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=64441 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=64789 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=65106 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=65309 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=65343 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=65401 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=65452 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=65505 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65566 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=65611 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=65650 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65686 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=65715 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=65855 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=65925 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 123: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 123: drain low pulse completed between host polls; counters advanced (records 39->1, FB beats 65925->65926) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=65926 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 124 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 124: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=66329 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 125: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=66798 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 126 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 126: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=67214 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 127: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=67347 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 128: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=67718 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 129: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=67813 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 130 pal: runtime copy sum32=0x829b8725 (exp 0x829b8725) +[sched] epoch 130: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=67987 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 131 pal: runtime copy sum32=0x84317595 (exp 0x84317595) +[sched] epoch 131: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=68049 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 132 pal: runtime copy sum32=0x8504a80c (exp 0x8504a80c) +[sched] epoch 132: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68092 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 133 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 133: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 133: drain low pulse completed between host polls; counters advanced (records 12->12, FB beats 68092->68149) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=68149 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 134 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 134: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=68582 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 135: streamed 962 words, staged_addr=962 (exp 962, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=106 (exp 106), FB beats=68899 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 136: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=69041 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 137: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=69121 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138 tex: upload wr_errs=0 ; fill crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 138 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 138: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=70011 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 139: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=70174 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 140: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=70209 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 141 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 141: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=70286 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 142: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=70322 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143 tex: upload wr_errs=0 ; fill crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 143 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 143: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=76263 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 144 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 144: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=81996 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 145: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=87319 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 146: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=94009 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 147: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=100154 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 148: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=107116 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 149: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=113128 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 150: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=119271 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 151: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=126231 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 152: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=133144 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 153: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=139698 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 154 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 154: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=146418 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 155: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=153074 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 156: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=159986 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 157: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=166578 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 158: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=172466 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 159: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=178866 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 160: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=185778 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 161: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=191354 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 162: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=197186 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 163: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=202844 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 164: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=208312 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 165: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=215062 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 166 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 166: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=221268 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 167 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 167: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=228217 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 168: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=234428 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 169: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=240694 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 170: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=247177 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 171: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=254122 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 172: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=260710 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 173: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=267554 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 174: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=273834 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 175: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=280482 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 176: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=286947 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 177: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=292651 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 178: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=298858 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 179: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=305577 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 180: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=310906 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 181: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=314642 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182 tex: upload wr_errs=0 ; fill crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 182 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 182: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=328712 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 183: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=343095 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 184: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=357340 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 185: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=371738 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 186: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=385900 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 187: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=400046 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 188: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=414492 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 189: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=428849 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 190: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=442959 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 191: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=456767 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 192: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=471089 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 193: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=485473 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 194: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=499719 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 195: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=514132 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 196: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=528299 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 197: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=542458 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 198: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=556803 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 199: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=570804 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 200: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=584994 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 201: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=599411 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 202: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=613839 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 203: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=628257 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 204: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=638515 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 205: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=652835 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 206: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=666795 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 207: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=680466 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 208: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=694890 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 209: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=708620 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 210: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=722975 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 211: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=736810 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=750873 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 213: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=764841 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 214: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=778919 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 215: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=793338 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 216: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=807389 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 217: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=821364 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 218: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=835781 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 219: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=850185 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 220: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=864490 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 221 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 221: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=878438 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 222 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 222: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=892491 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 223: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=906382 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 224: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=920579 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 225 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 225: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=934846 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 226: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=949172 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 227: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=963487 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 228: streamed 431 words, staged_addr=431 (exp 431, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=47 (exp 47), FB beats=977920 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 229 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 229: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=992176 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 230: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=1006436 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 231: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=1020432 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 232: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=1034685 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 233: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1048859 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 234 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 234: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1063097 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 235: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1077454 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 236: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1091850 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 237: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1106240 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 238: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1113424 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 239: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1127856 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 240: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1142242 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 241: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1156132 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 242: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=1170506 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 243: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1184470 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 244: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1198871 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 245 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 245: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=1212696 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 246: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1226961 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 247: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=1240859 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 248: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=1255271 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 249: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1269561 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 250: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=1283900 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 251 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 251: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=1297777 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 252: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=1311955 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 253: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=1326338 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 254: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=1340361 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 255: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1354345 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 256: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1368505 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 257: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=1382675 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 258: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=1396685 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 259 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 259: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1410459 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 260: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1424662 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 261 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 261: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=1438614 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 262: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1452702 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 263 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 263: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1466810 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 264: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=1481246 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 265: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1495476 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 266: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1509721 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 267: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1523638 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 268: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1537714 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 269: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1551952 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 270: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1565970 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 271: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1579528 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 272: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1593687 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 273: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1607976 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 274: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=1622287 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 275: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=1636588 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 276: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=1650444 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 277: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=1664165 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 278: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=1677420 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 279: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=1691529 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 280: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=1705400 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 281: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=1719687 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 282: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=1734104 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] epoch 283: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 283 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 283: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 283: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1748022 +[sched] epoch 283: zero fragment drops (snap=0, sticky=0) +[sched] epoch 284: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 284 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 284: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 284: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1762345 +[sched] epoch 284: zero fragment drops (snap=0, sticky=0) +[sched] epoch 285: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 285 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 285: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 285: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1776755 +[sched] epoch 285: zero fragment drops (snap=0, sticky=0) +[sched] epoch 286: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 286 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 286: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 286: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=1790612 +[sched] epoch 286: zero fragment drops (snap=0, sticky=0) +[sched] epoch 287: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 287 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 287: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 287: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=1804747 +[sched] epoch 287: zero fragment drops (snap=0, sticky=0) +[sched] epoch 288: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 288 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 288: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 288: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=1818573 +[sched] epoch 288: zero fragment drops (snap=0, sticky=0) +[sched] epoch 289: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 289 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 289: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 289: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=1832378 +[sched] epoch 289: zero fragment drops (snap=0, sticky=0) +[sched] epoch 290: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 290 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 290: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 290: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1845329 +[sched] epoch 290: zero fragment drops (snap=0, sticky=0) +[sched] epoch 291: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 291 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 291: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 291: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1859458 +[sched] epoch 291: zero fragment drops (snap=0, sticky=0) +[sched] epoch 292: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 292 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 292: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 292: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=1873823 +[sched] epoch 292: zero fragment drops (snap=0, sticky=0) +[sched] epoch 293: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 293 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 293: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 293: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=1888268 +[sched] epoch 293: zero fragment drops (snap=0, sticky=0) +[sched] epoch 294: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 294 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 294: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 294: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=1902130 +[sched] epoch 294: zero fragment drops (snap=0, sticky=0) +[sched] epoch 295: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 295 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 295: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 295: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=1916019 +[sched] epoch 295: zero fragment drops (snap=0, sticky=0) +[sched] epoch 296: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 296 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 296: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 296: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=1930264 +[sched] epoch 296: zero fragment drops (snap=0, sticky=0) +[sched] epoch 297: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 297 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 297: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 297: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=1944445 +[sched] epoch 297: zero fragment drops (snap=0, sticky=0) +[sched] epoch 298: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 298 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 298: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 298: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=1958682 +[sched] epoch 298: zero fragment drops (snap=0, sticky=0) +[sched] epoch 299: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 299 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 299: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 299: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=1973100 +[sched] epoch 299: zero fragment drops (snap=0, sticky=0) +[sched] epoch 300: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 300 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 300: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 300: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=1987333 +[sched] epoch 300: zero fragment drops (snap=0, sticky=0) +[sched] epoch 301: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 301 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 301: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 301: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2001392 +[sched] epoch 301: zero fragment drops (snap=0, sticky=0) +[sched] epoch 302: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 302 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 302: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 302: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=2015786 +[sched] epoch 302: zero fragment drops (snap=0, sticky=0) +[sched] epoch 303: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 303 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 303: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 303: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2030106 +[sched] epoch 303: zero fragment drops (snap=0, sticky=0) +[sched] epoch 304: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 304 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 304: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 304: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2043389 +[sched] epoch 304: zero fragment drops (snap=0, sticky=0) +[sched] epoch 305: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 305 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 305: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 305: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2057758 +[sched] epoch 305: zero fragment drops (snap=0, sticky=0) +[sched] epoch 306: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 306 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 306: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 306: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=2071580 +[sched] epoch 306: zero fragment drops (snap=0, sticky=0) +[sched] epoch 307: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 307 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 307: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 307: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2085455 +[sched] epoch 307: zero fragment drops (snap=0, sticky=0) +[sched] epoch 308: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 308 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 308: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 308: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2099614 +[sched] epoch 308: zero fragment drops (snap=0, sticky=0) +[sched] epoch 309: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 309 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 309: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 309: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2113581 +[sched] epoch 309: zero fragment drops (snap=0, sticky=0) +[sched] epoch 310: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 310 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 310: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 310: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=2117985 +[sched] epoch 310: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f52_ch439b_board_fb.mem sum32=0xaad0b94d xor32=0x33138181 nonzero=245155 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (311-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_current_20260720_1547_board_run.log b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_current_20260720_1547_board_run.log new file mode 100644 index 0000000..18c831a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_current_20260720_1547_board_run.log @@ -0,0 +1,1883 @@ +[sched] feeder ready=1 +[sched] scene sh3_zsrt139f52_epochs.txt: 311 epochs, FB 307200 words, tex 65536 words/8192 beats +[sched] epoch 0: idx1772 tbp12288 cbp480 tex crc=0x42d367ae (exp 0x42d367ae) 4 tris/44 words +[sched] epoch 1: idx6822 tbp11264 cbp480 tex crc=0x55070afa (exp 0x55070afa) 175 tris/1583 words +[sched] epoch 2: idx8151 tbp11264 cbp480 REUSE resident tex (crc 0x55070afa) 203 tris/1835 words +[sched] epoch 3: idx12757 tbp10240 cbp480 tex crc=0x26a88b77 (exp 0x26a88b77) 38 tris/350 words +[sched] epoch 4: idx15277 tbp12288 cbp480 tex crc=0x835dceb6 (exp 0x835dceb6) 146 tris/1322 words +[sched] epoch 5: idx15277 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 12 tris/116 words +[sched] epoch 6: idx15931 tbp12288 cbp480 REUSE resident tex (crc 0x835dceb6) 69 tris/629 words +[sched] epoch 7: idx20246 tbp11264 cbp480 tex crc=0x95a83cbc (exp 0x95a83cbc) 28 tris/260 words +[sched] epoch 8: idx20792 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 65 tris/593 words +[sched] epoch 9: idx21386 tbp11264 cbp480 REUSE resident tex (crc 0x95a83cbc) 36 tris/332 words +[sched] epoch 10: idx30461 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 3 tris/35 words +[sched] epoch 11: idx31915 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 38 tris/350 words +[sched] epoch 12: idx33303 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 66 tris/602 words +[sched] epoch 13: idx34605 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 104 tris/944 words +[sched] epoch 14: idx35907 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 65 tris/593 words +[sched] epoch 15: idx37209 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 81 tris/737 words +[sched] epoch 16: idx38511 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 131 tris/1187 words +[sched] epoch 17: idx71148 tbp10240 cbp480 tex crc=0xa727234d (exp 0xa727234d) 74 tris/674 words +[sched] epoch 18: idx71787 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 35 tris/323 words +[sched] epoch 19: idx72426 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 32 tris/296 words +[sched] epoch 20: idx73065 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 57 tris/521 words +[sched] epoch 21: idx73704 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 77 tris/701 words +[sched] epoch 22: idx74343 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 46 tris/422 words +[sched] epoch 23: idx74982 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 75 tris/683 words +[sched] epoch 24: idx75621 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 118 tris/1070 words +[sched] epoch 25: idx76260 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 59 tris/539 words +[sched] epoch 26: idx76899 tbp10240 cbp480 REUSE resident tex (crc 0xa727234d) 74 tris/674 words +[sched] epoch 27: idx78319 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 52 tris/476 words +[sched] epoch 28: idx82720 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 49 tris/449 words +[sched] epoch 29: idx83323 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 89 tris/809 words +[sched] epoch 30: idx83944 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 65 tris/593 words +[sched] epoch 31: idx84565 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 77 tris/701 words +[sched] epoch 32: idx85186 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 52 tris/476 words +[sched] epoch 33: idx85807 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 103 tris/935 words +[sched] epoch 34: idx86428 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 64 tris/584 words +[sched] epoch 35: idx87049 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 34 tris/314 words +[sched] epoch 36: idx88918 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 2 tris/26 words +[sched] epoch 37: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 226 tris/2042 words +[sched] epoch 38: idx89548 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 112 tris/1016 words +[sched] epoch 39: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 200 tris/1808 words +[sched] epoch 40: idx90187 tbp9216 cbp480 REUSE resident tex (crc 0xfbdeaa32) 54 tris/494 words +[sched] epoch 41: idx91678 tbp9216 cbp480 tex crc=0xfbdeaa32 (exp 0xfbdeaa32) 20 tris/188 words +[sched] epoch 42: idx114431 tbp8192 cbp480 tex crc=0xcf4cae27 (exp 0xcf4cae27) 162 tris/1466 words +[sched] epoch 43: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 44: idx115016 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 31 tris/287 words +[sched] epoch 45: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 46: idx115655 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 45 tris/413 words +[sched] epoch 47: idx116351 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 194 tris/1754 words +[sched] epoch 48: idx117050 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 172 tris/1556 words +[sched] epoch 49: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 226 tris/2042 words +[sched] epoch 50: idx117599 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 10 tris/98 words +[sched] epoch 51: idx118238 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 198 tris/1790 words +[sched] epoch 52: idx118877 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 130 tris/1178 words +[sched] epoch 53: idx119471 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 54: idx120110 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 209 tris/1889 words +[sched] epoch 55: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 166 tris/1502 words +[sched] epoch 56: idx120749 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 63 tris/575 words +[sched] epoch 57: idx121388 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 112 tris/1016 words +[sched] epoch 58: idx122027 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 96 tris/872 words +[sched] epoch 59: idx122600 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 86 tris/782 words +[sched] epoch 60: idx123239 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 18 tris/170 words +[sched] epoch 61: idx123869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 27 tris/251 words +[sched] epoch 62: idx124508 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 35 tris/323 words +[sched] epoch 63: idx125147 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 9 tris/89 words +[sched] epoch 64: idx125786 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 61 tris/557 words +[sched] epoch 65: idx126434 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 40 tris/368 words +[sched] epoch 66: idx126968 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 71 tris/647 words +[sched] epoch 67: idx127607 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 58 tris/530 words +[sched] epoch 68: idx128246 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 48 tris/440 words +[sched] epoch 69: idx128885 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 6 tris/62 words +[sched] epoch 70: idx129389 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 165 tris/1493 words +[sched] epoch 71: idx130028 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 135 tris/1223 words +[sched] epoch 72: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 180 tris/1628 words +[sched] epoch 73: idx130667 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 24 tris/224 words +[sched] epoch 74: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 53 tris/485 words +[sched] epoch 75: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 62 tris/566 words +[sched] epoch 76: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 57 tris/521 words +[sched] epoch 77: idx131306 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 83 tris/755 words +[sched] epoch 78: idx131945 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 159 tris/1439 words +[sched] epoch 79: idx132584 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 105 tris/953 words +[sched] epoch 80: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 68 tris/620 words +[sched] epoch 81: idx133262 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 5 tris/53 words +[sched] epoch 82: idx135869 tbp8192 cbp480 REUSE resident tex (crc 0xcf4cae27) 2 tris/26 words +[sched] epoch 83: idx144890 tbp12288 cbp480 tex crc=0x87415c50 (exp 0x87415c50) 19 tris/179 words +[sched] epoch 84: idx145712 tbp12288 cbp480 REUSE resident tex (crc 0x87415c50) 12 tris/116 words +[sched] epoch 85: idx146205 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 111 tris/1007 words +[sched] epoch 86: idx146630 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 31 tris/287 words +[sched] epoch 87: idx147068 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 36 tris/332 words +[sched] epoch 88: idx147480 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 75 tris/683 words +[sched] epoch 89: idx147888 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 73 tris/665 words +[sched] epoch 90: idx148264 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 113 tris/1025 words +[sched] epoch 91: idx148919 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 103 tris/935 words +[sched] epoch 92: idx149509 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 91 tris/827 words +[sched] epoch 93: idx150125 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 77 tris/701 words +[sched] epoch 94: idx150741 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 78 tris/710 words +[sched] epoch 95: idx151344 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 44 tris/404 words +[sched] epoch 96: idx152021 tbp11264 cbp480 tex crc=0xeadeb012 (exp 0xeadeb012) 22 tris/206 words +[sched] epoch 97: idx152420 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 26 tris/242 words +[sched] epoch 98: idx152806 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 32 tris/296 words +[sched] epoch 99: idx153218 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 100: idx153643 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 4 tris/44 words +[sched] epoch 101: idx154029 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 30 tris/278 words +[sched] epoch 102: idx154428 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 21 tris/197 words +[sched] epoch 103: idx154853 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 20 tris/188 words +[sched] epoch 104: idx155265 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 16 tris/152 words +[sched] epoch 105: idx155664 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 11 tris/107 words +[sched] epoch 106: idx156063 tbp11264 cbp480 REUSE resident tex (crc 0xeadeb012) 8 tris/80 words +[sched] epoch 107: idx156566 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 137 tris/1241 words +[sched] epoch 108: idx157273 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 113 tris/1025 words +[sched] epoch 109: idx157967 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 81 tris/737 words +[sched] epoch 110: idx158674 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 93 tris/845 words +[sched] epoch 111: idx159420 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 58 tris/530 words +[sched] epoch 112: idx160114 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 10 tris/98 words +[sched] epoch 113: idx160331 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 31 tris/287 words +[sched] epoch 114: idx160769 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 28 tris/260 words +[sched] epoch 115: idx161168 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 40 tris/368 words +[sched] epoch 116: idx161567 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 117: idx162300 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 37 tris/341 words +[sched] epoch 118: idx162725 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 33 tris/305 words +[sched] epoch 119: idx163163 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 22 tris/206 words +[sched] epoch 120: idx163575 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 26 tris/242 words +[sched] epoch 121: idx164204 tbp10240 cbp480 tex crc=0xb710940e (exp 0xb710940e) 66 tris/602 words +[sched] epoch 122: idx164950 tbp10240 cbp480 REUSE resident tex (crc 0xb710940e) 39 tris/359 words +[sched] epoch 123: idx165358 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 1 tris/17 words +[sched] epoch 124: idx165536 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 100 tris/908 words +[sched] epoch 125: idx166269 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 73 tris/665 words +[sched] epoch 126: idx166950 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 80 tris/728 words +[sched] epoch 127: idx167670 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 128: idx168416 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 57 tris/521 words +[sched] epoch 129: idx168815 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 13 tris/125 words +[sched] epoch 130: idx169227 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 72 tris/656 words +[sched] epoch 131: idx169830 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 35 tris/323 words +[sched] epoch 132: idx170177 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 12 tris/116 words +[sched] epoch 133: idx170407 tbp13760 cbp480 tex crc=0xb0a82094 (exp 0xb0a82094) 12 tris/116 words +[sched] epoch 134: idx170637 tbp9216 cbp480 tex crc=0x9ecc08f5 (exp 0x9ecc08f5) 133 tris/1205 words +[sched] epoch 135: idx171088 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 106 tris/962 words +[sched] epoch 136: idx171678 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 59 tris/539 words +[sched] epoch 137: idx172233 tbp9216 cbp480 REUSE resident tex (crc 0x9ecc08f5) 30 tris/278 words +[sched] epoch 138: idx172601 tbp8192 cbp480 tex crc=0x68e8cb9d (exp 0x68e8cb9d) 226 tris/2042 words +[sched] epoch 139: idx172601 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 43 tris/395 words +[sched] epoch 140: idx175765 tbp8192 cbp480 REUSE resident tex (crc 0x68e8cb9d) 14 tris/134 words +[sched] epoch 141: idx175995 tbp12288 cbp480 tex crc=0xf2553358 (exp 0xf2553358) 37 tris/341 words +[sched] epoch 142: idx176446 tbp12288 cbp480 REUSE resident tex (crc 0xf2553358) 18 tris/170 words +[sched] epoch 143: idx196167 tbp11264 cbp480 tex crc=0xfcffae83 (exp 0xfcffae83) 3 tris/35 words +[sched] epoch 144: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 145: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 146: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 147: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 148: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 149: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 150: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 151: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 9 tris/89 words +[sched] epoch 152: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 52 tris/476 words +[sched] epoch 153: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 39 tris/359 words +[sched] epoch 154: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 10 tris/98 words +[sched] epoch 155: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 156: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 157: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 158: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 159: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 160: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 161: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 162: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 163: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 164: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 165: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 166: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 167: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 168: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 169: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 170: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 8 tris/80 words +[sched] epoch 171: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 30 tris/278 words +[sched] epoch 172: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 59 tris/539 words +[sched] epoch 173: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 11 tris/107 words +[sched] epoch 174: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 7 tris/71 words +[sched] epoch 175: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 6 tris/62 words +[sched] epoch 176: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 5 tris/53 words +[sched] epoch 177: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 178: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 179: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 4 tris/44 words +[sched] epoch 180: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 3 tris/35 words +[sched] epoch 181: idx196167 tbp11264 cbp480 REUSE resident tex (crc 0xfcffae83) 2 tris/26 words +[sched] epoch 182: idx196494 tbp10240 cbp480 tex crc=0x13cfe390 (exp 0x13cfe390) 51 tris/467 words +[sched] epoch 183: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 184: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 185: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 186: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 187: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 188: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 189: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 57 tris/521 words +[sched] epoch 190: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 53 tris/485 words +[sched] epoch 191: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 192: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 193: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 194: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 58 tris/530 words +[sched] epoch 195: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 196: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 197: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 198: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 199: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 200: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 201: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 202: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 203: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 204: idx196494 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 205: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 206: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 207: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 208: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 209: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 210: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 211: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 212: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 213: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 214: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 215: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 216: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 217: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 218: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 219: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 220: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 221: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 222: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 223: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 224: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 225: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 226: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 227: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 228: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 47 tris/431 words +[sched] epoch 229: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 230: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 78 tris/710 words +[sched] epoch 231: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 63 tris/575 words +[sched] epoch 232: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 66 tris/602 words +[sched] epoch 233: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 234: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 235: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 236: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 237: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 238: idx196868 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 239: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 240: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 241: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 242: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 45 tris/413 words +[sched] epoch 243: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 244: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 245: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 46 tris/422 words +[sched] epoch 246: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 247: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 41 tris/377 words +[sched] epoch 248: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 54 tris/494 words +[sched] epoch 249: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 250: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 43 tris/395 words +[sched] epoch 251: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 76 tris/692 words +[sched] epoch 252: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 73 tris/665 words +[sched] epoch 253: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 56 tris/512 words +[sched] epoch 254: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 68 tris/620 words +[sched] epoch 255: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 256: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 257: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 49 tris/449 words +[sched] epoch 258: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 55 tris/503 words +[sched] epoch 259: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 260: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 261: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 64 tris/584 words +[sched] epoch 262: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 263: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 264: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 59 tris/539 words +[sched] epoch 265: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 266: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 267: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 268: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 269: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 270: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 271: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 272: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 273: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 274: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 31 tris/287 words +[sched] epoch 275: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 38 tris/350 words +[sched] epoch 276: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 25 tris/233 words +[sched] epoch 277: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 51 tris/467 words +[sched] epoch 278: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 279: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 35 tris/323 words +[sched] epoch 280: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 71 tris/647 words +[sched] epoch 281: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 36 tris/332 words +[sched] epoch 282: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 52 tris/476 words +[sched] epoch 283: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 284: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 285: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 286: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 67 tris/611 words +[sched] epoch 287: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 39 tris/359 words +[sched] epoch 288: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 50 tris/458 words +[sched] epoch 289: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 42 tris/386 words +[sched] epoch 290: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 291: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 292: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 44 tris/404 words +[sched] epoch 293: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 48 tris/440 words +[sched] epoch 294: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 295: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 296: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 24 tris/224 words +[sched] epoch 297: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 40 tris/368 words +[sched] epoch 298: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 299: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 37 tris/341 words +[sched] epoch 300: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 34 tris/314 words +[sched] epoch 301: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 30 tris/278 words +[sched] epoch 302: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 29 tris/269 words +[sched] epoch 303: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 304: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 26 tris/242 words +[sched] epoch 305: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 306: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 17 tris/161 words +[sched] epoch 307: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 32 tris/296 words +[sched] epoch 308: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 309: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 27 tris/251 words +[sched] epoch 310: idx197327 tbp10240 cbp480 REUSE resident tex (crc 0x13cfe390) 14 tris/134 words +[sched] preclear COLOR 307200 words (0x0..0x12c000) wr_bresp_errs=0 +[sched] preclear Z 153600 words (0x140000..0x1d6000) wr_bresp_errs=0 +[sched] zbuf: armed early for fresh frame Z-preclear +[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774) +[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO +[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2118004 +[sched] epoch 0: zero fragment drops (snap=0, sticky=0) +[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096) +[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2120172 +[sched] epoch 1: zero fragment drops (snap=0, sticky=0) +[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) +[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4) +[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096) +[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=2122846 +[sched] epoch 2: zero fragment drops (snap=0, sticky=0) +[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98) +[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2123337 +[sched] epoch 3: zero fragment drops (snap=0, sticky=0) +[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096) +[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=2126315 +[sched] epoch 4: zero fragment drops (snap=0, sticky=0) +[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2126646 +[sched] epoch 5: zero fragment drops (snap=0, sticky=0) +[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) +[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2) +[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096) +[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=2128099 +[sched] epoch 6: zero fragment drops (snap=0, sticky=0) +[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2128134 +[sched] epoch 7: zero fragment drops (snap=0, sticky=0) +[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2128414 +[sched] epoch 8: zero fragment drops (snap=0, sticky=0) +[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) +[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4) +[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2128659 +[sched] epoch 9: zero fragment drops (snap=0, sticky=0) +[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 2128659->2128662) +[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2128662 +[sched] epoch 10: zero fragment drops (snap=0, sticky=0) +[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2128788 +[sched] epoch 11: zero fragment drops (snap=0, sticky=0) +[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2129051 +[sched] epoch 12: zero fragment drops (snap=0, sticky=0) +[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096) +[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=2129455 +[sched] epoch 13: zero fragment drops (snap=0, sticky=0) +[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2129712 +[sched] epoch 14: zero fragment drops (snap=0, sticky=0) +[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2130148 +[sched] epoch 15: zero fragment drops (snap=0, sticky=0) +[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0) +[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096) +[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=2131010 +[sched] epoch 16: zero fragment drops (snap=0, sticky=0) +[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2131359 +[sched] epoch 17: zero fragment drops (snap=0, sticky=0) +[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2131452 +[sched] epoch 18: zero fragment drops (snap=0, sticky=0) +[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2131537 +[sched] epoch 19: zero fragment drops (snap=0, sticky=0) +[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2131862 +[sched] epoch 20: zero fragment drops (snap=0, sticky=0) +[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2132266 +[sched] epoch 21: zero fragment drops (snap=0, sticky=0) +[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=2132410 +[sched] epoch 22: zero fragment drops (snap=0, sticky=0) +[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2132903 +[sched] epoch 23: zero fragment drops (snap=0, sticky=0) +[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096) +[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=2133706 +[sched] epoch 24: zero fragment drops (snap=0, sticky=0) +[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2134098 +[sched] epoch 25: zero fragment drops (snap=0, sticky=0) +[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) +[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae) +[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096) +[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2134481 +[sched] epoch 26: zero fragment drops (snap=0, sticky=0) +[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2134902 +[sched] epoch 27: zero fragment drops (snap=0, sticky=0) +[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2134995 +[sched] epoch 28: zero fragment drops (snap=0, sticky=0) +[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096) +[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=2135477 +[sched] epoch 29: zero fragment drops (snap=0, sticky=0) +[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096) +[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2135612 +[sched] epoch 30: zero fragment drops (snap=0, sticky=0) +[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2135806 +[sched] epoch 31: zero fragment drops (snap=0, sticky=0) +[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2135984 +[sched] epoch 32: zero fragment drops (snap=0, sticky=0) +[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2136276 +[sched] epoch 33: zero fragment drops (snap=0, sticky=0) +[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=2136361 +[sched] epoch 34: zero fragment drops (snap=0, sticky=0) +[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=2136397 +[sched] epoch 35: zero fragment drops (snap=0, sticky=0) +[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 2136397->2136406) +[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2136406 +[sched] epoch 36: zero fragment drops (snap=0, sticky=0) +[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2138950 +[sched] epoch 37: zero fragment drops (snap=0, sticky=0) +[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2139719 +[sched] epoch 38: zero fragment drops (snap=0, sticky=0) +[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096) +[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=2142685 +[sched] epoch 39: zero fragment drops (snap=0, sticky=0) +[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) +[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2) +[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2143008 +[sched] epoch 40: zero fragment drops (snap=0, sticky=0) +[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2) +[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2143117 +[sched] epoch 41: zero fragment drops (snap=0, sticky=0) +[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096) +[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=2143335 +[sched] epoch 42: zero fragment drops (snap=0, sticky=0) +[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2143804 +[sched] epoch 43: zero fragment drops (snap=0, sticky=0) +[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2143939 +[sched] epoch 44: zero fragment drops (snap=0, sticky=0) +[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2145206 +[sched] epoch 45: zero fragment drops (snap=0, sticky=0) +[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2145468 +[sched] epoch 46: zero fragment drops (snap=0, sticky=0) +[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096) +[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=2146528 +[sched] epoch 47: zero fragment drops (snap=0, sticky=0) +[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096) +[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=2147263 +[sched] epoch 48: zero fragment drops (snap=0, sticky=0) +[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2148095 +[sched] epoch 49: zero fragment drops (snap=0, sticky=0) +[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2148114 +[sched] epoch 50: zero fragment drops (snap=0, sticky=0) +[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096) +[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=2148489 +[sched] epoch 51: zero fragment drops (snap=0, sticky=0) +[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096) +[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=2148828 +[sched] epoch 52: zero fragment drops (snap=0, sticky=0) +[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2149196 +[sched] epoch 53: zero fragment drops (snap=0, sticky=0) +[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096) +[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=2150228 +[sched] epoch 54: zero fragment drops (snap=0, sticky=0) +[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096) +[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=2152908 +[sched] epoch 55: zero fragment drops (snap=0, sticky=0) +[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=2153466 +[sched] epoch 56: zero fragment drops (snap=0, sticky=0) +[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096) +[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2154807 +[sched] epoch 57: zero fragment drops (snap=0, sticky=0) +[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096) +[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=2156058 +[sched] epoch 58: zero fragment drops (snap=0, sticky=0) +[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096) +[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=2157730 +[sched] epoch 59: zero fragment drops (snap=0, sticky=0) +[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2157758 +[sched] epoch 60: zero fragment drops (snap=0, sticky=0) +[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2157835 +[sched] epoch 61: zero fragment drops (snap=0, sticky=0) +[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2157970 +[sched] epoch 62: zero fragment drops (snap=0, sticky=0) +[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=2158008 +[sched] epoch 63: zero fragment drops (snap=0, sticky=0) +[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096) +[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=2158198 +[sched] epoch 64: zero fragment drops (snap=0, sticky=0) +[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2158414 +[sched] epoch 65: zero fragment drops (snap=0, sticky=0) +[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=2158770 +[sched] epoch 66: zero fragment drops (snap=0, sticky=0) +[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2159084 +[sched] epoch 67: zero fragment drops (snap=0, sticky=0) +[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2159326 +[sched] epoch 68: zero fragment drops (snap=0, sticky=0) +[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2159360 +[sched] epoch 69: zero fragment drops (snap=0, sticky=0) +[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096) +[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=2160125 +[sched] epoch 70: zero fragment drops (snap=0, sticky=0) +[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096) +[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=2160902 +[sched] epoch 71: zero fragment drops (snap=0, sticky=0) +[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096) +[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=2163557 +[sched] epoch 72: zero fragment drops (snap=0, sticky=0) +[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=2164190 +[sched] epoch 73: zero fragment drops (snap=0, sticky=0) +[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2166081 +[sched] epoch 74: zero fragment drops (snap=0, sticky=0) +[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096) +[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=2168076 +[sched] epoch 75: zero fragment drops (snap=0, sticky=0) +[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2170326 +[sched] epoch 76: zero fragment drops (snap=0, sticky=0) +[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096) +[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=2171853 +[sched] epoch 77: zero fragment drops (snap=0, sticky=0) +[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096) +[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=2172881 +[sched] epoch 78: zero fragment drops (snap=0, sticky=0) +[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096) +[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=2175321 +[sched] epoch 79: zero fragment drops (snap=0, sticky=0) +[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=2177855 +[sched] epoch 80: zero fragment drops (snap=0, sticky=0) +[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2178061 +[sched] epoch 81: zero fragment drops (snap=0, sticky=0) +[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) +[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c) +[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 2178061->2178063) +[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2178063 +[sched] epoch 82: zero fragment drops (snap=0, sticky=0) +[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096) +[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=2178092 +[sched] epoch 83: zero fragment drops (snap=0, sticky=0) +[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) +[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98) +[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2178098 +[sched] epoch 84: zero fragment drops (snap=0, sticky=0) +[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096) +[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=2178358 +[sched] epoch 85: zero fragment drops (snap=0, sticky=0) +[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2178463 +[sched] epoch 86: zero fragment drops (snap=0, sticky=0) +[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9) +[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2178547 +[sched] epoch 87: zero fragment drops (snap=0, sticky=0) +[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096) +[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2178837 +[sched] epoch 88: zero fragment drops (snap=0, sticky=0) +[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2179234 +[sched] epoch 89: zero fragment drops (snap=0, sticky=0) +[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff) +[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2179785 +[sched] epoch 90: zero fragment drops (snap=0, sticky=0) +[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096) +[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2180144 +[sched] epoch 91: zero fragment drops (snap=0, sticky=0) +[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096) +[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=2180512 +[sched] epoch 92: zero fragment drops (snap=0, sticky=0) +[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096) +[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2180753 +[sched] epoch 93: zero fragment drops (snap=0, sticky=0) +[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=2180998 +[sched] epoch 94: zero fragment drops (snap=0, sticky=0) +[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8) +[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2181144 +[sched] epoch 95: zero fragment drops (snap=0, sticky=0) +[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2181182 +[sched] epoch 96: zero fragment drops (snap=0, sticky=0) +[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2181242 +[sched] epoch 97: zero fragment drops (snap=0, sticky=0) +[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2181290 +[sched] epoch 98: zero fragment drops (snap=0, sticky=0) +[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2181311 +[sched] epoch 99: zero fragment drops (snap=0, sticky=0) +[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 2181311->2181315) +[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2181315 +[sched] epoch 100: zero fragment drops (snap=0, sticky=0) +[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2181366 +[sched] epoch 101: zero fragment drops (snap=0, sticky=0) +[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096) +[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=2181447 +[sched] epoch 102: zero fragment drops (snap=0, sticky=0) +[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096) +[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2181470 +[sched] epoch 103: zero fragment drops (snap=0, sticky=0) +[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096) +[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2181546 +[sched] epoch 104: zero fragment drops (snap=0, sticky=0) +[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 105: drain low pulse completed between host polls; counters advanced (records 16->11, FB beats 2181546->2181562) +[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=2181562 +[sched] epoch 105: zero fragment drops (snap=0, sticky=0) +[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) +[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386) +[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 2181562->2181574) +[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=2181574 +[sched] epoch 106: zero fragment drops (snap=0, sticky=0) +[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096) +[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=2182004 +[sched] epoch 107: zero fragment drops (snap=0, sticky=0) +[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096) +[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2182426 +[sched] epoch 108: zero fragment drops (snap=0, sticky=0) +[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096) +[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2182774 +[sched] epoch 109: zero fragment drops (snap=0, sticky=0) +[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096) +[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=2183091 +[sched] epoch 110: zero fragment drops (snap=0, sticky=0) +[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2183294 +[sched] epoch 111: zero fragment drops (snap=0, sticky=0) +[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028) +[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2183328 +[sched] epoch 112: zero fragment drops (snap=0, sticky=0) +[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2183386 +[sched] epoch 113: zero fragment drops (snap=0, sticky=0) +[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096) +[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2183437 +[sched] epoch 114: zero fragment drops (snap=0, sticky=0) +[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2183490 +[sched] epoch 115: zero fragment drops (snap=0, sticky=0) +[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2183551 +[sched] epoch 116: zero fragment drops (snap=0, sticky=0) +[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2183596 +[sched] epoch 117: zero fragment drops (snap=0, sticky=0) +[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096) +[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=2183635 +[sched] epoch 118: zero fragment drops (snap=0, sticky=0) +[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096) +[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2183671 +[sched] epoch 119: zero fragment drops (snap=0, sticky=0) +[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684) +[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2183700 +[sched] epoch 120: zero fragment drops (snap=0, sticky=0) +[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2183840 +[sched] epoch 121: zero fragment drops (snap=0, sticky=0) +[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) +[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05) +[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=2183910 +[sched] epoch 122: zero fragment drops (snap=0, sticky=0) +[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 123 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 123: streamed 17 words, staged_addr=17 (exp 17, < 4096) +[sched] epoch 123: drain low pulse completed between host polls; counters advanced (records 39->1, FB beats 2183910->2183911) +[sched] epoch 123: GO -> fresh drain frame_drained=1, records=1 (exp 1), FB beats=2183911 +[sched] epoch 123: zero fragment drops (snap=0, sticky=0) +[sched] epoch 124 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 124 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 124: streamed 908 words, staged_addr=908 (exp 908, < 4096) +[sched] epoch 124: GO -> fresh drain frame_drained=1, records=100 (exp 100), FB beats=2184314 +[sched] epoch 124: zero fragment drops (snap=0, sticky=0) +[sched] epoch 125: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 125 pal: runtime copy sum32=0x81cb400c (exp 0x81cb400c) +[sched] epoch 125: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 125: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2184783 +[sched] epoch 125: zero fragment drops (snap=0, sticky=0) +[sched] epoch 126 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 126 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 126: streamed 728 words, staged_addr=728 (exp 728, < 4096) +[sched] epoch 126: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=2185199 +[sched] epoch 126: zero fragment drops (snap=0, sticky=0) +[sched] epoch 127: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 127 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 127: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 127: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2185332 +[sched] epoch 127: zero fragment drops (snap=0, sticky=0) +[sched] epoch 128: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 128 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 128: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 128: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2185703 +[sched] epoch 128: zero fragment drops (snap=0, sticky=0) +[sched] epoch 129: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 129 pal: runtime copy sum32=0x815145a3 (exp 0x815145a3) +[sched] epoch 129: streamed 125 words, staged_addr=125 (exp 125, < 4096) +[sched] epoch 129: GO -> fresh drain frame_drained=1, records=13 (exp 13), FB beats=2185798 +[sched] epoch 129: zero fragment drops (snap=0, sticky=0) +[sched] epoch 130 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 130 pal: runtime copy sum32=0x829b8725 (exp 0x829b8725) +[sched] epoch 130: streamed 656 words, staged_addr=656 (exp 656, < 4096) +[sched] epoch 130: GO -> fresh drain frame_drained=1, records=72 (exp 72), FB beats=2185972 +[sched] epoch 130: zero fragment drops (snap=0, sticky=0) +[sched] epoch 131 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 131 pal: runtime copy sum32=0x84317595 (exp 0x84317595) +[sched] epoch 131: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 131: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2186034 +[sched] epoch 131: zero fragment drops (snap=0, sticky=0) +[sched] epoch 132 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 132 pal: runtime copy sum32=0x8504a80c (exp 0x8504a80c) +[sched] epoch 132: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 132: drain low pulse completed between host polls; counters advanced (records 35->12, FB beats 2186034->2186077) +[sched] epoch 132: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2186077 +[sched] epoch 132: zero fragment drops (snap=0, sticky=0) +[sched] epoch 133 tex: upload wr_errs=0 ; fill crc=0xb0a82094 (exp 0xb0a82094) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 133 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 133: streamed 116 words, staged_addr=116 (exp 116, < 4096) +[sched] epoch 133: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2186134 +[sched] epoch 133: zero fragment drops (snap=0, sticky=0) +[sched] epoch 134 tex: upload wr_errs=0 ; fill crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 134 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 134: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096) +[sched] epoch 134: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=2186567 +[sched] epoch 134: zero fragment drops (snap=0, sticky=0) +[sched] epoch 135: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 135 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 135: streamed 962 words, staged_addr=962 (exp 962, < 4096) +[sched] epoch 135: GO -> fresh drain frame_drained=1, records=106 (exp 106), FB beats=2186884 +[sched] epoch 135: zero fragment drops (snap=0, sticky=0) +[sched] epoch 136: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 136 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 136: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 136: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2187026 +[sched] epoch 136: zero fragment drops (snap=0, sticky=0) +[sched] epoch 137: REUSE resident texture (no upload/fill): crc=0x9ecc08f5 (exp 0x9ecc08f5) beats=8192 (exp 8192) +[sched] epoch 137 pal: runtime copy sum32=0x83c0ed22 (exp 0x83c0ed22) +[sched] epoch 137: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 137: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2187106 +[sched] epoch 137: zero fragment drops (snap=0, sticky=0) +[sched] epoch 138 tex: upload wr_errs=0 ; fill crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 138 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 138: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096) +[sched] epoch 138: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2187996 +[sched] epoch 138: zero fragment drops (snap=0, sticky=0) +[sched] epoch 139: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 139 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 139: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 139: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2188159 +[sched] epoch 139: zero fragment drops (snap=0, sticky=0) +[sched] epoch 140: REUSE resident texture (no upload/fill): crc=0x68e8cb9d (exp 0x68e8cb9d) beats=8192 (exp 8192) +[sched] epoch 140 pal: runtime copy sum32=0x53cd543f (exp 0x53cd543f) +[sched] epoch 140: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 140: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=2188194 +[sched] epoch 140: zero fragment drops (snap=0, sticky=0) +[sched] epoch 141 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 141 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 141: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 141: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2188271 +[sched] epoch 141: zero fragment drops (snap=0, sticky=0) +[sched] epoch 142: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) +[sched] epoch 142 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1) +[sched] epoch 142: streamed 170 words, staged_addr=170 (exp 170, < 4096) +[sched] epoch 142: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2188307 +[sched] epoch 142: zero fragment drops (snap=0, sticky=0) +[sched] epoch 143 tex: upload wr_errs=0 ; fill crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 143 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 143: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 143: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2194248 +[sched] epoch 143: zero fragment drops (snap=0, sticky=0) +[sched] epoch 144: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 144 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 144: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 144: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2199981 +[sched] epoch 144: zero fragment drops (snap=0, sticky=0) +[sched] epoch 145: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 145 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 145: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 145: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2205304 +[sched] epoch 145: zero fragment drops (snap=0, sticky=0) +[sched] epoch 146: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 146 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 146: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 146: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2211994 +[sched] epoch 146: zero fragment drops (snap=0, sticky=0) +[sched] epoch 147: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 147 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 147: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 147: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2218139 +[sched] epoch 147: zero fragment drops (snap=0, sticky=0) +[sched] epoch 148: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 148 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 148: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 148: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2225101 +[sched] epoch 148: zero fragment drops (snap=0, sticky=0) +[sched] epoch 149: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 149 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 149: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 149: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2231113 +[sched] epoch 149: zero fragment drops (snap=0, sticky=0) +[sched] epoch 150: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 150 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 150: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 150: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2237256 +[sched] epoch 150: zero fragment drops (snap=0, sticky=0) +[sched] epoch 151: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 151 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 151: streamed 89 words, staged_addr=89 (exp 89, < 4096) +[sched] epoch 151: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=2244216 +[sched] epoch 151: zero fragment drops (snap=0, sticky=0) +[sched] epoch 152: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 152 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 152: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 152: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2251129 +[sched] epoch 152: zero fragment drops (snap=0, sticky=0) +[sched] epoch 153: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 153 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 153: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 153: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=2257683 +[sched] epoch 153: zero fragment drops (snap=0, sticky=0) +[sched] epoch 154: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 154 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 154: streamed 98 words, staged_addr=98 (exp 98, < 4096) +[sched] epoch 154: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2264403 +[sched] epoch 154: zero fragment drops (snap=0, sticky=0) +[sched] epoch 155: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 155 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 155: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 155: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=2271059 +[sched] epoch 155: zero fragment drops (snap=0, sticky=0) +[sched] epoch 156: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 156 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 156: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 156: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2277971 +[sched] epoch 156: zero fragment drops (snap=0, sticky=0) +[sched] epoch 157: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 157 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 157: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 157: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2284563 +[sched] epoch 157: zero fragment drops (snap=0, sticky=0) +[sched] epoch 158: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 158 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 158: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 158: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2290451 +[sched] epoch 158: zero fragment drops (snap=0, sticky=0) +[sched] epoch 159: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 159 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 159: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 159: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2296851 +[sched] epoch 159: zero fragment drops (snap=0, sticky=0) +[sched] epoch 160: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 160 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 160: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 160: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2303763 +[sched] epoch 160: zero fragment drops (snap=0, sticky=0) +[sched] epoch 161: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 161 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 161: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 161: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2309339 +[sched] epoch 161: zero fragment drops (snap=0, sticky=0) +[sched] epoch 162: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 162 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 162: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 162: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2315171 +[sched] epoch 162: zero fragment drops (snap=0, sticky=0) +[sched] epoch 163: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 163 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 163: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 163: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2320829 +[sched] epoch 163: zero fragment drops (snap=0, sticky=0) +[sched] epoch 164: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 164 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 164: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 164: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2326297 +[sched] epoch 164: zero fragment drops (snap=0, sticky=0) +[sched] epoch 165: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 165 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 165: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 165: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2333047 +[sched] epoch 165: zero fragment drops (snap=0, sticky=0) +[sched] epoch 166: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 166 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 166: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 166: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2339253 +[sched] epoch 166: zero fragment drops (snap=0, sticky=0) +[sched] epoch 167: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 167 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 167: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 167: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2346202 +[sched] epoch 167: zero fragment drops (snap=0, sticky=0) +[sched] epoch 168: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 168 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 168: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 168: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2352413 +[sched] epoch 168: zero fragment drops (snap=0, sticky=0) +[sched] epoch 169: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 169 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 169: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 169: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2358679 +[sched] epoch 169: zero fragment drops (snap=0, sticky=0) +[sched] epoch 170: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 170 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 170: streamed 80 words, staged_addr=80 (exp 80, < 4096) +[sched] epoch 170: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=2365162 +[sched] epoch 170: zero fragment drops (snap=0, sticky=0) +[sched] epoch 171: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 171 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 171: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 171: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2372107 +[sched] epoch 171: zero fragment drops (snap=0, sticky=0) +[sched] epoch 172: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 172 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 172: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 172: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2378695 +[sched] epoch 172: zero fragment drops (snap=0, sticky=0) +[sched] epoch 173: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 173 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 173: streamed 107 words, staged_addr=107 (exp 107, < 4096) +[sched] epoch 173: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=2385539 +[sched] epoch 173: zero fragment drops (snap=0, sticky=0) +[sched] epoch 174: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 174 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 174: streamed 71 words, staged_addr=71 (exp 71, < 4096) +[sched] epoch 174: GO -> fresh drain frame_drained=1, records=7 (exp 7), FB beats=2391819 +[sched] epoch 174: zero fragment drops (snap=0, sticky=0) +[sched] epoch 175: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 175 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 175: streamed 62 words, staged_addr=62 (exp 62, < 4096) +[sched] epoch 175: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2398467 +[sched] epoch 175: zero fragment drops (snap=0, sticky=0) +[sched] epoch 176: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 176 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 176: streamed 53 words, staged_addr=53 (exp 53, < 4096) +[sched] epoch 176: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2404932 +[sched] epoch 176: zero fragment drops (snap=0, sticky=0) +[sched] epoch 177: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 177 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 177: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 177: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2410636 +[sched] epoch 177: zero fragment drops (snap=0, sticky=0) +[sched] epoch 178: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 178 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 178: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 178: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2416843 +[sched] epoch 178: zero fragment drops (snap=0, sticky=0) +[sched] epoch 179: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 179 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 179: streamed 44 words, staged_addr=44 (exp 44, < 4096) +[sched] epoch 179: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2423562 +[sched] epoch 179: zero fragment drops (snap=0, sticky=0) +[sched] epoch 180: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 180 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 180: streamed 35 words, staged_addr=35 (exp 35, < 4096) +[sched] epoch 180: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2428891 +[sched] epoch 180: zero fragment drops (snap=0, sticky=0) +[sched] epoch 181: REUSE resident texture (no upload/fill): crc=0xfcffae83 (exp 0xfcffae83) beats=8192 (exp 8192) +[sched] epoch 181 pal: runtime copy sum32=0x00000000 (exp 0x00000000) +[sched] epoch 181: streamed 26 words, staged_addr=26 (exp 26, < 4096) +[sched] epoch 181: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2432627 +[sched] epoch 181: zero fragment drops (snap=0, sticky=0) +[sched] epoch 182 tex: upload wr_errs=0 ; fill crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) bytes=262144 rd_errs=0 +[sched] epoch 182 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 182: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 182: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2446697 +[sched] epoch 182: zero fragment drops (snap=0, sticky=0) +[sched] epoch 183: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 183 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 183: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 183: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=2461080 +[sched] epoch 183: zero fragment drops (snap=0, sticky=0) +[sched] epoch 184: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 184 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 184: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 184: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=2475325 +[sched] epoch 184: zero fragment drops (snap=0, sticky=0) +[sched] epoch 185: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 185 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 185: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 185: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2489723 +[sched] epoch 185: zero fragment drops (snap=0, sticky=0) +[sched] epoch 186: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 186 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 186: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 186: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2503885 +[sched] epoch 186: zero fragment drops (snap=0, sticky=0) +[sched] epoch 187: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 187 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 187: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 187: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2518031 +[sched] epoch 187: zero fragment drops (snap=0, sticky=0) +[sched] epoch 188: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 188 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 188: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 188: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2532477 +[sched] epoch 188: zero fragment drops (snap=0, sticky=0) +[sched] epoch 189: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 189 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 189: streamed 521 words, staged_addr=521 (exp 521, < 4096) +[sched] epoch 189: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2546834 +[sched] epoch 189: zero fragment drops (snap=0, sticky=0) +[sched] epoch 190: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 190 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 190: streamed 485 words, staged_addr=485 (exp 485, < 4096) +[sched] epoch 190: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2560944 +[sched] epoch 190: zero fragment drops (snap=0, sticky=0) +[sched] epoch 191: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 191 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 191: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 191: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2574752 +[sched] epoch 191: zero fragment drops (snap=0, sticky=0) +[sched] epoch 192: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 192 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 192: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 192: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2589074 +[sched] epoch 192: zero fragment drops (snap=0, sticky=0) +[sched] epoch 193: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 193 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 193: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 193: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2603458 +[sched] epoch 193: zero fragment drops (snap=0, sticky=0) +[sched] epoch 194: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 194 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 194: streamed 530 words, staged_addr=530 (exp 530, < 4096) +[sched] epoch 194: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2617704 +[sched] epoch 194: zero fragment drops (snap=0, sticky=0) +[sched] epoch 195: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 195 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 195: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 195: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2632117 +[sched] epoch 195: zero fragment drops (snap=0, sticky=0) +[sched] epoch 196: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 196 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 196: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 196: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=2646284 +[sched] epoch 196: zero fragment drops (snap=0, sticky=0) +[sched] epoch 197: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 197 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 197: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 197: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2660443 +[sched] epoch 197: zero fragment drops (snap=0, sticky=0) +[sched] epoch 198: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 198 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 198: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 198: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2674788 +[sched] epoch 198: zero fragment drops (snap=0, sticky=0) +[sched] epoch 199: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 199 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 199: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 199: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2688789 +[sched] epoch 199: zero fragment drops (snap=0, sticky=0) +[sched] epoch 200: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 200 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 200: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 200: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2702979 +[sched] epoch 200: zero fragment drops (snap=0, sticky=0) +[sched] epoch 201: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 201 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 201: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 201: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2717396 +[sched] epoch 201: zero fragment drops (snap=0, sticky=0) +[sched] epoch 202: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 202 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 202: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 202: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2731824 +[sched] epoch 202: zero fragment drops (snap=0, sticky=0) +[sched] epoch 203: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 203 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 203: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 203: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2746242 +[sched] epoch 203: zero fragment drops (snap=0, sticky=0) +[sched] epoch 204: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 204 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 204: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 204: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=2756500 +[sched] epoch 204: zero fragment drops (snap=0, sticky=0) +[sched] epoch 205: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 205 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 205: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 205: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2770820 +[sched] epoch 205: zero fragment drops (snap=0, sticky=0) +[sched] epoch 206: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 206 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 206: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 206: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2784780 +[sched] epoch 206: zero fragment drops (snap=0, sticky=0) +[sched] epoch 207: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 207 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 207: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 207: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2798451 +[sched] epoch 207: zero fragment drops (snap=0, sticky=0) +[sched] epoch 208: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 208 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 208: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 208: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2812875 +[sched] epoch 208: zero fragment drops (snap=0, sticky=0) +[sched] epoch 209: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 209 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 209: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 209: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=2826605 +[sched] epoch 209: zero fragment drops (snap=0, sticky=0) +[sched] epoch 210: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 210 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 210: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 210: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=2840960 +[sched] epoch 210: zero fragment drops (snap=0, sticky=0) +[sched] epoch 211: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 211 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 211: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 211: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=2854795 +[sched] epoch 211: zero fragment drops (snap=0, sticky=0) +[sched] epoch 212: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 212 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 212: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 212: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2868858 +[sched] epoch 212: zero fragment drops (snap=0, sticky=0) +[sched] epoch 213: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 213 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 213: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 213: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=2882826 +[sched] epoch 213: zero fragment drops (snap=0, sticky=0) +[sched] epoch 214: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 214 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 214: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 214: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2896904 +[sched] epoch 214: zero fragment drops (snap=0, sticky=0) +[sched] epoch 215: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 215 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 215: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 215: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2911323 +[sched] epoch 215: zero fragment drops (snap=0, sticky=0) +[sched] epoch 216: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 216 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 216: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 216: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2925374 +[sched] epoch 216: zero fragment drops (snap=0, sticky=0) +[sched] epoch 217: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 217 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 217: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 217: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2939349 +[sched] epoch 217: zero fragment drops (snap=0, sticky=0) +[sched] epoch 218: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 218 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 218: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 218: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=2953766 +[sched] epoch 218: zero fragment drops (snap=0, sticky=0) +[sched] epoch 219: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 219 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 219: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 219: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2968170 +[sched] epoch 219: zero fragment drops (snap=0, sticky=0) +[sched] epoch 220: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 220 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 220: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 220: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2982475 +[sched] epoch 220: zero fragment drops (snap=0, sticky=0) +[sched] epoch 221: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 221 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 221: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 221: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2996423 +[sched] epoch 221: zero fragment drops (snap=0, sticky=0) +[sched] epoch 222: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 222 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 222: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 222: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3010476 +[sched] epoch 222: zero fragment drops (snap=0, sticky=0) +[sched] epoch 223: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 223 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 223: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 223: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=3024367 +[sched] epoch 223: zero fragment drops (snap=0, sticky=0) +[sched] epoch 224: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 224 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 224: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 224: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=3038564 +[sched] epoch 224: zero fragment drops (snap=0, sticky=0) +[sched] epoch 225: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 225 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 225: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 225: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3052831 +[sched] epoch 225: zero fragment drops (snap=0, sticky=0) +[sched] epoch 226: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 226 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 226: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 226: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3067157 +[sched] epoch 226: zero fragment drops (snap=0, sticky=0) +[sched] epoch 227: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 227 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 227: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 227: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3081472 +[sched] epoch 227: zero fragment drops (snap=0, sticky=0) +[sched] epoch 228: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 228 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 228: streamed 431 words, staged_addr=431 (exp 431, < 4096) +[sched] epoch 228: GO -> fresh drain frame_drained=1, records=47 (exp 47), FB beats=3095905 +[sched] epoch 228: zero fragment drops (snap=0, sticky=0) +[sched] epoch 229: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 229 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 229: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 229: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3110161 +[sched] epoch 229: zero fragment drops (snap=0, sticky=0) +[sched] epoch 230: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 230 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 230: streamed 710 words, staged_addr=710 (exp 710, < 4096) +[sched] epoch 230: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=3124421 +[sched] epoch 230: zero fragment drops (snap=0, sticky=0) +[sched] epoch 231: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 231 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 231: streamed 575 words, staged_addr=575 (exp 575, < 4096) +[sched] epoch 231: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=3138417 +[sched] epoch 231: zero fragment drops (snap=0, sticky=0) +[sched] epoch 232: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 232 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 232: streamed 602 words, staged_addr=602 (exp 602, < 4096) +[sched] epoch 232: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=3152670 +[sched] epoch 232: zero fragment drops (snap=0, sticky=0) +[sched] epoch 233: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 233 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 233: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 233: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=3166844 +[sched] epoch 233: zero fragment drops (snap=0, sticky=0) +[sched] epoch 234: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 234 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 234: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 234: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3181082 +[sched] epoch 234: zero fragment drops (snap=0, sticky=0) +[sched] epoch 235: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 235 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 235: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 235: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3195439 +[sched] epoch 235: zero fragment drops (snap=0, sticky=0) +[sched] epoch 236: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 236 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 236: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 236: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=3209835 +[sched] epoch 236: zero fragment drops (snap=0, sticky=0) +[sched] epoch 237: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 237 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 237: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 237: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3224225 +[sched] epoch 237: zero fragment drops (snap=0, sticky=0) +[sched] epoch 238: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 238 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 238: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 238: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3231409 +[sched] epoch 238: zero fragment drops (snap=0, sticky=0) +[sched] epoch 239: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 239 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 239: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 239: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3245841 +[sched] epoch 239: zero fragment drops (snap=0, sticky=0) +[sched] epoch 240: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 240 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 240: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 240: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3260227 +[sched] epoch 240: zero fragment drops (snap=0, sticky=0) +[sched] epoch 241: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 241 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 241: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 241: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=3274117 +[sched] epoch 241: zero fragment drops (snap=0, sticky=0) +[sched] epoch 242: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 242 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 242: streamed 413 words, staged_addr=413 (exp 413, < 4096) +[sched] epoch 242: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=3288491 +[sched] epoch 242: zero fragment drops (snap=0, sticky=0) +[sched] epoch 243: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 243 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 243: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 243: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=3302455 +[sched] epoch 243: zero fragment drops (snap=0, sticky=0) +[sched] epoch 244: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 244 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 244: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 244: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3316856 +[sched] epoch 244: zero fragment drops (snap=0, sticky=0) +[sched] epoch 245: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 245 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 245: streamed 422 words, staged_addr=422 (exp 422, < 4096) +[sched] epoch 245: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=3330681 +[sched] epoch 245: zero fragment drops (snap=0, sticky=0) +[sched] epoch 246: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 246 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 246: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 246: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3344946 +[sched] epoch 246: zero fragment drops (snap=0, sticky=0) +[sched] epoch 247: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 247 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 247: streamed 377 words, staged_addr=377 (exp 377, < 4096) +[sched] epoch 247: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=3358844 +[sched] epoch 247: zero fragment drops (snap=0, sticky=0) +[sched] epoch 248: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 248 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 248: streamed 494 words, staged_addr=494 (exp 494, < 4096) +[sched] epoch 248: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=3373256 +[sched] epoch 248: zero fragment drops (snap=0, sticky=0) +[sched] epoch 249: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 249 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 249: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 249: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=3387546 +[sched] epoch 249: zero fragment drops (snap=0, sticky=0) +[sched] epoch 250: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 250 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 250: streamed 395 words, staged_addr=395 (exp 395, < 4096) +[sched] epoch 250: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=3401885 +[sched] epoch 250: zero fragment drops (snap=0, sticky=0) +[sched] epoch 251: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 251 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 251: streamed 692 words, staged_addr=692 (exp 692, < 4096) +[sched] epoch 251: GO -> fresh drain frame_drained=1, records=76 (exp 76), FB beats=3415762 +[sched] epoch 251: zero fragment drops (snap=0, sticky=0) +[sched] epoch 252: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 252 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 252: streamed 665 words, staged_addr=665 (exp 665, < 4096) +[sched] epoch 252: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=3429940 +[sched] epoch 252: zero fragment drops (snap=0, sticky=0) +[sched] epoch 253: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 253 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 253: streamed 512 words, staged_addr=512 (exp 512, < 4096) +[sched] epoch 253: GO -> fresh drain frame_drained=1, records=56 (exp 56), FB beats=3444323 +[sched] epoch 253: zero fragment drops (snap=0, sticky=0) +[sched] epoch 254: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 254 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 254: streamed 620 words, staged_addr=620 (exp 620, < 4096) +[sched] epoch 254: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=3458346 +[sched] epoch 254: zero fragment drops (snap=0, sticky=0) +[sched] epoch 255: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 255 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 255: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 255: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=3472330 +[sched] epoch 255: zero fragment drops (snap=0, sticky=0) +[sched] epoch 256: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 256 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 256: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 256: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3486490 +[sched] epoch 256: zero fragment drops (snap=0, sticky=0) +[sched] epoch 257: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 257 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 257: streamed 449 words, staged_addr=449 (exp 449, < 4096) +[sched] epoch 257: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=3500660 +[sched] epoch 257: zero fragment drops (snap=0, sticky=0) +[sched] epoch 258: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 258 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 258: streamed 503 words, staged_addr=503 (exp 503, < 4096) +[sched] epoch 258: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=3514670 +[sched] epoch 258: zero fragment drops (snap=0, sticky=0) +[sched] epoch 259: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 259 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 259: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 259: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3528444 +[sched] epoch 259: zero fragment drops (snap=0, sticky=0) +[sched] epoch 260: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 260 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 260: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 260: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=3542647 +[sched] epoch 260: zero fragment drops (snap=0, sticky=0) +[sched] epoch 261: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 261 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 261: streamed 584 words, staged_addr=584 (exp 584, < 4096) +[sched] epoch 261: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=3556599 +[sched] epoch 261: zero fragment drops (snap=0, sticky=0) +[sched] epoch 262: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 262 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 262: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 262: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3570687 +[sched] epoch 262: zero fragment drops (snap=0, sticky=0) +[sched] epoch 263: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 263 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 263: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 263: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3584795 +[sched] epoch 263: zero fragment drops (snap=0, sticky=0) +[sched] epoch 264: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 264 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 264: streamed 539 words, staged_addr=539 (exp 539, < 4096) +[sched] epoch 264: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=3599231 +[sched] epoch 264: zero fragment drops (snap=0, sticky=0) +[sched] epoch 265: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 265 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 265: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 265: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=3613461 +[sched] epoch 265: zero fragment drops (snap=0, sticky=0) +[sched] epoch 266: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 266 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 266: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 266: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=3627706 +[sched] epoch 266: zero fragment drops (snap=0, sticky=0) +[sched] epoch 267: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 267 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 267: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 267: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=3641623 +[sched] epoch 267: zero fragment drops (snap=0, sticky=0) +[sched] epoch 268: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 268 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 268: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 268: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3655699 +[sched] epoch 268: zero fragment drops (snap=0, sticky=0) +[sched] epoch 269: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 269 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 269: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 269: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=3669937 +[sched] epoch 269: zero fragment drops (snap=0, sticky=0) +[sched] epoch 270: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 270 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 270: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 270: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3683955 +[sched] epoch 270: zero fragment drops (snap=0, sticky=0) +[sched] epoch 271: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 271 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 271: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 271: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=3697513 +[sched] epoch 271: zero fragment drops (snap=0, sticky=0) +[sched] epoch 272: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 272 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 272: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 272: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3711672 +[sched] epoch 272: zero fragment drops (snap=0, sticky=0) +[sched] epoch 273: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 273 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 273: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 273: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=3725961 +[sched] epoch 273: zero fragment drops (snap=0, sticky=0) +[sched] epoch 274: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 274 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 274: streamed 287 words, staged_addr=287 (exp 287, < 4096) +[sched] epoch 274: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=3740272 +[sched] epoch 274: zero fragment drops (snap=0, sticky=0) +[sched] epoch 275: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 275 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 275: streamed 350 words, staged_addr=350 (exp 350, < 4096) +[sched] epoch 275: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=3754573 +[sched] epoch 275: zero fragment drops (snap=0, sticky=0) +[sched] epoch 276: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 276 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 276: streamed 233 words, staged_addr=233 (exp 233, < 4096) +[sched] epoch 276: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=3768429 +[sched] epoch 276: zero fragment drops (snap=0, sticky=0) +[sched] epoch 277: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 277 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 277: streamed 467 words, staged_addr=467 (exp 467, < 4096) +[sched] epoch 277: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=3782150 +[sched] epoch 277: zero fragment drops (snap=0, sticky=0) +[sched] epoch 278: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 278 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 278: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 278: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=3795405 +[sched] epoch 278: zero fragment drops (snap=0, sticky=0) +[sched] epoch 279: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 279 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 279: streamed 323 words, staged_addr=323 (exp 323, < 4096) +[sched] epoch 279: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=3809514 +[sched] epoch 279: zero fragment drops (snap=0, sticky=0) +[sched] epoch 280: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 280 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 280: streamed 647 words, staged_addr=647 (exp 647, < 4096) +[sched] epoch 280: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=3823385 +[sched] epoch 280: zero fragment drops (snap=0, sticky=0) +[sched] epoch 281: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 281 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 281: streamed 332 words, staged_addr=332 (exp 332, < 4096) +[sched] epoch 281: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=3837672 +[sched] epoch 281: zero fragment drops (snap=0, sticky=0) +[sched] epoch 282: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 282 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 282: streamed 476 words, staged_addr=476 (exp 476, < 4096) +[sched] epoch 282: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=3852089 +[sched] epoch 282: zero fragment drops (snap=0, sticky=0) +[sched] epoch 283: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 283 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 283: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 283: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=3866007 +[sched] epoch 283: zero fragment drops (snap=0, sticky=0) +[sched] epoch 284: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 284 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 284: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 284: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3880330 +[sched] epoch 284: zero fragment drops (snap=0, sticky=0) +[sched] epoch 285: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 285 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 285: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 285: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3894740 +[sched] epoch 285: zero fragment drops (snap=0, sticky=0) +[sched] epoch 286: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 286 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 286: streamed 611 words, staged_addr=611 (exp 611, < 4096) +[sched] epoch 286: GO -> fresh drain frame_drained=1, records=67 (exp 67), FB beats=3908597 +[sched] epoch 286: zero fragment drops (snap=0, sticky=0) +[sched] epoch 287: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 287 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 287: streamed 359 words, staged_addr=359 (exp 359, < 4096) +[sched] epoch 287: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=3922732 +[sched] epoch 287: zero fragment drops (snap=0, sticky=0) +[sched] epoch 288: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 288 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 288: streamed 458 words, staged_addr=458 (exp 458, < 4096) +[sched] epoch 288: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=3936558 +[sched] epoch 288: zero fragment drops (snap=0, sticky=0) +[sched] epoch 289: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 289 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 289: streamed 386 words, staged_addr=386 (exp 386, < 4096) +[sched] epoch 289: GO -> fresh drain frame_drained=1, records=42 (exp 42), FB beats=3950363 +[sched] epoch 289: zero fragment drops (snap=0, sticky=0) +[sched] epoch 290: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 290 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 290: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 290: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3963314 +[sched] epoch 290: zero fragment drops (snap=0, sticky=0) +[sched] epoch 291: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 291 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 291: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 291: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=3977443 +[sched] epoch 291: zero fragment drops (snap=0, sticky=0) +[sched] epoch 292: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 292 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 292: streamed 404 words, staged_addr=404 (exp 404, < 4096) +[sched] epoch 292: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=3991808 +[sched] epoch 292: zero fragment drops (snap=0, sticky=0) +[sched] epoch 293: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 293 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 293: streamed 440 words, staged_addr=440 (exp 440, < 4096) +[sched] epoch 293: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=4006253 +[sched] epoch 293: zero fragment drops (snap=0, sticky=0) +[sched] epoch 294: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 294 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 294: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 294: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4020115 +[sched] epoch 294: zero fragment drops (snap=0, sticky=0) +[sched] epoch 295: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 295 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 295: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 295: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=4034004 +[sched] epoch 295: zero fragment drops (snap=0, sticky=0) +[sched] epoch 296: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 296 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 296: streamed 224 words, staged_addr=224 (exp 224, < 4096) +[sched] epoch 296: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=4048249 +[sched] epoch 296: zero fragment drops (snap=0, sticky=0) +[sched] epoch 297: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 297 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 297: streamed 368 words, staged_addr=368 (exp 368, < 4096) +[sched] epoch 297: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=4062430 +[sched] epoch 297: zero fragment drops (snap=0, sticky=0) +[sched] epoch 298: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 298 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 298: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 298: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=4076667 +[sched] epoch 298: zero fragment drops (snap=0, sticky=0) +[sched] epoch 299: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 299 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 299: streamed 341 words, staged_addr=341 (exp 341, < 4096) +[sched] epoch 299: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=4091085 +[sched] epoch 299: zero fragment drops (snap=0, sticky=0) +[sched] epoch 300: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 300 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 300: streamed 314 words, staged_addr=314 (exp 314, < 4096) +[sched] epoch 300: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=4105318 +[sched] epoch 300: zero fragment drops (snap=0, sticky=0) +[sched] epoch 301: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 301 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 301: streamed 278 words, staged_addr=278 (exp 278, < 4096) +[sched] epoch 301: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=4119377 +[sched] epoch 301: zero fragment drops (snap=0, sticky=0) +[sched] epoch 302: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 302 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 302: streamed 269 words, staged_addr=269 (exp 269, < 4096) +[sched] epoch 302: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=4133771 +[sched] epoch 302: zero fragment drops (snap=0, sticky=0) +[sched] epoch 303: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 303 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 303: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 303: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=4148091 +[sched] epoch 303: zero fragment drops (snap=0, sticky=0) +[sched] epoch 304: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 304 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 304: streamed 242 words, staged_addr=242 (exp 242, < 4096) +[sched] epoch 304: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=4161374 +[sched] epoch 304: zero fragment drops (snap=0, sticky=0) +[sched] epoch 305: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 305 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 305: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 305: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4175743 +[sched] epoch 305: zero fragment drops (snap=0, sticky=0) +[sched] epoch 306: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 306 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 306: streamed 161 words, staged_addr=161 (exp 161, < 4096) +[sched] epoch 306: GO -> fresh drain frame_drained=1, records=17 (exp 17), FB beats=4189565 +[sched] epoch 306: zero fragment drops (snap=0, sticky=0) +[sched] epoch 307: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 307 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 307: streamed 296 words, staged_addr=296 (exp 296, < 4096) +[sched] epoch 307: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=4203440 +[sched] epoch 307: zero fragment drops (snap=0, sticky=0) +[sched] epoch 308: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 308 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 308: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 308: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4217599 +[sched] epoch 308: zero fragment drops (snap=0, sticky=0) +[sched] epoch 309: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 309 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 309: streamed 251 words, staged_addr=251 (exp 251, < 4096) +[sched] epoch 309: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=4231566 +[sched] epoch 309: zero fragment drops (snap=0, sticky=0) +[sched] epoch 310: REUSE resident texture (no upload/fill): crc=0x13cfe390 (exp 0x13cfe390) beats=8192 (exp 8192) +[sched] epoch 310 pal: runtime copy sum32=0x158afe76 (exp 0x158afe76) +[sched] epoch 310: streamed 134 words, staged_addr=134 (exp 134, < 4096) +[sched] epoch 310: GO -> fresh drain frame_drained=1, records=14 (exp 14), FB beats=4235970 +[sched] epoch 310: zero fragment drops (snap=0, sticky=0) +[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f52_current_20260720_1547_board_fb.mem sum32=0xaad0b94d xor32=0x33138181 nonzero=245155 bounds=(0,0)..(511,479) FB=640x480 +[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (311-epoch composite) +[sched] DONE rc=0 (all gates passed) diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_epochs.txt new file mode 100644 index 0000000..4297a0f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_epochs.txt @@ -0,0 +1,314 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f51b@0:123', 'zsrt139f41d@0:1', 'zsrt139f35c@0:9', 'zsrt139f41d@1:2', 'zsrt139f35c@9:13', 'zsrt139f31', 'zsrt139f51b@123:125', 'zsrt139l7e', 'zsrt139f27c'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b59.mem 782 86 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b60.mem 170 18 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b61.mem 251 27 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b62.mem 323 35 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b63.mem 89 9 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b64.mem 557 61 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b65.mem 368 40 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b66.mem 647 71 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b67.mem 530 58 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b68.mem 440 48 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b69.mem 62 6 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b70.mem 1493 165 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b71.mem 1223 135 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b72.mem 1628 180 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b73.mem 224 24 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b74.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b75.mem 566 62 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b76.mem 521 57 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b77.mem 755 83 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b78.mem 1439 159 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b79.mem 953 105 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b80.mem 620 68 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b81.mem 53 5 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b82.mem 26 2 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b83.mem 179 19 0 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b84.mem 116 12 1 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b85.mem 1007 111 0 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b86.mem 287 31 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b87.mem 332 36 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b88.mem 683 75 0 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b89.mem 665 73 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b90.mem 1025 113 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b91.mem 935 103 0 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b92.mem 827 91 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b93.mem 701 77 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b94.mem 710 78 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b95.mem 404 44 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b96.mem 206 22 0 sh3_zsrt139f51b96_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b97.mem 242 26 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b98.mem 296 32 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b99.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b100.mem 44 4 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b101.mem 278 30 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b102.mem 197 21 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b103.mem 188 20 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b104.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b105.mem 107 11 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b106.mem 80 8 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b107.mem 1241 137 0 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b108.mem 1025 113 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b109.mem 737 81 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b110.mem 845 93 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b111.mem 530 58 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b112.mem 98 10 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b113.mem 287 31 0 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b114.mem 260 28 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b115.mem 368 40 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b116.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b117.mem 341 37 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b118.mem 305 33 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b119.mem 206 22 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b120.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b121.mem 602 66 0 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b122.mem 359 39 1 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d0.mem 17 1 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c0.mem 908 100 0 sh3_zsrt139f35c0_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c1.mem 665 73 1 sh3_zsrt139f35c0_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c2.mem 728 80 0 sh3_zsrt139f35c2_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c3.mem 278 30 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c4.mem 521 57 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c5.mem 125 13 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f35c6_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c6.mem 656 72 0 sh3_zsrt139f35c6_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f35c7_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c7.mem 323 35 0 sh3_zsrt139f35c7_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f35c8_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c8.mem 116 12 0 sh3_zsrt139f35c8_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d1.mem 116 12 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c9.mem 1205 133 0 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c10.mem 962 106 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c11.mem 539 59 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c12.mem 278 30 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b123.mem 341 37 0 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b124.mem 170 18 1 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e0.mem 35 3 0 sh3_zsrt139l7e0_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e1.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e2.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e3.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e4.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e5.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e6.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e7.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e8.mem 89 9 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e9.mem 476 52 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e10.mem 359 39 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e11.mem 98 10 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e12.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e13.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e14.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e15.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e16.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e17.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e18.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e19.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e20.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e21.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e22.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e23.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e24.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e25.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e26.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e27.mem 80 8 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e28.mem 278 30 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e29.mem 539 59 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e30.mem 107 11 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e31.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e32.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e33.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e34.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e35.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e36.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e37.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e38.mem 26 2 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c0.mem 467 51 0 sh3_zsrt139f27c0_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c1.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c2.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c3.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c4.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c5.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c6.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c7.mem 521 57 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c8.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c9.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c10.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c11.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c12.mem 530 58 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c13.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c14.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c15.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c16.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c17.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c18.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c19.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c20.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c21.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c22.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c23.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c24.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c25.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c26.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c27.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c28.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c29.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c30.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c31.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c32.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c33.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c34.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c35.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c36.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c37.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c38.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c39.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c40.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c41.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c42.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c43.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c44.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c45.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c46.mem 431 47 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c47.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c48.mem 710 78 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c49.mem 575 63 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c50.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c51.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c52.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c53.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c54.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c55.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c56.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c57.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c58.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c59.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c60.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c61.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c62.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c63.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c64.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c65.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c66.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c67.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c68.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c69.mem 692 76 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c70.mem 665 73 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c71.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c72.mem 620 68 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c73.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c74.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c75.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c76.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c77.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c78.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c79.mem 584 64 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c80.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c81.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c82.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c83.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c84.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c85.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c86.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c87.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c88.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c89.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c90.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c91.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c92.mem 287 31 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c93.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c94.mem 233 25 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c95.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c96.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c97.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c98.mem 647 71 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c99.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c100.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c101.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c102.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c103.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c104.mem 611 67 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c105.mem 359 39 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c106.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c107.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c108.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c109.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c110.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c111.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c112.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c113.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c114.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c115.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c116.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c117.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c118.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c119.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c120.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c121.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c122.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f53_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f53_epochs.txt new file mode 100644 index 0000000..8583b5c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f53_epochs.txt @@ -0,0 +1,131 @@ +# Ch438 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 603072 12288 480 sh3_zsrt139f530_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f530.mem 44 4 0 sh3_zsrt139f530_pal.mem 0x60778774 +1 608122 11264 480 sh3_zsrt139f531_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f531.mem 1583 175 0 sh3_zsrt139f531_pal.mem 0x32ed74c4 +2 609451 11264 480 sh3_zsrt139f531_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f532.mem 1835 203 1 sh3_zsrt139f531_pal.mem 0x32ed74c4 +3 614057 10240 480 sh3_zsrt139f533_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f533.mem 350 38 0 sh3_zsrt139f533_pal.mem 0x3cd88c98 +4 616577 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f534.mem 1322 146 0 sh3_zsrt139f534_pal.mem 0x4812d6f2 +5 616577 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f535.mem 116 12 1 sh3_zsrt139f534_pal.mem 0x4812d6f2 +6 617231 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f536.mem 629 69 1 sh3_zsrt139f534_pal.mem 0x4812d6f2 +7 621546 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f537.mem 260 28 0 sh3_zsrt139f537_pal.mem 0x5cbf8bb4 +8 622092 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f538.mem 593 65 1 sh3_zsrt139f537_pal.mem 0x5cbf8bb4 +9 622686 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f539.mem 341 37 1 sh3_zsrt139f537_pal.mem 0x5cbf8bb4 +10 631761 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5310.mem 35 3 0 sh3_zsrt139f5310_pal.mem 0x47405cb0 +11 633215 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5311.mem 350 38 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +12 634603 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5312.mem 602 66 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +13 635905 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5313.mem 944 104 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +14 637207 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5314.mem 593 65 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +15 638509 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5315.mem 728 80 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +16 639811 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5316.mem 1196 132 1 sh3_zsrt139f5310_pal.mem 0x47405cb0 +17 672448 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5317.mem 683 75 0 sh3_zsrt139f5317_pal.mem 0x43ece1ae +18 673087 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5318.mem 323 35 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +19 673726 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5319.mem 296 32 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +20 674365 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5320.mem 530 58 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +21 675004 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5321.mem 701 77 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +22 675643 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5322.mem 422 46 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +23 676282 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5323.mem 683 75 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +24 676921 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5324.mem 1070 118 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +25 677560 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5325.mem 539 59 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +26 678199 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5326.mem 674 74 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae +27 679619 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5327.mem 476 52 0 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +28 684020 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5328.mem 449 49 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +29 684623 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5329.mem 809 89 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +30 685244 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5330.mem 593 65 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +31 685865 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5331.mem 701 77 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +32 686486 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5332.mem 476 52 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +33 687107 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5333.mem 935 103 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +34 687728 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5334.mem 584 64 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +35 688349 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5335.mem 314 34 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +36 690218 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5336.mem 26 2 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +37 690848 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5337.mem 2042 226 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +38 690848 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5338.mem 1016 112 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +39 691487 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5339.mem 1808 200 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +40 691487 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5340.mem 494 54 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2 +41 692978 9216 480 sh3_zsrt139f5341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5341.mem 188 20 0 sh3_zsrt139f5341_pal.mem 0x181b2ac2 +42 715731 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5342.mem 1466 162 0 sh3_zsrt139f5342_pal.mem 0x47097d4c +43 716316 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5343.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +44 716316 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5344.mem 287 31 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +45 716955 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5345.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +46 716955 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5346.mem 395 43 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +47 717651 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5347.mem 1754 194 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +48 718350 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5348.mem 1556 172 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +49 718899 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5349.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +50 718899 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5350.mem 98 10 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +51 719538 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5351.mem 1808 200 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +52 720177 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5352.mem 1178 130 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +53 720771 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5353.mem 485 53 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +54 721410 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5354.mem 1889 209 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +55 722049 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5355.mem 1502 166 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +56 722049 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5356.mem 575 63 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +57 722688 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5357.mem 1016 112 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +58 723327 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5358.mem 872 96 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +59 723900 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5359.mem 782 86 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +60 724539 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5360.mem 161 17 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +61 725169 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5361.mem 251 27 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +62 725808 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5362.mem 323 35 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +63 726447 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5363.mem 89 9 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +64 727086 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5364.mem 557 61 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +65 727734 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5365.mem 368 40 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +66 728268 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5366.mem 647 71 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +67 728907 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5367.mem 530 58 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +68 729546 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5368.mem 431 47 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +69 730185 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5369.mem 62 6 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +70 730689 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5370.mem 1493 165 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +71 731328 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5371.mem 1214 134 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +72 731967 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5372.mem 1628 180 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +73 731967 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5373.mem 224 24 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +74 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5374.mem 485 53 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +75 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5375.mem 566 62 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +76 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5376.mem 512 56 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +77 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5377.mem 764 84 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +78 733245 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5378.mem 1439 159 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +79 733884 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5379.mem 953 105 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +80 734562 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5380.mem 620 68 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +81 734562 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5381.mem 53 5 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +82 737169 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5382.mem 26 2 1 sh3_zsrt139f5342_pal.mem 0x47097d4c +83 746190 12288 480 sh3_zsrt139f5383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f5383.mem 179 19 0 sh3_zsrt139f5383_pal.mem 0x3e849a98 +84 747012 12288 480 sh3_zsrt139f5383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f5384.mem 116 12 1 sh3_zsrt139f5383_pal.mem 0x3e849a98 +85 747505 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5385.mem 998 110 0 sh3_zsrt139f5385_pal.mem 0xfd978fd9 +86 747930 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5386.mem 287 31 1 sh3_zsrt139f5385_pal.mem 0xfd978fd9 +87 748368 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5387.mem 332 36 1 sh3_zsrt139f5385_pal.mem 0xfd978fd9 +88 748780 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5388.mem 674 74 0 sh3_zsrt139f5388_pal.mem 0xd5ed05ff +89 749188 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5389.mem 665 73 1 sh3_zsrt139f5388_pal.mem 0xd5ed05ff +90 749564 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5390.mem 980 108 1 sh3_zsrt139f5388_pal.mem 0xd5ed05ff +91 750219 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5391.mem 1016 112 0 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8 +92 750809 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5392.mem 809 89 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8 +93 751425 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5393.mem 737 81 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8 +94 752041 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5394.mem 674 74 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8 +95 752644 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5395.mem 458 50 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8 +96 753321 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5396.mem 188 20 0 sh3_zsrt139f5396_pal.mem 0xc6784386 +97 753720 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5397.mem 251 27 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +98 754106 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5398.mem 359 39 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +99 754518 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5399.mem 143 15 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +100 754943 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53100.mem 35 3 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +101 755329 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53101.mem 278 30 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +102 755728 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53102.mem 188 20 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +103 756153 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53103.mem 134 14 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +104 756565 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53104.mem 161 17 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +105 756964 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53105.mem 98 10 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +106 757363 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53106.mem 62 6 1 sh3_zsrt139f5396_pal.mem 0xc6784386 +107 757866 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53107.mem 1232 136 0 sh3_zsrt139f53107_pal.mem 0x00fd9028 +108 758573 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53108.mem 1034 114 1 sh3_zsrt139f53107_pal.mem 0x00fd9028 +109 759267 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53109.mem 755 83 1 sh3_zsrt139f53107_pal.mem 0x00fd9028 +110 759974 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53110.mem 863 95 1 sh3_zsrt139f53107_pal.mem 0x00fd9028 +111 760720 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53111.mem 503 55 1 sh3_zsrt139f53107_pal.mem 0x00fd9028 +112 761414 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53112.mem 116 12 1 sh3_zsrt139f53107_pal.mem 0x00fd9028 +113 761631 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53113.mem 269 29 0 sh3_zsrt139f53113_pal.mem 0xd8d19684 +114 762069 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53114.mem 269 29 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +115 762468 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53115.mem 314 34 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +116 762867 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53116.mem 287 31 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +117 763600 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53117.mem 332 36 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +118 764025 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53118.mem 287 31 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +119 764463 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53119.mem 215 23 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +120 764875 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53120.mem 206 22 1 sh3_zsrt139f53113_pal.mem 0xd8d19684 +121 765504 10240 480 sh3_zsrt139f53121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53121.mem 629 69 0 sh3_zsrt139f53121_pal.mem 0xaa4e7e05 +122 766250 10240 480 sh3_zsrt139f53121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53122.mem 341 37 1 sh3_zsrt139f53121_pal.mem 0xaa4e7e05 +123 777295 12288 480 sh3_zsrt139f53123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f53123.mem 386 42 0 sh3_zsrt139f53123_pal.mem 0x56ebf1d1 +124 777746 12288 480 sh3_zsrt139f53123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f53124.mem 206 22 1 sh3_zsrt139f53123_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f54_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f54_epochs.txt new file mode 100644 index 0000000..e8662f1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f54_epochs.txt @@ -0,0 +1,332 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f52', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 329 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b59.mem 782 86 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b60.mem 170 18 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b61.mem 251 27 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b62.mem 323 35 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b63.mem 89 9 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b64.mem 557 61 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b65.mem 368 40 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b66.mem 647 71 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b67.mem 530 58 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b68.mem 440 48 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b69.mem 62 6 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b70.mem 1493 165 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b71.mem 1223 135 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b72.mem 1628 180 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b73.mem 224 24 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b74.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b75.mem 566 62 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b76.mem 521 57 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b77.mem 755 83 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b78.mem 1439 159 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b79.mem 953 105 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b80.mem 620 68 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b81.mem 53 5 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b82.mem 26 2 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b83.mem 179 19 0 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b84.mem 116 12 1 sh3_zsrt139f51b83_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b85.mem 1007 111 0 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b86.mem 287 31 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b87.mem 332 36 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b88.mem 683 75 0 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b89.mem 665 73 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b90.mem 1025 113 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b91.mem 935 103 0 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b92.mem 827 91 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b93.mem 701 77 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b94.mem 710 78 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b95.mem 404 44 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b96.mem 206 22 0 sh3_zsrt139f51b96_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b97.mem 242 26 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b98.mem 296 32 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b99.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b100.mem 44 4 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b101.mem 278 30 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b102.mem 197 21 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b103.mem 188 20 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b104.mem 152 16 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b105.mem 107 11 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f51b96_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b106.mem 80 8 1 sh3_zsrt139f51b96_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b107.mem 1241 137 0 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b108.mem 1025 113 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b109.mem 737 81 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b110.mem 845 93 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b111.mem 530 58 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f51b107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b112.mem 98 10 1 sh3_zsrt139f51b107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b113.mem 287 31 0 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b114.mem 260 28 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b115.mem 368 40 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b116.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b117.mem 341 37 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b118.mem 305 33 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b119.mem 206 22 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f51b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b120.mem 242 26 1 sh3_zsrt139f51b113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b121.mem 602 66 0 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f51b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f51b122.mem 359 39 1 sh3_zsrt139f51b121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d0.mem 17 1 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c0.mem 908 100 0 sh3_zsrt139f35c0_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c1.mem 665 73 1 sh3_zsrt139f35c0_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c2.mem 728 80 0 sh3_zsrt139f35c2_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c3.mem 278 30 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c4.mem 521 57 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c5.mem 125 13 1 sh3_zsrt139f35c2_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f35c6_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c6.mem 656 72 0 sh3_zsrt139f35c6_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f35c7_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c7.mem 323 35 0 sh3_zsrt139f35c7_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f35c8_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c8.mem 116 12 0 sh3_zsrt139f35c8_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d1.mem 116 12 0 sh3_zsrt139f41d0_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c9.mem 1205 133 0 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c10.mem 962 106 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c11.mem 539 59 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c12.mem 278 30 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b123.mem 341 37 0 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b124.mem 170 18 1 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1 +143 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e0.mem 35 3 0 sh3_zsrt139l7e0_pal.mem 0x00000000 +144 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e1.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +145 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e2.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +146 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e3.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +147 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e4.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +148 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e5.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +149 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e6.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +150 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e7.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +151 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e8.mem 89 9 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +152 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e9.mem 476 52 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +153 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e10.mem 359 39 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +154 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e11.mem 98 10 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +155 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e12.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +156 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e13.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +157 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e14.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +158 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e15.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +159 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e16.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +160 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e17.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +161 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e18.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +162 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e19.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +163 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e20.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +164 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e21.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +165 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e22.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +166 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e23.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +167 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e24.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +168 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e25.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +169 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e26.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +170 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e27.mem 80 8 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +171 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e28.mem 278 30 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +172 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e29.mem 539 59 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +173 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e30.mem 107 11 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +174 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e31.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +175 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e32.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +176 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e33.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +177 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e34.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +178 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e35.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +179 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e36.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +180 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e37.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +181 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e38.mem 26 2 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +182 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c0.mem 467 51 0 sh3_zsrt139f27c0_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c1.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c2.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c3.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c4.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c5.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c6.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c7.mem 521 57 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c8.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c9.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c10.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c11.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c12.mem 530 58 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c13.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c14.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c15.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c16.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c17.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c18.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c19.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c20.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c21.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c22.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c23.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c24.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c25.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c26.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c27.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c28.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c29.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c30.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c31.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c32.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c33.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c34.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +217 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c35.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +218 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c36.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +219 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c37.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c38.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c39.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c40.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c41.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c42.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c43.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c44.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c45.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c46.mem 431 47 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c47.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c48.mem 710 78 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c49.mem 575 63 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c50.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c51.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c52.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c53.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c54.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c55.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c56.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +239 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c57.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +240 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c58.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +241 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c59.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +242 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c60.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +243 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c61.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +244 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c62.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +245 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c63.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +246 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c64.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +247 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c65.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +248 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c66.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +249 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c67.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +250 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c68.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +251 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c69.mem 692 76 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +252 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c70.mem 665 73 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +253 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c71.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +254 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c72.mem 620 68 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +255 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c73.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +256 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c74.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +257 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c75.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +258 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c76.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +259 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c77.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +260 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c78.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +261 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c79.mem 584 64 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +262 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c80.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +263 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c81.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +264 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c82.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +265 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c83.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +266 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c84.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +267 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c85.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +268 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c86.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +269 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c87.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +270 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c88.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +271 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c89.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +272 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c90.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +273 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c91.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +274 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c92.mem 287 31 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +275 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c93.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +276 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c94.mem 233 25 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +277 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c95.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +278 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c96.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +279 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c97.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +280 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c98.mem 647 71 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +281 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c99.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +282 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c100.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +283 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c101.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +284 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c102.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +285 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c103.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +286 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c104.mem 611 67 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +287 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c105.mem 359 39 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +288 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c106.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +289 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c107.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +290 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c108.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +291 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c109.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +292 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c110.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +293 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c111.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +294 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c112.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +295 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c113.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +296 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c114.mem 224 24 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +297 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c115.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +298 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c116.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +299 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c117.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +300 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c118.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +301 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c119.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +302 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c120.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +303 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c121.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +304 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c122.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +305 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +306 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +307 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +308 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +309 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +310 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76 +311 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +312 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +313 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +314 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +315 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +316 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +317 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +318 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +319 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +320 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +321 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +322 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +323 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +324 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +325 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +326 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +327 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +328 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5_epochs.txt new file mode 100644 index 0000000..7f4431a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5_epochs.txt @@ -0,0 +1,130 @@ +# Ch410 epoch descriptor table (124 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p124_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p124_epochs.txt new file mode 100644 index 0000000..453aed1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p124_epochs.txt @@ -0,0 +1,127 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:62', 'zsrt139f5@62:124'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p32_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p32_epochs.txt new file mode 100644 index 0000000..b5655d1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p32_epochs.txt @@ -0,0 +1,35 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:16', 'zsrt139f5@16:32'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 32 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p64_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p64_epochs.txt new file mode 100644 index 0000000..3d5da2f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p64_epochs.txt @@ -0,0 +1,67 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:32', 'zsrt139f5@32:64'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 64 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p69_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p69_epochs.txt new file mode 100644 index 0000000..df95787 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p69_epochs.txt @@ -0,0 +1,72 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:34', 'zsrt139f5@34:69'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 69 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p70_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p70_epochs.txt new file mode 100644 index 0000000..4cfbaf2 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p70_epochs.txt @@ -0,0 +1,73 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:35', 'zsrt139f5@35:70'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 70 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p71_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p71_epochs.txt new file mode 100644 index 0000000..37c81bf --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p71_epochs.txt @@ -0,0 +1,74 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:35', 'zsrt139f5@35:71'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 71 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p73_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p73_epochs.txt new file mode 100644 index 0000000..7bc7a9b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p73_epochs.txt @@ -0,0 +1,76 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:36', 'zsrt139f5@36:73'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 73 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p77_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p77_epochs.txt new file mode 100644 index 0000000..1ea16ea --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p77_epochs.txt @@ -0,0 +1,80 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:38', 'zsrt139f5@38:77'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 77 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p79_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p79_epochs.txt new file mode 100644 index 0000000..062302e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p79_epochs.txt @@ -0,0 +1,82 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:39', 'zsrt139f5@39:79'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 79 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p82_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p82_epochs.txt new file mode 100644 index 0000000..e5a8248 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p82_epochs.txt @@ -0,0 +1,85 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:41', 'zsrt139f5@41:82'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 82 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p84_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p84_epochs.txt new file mode 100644 index 0000000..0db70c7 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p84_epochs.txt @@ -0,0 +1,87 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:42', 'zsrt139f5@42:84'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 84 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p90_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p90_epochs.txt new file mode 100644 index 0000000..a4aa4d0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p90_epochs.txt @@ -0,0 +1,93 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:45', 'zsrt139f5@45:90'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 90 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p96_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p96_epochs.txt new file mode 100644 index 0000000..d602cef --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f5p96_epochs.txt @@ -0,0 +1,99 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:48', 'zsrt139f5@48:96'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 96 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6_epochs.txt new file mode 100644 index 0000000..30bcb4d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6_epochs.txt @@ -0,0 +1,360 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5', 'zsrt139f6a'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 357 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a0.mem 17 1 0 sh3_zsrt139f6a0_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a1.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a2.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a3.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a4.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a5.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a6.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a7.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a8.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a9.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a10.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a11.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a12.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a13.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a14.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a15.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a16.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a17.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a18.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a19.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a20.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a21.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a22.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a23.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a24.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a25.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a26.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a27.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a28.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a29.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a30.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a31.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a32.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a33.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a34.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a35.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a36.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a37.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a38.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a39.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a40.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a41.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a42.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a43.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a44.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a45.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a46.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a47.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a48.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a49.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a50.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a51.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a52.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a53.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a54.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a55.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a56.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a57.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a58.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a59.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a60.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a61.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a62.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a63.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a64.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a65.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a66.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a67.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a68.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a69.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a70.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a71.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a72.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a73.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a74.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a75.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a76.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a77.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a78.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a79.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a80.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +205 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a81.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +206 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a82.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +207 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a83.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +208 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a84.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +209 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a85.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +210 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a86.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +211 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a87.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +212 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a88.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +213 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a89.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +214 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a90.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +215 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a91.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +216 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a92.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +217 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a93.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +218 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a94.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +219 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a95.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a96.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a97.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a98.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a99.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a100.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a101.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a102.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a103.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a104.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a105.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a106.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a107.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a108.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a109.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a110.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a111.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a112.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a113.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a114.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +239 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a115.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +240 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a116.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a117.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a118.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a119.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a120.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a121.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a122.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a123.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a124.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a125.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a126.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a127.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a128.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a129.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a130.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a131.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a132.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a133.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a134.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a135.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a136.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a137.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a138.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a139.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a140.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a141.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a142.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a143.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a144.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +269 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a145.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +270 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a146.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +271 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a147.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +272 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a148.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +273 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a149.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +274 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a150.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +275 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a151.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +276 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a152.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +277 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a153.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +278 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a154.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +279 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a155.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +280 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a156.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +281 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a157.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +282 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a158.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +283 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a159.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +284 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a160.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +285 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a161.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +286 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a162.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +287 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a163.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +288 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a164.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +289 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a165.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +290 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a166.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +291 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a167.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +292 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a168.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +293 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a169.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +294 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a170.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +295 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a171.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +296 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a172.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +297 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a173.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +298 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a174.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +299 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a175.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +300 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a176.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +301 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a177.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +302 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a178.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +303 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a179.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +304 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a180.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +305 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a181.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +306 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a182.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +307 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a183.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +308 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a184.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +309 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a185.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +310 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a186.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +311 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a187.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +312 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a188.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +313 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a189.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +314 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a190.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +315 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a191.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +316 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a192.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +317 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a193.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +318 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a194.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +319 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a195.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +320 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a196.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +321 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a197.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +322 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a198.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +323 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a199.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +324 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a200.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +325 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a201.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +326 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a202.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +327 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a203.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +328 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a204.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +329 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a205.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +330 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a206.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +331 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a207.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +332 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a208.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +333 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a209.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +334 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a210.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +335 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a211.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +336 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a212.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +337 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a213.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +338 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a214.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +339 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a215.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +340 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a216.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a217.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a218.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +343 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a219.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +344 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a220.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +345 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a221.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +346 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a222.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +347 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a223.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +348 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a224.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +349 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a225.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +350 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a226.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +351 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a227.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +352 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a228.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +353 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a229.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +354 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a230.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +355 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a231.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +356 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a232.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6a_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6a_epochs.txt new file mode 100644 index 0000000..2455394 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6a_epochs.txt @@ -0,0 +1,239 @@ +# Ch411 epoch descriptor table (233 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 233 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a0.mem 17 1 0 sh3_zsrt139f6a0_pal.mem 0x158afe76 +1 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a1.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +2 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a2.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +3 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a3.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +4 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a4.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +5 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a5.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +6 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a6.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +7 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a7.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +8 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a8.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +9 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a9.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +10 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a10.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +11 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a11.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +12 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a12.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +13 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a13.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +14 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a14.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +15 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a15.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +16 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a16.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +17 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a17.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +18 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a18.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +19 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a19.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +20 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a20.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +21 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a21.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +22 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a22.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +23 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a23.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +24 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a24.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +25 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a25.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +26 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a26.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +27 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a27.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +28 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a28.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +29 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a29.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +30 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a30.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +31 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a31.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +32 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a32.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +33 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a33.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +34 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a34.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +35 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a35.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +36 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a36.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +37 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a37.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +38 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a38.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +39 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a39.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +40 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a40.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +41 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a41.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +42 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a42.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +43 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a43.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +44 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a44.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +45 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a45.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +46 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a46.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +47 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a47.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +48 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a48.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +49 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a49.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +50 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a50.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +51 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a51.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +52 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a52.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +53 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a53.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +54 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a54.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +55 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a55.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +56 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a56.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +57 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a57.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +58 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a58.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +59 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a59.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +60 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a60.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +61 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a61.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +62 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a62.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +63 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a63.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +64 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a64.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +65 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a65.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +66 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a66.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +67 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a67.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +68 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a68.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +69 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a69.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +70 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a70.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +71 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a71.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +72 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a72.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +73 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a73.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +74 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a74.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +75 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a75.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +76 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a76.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +77 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a77.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +78 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a78.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +79 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a79.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +80 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a80.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +81 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a81.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +82 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a82.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +83 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a83.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +84 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a84.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +85 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a85.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +86 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a86.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +87 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a87.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +88 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a88.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +89 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a89.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +90 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a90.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +91 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a91.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +92 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a92.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +93 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a93.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +94 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a94.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +95 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a95.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +96 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a96.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +97 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a97.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +98 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a98.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +99 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a99.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +100 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a100.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +101 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a101.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +102 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a102.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +103 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a103.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +104 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a104.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +105 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a105.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +106 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a106.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +107 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a107.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +108 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a108.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +109 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a109.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +110 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a110.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +111 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a111.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +112 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a112.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +113 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a113.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +114 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a114.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +115 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a115.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +116 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a116.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +117 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a117.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +118 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a118.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +119 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a119.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +120 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a120.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +121 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a121.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +122 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a122.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +123 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a123.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +124 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a124.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +125 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a125.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +126 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a126.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +127 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a127.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +128 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a128.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +129 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a129.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +130 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a130.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +131 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a131.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +132 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a132.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +133 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a133.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +134 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a134.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +135 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a135.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +136 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a136.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +137 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a137.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +138 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a138.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +139 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a139.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +140 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a140.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +141 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a141.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +142 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a142.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +143 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a143.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +144 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a144.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +145 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a145.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +146 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a146.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +147 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a147.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +148 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a148.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +149 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a149.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +150 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a150.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +151 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a151.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +152 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a152.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +153 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a153.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +154 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a154.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +155 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a155.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +156 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a156.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +157 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a157.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +158 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a158.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +159 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a159.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +160 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a160.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +161 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a161.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +162 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a162.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +163 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a163.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +164 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a164.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +165 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a165.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +166 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a166.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +167 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a167.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +168 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a168.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +169 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a169.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +170 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a170.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +171 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a171.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +172 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a172.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +173 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a173.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +174 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a174.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +175 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a175.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +176 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a176.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +177 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a177.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +178 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a178.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +179 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a179.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +180 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a180.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +181 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a181.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +182 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a182.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +183 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a183.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +184 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a184.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +185 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a185.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +186 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a186.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +187 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a187.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +188 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a188.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +189 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a189.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +190 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a190.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +191 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a191.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +192 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a192.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +193 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a193.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +194 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a194.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +195 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a195.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +196 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a196.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +197 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a197.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +198 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a198.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +199 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a199.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +200 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a200.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +201 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a201.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +202 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a202.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +203 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a203.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +204 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a204.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +205 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a205.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +206 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a206.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +207 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a207.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +208 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a208.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +209 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a209.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +210 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a210.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +211 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a211.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +212 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a212.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +213 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a213.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +214 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a214.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +215 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a215.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +216 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a216.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +217 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a217.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +218 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a218.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +219 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a219.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +220 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a220.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +221 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a221.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +222 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a222.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +223 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a223.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +224 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a224.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +225 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a225.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +226 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a226.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +227 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a227.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +228 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a228.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +229 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a229.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +230 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a230.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +231 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a231.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +232 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a232.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6b_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6b_epochs.txt new file mode 100644 index 0000000..dad2f5e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f6b_epochs.txt @@ -0,0 +1,357 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5', 'zsrt139f6a@0:193', 'zsrt139f6a@194:197', 'zsrt139f6a@199:233'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 354 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a0.mem 17 1 0 sh3_zsrt139f6a0_pal.mem 0x158afe76 +125 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a1.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +126 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a2.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +127 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a3.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +128 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a4.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +129 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a5.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +130 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a6.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +131 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a7.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +132 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a8.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +133 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a9.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +134 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a10.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +135 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a11.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +136 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a12.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +137 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a13.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +138 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a14.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +139 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a15.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +140 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a16.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +141 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a17.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +142 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a18.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +143 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a19.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +144 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a20.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +145 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a21.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +146 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a22.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +147 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a23.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +148 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a24.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +149 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a25.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +150 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a26.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +151 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a27.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +152 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a28.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +153 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a29.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +154 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a30.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +155 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a31.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +156 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a32.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +157 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a33.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +158 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a34.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +159 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a35.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +160 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a36.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +161 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a37.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +162 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a38.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +163 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a39.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +164 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a40.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +165 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a41.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +166 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a42.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +167 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a43.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +168 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a44.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +169 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a45.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +170 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a46.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +171 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a47.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +172 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a48.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +173 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a49.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +174 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a50.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +175 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a51.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +176 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a52.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +177 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a53.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +178 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a54.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +179 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a55.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +180 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a56.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +181 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a57.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +182 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a58.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +183 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a59.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +184 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a60.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +185 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a61.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +186 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a62.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +187 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a63.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +188 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a64.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +189 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a65.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +190 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a66.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +191 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a67.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +192 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a68.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +193 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a69.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +194 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a70.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +195 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a71.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +196 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a72.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +197 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a73.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +198 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a74.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +199 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a75.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +200 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a76.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +201 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a77.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +202 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a78.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +203 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a79.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +204 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a80.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +205 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a81.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +206 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a82.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +207 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a83.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +208 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a84.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +209 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a85.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +210 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a86.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +211 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a87.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +212 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a88.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +213 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a89.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +214 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a90.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +215 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a91.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +216 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a92.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +217 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a93.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +218 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a94.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +219 196494 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a95.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +220 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a96.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +221 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a97.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +222 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a98.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +223 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a99.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +224 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a100.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +225 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a101.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +226 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a102.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +227 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a103.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +228 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a104.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +229 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a105.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +230 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a106.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +231 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a107.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +232 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a108.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +233 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a109.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +234 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a110.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +235 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a111.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +236 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a112.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +237 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a113.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +238 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a114.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +239 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a115.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +240 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a116.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +241 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a117.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +242 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a118.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +243 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a119.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +244 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a120.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +245 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a121.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +246 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a122.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +247 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a123.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +248 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a124.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +249 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a125.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +250 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a126.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +251 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a127.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +252 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a128.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +253 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a129.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +254 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a130.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +255 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a131.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +256 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a132.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +257 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a133.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +258 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a134.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +259 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a135.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +260 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a136.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +261 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a137.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +262 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a138.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +263 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a139.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +264 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a140.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +265 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a141.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +266 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a142.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +267 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a143.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +268 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a144.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +269 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a145.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +270 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a146.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +271 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a147.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +272 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a148.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +273 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a149.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +274 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a150.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +275 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a151.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +276 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a152.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +277 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a153.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +278 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a154.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +279 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a155.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +280 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a156.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +281 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a157.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +282 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a158.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +283 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a159.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +284 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a160.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +285 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a161.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +286 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a162.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +287 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a163.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +288 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a164.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +289 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a165.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +290 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a166.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +291 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a167.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +292 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a168.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +293 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a169.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +294 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a170.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +295 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a171.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +296 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a172.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +297 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a173.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +298 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a174.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +299 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a175.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +300 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a176.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +301 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a177.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +302 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a178.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +303 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a179.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +304 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a180.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +305 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a181.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +306 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a182.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +307 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a183.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +308 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a184.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +309 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a185.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +310 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a186.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +311 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a187.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +312 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a188.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +313 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a189.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +314 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a190.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +315 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a191.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +316 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a192.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +317 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a194.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +318 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a195.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +319 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a196.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +320 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a199.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +321 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a200.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +322 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a201.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +323 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a202.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +324 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a203.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +325 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a204.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +326 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a205.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +327 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a206.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +328 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a207.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +329 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a208.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +330 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a209.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +331 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a210.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +332 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a211.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +333 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a212.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +334 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a213.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +335 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a214.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +336 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a215.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +337 196868 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a216.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +338 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a217.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +339 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a218.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +340 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a219.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +341 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a220.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +342 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a221.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +343 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a222.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +344 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a223.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +345 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a224.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +346 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a225.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +347 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a226.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +348 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a227.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +349 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a228.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +350 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a229.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +351 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a230.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +352 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a231.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 +353 197327 10240 480 sh3_zsrt139f6a0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f6a232.mem 17 1 1 sh3_zsrt139f6a0_pal.mem 0x158afe76 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f7_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f7_epochs.txt new file mode 100644 index 0000000..a1b445a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f7_epochs.txt @@ -0,0 +1,145 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5', 'zsrt139e1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 142 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f573.mem 485 53 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f574.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f575.mem 521 57 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f576.mem 683 75 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +83 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +85 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +88 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +96 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +121 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +123 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0 +125 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0 +126 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0 +127 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0 +128 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0 +129 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0 +130 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0 +131 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0 +132 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0 +133 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0 +134 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0 +135 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0 +136 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0 +137 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0 +138 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0 +139 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0 +140 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0 +141 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f8_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f8_epochs.txt new file mode 100644 index 0000000..8601266 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f8_epochs.txt @@ -0,0 +1,123 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:73', 'zsrt139f5@77:124'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 120 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +74 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +75 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +76 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +77 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +78 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +79 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +80 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +81 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +82 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +83 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +84 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +85 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +86 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +87 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +88 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +89 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +90 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +91 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +92 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +93 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +94 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +95 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +96 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +97 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +103 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +104 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +105 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +106 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +107 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +109 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +110 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +111 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +112 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +113 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +117 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +118 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +119 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9_epochs.txt new file mode 100644 index 0000000..7712962 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9_epochs.txt @@ -0,0 +1,128 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:73', 'zsrt139f9g', 'zsrt139f5@77:124'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c +50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c +51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c +52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c +53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c +54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c +56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c +57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c +58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c +59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c +60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c +61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c +62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c +65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c +66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c +67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c +68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c +69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c +70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c +71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c +73 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g0.mem 485 53 0 sh3_zsrt139f9g0_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g1.mem 557 61 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g2.mem 143 15 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +76 131519 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g3.mem 575 63 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +77 131519 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g4.mem 494 54 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05 +123 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 +124 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9g_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9g_epochs.txt new file mode 100644 index 0000000..b120028 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139f9g_epochs.txt @@ -0,0 +1,11 @@ +# Ch412 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g0.mem 485 53 0 sh3_zsrt139f9g0_pal.mem 0x47097d4c +1 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g1.mem 557 61 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +2 131306 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g2.mem 143 15 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +3 131519 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g3.mem 575 63 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c +4 131519 8192 480 sh3_zsrt139f9g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f9g4.mem 494 54 1 sh3_zsrt139f9g0_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1_epochs.txt new file mode 100644 index 0000000..dc9bf15 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1_epochs.txt @@ -0,0 +1,662 @@ +# Ch434 epoch descriptor table (656 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 656 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l10.mem 35 3 0 sh3_zsrt139l10_pal.mem 0x00000000 +1 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l11.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +2 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l12.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +3 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l13.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +4 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l14.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +5 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l15.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +6 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l16.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +7 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l17.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +8 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l18.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +9 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l19.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +10 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l110.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +11 177272 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l111.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +12 177291 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l112.mem 413 45 1 sh3_zsrt139l10_pal.mem 0x00000000 +13 177291 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l113.mem 557 61 1 sh3_zsrt139l10_pal.mem 0x00000000 +14 177331 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l114.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +15 177350 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l115.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +16 177364 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l116.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +17 177397 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l117.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +18 177638 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l118.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +19 177671 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l119.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +20 177690 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l120.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +21 177704 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l121.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +22 177723 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l122.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +23 177737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l123.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +24 177756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l124.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +25 177756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l125.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +26 177763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l126.mem 629 69 1 sh3_zsrt139l10_pal.mem 0x00000000 +27 177763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l127.mem 836 92 1 sh3_zsrt139l10_pal.mem 0x00000000 +28 177803 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l128.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +29 177810 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l129.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +30 177822 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l130.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +31 177836 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l131.mem 350 38 1 sh3_zsrt139l10_pal.mem 0x00000000 +32 177855 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l132.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +33 177862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l133.mem 521 57 1 sh3_zsrt139l10_pal.mem 0x00000000 +34 177895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l134.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +35 177909 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l135.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +36 177928 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l136.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +37 178041 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l137.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +38 178067 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l138.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +39 178099 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l139.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +40 178138 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l140.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +41 178152 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l141.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +42 178191 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l142.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +43 178205 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l143.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +44 178224 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l144.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +45 178250 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l145.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +46 178257 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l146.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +47 178290 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l147.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +48 178304 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l148.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +49 178323 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l149.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +50 178337 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l150.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +51 178356 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l151.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +52 178370 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l152.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +53 178389 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l153.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +54 178403 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l154.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +55 178415 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l155.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +56 178422 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l156.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +57 178448 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l157.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +58 178455 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l158.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +59 178481 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l159.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +60 178488 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l160.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +61 178502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l161.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +62 178514 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l162.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +63 178528 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l163.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +64 178547 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l164.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +65 178554 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l165.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +66 178568 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l166.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +67 178580 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l167.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +68 178587 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l168.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +69 178601 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l169.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +70 178957 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l170.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +71 178964 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l171.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +72 178978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l172.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +73 178997 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l173.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +74 179011 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l174.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +75 179030 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l175.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +76 179044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l176.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +77 179063 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l177.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +78 179077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l178.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +79 179096 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l179.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +80 179110 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l180.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +81 179129 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l181.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +82 179143 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l182.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +83 179162 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l183.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +84 179228 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l184.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +85 179242 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l185.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +86 179261 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l186.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +87 179275 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l187.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +88 179308 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l188.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +89 179327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l189.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +90 179341 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l190.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +91 179360 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l191.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +92 179374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l192.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +93 179393 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l193.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +94 179407 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l194.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +95 179426 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l195.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +96 179440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l196.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +97 179466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l197.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +98 179485 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l198.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +99 179499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l199.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +100 179518 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1100.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +101 179532 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1101.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +102 179551 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1102.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +103 179565 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1103.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +104 179584 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1104.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +105 179598 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1105.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +106 179617 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1106.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +107 179631 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1107.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +108 179650 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1108.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +109 179664 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1109.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +110 179683 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1110.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +111 179697 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1111.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +112 179716 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1112.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +113 179730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1113.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +114 179749 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1114.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +115 179763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1115.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +116 179782 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1116.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +117 179796 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1117.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +118 179815 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1118.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +119 179829 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1119.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +120 179848 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1120.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +121 179862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1121.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +122 179881 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1122.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +123 179895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1123.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +124 179914 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1124.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +125 179928 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1125.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +126 179947 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1126.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +127 179961 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1127.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +128 179980 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1128.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +129 179994 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1129.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +130 180013 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1130.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +131 180027 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1131.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +132 180046 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1132.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +133 180060 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1133.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +134 180079 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1134.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +135 180093 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1135.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +136 180112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1136.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +137 180126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1137.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +138 180145 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1138.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +139 180159 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1139.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +140 180178 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1140.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +141 180192 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1141.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +142 180211 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1142.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +143 180225 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1143.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +144 180244 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1144.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +145 180258 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1145.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +146 182665 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1146.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +147 182693 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1147.mem 656 72 1 sh3_zsrt139l10_pal.mem 0x00000000 +148 182753 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1148.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +149 183054 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1149.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +150 183080 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1150.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +151 183087 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1151.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +152 183094 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1152.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +153 183122 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1153.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +154 183136 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1154.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +155 183150 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1155.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +156 183157 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1156.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +157 183171 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1157.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +158 183192 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1158.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +159 183199 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1159.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +160 183213 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1160.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +161 183220 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1161.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +162 183227 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1162.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +163 183374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1163.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +164 183388 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1164.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +165 183395 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1165.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +166 183402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1166.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +167 183409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1167.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +168 183416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1168.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +169 183437 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1169.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +170 183451 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1170.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +171 183458 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1171.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +172 183465 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1172.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +173 183472 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1173.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +174 183479 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1174.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +175 183493 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1175.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +176 183507 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1176.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +177 183514 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1177.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +178 183528 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1178.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +179 183535 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1179.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +180 184077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1180.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +181 184084 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1181.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +182 184091 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1182.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +183 184098 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1183.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +184 184105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1184.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +185 184112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1185.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +186 184119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1186.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +187 184126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1187.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +188 184133 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1188.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +189 184154 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1189.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +190 184168 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1190.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +191 184175 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1191.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +192 184182 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1192.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +193 184210 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1193.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +194 184217 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1194.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +195 184224 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1195.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +196 184238 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1196.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +197 184252 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1197.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +198 184700 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1198.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +199 184720 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1199.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +200 184741 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1200.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +201 184769 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1201.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +202 184781 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1202.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +203 184790 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1203.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +204 184808 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1204.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +205 184817 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1205.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +206 184826 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1206.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +207 184853 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1207.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +208 184871 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1208.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +209 184889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1209.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +210 184898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1210.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +211 184907 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1211.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +212 184925 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1212.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +213 184934 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1213.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +214 184952 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1214.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +215 185185 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1215.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +216 185205 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1216.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +217 185219 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1217.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +218 185226 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1218.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +219 185233 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1219.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +220 185240 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1220.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +221 185254 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1221.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +222 185268 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1222.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +223 185275 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1223.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +224 185492 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1224.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +225 185525 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1225.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +226 185532 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1226.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +227 185539 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1227.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +228 185546 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1228.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +229 185553 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1229.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +230 185567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1230.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +231 185574 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1231.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +232 185581 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1232.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +233 185730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1233.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +234 185748 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1234.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +235 185757 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1235.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +236 185766 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1236.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +237 185775 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1237.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +238 185784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1238.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +239 185793 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1239.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +240 185802 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1240.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +241 185811 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1241.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +242 186061 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1242.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +243 186075 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1243.mem 683 75 1 sh3_zsrt139l10_pal.mem 0x00000000 +244 186131 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1244.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +245 186138 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1245.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +246 186145 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1246.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +247 186398 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1247.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +248 186405 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1248.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +249 186412 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1249.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +250 186689 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1250.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +251 186703 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1251.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +252 186710 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1252.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +253 186717 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1253.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +254 186730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1254.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +255 186737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1255.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +256 186744 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1256.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +257 186751 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1257.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +258 186758 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1258.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +259 186765 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1259.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +260 186772 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1260.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +261 186784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1261.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +262 186814 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1262.mem 575 63 1 sh3_zsrt139l10_pal.mem 0x00000000 +263 186874 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1263.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +264 186881 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1264.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +265 186895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1265.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +266 186922 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1266.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +267 186936 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1267.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +268 186943 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1268.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +269 186977 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1269.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +270 186984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1270.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +271 186991 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1271.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +272 186998 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1272.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +273 187111 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1273.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +274 187174 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1274.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +275 187188 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1275.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +276 187202 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1276.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +277 187241 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1277.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +278 187248 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1278.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +279 187262 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1279.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +280 187289 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1280.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +281 187296 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1281.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +282 187310 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1282.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +283 187317 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1283.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +284 187331 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1284.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +285 187418 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1285.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +286 187427 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1286.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +287 187445 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1287.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +288 187454 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1288.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +289 187472 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1289.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +290 187490 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1290.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +291 187499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1291.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +292 187542 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1292.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +293 187760 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1293.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +294 187794 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1294.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +295 187808 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1295.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +296 187815 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1296.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +297 187822 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1297.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +298 187829 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1298.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +299 187856 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1299.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +300 187870 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1300.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +301 187877 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1301.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +302 187884 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1302.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +303 187957 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1303.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +304 187966 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1304.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +305 187975 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1305.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +306 187984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1306.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +307 188110 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1307.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +308 188349 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1308.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +309 188363 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1309.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +310 188383 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1310.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +311 188390 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1311.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +312 188488 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1312.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +313 188495 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1313.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +314 188502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1314.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +315 188981 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1315.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +316 189020 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1316.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +317 189029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1317.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +318 189038 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1318.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +319 189096 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1319.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +320 189117 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1320.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +321 189124 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1321.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +322 189131 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1322.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +323 189537 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1323.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +324 189544 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1324.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +325 189578 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1325.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +326 189592 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1326.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +327 189614 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1327.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +328 189633 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1328.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +329 189691 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1329.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +330 189711 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1330.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +331 189725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1331.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +332 189789 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1332.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +333 189796 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1333.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +334 189810 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1334.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +335 189817 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1335.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +336 189836 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1336.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +337 189850 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1337.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +338 189857 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1338.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +339 190017 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1339.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +340 190080 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1340.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +341 190107 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1341.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +342 190114 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1342.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +343 190128 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1343.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +344 190135 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1344.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +345 190169 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1345.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +346 190176 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1346.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +347 190208 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1347.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +348 190215 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1348.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +349 190222 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1349.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +350 190229 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1350.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +351 190393 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1351.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +352 190425 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1352.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +353 190439 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1353.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +354 190466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1354.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +355 190493 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1355.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +356 190500 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1356.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +357 190737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1357.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +358 190770 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1358.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +359 190855 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1359.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +360 190862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1360.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +361 190889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1361.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +362 190896 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1362.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +363 190910 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1363.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +364 190936 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1364.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +365 190943 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1365.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +366 190950 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1366.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +367 191220 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1367.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +368 191234 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1368.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +369 191268 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1369.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +370 191287 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1370.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +371 191294 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1371.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +372 191327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1372.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +373 191334 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1373.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +374 191348 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1374.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +375 191526 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1375.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +376 191533 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1376.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +377 191560 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1377.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +378 191615 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1378.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +379 191645 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1379.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +380 191712 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1380.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +381 191726 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1381.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +382 192434 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1382.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +383 192441 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1383.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +384 192448 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1384.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +385 192475 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1385.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +386 192495 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1386.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +387 192502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1387.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +388 192527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1388.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +389 192534 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1389.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +390 192541 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1390.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +391 192567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1391.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +392 192587 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1392.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +393 192601 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1393.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +394 192620 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1394.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +395 192627 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1395.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +396 192634 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1396.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +397 192666 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1397.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +398 192673 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1398.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +399 192680 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1399.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +400 192687 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1400.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +401 192694 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1401.mem 602 66 1 sh3_zsrt139l10_pal.mem 0x00000000 +402 192725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1402.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +403 192737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1403.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +404 192744 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1404.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +405 192751 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1405.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +406 192758 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1406.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +407 192770 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1407.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +408 192777 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1408.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +409 192784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1409.mem 377 41 1 sh3_zsrt139l10_pal.mem 0x00000000 +410 192798 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1410.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +411 192805 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1411.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +412 192819 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1412.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +413 192826 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1413.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +414 192840 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1414.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +415 192847 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1415.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +416 192854 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1416.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +417 192886 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1417.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +418 192898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1418.mem 521 57 1 sh3_zsrt139l10_pal.mem 0x00000000 +419 192919 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1419.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +420 192926 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1420.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +421 192933 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1421.mem 584 64 1 sh3_zsrt139l10_pal.mem 0x00000000 +422 192964 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1422.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +423 192971 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1423.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +424 192978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1424.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +425 193002 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1425.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +426 193009 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1426.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +427 193016 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1427.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +428 193023 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1428.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +429 193037 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1429.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +430 193044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1430.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +431 193058 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1431.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +432 193079 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1432.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +433 193086 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1433.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +434 193093 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1434.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +435 193105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1435.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +436 193112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1436.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +437 193119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1437.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +438 193126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1438.mem 413 45 1 sh3_zsrt139l10_pal.mem 0x00000000 +439 193152 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1439.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +440 193166 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1440.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +441 193185 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1441.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +442 193204 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1442.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +443 193211 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1443.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +444 193232 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1444.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +445 193246 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1445.mem 440 48 1 sh3_zsrt139l10_pal.mem 0x00000000 +446 193260 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1446.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +447 193274 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1447.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +448 193281 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1448.mem 467 51 1 sh3_zsrt139l10_pal.mem 0x00000000 +449 193295 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1449.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +450 193302 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1450.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +451 193309 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1451.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +452 193316 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1452.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +453 193323 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1453.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +454 193337 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1454.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +455 193344 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1455.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +456 193358 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1456.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +457 193365 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1457.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +458 193391 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1458.mem 692 76 1 sh3_zsrt139l10_pal.mem 0x00000000 +459 193405 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1459.mem 719 79 1 sh3_zsrt139l10_pal.mem 0x00000000 +460 193426 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1460.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +461 193440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1461.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +462 193447 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1462.mem 539 59 1 sh3_zsrt139l10_pal.mem 0x00000000 +463 193466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1463.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +464 193480 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1464.mem 512 56 1 sh3_zsrt139l10_pal.mem 0x00000000 +465 193499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1465.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +466 193506 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1466.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +467 193513 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1467.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +468 193520 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1468.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +469 193527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1469.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +470 193534 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1470.mem 908 100 1 sh3_zsrt139l10_pal.mem 0x00000000 +471 193570 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1471.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +472 193584 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1472.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +473 193591 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1473.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +474 193627 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1474.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +475 193656 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1475.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +476 193663 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1476.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +477 193670 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1477.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +478 193677 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1478.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +479 193684 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1479.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +480 193691 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1480.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +481 193705 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1481.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +482 193712 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1482.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +483 193719 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1483.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +484 193733 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1484.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +485 193747 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1485.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +486 193754 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1486.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +487 193761 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1487.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +488 193780 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1488.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +489 193787 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1489.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +490 193794 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1490.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +491 193806 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1491.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +492 193820 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1492.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +493 193839 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1493.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +494 193846 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1494.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +495 193872 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1495.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +496 193898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1496.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +497 193905 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1497.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +498 193912 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1498.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +499 193919 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1499.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +500 193926 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1500.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +501 193945 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1501.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +502 193952 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1502.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +503 193966 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1503.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +504 193978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1504.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +505 193985 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1505.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +506 193999 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1506.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +507 194006 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1507.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +508 194030 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1508.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +509 194037 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1509.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +510 194044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1510.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +511 194063 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1511.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +512 194070 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1512.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +513 194077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1513.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +514 194091 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1514.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +515 194105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1515.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +516 194119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1516.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +517 194126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1517.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +518 194133 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1518.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +519 194169 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1519.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +520 194176 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1520.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +521 194183 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1521.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +522 194202 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1522.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +523 194209 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1523.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +524 194216 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1524.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +525 194235 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1525.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +526 194242 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1526.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +527 194263 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1527.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +528 194277 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1528.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +529 194296 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1529.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +530 194324 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1530.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +531 194350 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1531.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +532 194381 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1532.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +533 194395 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1533.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +534 194402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1534.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +535 194409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1535.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +536 194416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1536.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +537 194423 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1537.mem 611 67 1 sh3_zsrt139l10_pal.mem 0x00000000 +538 194456 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1538.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +539 194494 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1539.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +540 194508 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1540.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +541 194527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1541.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +542 194541 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1542.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +543 194553 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1543.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +544 194560 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1544.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +545 194567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1545.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +546 194581 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1546.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +547 194609 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1547.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +548 194637 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1548.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +549 194678 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1549.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +550 194690 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1550.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +551 194697 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1551.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +552 194704 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1552.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +553 194711 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1553.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +554 194718 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1554.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +555 194725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1555.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +556 194746 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1556.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +557 194753 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1557.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +558 194760 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1558.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +559 194767 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1559.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +560 194774 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1560.mem 494 54 1 sh3_zsrt139l10_pal.mem 0x00000000 +561 194805 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1561.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +562 194819 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1562.mem 575 63 1 sh3_zsrt139l10_pal.mem 0x00000000 +563 194845 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1563.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +564 194852 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1564.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +565 194859 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1565.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +566 194883 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1566.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +567 194897 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1567.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +568 194904 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1568.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +569 194911 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1569.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +570 194918 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1570.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +571 194925 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1571.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +572 194939 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1572.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +573 194965 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1573.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +574 194984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1574.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +575 194998 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1575.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +576 195005 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1576.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +577 195012 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1577.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +578 195031 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1578.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +579 195038 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1579.mem 377 41 1 sh3_zsrt139l10_pal.mem 0x00000000 +580 195069 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1580.mem 566 62 1 sh3_zsrt139l10_pal.mem 0x00000000 +581 195090 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1581.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +582 195104 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1582.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +583 195111 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1583.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +584 195118 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1584.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +585 195125 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1585.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +586 195139 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1586.mem 359 39 1 sh3_zsrt139l10_pal.mem 0x00000000 +587 195163 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1587.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +588 195170 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1588.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +589 195177 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1589.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +590 195194 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1590.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +591 195201 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1591.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +592 195215 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1592.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +593 195222 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1593.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +594 195229 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1594.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +595 195236 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1595.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +596 195243 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1596.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +597 195250 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1597.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +598 195257 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1598.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +599 195264 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1599.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +600 195271 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1600.mem 386 42 1 sh3_zsrt139l10_pal.mem 0x00000000 +601 195292 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1601.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +602 195306 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1602.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +603 195313 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1603.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +604 195320 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1604.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +605 195327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1605.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +606 195334 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1606.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +607 195374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1607.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +608 195381 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1608.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +609 195388 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1609.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +610 195402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1610.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +611 195409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1611.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +612 195416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1612.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +613 195440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1613.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +614 195461 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1614.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +615 195489 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1615.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +616 195496 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1616.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +617 195517 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1617.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +618 195531 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1618.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +619 195538 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1619.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +620 195545 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1620.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +621 195552 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1621.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +622 195559 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1622.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +623 195566 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1623.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +624 195594 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1624.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +625 195608 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1625.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +626 195622 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1626.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +627 195634 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1627.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +628 195655 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1628.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +629 195662 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1629.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +630 195669 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1630.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +631 195693 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1631.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +632 195714 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1632.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +633 195728 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1633.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +634 195735 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1634.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +635 195742 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1635.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +636 195756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1636.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +637 195763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1637.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +638 195777 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1638.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +639 195789 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1639.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +640 195803 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1640.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +641 195824 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1641.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +642 195838 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1642.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +643 195867 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1643.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +644 195874 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1644.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +645 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1645.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +646 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1646.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +647 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1647.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +648 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1648.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +649 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1649.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +650 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1650.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +651 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1651.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +652 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1652.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +653 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1653.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +654 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1654.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +655 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1655.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1c_epochs.txt new file mode 100644 index 0000000..f324205 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l1c_epochs.txt @@ -0,0 +1,662 @@ +# Ch434 epoch descriptor table (656 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 656 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c0.mem 35 3 0 sh3_zsrt139l1c0_pal.mem 0x00000000 +1 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c1.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +2 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c2.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +3 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c3.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +4 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c4.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +5 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c5.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +6 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c6.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +7 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c7.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +8 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c8.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +9 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c9.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +10 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c10.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +11 177272 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c11.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +12 177291 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c12.mem 413 45 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +13 177291 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c13.mem 557 61 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +14 177331 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c14.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +15 177350 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c15.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +16 177364 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c16.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +17 177397 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c17.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +18 177638 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c18.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +19 177671 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c19.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +20 177690 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c20.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +21 177704 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c21.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +22 177723 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c22.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +23 177737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c23.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +24 177756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c24.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +25 177756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c25.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +26 177763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c26.mem 629 69 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +27 177763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c27.mem 836 92 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +28 177803 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c28.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +29 177810 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c29.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +30 177822 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c30.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +31 177836 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c31.mem 350 38 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +32 177855 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c32.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +33 177862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c33.mem 521 57 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +34 177895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c34.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +35 177909 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c35.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +36 177928 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c36.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +37 178041 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c37.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +38 178067 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c38.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +39 178099 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c39.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +40 178138 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c40.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +41 178152 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c41.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +42 178191 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c42.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +43 178205 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c43.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +44 178224 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c44.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +45 178250 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c45.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +46 178257 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c46.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +47 178290 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c47.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +48 178304 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c48.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +49 178323 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c49.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +50 178337 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c50.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +51 178356 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c51.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +52 178370 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c52.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +53 178389 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c53.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +54 178403 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c54.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +55 178415 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c55.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +56 178422 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c56.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +57 178448 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c57.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +58 178455 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c58.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +59 178481 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c59.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +60 178488 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c60.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +61 178502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c61.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +62 178514 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c62.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +63 178528 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c63.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +64 178547 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c64.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +65 178554 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c65.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +66 178568 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c66.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +67 178580 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c67.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +68 178587 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c68.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +69 178601 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c69.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +70 178957 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c70.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +71 178964 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c71.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +72 178978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c72.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +73 178997 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c73.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +74 179011 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c74.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +75 179030 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c75.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +76 179044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c76.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +77 179063 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c77.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +78 179077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c78.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +79 179096 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c79.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +80 179110 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c80.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +81 179129 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c81.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +82 179143 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c82.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +83 179162 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c83.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +84 179228 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c84.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +85 179242 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c85.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +86 179261 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c86.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +87 179275 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c87.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +88 179308 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c88.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +89 179327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c89.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +90 179341 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c90.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +91 179360 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c91.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +92 179374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c92.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +93 179393 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c93.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +94 179407 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c94.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +95 179426 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c95.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +96 179440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c96.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +97 179466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c97.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +98 179485 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c98.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +99 179499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c99.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +100 179518 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c100.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +101 179532 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c101.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +102 179551 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c102.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +103 179565 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c103.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +104 179584 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c104.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +105 179598 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c105.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +106 179617 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c106.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +107 179631 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c107.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +108 179650 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c108.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +109 179664 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c109.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +110 179683 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c110.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +111 179697 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c111.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +112 179716 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c112.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +113 179730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c113.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +114 179749 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c114.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +115 179763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c115.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +116 179782 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c116.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +117 179796 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c117.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +118 179815 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c118.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +119 179829 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c119.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +120 179848 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c120.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +121 179862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c121.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +122 179881 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c122.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +123 179895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c123.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +124 179914 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c124.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +125 179928 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c125.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +126 179947 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c126.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +127 179961 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c127.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +128 179980 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c128.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +129 179994 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c129.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +130 180013 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c130.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +131 180027 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c131.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +132 180046 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c132.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +133 180060 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c133.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +134 180079 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c134.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +135 180093 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c135.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +136 180112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c136.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +137 180126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c137.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +138 180145 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c138.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +139 180159 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c139.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +140 180178 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c140.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +141 180192 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c141.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +142 180211 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c142.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +143 180225 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c143.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +144 180244 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c144.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +145 180258 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c145.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +146 182665 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c146.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +147 182693 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c147.mem 656 72 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +148 182753 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c148.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +149 183054 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c149.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +150 183080 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c150.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +151 183087 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c151.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +152 183094 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c152.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +153 183122 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c153.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +154 183136 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c154.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +155 183150 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c155.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +156 183157 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c156.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +157 183171 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c157.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +158 183192 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c158.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +159 183199 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c159.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +160 183213 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c160.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +161 183220 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c161.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +162 183227 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c162.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +163 183374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c163.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +164 183388 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c164.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +165 183395 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c165.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +166 183402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c166.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +167 183409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c167.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +168 183416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c168.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +169 183437 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c169.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +170 183451 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c170.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +171 183458 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c171.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +172 183465 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c172.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +173 183472 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c173.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +174 183479 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c174.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +175 183493 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c175.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +176 183507 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c176.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +177 183514 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c177.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +178 183528 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c178.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +179 183535 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c179.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +180 184077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c180.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +181 184084 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c181.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +182 184091 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c182.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +183 184098 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c183.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +184 184105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c184.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +185 184112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c185.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +186 184119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c186.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +187 184126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c187.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +188 184133 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c188.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +189 184154 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c189.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +190 184168 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c190.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +191 184175 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c191.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +192 184182 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c192.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +193 184210 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c193.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +194 184217 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c194.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +195 184224 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c195.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +196 184238 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c196.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +197 184252 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c197.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +198 184700 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c198.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +199 184720 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c199.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +200 184741 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c200.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +201 184769 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c201.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +202 184781 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c202.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +203 184790 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c203.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +204 184808 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c204.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +205 184817 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c205.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +206 184826 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c206.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +207 184853 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c207.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +208 184871 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c208.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +209 184889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c209.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +210 184898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c210.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +211 184907 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c211.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +212 184925 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c212.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +213 184934 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c213.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +214 184952 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c214.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +215 185185 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c215.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +216 185205 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c216.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +217 185219 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c217.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +218 185226 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c218.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +219 185233 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c219.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +220 185240 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c220.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +221 185254 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c221.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +222 185268 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c222.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +223 185275 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c223.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +224 185492 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c224.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +225 185525 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c225.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +226 185532 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c226.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +227 185539 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c227.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +228 185546 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c228.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +229 185553 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c229.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +230 185567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c230.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +231 185574 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c231.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +232 185581 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c232.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +233 185730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c233.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +234 185748 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c234.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +235 185757 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c235.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +236 185766 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c236.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +237 185775 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c237.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +238 185784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c238.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +239 185793 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c239.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +240 185802 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c240.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +241 185811 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c241.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +242 186061 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c242.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +243 186075 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c243.mem 683 75 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +244 186131 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c244.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +245 186138 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c245.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +246 186145 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c246.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +247 186398 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c247.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +248 186405 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c248.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +249 186412 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c249.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +250 186689 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c250.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +251 186703 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c251.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +252 186710 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c252.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +253 186717 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c253.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +254 186730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c254.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +255 186737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c255.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +256 186744 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c256.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +257 186751 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c257.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +258 186758 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c258.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +259 186765 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c259.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +260 186772 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c260.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +261 186784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c261.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +262 186814 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c262.mem 575 63 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +263 186874 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c263.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +264 186881 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c264.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +265 186895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c265.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +266 186922 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c266.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +267 186936 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c267.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +268 186943 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c268.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +269 186977 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c269.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +270 186984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c270.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +271 186991 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c271.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +272 186998 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c272.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +273 187111 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c273.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +274 187174 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c274.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +275 187188 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c275.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +276 187202 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c276.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +277 187241 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c277.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +278 187248 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c278.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +279 187262 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c279.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +280 187289 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c280.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +281 187296 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c281.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +282 187310 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c282.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +283 187317 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c283.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +284 187331 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c284.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +285 187418 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c285.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +286 187427 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c286.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +287 187445 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c287.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +288 187454 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c288.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +289 187472 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c289.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +290 187490 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c290.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +291 187499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c291.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +292 187542 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c292.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +293 187760 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c293.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +294 187794 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c294.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +295 187808 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c295.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +296 187815 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c296.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +297 187822 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c297.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +298 187829 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c298.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +299 187856 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c299.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +300 187870 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c300.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +301 187877 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c301.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +302 187884 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c302.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +303 187957 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c303.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +304 187966 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c304.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +305 187975 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c305.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +306 187984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c306.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +307 188110 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c307.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +308 188349 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c308.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +309 188363 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c309.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +310 188383 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c310.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +311 188390 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c311.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +312 188488 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c312.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +313 188495 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c313.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +314 188502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c314.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +315 188981 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c315.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +316 189020 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c316.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +317 189029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c317.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +318 189038 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c318.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +319 189096 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c319.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +320 189117 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c320.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +321 189124 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c321.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +322 189131 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c322.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +323 189537 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c323.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +324 189544 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c324.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +325 189578 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c325.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +326 189592 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c326.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +327 189614 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c327.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +328 189633 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c328.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +329 189691 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c329.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +330 189711 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c330.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +331 189725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c331.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +332 189789 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c332.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +333 189796 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c333.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +334 189810 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c334.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +335 189817 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c335.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +336 189836 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c336.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +337 189850 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c337.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +338 189857 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c338.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +339 190017 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c339.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +340 190080 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c340.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +341 190107 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c341.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +342 190114 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c342.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +343 190128 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c343.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +344 190135 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c344.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +345 190169 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c345.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +346 190176 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c346.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +347 190208 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c347.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +348 190215 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c348.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +349 190222 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c349.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +350 190229 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c350.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +351 190393 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c351.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +352 190425 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c352.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +353 190439 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c353.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +354 190466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c354.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +355 190493 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c355.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +356 190500 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c356.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +357 190737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c357.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +358 190770 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c358.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +359 190855 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c359.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +360 190862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c360.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +361 190889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c361.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +362 190896 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c362.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +363 190910 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c363.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +364 190936 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c364.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +365 190943 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c365.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +366 190950 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c366.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +367 191220 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c367.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +368 191234 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c368.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +369 191268 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c369.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +370 191287 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c370.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +371 191294 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c371.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +372 191327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c372.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +373 191334 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c373.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +374 191348 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c374.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +375 191526 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c375.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +376 191533 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c376.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +377 191560 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c377.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +378 191615 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c378.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +379 191645 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c379.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +380 191712 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c380.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +381 191726 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c381.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +382 192434 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c382.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +383 192441 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c383.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +384 192448 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c384.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +385 192475 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c385.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +386 192495 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c386.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +387 192502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c387.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +388 192527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c388.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +389 192534 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c389.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +390 192541 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c390.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +391 192567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c391.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +392 192587 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c392.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +393 192601 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c393.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +394 192620 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c394.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +395 192627 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c395.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +396 192634 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c396.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +397 192666 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c397.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +398 192673 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c398.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +399 192680 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c399.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +400 192687 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c400.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +401 192694 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c401.mem 602 66 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +402 192725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c402.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +403 192737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c403.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +404 192744 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c404.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +405 192751 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c405.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +406 192758 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c406.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +407 192770 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c407.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +408 192777 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c408.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +409 192784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c409.mem 377 41 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +410 192798 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c410.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +411 192805 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c411.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +412 192819 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c412.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +413 192826 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c413.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +414 192840 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c414.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +415 192847 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c415.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +416 192854 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c416.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +417 192886 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c417.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +418 192898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c418.mem 521 57 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +419 192919 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c419.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +420 192926 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c420.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +421 192933 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c421.mem 584 64 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +422 192964 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c422.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +423 192971 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c423.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +424 192978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c424.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +425 193002 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c425.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +426 193009 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c426.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +427 193016 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c427.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +428 193023 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c428.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +429 193037 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c429.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +430 193044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c430.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +431 193058 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c431.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +432 193079 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c432.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +433 193086 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c433.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +434 193093 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c434.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +435 193105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c435.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +436 193112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c436.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +437 193119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c437.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +438 193126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c438.mem 413 45 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +439 193152 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c439.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +440 193166 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c440.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +441 193185 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c441.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +442 193204 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c442.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +443 193211 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c443.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +444 193232 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c444.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +445 193246 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c445.mem 440 48 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +446 193260 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c446.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +447 193274 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c447.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +448 193281 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c448.mem 467 51 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +449 193295 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c449.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +450 193302 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c450.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +451 193309 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c451.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +452 193316 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c452.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +453 193323 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c453.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +454 193337 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c454.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +455 193344 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c455.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +456 193358 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c456.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +457 193365 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c457.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +458 193391 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c458.mem 692 76 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +459 193405 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c459.mem 719 79 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +460 193426 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c460.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +461 193440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c461.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +462 193447 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c462.mem 539 59 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +463 193466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c463.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +464 193480 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c464.mem 512 56 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +465 193499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c465.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +466 193506 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c466.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +467 193513 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c467.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +468 193520 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c468.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +469 193527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c469.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +470 193534 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c470.mem 908 100 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +471 193570 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c471.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +472 193584 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c472.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +473 193591 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c473.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +474 193627 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c474.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +475 193656 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c475.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +476 193663 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c476.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +477 193670 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c477.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +478 193677 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c478.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +479 193684 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c479.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +480 193691 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c480.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +481 193705 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c481.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +482 193712 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c482.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +483 193719 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c483.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +484 193733 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c484.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +485 193747 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c485.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +486 193754 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c486.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +487 193761 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c487.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +488 193780 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c488.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +489 193787 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c489.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +490 193794 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c490.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +491 193806 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c491.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +492 193820 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c492.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +493 193839 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c493.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +494 193846 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c494.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +495 193872 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c495.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +496 193898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c496.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +497 193905 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c497.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +498 193912 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c498.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +499 193919 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c499.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +500 193926 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c500.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +501 193945 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c501.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +502 193952 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c502.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +503 193966 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c503.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +504 193978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c504.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +505 193985 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c505.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +506 193999 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c506.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +507 194006 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c507.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +508 194030 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c508.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +509 194037 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c509.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +510 194044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c510.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +511 194063 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c511.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +512 194070 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c512.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +513 194077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c513.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +514 194091 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c514.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +515 194105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c515.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +516 194119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c516.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +517 194126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c517.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +518 194133 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c518.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +519 194169 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c519.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +520 194176 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c520.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +521 194183 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c521.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +522 194202 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c522.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +523 194209 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c523.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +524 194216 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c524.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +525 194235 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c525.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +526 194242 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c526.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +527 194263 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c527.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +528 194277 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c528.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +529 194296 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c529.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +530 194324 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c530.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +531 194350 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c531.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +532 194381 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c532.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +533 194395 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c533.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +534 194402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c534.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +535 194409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c535.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +536 194416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c536.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +537 194423 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c537.mem 611 67 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +538 194456 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c538.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +539 194494 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c539.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +540 194508 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c540.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +541 194527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c541.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +542 194541 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c542.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +543 194553 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c543.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +544 194560 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c544.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +545 194567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c545.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +546 194581 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c546.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +547 194609 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c547.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +548 194637 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c548.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +549 194678 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c549.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +550 194690 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c550.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +551 194697 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c551.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +552 194704 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c552.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +553 194711 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c553.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +554 194718 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c554.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +555 194725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c555.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +556 194746 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c556.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +557 194753 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c557.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +558 194760 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c558.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +559 194767 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c559.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +560 194774 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c560.mem 494 54 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +561 194805 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c561.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +562 194819 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c562.mem 575 63 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +563 194845 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c563.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +564 194852 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c564.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +565 194859 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c565.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +566 194883 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c566.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +567 194897 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c567.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +568 194904 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c568.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +569 194911 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c569.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +570 194918 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c570.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +571 194925 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c571.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +572 194939 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c572.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +573 194965 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c573.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +574 194984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c574.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +575 194998 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c575.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +576 195005 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c576.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +577 195012 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c577.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +578 195031 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c578.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +579 195038 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c579.mem 377 41 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +580 195069 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c580.mem 566 62 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +581 195090 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c581.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +582 195104 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c582.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +583 195111 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c583.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +584 195118 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c584.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +585 195125 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c585.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +586 195139 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c586.mem 359 39 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +587 195163 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c587.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +588 195170 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c588.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +589 195177 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c589.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +590 195194 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c590.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +591 195201 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c591.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +592 195215 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c592.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +593 195222 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c593.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +594 195229 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c594.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +595 195236 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c595.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +596 195243 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c596.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +597 195250 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c597.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +598 195257 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c598.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +599 195264 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c599.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +600 195271 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c600.mem 386 42 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +601 195292 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c601.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +602 195306 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c602.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +603 195313 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c603.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +604 195320 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c604.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +605 195327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c605.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +606 195334 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c606.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +607 195374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c607.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +608 195381 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c608.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +609 195388 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c609.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +610 195402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c610.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +611 195409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c611.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +612 195416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c612.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +613 195440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c613.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +614 195461 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c614.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +615 195489 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c615.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +616 195496 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c616.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +617 195517 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c617.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +618 195531 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c618.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +619 195538 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c619.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +620 195545 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c620.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +621 195552 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c621.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +622 195559 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c622.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +623 195566 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c623.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +624 195594 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c624.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +625 195608 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c625.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +626 195622 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c626.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +627 195634 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c627.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +628 195655 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c628.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +629 195662 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c629.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +630 195669 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c630.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +631 195693 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c631.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +632 195714 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c632.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +633 195728 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c633.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +634 195735 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c634.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +635 195742 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c635.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +636 195756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c636.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +637 195763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c637.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +638 195777 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c638.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +639 195789 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c639.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +640 195803 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c640.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +641 195824 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c641.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +642 195838 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c642.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +643 195867 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c643.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +644 195874 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c644.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +645 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c645.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +646 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c646.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +647 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c647.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +648 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c648.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +649 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c649.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +650 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c650.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +651 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c651.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +652 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c652.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +653 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c653.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +654 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c654.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +655 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c655.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2_epochs.txt new file mode 100644 index 0000000..d79a73a --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2_epochs.txt @@ -0,0 +1,802 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l1'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 799 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l10.mem 35 3 0 sh3_zsrt139l10_pal.mem 0x00000000 +144 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l11.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +145 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l12.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +146 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l13.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +147 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l14.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +148 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l15.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +149 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l16.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +150 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l17.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +151 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l18.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +152 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l19.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +153 177029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l110.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +154 177272 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l111.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +155 177291 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l112.mem 413 45 1 sh3_zsrt139l10_pal.mem 0x00000000 +156 177291 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l113.mem 557 61 1 sh3_zsrt139l10_pal.mem 0x00000000 +157 177331 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l114.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +158 177350 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l115.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +159 177364 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l116.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +160 177397 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l117.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +161 177638 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l118.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +162 177671 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l119.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +163 177690 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l120.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +164 177704 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l121.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +165 177723 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l122.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +166 177737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l123.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +167 177756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l124.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +168 177756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l125.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +169 177763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l126.mem 629 69 1 sh3_zsrt139l10_pal.mem 0x00000000 +170 177763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l127.mem 836 92 1 sh3_zsrt139l10_pal.mem 0x00000000 +171 177803 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l128.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +172 177810 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l129.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +173 177822 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l130.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +174 177836 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l131.mem 350 38 1 sh3_zsrt139l10_pal.mem 0x00000000 +175 177855 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l132.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +176 177862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l133.mem 521 57 1 sh3_zsrt139l10_pal.mem 0x00000000 +177 177895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l134.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +178 177909 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l135.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +179 177928 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l136.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +180 178041 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l137.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +181 178067 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l138.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +182 178099 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l139.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +183 178138 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l140.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +184 178152 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l141.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +185 178191 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l142.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +186 178205 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l143.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +187 178224 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l144.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +188 178250 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l145.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +189 178257 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l146.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +190 178290 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l147.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +191 178304 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l148.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +192 178323 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l149.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +193 178337 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l150.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +194 178356 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l151.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +195 178370 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l152.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +196 178389 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l153.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +197 178403 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l154.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +198 178415 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l155.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +199 178422 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l156.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +200 178448 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l157.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +201 178455 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l158.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +202 178481 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l159.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +203 178488 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l160.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +204 178502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l161.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +205 178514 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l162.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +206 178528 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l163.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +207 178547 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l164.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +208 178554 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l165.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +209 178568 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l166.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +210 178580 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l167.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +211 178587 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l168.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +212 178601 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l169.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +213 178957 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l170.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +214 178964 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l171.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +215 178978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l172.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +216 178997 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l173.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +217 179011 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l174.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +218 179030 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l175.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +219 179044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l176.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +220 179063 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l177.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +221 179077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l178.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +222 179096 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l179.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +223 179110 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l180.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +224 179129 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l181.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +225 179143 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l182.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +226 179162 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l183.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +227 179228 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l184.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +228 179242 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l185.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +229 179261 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l186.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +230 179275 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l187.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +231 179308 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l188.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +232 179327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l189.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +233 179341 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l190.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +234 179360 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l191.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +235 179374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l192.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +236 179393 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l193.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +237 179407 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l194.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +238 179426 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l195.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +239 179440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l196.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +240 179466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l197.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +241 179485 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l198.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +242 179499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l199.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +243 179518 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1100.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +244 179532 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1101.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +245 179551 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1102.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +246 179565 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1103.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +247 179584 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1104.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +248 179598 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1105.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +249 179617 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1106.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +250 179631 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1107.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +251 179650 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1108.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +252 179664 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1109.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +253 179683 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1110.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +254 179697 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1111.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +255 179716 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1112.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +256 179730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1113.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +257 179749 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1114.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +258 179763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1115.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +259 179782 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1116.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +260 179796 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1117.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +261 179815 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1118.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +262 179829 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1119.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +263 179848 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1120.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +264 179862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1121.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +265 179881 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1122.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +266 179895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1123.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +267 179914 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1124.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +268 179928 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1125.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +269 179947 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1126.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +270 179961 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1127.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +271 179980 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1128.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +272 179994 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1129.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +273 180013 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1130.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +274 180027 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1131.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +275 180046 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1132.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +276 180060 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1133.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +277 180079 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1134.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +278 180093 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1135.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +279 180112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1136.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +280 180126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1137.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +281 180145 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1138.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +282 180159 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1139.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +283 180178 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1140.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +284 180192 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1141.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +285 180211 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1142.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +286 180225 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1143.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +287 180244 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1144.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +288 180258 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1145.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +289 182665 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1146.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +290 182693 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1147.mem 656 72 1 sh3_zsrt139l10_pal.mem 0x00000000 +291 182753 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1148.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +292 183054 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1149.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +293 183080 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1150.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +294 183087 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1151.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +295 183094 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1152.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +296 183122 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1153.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +297 183136 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1154.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +298 183150 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1155.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +299 183157 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1156.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +300 183171 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1157.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +301 183192 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1158.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +302 183199 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1159.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +303 183213 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1160.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +304 183220 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1161.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +305 183227 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1162.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +306 183374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1163.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +307 183388 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1164.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +308 183395 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1165.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +309 183402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1166.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +310 183409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1167.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +311 183416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1168.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +312 183437 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1169.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +313 183451 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1170.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +314 183458 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1171.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +315 183465 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1172.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +316 183472 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1173.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +317 183479 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1174.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +318 183493 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1175.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +319 183507 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1176.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +320 183514 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1177.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +321 183528 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1178.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +322 183535 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1179.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +323 184077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1180.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +324 184084 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1181.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +325 184091 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1182.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +326 184098 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1183.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +327 184105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1184.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +328 184112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1185.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +329 184119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1186.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +330 184126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1187.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +331 184133 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1188.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +332 184154 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1189.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +333 184168 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1190.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +334 184175 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1191.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +335 184182 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1192.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +336 184210 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1193.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +337 184217 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1194.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +338 184224 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1195.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +339 184238 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1196.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +340 184252 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1197.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +341 184700 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1198.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +342 184720 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1199.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +343 184741 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1200.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +344 184769 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1201.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +345 184781 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1202.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +346 184790 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1203.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +347 184808 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1204.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +348 184817 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1205.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +349 184826 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1206.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +350 184853 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1207.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +351 184871 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1208.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +352 184889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1209.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +353 184898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1210.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +354 184907 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1211.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +355 184925 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1212.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +356 184934 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1213.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +357 184952 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1214.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +358 185185 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1215.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +359 185205 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1216.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +360 185219 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1217.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +361 185226 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1218.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +362 185233 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1219.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +363 185240 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1220.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +364 185254 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1221.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +365 185268 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1222.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +366 185275 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1223.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +367 185492 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1224.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +368 185525 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1225.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +369 185532 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1226.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +370 185539 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1227.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +371 185546 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1228.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +372 185553 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1229.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +373 185567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1230.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +374 185574 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1231.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +375 185581 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1232.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +376 185730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1233.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +377 185748 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1234.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +378 185757 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1235.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +379 185766 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1236.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +380 185775 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1237.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +381 185784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1238.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +382 185793 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1239.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +383 185802 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1240.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +384 185811 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1241.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +385 186061 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1242.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +386 186075 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1243.mem 683 75 1 sh3_zsrt139l10_pal.mem 0x00000000 +387 186131 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1244.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +388 186138 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1245.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +389 186145 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1246.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +390 186398 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1247.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +391 186405 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1248.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +392 186412 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1249.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +393 186689 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1250.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +394 186703 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1251.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +395 186710 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1252.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +396 186717 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1253.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +397 186730 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1254.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +398 186737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1255.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +399 186744 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1256.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +400 186751 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1257.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +401 186758 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1258.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +402 186765 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1259.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +403 186772 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1260.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +404 186784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1261.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +405 186814 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1262.mem 575 63 1 sh3_zsrt139l10_pal.mem 0x00000000 +406 186874 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1263.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +407 186881 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1264.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +408 186895 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1265.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +409 186922 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1266.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +410 186936 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1267.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +411 186943 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1268.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +412 186977 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1269.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +413 186984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1270.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +414 186991 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1271.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +415 186998 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1272.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +416 187111 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1273.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +417 187174 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1274.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +418 187188 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1275.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +419 187202 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1276.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +420 187241 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1277.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +421 187248 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1278.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +422 187262 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1279.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +423 187289 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1280.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +424 187296 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1281.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +425 187310 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1282.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +426 187317 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1283.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +427 187331 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1284.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +428 187418 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1285.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +429 187427 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1286.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +430 187445 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1287.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +431 187454 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1288.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +432 187472 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1289.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +433 187490 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1290.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +434 187499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1291.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +435 187542 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1292.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +436 187760 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1293.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +437 187794 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1294.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +438 187808 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1295.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +439 187815 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1296.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +440 187822 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1297.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +441 187829 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1298.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +442 187856 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1299.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +443 187870 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1300.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +444 187877 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1301.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +445 187884 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1302.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +446 187957 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1303.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +447 187966 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1304.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +448 187975 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1305.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +449 187984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1306.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +450 188110 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1307.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +451 188349 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1308.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +452 188363 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1309.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +453 188383 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1310.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +454 188390 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1311.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +455 188488 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1312.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +456 188495 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1313.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +457 188502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1314.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +458 188981 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1315.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +459 189020 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1316.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +460 189029 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1317.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +461 189038 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1318.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +462 189096 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1319.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +463 189117 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1320.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +464 189124 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1321.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +465 189131 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1322.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +466 189537 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1323.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +467 189544 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1324.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +468 189578 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1325.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +469 189592 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1326.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +470 189614 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1327.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +471 189633 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1328.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +472 189691 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1329.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +473 189711 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1330.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +474 189725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1331.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +475 189789 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1332.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +476 189796 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1333.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +477 189810 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1334.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +478 189817 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1335.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +479 189836 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1336.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +480 189850 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1337.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +481 189857 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1338.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +482 190017 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1339.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +483 190080 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1340.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +484 190107 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1341.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +485 190114 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1342.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +486 190128 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1343.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +487 190135 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1344.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +488 190169 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1345.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +489 190176 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1346.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +490 190208 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1347.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +491 190215 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1348.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +492 190222 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1349.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +493 190229 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1350.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +494 190393 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1351.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +495 190425 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1352.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +496 190439 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1353.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +497 190466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1354.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +498 190493 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1355.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +499 190500 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1356.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +500 190737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1357.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +501 190770 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1358.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +502 190855 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1359.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +503 190862 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1360.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +504 190889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1361.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +505 190896 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1362.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +506 190910 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1363.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +507 190936 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1364.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +508 190943 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1365.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +509 190950 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1366.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +510 191220 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1367.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +511 191234 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1368.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +512 191268 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1369.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +513 191287 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1370.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +514 191294 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1371.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +515 191327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1372.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +516 191334 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1373.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +517 191348 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1374.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +518 191526 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1375.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +519 191533 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1376.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +520 191560 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1377.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +521 191615 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1378.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +522 191645 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1379.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +523 191712 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1380.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +524 191726 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1381.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +525 192434 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1382.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +526 192441 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1383.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +527 192448 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1384.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +528 192475 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1385.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +529 192495 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1386.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +530 192502 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1387.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +531 192527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1388.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +532 192534 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1389.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +533 192541 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1390.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +534 192567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1391.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +535 192587 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1392.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +536 192601 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1393.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +537 192620 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1394.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +538 192627 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1395.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +539 192634 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1396.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +540 192666 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1397.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +541 192673 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1398.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +542 192680 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1399.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +543 192687 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1400.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +544 192694 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1401.mem 602 66 1 sh3_zsrt139l10_pal.mem 0x00000000 +545 192725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1402.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +546 192737 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1403.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +547 192744 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1404.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +548 192751 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1405.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +549 192758 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1406.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +550 192770 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1407.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +551 192777 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1408.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +552 192784 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1409.mem 377 41 1 sh3_zsrt139l10_pal.mem 0x00000000 +553 192798 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1410.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +554 192805 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1411.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +555 192819 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1412.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +556 192826 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1413.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +557 192840 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1414.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +558 192847 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1415.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +559 192854 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1416.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +560 192886 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1417.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +561 192898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1418.mem 521 57 1 sh3_zsrt139l10_pal.mem 0x00000000 +562 192919 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1419.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +563 192926 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1420.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +564 192933 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1421.mem 584 64 1 sh3_zsrt139l10_pal.mem 0x00000000 +565 192964 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1422.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +566 192971 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1423.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +567 192978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1424.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +568 193002 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1425.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +569 193009 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1426.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +570 193016 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1427.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +571 193023 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1428.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +572 193037 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1429.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +573 193044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1430.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +574 193058 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1431.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +575 193079 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1432.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +576 193086 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1433.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +577 193093 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1434.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +578 193105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1435.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +579 193112 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1436.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +580 193119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1437.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +581 193126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1438.mem 413 45 1 sh3_zsrt139l10_pal.mem 0x00000000 +582 193152 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1439.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +583 193166 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1440.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +584 193185 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1441.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +585 193204 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1442.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +586 193211 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1443.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +587 193232 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1444.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +588 193246 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1445.mem 440 48 1 sh3_zsrt139l10_pal.mem 0x00000000 +589 193260 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1446.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +590 193274 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1447.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +591 193281 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1448.mem 467 51 1 sh3_zsrt139l10_pal.mem 0x00000000 +592 193295 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1449.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +593 193302 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1450.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +594 193309 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1451.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +595 193316 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1452.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +596 193323 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1453.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +597 193337 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1454.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +598 193344 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1455.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +599 193358 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1456.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +600 193365 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1457.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +601 193391 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1458.mem 692 76 1 sh3_zsrt139l10_pal.mem 0x00000000 +602 193405 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1459.mem 719 79 1 sh3_zsrt139l10_pal.mem 0x00000000 +603 193426 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1460.mem 593 65 1 sh3_zsrt139l10_pal.mem 0x00000000 +604 193440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1461.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +605 193447 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1462.mem 539 59 1 sh3_zsrt139l10_pal.mem 0x00000000 +606 193466 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1463.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +607 193480 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1464.mem 512 56 1 sh3_zsrt139l10_pal.mem 0x00000000 +608 193499 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1465.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +609 193506 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1466.mem 215 23 1 sh3_zsrt139l10_pal.mem 0x00000000 +610 193513 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1467.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +611 193520 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1468.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +612 193527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1469.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +613 193534 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1470.mem 908 100 1 sh3_zsrt139l10_pal.mem 0x00000000 +614 193570 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1471.mem 431 47 1 sh3_zsrt139l10_pal.mem 0x00000000 +615 193584 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1472.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +616 193591 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1473.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +617 193627 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1474.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +618 193656 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1475.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +619 193663 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1476.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +620 193670 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1477.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +621 193677 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1478.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +622 193684 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1479.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +623 193691 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1480.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +624 193705 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1481.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +625 193712 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1482.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +626 193719 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1483.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +627 193733 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1484.mem 341 37 1 sh3_zsrt139l10_pal.mem 0x00000000 +628 193747 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1485.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +629 193754 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1486.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +630 193761 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1487.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +631 193780 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1488.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +632 193787 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1489.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +633 193794 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1490.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +634 193806 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1491.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +635 193820 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1492.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +636 193839 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1493.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +637 193846 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1494.mem 314 34 1 sh3_zsrt139l10_pal.mem 0x00000000 +638 193872 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1495.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +639 193898 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1496.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +640 193905 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1497.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +641 193912 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1498.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +642 193919 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1499.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +643 193926 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1500.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +644 193945 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1501.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +645 193952 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1502.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +646 193966 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1503.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +647 193978 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1504.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +648 193985 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1505.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +649 193999 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1506.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +650 194006 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1507.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +651 194030 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1508.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +652 194037 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1509.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +653 194044 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1510.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +654 194063 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1511.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +655 194070 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1512.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +656 194077 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1513.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +657 194091 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1514.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +658 194105 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1515.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +659 194119 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1516.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +660 194126 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1517.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +661 194133 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1518.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +662 194169 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1519.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +663 194176 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1520.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +664 194183 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1521.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +665 194202 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1522.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +666 194209 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1523.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +667 194216 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1524.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +668 194235 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1525.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +669 194242 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1526.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +670 194263 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1527.mem 26 2 1 sh3_zsrt139l10_pal.mem 0x00000000 +671 194277 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1528.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 +672 194296 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1529.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +673 194324 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1530.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +674 194350 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1531.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +675 194381 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1532.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +676 194395 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1533.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +677 194402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1534.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +678 194409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1535.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +679 194416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1536.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +680 194423 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1537.mem 611 67 1 sh3_zsrt139l10_pal.mem 0x00000000 +681 194456 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1538.mem 701 77 1 sh3_zsrt139l10_pal.mem 0x00000000 +682 194494 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1539.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +683 194508 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1540.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +684 194527 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1541.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +685 194541 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1542.mem 242 26 1 sh3_zsrt139l10_pal.mem 0x00000000 +686 194553 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1543.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +687 194560 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1544.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +688 194567 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1545.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +689 194581 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1546.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +690 194609 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1547.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +691 194637 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1548.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +692 194678 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1549.mem 53 5 1 sh3_zsrt139l10_pal.mem 0x00000000 +693 194690 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1550.mem 287 31 1 sh3_zsrt139l10_pal.mem 0x00000000 +694 194697 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1551.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +695 194704 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1552.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +696 194711 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1553.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +697 194718 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1554.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +698 194725 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1555.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +699 194746 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1556.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +700 194753 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1557.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +701 194760 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1558.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +702 194767 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1559.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +703 194774 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1560.mem 494 54 1 sh3_zsrt139l10_pal.mem 0x00000000 +704 194805 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1561.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +705 194819 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1562.mem 575 63 1 sh3_zsrt139l10_pal.mem 0x00000000 +706 194845 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1563.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +707 194852 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1564.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +708 194859 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1565.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +709 194883 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1566.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +710 194897 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1567.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +711 194904 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1568.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +712 194911 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1569.mem 206 22 1 sh3_zsrt139l10_pal.mem 0x00000000 +713 194918 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1570.mem 251 27 1 sh3_zsrt139l10_pal.mem 0x00000000 +714 194925 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1571.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +715 194939 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1572.mem 665 73 1 sh3_zsrt139l10_pal.mem 0x00000000 +716 194965 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1573.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +717 194984 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1574.mem 476 52 1 sh3_zsrt139l10_pal.mem 0x00000000 +718 194998 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1575.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +719 195005 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1576.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +720 195012 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1577.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +721 195031 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1578.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +722 195038 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1579.mem 377 41 1 sh3_zsrt139l10_pal.mem 0x00000000 +723 195069 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1580.mem 566 62 1 sh3_zsrt139l10_pal.mem 0x00000000 +724 195090 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1581.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +725 195104 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1582.mem 188 20 1 sh3_zsrt139l10_pal.mem 0x00000000 +726 195111 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1583.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +727 195118 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1584.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +728 195125 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1585.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +729 195139 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1586.mem 359 39 1 sh3_zsrt139l10_pal.mem 0x00000000 +730 195163 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1587.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +731 195170 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1588.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +732 195177 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1589.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +733 195194 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1590.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +734 195201 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1591.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +735 195215 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1592.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +736 195222 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1593.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +737 195229 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1594.mem 179 19 1 sh3_zsrt139l10_pal.mem 0x00000000 +738 195236 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1595.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +739 195243 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1596.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +740 195250 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1597.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +741 195257 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1598.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +742 195264 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1599.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +743 195271 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1600.mem 386 42 1 sh3_zsrt139l10_pal.mem 0x00000000 +744 195292 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1601.mem 161 17 1 sh3_zsrt139l10_pal.mem 0x00000000 +745 195306 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1602.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +746 195313 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1603.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +747 195320 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1604.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +748 195327 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1605.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +749 195334 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1606.mem 368 40 1 sh3_zsrt139l10_pal.mem 0x00000000 +750 195374 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1607.mem 89 9 1 sh3_zsrt139l10_pal.mem 0x00000000 +751 195381 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1608.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +752 195388 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1609.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +753 195402 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1610.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +754 195409 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1611.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +755 195416 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1612.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +756 195440 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1613.mem 296 32 1 sh3_zsrt139l10_pal.mem 0x00000000 +757 195461 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1614.mem 323 35 1 sh3_zsrt139l10_pal.mem 0x00000000 +758 195489 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1615.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +759 195496 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1616.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +760 195517 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1617.mem 197 21 1 sh3_zsrt139l10_pal.mem 0x00000000 +761 195531 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1618.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +762 195538 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1619.mem 80 8 1 sh3_zsrt139l10_pal.mem 0x00000000 +763 195545 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1620.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +764 195552 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1621.mem 98 10 1 sh3_zsrt139l10_pal.mem 0x00000000 +765 195559 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1622.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +766 195566 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1623.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +767 195594 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1624.mem 233 25 1 sh3_zsrt139l10_pal.mem 0x00000000 +768 195608 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1625.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +769 195622 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1626.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +770 195634 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1627.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +771 195655 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1628.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +772 195662 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1629.mem 71 7 1 sh3_zsrt139l10_pal.mem 0x00000000 +773 195669 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1630.mem 305 33 1 sh3_zsrt139l10_pal.mem 0x00000000 +774 195693 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1631.mem 332 36 1 sh3_zsrt139l10_pal.mem 0x00000000 +775 195714 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1632.mem 278 30 1 sh3_zsrt139l10_pal.mem 0x00000000 +776 195728 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1633.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +777 195735 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1634.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +778 195742 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1635.mem 125 13 1 sh3_zsrt139l10_pal.mem 0x00000000 +779 195756 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1636.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +780 195763 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1637.mem 269 29 1 sh3_zsrt139l10_pal.mem 0x00000000 +781 195777 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1638.mem 152 16 1 sh3_zsrt139l10_pal.mem 0x00000000 +782 195789 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1639.mem 260 28 1 sh3_zsrt139l10_pal.mem 0x00000000 +783 195803 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1640.mem 449 49 1 sh3_zsrt139l10_pal.mem 0x00000000 +784 195824 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1641.mem 224 24 1 sh3_zsrt139l10_pal.mem 0x00000000 +785 195838 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1642.mem 170 18 1 sh3_zsrt139l10_pal.mem 0x00000000 +786 195867 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1643.mem 107 11 1 sh3_zsrt139l10_pal.mem 0x00000000 +787 195874 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1644.mem 134 14 1 sh3_zsrt139l10_pal.mem 0x00000000 +788 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1645.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +789 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1646.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +790 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1647.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +791 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1648.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +792 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1649.mem 116 12 1 sh3_zsrt139l10_pal.mem 0x00000000 +793 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1650.mem 143 15 1 sh3_zsrt139l10_pal.mem 0x00000000 +794 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1651.mem 62 6 1 sh3_zsrt139l10_pal.mem 0x00000000 +795 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1652.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +796 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1653.mem 44 4 1 sh3_zsrt139l10_pal.mem 0x00000000 +797 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1654.mem 35 3 1 sh3_zsrt139l10_pal.mem 0x00000000 +798 195889 14336 480 sh3_zsrt139l10_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1655.mem 17 1 1 sh3_zsrt139l10_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2c_epochs.txt new file mode 100644 index 0000000..c90f3ca --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l2c_epochs.txt @@ -0,0 +1,802 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l1c'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 799 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774 +1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4 +2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4 +3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98 +4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2 +5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2 +7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4 +10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0 +11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0 +17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae +18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae +27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2 +41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2 +42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c +43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c +83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98 +84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98 +85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9 +88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff +91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8 +96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386 +97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386 +107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028 +108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028 +113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684 +114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684 +121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05 +123 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000 +124 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c +125 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c +126 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3 +127 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3 +128 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3 +129 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3 +130 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725 +131 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595 +132 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c +133 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 0 sh3_zsrt139f410_pal.mem 0x00000000 +134 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22 +135 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +136 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +137 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22 +138 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f +139 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f +140 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f +141 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +142 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1 +143 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c0.mem 35 3 0 sh3_zsrt139l1c0_pal.mem 0x00000000 +144 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c1.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +145 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c2.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +146 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c3.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +147 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c4.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +148 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c5.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +149 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c6.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +150 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c7.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +151 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c8.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +152 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c9.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +153 177029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c10.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +154 177272 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c11.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +155 177291 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c12.mem 413 45 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +156 177291 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c13.mem 557 61 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +157 177331 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c14.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +158 177350 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c15.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +159 177364 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c16.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +160 177397 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c17.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +161 177638 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c18.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +162 177671 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c19.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +163 177690 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c20.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +164 177704 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c21.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +165 177723 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c22.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +166 177737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c23.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +167 177756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c24.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +168 177756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c25.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +169 177763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c26.mem 629 69 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +170 177763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c27.mem 836 92 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +171 177803 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c28.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +172 177810 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c29.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +173 177822 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c30.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +174 177836 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c31.mem 350 38 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +175 177855 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c32.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +176 177862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c33.mem 521 57 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +177 177895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c34.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +178 177909 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c35.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +179 177928 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c36.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +180 178041 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c37.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +181 178067 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c38.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +182 178099 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c39.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +183 178138 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c40.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +184 178152 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c41.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +185 178191 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c42.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +186 178205 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c43.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +187 178224 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c44.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +188 178250 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c45.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +189 178257 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c46.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +190 178290 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c47.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +191 178304 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c48.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +192 178323 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c49.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +193 178337 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c50.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +194 178356 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c51.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +195 178370 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c52.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +196 178389 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c53.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +197 178403 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c54.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +198 178415 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c55.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +199 178422 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c56.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +200 178448 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c57.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +201 178455 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c58.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +202 178481 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c59.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +203 178488 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c60.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +204 178502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c61.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +205 178514 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c62.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +206 178528 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c63.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +207 178547 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c64.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +208 178554 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c65.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +209 178568 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c66.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +210 178580 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c67.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +211 178587 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c68.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +212 178601 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c69.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +213 178957 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c70.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +214 178964 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c71.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +215 178978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c72.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +216 178997 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c73.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +217 179011 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c74.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +218 179030 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c75.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +219 179044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c76.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +220 179063 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c77.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +221 179077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c78.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +222 179096 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c79.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +223 179110 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c80.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +224 179129 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c81.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +225 179143 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c82.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +226 179162 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c83.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +227 179228 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c84.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +228 179242 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c85.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +229 179261 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c86.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +230 179275 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c87.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +231 179308 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c88.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +232 179327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c89.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +233 179341 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c90.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +234 179360 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c91.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +235 179374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c92.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +236 179393 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c93.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +237 179407 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c94.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +238 179426 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c95.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +239 179440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c96.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +240 179466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c97.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +241 179485 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c98.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +242 179499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c99.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +243 179518 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c100.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +244 179532 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c101.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +245 179551 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c102.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +246 179565 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c103.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +247 179584 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c104.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +248 179598 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c105.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +249 179617 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c106.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +250 179631 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c107.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +251 179650 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c108.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +252 179664 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c109.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +253 179683 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c110.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +254 179697 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c111.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +255 179716 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c112.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +256 179730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c113.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +257 179749 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c114.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +258 179763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c115.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +259 179782 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c116.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +260 179796 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c117.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +261 179815 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c118.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +262 179829 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c119.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +263 179848 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c120.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +264 179862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c121.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +265 179881 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c122.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +266 179895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c123.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +267 179914 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c124.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +268 179928 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c125.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +269 179947 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c126.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +270 179961 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c127.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +271 179980 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c128.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +272 179994 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c129.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +273 180013 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c130.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +274 180027 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c131.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +275 180046 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c132.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +276 180060 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c133.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +277 180079 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c134.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +278 180093 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c135.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +279 180112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c136.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +280 180126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c137.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +281 180145 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c138.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +282 180159 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c139.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +283 180178 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c140.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +284 180192 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c141.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +285 180211 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c142.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +286 180225 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c143.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +287 180244 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c144.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +288 180258 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c145.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +289 182665 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c146.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +290 182693 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c147.mem 656 72 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +291 182753 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c148.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +292 183054 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c149.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +293 183080 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c150.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +294 183087 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c151.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +295 183094 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c152.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +296 183122 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c153.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +297 183136 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c154.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +298 183150 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c155.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +299 183157 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c156.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +300 183171 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c157.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +301 183192 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c158.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +302 183199 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c159.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +303 183213 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c160.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +304 183220 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c161.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +305 183227 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c162.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +306 183374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c163.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +307 183388 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c164.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +308 183395 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c165.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +309 183402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c166.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +310 183409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c167.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +311 183416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c168.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +312 183437 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c169.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +313 183451 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c170.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +314 183458 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c171.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +315 183465 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c172.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +316 183472 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c173.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +317 183479 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c174.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +318 183493 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c175.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +319 183507 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c176.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +320 183514 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c177.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +321 183528 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c178.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +322 183535 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c179.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +323 184077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c180.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +324 184084 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c181.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +325 184091 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c182.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +326 184098 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c183.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +327 184105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c184.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +328 184112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c185.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +329 184119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c186.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +330 184126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c187.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +331 184133 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c188.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +332 184154 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c189.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +333 184168 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c190.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +334 184175 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c191.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +335 184182 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c192.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +336 184210 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c193.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +337 184217 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c194.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +338 184224 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c195.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +339 184238 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c196.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +340 184252 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c197.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +341 184700 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c198.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +342 184720 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c199.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +343 184741 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c200.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +344 184769 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c201.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +345 184781 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c202.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +346 184790 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c203.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +347 184808 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c204.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +348 184817 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c205.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +349 184826 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c206.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +350 184853 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c207.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +351 184871 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c208.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +352 184889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c209.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +353 184898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c210.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +354 184907 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c211.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +355 184925 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c212.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +356 184934 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c213.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +357 184952 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c214.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +358 185185 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c215.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +359 185205 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c216.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +360 185219 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c217.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +361 185226 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c218.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +362 185233 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c219.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +363 185240 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c220.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +364 185254 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c221.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +365 185268 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c222.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +366 185275 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c223.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +367 185492 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c224.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +368 185525 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c225.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +369 185532 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c226.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +370 185539 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c227.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +371 185546 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c228.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +372 185553 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c229.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +373 185567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c230.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +374 185574 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c231.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +375 185581 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c232.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +376 185730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c233.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +377 185748 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c234.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +378 185757 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c235.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +379 185766 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c236.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +380 185775 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c237.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +381 185784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c238.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +382 185793 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c239.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +383 185802 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c240.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +384 185811 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c241.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +385 186061 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c242.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +386 186075 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c243.mem 683 75 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +387 186131 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c244.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +388 186138 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c245.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +389 186145 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c246.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +390 186398 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c247.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +391 186405 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c248.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +392 186412 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c249.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +393 186689 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c250.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +394 186703 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c251.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +395 186710 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c252.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +396 186717 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c253.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +397 186730 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c254.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +398 186737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c255.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +399 186744 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c256.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +400 186751 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c257.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +401 186758 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c258.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +402 186765 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c259.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +403 186772 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c260.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +404 186784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c261.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +405 186814 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c262.mem 575 63 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +406 186874 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c263.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +407 186881 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c264.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +408 186895 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c265.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +409 186922 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c266.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +410 186936 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c267.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +411 186943 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c268.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +412 186977 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c269.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +413 186984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c270.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +414 186991 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c271.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +415 186998 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c272.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +416 187111 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c273.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +417 187174 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c274.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +418 187188 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c275.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +419 187202 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c276.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +420 187241 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c277.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +421 187248 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c278.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +422 187262 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c279.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +423 187289 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c280.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +424 187296 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c281.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +425 187310 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c282.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +426 187317 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c283.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +427 187331 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c284.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +428 187418 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c285.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +429 187427 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c286.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +430 187445 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c287.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +431 187454 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c288.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +432 187472 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c289.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +433 187490 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c290.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +434 187499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c291.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +435 187542 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c292.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +436 187760 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c293.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +437 187794 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c294.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +438 187808 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c295.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +439 187815 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c296.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +440 187822 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c297.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +441 187829 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c298.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +442 187856 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c299.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +443 187870 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c300.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +444 187877 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c301.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +445 187884 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c302.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +446 187957 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c303.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +447 187966 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c304.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +448 187975 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c305.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +449 187984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c306.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +450 188110 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c307.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +451 188349 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c308.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +452 188363 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c309.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +453 188383 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c310.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +454 188390 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c311.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +455 188488 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c312.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +456 188495 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c313.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +457 188502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c314.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +458 188981 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c315.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +459 189020 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c316.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +460 189029 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c317.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +461 189038 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c318.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +462 189096 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c319.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +463 189117 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c320.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +464 189124 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c321.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +465 189131 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c322.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +466 189537 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c323.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +467 189544 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c324.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +468 189578 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c325.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +469 189592 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c326.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +470 189614 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c327.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +471 189633 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c328.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +472 189691 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c329.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +473 189711 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c330.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +474 189725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c331.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +475 189789 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c332.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +476 189796 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c333.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +477 189810 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c334.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +478 189817 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c335.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +479 189836 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c336.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +480 189850 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c337.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +481 189857 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c338.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +482 190017 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c339.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +483 190080 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c340.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +484 190107 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c341.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +485 190114 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c342.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +486 190128 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c343.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +487 190135 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c344.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +488 190169 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c345.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +489 190176 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c346.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +490 190208 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c347.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +491 190215 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c348.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +492 190222 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c349.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +493 190229 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c350.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +494 190393 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c351.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +495 190425 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c352.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +496 190439 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c353.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +497 190466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c354.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +498 190493 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c355.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +499 190500 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c356.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +500 190737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c357.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +501 190770 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c358.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +502 190855 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c359.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +503 190862 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c360.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +504 190889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c361.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +505 190896 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c362.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +506 190910 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c363.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +507 190936 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c364.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +508 190943 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c365.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +509 190950 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c366.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +510 191220 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c367.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +511 191234 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c368.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +512 191268 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c369.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +513 191287 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c370.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +514 191294 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c371.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +515 191327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c372.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +516 191334 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c373.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +517 191348 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c374.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +518 191526 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c375.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +519 191533 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c376.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +520 191560 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c377.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +521 191615 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c378.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +522 191645 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c379.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +523 191712 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c380.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +524 191726 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c381.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +525 192434 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c382.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +526 192441 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c383.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +527 192448 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c384.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +528 192475 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c385.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +529 192495 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c386.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +530 192502 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c387.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +531 192527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c388.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +532 192534 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c389.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +533 192541 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c390.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +534 192567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c391.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +535 192587 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c392.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +536 192601 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c393.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +537 192620 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c394.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +538 192627 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c395.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +539 192634 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c396.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +540 192666 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c397.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +541 192673 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c398.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +542 192680 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c399.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +543 192687 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c400.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +544 192694 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c401.mem 602 66 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +545 192725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c402.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +546 192737 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c403.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +547 192744 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c404.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +548 192751 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c405.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +549 192758 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c406.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +550 192770 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c407.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +551 192777 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c408.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +552 192784 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c409.mem 377 41 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +553 192798 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c410.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +554 192805 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c411.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +555 192819 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c412.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +556 192826 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c413.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +557 192840 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c414.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +558 192847 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c415.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +559 192854 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c416.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +560 192886 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c417.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +561 192898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c418.mem 521 57 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +562 192919 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c419.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +563 192926 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c420.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +564 192933 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c421.mem 584 64 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +565 192964 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c422.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +566 192971 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c423.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +567 192978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c424.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +568 193002 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c425.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +569 193009 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c426.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +570 193016 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c427.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +571 193023 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c428.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +572 193037 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c429.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +573 193044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c430.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +574 193058 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c431.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +575 193079 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c432.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +576 193086 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c433.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +577 193093 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c434.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +578 193105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c435.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +579 193112 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c436.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +580 193119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c437.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +581 193126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c438.mem 413 45 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +582 193152 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c439.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +583 193166 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c440.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +584 193185 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c441.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +585 193204 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c442.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +586 193211 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c443.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +587 193232 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c444.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +588 193246 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c445.mem 440 48 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +589 193260 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c446.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +590 193274 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c447.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +591 193281 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c448.mem 467 51 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +592 193295 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c449.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +593 193302 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c450.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +594 193309 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c451.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +595 193316 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c452.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +596 193323 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c453.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +597 193337 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c454.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +598 193344 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c455.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +599 193358 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c456.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +600 193365 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c457.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +601 193391 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c458.mem 692 76 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +602 193405 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c459.mem 719 79 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +603 193426 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c460.mem 593 65 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +604 193440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c461.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +605 193447 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c462.mem 539 59 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +606 193466 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c463.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +607 193480 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c464.mem 512 56 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +608 193499 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c465.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +609 193506 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c466.mem 215 23 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +610 193513 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c467.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +611 193520 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c468.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +612 193527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c469.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +613 193534 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c470.mem 908 100 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +614 193570 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c471.mem 431 47 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +615 193584 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c472.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +616 193591 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c473.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +617 193627 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c474.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +618 193656 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c475.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +619 193663 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c476.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +620 193670 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c477.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +621 193677 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c478.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +622 193684 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c479.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +623 193691 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c480.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +624 193705 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c481.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +625 193712 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c482.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +626 193719 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c483.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +627 193733 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c484.mem 341 37 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +628 193747 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c485.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +629 193754 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c486.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +630 193761 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c487.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +631 193780 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c488.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +632 193787 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c489.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +633 193794 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c490.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +634 193806 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c491.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +635 193820 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c492.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +636 193839 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c493.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +637 193846 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c494.mem 314 34 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +638 193872 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c495.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +639 193898 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c496.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +640 193905 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c497.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +641 193912 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c498.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +642 193919 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c499.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +643 193926 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c500.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +644 193945 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c501.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +645 193952 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c502.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +646 193966 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c503.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +647 193978 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c504.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +648 193985 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c505.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +649 193999 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c506.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +650 194006 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c507.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +651 194030 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c508.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +652 194037 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c509.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +653 194044 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c510.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +654 194063 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c511.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +655 194070 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c512.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +656 194077 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c513.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +657 194091 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c514.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +658 194105 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c515.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +659 194119 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c516.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +660 194126 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c517.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +661 194133 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c518.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +662 194169 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c519.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +663 194176 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c520.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +664 194183 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c521.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +665 194202 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c522.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +666 194209 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c523.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +667 194216 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c524.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +668 194235 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c525.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +669 194242 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c526.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +670 194263 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c527.mem 26 2 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +671 194277 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c528.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +672 194296 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c529.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +673 194324 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c530.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +674 194350 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c531.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +675 194381 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c532.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +676 194395 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c533.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +677 194402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c534.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +678 194409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c535.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +679 194416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c536.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +680 194423 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c537.mem 611 67 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +681 194456 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c538.mem 701 77 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +682 194494 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c539.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +683 194508 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c540.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +684 194527 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c541.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +685 194541 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c542.mem 242 26 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +686 194553 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c543.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +687 194560 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c544.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +688 194567 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c545.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +689 194581 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c546.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +690 194609 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c547.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +691 194637 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c548.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +692 194678 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c549.mem 53 5 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +693 194690 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c550.mem 287 31 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +694 194697 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c551.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +695 194704 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c552.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +696 194711 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c553.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +697 194718 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c554.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +698 194725 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c555.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +699 194746 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c556.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +700 194753 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c557.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +701 194760 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c558.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +702 194767 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c559.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +703 194774 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c560.mem 494 54 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +704 194805 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c561.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +705 194819 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c562.mem 575 63 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +706 194845 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c563.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +707 194852 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c564.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +708 194859 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c565.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +709 194883 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c566.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +710 194897 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c567.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +711 194904 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c568.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +712 194911 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c569.mem 206 22 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +713 194918 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c570.mem 251 27 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +714 194925 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c571.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +715 194939 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c572.mem 665 73 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +716 194965 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c573.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +717 194984 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c574.mem 476 52 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +718 194998 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c575.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +719 195005 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c576.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +720 195012 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c577.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +721 195031 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c578.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +722 195038 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c579.mem 377 41 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +723 195069 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c580.mem 566 62 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +724 195090 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c581.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +725 195104 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c582.mem 188 20 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +726 195111 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c583.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +727 195118 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c584.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +728 195125 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c585.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +729 195139 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c586.mem 359 39 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +730 195163 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c587.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +731 195170 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c588.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +732 195177 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c589.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +733 195194 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c590.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +734 195201 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c591.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +735 195215 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c592.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +736 195222 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c593.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +737 195229 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c594.mem 179 19 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +738 195236 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c595.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +739 195243 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c596.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +740 195250 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c597.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +741 195257 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c598.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +742 195264 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c599.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +743 195271 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c600.mem 386 42 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +744 195292 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c601.mem 161 17 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +745 195306 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c602.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +746 195313 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c603.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +747 195320 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c604.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +748 195327 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c605.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +749 195334 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c606.mem 368 40 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +750 195374 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c607.mem 89 9 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +751 195381 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c608.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +752 195388 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c609.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +753 195402 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c610.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +754 195409 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c611.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +755 195416 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c612.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +756 195440 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c613.mem 296 32 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +757 195461 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c614.mem 323 35 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +758 195489 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c615.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +759 195496 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c616.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +760 195517 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c617.mem 197 21 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +761 195531 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c618.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +762 195538 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c619.mem 80 8 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +763 195545 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c620.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +764 195552 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c621.mem 98 10 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +765 195559 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c622.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +766 195566 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c623.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +767 195594 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c624.mem 233 25 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +768 195608 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c625.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +769 195622 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c626.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +770 195634 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c627.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +771 195655 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c628.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +772 195662 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c629.mem 71 7 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +773 195669 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c630.mem 305 33 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +774 195693 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c631.mem 332 36 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +775 195714 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c632.mem 278 30 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +776 195728 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c633.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +777 195735 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c634.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +778 195742 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c635.mem 125 13 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +779 195756 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c636.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +780 195763 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c637.mem 269 29 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +781 195777 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c638.mem 152 16 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +782 195789 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c639.mem 260 28 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +783 195803 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c640.mem 449 49 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +784 195824 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c641.mem 224 24 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +785 195838 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c642.mem 170 18 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +786 195867 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c643.mem 107 11 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +787 195874 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c644.mem 134 14 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +788 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c645.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +789 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c646.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +790 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c647.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +791 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c648.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +792 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c649.mem 116 12 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +793 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c650.mem 143 15 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +794 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c651.mem 62 6 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +795 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c652.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +796 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c653.mem 44 4 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +797 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c654.mem 35 3 1 sh3_zsrt139l1c0_pal.mem 0x00000000 +798 195889 14336 480 sh3_zsrt139l1c0_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l1c655.mem 17 1 1 sh3_zsrt139l1c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3_epochs.txt new file mode 100644 index 0000000..198ad8c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3_epochs.txt @@ -0,0 +1,28 @@ +# Ch434 epoch descriptor table (22 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 22 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l30.mem 35 3 0 sh3_zsrt139l30_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l31.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l32.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l33.mem 62 6 1 sh3_zsrt139l30_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l34.mem 116 12 1 sh3_zsrt139l30_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l35.mem 143 15 1 sh3_zsrt139l30_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l36.mem 62 6 1 sh3_zsrt139l30_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l37.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l38.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l39.mem 35 3 1 sh3_zsrt139l30_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139l30_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l310.mem 17 1 1 sh3_zsrt139l30_pal.mem 0x00000000 +11 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l311.mem 35 3 0 sh3_zsrt139l30_pal.mem 0x00000000 +12 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l312.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +13 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l313.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +14 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l314.mem 62 6 1 sh3_zsrt139l30_pal.mem 0x00000000 +15 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l315.mem 116 12 1 sh3_zsrt139l30_pal.mem 0x00000000 +16 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l316.mem 143 15 1 sh3_zsrt139l30_pal.mem 0x00000000 +17 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l317.mem 62 6 1 sh3_zsrt139l30_pal.mem 0x00000000 +18 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l318.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +19 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l319.mem 44 4 1 sh3_zsrt139l30_pal.mem 0x00000000 +20 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l320.mem 35 3 1 sh3_zsrt139l30_pal.mem 0x00000000 +21 195973 8192 480 sh3_zsrt139l311_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l321.mem 17 1 1 sh3_zsrt139l30_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3d_epochs.txt new file mode 100644 index 0000000..a6a579b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3d_epochs.txt @@ -0,0 +1,28 @@ +# Ch434 epoch descriptor table (22 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 22 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d0.mem 35 3 0 sh3_zsrt139l3d0_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d1.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d2.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d3.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d4.mem 116 12 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d5.mem 143 15 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d6.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d7.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d8.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d9.mem 35 3 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d10.mem 17 1 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +11 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d11.mem 35 3 0 sh3_zsrt139l3d0_pal.mem 0x00000000 +12 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d12.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +13 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d13.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +14 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d14.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +15 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d15.mem 116 12 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +16 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d16.mem 143 15 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +17 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d17.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +18 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d18.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +19 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d19.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +20 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d20.mem 35 3 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +21 195973 8192 480 sh3_zsrt139l3d11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3d21.mem 17 1 1 sh3_zsrt139l3d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3e_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3e_epochs.txt new file mode 100644 index 0000000..4de5742 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3e_epochs.txt @@ -0,0 +1,14 @@ +# merged runtime-CLUT scheduler fixture: ['zsrt139l3d@0:10', 'zsrt139l3d@10:11'] +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +0 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d0.mem 35 3 0 sh3_zsrt139l3d0_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d1.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d2.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d3.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d4.mem 116 12 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d5.mem 143 15 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d6.mem 62 6 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d7.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d8.mem 44 4 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d9.mem 35 3 1 sh3_zsrt139l3d0_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139l3d0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3d10.mem 17 1 1 sh3_zsrt139l3d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3f_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3f_epochs.txt new file mode 100644 index 0000000..2aaf421 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3f_epochs.txt @@ -0,0 +1,28 @@ +# Ch435 epoch descriptor table (22 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 22 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f0.mem 35 3 0 sh3_zsrt139l3f0_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f1.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f2.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f3.mem 62 6 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f4.mem 116 12 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f5.mem 143 15 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f6.mem 62 6 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f7.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f8.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f9.mem 35 3 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139l3f0_tex_lpddr.mem 0x200000 262144 0xdfb3b054 feeder_sh3_zsrt139l3f10.mem 17 1 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +11 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f11.mem 35 3 0 sh3_zsrt139l3f0_pal.mem 0x00000000 +12 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f12.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +13 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f13.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +14 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f14.mem 62 6 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +15 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f15.mem 116 12 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +16 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f16.mem 143 15 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +17 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f17.mem 62 6 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +18 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f18.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +19 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f19.mem 44 4 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +20 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f20.mem 35 3 1 sh3_zsrt139l3f0_pal.mem 0x00000000 +21 195973 8192 480 sh3_zsrt139l3f11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3f21.mem 17 1 1 sh3_zsrt139l3f0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3fix_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3fix_epochs.txt new file mode 100644 index 0000000..9542ee9 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l3fix_epochs.txt @@ -0,0 +1,28 @@ +# Ch434 epoch descriptor table (22 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 22 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix0.mem 35 3 0 sh3_zsrt139l3fix0_pal.mem 0x00000000 +1 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix1.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +2 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix2.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +3 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix3.mem 62 6 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +4 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix4.mem 116 12 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +5 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix5.mem 143 15 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +6 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix6.mem 62 6 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +7 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix7.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +8 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix8.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +9 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix9.mem 35 3 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +10 195957 8192 480 sh3_zsrt139l3fix0_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139l3fix10.mem 17 1 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +11 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix11.mem 35 3 0 sh3_zsrt139l3fix0_pal.mem 0x00000000 +12 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix12.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +13 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix13.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +14 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix14.mem 62 6 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +15 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix15.mem 116 12 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +16 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix16.mem 143 15 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +17 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix17.mem 62 6 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +18 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix18.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +19 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix19.mem 44 4 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +20 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix20.mem 35 3 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 +21 195973 8192 480 sh3_zsrt139l3fix11_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139l3fix21.mem 17 1 1 sh3_zsrt139l3fix0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4_epochs.txt new file mode 100644 index 0000000..dc84faf --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l40.mem 35 3 0 sh3_zsrt139l40_pal.mem 0x00000000 +1 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l41.mem 44 4 1 sh3_zsrt139l40_pal.mem 0x00000000 +2 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l42.mem 44 4 1 sh3_zsrt139l40_pal.mem 0x00000000 +3 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l43.mem 62 6 1 sh3_zsrt139l40_pal.mem 0x00000000 +4 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l44.mem 116 12 1 sh3_zsrt139l40_pal.mem 0x00000000 +5 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l45.mem 143 15 1 sh3_zsrt139l40_pal.mem 0x00000000 +6 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l46.mem 62 6 1 sh3_zsrt139l40_pal.mem 0x00000000 +7 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l47.mem 44 4 1 sh3_zsrt139l40_pal.mem 0x00000000 +8 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l48.mem 44 4 1 sh3_zsrt139l40_pal.mem 0x00000000 +9 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l49.mem 35 3 1 sh3_zsrt139l40_pal.mem 0x00000000 +10 196087 10240 480 sh3_zsrt139l40_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l410.mem 17 1 1 sh3_zsrt139l40_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4c_epochs.txt new file mode 100644 index 0000000..2d4c42d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4c_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c0.mem 35 3 0 sh3_zsrt139l4c0_pal.mem 0x00000000 +1 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c1.mem 44 4 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +2 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c2.mem 44 4 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +3 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c3.mem 62 6 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +4 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c4.mem 116 12 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +5 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c5.mem 143 15 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +6 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c6.mem 62 6 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +7 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c7.mem 44 4 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +8 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c8.mem 44 4 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +9 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c9.mem 35 3 1 sh3_zsrt139l4c0_pal.mem 0x00000000 +10 196087 10240 480 sh3_zsrt139l4c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l4c10.mem 17 1 1 sh3_zsrt139l4c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4d_epochs.txt new file mode 100644 index 0000000..f1c6426 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4d_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d0.mem 35 3 0 sh3_zsrt139l4d0_pal.mem 0x00000000 +1 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d1.mem 44 4 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +2 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d2.mem 44 4 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +3 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d3.mem 62 6 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +4 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d4.mem 116 12 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +5 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d5.mem 143 15 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +6 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d6.mem 62 6 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +7 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d7.mem 44 4 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +8 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d8.mem 44 4 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +9 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d9.mem 35 3 1 sh3_zsrt139l4d0_pal.mem 0x00000000 +10 196087 10240 480 sh3_zsrt139l4d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l4d10.mem 17 1 1 sh3_zsrt139l4d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4e_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4e_epochs.txt new file mode 100644 index 0000000..b8fe9d0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4e_epochs.txt @@ -0,0 +1,17 @@ +# Ch435 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e0.mem 35 3 0 sh3_zsrt139l4e0_pal.mem 0x00000000 +1 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e1.mem 44 4 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +2 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e2.mem 44 4 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +3 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e3.mem 62 6 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +4 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e4.mem 107 11 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +5 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e5.mem 152 16 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +6 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e6.mem 62 6 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +7 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e7.mem 44 4 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +8 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e8.mem 44 4 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +9 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e9.mem 35 3 1 sh3_zsrt139l4e0_pal.mem 0x00000000 +10 196087 10240 480 sh3_zsrt139l4e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l4e10.mem 17 1 1 sh3_zsrt139l4e0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4fix_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4fix_epochs.txt new file mode 100644 index 0000000..6cfbd94 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l4fix_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix0.mem 35 3 0 sh3_zsrt139l4fix0_pal.mem 0x00000000 +1 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix1.mem 44 4 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +2 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix2.mem 44 4 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +3 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix3.mem 62 6 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +4 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix4.mem 116 12 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +5 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix5.mem 143 15 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +6 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix6.mem 62 6 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +7 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix7.mem 44 4 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +8 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix8.mem 44 4 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +9 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix9.mem 35 3 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 +10 196087 10240 480 sh3_zsrt139l4fix0_tex_lpddr.mem 0x200000 262144 0xe1ffef1e feeder_sh3_zsrt139l4fix10.mem 17 1 1 sh3_zsrt139l4fix0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5_epochs.txt new file mode 100644 index 0000000..2fd2788 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l50.mem 35 3 0 sh3_zsrt139l50_pal.mem 0x00000000 +1 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l51.mem 44 4 1 sh3_zsrt139l50_pal.mem 0x00000000 +2 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l52.mem 44 4 1 sh3_zsrt139l50_pal.mem 0x00000000 +3 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l53.mem 62 6 1 sh3_zsrt139l50_pal.mem 0x00000000 +4 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l54.mem 116 12 1 sh3_zsrt139l50_pal.mem 0x00000000 +5 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l55.mem 143 15 1 sh3_zsrt139l50_pal.mem 0x00000000 +6 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l56.mem 62 6 1 sh3_zsrt139l50_pal.mem 0x00000000 +7 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l57.mem 44 4 1 sh3_zsrt139l50_pal.mem 0x00000000 +8 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l58.mem 44 4 1 sh3_zsrt139l50_pal.mem 0x00000000 +9 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l59.mem 35 3 1 sh3_zsrt139l50_pal.mem 0x00000000 +10 196108 11264 480 sh3_zsrt139l50_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l510.mem 17 1 1 sh3_zsrt139l50_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5c_epochs.txt new file mode 100644 index 0000000..af8ebf7 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5c_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c0.mem 35 3 0 sh3_zsrt139l5c0_pal.mem 0x00000000 +1 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c1.mem 44 4 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +2 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c2.mem 44 4 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +3 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c3.mem 62 6 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +4 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c4.mem 116 12 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +5 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c5.mem 143 15 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +6 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c6.mem 62 6 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +7 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c7.mem 44 4 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +8 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c8.mem 44 4 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +9 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c9.mem 35 3 1 sh3_zsrt139l5c0_pal.mem 0x00000000 +10 196108 11264 480 sh3_zsrt139l5c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l5c10.mem 17 1 1 sh3_zsrt139l5c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5d_epochs.txt new file mode 100644 index 0000000..21e063b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5d_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d0.mem 35 3 0 sh3_zsrt139l5d0_pal.mem 0x00000000 +1 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d1.mem 44 4 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +2 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d2.mem 44 4 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +3 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d3.mem 62 6 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +4 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d4.mem 116 12 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +5 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d5.mem 143 15 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +6 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d6.mem 62 6 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +7 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d7.mem 44 4 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +8 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d8.mem 44 4 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +9 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d9.mem 35 3 1 sh3_zsrt139l5d0_pal.mem 0x00000000 +10 196108 11264 480 sh3_zsrt139l5d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l5d10.mem 17 1 1 sh3_zsrt139l5d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5e_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5e_epochs.txt new file mode 100644 index 0000000..5a42eb3 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l5e_epochs.txt @@ -0,0 +1,17 @@ +# Ch435 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e0.mem 35 3 0 sh3_zsrt139l5e0_pal.mem 0x00000000 +1 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e1.mem 44 4 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +2 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e2.mem 44 4 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +3 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e3.mem 62 6 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +4 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e4.mem 107 11 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +5 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e5.mem 152 16 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +6 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e6.mem 62 6 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +7 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e7.mem 44 4 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +8 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e8.mem 44 4 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +9 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e9.mem 35 3 1 sh3_zsrt139l5e0_pal.mem 0x00000000 +10 196108 11264 480 sh3_zsrt139l5e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l5e10.mem 17 1 1 sh3_zsrt139l5e0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6_epochs.txt new file mode 100644 index 0000000..97c6014 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l60.mem 35 3 0 sh3_zsrt139l60_pal.mem 0x00000000 +1 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l61.mem 44 4 1 sh3_zsrt139l60_pal.mem 0x00000000 +2 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l62.mem 44 4 1 sh3_zsrt139l60_pal.mem 0x00000000 +3 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l63.mem 62 6 1 sh3_zsrt139l60_pal.mem 0x00000000 +4 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l64.mem 116 12 1 sh3_zsrt139l60_pal.mem 0x00000000 +5 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l65.mem 143 15 1 sh3_zsrt139l60_pal.mem 0x00000000 +6 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l66.mem 62 6 1 sh3_zsrt139l60_pal.mem 0x00000000 +7 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l67.mem 44 4 1 sh3_zsrt139l60_pal.mem 0x00000000 +8 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l68.mem 44 4 1 sh3_zsrt139l60_pal.mem 0x00000000 +9 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l69.mem 35 3 1 sh3_zsrt139l60_pal.mem 0x00000000 +10 196129 10240 480 sh3_zsrt139l60_tex_lpddr.mem 0x200000 262144 0x2dff00d2 feeder_sh3_zsrt139l610.mem 17 1 1 sh3_zsrt139l60_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6c_epochs.txt new file mode 100644 index 0000000..467b28e --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6c_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c0.mem 35 3 0 sh3_zsrt139l6c0_pal.mem 0x00000000 +1 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c1.mem 44 4 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +2 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c2.mem 44 4 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +3 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c3.mem 62 6 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +4 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c4.mem 116 12 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +5 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c5.mem 143 15 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +6 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c6.mem 62 6 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +7 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c7.mem 44 4 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +8 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c8.mem 44 4 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +9 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c9.mem 35 3 1 sh3_zsrt139l6c0_pal.mem 0x00000000 +10 196129 10240 480 sh3_zsrt139l6c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l6c10.mem 17 1 1 sh3_zsrt139l6c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6d_epochs.txt new file mode 100644 index 0000000..81d977b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6d_epochs.txt @@ -0,0 +1,17 @@ +# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d0.mem 35 3 0 sh3_zsrt139l6d0_pal.mem 0x00000000 +1 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d1.mem 44 4 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +2 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d2.mem 44 4 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +3 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d3.mem 62 6 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +4 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d4.mem 116 12 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +5 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d5.mem 143 15 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +6 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d6.mem 62 6 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +7 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d7.mem 44 4 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +8 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d8.mem 44 4 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +9 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d9.mem 35 3 1 sh3_zsrt139l6d0_pal.mem 0x00000000 +10 196129 10240 480 sh3_zsrt139l6d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l6d10.mem 17 1 1 sh3_zsrt139l6d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6e_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6e_epochs.txt new file mode 100644 index 0000000..d434695 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l6e_epochs.txt @@ -0,0 +1,17 @@ +# Ch435 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e0.mem 35 3 0 sh3_zsrt139l6e0_pal.mem 0x00000000 +1 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e1.mem 44 4 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +2 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e2.mem 44 4 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +3 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e3.mem 62 6 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +4 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e4.mem 107 11 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +5 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e5.mem 152 16 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +6 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e6.mem 62 6 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +7 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e7.mem 44 4 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +8 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e8.mem 44 4 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +9 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e9.mem 35 3 1 sh3_zsrt139l6e0_pal.mem 0x00000000 +10 196129 10240 480 sh3_zsrt139l6e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l6e10.mem 17 1 1 sh3_zsrt139l6e0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7_epochs.txt new file mode 100644 index 0000000..4c4b615 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7_epochs.txt @@ -0,0 +1,45 @@ +# Ch434 epoch descriptor table (39 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 39 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l70.mem 35 3 0 sh3_zsrt139l70_pal.mem 0x00000000 +1 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l71.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +2 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l72.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +3 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l73.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +4 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l74.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +5 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l75.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +6 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l76.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +7 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l77.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +8 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l78.mem 89 9 1 sh3_zsrt139l70_pal.mem 0x00000000 +9 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l79.mem 467 51 1 sh3_zsrt139l70_pal.mem 0x00000000 +10 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l710.mem 359 39 1 sh3_zsrt139l70_pal.mem 0x00000000 +11 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l711.mem 98 10 1 sh3_zsrt139l70_pal.mem 0x00000000 +12 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l712.mem 71 7 1 sh3_zsrt139l70_pal.mem 0x00000000 +13 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l713.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +14 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l714.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +15 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l715.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +16 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l716.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +17 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l717.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +18 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l718.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +19 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l719.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +20 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l720.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +21 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l721.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +22 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l722.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +23 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l723.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +24 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l724.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +25 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l725.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +26 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l726.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +27 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l727.mem 80 8 1 sh3_zsrt139l70_pal.mem 0x00000000 +28 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l728.mem 287 31 1 sh3_zsrt139l70_pal.mem 0x00000000 +29 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l729.mem 530 58 1 sh3_zsrt139l70_pal.mem 0x00000000 +30 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l730.mem 107 11 1 sh3_zsrt139l70_pal.mem 0x00000000 +31 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l731.mem 71 7 1 sh3_zsrt139l70_pal.mem 0x00000000 +32 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l732.mem 62 6 1 sh3_zsrt139l70_pal.mem 0x00000000 +33 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l733.mem 53 5 1 sh3_zsrt139l70_pal.mem 0x00000000 +34 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l734.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +35 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l735.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +36 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l736.mem 44 4 1 sh3_zsrt139l70_pal.mem 0x00000000 +37 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l737.mem 35 3 1 sh3_zsrt139l70_pal.mem 0x00000000 +38 196167 11264 480 sh3_zsrt139l70_tex_lpddr.mem 0x200000 262144 0x9eff00e1 feeder_sh3_zsrt139l738.mem 26 2 1 sh3_zsrt139l70_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7c_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7c_epochs.txt new file mode 100644 index 0000000..7e1170d --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7c_epochs.txt @@ -0,0 +1,45 @@ +# Ch434 epoch descriptor table (39 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 39 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c0.mem 35 3 0 sh3_zsrt139l7c0_pal.mem 0x00000000 +1 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c1.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +2 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c2.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +3 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c3.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +4 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c4.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +5 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c5.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +6 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c6.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +7 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c7.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +8 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c8.mem 89 9 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +9 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c9.mem 467 51 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +10 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c10.mem 359 39 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +11 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c11.mem 98 10 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +12 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c12.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +13 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c13.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +14 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c14.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +15 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c15.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +16 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c16.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +17 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c17.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +18 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c18.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +19 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c19.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +20 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c20.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +21 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c21.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +22 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c22.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +23 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c23.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +24 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c24.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +25 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c25.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +26 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c26.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +27 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c27.mem 80 8 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +28 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c28.mem 287 31 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +29 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c29.mem 530 58 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +30 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c30.mem 107 11 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +31 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c31.mem 71 7 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +32 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c32.mem 62 6 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +33 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c33.mem 53 5 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +34 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c34.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +35 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c35.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +36 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c36.mem 44 4 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +37 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c37.mem 35 3 1 sh3_zsrt139l7c0_pal.mem 0x00000000 +38 196167 11264 480 sh3_zsrt139l7c0_tex_lpddr.mem 0x200000 262144 0xedffb312 feeder_sh3_zsrt139l7c38.mem 26 2 1 sh3_zsrt139l7c0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7d_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7d_epochs.txt new file mode 100644 index 0000000..0248e01 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7d_epochs.txt @@ -0,0 +1,45 @@ +# Ch434 epoch descriptor table (39 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 39 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d0.mem 35 3 0 sh3_zsrt139l7d0_pal.mem 0x00000000 +1 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d1.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +2 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d2.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +3 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d3.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +4 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d4.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +5 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d5.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +6 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d6.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +7 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d7.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +8 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d8.mem 89 9 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +9 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d9.mem 467 51 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +10 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d10.mem 359 39 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +11 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d11.mem 98 10 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +12 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d12.mem 71 7 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +13 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d13.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +14 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d14.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +15 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d15.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +16 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d16.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +17 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d17.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +18 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d18.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +19 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d19.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +20 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d20.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +21 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d21.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +22 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d22.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +23 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d23.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +24 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d24.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +25 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d25.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +26 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d26.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +27 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d27.mem 80 8 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +28 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d28.mem 287 31 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +29 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d29.mem 530 58 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +30 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d30.mem 107 11 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +31 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d31.mem 71 7 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +32 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d32.mem 62 6 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +33 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d33.mem 53 5 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +34 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d34.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +35 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d35.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +36 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d36.mem 44 4 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +37 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d37.mem 35 3 1 sh3_zsrt139l7d0_pal.mem 0x00000000 +38 196167 11264 480 sh3_zsrt139l7d0_tex_lpddr.mem 0x200000 262144 0x7cffae83 feeder_sh3_zsrt139l7d38.mem 26 2 1 sh3_zsrt139l7d0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7e_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7e_epochs.txt new file mode 100644 index 0000000..30c84f3 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139l7e_epochs.txt @@ -0,0 +1,45 @@ +# Ch435 epoch descriptor table (39 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 39 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e0.mem 35 3 0 sh3_zsrt139l7e0_pal.mem 0x00000000 +1 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e1.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +2 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e2.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +3 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e3.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +4 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e4.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +5 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e5.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +6 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e6.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +7 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e7.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +8 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e8.mem 89 9 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +9 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e9.mem 476 52 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +10 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e10.mem 359 39 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +11 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e11.mem 98 10 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +12 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e12.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +13 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e13.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +14 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e14.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +15 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e15.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +16 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e16.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +17 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e17.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +18 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e18.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +19 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e19.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +20 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e20.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +21 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e21.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +22 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e22.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +23 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e23.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +24 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e24.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +25 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e25.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +26 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e26.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +27 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e27.mem 80 8 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +28 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e28.mem 278 30 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +29 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e29.mem 539 59 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +30 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e30.mem 107 11 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +31 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e31.mem 71 7 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +32 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e32.mem 62 6 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +33 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e33.mem 53 5 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +34 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e34.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +35 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e35.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +36 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e36.mem 44 4 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +37 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e37.mem 35 3 1 sh3_zsrt139l7e0_pal.mem 0x00000000 +38 196167 11264 480 sh3_zsrt139l7e0_tex_lpddr.mem 0x200000 262144 0xfcffae83 feeder_sh3_zsrt139l7e38.mem 26 2 1 sh3_zsrt139l7e0_pal.mem 0x00000000 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt139o6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt139o6_epochs.txt new file mode 100644 index 0000000..af0a64f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt139o6_epochs.txt @@ -0,0 +1,9 @@ +# Ch394 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 89548 9216 500 sh3_zsrt139o60_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139o60.mem 1231 136 0 sh3_zsrt139o60_pal.mem 0x5dfce0a2 +1 89974 9216 500 sh3_zsrt139o61_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139o61.mem 1231 136 1 sh3_zsrt139o61_pal.mem 0x5dfce0a2 +2 90400 9216 500 sh3_zsrt139o62_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139o62.mem 1231 136 1 sh3_zsrt139o62_pal.mem 0x5dfce0a2 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt24_epochs.txt new file mode 100644 index 0000000..ed4facc --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt24_epochs.txt @@ -0,0 +1,14 @@ +# Ch367 epoch descriptor table (8 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 119471 8192 480 sh3_zsrt240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt240.mem 1843 204 0 sh3_zsrt240_pal.mem 0x47097d4c +1 120110 8192 480 sh3_zsrt241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt241.mem 1843 204 1 sh3_zsrt241_pal.mem 0x47097d4c +2 120749 8192 480 sh3_zsrt242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt242.mem 1843 204 1 sh3_zsrt242_pal.mem 0x47097d4c +3 121388 8192 480 sh3_zsrt243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt243.mem 1843 204 1 sh3_zsrt243_pal.mem 0x47097d4c +4 122027 8192 480 sh3_zsrt244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt244.mem 1843 204 1 sh3_zsrt244_pal.mem 0x47097d4c +5 129389 8192 480 sh3_zsrt245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt245.mem 1843 204 1 sh3_zsrt245_pal.mem 0x47097d4c +6 130241 8192 480 sh3_zsrt246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt246.mem 1843 204 1 sh3_zsrt246_pal.mem 0x47097d4c +7 130880 8192 480 sh3_zsrt247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt247.mem 1843 204 1 sh3_zsrt247_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrt3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrt3_epochs.txt new file mode 100644 index 0000000..4c247e1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrt3_epochs.txt @@ -0,0 +1,9 @@ +# Ch357 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 8634 11264 480 sh3_zsrt30_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt30.mem 421 46 0 sh3_zsrt30_pal.mem 0x32ed74c4 +1 12757 10240 484 sh3_zsrt31_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt31.mem 529 58 0 sh3_zsrt31_pal.mem 0x3cd88c98 +2 145742 12288 488 sh3_zsrt32_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt32.mem 169 18 0 sh3_zsrt32_pal.mem 0x3e849a98 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtb24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtb24_epochs.txt new file mode 100644 index 0000000..dca9178 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtb24_epochs.txt @@ -0,0 +1,14 @@ +# Ch368 epoch descriptor table (8 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 114590 0 500 sh3_zsrtb240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb240.mem 1843 204 0 sh3_zsrtb240_pal.mem 0x47097d4c +1 115229 0 500 sh3_zsrtb241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb241.mem 1843 204 1 sh3_zsrtb241_pal.mem 0x47097d4c +2 115925 0 500 sh3_zsrtb242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb242.mem 1843 204 1 sh3_zsrtb242_pal.mem 0x47097d4c +3 117599 0 500 sh3_zsrtb243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb243.mem 1843 204 1 sh3_zsrtb243_pal.mem 0x47097d4c +4 118982 0 500 sh3_zsrtb244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb244.mem 1843 204 1 sh3_zsrtb244_pal.mem 0x47097d4c +5 126542 0 500 sh3_zsrtb245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb245.mem 1843 204 1 sh3_zsrtb245_pal.mem 0x47097d4c +6 127394 0 500 sh3_zsrtb246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb246.mem 1843 204 1 sh3_zsrtb246_pal.mem 0x47097d4c +7 128033 0 500 sh3_zsrtb247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtb247.mem 1843 204 1 sh3_zsrtb247_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtc24_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtc24_epochs.txt new file mode 100644 index 0000000..cad4e4f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtc24_epochs.txt @@ -0,0 +1,14 @@ +# Ch370 epoch descriptor table (8 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 119471 8192 504 sh3_zsrtc240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc240.mem 1843 204 0 sh3_zsrtc240_pal.mem 0x47097d4c +1 120110 8192 504 sh3_zsrtc241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc241.mem 1843 204 1 sh3_zsrtc241_pal.mem 0x47097d4c +2 120749 8192 504 sh3_zsrtc242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc242.mem 1843 204 1 sh3_zsrtc242_pal.mem 0x47097d4c +3 121388 8192 504 sh3_zsrtc243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc243.mem 1843 204 1 sh3_zsrtc243_pal.mem 0x47097d4c +4 122027 8192 504 sh3_zsrtc244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc244.mem 1843 204 1 sh3_zsrtc244_pal.mem 0x47097d4c +5 129389 8192 504 sh3_zsrtc245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc245.mem 1843 204 1 sh3_zsrtc245_pal.mem 0x47097d4c +6 130241 8192 504 sh3_zsrtc246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc246.mem 1843 204 1 sh3_zsrtc246_pal.mem 0x47097d4c +7 130880 8192 504 sh3_zsrtc247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtc247.mem 1843 204 1 sh3_zsrtc247_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte11_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte11_epochs.txt new file mode 100644 index 0000000..8e602de --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte11_epochs.txt @@ -0,0 +1,10 @@ +# Ch374 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 504 sh3_zsrte110_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte110.mem 1843 204 0 sh3_zsrte110_pal.mem 0x3bfe8722 +1 10762 2048 504 sh3_zsrte111_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte111.mem 1843 204 1 sh3_zsrte111_pal.mem 0x3bfe8722 +2 11401 2048 504 sh3_zsrte112_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte112.mem 817 90 1 sh3_zsrte112_pal.mem 0x3bfe8722 +3 11698 2048 508 sh3_zsrte113_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte113.mem 1285 142 0 sh3_zsrte113_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte14_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte14_epochs.txt new file mode 100644 index 0000000..134dafe --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte14_epochs.txt @@ -0,0 +1,11 @@ +# Ch375 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 504 sh3_zsrte140_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte140.mem 1843 204 0 sh3_zsrte140_pal.mem 0x3bfe8722 +1 10762 2048 504 sh3_zsrte141_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte141.mem 1843 204 1 sh3_zsrte141_pal.mem 0x3bfe8722 +2 11401 2048 504 sh3_zsrte142_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte142.mem 817 90 1 sh3_zsrte142_pal.mem 0x3bfe8722 +3 11698 2048 508 sh3_zsrte143_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte143.mem 1285 142 0 sh3_zsrte143_pal.mem 0x2c5b7e28 +4 12646 2048 508 sh3_zsrte144_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte144.mem 1591 176 1 sh3_zsrte144_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte17_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte17_epochs.txt new file mode 100644 index 0000000..800a6dc --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte17_epochs.txt @@ -0,0 +1,12 @@ +# Ch376 epoch descriptor table (6 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 6 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 504 sh3_zsrte170_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte170.mem 1843 204 0 sh3_zsrte170_pal.mem 0x3bfe8722 +1 10762 2048 504 sh3_zsrte171_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte171.mem 1843 204 1 sh3_zsrte171_pal.mem 0x3bfe8722 +2 11401 2048 504 sh3_zsrte172_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte172.mem 817 90 1 sh3_zsrte172_pal.mem 0x3bfe8722 +3 11698 2048 508 sh3_zsrte173_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte173.mem 1285 142 0 sh3_zsrte173_pal.mem 0x2c5b7e28 +4 12646 2048 508 sh3_zsrte174_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte174.mem 1591 176 1 sh3_zsrte174_pal.mem 0x2c5b7e28 +5 13201 2048 508 sh3_zsrte175_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte175.mem 1069 118 1 sh3_zsrte175_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte18_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte18_epochs.txt new file mode 100644 index 0000000..c0a365f --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte18_epochs.txt @@ -0,0 +1,13 @@ +# Ch377 epoch descriptor table (7 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 7 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 504 sh3_zsrte180_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte180.mem 1843 204 0 sh3_zsrte180_pal.mem 0x3bfe8722 +1 10762 2048 504 sh3_zsrte181_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte181.mem 1843 204 1 sh3_zsrte181_pal.mem 0x3bfe8722 +2 11401 2048 504 sh3_zsrte182_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte182.mem 817 90 1 sh3_zsrte182_pal.mem 0x3bfe8722 +3 11698 2048 508 sh3_zsrte183_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte183.mem 1285 142 0 sh3_zsrte183_pal.mem 0x2c5b7e28 +4 12646 2048 508 sh3_zsrte184_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte184.mem 1591 176 1 sh3_zsrte184_pal.mem 0x2c5b7e28 +5 13201 2048 508 sh3_zsrte185_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte185.mem 1069 118 1 sh3_zsrte185_pal.mem 0x2c5b7e28 +6 13582 2048 508 sh3_zsrte186_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte186.mem 205 22 1 sh3_zsrte186_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte19_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte19_epochs.txt new file mode 100644 index 0000000..1103fa9 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte19_epochs.txt @@ -0,0 +1,14 @@ +# Ch378 epoch descriptor table (8 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte190_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte190.mem 1843 204 0 sh3_zsrte190_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte191_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte191.mem 1843 204 1 sh3_zsrte191_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte192_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte192.mem 817 90 1 sh3_zsrte192_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte193_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte193.mem 1285 142 0 sh3_zsrte193_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte194_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte194.mem 1591 176 1 sh3_zsrte194_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte195_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte195.mem 1069 118 1 sh3_zsrte195_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte196_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte196.mem 205 22 1 sh3_zsrte196_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte197_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte197.mem 619 68 0 sh3_zsrte197_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte22_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte22_epochs.txt new file mode 100644 index 0000000..00c3da1 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte22_epochs.txt @@ -0,0 +1,15 @@ +# Ch379 epoch descriptor table (9 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 9 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte220_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte220.mem 1843 204 0 sh3_zsrte220_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte221_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte221.mem 1843 204 1 sh3_zsrte221_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte222_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte222.mem 817 90 1 sh3_zsrte222_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte223_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte223.mem 1285 142 0 sh3_zsrte223_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte224_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte224.mem 1591 176 1 sh3_zsrte224_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte225_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte225.mem 1069 118 1 sh3_zsrte225_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte226_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte226.mem 205 22 1 sh3_zsrte226_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte227.mem 619 68 0 sh3_zsrte227_pal.mem 0x47097d4c +8 93847 3072 508 sh3_zsrte228_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte228.mem 1591 176 1 sh3_zsrte228_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte25_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte25_epochs.txt new file mode 100644 index 0000000..c715e9b --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte25_epochs.txt @@ -0,0 +1,16 @@ +# Ch380 epoch descriptor table (10 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 10 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte250_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte250.mem 1843 204 0 sh3_zsrte250_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte251_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte251.mem 1843 204 1 sh3_zsrte251_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte252_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte252.mem 817 90 1 sh3_zsrte252_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte253_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte253.mem 1285 142 0 sh3_zsrte253_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte254_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte254.mem 1591 176 1 sh3_zsrte254_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte255_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte255.mem 1069 118 1 sh3_zsrte255_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte256_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte256.mem 205 22 1 sh3_zsrte256_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte257_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte257.mem 619 68 0 sh3_zsrte257_pal.mem 0x47097d4c +8 93847 3072 508 sh3_zsrte258_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte258.mem 1591 176 1 sh3_zsrte258_pal.mem 0x47097d4c +9 94402 3072 508 sh3_zsrte259_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte259.mem 1843 204 1 sh3_zsrte259_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte28_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte28_epochs.txt new file mode 100644 index 0000000..85b07fb --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte28_epochs.txt @@ -0,0 +1,17 @@ +# Ch381 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte280_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte280.mem 1843 204 0 sh3_zsrte280_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte281_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte281.mem 1843 204 1 sh3_zsrte281_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte282_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte282.mem 817 90 1 sh3_zsrte282_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte283_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte283.mem 1285 142 0 sh3_zsrte283_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte284_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte284.mem 1591 176 1 sh3_zsrte284_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte285_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte285.mem 1069 118 1 sh3_zsrte285_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte286_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte286.mem 205 22 1 sh3_zsrte286_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte287_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte287.mem 619 68 0 sh3_zsrte287_pal.mem 0x47097d4c +8 93847 3072 508 sh3_zsrte288_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte288.mem 1591 176 1 sh3_zsrte288_pal.mem 0x47097d4c +9 94402 3072 508 sh3_zsrte289_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte289.mem 1843 204 1 sh3_zsrte289_pal.mem 0x47097d4c +10 95254 3072 508 sh3_zsrte2810_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte2810.mem 1240 137 1 sh3_zsrte2810_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte31_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte31_epochs.txt new file mode 100644 index 0000000..3dc17b0 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte31_epochs.txt @@ -0,0 +1,18 @@ +# Ch382 epoch descriptor table (12 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 12 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte310_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte310.mem 1843 204 0 sh3_zsrte310_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte311_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte311.mem 1843 204 1 sh3_zsrte311_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte312_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte312.mem 817 90 1 sh3_zsrte312_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte313_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte313.mem 1285 142 0 sh3_zsrte313_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte314_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte314.mem 1591 176 1 sh3_zsrte314_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte315_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte315.mem 1069 118 1 sh3_zsrte315_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte316_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte316.mem 205 22 1 sh3_zsrte316_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte317_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte317.mem 619 68 0 sh3_zsrte317_pal.mem 0x47097d4c +8 93847 3072 508 sh3_zsrte318_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte318.mem 1591 176 1 sh3_zsrte318_pal.mem 0x47097d4c +9 94402 3072 508 sh3_zsrte319_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte319.mem 1843 204 1 sh3_zsrte319_pal.mem 0x47097d4c +10 95254 3072 508 sh3_zsrte3110_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte3110.mem 1240 137 1 sh3_zsrte3110_pal.mem 0x47097d4c +11 97432 3072 508 sh3_zsrte3111_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte3111.mem 1465 162 1 sh3_zsrte3111_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte34_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte34_epochs.txt new file mode 100644 index 0000000..35fc542 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte34_epochs.txt @@ -0,0 +1,19 @@ +# Ch383 epoch descriptor table (13 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 13 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte340_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte340.mem 1843 204 0 sh3_zsrte340_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte341_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte341.mem 1843 204 1 sh3_zsrte341_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte342_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte342.mem 817 90 1 sh3_zsrte342_pal.mem 0x3bfe8722 +3 11698 2048 504 sh3_zsrte343_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte343.mem 1285 142 0 sh3_zsrte343_pal.mem 0x2c5b7e28 +4 12646 2048 504 sh3_zsrte344_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte344.mem 1591 176 1 sh3_zsrte344_pal.mem 0x2c5b7e28 +5 13201 2048 504 sh3_zsrte345_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte345.mem 1069 118 1 sh3_zsrte345_pal.mem 0x2c5b7e28 +6 13582 2048 504 sh3_zsrte346_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte346.mem 205 22 1 sh3_zsrte346_pal.mem 0x2c5b7e28 +7 93634 3072 508 sh3_zsrte347_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte347.mem 619 68 0 sh3_zsrte347_pal.mem 0x47097d4c +8 93847 3072 508 sh3_zsrte348_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte348.mem 1591 176 1 sh3_zsrte348_pal.mem 0x47097d4c +9 94402 3072 508 sh3_zsrte349_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte349.mem 1843 204 1 sh3_zsrte349_pal.mem 0x47097d4c +10 95254 3072 508 sh3_zsrte3410_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte3410.mem 1240 137 1 sh3_zsrte3410_pal.mem 0x47097d4c +11 97432 3072 508 sh3_zsrte3411_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte3411.mem 1465 162 1 sh3_zsrte3411_pal.mem 0x47097d4c +12 97945 3072 508 sh3_zsrte3412_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte3412.mem 1519 168 1 sh3_zsrte3412_pal.mem 0x47097d4c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte3_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte3_epochs.txt new file mode 100644 index 0000000..968ad24 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte3_epochs.txt @@ -0,0 +1,8 @@ +# Ch371 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 508 sh3_zsrte30_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte30.mem 619 68 0 sh3_zsrte30_pal.mem 0x3bfe8722 +1 10336 2048 508 sh3_zsrte31_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte31.mem 1231 136 1 sh3_zsrte31_pal.mem 0x3bfe8722 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte43_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte43_epochs.txt new file mode 100644 index 0000000..35849a7 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte43_epochs.txt @@ -0,0 +1,22 @@ +# Ch384 epoch descriptor table (16 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 16 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 496 sh3_zsrte430_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte430.mem 1843 204 0 sh3_zsrte430_pal.mem 0x3bfe8722 +1 10762 2048 496 sh3_zsrte431_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte431.mem 1843 204 1 sh3_zsrte431_pal.mem 0x3bfe8722 +2 11401 2048 496 sh3_zsrte432_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte432.mem 817 90 1 sh3_zsrte432_pal.mem 0x3bfe8722 +3 11698 2048 500 sh3_zsrte433_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte433.mem 1285 142 0 sh3_zsrte433_pal.mem 0x2c5b7e28 +4 12646 2048 500 sh3_zsrte434_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte434.mem 1591 176 1 sh3_zsrte434_pal.mem 0x2c5b7e28 +5 13201 2048 500 sh3_zsrte435_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte435.mem 1069 118 1 sh3_zsrte435_pal.mem 0x2c5b7e28 +6 13582 2048 500 sh3_zsrte436_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte436.mem 205 22 1 sh3_zsrte436_pal.mem 0x2c5b7e28 +7 93634 3072 504 sh3_zsrte437_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte437.mem 619 68 0 sh3_zsrte437_pal.mem 0x47097d4c +8 93847 3072 504 sh3_zsrte438_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte438.mem 1591 176 1 sh3_zsrte438_pal.mem 0x47097d4c +9 94402 3072 504 sh3_zsrte439_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte439.mem 1843 204 1 sh3_zsrte439_pal.mem 0x47097d4c +10 95254 3072 504 sh3_zsrte4310_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4310.mem 1240 137 1 sh3_zsrte4310_pal.mem 0x47097d4c +11 97432 3072 504 sh3_zsrte4311_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4311.mem 1465 162 1 sh3_zsrte4311_pal.mem 0x47097d4c +12 97945 3072 504 sh3_zsrte4312_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4312.mem 1519 168 1 sh3_zsrte4312_pal.mem 0x47097d4c +13 121898 2048 508 sh3_zsrte4313_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4313.mem 1357 150 0 sh3_zsrte4313_pal.mem 0x20ffffff +14 123287 2048 508 sh3_zsrte4314_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4314.mem 1825 202 1 sh3_zsrte4314_pal.mem 0x20ffffff +15 123920 2048 508 sh3_zsrte4315_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4315.mem 1789 198 1 sh3_zsrte4315_pal.mem 0x20ffffff diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte45_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte45_epochs.txt new file mode 100644 index 0000000..a559705 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte45_epochs.txt @@ -0,0 +1,23 @@ +# Ch385 epoch descriptor table (17 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 17 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 500 sh3_zsrte450_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte450.mem 1843 204 0 sh3_zsrte450_pal.mem 0x3bfe8722 +1 10762 2048 500 sh3_zsrte451_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte451.mem 1843 204 1 sh3_zsrte451_pal.mem 0x3bfe8722 +2 11401 2048 500 sh3_zsrte452_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte452.mem 817 90 1 sh3_zsrte452_pal.mem 0x3bfe8722 +3 11698 2048 500 sh3_zsrte453_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte453.mem 1285 142 0 sh3_zsrte453_pal.mem 0x2c5b7e28 +4 12646 2048 500 sh3_zsrte454_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte454.mem 1591 176 1 sh3_zsrte454_pal.mem 0x2c5b7e28 +5 13201 2048 500 sh3_zsrte455_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte455.mem 1069 118 1 sh3_zsrte455_pal.mem 0x2c5b7e28 +6 13582 2048 500 sh3_zsrte456_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte456.mem 205 22 1 sh3_zsrte456_pal.mem 0x2c5b7e28 +7 93634 3072 500 sh3_zsrte457_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte457.mem 619 68 0 sh3_zsrte457_pal.mem 0x47097d4c +8 93847 3072 500 sh3_zsrte458_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte458.mem 1591 176 1 sh3_zsrte458_pal.mem 0x47097d4c +9 94402 3072 500 sh3_zsrte459_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte459.mem 1843 204 1 sh3_zsrte459_pal.mem 0x47097d4c +10 95254 3072 500 sh3_zsrte4510_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4510.mem 1240 137 1 sh3_zsrte4510_pal.mem 0x47097d4c +11 97432 3072 500 sh3_zsrte4511_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4511.mem 1465 162 1 sh3_zsrte4511_pal.mem 0x47097d4c +12 97945 3072 500 sh3_zsrte4512_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrte4512.mem 1519 168 1 sh3_zsrte4512_pal.mem 0x47097d4c +13 121898 2048 500 sh3_zsrte4513_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4513.mem 1357 150 0 sh3_zsrte4513_pal.mem 0x20ffffff +14 123287 2048 500 sh3_zsrte4514_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4514.mem 1825 202 1 sh3_zsrte4514_pal.mem 0x20ffffff +15 123920 2048 500 sh3_zsrte4515_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4515.mem 1789 198 1 sh3_zsrte4515_pal.mem 0x20ffffff +16 124541 2048 500 sh3_zsrte4516_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrte4516.mem 664 73 1 sh3_zsrte4516_pal.mem 0x20ffffff diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte6_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte6_epochs.txt new file mode 100644 index 0000000..031f6ca --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte6_epochs.txt @@ -0,0 +1,8 @@ +# Ch372 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 508 sh3_zsrte60_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte60.mem 1843 204 0 sh3_zsrte60_pal.mem 0x3bfe8722 +1 10762 2048 508 sh3_zsrte61_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte61.mem 1843 204 1 sh3_zsrte61_pal.mem 0x3bfe8722 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrte8_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrte8_epochs.txt new file mode 100644 index 0000000..68f1923 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrte8_epochs.txt @@ -0,0 +1,9 @@ +# Ch373 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 10123 2048 508 sh3_zsrte80_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte80.mem 1843 204 0 sh3_zsrte80_pal.mem 0x3bfe8722 +1 10762 2048 508 sh3_zsrte81_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte81.mem 1843 204 1 sh3_zsrte81_pal.mem 0x3bfe8722 +2 11401 2048 508 sh3_zsrte82_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrte82.mem 817 90 1 sh3_zsrte82_pal.mem 0x3bfe8722 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c30_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c30_epochs.txt new file mode 100644 index 0000000..98695d8 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c30_epochs.txt @@ -0,0 +1,15 @@ +# Ch388 epoch descriptor table (9 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 9 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177512 12288 500 sh3_zsrtf3c300_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c300.mem 637 70 0 sh3_zsrtf3c300_pal.mem 0x3b541846 +1 177896 12288 500 sh3_zsrtf3c301_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c301.mem 961 106 1 sh3_zsrtf3c301_pal.mem 0x3b541846 +2 178241 12288 500 sh3_zsrtf3c302_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c302.mem 529 58 1 sh3_zsrtf3c302_pal.mem 0x3b541846 +3 178652 12288 500 sh3_zsrtf3c303_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c303.mem 880 97 1 sh3_zsrtf3c303_pal.mem 0x3b541846 +4 179168 12288 500 sh3_zsrtf3c304_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c304.mem 1735 192 1 sh3_zsrtf3c304_pal.mem 0x3b541846 +5 180485 12288 500 sh3_zsrtf3c305_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c305.mem 1114 123 0 sh3_zsrtf3c305_pal.mem 0x20d7ab8a +6 181094 12288 500 sh3_zsrtf3c306_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c306.mem 1735 192 1 sh3_zsrtf3c306_pal.mem 0x20d7ab8a +7 182408 12288 500 sh3_zsrtf3c307_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c307.mem 1546 171 1 sh3_zsrtf3c307_pal.mem 0x20d7ab8a +8 182948 12288 500 sh3_zsrtf3c308_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c308.mem 1420 157 1 sh3_zsrtf3c308_pal.mem 0x20d7ab8a diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c34_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c34_epochs.txt new file mode 100644 index 0000000..c401634 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c34_epochs.txt @@ -0,0 +1,16 @@ +# Ch389 epoch descriptor table (10 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 10 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177512 12288 500 sh3_zsrtf3c340_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c340.mem 637 70 0 sh3_zsrtf3c340_pal.mem 0x3b541846 +1 177896 12288 500 sh3_zsrtf3c341_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c341.mem 961 106 1 sh3_zsrtf3c341_pal.mem 0x3b541846 +2 178241 12288 500 sh3_zsrtf3c342_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c342.mem 529 58 1 sh3_zsrtf3c342_pal.mem 0x3b541846 +3 178652 12288 500 sh3_zsrtf3c343_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c343.mem 880 97 1 sh3_zsrtf3c343_pal.mem 0x3b541846 +4 179168 12288 500 sh3_zsrtf3c344_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c344.mem 1735 192 1 sh3_zsrtf3c344_pal.mem 0x3b541846 +5 180485 12288 500 sh3_zsrtf3c345_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c345.mem 1114 123 0 sh3_zsrtf3c345_pal.mem 0x20d7ab8a +6 181094 12288 500 sh3_zsrtf3c346_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c346.mem 1735 192 1 sh3_zsrtf3c346_pal.mem 0x20d7ab8a +7 182408 12288 500 sh3_zsrtf3c347_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c347.mem 1546 171 1 sh3_zsrtf3c347_pal.mem 0x20d7ab8a +8 182948 12288 500 sh3_zsrtf3c348_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c348.mem 1420 157 1 sh3_zsrtf3c348_pal.mem 0x20d7ab8a +9 183911 12288 500 sh3_zsrtf3c349_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c349.mem 1105 122 0 sh3_zsrtf3c349_pal.mem 0xafbfc59c diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c41_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c41_epochs.txt new file mode 100644 index 0000000..417af5c --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c41_epochs.txt @@ -0,0 +1,8 @@ +# Ch390 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 186129 7168 500 sh3_zsrtf3c410_tex_lpddr.mem 0x200000 262144 0x6bddfb1f feeder_sh3_zsrtf3c410.mem 439 48 0 sh3_zsrtf3c410_pal.mem 0x4db630f6 +1 186489 7168 500 sh3_zsrtf3c411_tex_lpddr.mem 0x200000 262144 0x6bddfb1f feeder_sh3_zsrtf3c411.mem 493 54 1 sh3_zsrtf3c411_pal.mem 0x4db630f6 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c49_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c49_epochs.txt new file mode 100644 index 0000000..72303e2 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c49_epochs.txt @@ -0,0 +1,10 @@ +# Ch391 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 187558 6144 500 sh3_zsrtf3c490_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c490.mem 1231 136 0 sh3_zsrtf3c490_pal.mem 0x3bfe8722 +1 187984 6144 500 sh3_zsrtf3c491_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c491.mem 1231 136 1 sh3_zsrtf3c491_pal.mem 0x3bfe8722 +2 188410 6144 500 sh3_zsrtf3c492_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c492.mem 1231 136 1 sh3_zsrtf3c492_pal.mem 0x3bfe8722 +3 188836 6144 500 sh3_zsrtf3c493_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c493.mem 817 90 1 sh3_zsrtf3c493_pal.mem 0x3bfe8722 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57_epochs.txt new file mode 100644 index 0000000..d945437 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57_epochs.txt @@ -0,0 +1,10 @@ +# Ch392 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 189133 6144 500 sh3_zsrtf3c570_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c570.mem 673 74 0 sh3_zsrtf3c570_pal.mem 0x2c5b7e28 +1 189373 6144 500 sh3_zsrtf3c571_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c571.mem 637 70 1 sh3_zsrtf3c571_pal.mem 0x2c5b7e28 +2 189601 6144 500 sh3_zsrtf3c572_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c572.mem 637 70 1 sh3_zsrtf3c572_pal.mem 0x2c5b7e28 +3 190081 6144 500 sh3_zsrtf3c573_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c573.mem 979 108 1 sh3_zsrtf3c573_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57x_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57x_epochs.txt new file mode 100644 index 0000000..002a961 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3c57x_epochs.txt @@ -0,0 +1,26 @@ +# Ch393 epoch descriptor table (20 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177512 12288 500 sh3_zsrtf3c57x0_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x0.mem 637 70 0 sh3_zsrtf3c57x0_pal.mem 0x3b541846 +1 177896 12288 500 sh3_zsrtf3c57x1_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x1.mem 961 106 1 sh3_zsrtf3c57x1_pal.mem 0x3b541846 +2 178241 12288 500 sh3_zsrtf3c57x2_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x2.mem 529 58 1 sh3_zsrtf3c57x2_pal.mem 0x3b541846 +3 178652 12288 500 sh3_zsrtf3c57x3_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x3.mem 880 97 1 sh3_zsrtf3c57x3_pal.mem 0x3b541846 +4 179168 12288 500 sh3_zsrtf3c57x4_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x4.mem 1735 192 1 sh3_zsrtf3c57x4_pal.mem 0x3b541846 +5 180485 12288 500 sh3_zsrtf3c57x5_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x5.mem 1114 123 0 sh3_zsrtf3c57x5_pal.mem 0x20d7ab8a +6 181094 12288 500 sh3_zsrtf3c57x6_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x6.mem 1735 192 1 sh3_zsrtf3c57x6_pal.mem 0x20d7ab8a +7 182408 12288 500 sh3_zsrtf3c57x7_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x7.mem 1546 171 1 sh3_zsrtf3c57x7_pal.mem 0x20d7ab8a +8 182948 12288 500 sh3_zsrtf3c57x8_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x8.mem 1420 157 1 sh3_zsrtf3c57x8_pal.mem 0x20d7ab8a +9 183911 12288 500 sh3_zsrtf3c57x9_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3c57x9.mem 1105 122 0 sh3_zsrtf3c57x9_pal.mem 0xafbfc59c +10 186129 7168 500 sh3_zsrtf3c57x10_tex_lpddr.mem 0x200000 262144 0x6bddfb1f feeder_sh3_zsrtf3c57x10.mem 439 48 0 sh3_zsrtf3c57x10_pal.mem 0x4db630f6 +11 186489 7168 500 sh3_zsrtf3c57x11_tex_lpddr.mem 0x200000 262144 0x6bddfb1f feeder_sh3_zsrtf3c57x11.mem 493 54 1 sh3_zsrtf3c57x11_pal.mem 0x4db630f6 +12 187558 6144 500 sh3_zsrtf3c57x12_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x12.mem 1231 136 0 sh3_zsrtf3c57x12_pal.mem 0x3bfe8722 +13 187984 6144 500 sh3_zsrtf3c57x13_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x13.mem 1231 136 1 sh3_zsrtf3c57x13_pal.mem 0x3bfe8722 +14 188410 6144 500 sh3_zsrtf3c57x14_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x14.mem 1231 136 1 sh3_zsrtf3c57x14_pal.mem 0x3bfe8722 +15 188836 6144 500 sh3_zsrtf3c57x15_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x15.mem 817 90 1 sh3_zsrtf3c57x15_pal.mem 0x3bfe8722 +16 189133 6144 500 sh3_zsrtf3c57x16_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x16.mem 673 74 0 sh3_zsrtf3c57x16_pal.mem 0x2c5b7e28 +17 189373 6144 500 sh3_zsrtf3c57x17_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x17.mem 637 70 1 sh3_zsrtf3c57x17_pal.mem 0x2c5b7e28 +18 189601 6144 500 sh3_zsrtf3c57x18_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x18.mem 637 70 1 sh3_zsrtf3c57x18_pal.mem 0x2c5b7e28 +19 190081 6144 500 sh3_zsrtf3c57x19_tex_lpddr.mem 0x200000 262144 0x2d9a2fda feeder_sh3_zsrtf3c57x19.mem 979 108 1 sh3_zsrtf3c57x19_pal.mem 0x2c5b7e28 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e18_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e18_epochs.txt new file mode 100644 index 0000000..906abe9 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e18_epochs.txt @@ -0,0 +1,11 @@ +# Ch386 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 177512 12288 500 sh3_zsrtf3e180_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e180.mem 637 70 0 sh3_zsrtf3e180_pal.mem 0x3b541846 +1 177896 12288 500 sh3_zsrtf3e181_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e181.mem 961 106 1 sh3_zsrtf3e181_pal.mem 0x3b541846 +2 178241 12288 500 sh3_zsrtf3e182_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e182.mem 529 58 1 sh3_zsrtf3e182_pal.mem 0x3b541846 +3 178652 12288 500 sh3_zsrtf3e183_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e183.mem 880 97 1 sh3_zsrtf3e183_pal.mem 0x3b541846 +4 179168 12288 500 sh3_zsrtf3e184_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e184.mem 1735 192 1 sh3_zsrtf3e184_pal.mem 0x3b541846 diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e30_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e30_epochs.txt new file mode 100644 index 0000000..149fba9 --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtf3e30_epochs.txt @@ -0,0 +1,10 @@ +# Ch387 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 180485 12288 500 sh3_zsrtf3e300_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e300.mem 1114 123 0 sh3_zsrtf3e300_pal.mem 0x20d7ab8a +1 181094 12288 500 sh3_zsrtf3e301_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e301.mem 1735 192 1 sh3_zsrtf3e301_pal.mem 0x20d7ab8a +2 182408 12288 500 sh3_zsrtf3e302_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e302.mem 1546 171 1 sh3_zsrtf3e302_pal.mem 0x20d7ab8a +3 182948 12288 500 sh3_zsrtf3e303_tex_lpddr.mem 0x200000 262144 0xb4f702c8 feeder_sh3_zsrtf3e303.mem 1420 157 1 sh3_zsrtf3e303_pal.mem 0x20d7ab8a diff --git a/sim/data/top_psmct32_raster_demo/sh3_zsrtm28_epochs.txt b/sim/data/top_psmct32_raster_demo/sh3_zsrtm28_epochs.txt new file mode 100644 index 0000000..cf178dc --- /dev/null +++ b/sim/data/top_psmct32_raster_demo/sh3_zsrtm28_epochs.txt @@ -0,0 +1,18 @@ +# Ch369 epoch descriptor table (12 epochs, dump order). CLUT=runtime HPS staging; +# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain. +# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the +# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency). +META n_epochs 12 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192 +# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32 +0 5328 11264 480 sh3_zsrtm280_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrtm280.mem 493 54 0 sh3_zsrtm280_pal.mem 0x32ed74c4 +1 11671 10240 484 sh3_zsrtm281_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrtm281.mem 619 68 0 sh3_zsrtm281_pal.mem 0x3cd88c98 +2 77112 10240 488 sh3_zsrtm282_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrtm282.mem 619 68 0 sh3_zsrtm282_pal.mem 0x43ece1ae +3 89164 9216 492 sh3_zsrtm283_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrtm283.mem 619 68 0 sh3_zsrtm283_pal.mem 0x5dfce0a2 +4 119471 8192 496 sh3_zsrtm284_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm284.mem 1843 204 0 sh3_zsrtm284_pal.mem 0x47097d4c +5 120110 8192 496 sh3_zsrtm285_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm285.mem 1843 204 1 sh3_zsrtm285_pal.mem 0x47097d4c +6 120749 8192 496 sh3_zsrtm286_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm286.mem 1843 204 1 sh3_zsrtm286_pal.mem 0x47097d4c +7 121388 8192 496 sh3_zsrtm287_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm287.mem 1843 204 1 sh3_zsrtm287_pal.mem 0x47097d4c +8 122027 8192 496 sh3_zsrtm288_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm288.mem 1843 204 1 sh3_zsrtm288_pal.mem 0x47097d4c +9 129389 8192 496 sh3_zsrtm289_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm289.mem 1843 204 1 sh3_zsrtm289_pal.mem 0x47097d4c +10 130241 8192 496 sh3_zsrtm2810_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm2810.mem 1843 204 1 sh3_zsrtm2810_pal.mem 0x47097d4c +11 130880 8192 496 sh3_zsrtm2811_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrtm2811.mem 1843 204 1 sh3_zsrtm2811_pal.mem 0x47097d4c diff --git a/sim/tb/gif_gs/tb_gs_async_fifo.sv b/sim/tb/gif_gs/tb_gs_async_fifo.sv new file mode 100644 index 0000000..149d323 --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_async_fifo.sv @@ -0,0 +1,119 @@ +// retroDE_ps2 — tb_gs_async_fifo (Ch357, Codex) +// +// Scoreboard for gs_async_fifo after the REGISTERED-empty change (rempty <= rempty_nxt, the read-side twin of the +// registered wfull). Two ASYNCHRONOUS clocks. The writer pushes a strictly increasing sequence; the reader pops and +// asserts each rdata equals the next expected value -> catches ANY duplicate (same value twice) or drop (skipped value) +// and guarantees in-order delivery. Covers: continuous reads, final-entry empty assertion, asynchronous write arrival, +// wrap/full backpressure, and randomized read/write gaps under async clocks. + +`timescale 1ns/1ps + +module tb_gs_async_fifo #( + parameter bit TEST_BANKED = 1'b0, + parameter bit TEST_QUADRANT = 1'b0, + parameter bit TEST_REGISTERED = TEST_BANKED || TEST_QUADRANT +); + localparam int WIDTH = 32; + localparam int DEPTH = 8; + + // Production request-FIFO corner: 40 MHz raster producer into the + // ~310 MHz EMIF consumer. A slower-reader test cannot detect publishing + // the write pointer before a staged RAM commit. + logic wclk=0; always #12.5 wclk=~wclk; // 40 MHz + logic rclk=0; always #1.6 rclk=~rclk; // 312.5 MHz, async to wclk + logic wrst_n, rrst_n; + + logic wr, wfull; + logic [WIDTH-1:0] wdata; + logic rd, dut_rd, rempty; + logic [WIDTH-1:0] rdata; + logic registered_pending; + + gs_async_fifo #(.WIDTH(WIDTH), .DEPTH(DEPTH), + .REGISTERED_READ(TEST_REGISTERED), .BANKED_READ(TEST_BANKED), + .QUADRANT_READ(TEST_QUADRANT)) dut ( + .wclk(wclk), .wrst_n(wrst_n), .wr(wr), .wdata(wdata), .wfull(wfull), + .rclk(rclk), .rrst_n(rrst_n), .rd(dut_rd), .rdata(rdata), .rempty(rempty) + ); + + // independent LFSR backpressure on each clock + logic [15:0] wl=16'hBEEF; always_ff @(posedge wclk) wl<={wl[14:0], wl[15]^wl[13]^wl[12]^wl[10]}; + logic [15:0] rl=16'h1234; always_ff @(posedge rclk) rl<={rl[14:0], rl[15]^rl[13]^rl[12]^rl[10]}; + + logic want_write, force_read_all, stop_write; + assign want_write = wl[0] | wl[3]; // ~75% offered writes + assign wr = want_write && !stop_write; // FIFO gates internally with !wfull; stop_write freezes the producer + assign rd = force_read_all ? 1'b1 : (rl[1] | rl[4]); // continuous-read phase forces rd=1 + // gs_async_fifo's rd input is an accepted-read handshake. Keep the + // randomized read request separate so the test explicitly enforces that + // interface contract, exactly as every production wrapper does. + assign dut_rd = rd && !rempty && (!TEST_REGISTERED || !registered_pending); + always_ff @(posedge rclk or negedge rrst_n) begin + if (!rrst_n) registered_pending <= 1'b0; + else registered_pending <= TEST_REGISTERED && dut_rd; + end + + logic [WIDTH-1:0] wr_seq, rd_seq; // next value to write / next value expected to read + assign wdata = wr_seq; + + int errors; initial errors=0; + int sb_err; // scoreboard-only error counter (reset + written solely by the reader always_ff) + + // writer: count accepted writes, advance the sequence + always_ff @(posedge wclk or negedge wrst_n) begin + if (!wrst_n) wr_seq <= '0; + else if (wr && !wfull) wr_seq <= wr_seq + 1; + end + + // reader scoreboard: every accepted read must equal the next expected sequence value (in order, no dup/drop) + always_ff @(posedge rclk or negedge rrst_n) begin + if (!rrst_n) begin rd_seq <= '0; sb_err <= 0; end + else if (TEST_REGISTERED ? registered_pending : dut_rd) begin + if (rdata !== rd_seq) begin + if (sb_err < 20) $error("[afifo] out-of-order/dup/drop: got %0d expected %0d", rdata, rd_seq); + sb_err <= sb_err + 1; + end + rd_seq <= rd_seq + 1; + end + end + + task automatic run_cycles(input int n_r); repeat (n_r) @(posedge rclk); endtask + + initial begin + wrst_n=0; rrst_n=0; force_read_all=0; stop_write=0; + repeat (6) @(posedge wclk); wrst_n=1; + repeat (6) @(posedge rclk); rrst_n=1; + + // reset check: FIFO must come up EMPTY + @(posedge rclk); + if (rempty !== 1'b1) begin $error("[afifo] rempty not asserted after reset"); errors++; end + + // ---- Phase 1: randomized async read/write (wrap/full exercised many times) ---- + run_cycles(30000); + + // ---- Phase 2: continuous reads -> drain fully; assert final-entry empty ---- + force_read_all = 1'b1; + run_cycles(4000); + force_read_all = 1'b0; + + // ---- Phase 3: FREEZE the writer, drain fully, assert EMPTY + counts equal (final-entry empty assertion) ---- + stop_write = 1'b1; + force_read_all = 1'b1; + begin int g; g=0; while ((wr_seq !== rd_seq) && g<40000) begin @(posedge rclk); g++; end end + run_cycles(20); + + // ---- checks ---- + if (rempty !== 1'b1) begin $error("[afifo] FIFO not EMPTY after full drain (rempty=%0b)", rempty); errors++; end + if (wr_seq !== rd_seq) begin $error("[afifo] count mismatch: wrote %0d read %0d (drop/dup)", wr_seq, rd_seq); errors++; end + if (wr_seq < 32'd1000) begin $error("[afifo] too few transfers (%0d) — test not meaningful", wr_seq); errors++; end + errors = errors + sb_err; + + $display("[tb_gs_async_fifo] wrote=%0d read=%0d sb_err=%0d rempty=%0b errors=%0d", + wr_seq, rd_seq, sb_err, rempty, errors); + if (errors==0) $display("[tb_gs_async_fifo] PASS"); + else $display("[tb_gs_async_fifo] FAIL"); + $finish; + end + + initial begin #4000000; $error("[tb_gs_async_fifo] TIMEOUT"); $finish; end +endmodule : tb_gs_async_fifo diff --git a/sim/tb/gif_gs/tb_gs_feeder_fog_e2e.sv b/sim/tb/gif_gs/tb_gs_feeder_fog_e2e.sv new file mode 100644 index 0000000..3cce3df --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_feeder_fog_e2e.sv @@ -0,0 +1,164 @@ +// retroDE_ps2 — tb_gs_feeder_fog_e2e +// +// END-TO-END GS per-vertex FOG through the runtime feeder: a staging list with +// PRIM.FGE=1 drives gs_prim_list_feeder, whose gif_reg_* stream feeds gs_stub. +// Proves the full data path — the feeder tags the vertex commit XYZF2 (reg 0x04) +// carrying the per-vertex fog byte, and gs_stub applies the fog blend at emit. +// +// One untextured flat Gouraud triangle, flat per-vertex F, FOGCOL left at the +// RTL default 0 (black) — the SH3 scene's value. So the emitted RGB must equal +// (C * F) >> 8 per channel (fog toward black), alpha unchanged, at interior px. + +`timescale 1ns/1ps + +module tb_gs_feeder_fog_e2e; + localparam int STG_ADDR_W = 12; + + logic clk; logic rst_n; + initial clk = 1'b0; always #5 clk = ~clk; + + // feeder <-> staging + gs_stub + logic start, busy, done; + logic [15:0] records_emitted; + logic [31:0] fifo_wait_cycles; + logic [STG_ADDR_W-1:0] stg_rd_addr; + logic [63:0] stg_rd_data; + logic gif_reg_wr_en; + logic [7:0] gif_reg_num; + logic [63:0] gif_reg_data; + + // staging RAM + logic [63:0] stg [0:127]; + always_ff @(posedge clk) stg_rd_data <= stg[stg_rd_addr[6:0]]; + + // gs_stub outputs we watch + logic [7:0] bg_r, bg_g, bg_b; + logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q; + logic prim_complete; logic [31:0] prim_complete_count; + logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q, prim_color_q; + logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q; + trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q; + trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q; + logic pixel_emit; logic [31:0] pixel_emit_count; + logic [11:0] pixel_x_q, pixel_y_q; logic [63:0] pixel_color_q; + logic [8:0] pixel_fbp_q; logic [5:0] pixel_fbw_q, pixel_psm_q; logic [31:0] pixel_fb_addr_q; + logic raster_pixel_emit; logic [31:0] raster_pixel_emit_count; + logic [11:0] raster_pixel_x_q, raster_pixel_y_q; logic [63:0] raster_pixel_color_q; + logic [31:0] raster_pixel_fb_addr_q; logic [3:0] raster_pixel_be_q; + logic [31:0] raster_pixel_mask_q; logic [5:0] raster_pixel_psm_q; + logic raster_active, raster_overflow, raster_fifo_full, raster_degenerate; + logic tex_rd_en; logic [31:0] tex_rd_addr; + logic fb_rd_en; logic [31:0] fb_rd_addr; + logic z_rd_en; logic [31:0] z_rd_addr; + logic ev_valid; trace_pkg::subsys_e ev_subsys; trace_pkg::event_e ev_event; + logic [63:0] ev_arg0, ev_arg1, ev_arg2, ev_arg3; logic [31:0] ev_flags; + + gs_prim_list_feeder #(.STG_ADDR_W(STG_ADDR_W)) u_feeder ( + .clk(clk), .rst_n(rst_n), .start(start), .busy(busy), .done(done), + .records_emitted(records_emitted), .fifo_wait_cycles(fifo_wait_cycles), + .stg_rd_addr(stg_rd_addr), .stg_rd_data(stg_rd_data), + .fifo_full(raster_fifo_full), + .gif_reg_wr_en(gif_reg_wr_en), .gif_reg_num(gif_reg_num), .gif_reg_data(gif_reg_data)); + + gs_stub u_gs ( + .clk(clk), .rst_n(rst_n), + .reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0), + .gif_reg_wr_en(gif_reg_wr_en), .gif_reg_num(gif_reg_num), .gif_reg_data(gif_reg_data), + .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b), + .prim_q(prim_q), .rgbaq_q(rgbaq_q), .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q), + .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q), + .prim_complete(prim_complete), .prim_complete_count(prim_complete_count), + .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q), + .prim_color_q(prim_color_q), + .prim_color_v0_q(prim_color_v0_q), .prim_color_v1_q(prim_color_v1_q), .prim_color_v2_q(prim_color_v2_q), + .prim_v0_decoded_q(prim_v0_decoded_q), .prim_v1_decoded_q(prim_v1_decoded_q), .prim_v2_decoded_q(prim_v2_decoded_q), + .prim_v0_color_decoded_q(prim_v0_color_decoded_q), .prim_v1_color_decoded_q(prim_v1_color_decoded_q), .prim_v2_color_decoded_q(prim_v2_color_decoded_q), + .pixel_emit(pixel_emit), .pixel_emit_count(pixel_emit_count), + .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q), .pixel_color_q(pixel_color_q), + .pixel_fbp_q(pixel_fbp_q), .pixel_fbw_q(pixel_fbw_q), .pixel_psm_q(pixel_psm_q), .pixel_fb_addr_q(pixel_fb_addr_q), + .raster_pixel_emit(raster_pixel_emit), .raster_pixel_emit_count(raster_pixel_emit_count), + .raster_pixel_x_q(raster_pixel_x_q), .raster_pixel_y_q(raster_pixel_y_q), .raster_pixel_color_q(raster_pixel_color_q), + .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), .raster_pixel_be_q(raster_pixel_be_q), + .raster_pixel_mask_q(raster_pixel_mask_q), .raster_pixel_psm_q(raster_pixel_psm_q), + .raster_active(raster_active), .raster_overflow(raster_overflow), + .raster_fifo_full(raster_fifo_full), .raster_degenerate(raster_degenerate), + .tex_rd_en(tex_rd_en), .tex_rd_addr(tex_rd_addr), .tex_rd_data(32'd0), + .fb_rd_en(fb_rd_en), .fb_rd_addr(fb_rd_addr), .fb_rd_data(32'd0), + .z_rd_en(z_rd_en), .z_rd_addr(z_rd_addr), .z_rd_data(32'd0), + .ev_valid(ev_valid), .ev_subsys(ev_subsys), .ev_event(ev_event), + .ev_arg0(ev_arg0), .ev_arg1(ev_arg1), .ev_arg2(ev_arg2), .ev_arg3(ev_arg3), .ev_flags(ev_flags)); + + // flat triangle color + fog + localparam int CR=8'hC0, CG=8'h80, CB=8'h40, CA=8'hFF, FF=8'h80; + function automatic logic [63:0] xyzf2(input int x, input int y, input int f); + return {8'(f), 24'd0, 12'(y), 4'd0, 12'(x), 4'd0}; + endfunction + + // capture emitted pixels + bit covered [0:15][0:15]; + logic [31:0] cap_c [0:15][0:15]; + bit cap_armed; + always_ff @(posedge clk) begin + if (rst_n && cap_armed && raster_pixel_emit + && raster_pixel_x_q < 16 && raster_pixel_y_q < 16) begin + covered[raster_pixel_y_q][raster_pixel_x_q] <= 1'b1; + cap_c [raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_color_q[31:0]; + end + end + + int errors, checks; + function automatic int fogblack(input int c, input int f); return (c*f) >> 8; endfunction + task automatic chk(input int x, input int y); + int er, eg, eb; + er=fogblack(CR,FF); eg=fogblack(CG,FF); eb=fogblack(CB,FF); + if (!covered[y][x]) begin $error("[e2e] (%0d,%0d) not covered", x, y); errors++; end + else if (cap_c[y][x][7:0]!==er[7:0] || cap_c[y][x][15:8]!==eg[7:0] || + cap_c[y][x][23:16]!==eb[7:0] || cap_c[y][x][31:24]!==CA[7:0]) begin + $error("[e2e] (%0d,%0d) got %08x expected fog-black (R=%0d G=%0d B=%0d A=%0d)", + x, y, cap_c[y][x], er, eg, eb, CA); errors++; + end else begin + $display("[e2e] (%0d,%0d) got (%0d,%0d,%0d,a=%0d) fog-black EXACT OK", + x, y, cap_c[y][x][7:0], cap_c[y][x][15:8], cap_c[y][x][23:16], cap_c[y][x][31:24]); + checks++; + end + endtask + + initial begin + errors=0; checks=0; cap_armed=0; start=0; + for (int y=0;y<16;y++) for (int x=0;x<16;x++) begin covered[y][x]=0; cap_c[y][x]=0; end + for (int i=0;i<128;i++) stg[i]=64'd0; + // staging: 1 tri, shared state, PRIM+FGE, 3 vertices (RGBAQ/UV/XYZF2) + stg[0]=64'd1; + stg[1]=64'h0000_0000_0001_0000; // FRAME FBW=1 PSMCT32 + stg[2]=64'd0; stg[3]=64'd0; stg[4]=64'd0; stg[5]=64'd0; // ALPHA/TEST/ZBUF/TEX0 + stg[6]=64'd3 | (64'h1<<5); // PRIM: TRI + FGE (TME=0) + // v0 + stg[7]={32'd0, 8'(CA), 8'(CB), 8'(CG), 8'(CR)}; stg[8]=64'd0; stg[9]=xyzf2(2,2,FF); + // v1 + stg[10]={32'd0, 8'(CA), 8'(CB), 8'(CG), 8'(CR)}; stg[11]=64'd0; stg[12]=xyzf2(12,3,FF); + // v2 (closes) + stg[13]={32'd0, 8'(CA), 8'(CB), 8'(CG), 8'(CR)}; stg[14]=64'd0; stg[15]=xyzf2(4,9,FF); + + rst_n=0; repeat(4) @(posedge clk); rst_n=1; repeat(2) @(posedge clk); + cap_armed=1; + @(negedge clk); start=1; @(negedge clk); start=0; + wait (done==1'b1); + repeat (400) @(posedge clk); + cap_armed=0; @(posedge clk); + + if (raster_pixel_emit_count == 0) begin + $error("[e2e] feeder->gs_stub rendered 0 pixels"); errors++; + end + // interior pixels of the triangle + chk(5,4); chk(4,5); chk(6,4); + if (checks == 0) begin $error("[e2e] no interior pixels verified"); errors++; end + + $display("[tb_gs_feeder_fog_e2e] emit_count=%0d checks=%0d errors=%0d", + raster_pixel_emit_count, checks, errors); + if (errors==0) $display("[tb_gs_feeder_fog_e2e] PASS"); + else $display("[tb_gs_feeder_fog_e2e] FAIL"); + $finish; + end + + initial begin #3000000; $error("[tb_gs_feeder_fog_e2e] timeout"); $finish; end +endmodule : tb_gs_feeder_fog_e2e diff --git a/sim/tb/gif_gs/tb_gs_fog.sv b/sim/tb/gif_gs/tb_gs_fog.sv new file mode 100644 index 0000000..7d9b879 --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_fog.sv @@ -0,0 +1,445 @@ +// retroDE_ps2 — tb_gs_fog +// +// Focused white-box TB for GS per-vertex FOG in the reduced rasterizer. +// +// PS2 GS fog: final_color_channel = (C * F + FOGCOL * (255 - F)) >> 8, per +// RGB channel, where F is the 8-bit per-vertex fog coefficient (XYZF2 bits +// [63:56]) interpolated affinely across the primitive (flat for a SPRITE), +// gated on PRIM.FGE (bit 5). FOGCOL is GIF reg 0x3D (low 24 bits = 0xBBGGRR). +// Alpha is NOT fogged. When FGE=0 the emit is byte-identical to the no-fog +// path — the hard invariant. +// +// Tests: +// T1 — FGE=1 triangle, FLAT color, FLAT F. Assert the emitted RGB equals the +// EXACT hand-computed fog blend at several interior pixels, and the +// alpha is preserved unchanged. +// T2 — FGE=1 triangle, FLAT color, DISTINCT per-vertex F. Probe the white-box +// s2_fog_f at interior S2 pixels and assert it matches the barycentric +// (ground-truth) interpolated F within 1 LSB — proving F rides the +// shared affine gradient engine like the colour/Z attributes. +// T3 — FGE=0 triangle, SAME geometry/color as T1 with FOGCOL still set. +// Assert the emitted color is BYTE-IDENTICAL to the raw vertex color +// (no fog applied) — the non-negotiable invariant. +// T4 — FGE=1 SPRITE, flat color, flat F. Assert the exact fog blend on the +// flat-sprite emit path (s2_sprite_color64 chokepoint). + +`timescale 1ns/1ps + +module tb_gs_fog; + + logic clk; + logic rst_n; + initial clk = 1'b0; + always #5 clk = ~clk; + + logic gif_reg_wr_en; + logic [7:0] gif_reg_num; + logic [63:0] gif_reg_data; + + logic [7:0] bg_r, bg_g, bg_b; + logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q; + logic prim_complete; + logic [31:0] prim_complete_count; + logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q; + logic [63:0] prim_color_q; + logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q; + trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q; + trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q; + logic pixel_emit; + logic [31:0] pixel_emit_count; + logic [11:0] pixel_x_q, pixel_y_q; + logic [63:0] pixel_color_q; + logic [8:0] pixel_fbp_q; + logic [5:0] pixel_fbw_q, pixel_psm_q; + logic [31:0] pixel_fb_addr_q; + logic raster_pixel_emit; + logic [31:0] raster_pixel_emit_count; + logic [11:0] raster_pixel_x_q, raster_pixel_y_q; + logic [63:0] raster_pixel_color_q; + logic [31:0] raster_pixel_fb_addr_q; + logic [3:0] raster_pixel_be_q; + logic [31:0] raster_pixel_mask_q; + logic [5:0] raster_pixel_psm_q; + logic raster_active; + logic raster_overflow; + logic raster_fifo_full; + logic raster_degenerate; + logic tex_rd_en; logic [31:0] tex_rd_addr; + logic fb_rd_en; logic [31:0] fb_rd_addr; + logic z_rd_en; logic [31:0] z_rd_addr; + logic ev_valid; + trace_pkg::subsys_e ev_subsys; + trace_pkg::event_e ev_event; + logic [63:0] ev_arg0, ev_arg1, ev_arg2, ev_arg3; + logic [31:0] ev_flags; + + gs_stub u_gs ( + .clk(clk), .rst_n(rst_n), + .reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0), + .gif_reg_wr_en(gif_reg_wr_en), + .gif_reg_num(gif_reg_num), + .gif_reg_data(gif_reg_data), + .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b), + .prim_q(prim_q), .rgbaq_q(rgbaq_q), + .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q), + .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q), + .prim_complete(prim_complete), + .prim_complete_count(prim_complete_count), + .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q), + .prim_color_q(prim_color_q), + .prim_color_v0_q(prim_color_v0_q), + .prim_color_v1_q(prim_color_v1_q), + .prim_color_v2_q(prim_color_v2_q), + .prim_v0_decoded_q(prim_v0_decoded_q), + .prim_v1_decoded_q(prim_v1_decoded_q), + .prim_v2_decoded_q(prim_v2_decoded_q), + .prim_v0_color_decoded_q(prim_v0_color_decoded_q), + .prim_v1_color_decoded_q(prim_v1_color_decoded_q), + .prim_v2_color_decoded_q(prim_v2_color_decoded_q), + .pixel_emit(pixel_emit), + .pixel_emit_count(pixel_emit_count), + .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q), + .pixel_color_q(pixel_color_q), + .pixel_fbp_q(pixel_fbp_q), + .pixel_fbw_q(pixel_fbw_q), + .pixel_psm_q(pixel_psm_q), + .pixel_fb_addr_q(pixel_fb_addr_q), + .raster_pixel_emit(raster_pixel_emit), + .raster_pixel_emit_count(raster_pixel_emit_count), + .raster_pixel_x_q(raster_pixel_x_q), + .raster_pixel_y_q(raster_pixel_y_q), + .raster_pixel_color_q(raster_pixel_color_q), + .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), + .raster_pixel_be_q(raster_pixel_be_q), + .raster_pixel_mask_q(raster_pixel_mask_q), + .raster_pixel_psm_q(raster_pixel_psm_q), + .raster_active(raster_active), + .raster_overflow(raster_overflow), + .raster_fifo_full(raster_fifo_full), + .raster_degenerate(raster_degenerate), + .tex_rd_en(tex_rd_en), .tex_rd_addr(tex_rd_addr), .tex_rd_data(32'd0), + .fb_rd_en(fb_rd_en), .fb_rd_addr(fb_rd_addr), .fb_rd_data(32'd0), + .z_rd_en(z_rd_en), .z_rd_addr(z_rd_addr), .z_rd_data(32'd0), + .ev_valid(ev_valid), .ev_subsys(ev_subsys), .ev_event(ev_event), + .ev_arg0(ev_arg0), .ev_arg1(ev_arg1), + .ev_arg2(ev_arg2), .ev_arg3(ev_arg3), + .ev_flags(ev_flags) + ); + + // ----- Drive helpers ----- + task automatic drive_reg(input logic [7:0] num, input logic [63:0] data); + @(negedge clk); + gif_reg_wr_en = 1'b1; gif_reg_num = num; gif_reg_data = data; + @(posedge clk); + endtask + task automatic drive_idle(); + @(negedge clk); + gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0; + @(posedge clk); + endtask + + // XYZF2 (reg 0x04): X=[15:0] (12.4), Y=[31:16] (12.4), Z=[55:32] (24b), + // F=[63:56] (8b fog). Screen coords carry no fractional bits here. + function automatic logic [63:0] xyzf2(input int x, input int y, + input int z, input int f); + return {8'(f), 24'(z), 12'(y), 4'd0, 12'(x), 4'd0}; + endfunction + function automatic logic [63:0] rgbaq(input int r, input int g, input int b, input int a); + return {32'd0, 8'(a), 8'(b), 8'(g), 8'(r)}; + endfunction + + localparam logic [7:0] R_PRIM = 8'h00; + localparam logic [7:0] R_RGBAQ = 8'h01; + localparam logic [7:0] R_XYZF2 = 8'h04; + localparam logic [7:0] R_FOGCOL = 8'h3D; + localparam logic [7:0] R_FRAME_1 = 8'h4C; + localparam logic [63:0] PRIM_TRI = 64'd3; // TRI + localparam logic [63:0] PRIM_TRI_FGE = 64'd3 | (64'd1 << 5); // TRI + FGE + localparam logic [63:0] PRIM_SPRITE_FGE = 64'd6 | (64'd1 << 5); // SPRITE + FGE + localparam logic [63:0] FRAME_1_VAL = 64'h0000_0000_0001_0000; // FBW=1, PSMCT32 + + // FOGCOL = 0xBBGGRR + localparam int FOG_R = 8'h20; + localparam int FOG_G = 8'h40; + localparam int FOG_B = 8'h60; + localparam logic [63:0] FOGCOL_VAL = {40'd0, 8'(FOG_B), 8'(FOG_G), 8'(FOG_R)}; + + // Reference fog blend (matches RTL fog_blend_abgr exactly). + function automatic int fog_ch(input int c, input int f, input int fc); + return (c * f + fc * (255 - f)) >> 8; + endfunction + + function automatic int absdiff(input int a, input int b); + return (a > b) ? (a - b) : (b - a); + endfunction + + // ----- Independent triangle reference (edge fn, fill rule, barycentric) ----- + int vx0, vy0, vx1, vy1, vx2, vy2; + int vf0, vf1, vf2; + int ref_det; + int sx1, sy1, sx2, sy2, sf1, sf2; + + function automatic int edge_f(input int px, input int py, + input int ax, input int ay, + input int bx, input int by); + return (px - ax) * (by - ay) - (py - ay) * (bx - ax); + endfunction + + task automatic setup_ref(); + int sa; + sa = (vx1 - vx0) * (vy2 - vy0) - (vy1 - vy0) * (vx2 - vx0); + if (sa < 0) begin + sx1 = vx2; sy1 = vy2; sf1 = vf2; + sx2 = vx1; sy2 = vy1; sf2 = vf1; + ref_det = -sa; + end else begin + sx1 = vx1; sy1 = vy1; sf1 = vf1; + sx2 = vx2; sy2 = vy2; sf2 = vf2; + ref_det = sa; + end + endtask + + function automatic bit tol(input int ax, input int ay, input int bx, input int by); + int dx, dy; + dx = bx - ax; dy = by - ay; + return (dy > 0) || ((dy == 0) && (dx > 0)); + endfunction + + function automatic bit ref_inside(input int px, input int py); + int e0, e1, e2, b0, b1, b2; + e0 = edge_f(px, py, vx0, vy0, sx1, sy1); + e1 = edge_f(px, py, sx1, sy1, sx2, sy2); + e2 = edge_f(px, py, sx2, sy2, vx0, vy0); + b0 = tol(vx0, vy0, sx1, sy1) ? 0 : 1; + b1 = tol(sx1, sy1, sx2, sy2) ? 0 : 1; + b2 = tol(sx2, sy2, vx0, vy0) ? 0 : 1; + return ((e0 + b0) <= 0) && ((e1 + b1) <= 0) && ((e2 + b2) <= 0); + endfunction + + function automatic int ref_attr(input int px, input int py, + input int a0, input int a1, input int a2); + int L0, L1, L2, num; + L0 = -edge_f(px, py, sx1, sy1, sx2, sy2); + L1 = -edge_f(px, py, sx2, sy2, vx0, vy0); + L2 = -edge_f(px, py, vx0, vy0, sx1, sy1); + num = L0 * a0 + L1 * a1 + L2 * a2; + if (ref_det == 0) return 0; + return num / ref_det; + endfunction + + int errors; + + // ----- Emit capture (full 32-bit ABGR) ----- + bit covered [0:15][0:15]; + logic [31:0] cap_c [0:15][0:15]; + bit cap_armed; + task automatic clear_cov(); + for (int y = 0; y < 16; y++) + for (int x = 0; x < 16; x++) begin + covered[y][x] = 1'b0; cap_c[y][x] = 32'd0; + end + endtask + always_ff @(posedge clk) begin + if (rst_n && cap_armed && raster_pixel_emit + && raster_pixel_x_q < 16 && raster_pixel_y_q < 16) begin + covered[raster_pixel_y_q][raster_pixel_x_q] <= 1'b1; + cap_c [raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_color_q[31:0]; + end + end + + // ----- T2 F-interpolation probe: white-box s2_fog_f at interior pixels ----- + int f_probe_checks; + bit f_probe_armed; + always_ff @(posedge clk) begin + if (rst_n && f_probe_armed + && u_gs.s2_valid_q && u_gs.s2_inside_q && u_gs.ras_tri_active) begin + int px, py, ef; + px = int'(u_gs.s2_x_q); + py = int'(u_gs.s2_y_q); + if (px < 16 && py < 16 && ref_inside(px, py)) begin + ef = ref_attr(px, py, vf0, sf1, sf2); + if (absdiff(int'(u_gs.s2_fog_f), ef) > 1) begin + $error("[T2 F] (%0d,%0d) s2_fog_f=%0d expected ~%0d", + px, py, u_gs.s2_fog_f, ef); + errors = errors + 1; + end else begin + f_probe_checks = f_probe_checks + 1; + end + end + end + end + + // Exact fog-blend spot check on a captured emitted pixel. + task automatic chk_fog(input int x, input int y, + input int cr, input int cg, input int cb, input int ca, + input int f); + int er, eg, eb; + er = fog_ch(cr, f, FOG_R); + eg = fog_ch(cg, f, FOG_G); + eb = fog_ch(cb, f, FOG_B); + if (!covered[y][x]) begin + $error("[fog] (%0d,%0d) expected covered but was not", x, y); + errors = errors + 1; + end else if (cap_c[y][x][7:0] !== er[7:0] || + cap_c[y][x][15:8] !== eg[7:0] || + cap_c[y][x][23:16] !== eb[7:0]) begin + $error("[fog] (%0d,%0d) got (%0d,%0d,%0d) expected EXACT (%0d,%0d,%0d)", + x, y, cap_c[y][x][7:0], cap_c[y][x][15:8], cap_c[y][x][23:16], er, eg, eb); + errors = errors + 1; + end else if (cap_c[y][x][31:24] !== ca[7:0]) begin + $error("[fog] (%0d,%0d) alpha fogged: got %0d expected %0d (unchanged)", + x, y, cap_c[y][x][31:24], ca); + errors = errors + 1; + end else begin + $display("[fog] (%0d,%0d) got (%0d,%0d,%0d,a=%0d) EXACT OK", + x, y, cap_c[y][x][7:0], cap_c[y][x][15:8], cap_c[y][x][23:16], + cap_c[y][x][31:24]); + end + endtask + + // Exact no-fog (FGE=0 invariant): emitted RGB == raw color, alpha == raw. + task automatic chk_nofog(input int x, input int y, + input int cr, input int cg, input int cb, input int ca); + if (!covered[y][x]) begin + $error("[nofog] (%0d,%0d) expected covered but was not", x, y); + errors = errors + 1; + end else if (cap_c[y][x][7:0] !== cr[7:0] || + cap_c[y][x][15:8] !== cg[7:0] || + cap_c[y][x][23:16] !== cb[7:0] || + cap_c[y][x][31:24] !== ca[7:0]) begin + $error("[nofog] (%0d,%0d) FGE=0 NOT byte-identical: got %08x expected raw (%0d,%0d,%0d,a=%0d)", + x, y, cap_c[y][x], cr, cg, cb, ca); + errors = errors + 1; + end else begin + $display("[nofog] (%0d,%0d) FGE=0 byte-identical raw color OK", x, y); + end + endtask + + // Flat triangle constants. + localparam int TC_R = 8'hC0, TC_G = 8'h80, TC_B = 8'h30, TC_A = 8'hFF; + + initial begin + errors = 0; f_probe_checks = 0; cap_armed = 1'b0; f_probe_armed = 1'b0; + rst_n = 1'b0; gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0; + clear_cov(); + + repeat (4) @(posedge clk); + rst_n = 1'b1; + repeat (2) @(posedge clk); + + // ================================================================ + // T1 — FGE=1 triangle, FLAT color, FLAT F. Exact fog blend. + // ================================================================ + vx0=2; vy0=1; vf0=8'h40; + vx1=13;vy1=2; vf1=8'h40; + vx2=5; vy2=7; vf2=8'h40; + setup_ref(); + + clear_cov(); cap_armed = 1'b1; + drive_reg(R_FOGCOL, FOGCOL_VAL); + drive_reg(R_PRIM, PRIM_TRI_FGE); + drive_reg(R_FRAME_1, FRAME_1_VAL); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx0,vy0,0,vf0)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx1,vy1,0,vf1)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx2,vy2,0,vf2)); // closes + drive_idle(); + repeat (300) @(posedge clk); + cap_armed = 1'b0; + @(posedge clk); + + chk_fog(7, 3, TC_R, TC_G, TC_B, TC_A, 8'h40); + chk_fog(5, 4, TC_R, TC_G, TC_B, TC_A, 8'h40); + chk_fog(6, 2, TC_R, TC_G, TC_B, TC_A, 8'h40); + if (raster_overflow || raster_degenerate) begin + $error("[T1] raster anomaly"); errors = errors + 1; + end + + // ================================================================ + // T2 — FGE=1 triangle, FLAT color, DISTINCT per-vertex F. Probe the + // white-box interpolated s2_fog_f vs barycentric ground truth. + // ================================================================ + vx0=2; vy0=1; vf0=8'h10; + vx1=13;vy1=2; vf1=8'hF0; + vx2=5; vy2=7; vf2=8'h80; + setup_ref(); + + f_probe_armed = 1'b1; + drive_reg(R_PRIM, PRIM_TRI_FGE); + drive_reg(R_FRAME_1, FRAME_1_VAL); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx0,vy0,0,vf0)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx1,vy1,0,vf1)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx2,vy2,0,vf2)); // closes + drive_idle(); + repeat (320) @(posedge clk); + f_probe_armed = 1'b0; + @(posedge clk); + if (f_probe_checks == 0) begin + $error("[T2] no interior F pixels observed"); errors = errors + 1; + end + + // ================================================================ + // T3 — FGE=0 triangle, SAME geometry/color as T1, FOGCOL still set. + // Emitted color MUST be byte-identical to the raw vertex color. + // ================================================================ + vx0=2; vy0=1; vf0=8'h40; + vx1=13;vy1=2; vf1=8'h40; + vx2=5; vy2=7; vf2=8'h40; + setup_ref(); + + clear_cov(); cap_armed = 1'b1; + drive_reg(R_PRIM, PRIM_TRI); // FGE = 0 + drive_reg(R_FRAME_1, FRAME_1_VAL); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx0,vy0,0,vf0)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx1,vy1,0,vf1)); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(vx2,vy2,0,vf2)); // closes + drive_idle(); + repeat (300) @(posedge clk); + cap_armed = 1'b0; + @(posedge clk); + + chk_nofog(7, 3, TC_R, TC_G, TC_B, TC_A); + chk_nofog(5, 4, TC_R, TC_G, TC_B, TC_A); + chk_nofog(6, 2, TC_R, TC_G, TC_B, TC_A); + + // ================================================================ + // T4 — FGE=1 SPRITE, flat color, flat F. Exact fog blend on the + // sprite emit chokepoint (s2_sprite_color64). + // ================================================================ + clear_cov(); cap_armed = 1'b1; + drive_reg(R_PRIM, PRIM_SPRITE_FGE); + drive_reg(R_FRAME_1, FRAME_1_VAL); + drive_reg(R_RGBAQ, rgbaq(TC_R,TC_G,TC_B,TC_A)); + drive_reg(R_XYZF2, xyzf2(1, 1, 0, 8'hA0)); // sprite origin vertex + drive_reg(R_XYZF2, xyzf2(5, 5, 0, 8'hA0)); // closing vertex -> flat F=0xA0 + drive_idle(); + repeat (200) @(posedge clk); + cap_armed = 1'b0; + @(posedge clk); + + // Interior sprite pixels (rect [1,5)x[1,5)). + chk_fog(2, 2, TC_R, TC_G, TC_B, TC_A, 8'hA0); + chk_fog(3, 4, TC_R, TC_G, TC_B, TC_A, 8'hA0); + chk_fog(4, 1, TC_R, TC_G, TC_B, TC_A, 8'hA0); + + $display("[tb_gs_fog] T2 f_checks=%0d errors=%0d", f_probe_checks, errors); + if (errors == 0) $display("[tb_gs_fog] PASS"); + else $display("[tb_gs_fog] FAIL"); + $finish; + end + + initial begin + #5000000; + $error("[tb_gs_fog] timeout"); + $finish; + end + +endmodule : tb_gs_fog diff --git a/sim/tb/gif_gs/tb_gs_fog_persp.sv b/sim/tb/gif_gs/tb_gs_fog_persp.sv new file mode 100644 index 0000000..45e3e11 --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_fog_persp.sv @@ -0,0 +1,346 @@ +// retroDE_ps2 — tb_gs_fog_persp +// +// Focused white-box TB for GS per-vertex FOG on the PERSPECTIVE-textured emit +// path (persp_emit5). Forces PERSPECTIVE_CORRECT=1. The SH3 board scene runs +// this build (PERSPECTIVE_CORRECT=1, COMBINED_TAZ=0, TILE_LOCAL=0), so its +// geometry emits through persp_emit5 — the path round-1 left unfogged. +// +// A perspective-textured DECAL triangle (ST/Q supplied so ras_persp activates) +// samples a SOLID texture (tex_rd_data tied constant → s1_tex_color == TEXEL +// for every pixel), so the emitted color isolates the fog blend and its stage +// alignment without needing to model the perspective UV walk. F is affine / +// screen-linear per vertex (XYZF2[63:56]). +// +// Checks: +// T1p — FGE=1, flat color, DISTINCT per-vertex F. At every persp_emit5: +// (a) ALIGNMENT — the white-box +5-aligned s2_fog_f delay tap +// (u_gs.persp_fog_f5) matches the barycentric (screen-linear) F at +// the emitted pixel (persp_x5,persp_y5) within 1 LSB. A wrong delay +// depth would 1-pixel-shift F and fail here. +// (b) BLEND — the captured emitted RGB equals fog_blend(TEXEL, +// persp_fog_f5) EXACTLY, alpha unchanged. +// T2p — FGE=0, same geometry. Emitted color is BYTE-IDENTICAL to TEXEL (no +// fog) — the non-negotiable invariant on the perspective path. + +`timescale 1ns/1ps + +module tb_gs_fog_persp; + + logic clk; + logic rst_n; + initial clk = 1'b0; + always #5 clk = ~clk; + + logic gif_reg_wr_en; + logic [7:0] gif_reg_num; + logic [63:0] gif_reg_data; + + logic [7:0] bg_r, bg_g, bg_b; + logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q; + logic prim_complete; + logic [31:0] prim_complete_count; + logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q; + logic [63:0] prim_color_q; + logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q; + trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q; + trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q; + logic pixel_emit; + logic [31:0] pixel_emit_count; + logic [11:0] pixel_x_q, pixel_y_q; + logic [63:0] pixel_color_q; + logic [8:0] pixel_fbp_q; + logic [5:0] pixel_fbw_q, pixel_psm_q; + logic [31:0] pixel_fb_addr_q; + logic raster_pixel_emit; + logic [31:0] raster_pixel_emit_count; + logic [11:0] raster_pixel_x_q, raster_pixel_y_q; + logic [63:0] raster_pixel_color_q; + logic [31:0] raster_pixel_fb_addr_q; + logic [3:0] raster_pixel_be_q; + logic [31:0] raster_pixel_mask_q; + logic [5:0] raster_pixel_psm_q; + logic raster_active; + logic raster_overflow; + logic raster_fifo_full; + logic raster_degenerate; + logic tex_rd_en; logic [31:0] tex_rd_addr; + logic fb_rd_en; logic [31:0] fb_rd_addr; + logic z_rd_en; logic [31:0] z_rd_addr; + logic ev_valid; + trace_pkg::subsys_e ev_subsys; + trace_pkg::event_e ev_event; + logic [63:0] ev_arg0, ev_arg1, ev_arg2, ev_arg3; + logic [31:0] ev_flags; + + // Solid texture: any texel address returns this ABGR word. + localparam logic [31:0] TEXEL = 32'hFF_B0_60_20; // A=FF B=B0 G=60 R=20 + logic [31:0] tex_texel; + assign tex_texel = TEXEL; + + gs_stub #(.PERSPECTIVE_CORRECT(1'b1)) u_gs ( + .clk(clk), .rst_n(rst_n), + .reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0), + .gif_reg_wr_en(gif_reg_wr_en), + .gif_reg_num(gif_reg_num), + .gif_reg_data(gif_reg_data), + .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b), + .prim_q(prim_q), .rgbaq_q(rgbaq_q), + .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q), + .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q), + .prim_complete(prim_complete), + .prim_complete_count(prim_complete_count), + .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q), + .prim_color_q(prim_color_q), + .prim_color_v0_q(prim_color_v0_q), + .prim_color_v1_q(prim_color_v1_q), + .prim_color_v2_q(prim_color_v2_q), + .prim_v0_decoded_q(prim_v0_decoded_q), + .prim_v1_decoded_q(prim_v1_decoded_q), + .prim_v2_decoded_q(prim_v2_decoded_q), + .prim_v0_color_decoded_q(prim_v0_color_decoded_q), + .prim_v1_color_decoded_q(prim_v1_color_decoded_q), + .prim_v2_color_decoded_q(prim_v2_color_decoded_q), + .pixel_emit(pixel_emit), + .pixel_emit_count(pixel_emit_count), + .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q), + .pixel_color_q(pixel_color_q), + .pixel_fbp_q(pixel_fbp_q), + .pixel_fbw_q(pixel_fbw_q), + .pixel_psm_q(pixel_psm_q), + .pixel_fb_addr_q(pixel_fb_addr_q), + .raster_pixel_emit(raster_pixel_emit), + .raster_pixel_emit_count(raster_pixel_emit_count), + .raster_pixel_x_q(raster_pixel_x_q), + .raster_pixel_y_q(raster_pixel_y_q), + .raster_pixel_color_q(raster_pixel_color_q), + .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), + .raster_pixel_be_q(raster_pixel_be_q), + .raster_pixel_mask_q(raster_pixel_mask_q), + .raster_pixel_psm_q(raster_pixel_psm_q), + .raster_active(raster_active), + .raster_overflow(raster_overflow), + .raster_fifo_full(raster_fifo_full), + .raster_degenerate(raster_degenerate), + .tex_rd_en(tex_rd_en), .tex_rd_addr(tex_rd_addr), .tex_rd_data(tex_texel), + .fb_rd_en(fb_rd_en), .fb_rd_addr(fb_rd_addr), .fb_rd_data(32'd0), + .z_rd_en(z_rd_en), .z_rd_addr(z_rd_addr), .z_rd_data(32'd0), + .ev_valid(ev_valid), .ev_subsys(ev_subsys), .ev_event(ev_event), + .ev_arg0(ev_arg0), .ev_arg1(ev_arg1), + .ev_arg2(ev_arg2), .ev_arg3(ev_arg3), + .ev_flags(ev_flags) + ); + + // ----- Drive helpers ----- + task automatic drive_reg(input logic [7:0] num, input logic [63:0] data); + @(negedge clk); + gif_reg_wr_en = 1'b1; gif_reg_num = num; gif_reg_data = data; + @(posedge clk); + endtask + task automatic drive_idle(); + @(negedge clk); + gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0; + @(posedge clk); + endtask + + // XYZF2 (reg 0x04): X=[15:0] (12.4), Y=[31:16] (12.4), Z=[55:32], F=[63:56]. + function automatic logic [63:0] xyzf2(input int x, input int y, + input int z, input int f); + return {8'(f), 24'(z), 12'(y), 4'd0, 12'(x), 4'd0}; + endfunction + // RGBAQ with Q in [55:32] (24-bit, FRAC=12). + function automatic logic [63:0] rgbaq_q_val(input int r, input int g, input int b, + input int a, input int q_fp); + return {8'd0, 24'(q_fp), 8'(a), 8'(b), 8'(g), 8'(r)}; + endfunction + // ST (reg 0x02): S in [23:0], T in [55:32] (24-bit, FRAC=12). + function automatic logic [63:0] st_val(input int s_fp, input int t_fp); + return {8'd0, 24'(t_fp), 8'd0, 24'(s_fp)}; + endfunction + + localparam logic [7:0] R_PRIM = 8'h00; + localparam logic [7:0] R_RGBAQ = 8'h01; + localparam logic [7:0] R_ST = 8'h02; + localparam logic [7:0] R_XYZF2 = 8'h04; + localparam logic [7:0] R_TEX0_1 = 8'h06; + localparam logic [7:0] R_FOGCOL = 8'h3D; + localparam logic [7:0] R_FRAME_1 = 8'h4C; + + // PRIM: TRIANGLE(3) + TME(bit4) + FGE(bit5). + localparam logic [63:0] PRIM_TRI_TEX_FGE = 64'd3 | (64'd1 << 4) | (64'd1 << 5); + localparam logic [63:0] PRIM_TRI_TEX = 64'd3 | (64'd1 << 4); // FGE=0 + localparam logic [63:0] FRAME_1_VAL = 64'h0000_0000_0001_0000; // FBW=1, PSMCT32 + // TEX0_1: TBP0=8, TBW=1, PSM=PSMCT32(0), TW=TH=0, TCC=0, TFX=DECAL(1)@[36:35]. + localparam logic [63:0] TEX0_VAL = 64'd8 | (64'd1 << 14) | (64'd1 << 35); + localparam int Q_ONE = 24'h001000; // 1.0 in FRAC=12 + + localparam int FOG_R = 8'h20, FOG_G = 8'h40, FOG_B = 8'h60; + localparam logic [63:0] FOGCOL_VAL = {40'd0, 8'(FOG_B), 8'(FOG_G), 8'(FOG_R)}; + + function automatic int fog_ch(input int c, input int f, input int fc); + return (c * f + fc * (255 - f)) >> 8; + endfunction + function automatic int absdiff(input int a, input int b); + return (a > b) ? (a - b) : (b - a); + endfunction + + // ----- Triangle reference (edge fn + fill rule + barycentric for F) ----- + int vx0, vy0, vx1, vy1, vx2, vy2, vf0, vf1, vf2; + int ref_det, sx1, sy1, sx2, sy2, sf1, sf2; + + function automatic int edge_f(input int px, input int py, + input int ax, input int ay, + input int bx, input int by); + return (px - ax) * (by - ay) - (py - ay) * (bx - ax); + endfunction + task automatic setup_ref(); + int sa; + sa = (vx1 - vx0) * (vy2 - vy0) - (vy1 - vy0) * (vx2 - vx0); + if (sa < 0) begin + sx1 = vx2; sy1 = vy2; sf1 = vf2; + sx2 = vx1; sy2 = vy1; sf2 = vf1; + ref_det = -sa; + end else begin + sx1 = vx1; sy1 = vy1; sf1 = vf1; + sx2 = vx2; sy2 = vy2; sf2 = vf2; + ref_det = sa; + end + endtask + function automatic int ref_f(input int px, input int py); + int L0, L1, L2, num; + L0 = -edge_f(px, py, sx1, sy1, sx2, sy2); + L1 = -edge_f(px, py, sx2, sy2, vx0, vy0); + L2 = -edge_f(px, py, vx0, vy0, sx1, sy1); + num = L0 * vf0 + L1 * sf1 + L2 * sf2; + if (ref_det == 0) return 0; + return num / ref_det; + endfunction + + int errors, align_checks, blend_checks; + + // Emit capture: expected color computed at persp_emit5 from the RTL's own + // +5-aligned F (persp_fog_f5), plus the alignment check vs barycentric F. + logic [31:0] exp_c [0:31][0:31]; + bit exp_set [0:31][0:31]; + bit fge_on; + + task automatic clear_exp(); + for (int y = 0; y < 32; y++) + for (int x = 0; x < 32; x++) begin + exp_c[y][x] = 32'd0; exp_set[y][x] = 1'b0; + end + endtask + + // persp_emit5 monitor: alignment + record expected fogged color. + always_ff @(posedge clk) begin + if (rst_n && u_gs.ras_persp && u_gs.persp_emit5) begin + int px, py, ef, af; + logic [31:0] want; + px = int'(u_gs.persp_x5); + py = int'(u_gs.persp_y5); + af = int'(u_gs.persp_fog_f5); + if (px < 32 && py < 32) begin + // (a) alignment: RTL +5-aligned F vs barycentric F at this pixel. + ef = ref_f(px, py); + if (absdiff(af, ef) > 1) begin + $error("[persp align] (%0d,%0d) persp_fog_f5=%0d expected ~%0d", px, py, af, ef); + errors = errors + 1; + end else begin + align_checks = align_checks + 1; + end + // (b) expected emitted color = fog(TEXEL, af) if FGE, else TEXEL. + if (fge_on) + want = {TEXEL[31:24], + 8'(fog_ch(int'(TEXEL[23:16]), af, FOG_B)), + 8'(fog_ch(int'(TEXEL[15:8]), af, FOG_G)), + 8'(fog_ch(int'(TEXEL[7:0]), af, FOG_R))}; + else + want = TEXEL; + exp_c[py][px] <= want; + exp_set[py][px] <= 1'b1; + end + end + end + + // Capture the actual emitted pixel and compare to the expected recorded above. + always_ff @(posedge clk) begin + if (rst_n && raster_pixel_emit + && raster_pixel_x_q < 32 && raster_pixel_y_q < 32) begin + if (!exp_set[raster_pixel_y_q][raster_pixel_x_q]) begin + $error("[persp emit] (%0d,%0d) emitted but no persp_emit5 expected color recorded", + raster_pixel_x_q, raster_pixel_y_q); + errors = errors + 1; + end else if (raster_pixel_color_q[31:0] !== exp_c[raster_pixel_y_q][raster_pixel_x_q]) begin + $error("[persp emit] (%0d,%0d) got %08x expected %08x", + raster_pixel_x_q, raster_pixel_y_q, + raster_pixel_color_q[31:0], exp_c[raster_pixel_y_q][raster_pixel_x_q]); + errors = errors + 1; + end else begin + blend_checks = blend_checks + 1; + end + end + end + + task automatic drive_persp_tri(input logic [63:0] prim_word); + drive_reg(R_FOGCOL, FOGCOL_VAL); + drive_reg(R_PRIM, prim_word); + drive_reg(R_FRAME_1, FRAME_1_VAL); + drive_reg(R_TEX0_1, TEX0_VAL); + drive_reg(R_RGBAQ, rgbaq_q_val(8'hFF, 8'hFF, 8'hFF, 8'hFF, Q_ONE)); + drive_reg(R_ST, st_val(0, 0)); + drive_reg(R_XYZF2, xyzf2(vx0, vy0, 0, vf0)); + drive_reg(R_RGBAQ, rgbaq_q_val(8'hFF, 8'hFF, 8'hFF, 8'hFF, Q_ONE)); + drive_reg(R_ST, st_val(0, 0)); + drive_reg(R_XYZF2, xyzf2(vx1, vy1, 0, vf1)); + drive_reg(R_RGBAQ, rgbaq_q_val(8'hFF, 8'hFF, 8'hFF, 8'hFF, Q_ONE)); + drive_reg(R_ST, st_val(0, 0)); + drive_reg(R_XYZF2, xyzf2(vx2, vy2, 0, vf2)); // closes + drive_idle(); + repeat (900) @(posedge clk); + endtask + + initial begin + errors = 0; align_checks = 0; blend_checks = 0; + rst_n = 1'b0; gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0; + clear_exp(); + + repeat (4) @(posedge clk); + rst_n = 1'b1; + repeat (2) @(posedge clk); + + // ============================================================ + // T1p — FGE=1, distinct per-vertex F, solid texel. Alignment + blend. + // ============================================================ + vx0=2; vy0=2; vf0=8'h20; + vx1=12; vy1=3; vf1=8'hE0; + vx2=4; vy2=9; vf2=8'h80; + setup_ref(); + clear_exp(); fge_on = 1'b1; + drive_persp_tri(PRIM_TRI_TEX_FGE); + if (align_checks == 0) begin + $error("[T1p] no persp_emit5 pixels observed (persp path did not fire)"); + errors = errors + 1; + end + if (raster_overflow || raster_degenerate) begin + $error("[T1p] raster anomaly"); errors = errors + 1; + end + + // ============================================================ + // T2p — FGE=0, same geometry. Emitted MUST be byte-identical to TEXEL. + // ============================================================ + clear_exp(); fge_on = 1'b0; + drive_persp_tri(PRIM_TRI_TEX); + + $display("[tb_gs_fog_persp] align_checks=%0d blend_checks=%0d errors=%0d", + align_checks, blend_checks, errors); + if (errors == 0) $display("[tb_gs_fog_persp] PASS"); + else $display("[tb_gs_fog_persp] FAIL"); + $finish; + end + + initial begin + #8000000; + $error("[tb_gs_fog_persp] timeout"); + $finish; + end + +endmodule : tb_gs_fog_persp diff --git a/sim/tb/gif_gs/tb_gs_lpddr_axi_master.sv b/sim/tb/gif_gs/tb_gs_lpddr_axi_master.sv index da733c7..76d1492 100644 --- a/sim/tb/gif_gs/tb_gs_lpddr_axi_master.sv +++ b/sim/tb/gif_gs/tb_gs_lpddr_axi_master.sv @@ -42,7 +42,7 @@ module tb_gs_lpddr_axi_master; gs_lpddr_axi_master #(.FIFO_DEPTH(16)) dut ( .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), .arm(arm), .canary(1'b0), .fb_base(fb_base_dut), .ctrl_commit(ctrl_commit), - .px_emit(px_emit), .px_addr(px_addr), .px_pix16(px_pix16), + .px_emit(px_emit), .px_addr(px_addr), .px_pix32({16'd0, px_pix16}), .flush(1'b0), .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .awaddr(awaddr), .awlen(awlen), .awsize(awsize), .awburst(awburst), .awid(awid), .awvalid(awvalid), .awready(awready), @@ -59,7 +59,7 @@ module tb_gs_lpddr_axi_master; gs_lpddr_axi_master #(.FIFO_DEPTH(16)) dut_canary ( .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), .arm(arm), .canary(1'b1), .fb_base(32'h0), .ctrl_commit(ctrl_commit), - .px_emit(px_emit), .px_addr(px_addr), .px_pix16(px_pix16), + .px_emit(px_emit), .px_addr(px_addr), .px_pix32({16'd0, px_pix16}), .flush(1'b0), .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .awaddr(), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(can_awvalid), .awready(1'b1), .wdata(), .wstrb(), .wlast(), .wvalid(can_wvalid), .wready(1'b1), @@ -68,6 +68,45 @@ module tb_gs_lpddr_axi_master; .bresp_err_count(), .fifo_overflow_count(), .idle() ); + // ---- Ch353 PSMCT32 DUT (PIX_BYTES=4) + BACKPRESSURED capturing slave (Codex #3) ---- + logic px32_emit=0, px32_flush=0; + logic [31:0] px32_addr=0, px32_data=0; + logic [255:0] w32_data; logic [31:0] w32_strb, w32_awaddr; logic w32_awvalid, w32_wvalid, w32_bready, w32_drained; + logic [31:0] beats32, bursts32, ovf32, bresp_err32; + logic force_stall = 1'b0; // Codex saturation test — hold AXI fully off to fill the FIFO + wire aw32_rdy = !force_stall && lfsr[1]; // intermittent AW backpressure (off entirely while stalled) + wire w32_rdy = !force_stall && (lfsr[3] | lfsr[5]); + logic b32_valid; logic [2:0] b32_pending; // delayed B response + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if (!axi_rst_n) begin b32_valid<=0; b32_pending<=0; end + else begin + if (w32_wvalid && w32_rdy) b32_pending <= 3'd3; + else if (b32_pending != 0) b32_pending <= b32_pending - 3'd1; + if (b32_pending == 3'd1) b32_valid <= 1; + else if (b32_valid && w32_bready) b32_valid <= 0; + end + end + gs_lpddr_axi_master #(.FIFO_DEPTH(16), .PIX_BYTES(4)) dut32 ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), + .arm(1'b1), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(ctrl_commit), + .px_emit(px32_emit), .px_addr(px32_addr), .px_pix32(px32_data), .flush(px32_flush), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), + .awaddr(w32_awaddr), .awlen(), .awsize(), .awburst(), .awid(), + .awvalid(w32_awvalid), .awready(aw32_rdy), + .wdata(w32_data), .wstrb(w32_strb), .wlast(), .wvalid(w32_wvalid), .wready(w32_rdy), + .bvalid(b32_valid), .bready(w32_bready), .bresp(2'b00), + .beats_written(beats32), .bursts_issued(bursts32), + .bresp_err_count(bresp_err32), .fifo_overflow_count(ovf32), .idle(), .frame_drained(w32_drained) + ); + logic [7:0] smem32 [0:1023]; + logic [31:0] aw32_latch; + always_ff @(posedge axi_clk) begin + if (w32_awvalid && aw32_rdy) aw32_latch <= w32_awaddr; + if (w32_wvalid && w32_rdy) for (int i=0;i<32;i++) if (w32_strb[i]) begin + int a32; a32 = aw32_latch + i; if (a32>=0 && a32<1024) smem32[a32] <= w32_data[i*8 +: 8]; + end + end + // ---------------- AXI4 slave model (byte memory) + backpressure ---------------- logic [7:0] smem [0:MEM_BYTES-1]; int errors; initial errors=0; @@ -123,6 +162,9 @@ module tb_gs_lpddr_axi_master; task automatic emit1(input logic [31:0] a, input logic [15:0] p); @(negedge gs_clk); px_emit=1'b1; px_addr=a; px_pix16=p; endtask + task automatic emit32(input logic [31:0] a, input logic [31:0] d); + @(negedge gs_clk); px32_emit=1'b1; px32_addr=a; px32_data=d; px32_flush=1'b0; + endtask // disarm witness: latch any AXI write activity (must stay 0 while arm=0) always_ff @(posedge axi_clk) begin @@ -219,6 +261,80 @@ module tb_gs_lpddr_axi_master; else $display("[axi] STABILITY ok: %0d beats completed under arm/base perturbation, no AMBA-hold violations", beats_written-beats0); end + // ===== Ch353 PSMCT32 TEST: 8 px -> one FULL beat; 5 px + flush -> one PARTIAL beat ===== + begin + for (int i=0;i<256;i++) smem32[i]=8'h00; + // 8 contiguous PSMCT32 px -> lanes 0..7 of beat 0 -> completes naturally (all 32 strb bits) + for (int k=0;k<8;k++) emit32(32'(k*4), 32'hA000_0000 | 32'(k)); + @(negedge gs_clk); px32_emit=1'b0; + begin int d=0; while(beats32<1 && d<4000) begin @(posedge axi_clk); d++; end end // backpressure-tolerant + if (beats32 !== 32'd1) begin $error("[axi32] 8px: beats=%0d (want 1 full beat)", beats32); errors++; end + for (int k=0;k<8;k++) begin + logic [31:0] g; g = {smem32[k*4+3],smem32[k*4+2],smem32[k*4+1],smem32[k*4]}; + if (g !== (32'hA000_0000 | 32'(k))) begin $error("[axi32] beat0 lane%0d got=%08x", k, g); errors++; end + end + // 5 px at beat 1 (addr 32..48) -> PARTIAL (lanes 0..4); no auto-flush -> pulse flush + for (int k=0;k<5;k++) emit32(32'(32 + k*4), 32'hB000_0000 | 32'(k)); + @(negedge gs_clk); px32_emit=1'b0; + @(negedge gs_clk); px32_flush=1'b1; // end-of-scene partial-beat flush + EOF marker + @(negedge gs_clk); px32_flush=1'b0; + // wait on the ORDERED drain ack (robust under backpressure — set after the last beat's BRESP) + begin int d=0; while(!w32_drained && d<8000) begin @(posedge axi_clk); d++; end end + if (!w32_drained) begin $error("[axi32] frame_drained never asserted under backpressure"); errors++; end + if (beats32 !== 32'd2) begin $error("[axi32] partial+flush: beats=%0d (want 2)", beats32); errors++; end + for (int k=0;k<5;k++) begin + logic [31:0] g; g = {smem32[32+k*4+3],smem32[32+k*4+2],smem32[32+k*4+1],smem32[32+k*4]}; + if (g !== (32'hB000_0000 | 32'(k))) begin $error("[axi32] beat1 lane%0d got=%08x", k, g); errors++; end + end + for (int k=5;k<8;k++) begin // unstrobed lanes must be UNTOUCHED (still 0) + logic [31:0] g; g = {smem32[32+k*4+3],smem32[32+k*4+2],smem32[32+k*4+1],smem32[32+k*4]}; + if (g !== 32'd0) begin $error("[axi32] beat1 unstrobed lane%0d got=%08x (want 0)", k, g); errors++; end + end + if (ovf32 !== 0) begin $error("[axi32] FIFO overflow=%0d under backpressure", ovf32); errors++; end + if (bresp_err32 !== 0) begin $error("[axi32] bresp_err=%0d", bresp_err32); errors++; end + if (errors==0) $display("[axi32] PSMCT32+backpressure ok: full beat + partial-flush survive AW/W/B stalls; ovf=0 bresp_err=0; ordered drain ack"); + end + + // ===== Ch353 (Codex) SATURATION: hold AXI off until the FIFO is FULL, then flush. The partial beat and the + // EOF marker must NOT be dropped (their state is retained, gated on !fifo_wfull); on release they push in + // order and frame_drained asserts only after the last BRESP. ===== + begin + for (int i=0;i<1024;i++) smem32[i]=8'h00; + force_stall = 1'b1; // AXI fully off -> the FIFO saturates as we emit + for (int bt=0;bt<24;bt++) for (int k=0;k<8;k++) emit32(32'(bt*32 + k*4), 32'hC000_0000 | 32'(bt*8+k)); + @(negedge gs_clk); px32_emit=1'b0; + for (int k=0;k<5;k++) emit32(32'(30*32 + k*4), 32'hD000_0000 | 32'(k)); // a PARTIAL beat at a distinct line + @(negedge gs_clk); px32_emit=1'b0; + @(negedge gs_clk); px32_flush=1'b1; @(negedge gs_clk); px32_flush=1'b0; // flush while the FIFO is FULL + repeat(80) @(posedge axi_clk); + if (w32_drained) begin $error("[axi32-sat] frame_drained asserted while AXI stalled (EOF popped early)"); errors++; end + force_stall = 1'b0; // release -> drain -> the GATED partial + marker finally push + begin int d=0; while(!w32_drained && d<60000) begin @(posedge axi_clk); d++; end end + if (!w32_drained) begin $error("[axi32-sat] frame_drained never asserted after release (partial/EOF DROPPED under full FIFO)"); errors++; end + for (int k=0;k<5;k++) begin // the PARTIAL beat must SURVIVE the full-FIFO flush + logic [31:0] g; g = {smem32[30*32+k*4+3],smem32[30*32+k*4+2],smem32[30*32+k*4+1],smem32[30*32+k*4]}; + if (g !== (32'hD000_0000 | 32'(k))) begin $error("[axi32-sat] partial lane%0d got=%08x (DROPPED under saturation)", k, g); errors++; end + end + if (errors==0) $display("[axi32-sat] SATURATION ok: FIFO full at flush; partial+EOF retained until accepted; frame_drained after BRESP"); + end + + // ===== Ch353 (Codex round 3) NEAR-FULL: scene ENDS ON A FULL BEAT, NO partial, flush immediately after the + // final normal beat. The EOF-marker enqueue must not race the prior normal fifo_wr (registered fifo_wfull) — + // gated on !fifo_wr && !fifo_wfull. ===== + begin + for (int i=0;i<1024;i++) smem32[i]=8'h00; + force_stall = 1'b1; // AXI off -> FIFO saturates as we emit + for (int bt=0;bt<20;bt++) for (int k=0;k<8;k++) emit32(32'(bt*32 + k*4), 32'hE000_0000 | 32'(bt*8+k)); + // flush IMMEDIATELY after the final FULL beat — no partial (has_data=0 once the last beat completes) + @(negedge gs_clk); px32_emit=1'b0; px32_flush=1'b1; @(negedge gs_clk); px32_flush=1'b0; + repeat(40) @(posedge axi_clk); + if (w32_drained) begin $error("[axi32-nf] frame_drained asserted while AXI stalled"); errors++; end + force_stall = 1'b0; // release -> drain -> the EOF marker pushes + pops + begin int d=0; while(!w32_drained && d<60000) begin @(posedge axi_clk); d++; end end + if (!w32_drained) begin $error("[axi32-nf] frame_drained never asserted (EOF DROPPED when scene ended on a full beat)"); errors++; end + if (errors==0) $display("[axi32-nf] NEAR-FULL ok: scene ends on full beat, no partial; EOF survives, frame_drained after BRESP"); + end + $display("[tb_gs_lpddr_axi_master] beats=%0d bursts=%0d bresp_err=%0d fifo_ovf=%0d prot_err=%0d idle=%0b errors=%0d", beats_written, bursts_issued, bresp_err_count, fifo_overflow_count, prot_err, idle, errors); if (errors==0) $display("[tb_gs_lpddr_axi_master] PASS"); diff --git a/sim/tb/gif_gs/tb_gs_lpddr_axi_master_elastic.sv b/sim/tb/gif_gs/tb_gs_lpddr_axi_master_elastic.sv new file mode 100644 index 0000000..6f29453 --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_lpddr_axi_master_elastic.sv @@ -0,0 +1,168 @@ +// retroDE_ps2 — tb_gs_lpddr_axi_master_elastic (Ch357, Codex) +// +// Saturation / producer-backpressure test for gs_lpddr_axi_master with ELASTIC_BACKPRESSURE=1 +// (the u_zc_emit|u_c configuration). Proves the elastic (skid) stage + px_ready handshake: +// * a backpressure-aware producer HOLDS px_emit until px_ready and NEVER loses a pixel; +// * FIFO saturation (force_stall fills the FIFO -> px_ready drops -> producer stalls) drops nothing; +// * simultaneous stage drain+refill (intermittent AXI wready) preserves every beat; +// * a partial beat + ordered EOF marker asserted WHILE the FIFO is full retry until accepted; +// * randomized AW/W/B stalls; exact slave-memory contents == replayed reference; col_ovf == 0; +// * frame_drained eventually asserts (no hang). + +`timescale 1ns/1ps + +module tb_gs_lpddr_axi_master_elastic; + localparam int MEM_WORDS = 4096; // 16 KiB byte memory + localparam int NPIX = 600; // pixels driven (multiple beats + a trailing partial) + + logic gs_clk=0; always #5 gs_clk =~gs_clk; // 100 MHz + logic axi_clk=0; always #7 axi_clk=~axi_clk; // ~71 MHz, async + logic gs_rst_n, axi_rst_n; + logic ctrl_commit=0; always #13 ctrl_commit=~ctrl_commit; + + // ---- producer (backpressure-aware) ---- + logic px_emit; + logic [31:0] px_addr, px_pix; + logic px_ready; + logic flush; + + // ---- AXI ---- + logic [31:0] awaddr; logic [7:0] awlen; logic [2:0] awsize; logic [1:0] awburst; logic [4:0] awid; + logic awvalid, awready; + logic [255:0] wdata; logic [31:0] wstrb; logic wlast, wvalid, wready; + logic bvalid, bready; logic [1:0] bresp; + logic [31:0] beats_written, bursts_issued, bresp_err_count, col_ovf; + logic idle, frame_drained; + + logic force_stall = 1'b0; // hard AXI-off window to fill the FIFO + logic [15:0] lfsr; + always_ff @(posedge axi_clk or negedge axi_rst_n) + if (!axi_rst_n) lfsr<=16'hACE1; + else lfsr<={lfsr[14:0], lfsr[15]^lfsr[13]^lfsr[12]^lfsr[10]}; + assign awready = !force_stall && lfsr[0]; + assign wready = !force_stall && (lfsr[2] | lfsr[5]); + + // delayed B response + logic [2:0] b_pending; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if (!axi_rst_n) begin bvalid<=0; b_pending<=0; end + else begin + if (wvalid && wready) b_pending <= 3'd3; + else if (b_pending != 0) b_pending <= b_pending - 3'd1; + if (b_pending == 3'd1) bvalid <= 1; + else if (bvalid && bready) bvalid <= 0; + end + end + assign bresp = 2'b00; + + gs_lpddr_axi_master #(.FIFO_DEPTH(16), .PIX_BYTES(4), .ELASTIC_BACKPRESSURE(1'b1)) dut ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(1'b1), + .arm(1'b1), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(ctrl_commit), + .px_emit(px_emit), .px_addr(px_addr), .px_pix32(px_pix), .px_ready(px_ready), .flush(flush), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), + .awaddr(awaddr), .awlen(awlen), .awsize(awsize), .awburst(awburst), .awid(awid), + .awvalid(awvalid), .awready(awready), + .wdata(wdata), .wstrb(wstrb), .wlast(wlast), .wvalid(wvalid), .wready(wready), + .bvalid(bvalid), .bready(bready), .bresp(bresp), + .beats_written(beats_written), .bursts_issued(bursts_issued), + .bresp_err_count(bresp_err_count), .fifo_overflow_count(col_ovf), .idle(idle), .frame_drained(frame_drained) + ); + + // pixel stream: 40 px/line (not a beat multiple -> partials + periodic line-change flushes), 1 KiB line stride. + function automatic [31:0] pix_addr(input int i); + pix_addr = ((i/40) * 32'h400) + ((i%40) * 4); + endfunction + function automatic [31:0] pix_data(input int i); + pix_data = 32'hC0DE0000 | (i & 32'h0000FFFF); + endfunction + + // ---- capturing AXI slave (byte memory) — smem is written ONLY here ---- + logic [7:0] smem [0:MEM_WORDS-1]; + logic [31:0] aw_latch; + always @(posedge axi_clk) begin + if (awvalid && awready) aw_latch <= awaddr; + if (wvalid && wready) for (int i=0;i<32;i++) if (wstrb[i]) begin + int a; a = int'(aw_latch) + i; if (a>=0 && a px_ready drops -> producer stalls + repeat (200) @(posedge axi_clk); + force_stall = 1'b0; // release; drain resumes, producer un-stalls + end + join_none + + // wait for all pixels accepted (must complete despite the stall) + begin int guard; guard=0; + while (accepted < NPIX && guard <= 400000) begin @(posedge gs_clk); guard++; end + if (accepted < NPIX) begin $error("[elastic] producer HUNG (accepted=%0d/%0d)", accepted, NPIX); errors++; end + end + + // partial-beat + EOF marker WHILE momentarily stalling again (partial->marker while full) + force_stall = 1'b1; repeat (30) @(posedge axi_clk); + @(posedge gs_clk); flush = 1'b1; @(posedge gs_clk); flush = 1'b0; // end-of-scene flush requested during stall + repeat (40) @(posedge axi_clk); force_stall = 1'b0; + + // wait for the frame to drain (partial + marker accepted, all BRESPs in) + begin int guard; guard=0; + while (!frame_drained && guard <= 400000) begin @(posedge axi_clk); guard++; end + if (!frame_drained) begin $error("[elastic] frame_drained never asserted (drain HUNG)"); errors++; end + end + repeat (20) @(posedge axi_clk); + + // ---- checks ---- + if (accepted !== NPIX) begin $error("[elastic] accepted=%0d != NPIX=%0d", accepted, NPIX); errors++; end + if (col_ovf !== 0) begin $error("[elastic] col_ovf=%0d (overflow witness must be 0)", col_ovf); errors++; end + if (bresp_err_count !== 0) begin $error("[elastic] bresp_err=%0d", bresp_err_count); errors++; end + if (!px_ready_dropped) begin $error("[elastic] backpressure never engaged (px_ready stayed high under stall)"); errors++; end + + // exact contents: replay every accepted pixel and compare its 4 bytes against the slave memory. + for (int i=0;i=0 && a=0 && a=H_BP)&&(rawx=V_BP)&&(rawy=V_BP && rawy 2nd vsync + // score EXACTLY one frame, measured vsync -> next vsync (prefetch reads all 334 rows once) + begin scoring=1; + @(posedge video_clk); while(!vsync) @(posedge video_clk); // score exactly one full frame + scoring=0; + repeat(60) @(posedge emif_clk); // let the emif-domain frame edge latch fb_reads_last + // With rising-edge-only fs_edge_e in the scanout, the prefetcher reads EXACTLY 334 rows/frame. + if (fb_reads_last !== BEATS_PER_FRAME) begin + $error("[scan] read beats/frame=%0d exp %0d (%0dx%0d)", fb_reads_last, BEATS_PER_FRAME, H, ROW_BEATS); + errors++; + end + end + if (so_underflow!==0) begin $error("[scan] underflow asserted (row not ready before its pixel)"); errors++; end + if (so_rd_errs !==0) begin $error("[scan] rd_errs=%0d", so_rd_errs); errors++; end + if (checked < H_ACT*V_ACT) begin $error("[scan] only %0d pixels checked (exp >= %0d) — final rows missed?", checked, H_ACT*V_ACT); errors++; end + + $display("[tb_gs_lpddr_scanout_fb] checked=%0d px, read_beats/frame=%0d (exp %0d), underflow=%0b rd_errs=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, so_underflow, so_rd_errs, errors); + if (errors==0) $display("[tb_gs_lpddr_scanout_fb] PASS"); + else $display("[tb_gs_lpddr_scanout_fb] FAIL"); + $finish; + end + initial begin #60000000; $error("[tb_gs_lpddr_scanout_fb] TIMEOUT"); $finish; end +endmodule : tb_gs_lpddr_scanout_fb diff --git a/sim/tb/gif_gs/tb_gs_lpddr_scanout_lb_binomial.sv b/sim/tb/gif_gs/tb_gs_lpddr_scanout_lb_binomial.sv new file mode 100644 index 0000000..4b3756b --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_lpddr_scanout_lb_binomial.sv @@ -0,0 +1,156 @@ +// ============================================================================ +// tb_gs_lpddr_scanout_lb_binomial — Ch438 source-space 3x3 low-pass +// +// Locks the exact separable [1 2 1]/4 kernel, horizontal and vertical edge +// clamps, the 64-source -> 80-output nearest presentation map, and rotation of +// all three physical line buffers. The oracle uses division only in the TB. +// ============================================================================ +`timescale 1ns/1ps + +module tb_gs_lpddr_scanout_lb_binomial; + localparam int SRC_W=64, OUT_W=80, OUT_H=30; + localparam int STRIDE=320, ROW_BEATS=10, N_ROWS=32, VSTART=2; + + logic axi_clk=0, video_clk=0, rst_n=0, enable=0; + always #2 axi_clk=~axi_clk; + always #10 video_clk=~video_clk; + + logic frame_start=0, in_window=0; + logic [11:0] pixel_x=0, pixel_y=0; + wire [7:0] r,g,b; + wire line_valid, underflow; + wire [31:0] rd_errs; + wire [29:0] araddr; + wire [1:0] arburst; + wire [6:0] arid; + wire [7:0] arlen; + wire [2:0] arsize; + wire arvalid, rready; + logic arready=0, rvalid=0, rlast=0; + logic [255:0] rdata=0; + logic [1:0] rresp=0; + + logic [255:0] mem [0:N_ROWS*ROW_BEATS-1]; + initial begin + for (int beat=0; beat= SRC_W) ? SRC_W-1 : x); + endfunction + function automatic int clamp_y(input int y); + clamp_y = (y < VSTART) ? VSTART : ((y >= N_ROWS) ? N_ROWS-1 : y); + endfunction + function automatic int sample(input int channel, input int x, input int y); + int xx,yy; + begin + xx=clamp_x(x); yy=clamp_y(y); + case (channel) + 0: sample=xx; + 1: sample=yy; + default: sample=8'h80+xx+yy; + endcase + end + endfunction + function automatic int hbin(input int channel, input int x, input int y); + hbin=(sample(channel,x-1,y) + 2*sample(channel,x,y) + + sample(channel,x+1,y) + 2) / 4; + endfunction + function automatic int binomial(input int channel, input int x, input int y); + binomial=(hbin(channel,x,y-1) + 2*hbin(channel,x,y) + + hbin(channel,x,y+1) + 2) / 4; + endfunction + + int errors=0, checked=0; + logic check_en=0; + logic [11:0] x_d, y_d; + logic in_d; + always_ff @(posedge video_clk) begin + x_d<=pixel_x; y_d<=pixel_y; in_d<=in_window; + if (check_en && in_d) begin + int sx,sy,er,eg,eb; + sx=source_x(x_d); sy=source_y(y_d); + er=binomial(0,sx,sy); + eg=binomial(1,sx,sy); + eb=binomial(2,sx,sy); + checked++; + if (r!==8'(er) || g!==8'(eg) || b!==8'(eb)) begin + if (errors < 32) + $display("[binomial] out=(%0d,%0d) source=(%0d,%0d) got=%02x/%02x/%02x exp=%02x/%02x/%02x", + x_d,y_d,sx,sy,r,g,b,8'(er),8'(eg),8'(eb)); + errors++; + end + end + end + + initial begin + repeat(8) @(posedge axi_clk); rst_n=1; enable=1; + frame_start=1; repeat(3) @(posedge video_clk); frame_start=0; + repeat(300) @(posedge axi_clk); + repeat(3) @(posedge video_clk); + check_en=1; + for (int y=0; y 80-output instance locks the exact x0/xf coordinates +// across all eight beat slots, including the source-right clamp. +// Thirty output lines also lock the captured interlace reduction, source_y = +// 2 + floor(output_y*14/15), including its repeated first line. +// ============================================================================ +`timescale 1ns/1ps + +module tb_gs_lpddr_scanout_lb_hstretch; + localparam int SRC_W=64, OUT_W=80, OUT_H=30; + // Physical stride is 80 pixels, matching the output raster; the captured + // display source occupies the first 64 pixels of each row. + localparam int STRIDE=320, ROW_BEATS=10, N_ROWS=32, VSTART=2; + + logic axi_clk=0, video_clk=0, rst_n=0, enable=0; + always #2 axi_clk=~axi_clk; + always #10 video_clk=~video_clk; + + logic frame_start=0, in_window=0; + logic [11:0] pixel_x=0, pixel_y=0; + wire [7:0] r,g,b; + wire line_valid, underflow; + wire [31:0] rd_errs; + wire [29:0] araddr; + wire [1:0] arburst; + wire [6:0] arid; + wire [7:0] arlen; + wire [2:0] arsize; + wire arvalid, rready; + logic arready=0, rvalid=0, rlast=0; + logic [255:0] rdata=0; + logic [1:0] rresp=0; + + logic [255:0] mem [0:N_ROWS*ROW_BEATS-1]; + initial begin + for (int beat=0; beat assert ZERO drops/overflow, 0 BRESP errs. +// * preclear to the GEQUAL clear value. +// Every fragment must produce exactly one result with p_pass == golden; final stored Z (LPDDR + the one dirty line) == golden. +`timescale 1ns/1ps + +module tb_gs_lpddr_z_rmw; + localparam int FB_PXW = 64, FB_H = 32; + localparam int NPX = FB_PXW*FB_H; // 2048 + localparam int NBEATS = (NPX+15)/16; // 128 + localparam int BIW = $clog2(NBEATS); // beat-index width for mem addressing + localparam [31:0] ZBASE = 32'h0030_0000; + localparam [15:0] Z_CLEAR = 16'h0000; + localparam int NFRAG = 6000; + + logic clk=0; always #5 clk=~clk; + logic rst_n; + int errors; initial errors=0; + + // DUT I/O + logic enable, clear_start, clear_done, scene_flush, z_drained; + logic f_valid, f_ready; logic [11:0] f_x, f_y; logic [31:0] f_z; logic f_zmsk; logic [1:0] f_ztst; + logic p_valid, p_ready, p_pass; logic [11:0] p_x, p_y; logic [15:0] p_zq; + logic [31:0] araddr; logic [7:0] arlen; logic [2:0] arsize; logic [1:0] arburst; logic arvalid, arready; + logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic [31:0] awaddr; logic [7:0] awlen; logic [2:0] awsize; logic [1:0] awburst; logic awvalid, awready; + logic [255:0] wdata; logic [31:0] wstrb; logic wlast, wvalid, wready; + logic bvalid, bready; logic [1:0] bresp; + logic [31:0] beats_read, beats_written, bresp_err; logic idle; + + gs_lpddr_z_rmw #(.ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .Z_CLEAR(Z_CLEAR)) dut ( + .clk(clk), .rst_n(rst_n), .enable(enable), .clear_start(clear_start), .clear_done(clear_done), + .scene_flush(scene_flush), .z_drained(z_drained), + .f_valid(f_valid), .f_ready(f_ready), .f_x(f_x), .f_y(f_y), .f_z(f_z), .f_zmsk(f_zmsk), .f_ztst(f_ztst), + .p_valid(p_valid), .p_ready(p_ready), .p_pass(p_pass), .p_x(p_x), .p_y(p_y), .p_zq(p_zq), + .araddr(araddr), .arlen(arlen), .arsize(arsize), .arburst(arburst), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .awaddr(awaddr), .awlen(awlen), .awsize(awsize), .awburst(awburst), .awvalid(awvalid), .awready(awready), + .wdata(wdata), .wstrb(wstrb), .wlast(wlast), .wvalid(wvalid), .wready(wready), + .bvalid(bvalid), .bready(bready), .bresp(bresp), + .beats_read(beats_read), .beats_written(beats_written), .bresp_err(bresp_err), .idle(idle) + ); + + // ---------------- behavioral LPDDR (256-bit) with RANDOM backpressure ---------------- + logic [255:0] mem [0:NBEATS-1]; + logic [15:0] lfsr=16'hACE1; always_ff @(posedge clk) lfsr<={lfsr[14:0], lfsr[15]^lfsr[13]^lfsr[12]^lfsr[10]}; + // read channel + logic [31:0] rd_addr_l; logic rd_pending; logic [3:0] rd_dly; + // write channel + logic [31:0] wr_addr_l; logic [255:0] wr_data_l; logic aw_seen, w_seen; logic [3:0] b_dly; logic b_pending; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; rd_pending<=0; rd_dly<=0; + awready<=0; wready<=0; bvalid<=0; bresp<=0; aw_seen<=0; w_seen<=0; b_pending<=0; b_dly<=0; + end else begin + // AR: random-accept when no read in flight + arready <= (!rd_pending && !rvalid) ? lfsr[0] : 1'b0; + if (arvalid && arready) begin rd_addr_l<=araddr; rd_pending<=1; rd_dly<={1'b0,lfsr[3:1]}; arready<=0; end + // R: after random delay, present data + if (rd_pending && !rvalid) begin + if (rd_dly==0) begin rdata<=mem[rd_addr_l[5 +: BIW]]; rresp<=2'b00; rvalid<=1; rlast<=1; rd_pending<=0; end + else rd_dly<=rd_dly-1'b1; + end + if (rvalid && rready) begin rvalid<=0; rlast<=0; end + // AW / W: random-accept + awready <= (!aw_seen) ? lfsr[4] : 1'b0; + wready <= (!w_seen) ? lfsr[5] : 1'b0; + if (awvalid && awready) begin wr_addr_l<=awaddr; aw_seen<=1; awready<=0; end + if (wvalid && wready ) begin wr_data_l<=wdata; w_seen<=1; wready<=0; end + // commit write when both seen, then random B delay + if (aw_seen && w_seen && !b_pending && !bvalid) begin + mem[wr_addr_l[5 +: BIW]]<=wr_data_l; b_pending<=1; b_dly<={1'b0,lfsr[8:6]}; + end + if (b_pending && !bvalid) begin + if (b_dly==0) begin bvalid<=1; bresp<=2'b00; b_pending<=0; aw_seen<=0; w_seen<=0; end + else b_dly<=b_dly-1'b1; + end + if (bvalid && bready) bvalid<=0; + end + end + + // ---------------- golden model + fragment vectors ---------------- + logic [11:0] vx [0:NFRAG-1]; logic [11:0] vy [0:NFRAG-1]; logic [31:0] vz [0:NFRAG-1]; logic vzmsk [0:NFRAG-1]; logic [1:0] vztst [0:NFRAG-1]; + logic exp_pass [0:NFRAG-1]; + logic [15:0] gold [0:NPX-1]; + function automatic logic [15:0] clamp16(input logic [31:0] z); clamp16 = (|z[31:16]) ? 16'hFFFF : z[15:0]; endfunction + function automatic logic zpass(input logic [1:0] op, input logic [15:0] s, input logic [15:0] d); + case (op) 2'd0:zpass=0; 2'd1:zpass=1; 2'd2:zpass=(s>=d); default:zpass=(s>d); endcase + endfunction + + // disjoint-range monitor: every Z AXI address must land inside the Z buffer region [ZBASE, ZBASE+NBEATS*32) + always_ff @(posedge clk) if (rst_n) begin + if (arvalid && (araddr < ZBASE || araddr >= ZBASE + NBEATS*32)) begin $error("[zrmw] AR addr %h out of Z range", araddr); errors++; end + if (awvalid && (awaddr < ZBASE || awaddr >= ZBASE + NBEATS*32)) begin $error("[zrmw] AW addr %h out of Z range", awaddr); errors++; end + end + + int fi_drv, fi_chk; + initial begin + errors=0; enable=0; clear_start=0; scene_flush=0; f_valid=0; f_x=0; f_y=0; f_z=0; f_zmsk=0; f_ztst=2'd2; p_ready=0; + for (int i=0;irefill persistence + revisits, + // with same-pixel/same-beat bursts and a fraction of zmsk (test-only) fragments. + begin int f, reg_w, reg_h, ox, oy; f=0; + for (int ep=0; ep<3 && f=FB_PXW) lx=FB_PXW-1; + if (ly<0) ly=0; if (ly>=FB_H) ly=FB_H-1; + // Z: mix full-range (clamps) and sub-0xFFFF (discriminating) + occasional same value + case ({$random}%4) + 0: zz = {$random} & 32'h00FF_FFFF; // 24-bit (often clamps) + 1: zz = {$random} & 32'h0000_FFFF; // <=0xFFFF (discriminating) + 2: zz = {$random} & 32'h0000_3FFF; // small + default: zz = 32'h0001_0000 + ({$random}&32'hFFFF); // just over 0xFFFF -> clamps to 0xFFFF + endcase + zm = (({$random}%8)==0); // ~12% test-only (zmsk=1) + vx[f]=lx[11:0]; vy[f]=ly[11:0]; vz[f]=zz; vzmsk[f]=zm; + // Preserve the old GEQUAL-heavy stress while explicitly + // covering NEVER, ALWAYS and strict GREATER. + vztst[f]=(n[3:0]==4'd0)?2'd1:(n[3:0]==4'd1)?2'd0:(n[3:0]==4'd2)?2'd3:2'd2; + begin int idx; logic [15:0] sz, dz; logic pass; + idx=ly*FB_PXW+lx; sz=clamp16(zz); dz=gold[idx]; pass=zpass(vztst[f],sz,dz); + exp_pass[f]=pass; if (pass && !zm) gold[idx]=sz; + end + f=f+1; + end + end + // pad remainder (if any) with same-pixel bursts to stress forwarding + while (f=dz); exp_pass[f]=pass; if(pass) gold[idx]=sz; + f=f+1; + end + end + + rst_n=0; repeat(6) @(posedge clk); rst_n=1; repeat(4) @(posedge clk); + enable=1; + + // ---- preclear ---- + @(negedge clk) clear_start=1; @(negedge clk) clear_start=0; + begin int g=0; while(!clear_done && g<200000) begin @(posedge clk); g++; end end + if (!clear_done) begin $error("[zrmw] preclear never completed"); errors++; end + for (int b=0;b>4; ln=idx[3:0]; stored=mem[b][ln*16 +: 16]; // no cache peek: after scene flush, LPDDR is authoritative + if (stored!==gold[idx]) begin + if (errors<16) $error("[zrmw] durable Z px %0d (beat %0d lane %0d) = %04x exp %04x", idx,b,ln,stored,gold[idx]); errors++; end + end + $display("[zrmw] scene_flush drained: z_drained=%0b cache_valid=%0b(persist) cache_dirty=%0b; LPDDR==golden", + z_drained, dut.cache_valid, dut.cache_dirty); + + if (bresp_err!==0) begin $error("[zrmw] bresp_err=%0d", bresp_err); errors++; end + if (fi_drv!==NFRAG || fi_chk!==NFRAG) begin $error("[zrmw] DROP: driven=%0d checked=%0d exp %0d", fi_drv, fi_chk, NFRAG); errors++; end + $display("[zrmw] frags driven=%0d checked=%0d (zero drops) beats_read=%0d beats_written=%0d bresp_err=%0d errors=%0d", + fi_drv, fi_chk, beats_read, beats_written, bresp_err, errors); + if (errors==0) $display("[tb_gs_lpddr_z_rmw] PASS"); else $display("[tb_gs_lpddr_z_rmw] FAIL"); + $finish; + end + initial begin #20000000; $error("[tb_gs_lpddr_z_rmw] TIMEOUT"); $finish; end +endmodule : tb_gs_lpddr_z_rmw diff --git a/sim/tb/gif_gs/tb_gs_lpddr_zc_emit.sv b/sim/tb/gif_gs/tb_gs_lpddr_zc_emit.sv new file mode 100644 index 0000000..05b70b2 --- /dev/null +++ b/sim/tb/gif_gs/tb_gs_lpddr_zc_emit.sv @@ -0,0 +1,217 @@ +// retroDE_ps2 — tb_gs_lpddr_zc_emit (Ch357 — Z-then-color integration unit TB) +// +// Two-clock (gs_clk != axi_clk) test of the integration wrapper against a software golden model. Covers Codex gate-7: +// * request-FIFO backpressure (g_ready) across the CDC. +// * REJECTED-COLOR SUPPRESSION: a fragment failing Z writes NO color. +// * ordered SCENE-MARKER drain: after each marker, combined frame_drained rises (color + Z BRESPs complete). +// * Z cache PERSISTENCE across epochs: Z precleared ONCE at frame start; 3 epochs accumulate. +// * DISJOINT ranges: Z AXI in [ZBASE..), color AXI in [COLBASE..); the two never cross. +// * col_ovf==0, bresp_err==0; final color FB == golden (Z-winning color per pixel); final Z == golden. +`timescale 1ns/1ps + +module tb_gs_lpddr_zc_emit; + localparam int FB_PXW=32, FB_H=16; + localparam int NPX=FB_PXW*FB_H; // 512 + localparam int ZBEATS=(NPX+15)/16; // 32 + localparam int CBEATS=(NPX+7)/8; // 64 (8 PSMCT32 / beat) + localparam [31:0] COLBASE=32'h0000_0000, ZBASE=32'h0014_0000; + localparam int NFRAG=1500, NEP=3; + localparam int ZBW=$clog2(ZBEATS), CBW=$clog2(CBEATS); + + logic gs_clk=0; always #5 gs_clk=~gs_clk; + logic axi_clk=0; always #7 axi_clk=~axi_clk; + logic gs_rst_n, axi_rst_n; int errors; initial errors=0; + + logic enable, clear_start, clear_done, frame_drained; + logic g_valid, g_ready; logic [11:0] g_x, g_y; logic [15:0] g_zq; logic g_zmsk, g_ztest, g_scene; logic [1:0] g_ztst; logic [31:0] g_color; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic idle; + + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .REQ_DEPTH(16), .COL_DEPTH(64)) dut ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(g_zmsk), + .g_ztest(g_ztest), .g_ztst(g_ztst), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(idle) + ); + + logic [15:0] lf=16'hBEEF; always_ff @(posedge axi_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ---- Z LPDDR slave (256b, random backpressure) ---- + logic [255:0] zmem [0:ZBEATS-1]; + logic [31:0] zra; logic zrp; logic [3:0] zrd; logic [31:0] zwa; logic [255:0] zwd; logic zaw,zw; logic [3:0] zbd; logic zbp; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin z_arready<=0;z_rvalid<=0;z_rlast<=0;z_rresp<=0;z_rdata<=0;zrp<=0;zrd<=0; + z_awready<=0;z_wready<=0;z_bvalid<=0;z_bresp<=0;zaw<=0;zw<=0;zbp<=0;zbd<=0; end + else begin + z_arready<=(!zrp&&!z_rvalid)?lf[0]:1'b0; + if(z_arvalid&&z_arready) begin zra<=z_araddr;zrp<=1;zrd<={1'b0,lf[3:1]};z_arready<=0; end + if(zrp&&!z_rvalid) begin if(zrd==0) begin z_rdata<=zmem[zra[5+:ZBW]];z_rresp<=0;z_rvalid<=1;z_rlast<=1;zrp<=0; end else zrd<=zrd-1; end + if(z_rvalid&&z_rready) begin z_rvalid<=0;z_rlast<=0; end + z_awready<=(!zaw)?lf[4]:1'b0; z_wready<=(!zw)?lf[5]:1'b0; + if(z_awvalid&&z_awready) begin zwa<=z_awaddr;zaw<=1;z_awready<=0; end + if(z_wvalid&&z_wready) begin zwd<=z_wdata;zw<=1;z_wready<=0; end + if(zaw&&zw&&!zbp&&!z_bvalid) begin zmem[zwa[5+:ZBW]]<=zwd;zbp<=1;zbd<={1'b0,lf[8:6]}; end + if(zbp&&!z_bvalid) begin if(zbd==0) begin z_bvalid<=1;z_bresp<=0;zbp<=0;zaw<=0;zw<=0; end else zbd<=zbd-1; end + if(z_bvalid&&z_bready) z_bvalid<=0; + end + end + + // ---- Color LPDDR slave (256b, per-byte wstrb, random backpressure) ---- + logic [255:0] cmem [0:CBEATS-1]; + logic [31:0] cwa; logic [255:0] cwd; logic [31:0] cws; logic caw,cw; logic [3:0] cbd; logic cbp; + logic col_force_stall = 1'b0; // Ch357 (Codex) — PROLONGED px_ready=0: hard-stall the color AXI to fully back up + // u_c's FIFO -> col_px_ready drops -> the new zc_emit output register must HOLD. + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin c_awready<=0;c_wready<=0;c_bvalid<=0;c_bresp<=0;caw<=0;cw<=0;cbp<=0;cbd<=0; end + else begin + c_awready<=(!caw && !col_force_stall)?lf[9]:1'b0; c_wready<=(!cw && !col_force_stall)?lf[11]:1'b0; + if(c_awvalid&&c_awready) begin cwa<=c_awaddr;caw<=1;c_awready<=0; end + if(c_wvalid&&c_wready) begin cwd<=c_wdata;cws<=c_wstrb;cw<=1;c_wready<=0; end + if(caw&&cw&&!cbp&&!c_bvalid) begin + for(int b=0;b<32;b++) if(cws[b]) cmem[cwa[5+:CBW]][b*8+:8]<=cwd[b*8+:8]; + cbp<=1;cbd<={1'b0,lf[14:12]}; + end + if(cbp&&!c_bvalid) begin if(cbd==0) begin c_bvalid<=1;c_bresp<=0;cbp<=0;caw<=0;cw<=0; end else cbd<=cbd-1; end + if(c_bvalid&&c_bready) c_bvalid<=0; + end + end + + // ---- disjoint-range monitors ---- + always_ff @(posedge axi_clk) if(axi_rst_n) begin + if(z_arvalid && (z_araddr=ZBASE+ZBEATS*32)) begin $error("Z AR %h out of range",z_araddr);errors++; end + if(z_awvalid && (z_awaddr=ZBASE+ZBEATS*32)) begin $error("Z AW %h out of range",z_awaddr);errors++; end + if(c_awvalid && (c_awaddr=COLBASE+CBEATS*32)) begin $error("C AW %h out of range",c_awaddr);errors++; end + end + + // ---- golden ---- + logic [15:0] zg [0:NPX-1]; logic [31:0] cg [0:NPX-1]; logic cw_seen [0:NPX-1]; + logic [11:0] vx[0:NFRAG-1],vy[0:NFRAG-1]; logic [15:0] vz[0:NFRAG-1]; logic vzm[0:NFRAG-1]; logic [31:0] vc[0:NFRAG-1]; + int fdrv; + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // simple producer: drive one item, wait accept + task automatic push(input logic sc, input logic [11:0] x, input logic [11:0] y, input logic [15:0] zq, + input logic zm, input logic [1:0] zt, input logic [31:0] col); + @(negedge gs_clk); + g_valid<=1; g_scene<=sc; g_x<=x; g_y<=y; g_zq<=zq; g_zmsk<=zm; g_ztest<=1'b1; g_ztst<=zt; g_color<=col; + @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); + @(negedge gs_clk); g_valid<=0; + // random gap + if(lf[7]) begin repeat(1+(lf[2:0])) @(posedge gs_clk); end + endtask + + initial begin + errors=0; enable=0; clear_start=0; g_valid=0; g_scene=0; g_x=0; g_y=0; g_zq=0; g_zmsk=0; g_ztest=1; g_ztst=2'd2; g_color=0; + for(int i=0;i=FB_PXW)lx=FB_PXW-1; if(ly<0)ly=0; if(ly>=FB_H)ly=FB_H-1; + case({$random}%3) 0: zz={$random}&32'h0000_FFFF; 1: zz={$random}&32'h0000_3FFF; default: zz={$random}&32'h00FF_FFFF; endcase + zm=(({$random}%10)==0); col={$random}|32'h0000_0001; // nonzero color to distinguish "written" + vx[f]=lx[11:0];vy[f]=ly[11:0];vz[f]=cl16(zz); vzm[f]=zm; vc[f]=col; + begin int idx; logic [15:0] sz; logic pass; idx=ly*FB_PXW+lx; sz=cl16(zz); pass=(sz>=zg[idx]); + if(pass) begin cg[idx]=col; cw_seen[idx]=1'b1; if(!zm) zg[idx]=sz; end + end + f=f+1; + end + end + end + + gs_rst_n=0; axi_rst_n=0; repeat(6) @(posedge axi_clk); gs_rst_n=1; axi_rst_n=1; repeat(4) @(posedge axi_clk); + enable=1; + // preclear Z once at frame start + @(negedge axi_clk) clear_start=1; @(negedge axi_clk) clear_start=0; + begin int g=0; while(!clear_done && g<200000) begin @(posedge axi_clk); g++; end end + if(!clear_done) begin $error("[zc] preclear timeout");errors++; end + + // drive 3 epochs, marker + wait frame_drained after each + fdrv=0; + // Ch357 (Codex) — PROLONGED px_ready=0 coverage: once a handful of fragments are in flight, hard-stall the color + // AXI for a long window so u_c's FIFO fully backs up and col_px_ready stays 0; the zc_emit output register must + // HOLD its pixel (no drop). Release and let it drain. The exact-framebuffer + col_ovf==0 checks below prove it. + fork + begin + while (fdrv < 12) @(posedge axi_clk); + col_force_stall = 1'b1; repeat(500) @(posedge axi_clk); col_force_stall = 1'b0; + end + join_none + for(int ep=0;epaxi FIFO instead + // of being collapsed to GEQUAL. ZMSK preserves the existing depth; + // the unmistakable color must nevertheless commit. + begin + int idx, g; + logic [15:0] z_before; + idx = 7*FB_PXW + 11; + z_before = zg[idx]; + push(1'b0, 12'd11, 12'd7, 16'h0000, 1'b1, 2'd1, 32'h50A5_3CC3); + cg[idx] = 32'h50A5_3CC3; cw_seen[idx] = 1'b1; + g=0; while(frame_drained && g<2000) begin @(posedge axi_clk); g++; end + push(1'b1, 12'd0,12'd0,16'd0,1'b0,2'd2,32'd0); + g=0; while(!frame_drained && g<400000) begin @(posedge axi_clk); g++; end + if(!frame_drained) begin $error("[zc] ZTST=ALWAYS directed epoch never drained"); errors++; end + if(zg[idx] !== z_before) begin $error("[zc] directed ZMSK golden changed unexpectedly"); errors++; end + $display("[zc] directed ZTST=ALWAYS accepted low-Z color at (%0d,%0d), preserved Z=%04x",11,7,z_before); + end + + // ---- final checks: Z LPDDR == golden ; color LPDDR == golden (written pixels) ---- + repeat(40) @(posedge axi_clk); + for(int idx=0;idx>4][(idx[3:0])*16+:16]; + if(zs!==zg[idx]) begin if(errors<12)$error("[zc] Z px%0d=%04x exp %04x",idx,zs,zg[idx]);errors++; end + end + for(int idx=0;idx>3][(idx[2:0])*32+:32]; + if(cs!==cg[idx]) begin if(errors<12)$error("[zc] COLOR px%0d=%08x exp %08x",idx,cs,cg[idx]);errors++; end + end + // pixels never won by any fragment must have NO color written (still 0) — rejected-color suppression sanity + for(int idx=0;idx>3][(idx[2:0])*32+:32]; + if(cs!==32'd0) begin if(errors<12)$error("[zc] px%0d never-won but color=%08x (suppression fail)",idx,cs);errors++; end + end + + if(col_ovf!==0) begin $error("[zc] col_ovf=%0d",col_ovf);errors++; end + if(bresp_err!==0) begin $error("[zc] bresp_err=%0d",bresp_err);errors++; end + if(fdrv!==NFRAG) begin $error("[zc] fdrv=%0d exp %0d",fdrv,NFRAG);errors++; end + $display("[zc] frags=%0d z_read=%0d z_wr=%0d c_wr=%0d col_ovf=%0d bresp_err=%0d errors=%0d", + fdrv,z_beats_read,z_beats_written,c_beats_written,col_ovf,bresp_err,errors); + if(errors==0) $display("[tb_gs_lpddr_zc_emit] PASS"); else $display("[tb_gs_lpddr_zc_emit] FAIL"); + $finish; + end + initial begin #60000000; $error("[tb_gs_lpddr_zc_emit] TIMEOUT"); $finish; end +endmodule : tb_gs_lpddr_zc_emit diff --git a/sim/tb/gif_gs/tb_gs_prim_list_feeder.sv b/sim/tb/gif_gs/tb_gs_prim_list_feeder.sv index 61c68e8..c33ca8c 100644 --- a/sim/tb/gif_gs/tb_gs_prim_list_feeder.sv +++ b/sim/tb/gif_gs/tb_gs_prim_list_feeder.sv @@ -20,14 +20,16 @@ module tb_gs_prim_list_feeder; logic [63:0] gif_reg_data; localparam logic [7:0] REG_PRIM=8'h00, REG_RGBAQ=8'h01, REG_UV=8'h03, REG_XYZ2=8'h05, - REG_TEX0=8'h06, REG_ALPHA=8'h42, REG_TEST=8'h47, REG_FRAME=8'h4C, REG_ZBUF=8'h4E; + REG_TEX0=8'h06, REG_ALPHA=8'h42, REG_TEST=8'h47, REG_CLAMP=8'h48, + REG_FRAME=8'h4C, REG_ZBUF=8'h4E; // ---- staging RAM (synchronous read) ---- logic [63:0] stg [0:127]; always_ff @(posedge clk) stg_rd_data <= stg[stg_rd_addr[6:0]]; localparam logic [63:0] D_FRAME=64'h00F0, D_ALPHA=64'h00A0, D_TEST=64'h0070, - D_ZBUF=64'h00B0, D_TEX0=64'h0060, D_PRIM=64'h0003; + D_ZBUF=64'h00B0, D_TEX0=64'h0060, D_CLAMP=64'h0000_07fc_007f_c00a, + D_PRIM=64'h0003; function automatic logic [63:0] vtx_sentinel(input int ti, input int v, input int w); vtx_sentinel = 64'h1000_0000 * (ti+1) + 64'h100 * v + w; endfunction @@ -115,6 +117,73 @@ module tb_gs_prim_list_feeder; wait (done==1'b1); repeat(2) @(posedge clk); if (cap_n != EMITS_TOTAL) begin $error("[feeder] after release emitted %0d (expected %0d)", cap_n, EMITS_TOTAL); errors++; end + // ===== PROOF 3 — Ch402 optional CLAMP header and word-8 vertex base ===== + cap_n=0; exp_n=0; + stg[0]=NTRI|(64'h1<<34); stg[6]=D_CLAMP; stg[7]=D_PRIM; + for (int t=0;t texel(CLUT) alpha + localparam logic [63:0] TEX0_T4 = 64'd24 | (64'd1<<14) | (64'(PSMT4)<<20) + | (64'd2<<26) | (64'd2<<30) | (64'd1<<34); localparam logic [63:0] TEX0_C32 = 64'd16 | (64'd1<<14) | (64'd0<<20) | (64'd2<<26) | (64'd2<<30) | (64'd1<<34); localparam logic [31:0] T8_BASE = 32'd8 * 32'd256; // 2048 localparam logic [31:0] C32_BASE = 32'd16 * 32'd256; // 4096 + localparam logic [31:0] T4_BASE = 32'd24 * 32'd256; // 6144 localparam int ROW_TEXELS = 64; // TBW*64 // distinct index per pixel so a byte-lane error is caught; cycles all 4 palette entries incl. idx0. @@ -250,15 +259,16 @@ module tb_gs_psmt8_alpha_sprite; endfunction // expected sprite pixel from an arbitrary ABGR texel (CLUT entry or PSMCT32 word). function automatic logic [31:0] expected_from_texel(input logic [31:0] t); - logic [7:0] cs_r, cs_g, cs_b; + logic [7:0] cs_r, cs_g, cs_b, cs_a; begin cs_r = sw_mod8(t[7:0], TINT_RGBAQ[7:0]); cs_g = sw_mod8(t[15:8], TINT_RGBAQ[15:8]); cs_b = sw_mod8(t[23:16], TINT_RGBAQ[23:16]); - expected_from_texel = {t[31:24], - sw_blend(cs_b, BG_PIXEL[23:16], t[31:24]), - sw_blend(cs_g, BG_PIXEL[15:8], t[31:24]), - sw_blend(cs_r, BG_PIXEL[7:0], t[31:24])}; + cs_a = sw_mod8(t[31:24], TINT_RGBAQ[31:24]); + expected_from_texel = {cs_a, + sw_blend(cs_b, BG_PIXEL[23:16], cs_a), + sw_blend(cs_g, BG_PIXEL[15:8], cs_a), + sw_blend(cs_r, BG_PIXEL[7:0], cs_a)}; end endfunction @@ -283,11 +293,12 @@ module tb_gs_psmt8_alpha_sprite; task automatic force_byte(input logic [31:0] a, input logic [7:0] d); u_vram.mem[a] = d; endtask // ---- a textured-alpha SPRITE at FB (ox,oy), bound to tex0 ---- - task automatic draw_sprite(input logic [63:0] tex0, input int ox, input int oy); + task automatic draw_sprite(input logic [63:0] tex0, input logic [63:0] alpha, + input int ox, input int oy); drive_reg(R_PRIM, PRIM_SPR_TEX_ABE); drive_reg(R_FRAME_1, FRAME_1_FB0); drive_reg(R_TEX0_1, tex0); - drive_reg(R_ALPHA_1, ALPHA_SRCOVER); + drive_reg(R_ALPHA_1, alpha); drive_reg(R_RGBAQ, TINT_RGBAQ); drive_reg(R_UV, uv_data(0, 0)); drive_reg(R_XYZ2, xyz2_data(12'(ox), 12'(oy))); @@ -308,9 +319,30 @@ module tb_gs_psmt8_alpha_sprite; overlap_count <= overlap_count + 1; end + // The external LPDDR ROP must receive architectural ABE/ALPHA metadata even + // when the legacy internal-BRAM sprite blender does not implement that mode. + // x=24 is the authentic SH3 destination-darken control; the other sprites + // retain the established source-over metadata. + int lpddr_meta_count; initial lpddr_meta_count = 0; + always_ff @(posedge clk) + if (rst_n && raster_pixel_emit) begin + logic [16:0] exp_alpha; + exp_alpha = (raster_pixel_x_q >= 12'd24) + ? {1'b1, 2'd2, 2'd1, 2'd0, 2'd1, 8'd0} // ALPHA=0x46 + : {1'b1, 2'd0, 2'd1, 2'd0, 2'd1, 8'd0}; // ALPHA=0x44 + if (!raster_pixel_abe_q || raster_pixel_alpha_q !== exp_alpha) begin + $error("LPDDR alpha metadata x=%0d got abe=%0b alpha=%05x exp=%05x", + raster_pixel_x_q, raster_pixel_abe_q, raster_pixel_alpha_q, exp_alpha); + errors++; + end + lpddr_meta_count++; + end + int errors; initial errors = 0; integer x, y; logic [31:0] got, exp; localparam int C32_OX = 8; // PSMCT32 control sprite at FB x=8..11 + localparam int T4_OX = 16; // PSMT4 alpha sprite at FB x=16..19 + localparam int DARK_OX = 24; // PSMCT32 ALPHA=0x46 LPDDR-sideband control initial begin rst_n=1'b0; gif_reg_wr_en=1'b0; gif_reg_num=0; gif_reg_data=0; vram_read_addr=0; @@ -318,25 +350,39 @@ module tb_gs_psmt8_alpha_sprite; repeat (4) @(posedge clk); rst_n=1'b1; repeat (2) @(posedge clk); - // PSMT8 index texture (1 B/texel), PSMCT32 control texture, and the dest BG under BOTH sprites. + // PSMT8 (byte indices), PSMT4 (packed nibble indices), PSMCT32 + // control texture, and destination BG under all three sprites. for (y=0; y>1), + (idx_pattern(x+1,y)<<4) | idx_pattern(x,y)); // Program the CLUT (board: clut_loader_stub on a CLD!=0 TEX0; here TB-direct, same write port). for (int i=0; i<4; i++) clut_write(8'(i), palette(8'(i))); // ===== PSMT8 CLUT alpha sprite ===== - draw_sprite(TEX0_T8, 0, 0); + draw_sprite(TEX0_T8, ALPHA_SRCOVER, 0, 0); // ===== PSMCT32 control alpha sprite (param ON -> must stay green) ===== - draw_sprite(TEX0_C32, C32_OX, 0); + draw_sprite(TEX0_C32, ALPHA_SRCOVER, C32_OX, 0); + // ===== PSMT4 CLUT alpha sprite (Ch408) ===== + draw_sprite(TEX0_T4, ALPHA_SRCOVER, T4_OX, 0); + // The BRAM path deliberately does not blend this generic mode; this + // control exists to prove the external ROP sideband is nevertheless live. + draw_sprite(TEX0_C32, ALPHA_DARKEN, DARK_OX, 0); // PROOF 4 — read2 never overlapped. if (overlap_count != 0) begin $error("read2 OVERLAP cycles=%0d — invariant VIOLATED", overlap_count); errors++; end + if (lpddr_meta_count != 4*SPRITE_W*SPRITE_H) begin + $error("LPDDR metadata count got=%0d exp=%0d", lpddr_meta_count, 4*SPRITE_W*SPRITE_H); errors++; + end // PROOF 1/2/3 — PSMT8 pixels == source-over(CLUT[idx]*tint, BG), As from the CLUT entry. for (y=0; y affine u=x,v=y). Uses the affine DDA. // 2. PERSPECTIVE: PRIM=TRI|TME, FST=0 per-vertex ST + RGBAQ.Q (constant Q=1 -> ST==XY). Uses gs_persp_uv. -// Both sample a PSMT8 index texture through clut_stub. PASS: every covered interior pixel's emitted color -// == CLUT[index(x,y)] (DECAL), for BOTH triangles; PSMCT32 control triangle stays correct. +// Both sample a PSMT8 index texture through clut_stub. The perspective case +// enables the serialized palette-bilinear path and independently checks that +// every covered sample is emitted exactly once; the affine case retains the +// exact CLUT[index(x,y)] color check. `timescale 1ns/1ps @@ -31,7 +33,7 @@ module tb_gs_psmt8_clut_triangle; logic [63:0] pixel_color_q; logic [8:0] pixel_fbp_q; logic [5:0] pixel_fbw_q,pixel_psm_q; logic [31:0] pixel_fb_addr_q; logic raster_pixel_emit; logic [31:0] raster_pixel_emit_count; logic [11:0] raster_pixel_x_q,raster_pixel_y_q; logic [63:0] raster_pixel_color_q; logic [31:0] raster_pixel_fb_addr_q; logic [3:0] raster_pixel_be_q; - logic [31:0] raster_pixel_mask_q; logic [5:0] raster_pixel_psm_q; + logic [31:0] raster_pixel_mask_q; logic [5:0] raster_pixel_psm_q; logic [16:0] raster_pixel_alpha_q; logic raster_active,raster_overflow,raster_fifo_full,raster_degenerate; logic tex_rd_en; logic [31:0] tex_rd_addr,tex_rd_data; logic fb_rd_en; logic [31:0] fb_rd_addr,fb_rd_data; @@ -40,6 +42,7 @@ module tb_gs_psmt8_clut_triangle; logic [63:0] gs_ev_arg0,gs_ev_arg1,gs_ev_arg2,gs_ev_arg3; logic [31:0] gs_ev_flags; gs_stub #(.PERSPECTIVE_CORRECT(1'b1), + .BILINEAR_ENABLE(1'b1), .PALETTE_BILINEAR(1'b1), .TEX_RD_REGISTERED(1'b1), .FB_RD_REGISTERED(1'b1), .Z_RD_REGISTERED(1'b1)) u_gs ( .clk(clk), .rst_n(rst_n), .reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0), @@ -62,6 +65,7 @@ module tb_gs_psmt8_clut_triangle; .raster_pixel_x_q(raster_pixel_x_q), .raster_pixel_y_q(raster_pixel_y_q), .raster_pixel_color_q(raster_pixel_color_q), .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), .raster_pixel_be_q(raster_pixel_be_q), .raster_pixel_mask_q(raster_pixel_mask_q), .raster_pixel_psm_q(raster_pixel_psm_q), + .raster_pixel_alpha_q(raster_pixel_alpha_q), .raster_active(raster_active), .raster_overflow(raster_overflow), .raster_fifo_full(raster_fifo_full), .raster_degenerate(raster_degenerate), .tex_rd_en(tex_rd_en), .tex_rd_addr(tex_rd_addr), .tex_rd_data(tex_rd_data), .fb_rd_en(fb_rd_en), .fb_rd_addr(fb_rd_addr), .fb_rd_data(fb_rd_data), @@ -87,7 +91,7 @@ module tb_gs_psmt8_clut_triangle; always_ff @(posedge clk) rd2_data_reg <= rd2_data; assign tex_rd_data = rd2_data_reg; assign fb_rd_data = rd2_data_reg; - localparam logic [7:0] R_PRIM=8'h00,R_RGBAQ=8'h01,R_ST=8'h02,R_UV=8'h03,R_XYZ2=8'h05,R_TEX0_1=8'h06,R_FRAME_1=8'h4C; + localparam logic [7:0] R_PRIM=8'h00,R_RGBAQ=8'h01,R_ST=8'h02,R_UV=8'h03,R_XYZ2=8'h05,R_TEX0_1=8'h06,R_ALPHA_1=8'h42,R_FRAME_1=8'h4C; localparam logic [63:0] PRIM_TRI_TEX = 64'd3 | (64'd1<<4); // TRIANGLE + TME, FST=0 (ST) localparam logic [63:0] PRIM_TRI_TEX_FST = PRIM_TRI_TEX | (64'd1<<8); // + FST=1 (UV affine) localparam logic [63:0] FRAME_1_FB0 = 64'h0000_0000_0001_0000; // FBP=0 FBW=1 PSMCT32 @@ -96,6 +100,7 @@ module tb_gs_psmt8_clut_triangle; // TEX0: PSMT8, TBP0=8, TBW=1, TW=4 TH=4 (16x16), TFX=DECAL(1), TCC=1 localparam logic [63:0] TEX0_T8 = {14'd0/*pad*/, TBP0} | (64'd1<<14) | (64'(PSMT8)<<20) | (64'd4<<26) | (64'd4<<30) | (64'd1<<34) | (64'd1<<35); + localparam logic [63:0] TEX0_T8_MOD = TEX0_T8 & ~(64'd3<<35); function automatic logic [7:0] idx_pat(input int x, input int y); return 8'(((x*3) ^ (y*5) + x + y) & 8'hFF); endfunction function automatic logic [31:0] pal(input logic [7:0] i); // distinct ABGR per index @@ -146,6 +151,26 @@ module tb_gs_psmt8_clut_triangle; cap_px [raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_color_q[31:0]; end + // LPDDR ROP metadata is separate from the legacy internal-BRAM alpha path. + // Capture a direct-color-style ABE triangle control so the production + // perspective emit cannot silently degrade to an opaque copy. + bit alpha_cap_armed; int alpha_emit_count, alpha_meta_bad; + always_ff @(posedge clk) + if (rst_n && alpha_cap_armed && raster_pixel_emit) begin + alpha_emit_count <= alpha_emit_count + 1; + if (raster_pixel_alpha_q !== {1'b1,2'd2,2'd1,2'd0,2'd1,8'h80}) + alpha_meta_bad <= alpha_meta_bad + 1; + end + bit mod_cap_armed; int mod_emit_count, mod_rgb_bad, mod_alpha_bad; + always_ff @(posedge clk) + if (rst_n && mod_cap_armed && raster_pixel_emit) begin + mod_emit_count <= mod_emit_count + 1; + if (raster_pixel_color_q[23:0] !== 24'd0) + mod_rgb_bad <= mod_rgb_bad + 1; + if (raster_pixel_color_q[31:24] !== 8'h50) + mod_alpha_bad <= mod_alpha_bad + 1; + end + int errors, inside_ok; integer x,y; // draw one TME triangle (vertices in vx*/vy*); fst=1 -> UV, fst=0 -> ST. check covered px == CLUT[idx(x,y)]. @@ -184,7 +209,8 @@ module tb_gs_psmt8_clut_triangle; endtask initial begin - errors=0; inside_ok=0; cap_armed=1'b0; + errors=0; inside_ok=0; cap_armed=1'b0; alpha_cap_armed=1'b0; alpha_emit_count=0; alpha_meta_bad=0; + mod_cap_armed=1'b0; mod_emit_count=0; mod_rgb_bad=0; mod_alpha_bad=0; rst_n=1'b0; gif_reg_wr_en=1'b0; gif_reg_num=0; gif_reg_data=0; vram_read_addr=0; clut_we=1'b0; clut_widx=0; clut_wdata=0; repeat (4) @(posedge clk); rst_n=1'b1; repeat (2) @(posedge clk); @@ -200,30 +226,78 @@ module tb_gs_psmt8_clut_triangle; // path = covered pixels show MANY distinct CLUT colors (varied indices) + every color is a real CLUT // entry. v0:(2,1)u0v0 Q1 v1:(13,2)u15v0 Q2 v2:(5,7)u0v15 Q1 -> u=S/Q sweeps 0..15, v 0..15. begin - logic [31:0] seen[0:255]; int nseen; bit all_clut; + logic [31:0] seen[0:255]; int nseen; bit all_known; for (y=0;y<16;y++) for (x=0;x<16;x++) begin covered[y][x]=1'b0; cap_px[y][x]=0; end cap_armed=1'b1; drive_reg(R_PRIM, PRIM_TRI_TEX); drive_reg(R_FRAME_1, FRAME_1_FB0); drive_reg(R_TEX0_1, TEX0_T8); drive_reg(R_RGBAQ, rgbaqQ(0,0,0,1)); drive_reg(R_ST, st_data(0, 0)); drive_reg(R_XYZ2, xyz2_data(2,1)); drive_reg(R_RGBAQ, rgbaqQ(0,0,0,2)); drive_reg(R_ST, st_data(30,0)); drive_reg(R_XYZ2, xyz2_data(13,2)); drive_reg(R_RGBAQ, rgbaqQ(0,0,0,1)); drive_reg(R_ST, st_data(0, 15)); drive_reg(R_XYZ2, xyz2_data(5,7)); - drive_idle(); repeat (400) @(posedge clk); cap_armed=1'b0; @(posedge clk); - nseen=0; all_clut=1'b1; + drive_idle(); repeat (2000) @(posedge clk); cap_armed=1'b0; @(posedge clk); + nseen=0; all_known=1'b1; + begin + int expected_covered, actual_covered, missing_covered; + expected_covered=0; actual_covered=0; missing_covered=0; + for (y=0;y<16;y++) for (x=0;x<16;x++) begin + if (ref_inside(x,y)) begin + expected_covered++; + if (!covered[y][x]) missing_covered++; + end + if (covered[y][x]) actual_covered++; + end + $display("[tb_gs_psmt8_clut_triangle] PERSP coverage: actual=%0d expected=%0d missing=%0d", + actual_covered, expected_covered, missing_covered); + if (missing_covered != 0) begin + $error("PERSP: %0d/%0d covered samples missing (serialized sampler skipped pixels)", + missing_covered, expected_covered); + errors++; + end + end for (y=0;y<16;y++) for (x=0;x<16;x++) if (covered[y][x]) begin - bit f; bit found_idx; logic [31:0] pc; + bit f; f=1'b0; for (int k=0;kCLUT CHAIN on the persp path (every covered - // pixel is a real CLUT entry); RICH perspective interpolation is proven by the feeder integration. - $display("[tb_gs_psmt8_clut_triangle] PERSP(chain): distinct CLUT colors=%0d all_from_CLUT=%b (rich persp interp -> feeder integration TB)", nseen, all_clut); + // The enabled palette-bilinear sampler legitimately blends CLUT + // colors, so blended outputs need not equal a single palette entry. + $display("[tb_gs_psmt8_clut_triangle] PERSP(chain): distinct colors=%0d all_known=%b", + nseen, all_known); if (nseen < 2) begin $error("PERSP: %0d distinct colors — persp path produced no CLUT variety", nseen); errors++; end - if (!all_clut) begin $error("PERSP: a covered pixel is NOT a CLUT entry — PSMT8->CLUT broken on persp path"); errors++; end + if (!all_known) begin $error("PERSP: covered pixel contains unknown data"); errors++; end + end + + + // Authentic SH3 darken selectors: A=ZERO, B=Cd, C=As, D=Cd, + // FIX=0x80. The triangle is perspective because the board fixture + // lowers each source sprite to ST/Q triangles. + alpha_emit_count=0; alpha_meta_bad=0; alpha_cap_armed=1'b1; + drive_reg(R_ALPHA_1, 64'h0000_0080_0000_0046); + drive_reg(R_PRIM, PRIM_TRI_TEX | (64'd1<<6)); + drive_reg(R_FRAME_1, FRAME_1_FB0); drive_reg(R_TEX0_1, TEX0_T8); + drive_reg(R_RGBAQ, rgbaqQ(0,0,0,1)); drive_reg(R_ST, st_data(0,0)); drive_reg(R_XYZ2, xyz2_data(2,1)); + drive_reg(R_RGBAQ, rgbaqQ(0,0,0,1)); drive_reg(R_ST, st_data(15,0)); drive_reg(R_XYZ2, xyz2_data(13,2)); + drive_reg(R_RGBAQ, rgbaqQ(0,0,0,1)); drive_reg(R_ST, st_data(0,15)); drive_reg(R_XYZ2, xyz2_data(5,7)); + drive_idle(); repeat (500) @(posedge clk); alpha_cap_armed=1'b0; @(posedge clk); + $display("[tb_gs_psmt8_clut_triangle] TRI ABE metadata: emits=%0d bad=%0d", alpha_emit_count, alpha_meta_bad); + if (alpha_emit_count==0 || alpha_meta_bad!=0) begin + $error("TRI ABE metadata missing/corrupt: emits=%0d bad=%0d", alpha_emit_count, alpha_meta_bad); errors++; + end + + // TFX=MODULATE with a black vertex tint must emit black RGB, not the + // DECAL texel. This is the other half of the SH3 darken source packet. + // Give every sampled texel A=0x80 and use vertex A=0x50. GS + // MODULATE+TCC must therefore emit As=0x50. + for (int i=0;i<256;i++) clut_write(8'(i), (pal(8'(i)) & 32'h00ff_ffff) | 32'h8000_0000); + mod_emit_count=0; mod_rgb_bad=0; mod_alpha_bad=0; mod_cap_armed=1'b1; + drive_reg(R_PRIM, PRIM_TRI_TEX); drive_reg(R_FRAME_1, FRAME_1_FB0); drive_reg(R_TEX0_1, TEX0_T8_MOD); + drive_reg(R_RGBAQ, {f32(1),8'h50,24'd0}); drive_reg(R_ST, st_data(0,0)); drive_reg(R_XYZ2, xyz2_data(2,1)); + drive_reg(R_RGBAQ, {f32(1),8'h50,24'd0}); drive_reg(R_ST, st_data(15,0)); drive_reg(R_XYZ2, xyz2_data(13,2)); + drive_reg(R_RGBAQ, {f32(1),8'h50,24'd0}); drive_reg(R_ST, st_data(0,15)); drive_reg(R_XYZ2, xyz2_data(5,7)); + drive_idle(); repeat (500) @(posedge clk); mod_cap_armed=1'b0; @(posedge clk); + $display("[tb_gs_psmt8_clut_triangle] TRI MODULATE black/A: emits=%0d bad_rgb=%0d bad_alpha=%0d", mod_emit_count, mod_rgb_bad, mod_alpha_bad); + if (mod_emit_count==0 || mod_rgb_bad!=0 || mod_alpha_bad!=0) begin + $error("TRI MODULATE ignored/misaligned: emits=%0d bad_rgb=%0d bad_alpha=%0d", mod_emit_count, mod_rgb_bad, mod_alpha_bad); errors++; end if (raster_overflow) begin $error("raster_overflow"); errors++; end diff --git a/sim/tb/gif_gs/tb_gs_raster_pipeline.sv b/sim/tb/gif_gs/tb_gs_raster_pipeline.sv index b3dc7a6..3b3f09d 100644 --- a/sim/tb/gif_gs/tb_gs_raster_pipeline.sv +++ b/sim/tb/gif_gs/tb_gs_raster_pipeline.sv @@ -30,7 +30,10 @@ `timescale 1ns/1ps -module tb_gs_raster_pipeline; +module tb_gs_raster_pipeline #( + parameter bit USE_SUBPIXEL = 1'b0, + parameter int GRAD_CYCLES = 1 +); logic clk; logic rst_n; @@ -64,6 +67,7 @@ module tb_gs_raster_pipeline; logic [11:0] raster_pixel_x_q, raster_pixel_y_q; logic [63:0] raster_pixel_color_q; logic [31:0] raster_pixel_fb_addr_q; + logic [31:0] raster_pixel_z_q; logic raster_active; logic raster_overflow; logic raster_degenerate; @@ -73,7 +77,11 @@ module tb_gs_raster_pipeline; logic [63:0] ev_arg0, ev_arg1, ev_arg2, ev_arg3; logic [31:0] ev_flags; - gs_stub u_gs ( + gs_stub #( + .SUBPIXEL_XY(USE_SUBPIXEL), + .GRAD_SEQ_DIVIDER(1'b0), + .GRAD_DIV_CYCLES(GRAD_CYCLES) + ) u_gs ( .clk(clk), .rst_n(rst_n), .reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0), .gif_reg_wr_en(gif_reg_wr_en), @@ -110,6 +118,7 @@ module tb_gs_raster_pipeline; .raster_pixel_y_q(raster_pixel_y_q), .raster_pixel_color_q(raster_pixel_color_q), .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q), + .raster_pixel_z_q(raster_pixel_z_q), .raster_active(raster_active), .raster_overflow(raster_overflow), .raster_degenerate(raster_degenerate), @@ -130,17 +139,32 @@ module tb_gs_raster_pipeline; int emit_cycles [0:31]; int emit_count; int errors; + logic [7:0] sub_r [0:3][0:3]; + logic [31:0] sub_z [0:3][0:3]; + logic sub_seen [0:3][0:3]; initial begin v_close_cycle = -1; emit_count = 0; errors = 0; + for (int y = 0; y < 4; y++) begin + for (int x = 0; x < 4; x++) begin + sub_r[y][x] = 8'd0; + sub_z[y][x] = 32'd0; + sub_seen[y][x] = 1'b0; + end + end end always_ff @(posedge clk) begin if (rst_n && raster_pixel_emit && emit_count < 32) begin emit_cycles[emit_count] <= cycle_idx; emit_count <= emit_count + 1; + if (USE_SUBPIXEL && raster_pixel_x_q < 4 && raster_pixel_y_q < 4) begin + sub_r[raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_color_q[7:0]; + sub_z[raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_z_q; + sub_seen[raster_pixel_y_q][raster_pixel_x_q] <= 1'b1; + end end end @@ -167,6 +191,21 @@ module tb_gs_raster_pipeline; return {32'd0, y_int, 4'd0, x_int, 4'd0}; endfunction + function automatic logic [63:0] xyz2_sub(input logic [15:0] x_12_4, + input logic [15:0] y_12_4); + return {32'd0, y_12_4, x_12_4}; + endfunction + + function automatic logic [63:0] xyz2_sub_z(input logic [15:0] x_12_4, + input logic [15:0] y_12_4, + input logic [31:0] z); + return {z, y_12_4, x_12_4}; + endfunction + + function automatic logic [63:0] rgbaq_r(input logic [7:0] r); + return {32'd0, 8'hff, 8'd0, 8'd0, r}; + endfunction + localparam logic [7:0] R_PRIM = 8'h00; localparam logic [7:0] R_RGBAQ = 8'h01; localparam logic [7:0] R_XYZ2 = 8'h05; @@ -186,13 +225,27 @@ module tb_gs_raster_pipeline; rst_n = 1'b1; repeat (2) @(posedge clk); - drive_reg(R_PRIM, PRIM_SPRITE); + drive_reg(R_PRIM, USE_SUBPIXEL ? 64'd3 : PRIM_SPRITE); drive_reg(R_FRAME_1, FRAME_1_VAL); drive_reg(R_RGBAQ, RGBAQ_VAL); - // 4×4 sprite — bbox=[0..3]×[0..3] = 16 pixels. - drive_reg(R_XYZ2, xyz2_data(12'd0, 12'd0)); // v1 - drive_reg(R_XYZ2, xyz2_data(12'd3, 12'd3)); // v2 — close S1 + if (USE_SUBPIXEL) begin + // Right triangle at (0.75,0.75),(3.75,0.75),(0.75,3.75). + // Pixel-center 12.4 coverage is exactly (1,1),(2,1),(1,2). + // R and Z form exact planes: dR/dx=32, dR/dy=64, + // dZ/dx=100, dZ/dy=200. This checks fractional gradient + // setup and +0.5 pixel-center evaluation as well as coverage. + drive_reg(R_RGBAQ, rgbaq_r(8'd0)); + drive_reg(R_XYZ2, xyz2_sub_z(16'h000c,16'h000c,32'd1000)); + drive_reg(R_RGBAQ, rgbaq_r(8'd96)); + drive_reg(R_XYZ2, xyz2_sub_z(16'h003c,16'h000c,32'd1300)); + drive_reg(R_RGBAQ, rgbaq_r(8'd192)); + drive_reg(R_XYZ2, xyz2_sub_z(16'h000c,16'h003c,32'd1600)); + end else begin + // 4×4 sprite — bbox=[0..3]×[0..3] = 16 pixels. + drive_reg(R_XYZ2, xyz2_data(12'd0, 12'd0)); + drive_reg(R_XYZ2, xyz2_data(12'd3, 12'd3)); + end v_close_cycle = cycle_idx; // capture posedge index of v2 close // Stop driving (deassert gif_reg_wr_en) and let the @@ -200,7 +253,12 @@ module tb_gs_raster_pipeline; // high and re-commits the v2 vertex every cycle, kicking // off extra sprites and overflowing the FIFO. drive_idle(); - repeat (40) @(posedge clk); + // A TRI cannot pop until all 14 affine gradients are ready. The + // production combinational-divider FSM spends GRAD_CYCLES settle + // cycles plus select/commit overhead per step, so scale this gate + // with the configured latency instead of falsely timing out at the + // legacy fixed 40 cycles. + repeat (USE_SUBPIXEL ? (14 * (GRAD_CYCLES + 2) + 20) : 40) @(posedge clk); // ---- Assertions ---- $display("[tb_gs_raster_pipeline] v_close_cycle=%0d emit_count=%0d raster_pixel_emit_count=%0d raster_overflow=%b", @@ -209,12 +267,13 @@ module tb_gs_raster_pipeline; $display("[tb_gs_raster_pipeline] emit[%0d] @ cyc=%0d", i, emit_cycles[i]); end - if (emit_count != 16) begin - $error("emit_count=%0d (expected 16 for 4×4 sprite)", emit_count); + if (emit_count != (USE_SUBPIXEL ? 3 : 16)) begin + $error("emit_count=%0d (expected %0d)", emit_count, USE_SUBPIXEL ? 3 : 16); errors = errors + 1; end - if (raster_pixel_emit_count != 32'd16) begin - $error("raster_pixel_emit_count=%0d (expected 16)", raster_pixel_emit_count); + if (raster_pixel_emit_count != (USE_SUBPIXEL ? 32'd3 : 32'd16)) begin + $error("raster_pixel_emit_count=%0d (expected %0d)", raster_pixel_emit_count, + USE_SUBPIXEL ? 3 : 16); errors = errors + 1; end if (raster_overflow !== 1'b0) begin @@ -222,9 +281,27 @@ module tb_gs_raster_pipeline; errors = errors + 1; end + if (USE_SUBPIXEL) begin + if (!sub_seen[1][1] || sub_r[1][1] != 8'd72 || sub_z[1][1] != 32'd1225) begin + $error("subpixel attr (1,1): seen=%b R=%0d Z=%0d expected R=72 Z=1225", + sub_seen[1][1], sub_r[1][1], sub_z[1][1]); + errors = errors + 1; + end + if (!sub_seen[1][2] || sub_r[1][2] != 8'd104 || sub_z[1][2] != 32'd1325) begin + $error("subpixel attr (2,1): seen=%b R=%0d Z=%0d expected R=104 Z=1325", + sub_seen[1][2], sub_r[1][2], sub_z[1][2]); + errors = errors + 1; + end + if (!sub_seen[2][1] || sub_r[2][1] != 8'd136 || sub_z[2][1] != 32'd1425) begin + $error("subpixel attr (1,2): seen=%b R=%0d Z=%0d expected R=136 Z=1425", + sub_seen[2][1], sub_r[2][1], sub_z[2][1]); + errors = errors + 1; + end + end + // Throughput: every consecutive pair of emits must be on // adjacent cycles (delta == 1). 1 pixel/cycle. - for (int i = 1; i < emit_count; i++) begin + for (int i = 1; i < emit_count && !USE_SUBPIXEL; i++) begin int d; d = emit_cycles[i] - emit_cycles[i-1]; if (d != 1) begin @@ -234,15 +311,19 @@ module tb_gs_raster_pipeline; end end - // Latency: 5 posedges from v_close to first observed - // raster_pixel_emit (see header for breakdown). - if (emit_count > 0) begin + // Latency: 6 posedges from v_close to first observed raster_pixel_emit. Ch357 (Codex) pipelined the attr_ram + // WRITE (register the assembled word on push, commit to M20K the next cycle + attr_pending holds the slot until + // the write lands), so the assembled prim is poppable at push+2 instead of push+1 — +1 cycle vs the old + // v_close+5. Correctness is unchanged (emit_count/overflow identical); this pins the new pipeline depth. + // The TRI subpixel case waits for the shared gradient engine before + // pop; this latency assertion is specifically the legacy SPRITE pipe. + if (emit_count > 0 && !USE_SUBPIXEL) begin int expected_first; int actual_first; - expected_first = v_close_cycle + 5; + expected_first = v_close_cycle + 6; actual_first = emit_cycles[0]; if (actual_first != expected_first) begin - $error("first-emit latency: emit[0]@cyc=%0d (expected %0d = v_close+5)", + $error("first-emit latency: emit[0]@cyc=%0d (expected %0d = v_close+6, Ch357 attr-write pipeline)", actual_first, expected_first); errors = errors + 1; end diff --git a/sim/tb/gif_gs/tb_gs_textured_alpha_sprite.sv b/sim/tb/gif_gs/tb_gs_textured_alpha_sprite.sv index 395bc9a..5591fd0 100644 --- a/sim/tb/gif_gs/tb_gs_textured_alpha_sprite.sv +++ b/sim/tb/gif_gs/tb_gs_textured_alpha_sprite.sv @@ -230,8 +230,8 @@ module tb_gs_textured_alpha_sprite; localparam logic [31:0] TEX_BASE_BYTES = 32'd8 * 32'd256; // 2048 localparam int TEX_ROW_TEXELS = 64; // TBW*64 - // Per-vertex RGBAQ TINT: {A=0x10, B=0xFF, G=0x80, R=0x40}. The vertex A (0x10) MUST be ignored - // (source alpha comes from the TEXEL); R/G/B modulate the texel (R halves, G identity, B doubles). + // Per-vertex RGBAQ TINT: {A=0x10, B=0xFF, G=0x80, R=0x40}. + // TFX=MODULATE,TCC=1 modulates all four channels, including texture alpha. localparam logic [63:0] TINT_RGBAQ = 64'h0000_0000_10FF_8040; // Background (dest) PSMCT32 pixel pre-filled under the sprite: {A=FF,B=20,G=20,R=20}. localparam logic [31:0] BG_PIXEL = 32'hFF20_2020; @@ -262,16 +262,17 @@ module tb_gs_textured_alpha_sprite; end endfunction function automatic logic [31:0] expected(input int x, input int y); - logic [31:0] t; logic [7:0] cs_r, cs_g, cs_b; + logic [31:0] t; logic [7:0] cs_r, cs_g, cs_b, cs_a; begin t = texel(x, y); cs_r = sw_mod8(t[7:0], TINT_RGBAQ[7:0]); // *0x40 -> half cs_g = sw_mod8(t[15:8], TINT_RGBAQ[15:8]); // *0x80 -> identity cs_b = sw_mod8(t[23:16], TINT_RGBAQ[23:16]); // *0xFF -> ~double (clamps) - expected = {t[31:24], // stored A = source(texel) alpha - sw_blend(cs_b, BG_PIXEL[23:16], t[31:24]), - sw_blend(cs_g, BG_PIXEL[15:8], t[31:24]), - sw_blend(cs_r, BG_PIXEL[7:0], t[31:24])}; + cs_a = sw_mod8(t[31:24], TINT_RGBAQ[31:24]); + expected = {cs_a, + sw_blend(cs_b, BG_PIXEL[23:16], cs_a), + sw_blend(cs_g, BG_PIXEL[15:8], cs_a), + sw_blend(cs_r, BG_PIXEL[7:0], cs_a)}; end endfunction diff --git a/sim/tb/integration/tb_bridge_iop_pad_input.sv b/sim/tb/integration/tb_bridge_iop_pad_input.sv index 85a5861..0e7dcd3 100644 --- a/sim/tb/integration/tb_bridge_iop_pad_input.sv +++ b/sim/tb/integration/tb_bridge_iop_pad_input.sv @@ -169,6 +169,9 @@ module tb_bridge_iop_pad_input; logic feeder_ready_i = 1'b0; logic [15:0] feeder_records_i = 16'd0; logic [31:0] feeder_waits_i = 32'd0; + logic frame_drained_i = 1'b0; // Ch353 — new bridge diagnostic input; tied off (.* matches by name) + logic clear_done_i = 1'b0; // Ch357 — persistent-Z preclear ack; tied off (.* matches by name) + logic [31:0] frag_drops_i = 32'd0; // Ch357 — persistent-Z drop count; tied off (.* matches by name) ps2_hps_bridge u_bridge ( .clk (bclk), .reset_n (breset_n), diff --git a/sim/tb/integration/tb_ee_pad_buffer_branch.sv b/sim/tb/integration/tb_ee_pad_buffer_branch.sv index ea3fdee..34fc46f 100644 --- a/sim/tb/integration/tb_ee_pad_buffer_branch.sv +++ b/sim/tb/integration/tb_ee_pad_buffer_branch.sv @@ -249,6 +249,9 @@ module tb_ee_pad_buffer_branch; logic feeder_ready_i = 1'b0; logic [15:0] feeder_records_i = 16'd0; logic [31:0] feeder_waits_i = 32'd0; + logic frame_drained_i = 1'b0; // Ch353 — new bridge diagnostic input; tied off (.* matches by name) + logic clear_done_i = 1'b0; // Ch357 — persistent-Z preclear ack; tied off (.* matches by name) + logic [31:0] frag_drops_i = 32'd0; // Ch357 — persistent-Z drop count; tied off (.* matches by name) ps2_hps_bridge u_bridge ( .clk (bclk), .reset_n (breset_n), diff --git a/sim/tb/integration/tb_pad_state_via_sif_to_ee.sv b/sim/tb/integration/tb_pad_state_via_sif_to_ee.sv index 37ea556..36ce497 100644 --- a/sim/tb/integration/tb_pad_state_via_sif_to_ee.sv +++ b/sim/tb/integration/tb_pad_state_via_sif_to_ee.sv @@ -200,6 +200,9 @@ module tb_pad_state_via_sif_to_ee; logic feeder_ready_i = 1'b0; logic [15:0] feeder_records_i = 16'd0; logic [31:0] feeder_waits_i = 32'd0; + logic frame_drained_i = 1'b0; // Ch353 — new bridge diagnostic input; tied off (.* matches by name) + logic clear_done_i = 1'b0; // Ch357 — persistent-Z preclear ack; tied off (.* matches by name) + logic [31:0] frag_drops_i = 32'd0; // Ch357 — persistent-Z drop count; tied off (.* matches by name) ps2_hps_bridge u_bridge ( .clk (bclk), .reset_n (breset_n), diff --git a/sim/tb/platform/tb_clut_stage_cdc.sv b/sim/tb/platform/tb_clut_stage_cdc.sv new file mode 100644 index 0000000..30d0bf6 --- /dev/null +++ b/sim/tb/platform/tb_clut_stage_cdc.sv @@ -0,0 +1,119 @@ +// Focused proof for the runtime CLUT staging transaction. +`timescale 1ns/1ps + +module tb_clut_stage_cdc; + logic bclk = 1'b0, dclk = 1'b0; + always #5 bclk = ~bclk; + always #7 dclk = ~dclk; + + logic breset_n, dreset_n; + logic b_we; + logic [7:0] b_waddr; + logic [31:0] b_wdata; + logic b_commit_tgl; + logic [31:0] b_expected_crc; + logic clut_wr_en; + logic [7:0] clut_wr_idx; + logic [31:0] clut_wr_data; + logic busy, done_tgl; + logic [31:0] crc; + logic [31:0] observed [0:255]; + logic [31:0] expected [0:255]; + logic seen_done; + int writes, errors; + logic [31:0] expected_sum; + + clut_stage_cdc u_dut ( + .bclk, .breset_n, .b_we, .b_waddr, .b_wdata, .b_commit_tgl, + .b_expected_crc, .dclk, .dreset_n, .clut_wr_en, .clut_wr_idx, + .clut_wr_data, .busy, .done_tgl, .crc + ); + + always_ff @(posedge dclk) begin + if (clut_wr_en) begin + observed[clut_wr_idx] <= clut_wr_data; + writes <= writes + 1; + end + end + + task automatic check(input string label, input logic got, input logic want); + if (got !== want) begin + $error("[%s] got %b expected %b", label, got, want); + errors = errors + 1; + end + endtask + + task automatic stage_word(input logic [7:0] addr, input logic [31:0] data); + @(posedge bclk); + b_waddr <= addr; + b_wdata <= data; + b_we <= 1'b1; + @(posedge bclk); + b_we <= 1'b0; + endtask + + initial begin + breset_n = 1'b0; + dreset_n = 1'b0; + b_we = 1'b0; + b_waddr = 8'd0; + b_wdata = 32'd0; + b_commit_tgl = 1'b0; + b_expected_crc = 32'd0; + writes = 0; + errors = 0; + seen_done = 1'b0; + expected_sum = 32'd0; + for (int i = 0; i < 256; i++) begin + expected[i] = 32'h3C000000 ^ (i * 32'h01020409); + observed[i] = 32'd0; + expected_sum = expected_sum + expected[i]; + end + + repeat (3) @(posedge bclk); + breset_n = 1'b1; + repeat (3) @(posedge dclk); + dreset_n = 1'b1; + + for (int i = 0; i < 256; i++) + stage_word(i[7:0], expected[i]); + + b_expected_crc = expected_sum; + @(posedge bclk); + b_commit_tgl <= ~b_commit_tgl; + @(posedge bclk); + + // A second commit during the copy is intentionally ignored. + wait (busy); + @(posedge bclk); + b_commit_tgl <= ~b_commit_tgl; + @(posedge bclk); + + wait (done_tgl != seen_done); + seen_done = done_tgl; + repeat (4) @(posedge dclk); + check("busy_after_copy", busy, 1'b0); + if (writes != 256) begin + $error("[write_count] got %0d expected 256", writes); + errors = errors + 1; + end + if (crc !== expected_sum) begin + $error("[sum32] got 0x%08x expected 0x%08x", crc, expected_sum); + errors = errors + 1; + end + for (int i = 0; i < 256; i++) begin + if (observed[i] !== expected[i]) begin + $error("[entry %0d] got 0x%08x expected 0x%08x", i, observed[i], expected[i]); + errors = errors + 1; + end + end + repeat (12) @(posedge dclk); + if (writes != 256) begin + $error("[busy_commit_ignored] writes=%0d expected 256", writes); + errors = errors + 1; + end + if (errors != 0) $fatal(1, "tb_clut_stage_cdc FAILED: %0d errors", errors); + $display("tb_clut_stage_cdc PASS: 256 entries, sum32=0x%08x", crc); + $finish; + end +endmodule diff --git a/sim/tb/platform/tb_ps2_hps_bridge.sv b/sim/tb/platform/tb_ps2_hps_bridge.sv index 3de3a16..8c4f696 100644 --- a/sim/tb/platform/tb_ps2_hps_bridge.sv +++ b/sim/tb/platform/tb_ps2_hps_bridge.sv @@ -214,6 +214,44 @@ module tb_ps2_hps_bridge; logic feeder_ready_i = 1'b0; logic [15:0] feeder_records_i = 16'd0; logic [31:0] feeder_waits_i = 32'd0; + logic frame_drained_i = 1'b0; // Ch353 — new bridge diagnostic input; tied off (.* matches by name) + logic clear_done_i = 1'b0; // Ch357 — persistent-Z preclear ack (driven by the Ch357 status test) + logic [31:0] frag_drops_i = 32'd0; // Ch357 — persistent-Z drop count (driven by the Ch357 status test) + // Ch367 -- runtime CLUT staging ports (the data-bank CDC itself is + // covered in tb_clut_stage_cdc; this TB pins the bridge ABI/decode). + logic [7:0] clut_stage_waddr_o; + logic [31:0] clut_stage_wdata_o; + logic clut_stage_we_o, clut_commit_tgl_o; + logic [31:0] clut_expected_crc_o; + logic clut_busy_i = 1'b0, clut_done_tgl_i = 1'b0; + logic [31:0] clut_crc_i = 32'd0; + integer clut_stage_writes; + logic [7:0] clut_stage_last_addr; + logic [31:0] clut_stage_last_data; + + always_ff @(posedge clk or negedge reset_n) begin + if (!reset_n) begin + clut_stage_writes <= 0; + clut_stage_last_addr <= 8'd0; + clut_stage_last_data <= 32'd0; + end else if (clut_stage_we_o) begin + clut_stage_writes <= clut_stage_writes + 1; + clut_stage_last_addr <= clut_stage_waddr_o; + clut_stage_last_data <= clut_stage_wdata_o; + end + end + + // Ch355 — model the feeder staging RAM exactly as the on-board feeder does: the bridge emits a COMMIT strobe + // (feeder_stg_we_tgl_o toggles) with waddr/wdata for each staged word. Capture it here to verify that a + // register-write stream lands every word at the correct slot (the board bug put word0 at slot 1). + logic [63:0] model_stg [0:63]; logic mstg_tgl_q; + always_ff @(posedge clk or negedge reset_n) begin + if (!reset_n) mstg_tgl_q <= 1'b0; + else begin + mstg_tgl_q <= feeder_stg_we_tgl_o; + if (feeder_stg_we_tgl_o !== mstg_tgl_q) model_stg[feeder_stg_waddr_o] <= feeder_stg_wdata_o; + end + end ps2_hps_bridge u_dut ( .clk (clk), @@ -1183,6 +1221,128 @@ module tb_ps2_hps_bridge; axi_read32(38'h0E8, rd); check_eq("FEEDER_waits", rd, 32'd7); end + // -------------------------------------------------------- + // Ch355 — BRIDGE FEEDER-STAGING address path (closes the gap that hid the board bug: the multi-texture TB + // staged via $readmemh and never exercised the real 0x0D8 set-addr / 0x0DC-lo / 0x0E4-hi-commit protocol). + // Stage two complete lists EXCLUSIVELY through bridge register writes; verify every word (esp word 0), the + // final address, and the records readback; plus a negative test that reproduces the exact board bug. + // -------------------------------------------------------- + begin + logic [63:0] la [0:9]; logic [63:0] lb [0:5]; logic [31:0] rd; + la[0]=64'h0000000100000044; la[1]=64'hDEADBEEF00000001; la[2]=64'h1111111122222222; la[3]=64'h3333333344444444; + la[4]=64'h5555555566666666; la[5]=64'h7777777788888888; la[6]=64'h99999999000000AA; la[7]=64'hAAAAAAAABBBBBBBB; + la[8]=64'hCCCCCCCCDDDDDDDD; la[9]=64'hEEEEEEEEFFFFFFFF; + lb[0]=64'h0000000100000032; lb[1]=64'h0102030405060708; lb[2]=64'h1122334455667788; lb[3]=64'h99AABBCCDDEEFF00; + lb[4]=64'hFEDCBA9876543210; lb[5]=64'hCAFEBABE0BADF00D; + + // ---- SCENE A: reset addr to 0 (0x0D8=0), stream {lo(0x0DC), hi(0x0E4)} per word ---- + for (int i=0;i<64;i++) model_stg[i]=64'd0; + axi_write32(38'h0D8, 32'd0); + for (int i=0;i<10;i++) begin axi_write32(38'h0DC, la[i][31:0]); axi_write32(38'h0E4, la[i][63:32]); end + repeat(8) @(posedge clk); + for (int i=0;i<10;i++) check_eq($sformatf("bridge_stgA[%0d]",i), model_stg[i][31:0], la[i][31:0]); + if (model_stg[0] !== la[0]) begin $error("[bridge_stg] A: WORD0 not at slot 0 (0x0D8 addr-reset broken)"); errors=errors+1; end + axi_read32(38'h0DC, rd); check_eq("A staged_addr (=nwords)", rd, 32'd10); + + // ---- NEGATIVE test: 0x0D8 SETS the addr to the written value; writing 1 mis-slots word0 to slot 1 (the + // EXACT board failure that produced 0 rendered beats). This pins the register semantics. ---- + for (int i=0;i<64;i++) model_stg[i]=64'd0; + axi_write32(38'h0D8, 32'd1); + axi_write32(38'h0DC, la[0][31:0]); axi_write32(38'h0E4, la[0][63:32]); + repeat(8) @(posedge clk); + if (model_stg[0][31:0] !== 32'd0) begin $error("[bridge_stg] neg: slot0 should stay empty when addr set to 1"); errors=errors+1; end + if (model_stg[1] !== la[0]) begin $error("[bridge_stg] neg: word0 must land at slot 1 when 0x0D8=1 (bug repro)"); errors=errors+1; end + + // ---- SCENE B: re-stage a DIFFERENT list after resetting addr to 0 (A -> B, no shortcut) ---- + for (int i=0;i<64;i++) model_stg[i]=64'd0; + axi_write32(38'h0D8, 32'd0); + for (int i=0;i<6;i++) begin axi_write32(38'h0DC, lb[i][31:0]); axi_write32(38'h0E4, lb[i][63:32]); end + repeat(8) @(posedge clk); + for (int i=0;i<6;i++) check_eq($sformatf("bridge_stgB[%0d]",i), model_stg[i][31:0], lb[i][31:0]); + if (model_stg[0] !== lb[0]) begin $error("[bridge_stg] B: WORD0 not at slot 0"); errors=errors+1; end + axi_read32(38'h0DC, rd); check_eq("B staged_addr (=nwords)", rd, 32'd6); + + // ---- records_emitted readback (0x0E4 R reflects the feeder count; board expected 68/scene) ---- + feeder_records_i = 16'd68; repeat(4) @(posedge clk); + axi_read32(38'h0E4, rd); check_eq("records_emitted readback", rd, 32'd68); + $display("[bridge_stg] OK: two lists staged via bridge writes; word0@slot0, addr=nwords, addr-set semantics pinned, records=68"); + end + + // -------------------------------------------------------- + // Ch357 — persistent-Z observability status: clear_done (0x02C[7]), drop snapshot (0x0EC), + // sticky drops-nonzero (0x02C[8]). These are the host's fail-closed gates for the Z fit. + // -------------------------------------------------------- + begin + frame_drained_i = 1'b0; clear_done_i = 1'b0; frag_drops_i = 32'd0; repeat(4) @(posedge clk); + axi_read32(38'h02C, rd); check_eq("Ch357 clear_done idle 0x02C[7]=0", {31'd0, rd[7]}, 32'd0); + axi_read32(38'h0EC, rd); check_eq("Ch357 FRAG_DROPS idle=0", rd, 32'd0); + axi_read32(38'h02C, rd); check_eq("Ch357 drops_nz idle 0x02C[8]=0", {31'd0, rd[8]}, 32'd0); + // clear_done asserts -> synced high at 0x02C[7] + clear_done_i = 1'b1; repeat(4) @(posedge clk); + axi_read32(38'h02C, rd); check_eq("Ch357 clear_done synced 0x02C[7]=1", {31'd0, rd[7]}, 32'd1); + // drop snapshot latches ONLY while drained (quiescent). Drained + drops=0 -> snapshot 0, sticky 0. + frame_drained_i = 1'b1; frag_drops_i = 32'd0; repeat(4) @(posedge clk); + axi_read32(38'h0EC, rd); check_eq("Ch357 FRAG_DROPS drained,0", rd, 32'd0); + axi_read32(38'h02C, rd); check_eq("Ch357 drops_nz still 0 0x02C[8]=0", {31'd0, rd[8]}, 32'd0); + // inject a drop while drained -> snapshot captures the count, sticky trips + frag_drops_i = 32'd5; repeat(4) @(posedge clk); + axi_read32(38'h0EC, rd); check_eq("Ch357 FRAG_DROPS snapshot=5", rd, 32'd5); + axi_read32(38'h02C, rd); check_eq("Ch357 drops_nz sticky set 0x02C[8]=1",{31'd0, rd[8]},32'd1); + // sticky is FAIL-CLOSED: persists even after drops clear and frame_drained drops + frag_drops_i = 32'd0; frame_drained_i = 1'b0; repeat(4) @(posedge clk); + axi_read32(38'h02C, rd); check_eq("Ch357 drops_nz sticky persists 0x02C[8]=1", {31'd0, rd[8]}, 32'd1); + clear_done_i = 1'b0; + $display("[bridge_ch357] OK: clear_done sync + drop snapshot + fail-closed sticky-nonzero pinned"); + end + + // -------------------------------------------------------- + // Ch367 -- runtime CLUT residency ABI. The 1 KiB palette window + // is intentionally outside every legacy side-effect window. Pin + // the address/data write pulse, expected-sum round trip, busy + // gate, commit toggle, and done/result readback independently of + // the actual dual-clock copier. + // -------------------------------------------------------- + begin + logic commit_before; + integer writes_before; + axi_write32(38'h200, 32'h11223344); + @(posedge clk); + check_eq("CLUT_STAGE data@0", clut_stage_last_data, 32'h11223344); + check_eq("CLUT_STAGE addr@0", {24'd0, clut_stage_last_addr}, 32'd0); + writes_before = clut_stage_writes; + axi_write32(38'h400, 32'h55667788); + @(posedge clk); + check_eq("CLUT_STAGE write@128", clut_stage_writes, writes_before + 1); + check_eq("CLUT_STAGE data@128", clut_stage_last_data, 32'h55667788); + check_eq("CLUT_STAGE addr@128", {24'd0, clut_stage_last_addr}, 32'd128); + writes_before = clut_stage_writes; + axi_write32(38'h5FC, 32'hAABBCCDD); + @(posedge clk); + check_eq("CLUT_STAGE write@255", clut_stage_writes, writes_before + 1); + check_eq("CLUT_STAGE data@255", clut_stage_last_data, 32'hAABBCCDD); + check_eq("CLUT_STAGE addr@255", {24'd0, clut_stage_last_addr}, 32'd255); + + axi_write32(38'h1E4, 32'h89ABCDEF); + axi_read32(38'h1E4, rd); check_eq("CLUT expected sum", rd, 32'h89ABCDEF); + commit_before = clut_commit_tgl_o; + axi_write32(38'h1E0, 32'h1); + repeat(2) @(posedge clk); + check_eq("CLUT commit toggle", clut_commit_tgl_o ^ commit_before, 1'b1); + + clut_busy_i = 1'b1; repeat(3) @(posedge clk); + axi_read32(38'h1E0, rd); check_eq("CLUT busy status", rd[0], 1'b1); + commit_before = clut_commit_tgl_o; + axi_write32(38'h1E0, 32'h1); + repeat(2) @(posedge clk); + check_eq("CLUT busy blocks commit", clut_commit_tgl_o ^ commit_before, 1'b0); + + clut_busy_i = 1'b0; clut_crc_i = 32'h89ABCDEF; clut_done_tgl_i = ~clut_done_tgl_i; + repeat(4) @(posedge clk); + axi_read32(38'h1E0, rd); check_eq("CLUT done status", rd[1], 1'b1); + axi_read32(38'h1E8, rd); check_eq("CLUT result sum", rd, 32'h89ABCDEF); + $display("[bridge_clut] OK: palette window, commit/busy gate, done/result ABI pinned"); + end + // -------------------------------------------------------- // Done. // -------------------------------------------------------- diff --git a/sim/tb/top/tb_top_psmct32_feeder_persp_demo.sv b/sim/tb/top/tb_top_psmct32_feeder_persp_demo.sv index 8ceaf1b..e9af195 100644 --- a/sim/tb/top/tb_top_psmct32_feeder_persp_demo.sv +++ b/sim/tb/top/tb_top_psmct32_feeder_persp_demo.sv @@ -46,6 +46,12 @@ module tb_top_psmct32_feeder_persp_demo; .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(256), +`ifdef GRAD_BOARDPATH + // Ch417 — verify the ACTUAL BOARD gradient config: registered numerator feeding the single combinational + // divider, held for the five-cycle settle window. This used to select GRAD_SEQ_DIVIDER=1 by mistake and + // therefore did not test the production control path its target name claimed to cover. + .GRAD_SEQ_DIVIDER(1'b0), .GRAD_DIV_CYCLES(5), +`endif .PERSPECTIVE_CORRECT(1'b1) ) dut ( .clk(clk), .rst_n(rst_n), .core_go(core_go), diff --git a/sim/tb/top/tb_top_psmct32_runtime_clut.sv b/sim/tb/top/tb_top_psmct32_runtime_clut.sv new file mode 100644 index 0000000..a05abf3 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_runtime_clut.sv @@ -0,0 +1,60 @@ +// Integration proof for the runtime CLUT writer mux in the BRAM board top. +`timescale 1ns/1ps + +module tb_top_psmct32_runtime_clut; + logic clk = 1'b0; + always #5 clk = ~clk; + logic rst_n, core_go; + logic runtime_wr_en, runtime_busy; + logic [7:0] runtime_wr_idx; + logic [31:0] runtime_wr_data; + logic [7:0] r,g,b; + logic hsync,vsync,de,core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + int errors; + + top_psmct32_raster_demo_bram #(.PSMCT32_SWIZZLE(1'b0)) dut ( + .clk, .rst_n, .core_go, .r, .g, .b, .hsync, .vsync, .de, + .core_halt, .dma_done_seen, .frame_seen, .raster_overflow, + .frame_toggle, .dma_done_toggle, + .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .runtime_clut_wr_en_i(runtime_wr_en), + .runtime_clut_wr_idx_i(runtime_wr_idx), + .runtime_clut_wr_data_i(runtime_wr_data), + .runtime_clut_busy_i(runtime_busy) + ); + + task automatic runtime_write(input logic [7:0] idx, input logic [31:0] data); + @(posedge clk); + runtime_wr_idx <= idx; + runtime_wr_data <= data; + runtime_wr_en <= 1'b1; + @(posedge clk); + runtime_wr_en <= 1'b0; + endtask + + task automatic check(input string label, input logic [31:0] got, input logic [31:0] want); + if (got !== want) begin + $error("[%s] got 0x%08x expected 0x%08x",label,got,want); + errors = errors + 1; + end + endtask + + initial begin + rst_n=0; core_go=0; runtime_wr_en=0; runtime_wr_idx=0; runtime_wr_data=0; runtime_busy=0; errors=0; + repeat(4) @(posedge clk); + rst_n=1; + runtime_write(8'h00,32'h10203040); + runtime_write(8'h37,32'hA1B2C3D4); + runtime_write(8'hFF,32'h55667788); + repeat(2) @(posedge clk); + check("clut[0]",dut.u_clut.mem[0],32'h10203040); + check("clut[55]",dut.u_clut.mem[8'h37],32'hA1B2C3D4); + check("clut[255]",dut.u_clut.mem[8'hFF],32'h55667788); + runtime_busy=1; + repeat(2) @(posedge clk); + if (dut.clut_busy !== 1'b1) begin $error("runtime busy did not stall CLUT consumer"); errors=errors+1; end + if(errors) $fatal(1,"tb_top_psmct32_runtime_clut FAILED: %0d errors",errors); + $display("tb_top_psmct32_runtime_clut PASS: writer mux + busy gate"); + $finish; + end +endmodule diff --git a/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb.sv b/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb.sv new file mode 100644 index 0000000..dc4883c --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb.sv @@ -0,0 +1,246 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_lpddr_fb (Ch353 Brick 1c — LPDDR-only direct PSMCT32 framebuffer proof) +// +// Same SH3 draw as tb_top_psmct32_sh3_real_draw_demo, but the framebuffer is NOT mirrored into BRAM: +// - FB_LPDDR_ONLY=1 suppresses the BRAM raster write (xfer/CLUT upload still lands in BRAM); +// - the exposed PSMCT32 raster stream (flush_color32_o/flush_addr_o/flush_emit_o, gated by PSMCT32 psm) +// drives gs_lpddr_axi_master#(.PIX_BYTES(4)) -> a behavioral, strobe-honouring LPDDR framebuffer; +// - an end-of-scene `flush` pulse pushes the final partial beat. +// PROOF: every emitted raster pixel (captured into an "ideal" frame) must appear byte-exact in the LPDDR FB. +// This validates the LPDDR-only direct path itself (writer fidelity), independent of render correctness. +// LOCAL/gitignored fixtures (dump-derived); skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_lpddr_fb; +`ifdef SH3_FULL_FRAME +`include "sh3_full_params.vh" // 256x334 full-frame bounding box +`else +`include "sh3_real_params.vh" // 256x120 cropped (default) +`endif + localparam int FB_WORDS = FBPXW*FBH; // cropped 256x120 here; full-frame swaps the fixture (FBH=334) + localparam int FB_BYTES = FB_WORDS*4; + + logic clk; logic rst_n; initial clk=1'b0; always #5 clk=~clk; // GS/design clock + logic axi_clk2; initial axi_clk2=1'b0; always #2 axi_clk2=~axi_clk2; // faster EMIF-like AXI clock (models the board's 310MHz drain; exercises the real async-FIFO CDC) + logic core_go; logic [7:0] r,g,b; logic hsync,vsync,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; + + // texture-cache tap + cache<->behavioral texture LPDDR (cloned from the oracle) + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; + logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; + logic [7:0] arlen; logic [2:0] arsize; logic arvalid, arready; + logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + + // exposed PSMCT32 raster stream (Ch323 ports) -> LPDDR FB writer + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), + .FB_LPDDR_ONLY(1'b1) // Ch353 — suppress BRAM raster mirror (CLUT/xfer still write) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(1'b0), .feeder_stg_waddr_i(12'd0), .feeder_stg_wdata_i(64'd0), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), .feeder_records_o(), .feeder_waits_o(), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + gs_texture_cache #( + .LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS) + ) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), + .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), + .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), + .tex_rd_addr(gs_tex_rd_addr_o), .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + + // behavioral texture LPDDR (cloned from the oracle) + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; + logic [3:0] dly; int beat_idx; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=2'b00; rdata<='0; dly<='0; end + else begin + arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; beat_idx<=(araddr-LPDDR_TEX_BASE)>>5; dly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (dly==0) sst<=S_DATA; else dly<=dly-1'b1; + S_DATA: if (rready) begin + for (int w=0; w<8; w++) rdata[w*32 +: 32] <= lpddr_mem[beat_idx*8 + w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; + end + endcase + end + end + + // ---- Ch353 LPDDR FRAMEBUFFER writer (PSMCT32) + behavioral strobe-honouring LPDDR FB ---- + logic fb_commit=0; always #13 fb_commit=~fb_commit; // free-run ctrl_commit so arm latches (PIX_BYTES=4) + logic fb_flush=0; + logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_fbwriter ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(1'b1), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w == 6'h00)), // PSMCT32 raster emits only + .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(axi_clk2), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), + .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + // behavioral LPDDR FB: write only strobed bytes at the latched AW addr + logic [7:0] fb_lpddr [0:FB_BYTES-1]; + logic [31:0] fb_aw_lat; + always_ff @(posedge axi_clk2) begin // writer's AXI domain + if (fbw_awvalid) fb_aw_lat <= fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int a; a = fb_aw_lat + i; if (a>=0 && a>2] <= flush_color32_w; + ideal_set[flush_addr_w>>2] <= 1'b1; + end + end + + // ---- Ch353 (Codex #1) FULL-FRAME bounded ORACLE: score the rendered frame vs the reference texel map. + // Distinct from the transport proof above — this proves the UNCROPPED renderer is correct, not just that + // bytes reached LPDDR. Same bounded <=1-texel acceptance as tb_top_psmct32_sh3_real_draw_demo. + logic [31:0] idx_words [0:(512*512/4)-1]; + logic [31:0] pal [0:255]; + logic [31:0] refmap [0:FB_WORDS-1]; + function automatic logic [7:0] sh3_idx(input integer u, input integer v); + integer lin; logic [31:0] w; lin=v*TW+u; w=idx_words[lin/4]; sh3_idx=w[(8*(lin%4)) +: 8]; + endfunction + function automatic logic [23:0] exp_cell(input integer u, input integer v); + exp_cell = pal[sh3_idx(u,v)][23:0]; endfunction + + int errors; + initial begin + errors=0; feeder_go_tb=1'b0; + for (int i=0;i>9)&9'h1FF; tv = rm&9'h1FF; + fb = ideal[py*FBPXW+px][23:0]; // rendered color (== LPDDR FB, proven equal above) + m_total++; + D=9; + for (int rad=0; rad<=1; rad++) + for (int du=-rad; du<=rad; du++) for (int dv=-rad; dv<=rad; dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && D==9 && (tu+du)>=0 && (tu+du)=0 && (tv+dv)0)?100.0*m_ok/m_total:0.0, + (int_total>0)?100.0*int_ok/int_total:0.0, cb); + if (cb !== 0) begin $error("[oracle] %0d covered px NOT a CLUT entry (wrong palette)", cb); errors++; end + if (int_total>0 && (100.0*int_ok/int_total) < 95.0) + begin $error("[oracle] interior <=1texel %.1f%% < 95%% (render wrong)", 100.0*int_ok/int_total); errors++; end + end + + $display("[tb_top_psmct32_sh3_lpddr_fb] errors=%0d", errors); + if (errors==0) $display("[tb_top_psmct32_sh3_lpddr_fb] PASS"); + else $display("[tb_top_psmct32_sh3_lpddr_fb] FAIL"); + $finish; + end + initial begin #20000000; $error("[tb_top_psmct32_sh3_lpddr_fb] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_lpddr_fb diff --git a/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb_seq.sv b/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb_seq.sv new file mode 100644 index 0000000..28c9736 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_lpddr_fb_seq.sv @@ -0,0 +1,352 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_lpddr_fb_seq (Ch353 Brick 3 — LPDDR-only FB host-start SEQUENCE proof) +// +// Proves Codex's round-5 board sequence at the module level, ahead of the owner fit: +// * FEEDER_AUTOSTART=0 -> boot setup reaches C_READY WITHOUT a boot render. +// * RENDER EPOCH: the end-of-scene flush (EOF) fires ONLY on a feeder_ready RISE that follows an accepted +// host GO (render_inflight), so the setup->ready edge can NOT enqueue a false EOF. +// * frame_drained is a HARD gate (no timeout): scanout enable is driven by it, EMIF-domain coherent. +// +// Acceptance (Codex): boot reaches ready; BEFORE GO zero raster writes / zero EOF / frame_drained=0; preclear (FB=0) +// no BRESP; texture fill verifies (crc); host sets base 0 / canary off / arms writer; GO drops then re-raises ready; +// exactly ONE EOF -> exactly ONE frame_drained; scanout reads exactly 334*32=10688 beats and matches ALL 256x334 +// pixels (incl. black); underflow=0, rd/wr errors=0, FIFO overflow=0; a synchronized frame_drained reaches "bridge". +// LOCAL/gitignored fixtures (dump-derived); skip-guard if absent. +`timescale 1ns/1ps +`define SH3_FULL_FRAME 1 + +module tb_top_psmct32_sh3_lpddr_fb_seq; +`include "sh3_full_params.vh" // 256x334 full-frame bounding box (FBPXW,FBH,STG_WORDS,TEX_*,TW,TH,...) + localparam int W = FBPXW, H = FBH; // 256 x 334 + localparam int STRIDE = W*4; // 1024 B (PSMCT32, no padding) + localparam int ROW_BEATS = STRIDE/32; // 32 + localparam int FB_BYTES = STRIDE*H; // 342016 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 10688 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + + logic clk=0; always #5 clk=~clk; // GS/design clock (feeder + writer gs-side) + logic emif_clk=0; always #2 emif_clk=~emif_clk; // EMIF (fast, independent) — writer axi-side + scanout axi-side + logic video_clk=0; always #7 video_clk=~video_clk;// video (independent of both) + logic bridge_clk=0;always #11 bridge_clk=~bridge_clk; // "HPS bridge" domain (frame_drained diagnostic sync) + logic rst_n; + logic fb_commit=0; always #13 fb_commit=~fb_commit; // free-run ctrl_commit so arm/base/canary latch + + int errors; initial errors=0; + + // ================= bram-top: SH3 draw via the feeder, FB_LPDDR_ONLY, AUTOSTART OFF ================= + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; + logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), // Ch353 — no boot render + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), + .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(1'b0), .feeder_stg_waddr_i(12'd0), .feeder_stg_wdata_i(64'd0), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), .feeder_records_o(), .feeder_waits_o(), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (from Brick 1c) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin + arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ================= RENDER EPOCH (Codex round 5) — flush only on a ready-rise that FOLLOWS an accepted GO ================= + // render_inflight set when a GO is accepted (feeder_go pulse while ready); the end-of-scene EOF flush fires on the + // NEXT feeder_ready rise (render+drain done) and clears the epoch. The FEEDER_AUTOSTART=0 setup->ready edge has + // render_inflight=0, so it can NOT produce a false EOF. + logic fb_flush=0; logic render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin + feeder_ready_q <= feeder_ready_tb; + fb_flush <= 1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight <= 1'b1; // accepted host GO opens the epoch + if (render_inflight && feeder_ready_rise) begin + fb_flush <= 1'b1; // exactly one EOF per render epoch + render_inflight <= 1'b0; + eof_count <= eof_count + 1; + end + end + end + + // ================= Ch353 PSMCT32 writer + behavioral (precleared) LPDDR FB ================= + logic wr_arm=0, wr_canary=0; logic [31:0] wr_base=32'h0; // host-controlled (Codex step 5) + logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(wr_canary), .fb_base(wr_base), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w == 6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), + .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat <= fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int a; a = fb_awlat + i; if (a>=0 && a>2] <= flush_color32_w; ideal_set[flush_addr_w>>2] <= 1'b1; + end + + // ================= SCANOUT reads the SAME FB back (Brick 2), gated on frame_drained ================= + logic [11:0] px, py; logic vsync, in_win; + logic [7:0] so_r, so_g, so_b; logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(fbw_drained), // HARD gate — frame_drained, no timeout + .video_clk(video_clk), .frame_start(vsync), + .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), + .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + // FB read model — single-beat, VARIABLE AR/R latency; counts read beats per EMIF-domain frame + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin + so_arready<=0; so_rvalid<=0; so_rlast<=0; + vs_e <= {vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last <= fb_reads; fb_reads <= 0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int a; a=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (a+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP && rawy C_READY (no render) + repeat(200) @(posedge clk); // dwell: a boot render (if any) would have emitted by now + + // ---- Codex acceptance: BEFORE GO — zero raster writes, zero EOF, frame_drained=0 ---- + if (raster_emits_preGO!==0) begin $error("[seq] %0d raster emits BEFORE GO (boot-render leak — AUTOSTART!=0?)", raster_emits_preGO); errors++; end + if (fbw_beats!==0) begin $error("[seq] writer wrote %0d beats BEFORE GO (should be 0)", fbw_beats); errors++; end + if (eof_count!==0) begin $error("[seq] %0d EOF markers BEFORE GO (render-epoch leaked on setup ready-rise)", eof_count); errors++; end + if (fbw_drained!==1'b0) begin $error("[seq] frame_drained asserted BEFORE GO"); errors++; end + if (fbw_bresp_err!==0) begin $error("[seq] preclear/idle BRESP errors=%0d", fbw_bresp_err); errors++; end + $display("[seq] pre-GO clean: raster_emits=0 writer_beats=0 eof=0 frame_drained=0 (ready reached without boot render)"); + + // ---- Codex step 5: host configures base 0, canary off, arms the writer (latched via ctrl_commit) ---- + wr_base<=32'h0; wr_canary<=1'b0; wr_arm<=1'b1; + repeat(40) @(posedge clk); // let a ctrl_commit edge snapshot arm/base/canary + count_preGO<=1'b0; + + // ---- Codex step 6: GO — ready must DROP then RISE after rendering ---- + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + begin int d=0; while(feeder_ready_tb && d<2000) begin @(posedge clk); d++; end end + if (feeder_ready_tb!==1'b0) begin $error("[seq] feeder_ready did not drop after GO"); errors++; end + wait (feeder_ready_tb==1'b1); // whole scene rendered + drained -> ready rises (fires the EOF flush) + + // ---- Codex step 7: exactly ONE EOF -> exactly ONE frame_drained ---- + begin int d=0; while(!fbw_drained && d<400000) begin @(posedge clk); d++; end end + if (!fbw_drained) begin $error("[seq] frame_drained never asserted after GO"); errors++; end + repeat(200) @(posedge clk); + if (eof_count!==1) begin $error("[seq] EOF count=%0d exp 1 (render epoch must emit exactly one)", eof_count); errors++; end + if (fbw_ovf!==0) begin $error("[seq] writer FIFO overflow=%0d", fbw_ovf); errors++; end + if (fbw_bresp_err!==0) begin $error("[seq] writer BRESP errors=%0d", fbw_bresp_err); errors++; end + $display("[seq] post-GO: eof_count=%0d frame_drained=1 writer_beats=%0d ovf=0", eof_count, fbw_beats); + + // ---- Codex step: bridge receives a synchronized frame_drained ---- + begin int d=0; while(!bridge_drained && d<2000) begin @(posedge bridge_clk); d++; end end + if (!bridge_drained) begin $error("[seq] synchronized frame_drained never reached the bridge domain"); errors++; end + + // ---- Codex step 8: scanout auto-enables from the ack; score exactly one frame ---- + vid_run=1; + begin int d=0; while(!vsync && d<200000) begin @(posedge video_clk); d++; end end + @(posedge video_clk); while(!vsync) @(posedge video_clk); // prime one frame -> 2nd vsync + begin scoring=1; + @(posedge video_clk); while(!vsync) @(posedge video_clk); // score exactly one frame + scoring=0; + repeat(60) @(posedge emif_clk); + if (fb_reads_last!==BEATS_PER_FRAME) begin + $error("[seq] scanout read beats/frame=%0d exp %0d (%0dx%0d)", fb_reads_last, BEATS_PER_FRAME, H, ROW_BEATS); errors++; + end + end + if (so_underflow!==0) begin $error("[seq] scanout underflow asserted"); errors++; end + if (so_rd_errs !==0) begin $error("[seq] scanout rd_errs=%0d", so_rd_errs); errors++; end + if (checked < H_ACT*V_ACT) begin $error("[seq] only %0d pixels checked (exp >= %0d)", checked, H_ACT*V_ACT); errors++; end + + // ---- bounded oracle: the rendered frame is a correct SH3 draw (<=1 texel) ---- + begin + int m_total,m_ok,int_total,int_ok,cb; m_total=0;m_ok=0;int_total=0;int_ok=0;cb=0; + for (int y=0;y>9)&9'h1FF; tv=rm&9'h1FF; fbc=ideal[y*W+x][23:0]; m_total++; D=9; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && D==9 && (tu+du)>=0 && (tu+du)=0 && (tv+dv)0)?100.0*m_ok/m_total:0.0,(int_total>0)?100.0*int_ok/int_total:0.0,cb); + if (cb!==0) begin $error("[seq][oracle] %0d covered px not a CLUT entry", cb); errors++; end + if (int_total>0 && (100.0*int_ok/int_total)<95.0) begin $error("[seq][oracle] interior <=1texel %.1f%% < 95%%", 100.0*int_ok/int_total); errors++; end + end + + $display("[tb_top_psmct32_sh3_lpddr_fb_seq] checked=%0d px, read_beats/frame=%0d (exp %0d), eof=%0d underflow=%0b rd_errs=%0d ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, eof_count, so_underflow, so_rd_errs, fbw_ovf, errors); + if (errors==0) $display("[tb_top_psmct32_sh3_lpddr_fb_seq] PASS"); + else $display("[tb_top_psmct32_sh3_lpddr_fb_seq] FAIL"); + $finish; + end + initial begin #40000000; $error("[tb_top_psmct32_sh3_lpddr_fb_seq] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_lpddr_fb_seq diff --git a/sim/tb/top/tb_top_psmct32_sh3_multidraw.sv b/sim/tb/top/tb_top_psmct32_sh3_multidraw.sv new file mode 100644 index 0000000..56c9890 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_multidraw.sv @@ -0,0 +1,313 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_multidraw (Ch354 Brick 1 — multi-draw accumulation into the LPDDR framebuffer) +// +// Composites N authentic SH3 draws (sharing one texture/CLUT) into ONE LPDDR PSMCT32 framebuffer through the SAME +// Ch353 LPDDR-FB path (FEEDER_AUTOSTART=0 + render-epoch EOF + frame_drained hard gate + line-buffer scanout), and +// proves Codex's Brick-1 acceptance: +// * records_emitted == NTRIS (all draws' triangles emitted) +// * max staging address stays < STG_WORDS (2048); FIFO/writer overflow == 0 +// * ALL batches complete before ONE ordered frame_drained +// * scanout/preclear geometry = 256xFBH (338); exactly FBH*32 read beats/frame +// * bounded <=1-texel oracle vs the INDEPENDENT combined refmap, with the OVERLAP region scored separately +// (that is where multi-draw accumulation is actually proven). +// LOCAL/gitignored fixtures (dump-derived); skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_multidraw; +`include "sh3_multi_params.vh" // FBPXW=256, FBH=338, STG_WORDS=2048, NTRIS=204, NDRAWS, TW/TH, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1024 B + localparam int ROW_BEATS = STRIDE/32; // 32 + localparam int FB_BYTES = STRIDE*H; + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 338*32 = 10816 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + + logic clk=0; always #5 clk=~clk; // GS/design clock + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top: multi-draw SH3 via the feeder, FB_LPDDR_ONLY, AUTOSTART off, STG_WORDS=2048 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), // 2048 staging, no boot render + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(1'b0), .feeder_stg_waddr_i(12'd0), .feeder_stg_wdata_i(64'd0), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin + arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch (same as the board) + PSMCT32 writer + precleared LPDDR FB ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin + feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; ideal_set[flush_addr_w>>2]<=1'b1; + end + + // ===== scanout reads the FB back (256x338) ===== + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(fbw_drained), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin + so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawy selects the fixture set (multi | d548 | d761 | d974 ...); +FBDUMP= dumps the RTL FB. + string ftag; string fdump; int is_multi; + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; + if (!$value$plusargs("TAG=%s", ftag)) ftag="multi"; + is_multi = (ftag=="multi"); + for (int i=0;i ready rises + + begin int d=0; while(!fbw_drained && d<800000) begin @(posedge clk); d++; end end + if (!fbw_drained) begin $error("[seq] frame_drained never asserted"); errors++; end + repeat(200) @(posedge clk); + // ---- Codex acceptance ---- + if (eof_count!==1) begin $error("[md] eof_count=%0d exp 1 (one ordered drain after ALL batches)", eof_count); errors++; end + if (is_multi && feeder_records_w!==NTRIS) begin $error("[md] records_emitted=%0d exp %0d (NTRIS)", feeder_records_w, NTRIS); errors++; end + if (fbw_ovf!==0) begin $error("[md] writer FIFO overflow=%0d", fbw_ovf); errors++; end + if (fbw_bresp_err!==0) begin $error("[md] writer BRESP errors=%0d", fbw_bresp_err); errors++; end + if (raster_overflow!==1'b0) begin $error("[md] raster_overflow asserted"); errors++; end + $display("[md] post-GO: eof=%0d records_emitted=%0d (exp %0d) writer_beats=%0d ovf=0", eof_count, feeder_records_w, NTRIS, fbw_beats); + + vid_run=1; + begin int d=0; while(!vsync && d<200000) begin @(posedge video_clk); d++; end end + @(posedge video_clk); while(!vsync) @(posedge video_clk); + begin scoring=1; + @(posedge video_clk); while(!vsync) @(posedge video_clk); + scoring=0; repeat(60) @(posedge emif_clk); + if (fb_reads_last!==BEATS_PER_FRAME) begin + $error("[md] scanout beats/frame=%0d exp %0d (%0dx%0d)", fb_reads_last, BEATS_PER_FRAME, H, ROW_BEATS); errors++; end + end + if (so_underflow!==0) begin $error("[md] scanout underflow"); errors++; end + if (so_rd_errs !==0) begin $error("[md] scanout rd_errs=%0d", so_rd_errs); errors++; end + if (checked < H_ACT*V_ACT) begin $error("[md] only %0d px checked (exp >= %0d)", checked, H_ACT*V_ACT); errors++; end + + // ---- combined oracle: ALL covered + the OVERLAP subset (refmap bit28) scored SEPARATELY ---- + // Score four cohorts. The ACCEPTANCE gate is on INTERIOR (bit30 = away from triangle edges) — the SAME + // seam-free standard Ch353 used (its ALL was only ~96%, gated INTERIOR>=95%). ALL and the raw OVERLAP + // region are seam-heavy (draw boundaries = sub-pixel which-draw-wins ambiguity + the Ch352 perspective/8b + // reciprocal limit) and reported informationally. OVERLAP-INTERIOR is the real multi-draw ACCUMULATION proof: + // pixels covered by >1 draw AND away from edges must render correctly. + begin + int m_tot,m_ok,mi_tot,mi_ok,o_tot,o_ok,oi_tot,oi_ok,cb; + m_tot=0;m_ok=0;mi_tot=0;mi_ok=0;o_tot=0;o_ok=0;oi_tot=0;oi_ok=0;cb=0; + for (int y=0;y>9)&9'h1FF; tv=rm&9'h1FF; fbc=ideal[y*W+x][23:0]; m_tot++; D=9; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && D==9 && (tu+du)>=0 && (tu+du)=0 && (tv+dv)0)?100.0*m_ok/m_tot:0.0, mi_ok,mi_tot,(mi_tot>0)?100.0*mi_ok/mi_tot:0.0, + o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, oi_ok,oi_tot,(oi_tot>0)?100.0*oi_ok/oi_tot:0.0, cb); + // ACCEPTANCE (Codex): the Brick-1 claim is MULTI-DRAW ACCUMULATION, proven bit-exact externally + // (combined RTL == RTL-paint-order composition of the isolated single renders, 0/86528 px diff, see + // compose_check + docs/ch354_audit_log.md). clut_bad and the overlap-exercised count ARE gated (a valid + // composited render). The <=1-texel fidelity above is a SEPARATE, draw-dependent metric (the existing + // perspective-sampling fidelity limitation: 89761=97.5%, 89548=95.6%, 89974=93.2% individually) and is + // REPORTED, NOT gated — it is not part of the accumulation acceptance. + if (cb!==0) begin $error("[md][oracle] %0d covered px not a CLUT entry", cb); errors++; end + if (is_multi && o_tot<1000) begin $error("[md][oracle] only %0d overlap px (<1000) — accumulation not exercised", o_tot); errors++; end + end + + // diagnostic: dump the RTL framebuffer (one 32-bit PSMCT32 word per FB pixel, row-major) for Python composition + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_multidraw] checked=%0d px, beats/frame=%0d (exp %0d), records=%0d eof=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, feeder_records_w, eof_count, so_underflow, fbw_ovf, errors); + if (errors==0) $display("[tb_top_psmct32_sh3_multidraw] PASS"); + else $display("[tb_top_psmct32_sh3_multidraw] FAIL"); + $finish; + end + initial begin #80000000; $error("[tb_top_psmct32_sh3_multidraw] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_multidraw diff --git a/sim/tb/top/tb_top_psmct32_sh3_multitex.sv b/sim/tb/top/tb_top_psmct32_sh3_multitex.sv new file mode 100644 index 0000000..01a174b --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_multitex.sv @@ -0,0 +1,353 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_multitex (Ch355 Brick 1 — MULTI-TEXTURE composition) +// +// Two authentic SH3 draws with DIFFERENT TEX0/CLUT accumulate into ONE LPDDR framebuffer via scene-level texture +// rebind + staged-list retriggering. Dump order: A=idx19562 (tbp=11264/CBP_A) THEN B=idx89761 (tbp=9216/CBP_B). +// Proves Codex's Ch355 gates: +// * TWO cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, texture-specific CRC (A then B). +// * NO stale-frame_drained race: EACH scene requires an observed frame_drained high->low->high (not a lingering 1). +// * preclear EXACTLY once; scanout stays disabled until the SECOND fresh drain. +// * records_emitted per list; final FB scored vs the independent A->B reference; OVERLAP scored separately. +// * FB 320x381 (FBW=5), stride 1280, scanout 15240 beats/frame. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_multitex; +`include "sh3_mt_params.vh" // FBPXW=320, FBH=381, CBP_A/CBP_B, NTRIS_A/B, CRC_TEX_A/B, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1280 + localparam int ROW_BEATS = STRIDE/32; // 40 + localparam int FB_BYTES = STRIDE*H; // 487680 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 15240 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 320x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(1'b0), .feeder_stg_waddr_i(12'd0), .feeder_stg_wdata_i(64'd0), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (RELOADED between fills for the rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded: tex A, then tex B + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer (Codex): count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (320x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawyB composed reference + per-group palette/idx (for the oracle) + logic [31:0] idxA [0:(512*512/4)-1]; logic [31:0] palA [0:255]; + logic [31:0] idxB [0:(512*512/4)-1]; logic [31:0] palB [0:255]; logic [31:0] refmap [0:FB_WORDS-1]; + + // ---- one-scene runner: GO, wait render+drain, and REQUIRE frame_drained high->low->high (fresh, not stale) ---- + task automatic run_scene(input string nm, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; // stale high from a PRIOR scene? + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + // ready drops (render started) + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[mt] %s: feeder_ready did not drop after GO", nm); errors++; end + // ANTI-STALE (Codex): if frame_drained was HIGH before GO (a prior scene's drain), require a FALL first — proves + // THIS scene's beats actually flowed and cleared the stale high (never accept a lingering 1 as this scene done). + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[mt] %s: frame_drained never fell from stale high — STALE drain (scene did not render fresh)", nm); errors++; end + end + // require a fresh RISE (this scene's ordered drain) either way -> high->low->high for B, low->high for A. + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[mt] %s: frame_drained never rose — scene did not drain", nm); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[mt] %s: records_emitted=%0d exp %0d", nm, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[mt] %s: writer ovf=%0d bresp=%0d", nm, fbw_ovf, fbw_bresp_err); errors++; end + $display("[mt] scene %s: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", nm, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input string nm, input logic [31:0] exp_crc); + int d=0; logic d0; + d0=fill_done; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + // require a FRESH fill_done low->high (cache rearm), not a lingering high + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[mt] fill %s: fill_done never rose (rearm failed)", nm); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[mt] fill %s: crc=%08x exp %08x", nm, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[mt] fill %s: beats=%0d exp %0d", nm, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[mt] fill %s: bytes=%0d exp %0d", nm, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[mt] fill %s: rd_errs=%0d", nm, tex_rd_errs); errors++; end + $display("[mt] cache fill %s: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", nm, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // group-flag texel lookup — reads the module-level arrays (NO per-call array copy). gb=1 -> group B, else A. + function automatic logic [23:0] cellg(input bit gb, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w = gb ? idxB[lin/4] : idxA[lin/4]; ix=w[(8*(lin%4)) +: 8]; + cellg = gb ? palB[ix][23:0] : palA[ix][23:0]; + endfunction + + string only_m; string fdump; int mode; // +ONLY=AB|A|B ; +FBDUMP= (Codex isolation/composition diagnostic) + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="AB"; + mode = (only_m=="A") ? 0 : (only_m=="B") ? 1 : 2; // 0=A-only(palA) 1=B-only(palB) 2=AB(both) + for (int i=0;i cache (fill #1), stage list A, GO, fresh drain ===== + if (mode!=1) begin + $readmemh("../../data/top_psmct32_raster_demo/sh3_mtA_tex_lpddr.mem", lpddr_mem); + fill_cache("A", CRC_TEX_A); + $readmemh("../../data/top_psmct32_raster_demo/feeder_sh3_mtA.mem", dut.g_feeder.feeder_stg); + run_scene("A", NTRIS_A); + if (mode==2 && scan_en!==1'b0) begin $error("[mt] scanout enabled before scene B"); errors++; end + end + // ===== SCENE B (runs in AB and B-only): REBIND texture B -> cache (fill #2 rearm), stage list B, GO, drain ===== + if (mode!=0) begin + $readmemh("../../data/top_psmct32_raster_demo/sh3_mtB_tex_lpddr.mem", lpddr_mem); + fill_cache("B", CRC_TEX_B); + $readmemh("../../data/top_psmct32_raster_demo/feeder_sh3_mtB.mem", dut.g_feeder.feeder_stg); + run_scene("B", NTRIS_B); + end + + // enable scanout only after the final fresh drain + scan_en<=1'b1; repeat(20) @(posedge clk); + if (mode==2) begin + if (fd_rises<2) begin $error("[mt] expected 2 ordered drains (A,B): rises=%0d", fd_rises); errors++; end + if (fd_falls<1) begin $error("[mt] scene B never cleared the stale drain (falls=%0d) — stale-drain race", fd_falls); errors++; end + end else if (fd_rises<1) begin $error("[mt] isolated scene did not drain: rises=%0d", fd_rises); errors++; end + + // ===== scanout: score final FB vs the A->B reference; overlap separately ===== + vid_run=1; + begin int d=0; while(!vsync && d<300000) begin @(posedge video_clk); d++; end end + @(posedge video_clk); while(!vsync) @(posedge video_clk); + begin scoring=1; @(posedge video_clk); while(!vsync) @(posedge video_clk); scoring=0; repeat(60) @(posedge emif_clk); + if (fb_reads_last!==BEATS_PER_FRAME) begin $error("[mt] scanout beats/frame=%0d exp %0d", fb_reads_last, BEATS_PER_FRAME); errors++; end + end + if (so_underflow!==0) begin $error("[mt] scanout underflow"); errors++; end + if (so_rd_errs !==0) begin $error("[mt] scanout rd_errs=%0d", so_rd_errs); errors++; end + if (checked < H_ACT*V_ACT) begin $error("[mt] only %0d px checked (exp >= %0d)", checked, H_ACT*V_ACT); errors++; end + + // The reference stored (tu,tv) of the WINNING group per pixel (B on overlap, else the covering group). Since + // the per-pixel owner-group is not encoded, accept the RTL colour if it matches the <=1-texel neighbourhood in + // EITHER palette A or B (multi-texture: the winning group's texel is one of the two). overlap (bit28) scored + // separately. clut_bad requires the colour to exist in palette A OR B. + begin + int m_tot,m_ok,o_tot,o_ok,cb,D; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y>9)&9'h1FF; tv=rm&9'h1FF; ovl=rm[28]; fbc=ideal[y*W+x][23:0]; m_tot++; D=9; + for (int rad=0;rad<=1 && D==9;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && D==9 && (tu+du)>=0 && (tu+du)=0 && (tv+dv)0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[mt][oracle] ONLY=%s: %0d covered px not in the expected palette", only_m, cb); errors++; end + if (mode==2) begin + if (o_tot<500) begin $error("[mt][oracle] only %0d overlap px — accumulation not exercised", o_tot); errors++; end + // OVERLAP is the composite proof (B over A). ALL reported. Per-draw A/B fidelity settled by the ONLY=A/B runs. + if (o_tot>0 && (100.0*o_ok/o_tot)<95.0) begin $error("[mt][oracle] OVERLAP composite <=1texel %.1f%% < 95%%", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the Codex composition check (A-only + B-only -> compose -> compare AB combined) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_multitex] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (errors==0) $display("[tb_top_psmct32_sh3_multitex] PASS"); else $display("[tb_top_psmct32_sh3_multitex] FAIL"); + $finish; + end + initial begin #120000000; $error("[tb_top_psmct32_sh3_multitex] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_multitex diff --git a/sim/tb/top/tb_top_psmct32_sh3_sched.sv b/sim/tb/top/tb_top_psmct32_sh3_sched.sv new file mode 100644 index 0000000..afa1786 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_sched.sv @@ -0,0 +1,391 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_sched (Ch356 — N-TEXTURE SCHEDULER, data-driven epoch descriptors) +// +// Generalizes Ch355's two-group flow to N authentic SH3 draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating +// into ONE LPDDR framebuffer via a data-driven scheduler over epoch descriptors (sh3_sched_params.vh). Default +// N_EPOCHS=3: E0=idx11671 E1=idx19562 E2=idx89761. Proves Codex's Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_sched; +`include "sh3_sched_params.vh" // FBPXW=384, FBH=381, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_sched%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_sched] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (errors==0) $display("[tb_top_psmct32_sh3_sched] PASS"); else $display("[tb_top_psmct32_sh3_sched] FAIL"); + $finish; + end + initial begin #160000000; $error("[tb_top_psmct32_sh3_sched] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_sched diff --git a/sim/tb/top/tb_top_psmct32_sh3_sched640.sv b/sim/tb/top/tb_top_psmct32_sh3_sched640.sv new file mode 100644 index 0000000..51cc3e6 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_sched640.sv @@ -0,0 +1,392 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_sched640 (Ch357 — NATIVE 640x480 LPDDR framebuffer) +// +// Ch357 = the Ch356 N-texture scheduler on a NATIVE 640x480 LPDDR framebuffer (FBW=10, stride 2560, size 0x12C000, +// 80 beats/row, 38400 beats/frame). Draws land at their AUTHENTIC screen coordinates (NO union-origin translation); +// the scheduler/flow is UNCHANGED from Ch356, only the FB geometry differs (from sh3_s640_params.vh). Default +// N_EPOCHS=3: E0=idx11671 E1=idx19562 E2=idx89761. Proves Codex's Ch357 acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_sched640; +`include "sh3_s640_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 2560 + localparam int ROW_BEATS = STRIDE/32; // 80 + localparam int FB_BYTES = STRIDE*H; // 1228800 (0x12C000) + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 38400 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_s640%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_sched640] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (errors==0) $display("[tb_top_psmct32_sh3_sched640] PASS"); else $display("[tb_top_psmct32_sh3_sched640] FAIL"); + $finish; + end + initial begin #320000000; $error("[tb_top_psmct32_sh3_sched640] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_sched640 diff --git a/sim/tb/top/tb_top_psmct32_sh3_zarb.sv b/sim/tb/top/tb_top_psmct32_sh3_zarb.sv new file mode 100644 index 0000000..f7667ef --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zarb.sv @@ -0,0 +1,204 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zarb (Ch357 — SHARED-LPDDR arbitration integration sim, randomized backpressure) +// +// Codex pre-fit gate 1: "Shared-LPDDR integration sim with randomized backpressure. Arbitration is part of Ch357, not +// just wiring." This routes gs_lpddr_zc_emit's THREE AXI streams through the REAL de25 arbiters onto ONE shared LPDDR: +// * color writes (c_*) -> gs_lpddr_wr_arb port s0 (FB-writer, priority) +// * Z writes (z_aw/w/b) -> gs_lpddr_wr_arb port s2 (repurposed tile-Z-flush port) +// * Z reads (z_ar/r) -> gs_lpddr_rd_arb port s0 +// During render only color/Z traffic is active (scanout/texture idle, per gate 2). One behavioral LPDDR serves BOTH the +// merged write channel (m_aw/w/b) and the read channel (m_ar/r) with RANDOM backpressure on every channel. Replays the +// raster fragment trace (zsched_frags.txt) + an independent clamp16 scoreboard; asserts final color+Z == scoreboard, +// suppression, per-epoch ordered drain, disjoint ranges, no deadlock. This proves the arbitration under contention before +// wiring the de25 top. Strong-reject primary fixture, FB 256x210. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zarb; + localparam int FB_PXW=256, FB_H=210; + localparam int NPX=FB_PXW*FB_H; + localparam [31:0] COLBASE=32'h0000_0000, ZBASE=32'h0014_0000, TEXBASE=32'h0020_0000; + localparam int MEMBEATS=(TEXBASE>>5); // one array up to the texture base (0x200000/32 = 65536 beats) + + logic gs_clk=0; always #5 gs_clk=~gs_clk; + logic axi_clk=0; always #2 axi_clk=~axi_clk; + logic gs_rst_n, axi_rst_n; int errors; initial errors=0; + + logic enable, clear_start, clear_done, frame_drained; + logic g_valid, g_ready; logic [11:0] g_x, g_y; logic [15:0] g_zq; logic g_zmsk, g_ztest, g_scene; logic [31:0] g_color; + // zc_emit Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // zc_emit Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic idle; + + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .REQ_DEPTH(32), .COL_DEPTH(64)) dut ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(g_zmsk), + .g_ztest(g_ztest), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(idle) + ); + + // ---- write arbiter: s0 = color, s2 = Z, s1/s3 inert ; master -> shared LPDDR write ---- + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(axi_clk), .rst_n(axi_rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ---- read arbiter: s0 = Z read ; s1/s2/s3 inert (scanout/tex idle during render) ; master -> shared LPDDR read ---- + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(axi_clk), .rst_n(axi_rst_n), + .s0_araddr(z_araddr[29:0]), .s0_arburst(z_arburst), .s0_arid(7'd0), .s0_arlen(z_arlen), .s0_arsize(z_arsize), + .s0_arvalid(z_arvalid), .s0_arready(z_arready), .s0_rdata(z_rdata), .s0_rresp(z_rresp), .s0_rlast(z_rlast), + .s0_rvalid(z_rvalid), .s0_rready(z_rready), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(30'd0), .s3_arburst(2'b01), .s3_arid(7'd3), .s3_arlen(8'd0), .s3_arsize(3'b101), + .s3_arvalid(1'b0), .s3_arready(), .s3_rdata(), .s3_rresp(), .s3_rlast(), .s3_rvalid(), .s3_rready(1'b0), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge axi_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ---- ONE shared behavioral LPDDR (write + read channels), address-decoded, random backpressure ---- + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + // write channel + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int b=0;b<32;b++) if(ws[b]) shmem[wa>>5][b*8+:8]<=wd[b*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + // read channel + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + + // disjoint-range monitors on the MERGED master streams + always_ff @(posedge axi_clk) if(axi_rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+18288*32)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+13440*32)))) + begin $error("[zarb] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+13440*32))) begin $error("[zarb] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ---- scoreboard + trace feed (same clamp16 persistent-Z model as the ROP gate) ---- + logic [15:0] sb_z [0:NPX-1]; logic [31:0] sb_col [0:NPX-1]; logic sb_seen [0:NPX-1]; + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + int nfed; + task automatic feed_frag(input int ep, input int x, input int y, input int z, input logic [31:0] col); + int o; logic [15:0] zq; logic pass; + @(negedge gs_clk); g_valid<=1; g_scene<=0; g_x<=x[11:0]; g_y<=y[11:0]; g_zq<=cl16(z); g_zmsk<=0; g_ztest<=1; g_color<=col; + @(posedge gs_clk); while(!(g_valid && g_ready)) @(posedge gs_clk); + @(negedge gs_clk); g_valid<=0; + o=y*FB_PXW+x; zq=cl16(z); pass=(zq>=sb_z[o]); + if(pass) begin sb_col[o]=col; sb_seen[o]=1; sb_z[o]=zq; end + nfed++; + if(lf[7]) repeat(1+lf[1:0]) @(posedge gs_clk); + endtask + task automatic send_marker(); + @(negedge gs_clk); g_valid<=1; g_scene<=1; @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); + @(negedge gs_clk); g_valid<=0; g_scene<=0; + endtask + + int fh, r, ep, x, y, z, cep, drains; logic [31:0] col; + initial begin + errors=0; enable=0; clear_start=0; g_valid=0; g_scene=0; g_x=0; g_y=0; g_zq=0; g_zmsk=0; g_ztest=1; g_color=0; nfed=0; drains=0; + for(int i=0;i>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + if(zs!==sb_z[o]) begin if(errors<12)$error("[zarb] Z px%0d=%04x exp %04x",o,zs,sb_z[o]);errors++; end + end + for(int o=0;o>3][(o[2:0])*32+:32]; // COLBASE=0 + if(sb_seen[o]) begin if(cs!==sb_col[o]) begin if(errors<12)$error("[zarb] COLOR px%0d=%08x exp %08x",o,cs,sb_col[o]);errors++; end end + else begin if(cs!==32'd0) begin if(errors<12)$error("[zarb] px%0d never-passed color=%08x (suppress)",o,cs);errors++; end end + end + if(col_ovf!==0) begin $error("[zarb] col_ovf=%0d",col_ovf);errors++; end + if(bresp_err!==0)begin $error("[zarb] bresp_err=%0d",bresp_err);errors++; end + $display("[zarb] fed=%0d drains=%0d z_wr=%0d c_wr=%0d col_ovf=%0d bresp_err=%0d errors=%0d (COL 0x%0h..0x%0h, Z 0x%0h..0x%0h)", + nfed, drains, z_beats_written, c_beats_written, col_ovf, bresp_err, errors, COLBASE, COLBASE+18288*32, ZBASE, ZBASE+13440*32); + if(errors==0) $display("[tb_top_psmct32_sh3_zarb] PASS"); else $display("[tb_top_psmct32_sh3_zarb] FAIL"); + $finish; + end + initial begin #500000000; $error("[tb_top_psmct32_sh3_zarb] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zarb diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint.sv b/sim/tb/top/tb_top_psmct32_sh3_zint.sv new file mode 100644 index 0000000..1a644ba --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint.sv @@ -0,0 +1,423 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint (Ch357 — REAL-RASTER persistent-Z board integration sim) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zsched scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint; +`include "sh3_zsched_params.vh" // FBPXW=384, FBH=381, N_EPOCHS=3, EPk_CRC/EPk_NTRIS, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(1024), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(1'b0), + .g_ztest(1'b1), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+Z_TOP))) begin $error("[zint] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) begin sb_z[o]<=zq; sb_col[o]<=flush_color32_w; sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_zsched%0d.mem", k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + endtask + + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zsched%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + for (int k=0;k>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + if (errors==0) $display("[tb_top_psmct32_sh3_zint] PASS"); else $display("[tb_top_psmct32_sh3_zint] FAIL"); + $finish; + end + initial begin #200000000; $error("[tb_top_psmct32_sh3_zint] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint640.sv b/sim/tb/top/tb_top_psmct32_sh3_zint640.sv new file mode 100644 index 0000000..1ff3bd4 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint640.sv @@ -0,0 +1,423 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint640 (Ch358 — REAL-RASTER persistent-Z board integration sim at NATIVE 640x480) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zs640 NATIVE-640x480 strong-reject scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint640; +`include "sh3_zs640_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(1024), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(1'b0), + .g_ztest(1'b1), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+Z_TOP))) begin $error("[zint] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) begin sb_z[o]<=zq; sb_col[o]<=flush_color32_w; sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_zs640%0d.mem", k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + endtask + + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + for (int k=0;k>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint640] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + if (errors==0) $display("[tb_top_psmct32_sh3_zint640] PASS"); else $display("[tb_top_psmct32_sh3_zint640] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_zint640] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint640 diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint640_shared.sv b/sim/tb/top/tb_top_psmct32_sh3_zint640_shared.sv new file mode 100644 index 0000000..de83c35 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint640_shared.sv @@ -0,0 +1,673 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint640_shared (Ch360 — four-epoch real-raster persistent-Z integration) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zs640c12 NATIVE-640x480 strong-reject scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`ifndef SH3_SHARED_PARAMS +`error "Define SH3_SHARED_PARAMS as a quoted generated params header" +`endif +`ifndef SH3_SHARED_TAG +`error "Define SH3_SHARED_TAG as a quoted fixture tag" +`endif +`ifndef SH3_SHARED_EPOCH_TABLE +`error "Define SH3_SHARED_EPOCH_TABLE as a quoted generated descriptor table" +`endif +`ifndef SH3_SHARED_RECIP_BITS +`define SH3_SHARED_RECIP_BITS 11 +`endif +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint640_shared; +`ifdef SH3_FAST_GRAD + // Full-frame fidelity runs need the quotient, not cycle-accurate setup + // latency. The combinational simulation path is signed-/ bit-exact to + // gs_grad_divider and avoids 64 iterations for each of 20 attributes. + localparam bit TB_GRAD_SEQ = 1'b0; + localparam int TB_GRAD_CYCLES = 1; +`elsif SH3_BOARD_GRAD + // Production Ch417 configuration: the same registered-numerator + // combinational divider used by the DE25 top, including its complete + // five-cycle settle contract. This mode is the pre-fit control-path gate; + // SH3_FAST_GRAD remains useful for quicker framebuffer iterations. + localparam bit TB_GRAD_SEQ = 1'b0; + localparam int TB_GRAD_CYCLES = 5; +`else + localparam bit TB_GRAD_SEQ = 1'b1; + localparam int TB_GRAD_CYCLES = 4; +`endif + integer debug_tfx_samples = 0; + always @(posedge clk) begin + if ($test$plusargs("DEBUG_TFX") && dut.u_gs.comb_state_r == 3'd2 && debug_tfx_samples < 8) begin + $display("[zint][tfx] tex0=%016x tfx=%0d mod=%0d tex=%08x interp=%08x cs_prev=%08x", + dut.u_gs.tex0_1_q, dut.u_gs.comb_tfx, dut.u_gs.comb_modulate, + dut.u_gs.s1_tex_color, dut.u_gs.comb_interp_color, dut.u_gs.comb_cs_r); + debug_tfx_samples = debug_tfx_samples + 1; + end + end +`include `SH3_SHARED_PARAMS + localparam string FIXTURE_TAG = `SH3_SHARED_TAG; + localparam int MAX_EPOCHS = 1024; + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + // Ch360 — four epochs share one texture: EPk_REUSE=1 means the epoch runs on the resident cache without a fill. + logic [31:0] EP_CRC [0:MAX_EPOCHS-1]; int EP_REC [0:MAX_EPOCHS-1]; bit EP_REUSE [0:MAX_EPOCHS-1]; int fills; + initial begin +`include `SH3_SHARED_EPOCH_TABLE + fills=0; + end + +`ifdef SH3_SHARED_REQ_DEPTH + localparam int TB_REQ_DEPTH = `SH3_SHARED_REQ_DEPTH; +`else + localparam int TB_REQ_DEPTH = 1024; // Ch359 production depth (Codex: cold-Z burst peaks at 478) +`endif + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [3:0] flush_be_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + // Optional HPS-resident palette path. Normal shared-fixture runs hold it idle; + // the runtime-CLUT target drives a complete palette before each epoch. + logic runtime_clut_wr_en, runtime_clut_busy; + logic [7:0] runtime_clut_wr_idx; + logic [31:0] runtime_clut_wr_data; + logic [31:0] runtime_pal [0:255]; + logic flush_abe_w; + logic [16:0] flush_alpha_w; + logic flush_ztest_w, flush_zmsk_w; logic [1:0] flush_ztst_w; + integer frag_fh; + integer frag_epoch; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(`SH3_SHARED_RECIP_BITS), +`ifdef SH3_SUBPIXEL_XY + .SUBPIXEL_XY(1'b1), +`endif +`ifdef SH3_SHARED_NO_BILINEAR + .BILINEAR_ENABLE(1'b0), .PALETTE_BILINEAR(1'b0), +`else + .BILINEAR_ENABLE(1'b1), .PALETTE_BILINEAR(1'b1), +`endif + .GRAD_SEQ_DIVIDER(TB_GRAD_SEQ), .GRAD_DIV_CYCLES(TB_GRAD_CYCLES), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .RAM_SIZE_BYTES(32 * 1024), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_be_o(flush_be_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .flush_abe_o(flush_abe_w), .flush_alpha_o(flush_alpha_w), + .flush_ztest_o(flush_ztest_w), .flush_ztst_o(flush_ztst_w), .flush_zmsk_o(flush_zmsk_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits), + .runtime_clut_wr_en_i(runtime_clut_wr_en), .runtime_clut_wr_idx_i(runtime_clut_wr_idx), + .runtime_clut_wr_data_i(runtime_clut_wr_data), .runtime_clut_busy_i(runtime_clut_busy) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire [16:0] g_alpha = flush_alpha_w; + wire [3:0] g_be = flush_be_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + logic [31:0] d_araddr; logic [7:0] d_arlen; logic [2:0] d_arsize; logic [1:0] d_arburst; logic d_arvalid, d_arready; + logic [255:0] d_rdata; logic [1:0] d_rresp; logic d_rlast, d_rvalid, d_rready; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(TB_REQ_DEPTH), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(flush_zmsk_w), + .g_ztest(flush_ztest_w), .g_ztst(flush_ztst_w), .g_color(g_color), .g_alpha(g_alpha), .g_be(g_be), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .d_araddr(d_araddr), .d_arlen(d_arlen), .d_arsize(d_arsize), .d_arburst(d_arburst), .d_arvalid(d_arvalid), .d_arready(d_arready), + .d_rdata(d_rdata), .d_rresp(d_rresp), .d_rlast(d_rlast), .d_rvalid(d_rvalid), .d_rready(d_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // Ch359 DIAGNOSTIC — request-FIFO occupancy high-water (write-domain binary pointers, hierarchical): + // sizes the burst that overflows REQ_DEPTH=256 (would a deeper FIFO absorb it, or is the ep0 dirty-miss + // streak service-rate-bound?). Sampled on the write clock; wbin-rbin_sampled is a safe over-estimate. + // (Codex correction: occupancy must be computed ENTIRELY in the write clock domain — wbin vs the + // write-domain-SYNCHRONIZED read pointer rgray_s2 converted gray->binary — with the modulus derived from the + // selected depth, not a hard-coded 2*256.) + int req_hiwater; logic hw_clear; + function automatic int g2b(input int g); + int b; b=g; b^=b>>1; b^=b>>2; b^=b>>4; b^=b>>8; b^=b>>16; return b; + endfunction + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) req_hiwater <= 0; + else if (hw_clear) req_hiwater <= 0; + else begin + int occ; + occ = (int'(u_zc.u_req.wbin) - g2b(int'(u_zc.u_req.rgray_s2))) % (2*TB_REQ_DEPTH); + if (occ < 0) occ += 2*TB_REQ_DEPTH; + if (occ > req_hiwater) req_hiwater <= occ; + end + end + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .s4_araddr(d_araddr[29:0]), .s4_arburst(d_arburst), .s4_arid(7'd4), .s4_arlen(d_arlen), .s4_arsize(d_arsize), + .s4_arvalid(d_arvalid), .s4_arready(d_arready), .s4_rdata(d_rdata), .s4_rresp(d_rresp), .s4_rlast(d_rlast), + .s4_rvalid(d_rvalid), .s4_rready(d_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && !((m_araddr=30'(ZBASE) && m_araddr<30'(ZBASE+Z_TOP)))) begin $error("[zint] merged AR %h not in color/Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + function automatic [7:0] sel_rgb(input [7:0] cs,input [7:0] cd,input [1:0] sel); + sel_rgb=(sel==0)?cs:(sel==1)?cd:8'd0; + endfunction + function automatic [7:0] blend_rgb(input [7:0] cs,input [7:0] cd,input [1:0] aa,input [1:0] bb,input [1:0] cc,input [1:0] dd,input [7:0] as,input [7:0] ad,input [7:0] fix); + integer coef, val, op_a, op_b, op_d; + begin + coef=(cc==0)?((as>128)?128:as):(cc==1)?ad:fix; + op_a=sel_rgb(cs,cd,aa); op_b=sel_rgb(cs,cd,bb); op_d=sel_rgb(cs,cd,dd); + val=(((op_a-op_b)*coef) >>> 7)+op_d; + blend_rgb=(val<0)?0:(val>255)?255:val; + end + endfunction + function automatic [31:0] expected_color(input [31:0] cs,input [31:0] cd,input [16:0] alpha,input [3:0] be); + logic [31:0] blended; + begin + if (!alpha[16]) blended=cs; + else blended={cs[31:24], + blend_rgb(cs[23:16],cd[23:16],alpha[15:14],alpha[13:12],alpha[11:10],alpha[9:8],cs[31:24],cd[31:24],alpha[7:0]), + blend_rgb(cs[15:8], cd[15:8], alpha[15:14],alpha[13:12],alpha[11:10],alpha[9:8],cs[31:24],cd[31:24],alpha[7:0]), + blend_rgb(cs[7:0], cd[7:0], alpha[15:14],alpha[13:12],alpha[11:10],alpha[9:8],cs[31:24],cd[31:24],alpha[7:0])}; + for (int i=0;i<4;i++) + expected_color[i*8 +: 8]=be[i]?blended[i*8 +: 8]:cd[i*8 +: 8]; + end + endfunction + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; +`ifdef SH3_SHARED_TRACE + if (frag_fh != 0) + $fwrite(frag_fh, "%0d %0d %0d %0d %08x\n", frag_epoch, g_x, g_y, flush_z_w, flush_color32_w); +`endif + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) + || ((flush_ztst_w==2'd3) && zq > sb_z[o])) begin + if (!flush_zmsk_w) sb_z[o]<=zq; + sb_col[o]<=expected_color(flush_color32_w,sb_col[o],flush_alpha_w,flush_be_w); + sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; + end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_%s%0d.mem", FIXTURE_TAG, k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + $fflush(); + endtask + + int cold_start_epoch, cold_asset_epoch, resident_asset_epoch; + task automatic run_epoch(input int k); + int asset_k; + string fn; + if (k == cold_start_epoch) asset_k = cold_asset_epoch; + else if (!EP_REUSE[k]) asset_k = k; + else asset_k = resident_asset_epoch; + fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_%s%0d_tex_lpddr.mem", FIXTURE_TAG, asset_k); + if ((k == cold_start_epoch) || !EP_REUSE[k]) begin + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + resident_asset_epoch = asset_k; + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[zint]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[zint]", k, fill_crc_w); + end +`ifdef SH3_SHARED_RUNTIME_CLUT + load_runtime_palette(asset_k); +`endif + stream_list(k); + frag_epoch = k; + run_scene(k, EP_REC[k]); + endtask + + initial begin + int first_epoch, last_epoch, run_epochs, expected_fed; + bit check_expected_fed; + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; hw_clear=1'b0; + runtime_clut_wr_en=0; runtime_clut_wr_idx='0; runtime_clut_wr_data='0; runtime_clut_busy=0; frag_epoch=0; frag_fh=0; + if (!$value$plusargs("START_EPOCH=%d", first_epoch)) first_epoch=0; + if (first_epoch < 0 || first_epoch >= NEP) begin + $error("[zint] START_EPOCH=%0d outside 0..%0d", first_epoch, NEP-1); $finish; + end + if (!$value$plusargs("END_EPOCH=%d", last_epoch)) last_epoch=NEP-1; + if (last_epoch < first_epoch || last_epoch >= NEP) begin + $error("[zint] END_EPOCH=%0d outside START_EPOCH=%0d..%0d", last_epoch, first_epoch, NEP-1); $finish; + end + run_epochs = last_epoch-first_epoch+1; + check_expected_fed = $value$plusargs("EXPECT_FED=%d", expected_fed); + cold_start_epoch = first_epoch; + if (!$value$plusargs("COLD_ASSET_EPOCH=%d", cold_asset_epoch)) cold_asset_epoch=first_epoch; + if (cold_asset_epoch < 0 || cold_asset_epoch > first_epoch) begin + $error("[zint] COLD_ASSET_EPOCH=%0d outside 0..START_EPOCH=%0d", cold_asset_epoch, first_epoch); $finish; + end + resident_asset_epoch = cold_asset_epoch; +`ifdef SH3_SHARED_TRACE + frag_fh=$fopen($sformatf("%s_frags.txt", FIXTURE_TAG), "w"); + if (frag_fh==0) begin $error("[zint] could not open %s fragment trace", FIXTURE_TAG); $finish; end +`endif + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + // Ch405 focused read-only-Z proof. After the real clear engine has + // completed, optionally seed alternating pixels with max depth in both + // the shared LPDDR model and independent scoreboard. Authentic fan + // fragments (ZMSK=1) must reject on max lanes, blend on zero lanes, + // and leave every stored Z lane unchanged. + if ($test$plusargs("CHECKER_Z")) begin + for (int o=0;o>5; zl=o&15; + shmem[zb][zl*16+:16] = seed; + end + $display("[zint] CHECKER_Z seeded alternating 0000/ffff after clear"); + end + + for (int k=first_epoch;k<=last_epoch;k++) begin + int fed0, dr0; + fed0=frags_fed; dr0=g_drops; + run_epoch(k); + $display("[zint][sweep] depth=%0d epoch %0d: accepted=%0d drops=%0d req_hiwater=%0d", + TB_REQ_DEPTH, k, frags_fed-fed0, g_drops-dr0, req_hiwater); + $fflush(); + @(negedge clk); hw_clear<=1'b1; @(negedge clk); hw_clear<=1'b0; // per-epoch high-water + end + + if (pre_clear_frags!==0) begin $error("[zint] %0d psm0 fragment(s) before clear_done", pre_clear_frags); errors++; end + if (fd_rises>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + if (zmis != 0 || cmis != 0) errors += zmis + cmis; + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint640_shared] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] req-FIFO depth=%0d (diagnostic sweep variant when != 1024)", TB_REQ_DEPTH); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + if (errors==0) $display("[tb_top_psmct32_sh3_zint640_shared] PASS"); else $display("[tb_top_psmct32_sh3_zint640_shared] FAIL"); + if (frag_fh != 0) $fclose(frag_fh); + $finish; + end + initial begin #800000000; $error("[tb_top_psmct32_sh3_zint640_shared] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint640_shared diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint640c12.sv b/sim/tb/top/tb_top_psmct32_sh3_zint640c12.sv new file mode 100644 index 0000000..d928767 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint640c12.sv @@ -0,0 +1,469 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint640c12 (Ch360 — four-epoch real-raster persistent-Z integration) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zs640c12 NATIVE-640x480 strong-reject scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint640c12; +`include "sh3_zs640c12_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=4, EPk_CRC/EPk_NTRIS, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + // Ch360 — four epochs share one texture: EPk_REUSE=1 means the epoch runs on the resident cache without a fill. + logic [31:0] EP_CRC [0:3]; int EP_REC [0:3]; bit EP_REUSE [0:3]; int fills; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; EP_CRC[3]=EP3_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; EP_REC[3]=EP3_NTRIS; + EP_REUSE[0]=EP0_REUSE; EP_REUSE[1]=EP1_REUSE; EP_REUSE[2]=EP2_REUSE; EP_REUSE[3]=EP3_REUSE; + fills=0; + end + +`ifdef C12_REQ_DEPTH + localparam int TB_REQ_DEPTH = `C12_REQ_DEPTH; // Ch359 sim-only depth-sweep variant (Codex-authorized) +`else + localparam int TB_REQ_DEPTH = 1024; // Ch359 production depth (Codex: cold-Z burst peaks at 478) +`endif + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(TB_REQ_DEPTH), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(1'b0), + .g_ztest(1'b1), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // Ch359 DIAGNOSTIC — request-FIFO occupancy high-water (write-domain binary pointers, hierarchical): + // sizes the burst that overflows REQ_DEPTH=256 (would a deeper FIFO absorb it, or is the ep0 dirty-miss + // streak service-rate-bound?). Sampled on the write clock; wbin-rbin_sampled is a safe over-estimate. + // (Codex correction: occupancy must be computed ENTIRELY in the write clock domain — wbin vs the + // write-domain-SYNCHRONIZED read pointer rgray_s2 converted gray->binary — with the modulus derived from the + // selected depth, not a hard-coded 2*256.) + int req_hiwater; logic hw_clear; + function automatic int g2b(input int g); + int b; b=g; b^=b>>1; b^=b>>2; b^=b>>4; b^=b>>8; b^=b>>16; return b; + endfunction + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) req_hiwater <= 0; + else if (hw_clear) req_hiwater <= 0; + else begin + int occ; + occ = (int'(u_zc.u_req.wbin) - g2b(int'(u_zc.u_req.rgray_s2))) % (2*TB_REQ_DEPTH); + if (occ < 0) occ += 2*TB_REQ_DEPTH; + if (occ > req_hiwater) req_hiwater <= occ; + end + end + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+Z_TOP))) begin $error("[zint] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) begin sb_z[o]<=zq; sb_col[o]<=flush_color32_w; sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_zs640c12%0d.mem", k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + endtask + + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640c12%0d_tex_lpddr.mem", k); + if (!EP_REUSE[k]) begin + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[zint]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[zint]", k, fill_crc_w); + end + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; hw_clear=1'b0; + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + for (int k=0;k>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint640c12] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] req-FIFO depth=%0d (diagnostic sweep variant when != 1024)", TB_REQ_DEPTH); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + if (errors==0) $display("[tb_top_psmct32_sh3_zint640c12] PASS"); else $display("[tb_top_psmct32_sh3_zint640c12] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_zint640c12] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint640c12 diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint640c6.sv b/sim/tb/top/tb_top_psmct32_sh3_zint640c6.sv new file mode 100644 index 0000000..343132b --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint640c6.sv @@ -0,0 +1,469 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint640c6 (Ch358 — REAL-RASTER persistent-Z board integration sim at NATIVE 640x480) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zs640c6 NATIVE-640x480 strong-reject scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint640c6; +`include "sh3_zs640c6_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + // Ch359 — TWO epochs sharing ONE texture: EPk_REUSE=1 means the epoch runs on the RESIDENT cache (no fill). + logic [31:0] EP_CRC [0:1]; int EP_REC [0:1]; bit EP_REUSE [0:1]; int fills; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; + EP_REUSE[0]=EP0_REUSE; EP_REUSE[1]=EP1_REUSE; + fills=0; + end + +`ifdef C6_REQ_DEPTH + localparam int TB_REQ_DEPTH = `C6_REQ_DEPTH; // Ch359 sim-only depth-sweep variant (Codex-authorized) +`else + localparam int TB_REQ_DEPTH = 1024; // Ch359 production depth (Codex: cold-Z burst peaks at 478) +`endif + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(TB_REQ_DEPTH), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(1'b0), + .g_ztest(1'b1), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // Ch359 DIAGNOSTIC — request-FIFO occupancy high-water (write-domain binary pointers, hierarchical): + // sizes the burst that overflows REQ_DEPTH=256 (would a deeper FIFO absorb it, or is the ep0 dirty-miss + // streak service-rate-bound?). Sampled on the write clock; wbin-rbin_sampled is a safe over-estimate. + // (Codex correction: occupancy must be computed ENTIRELY in the write clock domain — wbin vs the + // write-domain-SYNCHRONIZED read pointer rgray_s2 converted gray->binary — with the modulus derived from the + // selected depth, not a hard-coded 2*256.) + int req_hiwater; logic hw_clear; + function automatic int g2b(input int g); + int b; b=g; b^=b>>1; b^=b>>2; b^=b>>4; b^=b>>8; b^=b>>16; return b; + endfunction + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) req_hiwater <= 0; + else if (hw_clear) req_hiwater <= 0; + else begin + int occ; + occ = (int'(u_zc.u_req.wbin) - g2b(int'(u_zc.u_req.rgray_s2))) % (2*TB_REQ_DEPTH); + if (occ < 0) occ += 2*TB_REQ_DEPTH; + if (occ > req_hiwater) req_hiwater <= occ; + end + end + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+Z_TOP))) begin $error("[zint] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) begin sb_z[o]<=zq; sb_col[o]<=flush_color32_w; sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_zs640c6%0d.mem", k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + endtask + + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640c6%0d_tex_lpddr.mem", k); + if (!EP_REUSE[k]) begin + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[zint]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[zint]", k, fill_crc_w); + end + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; hw_clear=1'b0; + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + for (int k=0;k>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint640c6] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] req-FIFO depth=%0d (diagnostic sweep variant when != 1024)", TB_REQ_DEPTH); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + if (errors==0) $display("[tb_top_psmct32_sh3_zint640c6] PASS"); else $display("[tb_top_psmct32_sh3_zint640c6] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_zint640c6] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint640c6 diff --git a/sim/tb/top/tb_top_psmct32_sh3_zint640rt3.sv b/sim/tb/top/tb_top_psmct32_sh3_zint640rt3.sv new file mode 100644 index 0000000..47d9085 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zint640rt3.sv @@ -0,0 +1,477 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zint640rt3 (runtime-CLUT persistent-Z board integration at NATIVE 640x480) +// +// Codex's pre-fit gate: prove the persistent-Z ROP through the SAME path the de25 top wires (GS_SH3_LPDDR_FB_Z): +// REAL demo (feeder + raster, authz sh3_zsrt3 NATIVE-640x480 strong-reject scene) -> gs_lpddr_zc_emit -> REAL de25 arbiters +// (gs_lpddr_wr_arb s0=color / s2=Z-write ; gs_lpddr_rd_arb s3=Z-read) -> ONE shared behavioral LPDDR +// with randomized backpressure. Unlike tb_top_psmct32_sh3_zarb (which fed a handshake-throttled trace), +// the raster CANNOT honor g_ready, so this is the gate that catches request-FIFO fragment DROPS. +// +// Asserts (Codex list): +// * final LPDDR color + Z == independent clamp16 persistent-Z scoreboard over the ACTUAL emitted fragments; +// * zero fragment drops (g_valid && !g_ready) — the whole reason this sim exists; +// * exactly one ordered scene marker (sh3_fb_flush) per accepted GO; no fragment after a marker within a scene; +// * Z cache invalidated (clear_done) after preclear and before the first GO; Z persists across epochs; +// * a FRESH ordered frame_drained per epoch; scanout never referenced during render (rd_arb s0/s1/s2 idle); +// * merged AW only in color/Z ranges, merged AR only in Z range (disjoint-map monitor). +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zint640rt3; +`include "sh3_zsrt3_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int NPX = W*H; + localparam int NEP = N_EPOCHS; + localparam [31:0] COLBASE = 32'h0000_0000, ZBASE = 32'h0014_0000; + localparam int COL_TOP = NPX*4; // color region byte-size (disjoint below ZBASE) + localparam int Z_TOP = NPX*2; // Z region byte-size + localparam int MEMBEATS = 65536; // shared LPDDR: covers ZBASE + Z_TOP + + // per-epoch expected CRC / records + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // clamp16 (vendored PCSX2 PSMZ16S source-Z saturation) + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off), 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + // Mirrors the core-side output of the runtime-CLUT CDC: the bridge and + // CDC have focused gates; this integration gate proves the rendered scene. + logic runtime_clut_wr_en, runtime_clut_busy; + logic [7:0] runtime_clut_wr_idx; + logic [31:0] runtime_clut_wr_data; + logic [31:0] runtime_pal [0:255]; + integer frag_fh; + integer frag_epoch; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits), + .runtime_clut_wr_en_i(runtime_clut_wr_en), .runtime_clut_wr_idx_i(runtime_clut_wr_idx), + .runtime_clut_wr_data_i(runtime_clut_wr_data), .runtime_clut_busy_i(runtime_clut_busy) + ); + + // texture cache + behavioral texture LPDDR (reloaded per epoch) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // ===== render epoch: one ordered scene marker (sh3_fb_flush) per accepted GO ===== + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + + // ===== gs_lpddr_zc_emit — Z-then-color emit, fed by the REAL raster (NO handshake) ===== + logic zc_enable, clear_start, clear_done, frame_drained; + wire [15:0] g_zq = cl16(flush_z_w); + wire frag_v = flush_emit_w && (flush_psm_w==6'h00); + wire g_valid = frag_v || fb_flush; + wire g_scene = fb_flush; + wire [11:0] g_x = flush_x_w, g_y = flush_y_w; + wire [31:0] g_color = flush_color32_w; + wire g_ready; + // Z AXI + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + // Color AXI + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic zc_idle; + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(W), .FB_H(H), .REQ_DEPTH(1024), .COL_DEPTH(128)) u_zc ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(zc_enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(1'b0), + .g_ztest(1'b1), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(emif_clk), .axi_rst_n(rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(zc_idle) + ); + + // fragment-drop guard (design clk): the request FIFO silently drops when g_ready is low + int g_drops; int frags_fed; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin g_drops<=0; frags_fed<=0; end + else begin + if (frag_v && !g_ready) g_drops<=g_drops+1; + if (frag_v && g_ready) frags_fed<=frags_fed+1; + end + end + // clear ordering: clear_done must rise before the first GO. no psm0 fragment before clear_done. + logic saw_clear_done=0, first_go_done=0; int pre_clear_frags; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin saw_clear_done<=0; pre_clear_frags<=0; end + else begin + if (clear_done) saw_clear_done<=1; + if (frag_v && !saw_clear_done) pre_clear_frags<=pre_clear_frags+1; + end + end + + // ===== REAL de25 write arbiter: s0=color, s2=Z-write ; s1/s3 inert ===== + logic [29:0] m_awaddr; logic [1:0] m_awburst; logic [6:0] m_awid; logic [7:0] m_awlen; logic [2:0] m_awsize; + logic m_awvalid, m_awready; logic [255:0] m_wdata; logic [31:0] m_wstrb; logic m_wlast, m_wvalid, m_wready; + logic m_bvalid, m_bready; logic [1:0] m_bresp; + gs_lpddr_wr_arb u_wr_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_awaddr(c_awaddr[29:0]), .s0_awburst(c_awburst), .s0_awid(7'd0), .s0_awlen(c_awlen), .s0_awsize(c_awsize), + .s0_awvalid(c_awvalid), .s0_awready(c_awready), .s0_wdata(c_wdata), .s0_wstrb(c_wstrb), .s0_wlast(c_wlast), + .s0_wvalid(c_wvalid), .s0_wready(c_wready), .s0_bresp(c_bresp), .s0_bvalid(c_bvalid), .s0_bready(c_bready), + .s1_awaddr(30'd0), .s1_awburst(2'b01), .s1_awid(7'd1), .s1_awlen(8'd0), .s1_awsize(3'b101), + .s1_awvalid(1'b0), .s1_awready(), .s1_wdata(256'd0), .s1_wstrb(32'd0), .s1_wlast(1'b0), + .s1_wvalid(1'b0), .s1_wready(), .s1_bresp(), .s1_bvalid(), .s1_bready(1'b0), + .s2_awaddr(z_awaddr[29:0]), .s2_awburst(z_awburst), .s2_awid(7'd2), .s2_awlen(z_awlen), .s2_awsize(z_awsize), + .s2_awvalid(z_awvalid), .s2_awready(z_awready), .s2_wdata(z_wdata), .s2_wstrb(z_wstrb), .s2_wlast(z_wlast), + .s2_wvalid(z_wvalid), .s2_wready(z_wready), .s2_bresp(z_bresp), .s2_bvalid(z_bvalid), .s2_bready(z_bready), + .s3_awaddr(30'd0), .s3_awburst(2'b01), .s3_awid(7'd3), .s3_awlen(8'd0), .s3_awsize(3'b101), + .s3_awvalid(1'b0), .s3_awready(), .s3_wdata(256'd0), .s3_wstrb(32'd0), .s3_wlast(1'b0), + .s3_wvalid(1'b0), .s3_wready(), .s3_bresp(), .s3_bvalid(), .s3_bready(1'b0), + .m_awaddr(m_awaddr), .m_awburst(m_awburst), .m_awid(m_awid), .m_awlen(m_awlen), .m_awsize(m_awsize), + .m_awvalid(m_awvalid), .m_awready(m_awready), .m_wdata(m_wdata), .m_wstrb(m_wstrb), .m_wlast(m_wlast), + .m_wvalid(m_wvalid), .m_wready(m_wready), .m_bvalid(m_bvalid), .m_bready(m_bready), .m_bresp(m_bresp) + ); + + // ===== REAL de25 read arbiter: s3=Z-read (mirrors de25 reload port) ; s0/s1/s2 idle during render ===== + logic [29:0] m_araddr; logic [1:0] m_arburst; logic [6:0] m_arid; logic [7:0] m_arlen; logic [2:0] m_arsize; + logic m_arvalid, m_arready; logic [255:0] m_rdata; logic [1:0] m_rresp; logic m_rlast, m_rvalid, m_rready; + gs_lpddr_rd_arb u_rd_arb ( + .clk(emif_clk), .rst_n(rst_n), + .s0_araddr(30'd0), .s0_arburst(2'b01), .s0_arid(7'd0), .s0_arlen(8'd0), .s0_arsize(3'b101), + .s0_arvalid(1'b0), .s0_arready(), .s0_rdata(), .s0_rresp(), .s0_rlast(), .s0_rvalid(), .s0_rready(1'b0), + .s1_araddr(30'd0), .s1_arburst(2'b01), .s1_arid(7'd1), .s1_arlen(8'd0), .s1_arsize(3'b101), + .s1_arvalid(1'b0), .s1_arready(), .s1_rdata(), .s1_rresp(), .s1_rlast(), .s1_rvalid(), .s1_rready(1'b0), + .s2_araddr(30'd0), .s2_arburst(2'b01), .s2_arid(7'd2), .s2_arlen(8'd0), .s2_arsize(3'b101), + .s2_arvalid(1'b0), .s2_arready(), .s2_rdata(), .s2_rresp(), .s2_rlast(), .s2_rvalid(), .s2_rready(1'b0), + .s3_araddr(z_araddr[29:0]), .s3_arburst(z_arburst), .s3_arid(7'd3), .s3_arlen(z_arlen), .s3_arsize(z_arsize), + .s3_arvalid(z_arvalid), .s3_arready(z_arready), .s3_rdata(z_rdata), .s3_rresp(z_rresp), .s3_rlast(z_rlast), + .s3_rvalid(z_rvalid), .s3_rready(z_rready), + .m_araddr(m_araddr), .m_arburst(m_arburst), .m_arid(m_arid), .m_arlen(m_arlen), .m_arsize(m_arsize), + .m_arvalid(m_arvalid), .m_arready(m_arready), .m_rdata(m_rdata), .m_rresp(m_rresp), .m_rlast(m_rlast), + .m_rvalid(m_rvalid), .m_rready(m_rready) + ); + + logic [15:0] lf=16'hF00D; always_ff @(posedge emif_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ===== ONE shared behavioral LPDDR (write + read), address-decoded, random backpressure ===== + logic [255:0] shmem [0:MEMBEATS-1]; + logic [29:0] wa; logic [255:0] wd; logic [31:0] ws; logic aw_s, w_s; logic [3:0] bd; logic bp; + logic [29:0] ra; logic rp; logic [3:0] rd_dly; + always_ff @(posedge emif_clk or negedge rst_n) begin + if(!rst_n) begin + m_awready<=0; m_wready<=0; m_bvalid<=0; m_bresp<=0; aw_s<=0; w_s<=0; bp<=0; bd<=0; + m_arready<=0; m_rvalid<=0; m_rlast<=0; m_rresp<=0; m_rdata<=0; rp<=0; rd_dly<=0; + end else begin + m_awready<=(!aw_s)?lf[0]:1'b0; m_wready<=(!w_s)?lf[1]:1'b0; + if(m_awvalid&&m_awready) begin wa<=m_awaddr; aw_s<=1; m_awready<=0; end + if(m_wvalid&&m_wready) begin wd<=m_wdata; ws<=m_wstrb; w_s<=1; m_wready<=0; end + if(aw_s&&w_s&&!bp&&!m_bvalid) begin + for(int bb=0;bb<32;bb++) if(ws[bb]) shmem[wa>>5][bb*8+:8]<=wd[bb*8+:8]; + bp<=1; bd<={1'b0,lf[4:2]}; + end + if(bp&&!m_bvalid) begin if(bd==0) begin m_bvalid<=1;m_bresp<=0;bp<=0;aw_s<=0;w_s<=0; end else bd<=bd-1; end + if(m_bvalid&&m_bready) m_bvalid<=0; + m_arready<=(!rp&&!m_rvalid)?lf[8]:1'b0; + if(m_arvalid&&m_arready) begin ra<=m_araddr; rp<=1; rd_dly<={1'b0,lf[7:5]}; m_arready<=0; end + if(rp&&!m_rvalid) begin if(rd_dly==0) begin m_rdata<=shmem[ra>>5]; m_rresp<=0; m_rvalid<=1; m_rlast<=1; rp<=0; end else rd_dly<=rd_dly-1; end + if(m_rvalid&&m_rready) begin m_rvalid<=0; m_rlast<=0; end + end + end + // disjoint-map monitors on the MERGED master streams + always_ff @(posedge emif_clk) if(rst_n) begin + if(m_awvalid) begin + if(!((m_awaddr<30'(COLBASE+COL_TOP)) || (m_awaddr>=30'(ZBASE) && m_awaddr<30'(ZBASE+Z_TOP)))) + begin $error("[zint] merged AW %h not in color/Z range",m_awaddr); errors++; end + end + if(m_arvalid && (m_araddr<30'(ZBASE) || m_araddr>=30'(ZBASE+Z_TOP))) begin $error("[zint] merged AR %h not in Z range",m_araddr); errors++; end + end + + // ===== clamp16 persistent-Z SCOREBOARD over the ACTUAL emitted fragments (design clk) ===== + // Mirrors gs_lpddr_z_rmw: GEQUAL vs stored, Z_CLEAR=0. Persists across epochs. Gated active after clear_done. + logic [15:0] sb_z [0:NPX-1]; + logic [31:0] sb_col[0:NPX-1]; + logic sb_wr [0:NPX-1]; + integer sb_frag, sb_pass; + // no-fragment-after-marker: a fragment must not appear in the same scene after fb_flush (before next GO) + logic scene_ended=0; int frag_after_marker; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin + sb_frag<=0; sb_pass<=0; scene_ended<=0; frag_after_marker<=0; + end else begin + if (feeder_go_tb && feeder_ready_tb) scene_ended<=0; // new scene opens + if (fb_flush) scene_ended<=1; // ordered marker closes the scene + if (frag_v && saw_clear_done) begin + int o; logic [15:0] zq; + if (frag_fh != 0) + $fwrite(frag_fh, "%0d %0d %0d %0d %08x\n", frag_epoch, g_x, g_y, flush_z_w, flush_color32_w); + if (scene_ended) frag_after_marker<=frag_after_marker+1; // fragment after this scene's marker = ordering bug + o = g_y*W + g_x; zq = cl16(flush_z_w); + sb_frag<=sb_frag+1; + if (o>=0 && o= sb_z[o]) begin sb_z[o]<=zq; sb_col[o]<=flush_color32_w; sb_wr[o]<=1'b1; sb_pass<=sb_pass+1; end + end + end + end + end + + // FRESH-DRAIN observer (emif domain) + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=frame_drained; + if (frame_drained && !fd_q) fd_rises<=fd_rises+1; + if (!frame_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // clear_start: mirror de25 — pulse once at the writer ARM (after preclear, before first GO) + logic wr_arm=0, arm_e1, arm_e2, arm_e3; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin arm_e1<=0; arm_e2<=0; arm_e3<=0; clear_start<=0; end + else begin arm_e1<=wr_arm; arm_e2<=arm_e1; arm_e3<=arm_e2; clear_start<=(arm_e2 && !arm_e3); end + end + + // ---- feeder staging stream (write port), per epoch ---- + logic [63:0] stg_buf [0:STG_WORDS-1]; + task automatic stream_list(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/feeder_sh3_zsrt3%0d.mem", k); + for (int i=0;i%0d, r %0d->%0d) records=%0d drops=%0d fed=%0d pass=%0d", + k, f0, fd_falls, r0, fd_rises, feeder_records_w, g_drops, frags_fed, sb_pass); + endtask + + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zsrt3%0d_tex_lpddr.mem", k); + $display("[zint-rt3] epoch %0d: begin", k); $fflush(); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + load_runtime_palette(k); + stream_list(k); + frag_epoch = k; + run_scene(k, EP_REC[k]); + $display("[zint-rt3] epoch %0d: done", k); $fflush(); + endtask + + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; zc_enable=1'b1; stg_we=0; stg_waddr=0; stg_wdata=0; + runtime_clut_wr_en=0; runtime_clut_wr_idx='0; runtime_clut_wr_data='0; runtime_clut_busy=0; frag_epoch=0; + frag_fh=$fopen("zsrt3_frags.txt", "w"); + if (frag_fh==0) begin $error("[zint] could not open zsrt3_frags.txt"); $finish; end + for (int i=0;i clear_start) AFTER preclear, BEFORE first GO. z_rmw's clear_start writes Z_CLEAR to EVERY Z beat + // (NBEATS=NPX/16, through wr_arb s2 under random backpressure) then asserts clear_done -> it is the authoritative + // Z preclear. Wait for it (the board host likewise gates the first GO on the clear_done status bit). + wr_arm<=1'b1; + begin int d=0; while (!clear_done && d<600000) begin @(posedge emif_clk); d++; end end + if (!clear_done) begin $error("[zint] clear_done never rose after ARM (Z preclear did not finish)"); errors++; end + else $display("[zint] Z preclear complete (clear_done), z_beats_written(clear)=%0d", z_beats_written); + repeat(40) @(posedge clk); + + for (int k=0;k>5; zl=o&15; zs=shmem[zb][zl*16+:16]; + zchk++; + if (zs !== sb_z[o]) begin if (zmis<10) $error("[zint] Z px%0d got %04x exp %04x", o, zs, sb_z[o]); zmis++; end + if (sb_wr[o]) begin + cs=shmem[o>>3][(o[2:0])*32+:32]; cchk++; + if (cs[23:0] !== sb_col[o][23:0]) begin if (cmis<10) $error("[zint] COL px%0d got %06x exp %06x", o, cs[23:0], sb_col[o][23:0]); cmis++; end + end + end + $display("[zint] final compare: Z %0d/%0d mismatch, COLOR %0d/%0d mismatch (written px=%0d)", zmis, zchk, cmis, cchk, cchk); + end + + begin + string fdump; + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; + fh = $fopen(fdump, "w"); + if (fh == 0) begin + $error("[zint] could not open FBDUMP '%s'", fdump); + errors++; + end else begin + for (int o=0;o>3][(o[2:0])*32+:32]; + $fdisplay(fh, "%08x", cs); + end + $fclose(fh); + $display("[zint] dumped final COLOR FB (%0dx%0d) -> %s", W, H, fdump); + end + end + end + + $display("[tb_top_psmct32_sh3_zint640rt3] fed=%0d pass=%0d drops=%0d markers=%0d drains(r/f)=%0d/%0d col_ovf=%0d bresp_err=%0d errors=%0d", + frags_fed, sb_pass, g_drops, eof_count, fd_rises, fd_falls, col_ovf, bresp_err, errors); + $display("[zint] map: COLOR 0x%0h..0x%0h Z 0x%0h..0x%0h", COLBASE, COLBASE+COL_TOP, ZBASE, ZBASE+Z_TOP); + $fclose(frag_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zint640rt3] PASS"); else $display("[tb_top_psmct32_sh3_zint640rt3] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_zint640rt3] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zint640rt3 diff --git a/sim/tb/top/tb_top_psmct32_sh3_zrop.sv b/sim/tb/top/tb_top_psmct32_sh3_zrop.sv new file mode 100644 index 0000000..8bc0409 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zrop.sv @@ -0,0 +1,184 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zrop (Ch357 — persistent-Z ROP acceptance gate, TRACE-based scoreboard) +// +// Codex option A: verify the LPDDR-Z ROP (gs_lpddr_zc_emit) against the raster's ACTUAL emitted fragments. This TB replays +// the captured fragment trace (tb_top_psmct32_sh3_zsched -> zsched_frags.txt: "epoch x y persp_z color" per line) through +// zc_emit across two clock domains, with a per-epoch scene marker, and scores it with an INDEPENDENT software scoreboard +// (clamp16 / GEQUAL / persistence). Proves Codex's Ch357 gates: +// * every replayed fragment enters the ROP EXACTLY once (we feed each once and wait g_ready — no drop, no double). +// * the scoreboard predicts every pass/reject and the final packed 16-bit Z; failed depth tests emit NO color. +// * final color + Z LPDDR memories match the scoreboard EXACTLY. +// * the ordered end-of-scene marker drain waits BOTH pipelines (color + Z BRESPs) before frame_drained. +// This is the ROP-correctness gate; the raster's Z-interp fidelity (float-oracle 3971 / 87.6% owner agreement) is a SEPARATE +// recorded limitation, not tested here. Primary fixture = sh3_zsched [8634,12757,145742], FB 256x210, Z base 0x140000. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zrop; + localparam int FB_PXW=256, FB_H=210; + localparam int NPX=FB_PXW*FB_H; // 53760 + localparam int ZBEATS=(NPX+15)/16; // 3360 + localparam int CBEATS=(NPX+7)/8; // 6720 + localparam [31:0] COLBASE=32'h0000_0000, ZBASE=32'h0014_0000; + localparam int ZBW=$clog2(ZBEATS), CBW=$clog2(CBEATS); + + logic gs_clk=0; always #5 gs_clk=~gs_clk; + logic axi_clk=0; always #2 axi_clk=~axi_clk; // emif faster than design -> ROP drains faster than the trace feeds + logic gs_rst_n, axi_rst_n; int errors; initial errors=0; + + logic enable, clear_start, clear_done, frame_drained; + logic g_valid, g_ready; logic [11:0] g_x, g_y; logic [15:0] g_zq; logic g_zmsk, g_ztest, g_scene; logic [31:0] g_color; + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic idle; + + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .REQ_DEPTH(32), .COL_DEPTH(64)) dut ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(g_zmsk), + .g_ztest(g_ztest), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(idle) + ); + + logic [15:0] lf=16'hCAFE; always_ff @(posedge axi_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ---- Z LPDDR slave (256b, random backpressure) ---- + logic [255:0] zmem [0:ZBEATS-1]; + logic [31:0] zra; logic zrp; logic [3:0] zrd; logic [31:0] zwa; logic [255:0] zwd; logic zaw,zw; logic [3:0] zbd; logic zbp; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin z_arready<=0;z_rvalid<=0;z_rlast<=0;z_rresp<=0;z_rdata<=0;zrp<=0;zrd<=0; + z_awready<=0;z_wready<=0;z_bvalid<=0;z_bresp<=0;zaw<=0;zw<=0;zbp<=0;zbd<=0; end + else begin + z_arready<=(!zrp&&!z_rvalid)?lf[0]:1'b0; + if(z_arvalid&&z_arready) begin zra<=z_araddr;zrp<=1;zrd<={1'b0,lf[3:1]};z_arready<=0; end + if(zrp&&!z_rvalid) begin if(zrd==0) begin z_rdata<=zmem[(zra-ZBASE)>>5];z_rresp<=0;z_rvalid<=1;z_rlast<=1;zrp<=0; end else zrd<=zrd-1; end + if(z_rvalid&&z_rready) begin z_rvalid<=0;z_rlast<=0; end + z_awready<=(!zaw)?lf[4]:1'b0; z_wready<=(!zw)?lf[5]:1'b0; + if(z_awvalid&&z_awready) begin zwa<=z_awaddr;zaw<=1;z_awready<=0; end + if(z_wvalid&&z_wready) begin zwd<=z_wdata;zw<=1;z_wready<=0; end + if(zaw&&zw&&!zbp&&!z_bvalid) begin zmem[(zwa-ZBASE)>>5]<=zwd;zbp<=1;zbd<={1'b0,lf[8:6]}; end + if(zbp&&!z_bvalid) begin if(zbd==0) begin z_bvalid<=1;z_bresp<=0;zbp<=0;zaw<=0;zw<=0; end else zbd<=zbd-1; end + if(z_bvalid&&z_bready) z_bvalid<=0; + end + end + // ---- Color LPDDR slave (256b, per-byte wstrb, random backpressure) ---- + logic [255:0] cmem [0:CBEATS-1]; + logic [31:0] cwa; logic [255:0] cwd; logic [31:0] cws; logic caw,cw; logic [3:0] cbd; logic cbp; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin c_awready<=0;c_wready<=0;c_bvalid<=0;c_bresp<=0;caw<=0;cw<=0;cbp<=0;cbd<=0; end + else begin + c_awready<=(!caw)?lf[9]:1'b0; c_wready<=(!cw)?lf[11]:1'b0; + if(c_awvalid&&c_awready) begin cwa<=c_awaddr;caw<=1;c_awready<=0; end + if(c_wvalid&&c_wready) begin cwd<=c_wdata;cws<=c_wstrb;cw<=1;c_wready<=0; end + if(caw&&cw&&!cbp&&!c_bvalid) begin + for(int b=0;b<32;b++) if(cws[b]) cmem[(cwa-COLBASE)>>5][b*8+:8]<=cwd[b*8+:8]; + cbp<=1;cbd<={1'b0,lf[14:12]}; + end + if(cbp&&!c_bvalid) begin if(cbd==0) begin c_bvalid<=1;c_bresp<=0;cbp<=0;caw<=0;cw<=0; end else cbd<=cbd-1; end + if(c_bvalid&&c_bready) c_bvalid<=0; + end + end + // disjoint-range monitors + always_ff @(posedge axi_clk) if(axi_rst_n) begin + if(z_arvalid && (z_araddr=ZBASE+ZBEATS*32)) begin $error("Z AR %h OOR",z_araddr);errors++; end + if(z_awvalid && (z_awaddr=ZBASE+ZBEATS*32)) begin $error("Z AW %h OOR",z_awaddr);errors++; end + if(c_awvalid && (c_awaddr=COLBASE+CBEATS*32)) begin $error("C AW %h OOR",c_awaddr);errors++; end + end + + // ---- independent scoreboard (clamp16 persistent-Z over the fed fragments) ---- + logic [15:0] sb_z [0:NPX-1]; logic [31:0] sb_col [0:NPX-1]; logic sb_seen [0:NPX-1]; + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ---- feed one fragment: drive g_*, wait acceptance (exactly once), update the scoreboard ---- + int nfed; + task automatic feed_frag(input int ep, input int x, input int y, input int z, input logic [31:0] col); + int o; logic [15:0] zq; logic pass; + @(negedge gs_clk); + g_valid<=1; g_scene<=0; g_x<=x[11:0]; g_y<=y[11:0]; g_zq<=cl16(z); g_zmsk<=0; g_ztest<=1; g_color<=col; + @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); // wait acceptance — NEVER drop a fragment + @(negedge gs_clk); g_valid<=0; + // scoreboard (in feed order == ROP processing order) + o=y*FB_PXW+x; zq=cl16(z); pass=(zq>=sb_z[o]); + if(pass) begin sb_col[o]=col; sb_seen[o]=1; sb_z[o]=zq; end + nfed++; + if(lf[7]) repeat(1+lf[1:0]) @(posedge gs_clk); // random inter-fragment gap + endtask + task automatic send_marker(); + @(negedge gs_clk); g_valid<=1; g_scene<=1; @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); + @(negedge gs_clk); g_valid<=0; g_scene<=0; + endtask + + int fh, r, ep, x, y, z, cep, drains; logic [31:0] col; logic [1023:0] line; + initial begin + errors=0; enable=0; clear_start=0; g_valid=0; g_scene=0; g_x=0; g_y=0; g_zq=0; g_zmsk=0; g_ztest=1; g_color=0; nfed=0; drains=0; + for(int i=0;i=FB_PXW || y<0 || y>=FB_H) begin + $error("[zrop] trace coord OOR ep=%0d x=%0d y=%0d z=%0d col=%08x", ep, x, y, z, col); + errors++; + end else begin + if(ep!=cep) begin // epoch boundary -> ordered scene drain + send_marker(); + begin int g=0; while(!frame_drained && g<800000) begin @(posedge axi_clk); g++; end end + if(!frame_drained) begin $error("[zrop] epoch %0d: frame_drained never rose",cep); errors++; end + else drains++; + cep=ep; + end + feed_frag(ep, x, y, z, col); + end + end + end + $fclose(fh); + // final scene marker (last epoch) + send_marker(); + begin int g=0; while(!frame_drained && g<800000) begin @(posedge axi_clk); g++; end end + if(!frame_drained) begin $error("[zrop] final: frame_drained never rose"); errors++; end else drains++; + repeat(60) @(posedge axi_clk); + + // ---- gates: final Z + color LPDDR == scoreboard ; suppression ; counts ---- + for(int o=0;o>4][(o[3:0])*16+:16]; + if(zs!==sb_z[o]) begin if(errors<12)$error("[zrop] Z px%0d=%04x exp %04x",o,zs,sb_z[o]);errors++; end + end + for(int o=0;o>3][(o[2:0])*32+:32]; + if(sb_seen[o]) begin if(cs!==sb_col[o]) begin if(errors<12)$error("[zrop] COLOR px%0d=%08x exp %08x",o,cs,sb_col[o]);errors++; end end + else begin if(cs!==32'd0) begin if(errors<12)$error("[zrop] px%0d never-passed but color=%08x (suppression fail)",o,cs);errors++; end end + end + if(col_ovf!==0) begin $error("[zrop] col_ovf=%0d",col_ovf);errors++; end + if(bresp_err!==0)begin $error("[zrop] bresp_err=%0d",bresp_err);errors++; end + $display("[zrop] fed=%0d fragments, scene-drains=%0d, z_wr=%0d c_wr=%0d col_ovf=%0d bresp_err=%0d errors=%0d", + nfed, drains, z_beats_written, c_beats_written, col_ovf, bresp_err, errors); + if(errors==0) $display("[tb_top_psmct32_sh3_zrop] PASS"); else $display("[tb_top_psmct32_sh3_zrop] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_zrop] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zrop diff --git a/sim/tb/top/tb_top_psmct32_sh3_zs640_cap.sv b/sim/tb/top/tb_top_psmct32_sh3_zs640_cap.sv new file mode 100644 index 0000000..b5c001e --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zs640_cap.sv @@ -0,0 +1,448 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zs640_cap (Ch358 — authentic-Z capture at NATIVE 640x480, strong-reject scene) +// +// Generalizes Ch355's two-group flow to N authentic SH3 draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating +// into ONE LPDDR framebuffer via a data-driven scheduler over epoch descriptors (sh3_zs640_params.vh). Default +// N_EPOCHS=3 strong-reject trio: E0=idx8634 E1=idx12757 E2=idx145742 at AUTHENTIC native coords x[407..619] y[97..306]. +// Also captures the fragment stream {epoch,x,y,persp_z,color} -> zs640_frags.txt. Proves the Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zs640_cap; +`include "sh3_zs640_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; int tex_fh; int issue_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + logic [10:0] cap_pu_q, cap_pv_q, cap_pu_qq, cap_pv_qq; // persp_u/v delayed from texture issue to flush/color + logic [31:0] tex_issue_addr_q, tex_issue_raw_q; // debug: texture request that returns on the next cycle + logic [10:0] tex_issue_u_q, tex_issue_v_q; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) begin + if (rst_n) begin + if (dut.u_gs.persp_outvalid) begin + cap_pu_qq <= cap_pu_q; + cap_pv_qq <= cap_pv_q; + cap_pu_q <= dut.u_gs.persp_u; + cap_pv_q <= dut.u_gs.persp_v; + end + if (gs_tex_rd_en_o) begin + tex_issue_addr_q <= gs_tex_rd_addr_o; + tex_issue_raw_q <= dut.u_gs.u_tex.addr; + tex_issue_u_q <= dut.u_gs.u_tex.u_eff; + tex_issue_v_q <= dut.u_gs.u_tex.v_eff; + end + if (flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x %0d %0d\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, cap_pu_qq, cap_pv_qq); + if (flush_emit_w && (flush_psm_w==6'h00) && tex_fh!=0) + $fwrite(tex_fh, "%0d %0d %0d %0d %08x %08x %08x %0d %0d %08x %0d %02x %08x %08x %08x\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, + tex_issue_addr_q, tex_issue_raw_q, tex_issue_u_q, tex_issue_v_q, + dut.u_gs.u_tex.tex_rd_data, dut.u_gs.u_tex.sel_lo, dut.u_gs.u_tex.clut_rd_idx, + dut.u_gs.u_tex.clut_rd_data, dut.u_gs.u_tex.near_color, dut.u_gs.s1_tex_color); + end + end + + always @(posedge clk) begin + if (rst_n) begin + #1; + if (dut.u_gs.persp_outvalid && issue_fh!=0) + $fwrite(issue_fh, "%0d %0d %0d %0d %0d %0d %0d\n", + cap_ep, + dut.u_gs.g_persp_emit.u_persp_uv.uq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.vq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.w_recip, + dut.u_gs.persp_u, dut.u_gs.persp_v, + dut.u_gs.g_persp_emit.u_persp_uv.out_valid); + end + end + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; tex_fh=0; issue_fh=0; cap_ep=0; + tex_issue_addr_q=0; tex_issue_raw_q=0; tex_issue_u_q=0; tex_issue_v_q=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_zs640_cap] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (tex_fh!=0) $fclose(tex_fh); + if (issue_fh!=0) $fclose(issue_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zs640_cap] PASS"); else $display("[tb_top_psmct32_sh3_zs640_cap] FAIL"); + $finish; + end + initial begin #320000000; $error("[tb_top_psmct32_sh3_zs640_cap] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zs640_cap diff --git a/sim/tb/top/tb_top_psmct32_sh3_zs640_shared_cap.sv b/sim/tb/top/tb_top_psmct32_sh3_zs640_shared_cap.sv new file mode 100644 index 0000000..1e0034f --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zs640_shared_cap.sv @@ -0,0 +1,474 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zs640_shared_cap (Ch360 — four-epoch shared-texture capture at native 640x480) +// +// Four authentic SH3 draw groups share one resident TEX0/CLUT and accumulate into one LPDDR framebuffer via the +// C12 epoch descriptor table. Each group keeps the proven 204-triangle feeder-list capacity. +// Also captures the fragment stream {epoch,x,y,persp_z,color} -> zs640c12_frags.txt. Proves the Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`ifndef SH3_SHARED_PARAMS +`error "Define SH3_SHARED_PARAMS as a quoted generated params header" +`endif +`ifndef SH3_SHARED_TAG +`error "Define SH3_SHARED_TAG as a quoted fixture tag" +`endif +`ifndef SH3_SHARED_EPOCH_TABLE +`error "Define SH3_SHARED_EPOCH_TABLE as a quoted generated descriptor table" +`endif +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zs640_shared_cap; +`include `SH3_SHARED_PARAMS + localparam string FIXTURE_TAG = `SH3_SHARED_TAG; + localparam int MAX_EPOCHS = 16; + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 4 + + // per-epoch expected CRC / records (from the descriptor params) + // Ch360 — four epochs share one texture: EPk_REUSE=1 means the epoch runs on the resident cache without a fill. + logic [31:0] EP_CRC [0:MAX_EPOCHS-1]; int EP_REC [0:MAX_EPOCHS-1]; bit EP_REUSE [0:MAX_EPOCHS-1]; int fills; + initial begin +`include `SH3_SHARED_EPOCH_TABLE + fills=0; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; int tex_fh; int issue_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + logic [10:0] cap_pu_q, cap_pv_q, cap_pu_qq, cap_pv_qq; // persp_u/v delayed from texture issue to flush/color + logic [31:0] tex_issue_addr_q, tex_issue_raw_q; // debug: texture request that returns on the next cycle + logic [10:0] tex_issue_u_q, tex_issue_v_q; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .RAM_SIZE_BYTES(32 * 1024), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) begin + if (rst_n) begin + if (dut.u_gs.persp_outvalid) begin + cap_pu_qq <= cap_pu_q; + cap_pv_qq <= cap_pv_q; + cap_pu_q <= dut.u_gs.persp_u; + cap_pv_q <= dut.u_gs.persp_v; + end + if (gs_tex_rd_en_o) begin + tex_issue_addr_q <= gs_tex_rd_addr_o; + tex_issue_raw_q <= dut.u_gs.u_tex.addr; + tex_issue_u_q <= dut.u_gs.u_tex.u_eff; + tex_issue_v_q <= dut.u_gs.u_tex.v_eff; + end + if (flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x %0d %0d\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, cap_pu_qq, cap_pv_qq); + if (flush_emit_w && (flush_psm_w==6'h00) && tex_fh!=0) + $fwrite(tex_fh, "%0d %0d %0d %0d %08x %08x %08x %0d %0d %08x %0d %02x %08x %08x %08x\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, + tex_issue_addr_q, tex_issue_raw_q, tex_issue_u_q, tex_issue_v_q, + dut.u_gs.u_tex.tex_rd_data, dut.u_gs.u_tex.sel_lo, dut.u_gs.u_tex.clut_rd_idx, + dut.u_gs.u_tex.clut_rd_data, dut.u_gs.u_tex.near_color, dut.u_gs.s1_tex_color); + end + end + + always @(posedge clk) begin + if (rst_n) begin + #1; + if (dut.u_gs.persp_outvalid && issue_fh!=0) + $fwrite(issue_fh, "%0d %0d %0d %0d %0d %0d %0d\n", + cap_ep, + dut.u_gs.g_persp_emit.u_persp_uv.uq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.vq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.w_recip, + dut.u_gs.persp_u, dut.u_gs.persp_v, + dut.u_gs.g_persp_emit.u_persp_uv.out_valid); + end + end + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + fills=fills+1; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_%s%0d_tex_lpddr.mem", FIXTURE_TAG, k); + if (!EP_REUSE[k] || only_k>=0) begin // isolation (+ONLY=k) always fills — nothing resident + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[sched]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[sched]", k, fill_crc_w); + end + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; tex_fh=0; issue_fh=0; cap_ep=0; + tex_issue_addr_q=0; tex_issue_raw_q=0; tex_issue_u_q=0; tex_issue_v_q=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i=0) exp_fills=1; + else for (int k=0;k= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_zs640_shared_cap] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (tex_fh!=0) $fclose(tex_fh); + if (issue_fh!=0) $fclose(issue_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zs640_shared_cap] PASS"); else $display("[tb_top_psmct32_sh3_zs640_shared_cap] FAIL"); + $finish; + end + initial begin #320000000; $error("[tb_top_psmct32_sh3_zs640_shared_cap] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zs640_shared_cap diff --git a/sim/tb/top/tb_top_psmct32_sh3_zs640c12_cap.sv b/sim/tb/top/tb_top_psmct32_sh3_zs640c12_cap.sv new file mode 100644 index 0000000..5025f5d --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zs640c12_cap.sv @@ -0,0 +1,460 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zs640c12_cap (Ch360 — four-epoch shared-texture capture at native 640x480) +// +// Four authentic SH3 draw groups share one resident TEX0/CLUT and accumulate into one LPDDR framebuffer via the +// C12 epoch descriptor table. Each group keeps the proven 204-triangle feeder-list capacity. +// Also captures the fragment stream {epoch,x,y,persp_z,color} -> zs640c12_frags.txt. Proves the Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zs640c12_cap; +`include "sh3_zs640c12_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=4, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 4 + + // per-epoch expected CRC / records (from the descriptor params) + // Ch360 — four epochs share one texture: EPk_REUSE=1 means the epoch runs on the resident cache without a fill. + logic [31:0] EP_CRC [0:3]; int EP_REC [0:3]; bit EP_REUSE [0:3]; int fills; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; EP_CRC[3]=EP3_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; EP_REC[3]=EP3_NTRIS; + EP_REUSE[0]=EP0_REUSE; EP_REUSE[1]=EP1_REUSE; EP_REUSE[2]=EP2_REUSE; EP_REUSE[3]=EP3_REUSE; + fills=0; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; int tex_fh; int issue_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + logic [10:0] cap_pu_q, cap_pv_q, cap_pu_qq, cap_pv_qq; // persp_u/v delayed from texture issue to flush/color + logic [31:0] tex_issue_addr_q, tex_issue_raw_q; // debug: texture request that returns on the next cycle + logic [10:0] tex_issue_u_q, tex_issue_v_q; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) begin + if (rst_n) begin + if (dut.u_gs.persp_outvalid) begin + cap_pu_qq <= cap_pu_q; + cap_pv_qq <= cap_pv_q; + cap_pu_q <= dut.u_gs.persp_u; + cap_pv_q <= dut.u_gs.persp_v; + end + if (gs_tex_rd_en_o) begin + tex_issue_addr_q <= gs_tex_rd_addr_o; + tex_issue_raw_q <= dut.u_gs.u_tex.addr; + tex_issue_u_q <= dut.u_gs.u_tex.u_eff; + tex_issue_v_q <= dut.u_gs.u_tex.v_eff; + end + if (flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x %0d %0d\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, cap_pu_qq, cap_pv_qq); + if (flush_emit_w && (flush_psm_w==6'h00) && tex_fh!=0) + $fwrite(tex_fh, "%0d %0d %0d %0d %08x %08x %08x %0d %0d %08x %0d %02x %08x %08x %08x\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, + tex_issue_addr_q, tex_issue_raw_q, tex_issue_u_q, tex_issue_v_q, + dut.u_gs.u_tex.tex_rd_data, dut.u_gs.u_tex.sel_lo, dut.u_gs.u_tex.clut_rd_idx, + dut.u_gs.u_tex.clut_rd_data, dut.u_gs.u_tex.near_color, dut.u_gs.s1_tex_color); + end + end + + always @(posedge clk) begin + if (rst_n) begin + #1; + if (dut.u_gs.persp_outvalid && issue_fh!=0) + $fwrite(issue_fh, "%0d %0d %0d %0d %0d %0d %0d\n", + cap_ep, + dut.u_gs.g_persp_emit.u_persp_uv.uq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.vq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.w_recip, + dut.u_gs.persp_u, dut.u_gs.persp_v, + dut.u_gs.g_persp_emit.u_persp_uv.out_valid); + end + end + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + fills=fills+1; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640c12%0d_tex_lpddr.mem", k); + if (!EP_REUSE[k] || only_k>=0) begin // isolation (+ONLY=k) always fills — nothing resident + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[sched]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[sched]", k, fill_crc_w); + end + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; tex_fh=0; issue_fh=0; cap_ep=0; + tex_issue_addr_q=0; tex_issue_raw_q=0; tex_issue_u_q=0; tex_issue_v_q=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_zs640c12_cap] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (tex_fh!=0) $fclose(tex_fh); + if (issue_fh!=0) $fclose(issue_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zs640c12_cap] PASS"); else $display("[tb_top_psmct32_sh3_zs640c12_cap] FAIL"); + $finish; + end + initial begin #320000000; $error("[tb_top_psmct32_sh3_zs640c12_cap] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zs640c12_cap diff --git a/sim/tb/top/tb_top_psmct32_sh3_zs640c6_cap.sv b/sim/tb/top/tb_top_psmct32_sh3_zs640c6_cap.sv new file mode 100644 index 0000000..46e8176 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zs640c6_cap.sv @@ -0,0 +1,461 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zs640c6_cap (Ch358 — authentic-Z capture at NATIVE 640x480, strong-reject scene) +// +// Generalizes Ch355's two-group flow to N authentic SH3 draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating +// into ONE LPDDR framebuffer via a data-driven scheduler over epoch descriptors (sh3_zs640c6_params.vh). Default +// N_EPOCHS=3 strong-reject trio: E0=idx8634 E1=idx12757 E2=idx145742 at AUTHENTIC native coords x[407..619] y[97..306]. +// Also captures the fragment stream {epoch,x,y,persp_z,color} -> zs640c6_frags.txt. Proves the Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zs640c6_cap; +`include "sh3_zs640c6_params.vh" // FBPXW=640, FBH=480, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + // Ch359 — TWO epochs sharing ONE texture: EPk_REUSE=1 means the epoch runs on the RESIDENT cache (no fill). + logic [31:0] EP_CRC [0:1]; int EP_REC [0:1]; bit EP_REUSE [0:1]; int fills; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; + EP_REUSE[0]=EP0_REUSE; EP_REUSE[1]=EP1_REUSE; + fills=0; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; int tex_fh; int issue_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + logic [10:0] cap_pu_q, cap_pv_q, cap_pu_qq, cap_pv_qq; // persp_u/v delayed from texture issue to flush/color + logic [31:0] tex_issue_addr_q, tex_issue_raw_q; // debug: texture request that returns on the next cycle + logic [10:0] tex_issue_u_q, tex_issue_v_q; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) begin + if (rst_n) begin + if (dut.u_gs.persp_outvalid) begin + cap_pu_qq <= cap_pu_q; + cap_pv_qq <= cap_pv_q; + cap_pu_q <= dut.u_gs.persp_u; + cap_pv_q <= dut.u_gs.persp_v; + end + if (gs_tex_rd_en_o) begin + tex_issue_addr_q <= gs_tex_rd_addr_o; + tex_issue_raw_q <= dut.u_gs.u_tex.addr; + tex_issue_u_q <= dut.u_gs.u_tex.u_eff; + tex_issue_v_q <= dut.u_gs.u_tex.v_eff; + end + if (flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x %0d %0d\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, cap_pu_qq, cap_pv_qq); + if (flush_emit_w && (flush_psm_w==6'h00) && tex_fh!=0) + $fwrite(tex_fh, "%0d %0d %0d %0d %08x %08x %08x %0d %0d %08x %0d %02x %08x %08x %08x\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, + tex_issue_addr_q, tex_issue_raw_q, tex_issue_u_q, tex_issue_v_q, + dut.u_gs.u_tex.tex_rd_data, dut.u_gs.u_tex.sel_lo, dut.u_gs.u_tex.clut_rd_idx, + dut.u_gs.u_tex.clut_rd_data, dut.u_gs.u_tex.near_color, dut.u_gs.s1_tex_color); + end + end + + always @(posedge clk) begin + if (rst_n) begin + #1; + if (dut.u_gs.persp_outvalid && issue_fh!=0) + $fwrite(issue_fh, "%0d %0d %0d %0d %0d %0d %0d\n", + cap_ep, + dut.u_gs.g_persp_emit.u_persp_uv.uq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.vq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.w_recip, + dut.u_gs.persp_u, dut.u_gs.persp_v, + dut.u_gs.g_persp_emit.u_persp_uv.out_valid); + end + end + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<4000000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + fills=fills+1; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zs640c6%0d_tex_lpddr.mem", k); + if (!EP_REUSE[k] || only_k>=0) begin // isolation (+ONLY=k) always fills — nothing resident + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + end else begin + // Ch359 — EXPLICIT REUSE: no reload, no fill pulse. Fail-closed residency: the fill CRC register is + // only rewritten by a fill, so it must still hold the prior epoch's verified CRC (same shared texture). + if (fill_crc_w!==EP_CRC[k]) begin $error("%s epoch %0d: REUSE but resident crc=%08x exp %08x — residency broken", "[sched]", k, fill_crc_w, EP_CRC[k]); errors++; end + else $display("%s epoch %0d: REUSE resident texture (crc=0x%08x, no fill)", "[sched]", k, fill_crc_w); + end + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; tex_fh=0; issue_fh=0; cap_ep=0; + tex_issue_addr_q=0; tex_issue_raw_q=0; tex_issue_u_q=0; tex_issue_v_q=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_zs640c6_cap] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (tex_fh!=0) $fclose(tex_fh); + if (issue_fh!=0) $fclose(issue_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zs640c6_cap] PASS"); else $display("[tb_top_psmct32_sh3_zs640c6_cap] FAIL"); + $finish; + end + initial begin #320000000; $error("[tb_top_psmct32_sh3_zs640c6_cap] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zs640c6_cap diff --git a/sim/tb/top/tb_top_psmct32_sh3_zsched.sv b/sim/tb/top/tb_top_psmct32_sh3_zsched.sv new file mode 100644 index 0000000..289a784 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_zsched.sv @@ -0,0 +1,447 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_zsched (Ch356 — N-TEXTURE SCHEDULER, data-driven epoch descriptors) +// +// Generalizes Ch355's two-group flow to N authentic SH3 draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating +// into ONE LPDDR framebuffer via a data-driven scheduler over epoch descriptors (sh3_zsched_params.vh). Default +// N_EPOCHS=3: E0=idx11671 E1=idx19562 E2=idx89761. Proves Codex's Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_zsched; +`include "sh3_zsched_params.vh" // FBPXW=384, FBH=381, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; int tex_fh; int issue_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + logic [10:0] cap_pu_q, cap_pv_q, cap_pu_qq, cap_pv_qq; // persp_u/v delayed from texture issue to flush/color + logic [31:0] tex_issue_addr_q, tex_issue_raw_q; // debug: texture request that returns on the next cycle + logic [10:0] tex_issue_u_q, tex_issue_v_q; + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) begin + if (rst_n) begin + if (dut.u_gs.persp_outvalid) begin + cap_pu_qq <= cap_pu_q; + cap_pv_qq <= cap_pv_q; + cap_pu_q <= dut.u_gs.persp_u; + cap_pv_q <= dut.u_gs.persp_v; + end + if (gs_tex_rd_en_o) begin + tex_issue_addr_q <= gs_tex_rd_addr_o; + tex_issue_raw_q <= dut.u_gs.u_tex.addr; + tex_issue_u_q <= dut.u_gs.u_tex.u_eff; + tex_issue_v_q <= dut.u_gs.u_tex.v_eff; + end + if (flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x %0d %0d\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, cap_pu_qq, cap_pv_qq); + if (flush_emit_w && (flush_psm_w==6'h00) && tex_fh!=0) + $fwrite(tex_fh, "%0d %0d %0d %0d %08x %08x %08x %0d %0d %08x %0d %02x %08x %08x %08x\n", + cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w, + tex_issue_addr_q, tex_issue_raw_q, tex_issue_u_q, tex_issue_v_q, + dut.u_gs.u_tex.tex_rd_data, dut.u_gs.u_tex.sel_lo, dut.u_gs.u_tex.clut_rd_idx, + dut.u_gs.u_tex.clut_rd_data, dut.u_gs.u_tex.near_color, dut.u_gs.s1_tex_color); + end + end + + always @(posedge clk) begin + if (rst_n) begin + #1; + if (dut.u_gs.persp_outvalid && issue_fh!=0) + $fwrite(issue_fh, "%0d %0d %0d %0d %0d %0d %0d\n", + cap_ep, + dut.u_gs.g_persp_emit.u_persp_uv.uq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.vq_pipe[2], + dut.u_gs.g_persp_emit.u_persp_uv.w_recip, + dut.u_gs.persp_u, dut.u_gs.persp_v, + dut.u_gs.g_persp_emit.u_persp_uv.out_valid); + end + end + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_zsched%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; tex_fh=0; issue_fh=0; cap_ep=0; + tex_issue_addr_q=0; tex_issue_raw_q=0; tex_issue_u_q=0; tex_issue_v_q=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_zsched] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (tex_fh!=0) $fclose(tex_fh); + if (issue_fh!=0) $fclose(issue_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_zsched] PASS"); else $display("[tb_top_psmct32_sh3_zsched] FAIL"); + $finish; + end + initial begin #160000000; $error("[tb_top_psmct32_sh3_zsched] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_zsched diff --git a/sim/tb/top/tb_top_psmct32_sh3_ztrio.sv b/sim/tb/top/tb_top_psmct32_sh3_ztrio.sv new file mode 100644 index 0000000..eff6f30 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_ztrio.sv @@ -0,0 +1,178 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_ztrio (Ch357 — persistent-Z ROP acceptance gate, TRACE-based scoreboard) +// +// Codex option A: verify the LPDDR-Z ROP (gs_lpddr_zc_emit) against the raster's ACTUAL emitted fragments. This TB replays +// the captured fragment trace (tb_top_psmct32_sh3_zsched -> ztrio_frags.txt: "epoch x y persp_z color" per line) through +// zc_emit across two clock domains, with a per-epoch scene marker, and scores it with an INDEPENDENT software scoreboard +// (clamp16 / GEQUAL / persistence). Proves Codex's Ch357 gates: +// * every replayed fragment enters the ROP EXACTLY once (we feed each once and wait g_ready — no drop, no double). +// * the scoreboard predicts every pass/reject and the final packed 16-bit Z; failed depth tests emit NO color. +// * final color + Z LPDDR memories match the scoreboard EXACTLY. +// * the ordered end-of-scene marker drain waits BOTH pipelines (color + Z BRESPs) before frame_drained. +// This is the ROP-correctness gate; the raster's Z-interp fidelity (float-oracle 3971 / 87.6% owner agreement) is a SEPARATE +// recorded limitation, not tested here. Primary fixture = sh3_zsched [8634,12757,145742], FB 256x210, Z base 0x140000. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_ztrio; + localparam int FB_PXW=384, FB_H=381; + localparam int NPX=FB_PXW*FB_H; // 53760 + localparam int ZBEATS=(NPX+15)/16; // 3360 + localparam int CBEATS=(NPX+7)/8; // 6720 + localparam [31:0] COLBASE=32'h0000_0000, ZBASE=32'h0014_0000; + localparam int ZBW=$clog2(ZBEATS), CBW=$clog2(CBEATS); + + logic gs_clk=0; always #5 gs_clk=~gs_clk; + logic axi_clk=0; always #2 axi_clk=~axi_clk; // emif faster than design -> ROP drains faster than the trace feeds + logic gs_rst_n, axi_rst_n; int errors; initial errors=0; + + logic enable, clear_start, clear_done, frame_drained; + logic g_valid, g_ready; logic [11:0] g_x, g_y; logic [15:0] g_zq; logic g_zmsk, g_ztest, g_scene; logic [31:0] g_color; + logic [31:0] z_araddr; logic [7:0] z_arlen; logic [2:0] z_arsize; logic [1:0] z_arburst; logic z_arvalid, z_arready; + logic [255:0] z_rdata; logic [1:0] z_rresp; logic z_rlast, z_rvalid, z_rready; + logic [31:0] z_awaddr; logic [7:0] z_awlen; logic [2:0] z_awsize; logic [1:0] z_awburst; logic z_awvalid, z_awready; + logic [255:0] z_wdata; logic [31:0] z_wstrb; logic z_wlast, z_wvalid, z_wready; logic z_bvalid, z_bready; logic [1:0] z_bresp; + logic [31:0] c_awaddr; logic [7:0] c_awlen; logic [2:0] c_awsize; logic [1:0] c_awburst; logic c_awvalid, c_awready; + logic [255:0] c_wdata; logic [31:0] c_wstrb; logic c_wlast, c_wvalid, c_wready; logic c_bvalid, c_bready; logic [1:0] c_bresp; + logic [31:0] z_beats_read, z_beats_written, c_beats_written, col_ovf, bresp_err; logic idle; + + gs_lpddr_zc_emit #(.COLBASE(COLBASE), .ZBASE(ZBASE), .FB_PXW(FB_PXW), .FB_H(FB_H), .REQ_DEPTH(32), .COL_DEPTH(64)) dut ( + .gs_clk(gs_clk), .gs_rst_n(gs_rst_n), .enable(enable), + .g_valid(g_valid), .g_ready(g_ready), .g_x(g_x), .g_y(g_y), .g_zq(g_zq), .g_zmsk(g_zmsk), + .g_ztest(g_ztest), .g_ztst(2'd2), .g_color(g_color), .g_be(4'hF), .g_scene(g_scene), + .axi_clk(axi_clk), .axi_rst_n(axi_rst_n), .clear_start(clear_start), .clear_done(clear_done), .frame_drained(frame_drained), + .z_araddr(z_araddr), .z_arlen(z_arlen), .z_arsize(z_arsize), .z_arburst(z_arburst), .z_arvalid(z_arvalid), .z_arready(z_arready), + .z_rdata(z_rdata), .z_rresp(z_rresp), .z_rlast(z_rlast), .z_rvalid(z_rvalid), .z_rready(z_rready), + .z_awaddr(z_awaddr), .z_awlen(z_awlen), .z_awsize(z_awsize), .z_awburst(z_awburst), .z_awvalid(z_awvalid), .z_awready(z_awready), + .z_wdata(z_wdata), .z_wstrb(z_wstrb), .z_wlast(z_wlast), .z_wvalid(z_wvalid), .z_wready(z_wready), + .z_bvalid(z_bvalid), .z_bready(z_bready), .z_bresp(z_bresp), + .c_awaddr(c_awaddr), .c_awlen(c_awlen), .c_awsize(c_awsize), .c_awburst(c_awburst), .c_awvalid(c_awvalid), .c_awready(c_awready), + .c_wdata(c_wdata), .c_wstrb(c_wstrb), .c_wlast(c_wlast), .c_wvalid(c_wvalid), .c_wready(c_wready), + .c_bvalid(c_bvalid), .c_bready(c_bready), .c_bresp(c_bresp), + .z_beats_read(z_beats_read), .z_beats_written(z_beats_written), .c_beats_written(c_beats_written), + .col_ovf(col_ovf), .bresp_err(bresp_err), .idle(idle) + ); + + logic [15:0] lf=16'hCAFE; always_ff @(posedge axi_clk) lf<={lf[14:0], lf[15]^lf[13]^lf[12]^lf[10]}; + + // ---- Z LPDDR slave (256b, random backpressure) ---- + logic [255:0] zmem [0:ZBEATS-1]; + logic [31:0] zra; logic zrp; logic [3:0] zrd; logic [31:0] zwa; logic [255:0] zwd; logic zaw,zw; logic [3:0] zbd; logic zbp; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin z_arready<=0;z_rvalid<=0;z_rlast<=0;z_rresp<=0;z_rdata<=0;zrp<=0;zrd<=0; + z_awready<=0;z_wready<=0;z_bvalid<=0;z_bresp<=0;zaw<=0;zw<=0;zbp<=0;zbd<=0; end + else begin + z_arready<=(!zrp&&!z_rvalid)?lf[0]:1'b0; + if(z_arvalid&&z_arready) begin zra<=z_araddr;zrp<=1;zrd<={1'b0,lf[3:1]};z_arready<=0; end + if(zrp&&!z_rvalid) begin if(zrd==0) begin z_rdata<=zmem[(zra-ZBASE)>>5];z_rresp<=0;z_rvalid<=1;z_rlast<=1;zrp<=0; end else zrd<=zrd-1; end + if(z_rvalid&&z_rready) begin z_rvalid<=0;z_rlast<=0; end + z_awready<=(!zaw)?lf[4]:1'b0; z_wready<=(!zw)?lf[5]:1'b0; + if(z_awvalid&&z_awready) begin zwa<=z_awaddr;zaw<=1;z_awready<=0; end + if(z_wvalid&&z_wready) begin zwd<=z_wdata;zw<=1;z_wready<=0; end + if(zaw&&zw&&!zbp&&!z_bvalid) begin zmem[(zwa-ZBASE)>>5]<=zwd;zbp<=1;zbd<={1'b0,lf[8:6]}; end + if(zbp&&!z_bvalid) begin if(zbd==0) begin z_bvalid<=1;z_bresp<=0;zbp<=0;zaw<=0;zw<=0; end else zbd<=zbd-1; end + if(z_bvalid&&z_bready) z_bvalid<=0; + end + end + // ---- Color LPDDR slave (256b, per-byte wstrb, random backpressure) ---- + logic [255:0] cmem [0:CBEATS-1]; + logic [31:0] cwa; logic [255:0] cwd; logic [31:0] cws; logic caw,cw; logic [3:0] cbd; logic cbp; + always_ff @(posedge axi_clk or negedge axi_rst_n) begin + if(!axi_rst_n) begin c_awready<=0;c_wready<=0;c_bvalid<=0;c_bresp<=0;caw<=0;cw<=0;cbp<=0;cbd<=0; end + else begin + c_awready<=(!caw)?lf[9]:1'b0; c_wready<=(!cw)?lf[11]:1'b0; + if(c_awvalid&&c_awready) begin cwa<=c_awaddr;caw<=1;c_awready<=0; end + if(c_wvalid&&c_wready) begin cwd<=c_wdata;cws<=c_wstrb;cw<=1;c_wready<=0; end + if(caw&&cw&&!cbp&&!c_bvalid) begin + for(int b=0;b<32;b++) if(cws[b]) cmem[(cwa-COLBASE)>>5][b*8+:8]<=cwd[b*8+:8]; + cbp<=1;cbd<={1'b0,lf[14:12]}; + end + if(cbp&&!c_bvalid) begin if(cbd==0) begin c_bvalid<=1;c_bresp<=0;cbp<=0;caw<=0;cw<=0; end else cbd<=cbd-1; end + if(c_bvalid&&c_bready) c_bvalid<=0; + end + end + // disjoint-range monitors + always_ff @(posedge axi_clk) if(axi_rst_n) begin + if(z_arvalid && (z_araddr=ZBASE+ZBEATS*32)) begin $error("Z AR %h OOR",z_araddr);errors++; end + if(z_awvalid && (z_awaddr=ZBASE+ZBEATS*32)) begin $error("Z AW %h OOR",z_awaddr);errors++; end + if(c_awvalid && (c_awaddr=COLBASE+CBEATS*32)) begin $error("C AW %h OOR",c_awaddr);errors++; end + end + + // ---- independent scoreboard (clamp16 persistent-Z over the fed fragments) ---- + logic [15:0] sb_z [0:NPX-1]; logic [31:0] sb_col [0:NPX-1]; logic sb_seen [0:NPX-1]; + function automatic logic [15:0] cl16(input logic [31:0] z); cl16=(|z[31:16])?16'hFFFF:z[15:0]; endfunction + + // ---- feed one fragment: drive g_*, wait acceptance (exactly once), update the scoreboard ---- + int nfed; + task automatic feed_frag(input int ep, input int x, input int y, input int z, input logic [31:0] col); + int o; logic [15:0] zq; logic pass; + @(negedge gs_clk); + g_valid<=1; g_scene<=0; g_x<=x[11:0]; g_y<=y[11:0]; g_zq<=cl16(z); g_zmsk<=0; g_ztest<=1; g_color<=col; + @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); // wait acceptance — NEVER drop a fragment + @(negedge gs_clk); g_valid<=0; + // scoreboard (in feed order == ROP processing order) + o=y*FB_PXW+x; zq=cl16(z); pass=(zq>=sb_z[o]); + if(pass) begin sb_col[o]=col; sb_seen[o]=1; sb_z[o]=zq; end + nfed++; + if(lf[7]) repeat(1+lf[1:0]) @(posedge gs_clk); // random inter-fragment gap + endtask + task automatic send_marker(); + @(negedge gs_clk); g_valid<=1; g_scene<=1; @(posedge gs_clk); + while(!(g_valid && g_ready)) @(posedge gs_clk); + @(negedge gs_clk); g_valid<=0; g_scene<=0; + endtask + + int fh, r, ep, x, y, z, cep, drains; logic [31:0] col; + initial begin + errors=0; enable=0; clear_start=0; g_valid=0; g_scene=0; g_x=0; g_y=0; g_zq=0; g_zmsk=0; g_ztest=1; g_color=0; nfed=0; drains=0; + for(int i=0;i ordered scene drain + send_marker(); + begin int g=0; while(!frame_drained && g<800000) begin @(posedge axi_clk); g++; end end + if(!frame_drained) begin $error("[zrop] epoch %0d: frame_drained never rose",cep); errors++; end + else drains++; + cep=ep; + end + feed_frag(ep, x, y, z, col); + end else begin + r=$fgetc(fh); // skip a char past a blank/partial line + end + end + $fclose(fh); + // final scene marker (last epoch) + send_marker(); + begin int g=0; while(!frame_drained && g<800000) begin @(posedge axi_clk); g++; end end + if(!frame_drained) begin $error("[zrop] final: frame_drained never rose"); errors++; end else drains++; + repeat(60) @(posedge axi_clk); + + // ---- gates: final Z + color LPDDR == scoreboard ; suppression ; counts ---- + for(int o=0;o>4][(o[3:0])*16+:16]; + if(zs!==sb_z[o]) begin if(errors<12)$error("[zrop] Z px%0d=%04x exp %04x",o,zs,sb_z[o]);errors++; end + end + for(int o=0;o>3][(o[2:0])*32+:32]; + if(sb_seen[o]) begin if(cs!==sb_col[o]) begin if(errors<12)$error("[zrop] COLOR px%0d=%08x exp %08x",o,cs,sb_col[o]);errors++; end end + else begin if(cs!==32'd0) begin if(errors<12)$error("[zrop] px%0d never-passed but color=%08x (suppression fail)",o,cs);errors++; end end + end + if(col_ovf!==0) begin $error("[zrop] col_ovf=%0d",col_ovf);errors++; end + if(bresp_err!==0)begin $error("[zrop] bresp_err=%0d",bresp_err);errors++; end + $display("[zrop] fed=%0d fragments, scene-drains=%0d, z_wr=%0d c_wr=%0d col_ovf=%0d bresp_err=%0d errors=%0d", + nfed, drains, z_beats_written, c_beats_written, col_ovf, bresp_err, errors); + if(errors==0) $display("[tb_top_psmct32_sh3_ztrio] PASS"); else $display("[tb_top_psmct32_sh3_ztrio] FAIL"); + $finish; + end + initial begin #400000000; $error("[tb_top_psmct32_sh3_ztrio] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_ztrio diff --git a/sim/tb/top/tb_top_psmct32_sh3_ztrio_cap.sv b/sim/tb/top/tb_top_psmct32_sh3_ztrio_cap.sv new file mode 100644 index 0000000..fb3ca73 --- /dev/null +++ b/sim/tb/top/tb_top_psmct32_sh3_ztrio_cap.sv @@ -0,0 +1,402 @@ +// retroDE_ps2 — tb_top_psmct32_sh3_ztrio_cap (Ch356 — N-TEXTURE SCHEDULER, data-driven epoch descriptors) +// +// Generalizes Ch355's two-group flow to N authentic SH3 draw epochs, each with a DIFFERENT TEX0/CLUT, accumulating +// into ONE LPDDR framebuffer via a data-driven scheduler over epoch descriptors (sh3_ztrio_params.vh). Default +// N_EPOCHS=3: E0=idx11671 E1=idx19562 E2=idx89761. Proves Codex's Ch356 integration acceptance: +// * preclear EXACTLY once. +// * N FRESH cache fills, each fill_done low->high, expected beats/bytes, 0 read errors, epoch CRC (EPk_CRC). +// * N lists STREAMED through the feeder staging WRITE PORT (feeder_stg_we/waddr/wdata) — NOT the $readmemh backdoor +// (closes the Ch355 sim gap where the write-port sequencing was untested). Each streams the full STG_WORDS so +// staging is fully reset per epoch (no stale words), and word0 (the ntris header) is exercised first. +// * N FRESH ORDERED drains: epoch 0 low->high (first render); epochs 1..N-1 high->low->high (stale cleared). +// * scanout stays disabled until the LAST fresh drain; exact BEATS_PER_FRAME (=ROW_BEATS*H). +// * final FB scored vs the independent composed reference using the PER-PIXEL OWNER epoch (exact palette per owner); +// multi-epoch (>=2) overlap scored separately as the accumulation proof. +// * +ONLY= renders a SINGLE epoch (+FBDUMP dumps its FB) for the composition==isolated bit-for-bit check. +// LOCAL/gitignored fixtures; skip-guard if absent. +`timescale 1ns/1ps + +module tb_top_psmct32_sh3_ztrio_cap; +`include "sh3_ztrio_params.vh" // FBPXW=384, FBH=381, N_EPOCHS=3, EPk_CRC/EPk_NTRIS/EPk_CBP, TEX_*, ... + localparam int W = FBPXW, H = FBH; + localparam int STRIDE = W*4; // 1536 + localparam int ROW_BEATS = STRIDE/32; // 48 + localparam int FB_BYTES = STRIDE*H; // 585216 + localparam int FB_WORDS = W*H; + localparam int BEATS_PER_FRAME = ROW_BEATS*H; // 18288 + localparam int H_ACT=W, V_ACT=H, H_BP=32, H_FP=8, V_BP=16, V_FP=8; + localparam int H_TOT=H_BP+H_ACT+H_FP, V_TOT=V_BP+V_ACT+V_FP; + localparam int NEP = N_EPOCHS; // 3 + + // per-epoch expected CRC / records (from the descriptor params) + logic [31:0] EP_CRC [0:2]; int EP_REC [0:2]; + initial begin + EP_CRC[0]=EP0_CRC; EP_CRC[1]=EP1_CRC; EP_CRC[2]=EP2_CRC; + EP_REC[0]=EP0_NTRIS; EP_REC[1]=EP1_NTRIS; EP_REC[2]=EP2_NTRIS; + end + + logic clk=0; always #5 clk=~clk; + logic emif_clk=0; always #2 emif_clk=~emif_clk; + logic video_clk=0; always #7 video_clk=~video_clk; + logic rst_n; logic fb_commit=0; always #13 fb_commit=~fb_commit; + int errors; initial errors=0; + + // ===== bram-top (FB_LPDDR_ONLY, AUTOSTART off, STG 2048), H/V_ACTIVE = 384x381 ===== + logic core_go; logic [7:0] r,g,b; logic hsync,vsync_o,de; + logic core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle; + logic feeder_go_tb, feeder_ready_tb; logic [15:0] feeder_records_w; logic [31:0] feeder_waits_w; + logic gs_tex_rd_en_o; logic [31:0] gs_tex_rd_addr_o; logic [31:0] tex_cache_data; logic tex_cache_ready; + logic [31:0] tex_cache_hits, tex_bram_hits; + logic flush_emit_w; logic [31:0] flush_addr_w; logic [31:0] flush_color32_w; logic [5:0] flush_psm_w; + logic [11:0] flush_x_w, flush_y_w; logic [31:0] flush_z_w; // Ch357 — fragment coords + persp_z5 + int cap_ep; int cap_fh; // fragment capture (verify persp_z5 vs the clamp16 oracle) + // feeder staging WRITE PORT (streamed per epoch) + logic stg_we; logic [11:0] stg_waddr; logic [63:0] stg_wdata; + + top_psmct32_raster_demo_bram #( + .H_ACTIVE(FBPXW), .V_ACTIVE(FBH), + .VRAM_BYTES(VRAM_BYTES_P), .VRAM_ENABLE_READ2(1'b0), .PSMCT32_SWIZZLE(1'b0), + .COMBINED_TAZ(1'b0), .TILE_LOCAL(1'b0), .TILE_COLS(1), .TILE_ROWS(1), + .TILE_MULTIPRIM(1'b0), .TILE_PRIM_COUNT(1), .TILE_FIFO_DEPTH(8), + .BIN_BUFFER_ENABLE(1'b0), .HEARTBEAT_SPLICE_ENABLE(1'b0), + .FEEDER_ENABLE(1'b1), .FEEDER_STG_WORDS(STG_WORDS), .FEEDER_AUTOSTART(1'b0), + .PERSPECTIVE_CORRECT(1'b1), .PERSP_RECIP_IDX_BITS(11), + .GRAD_SEQ_DIVIDER(1'b1), .GRAD_DIV_CYCLES(4), + .GS_LPDDR_TEX(1'b1), .TEX_VRAM_BASE(TEX_VRAM_BASE), .TEX_CACHE_BYTES(TEX_BYTES), + .CLUT_CSM1_ENABLE(1'b1), .FB_LPDDR_ONLY(1'b1) + ) dut ( + .clk(clk), .rst_n(rst_n), .core_go(core_go), + .r(r), .g(g), .b(b), .hsync(hsync), .vsync(vsync_o), .de(de), + .core_halt(core_halt), .dma_done_seen(dma_done_seen), .frame_seen(frame_seen), .raster_overflow(raster_overflow), + .frame_toggle(frame_toggle), .dma_done_toggle(dma_done_toggle), .joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0), + .feeder_stg_we_i(stg_we), .feeder_stg_waddr_i(stg_waddr), .feeder_stg_wdata_i(stg_wdata), + .feeder_go_i(feeder_go_tb), .feeder_ready_o(feeder_ready_tb), + .feeder_records_o(feeder_records_w), .feeder_waits_o(feeder_waits_w), + .flush_emit_o(flush_emit_w), .flush_addr_o(flush_addr_w), + .flush_pix16_o(), .flush_color32_o(flush_color32_w), .flush_psm_o(flush_psm_w), + .flush_x_o(flush_x_w), .flush_y_o(flush_y_w), .flush_z_o(flush_z_w), + .gs_tex_rd_en_o(gs_tex_rd_en_o), .gs_tex_rd_addr_o(gs_tex_rd_addr_o), + .tex_cache_data_i(tex_cache_data), .tex_cache_ready_i(tex_cache_ready), + .tex_cache_hits_o(tex_cache_hits), .tex_bram_hits_o(tex_bram_hits) + ); + + // Ch357 — capture every emitted fragment {epoch, x, y, persp_z, color}. An external Python check replays these through + // the clamp16 persistent-Z model and compares owner/reject to the oracle -> validates persp_z5 end-to-end (the new RTL). + always_ff @(posedge clk) if (rst_n && flush_emit_w && (flush_psm_w==6'h00) && cap_fh!=0) + $fwrite(cap_fh, "%0d %0d %0d %0d %08x\n", cap_ep, flush_x_w, flush_y_w, flush_z_w, flush_color32_w); + + // texture cache + behavioral texture LPDDR (RELOADED between fills for each epoch's rebind) + logic [29:0] araddr; logic [1:0] arburst; logic [6:0] arid; logic [7:0] arlen; logic [2:0] arsize; + logic arvalid, arready; logic [255:0] rdata; logic [1:0] rresp; logic rlast, rvalid, rready; + logic fill_start, fill_done; logic [31:0] fill_beats, fill_bytes, tex_rd_errs, fill_crc_w; + gs_texture_cache #(.LPDDR_TEX_BASE(LPDDR_TEX_BASE), .TEX_VRAM_BASE(TEX_VRAM_BASE), + .TEX_BYTES(TEX_BYTES), .N_BEATS(N_BEATS)) u_cache ( + .axi_clk(clk), .axi_rst_n(rst_n), .fill_start(fill_start), .fill_done(fill_done), + .fill_beats(fill_beats), .fill_bytes(fill_bytes), .rd_errs(tex_rd_errs), .fill_crc(fill_crc_w), + .araddr(araddr), .arburst(arburst), .arid(arid), .arlen(arlen), .arsize(arsize), .arvalid(arvalid), .arready(arready), + .rdata(rdata), .rresp(rresp), .rlast(rlast), .rvalid(rvalid), .rready(rready), + .sample_clk(clk), .tex_rd_en(gs_tex_rd_en_o), .tex_rd_addr(gs_tex_rd_addr_o), + .tex_rd_data(tex_cache_data), .tex_ready(tex_cache_ready) + ); + logic [31:0] lpddr_mem [0:(TEX_BYTES/4)-1]; // reloaded per epoch: tex0, tex1, tex2 + typedef enum logic [1:0] { S_IDLE, S_WAIT, S_DATA } sstate_t; sstate_t sst; logic [3:0] tdly; int tbeat; + always_ff @(posedge clk) begin + if (!rst_n) begin sst<=S_IDLE; arready<=0; rvalid<=0; rlast<=0; rresp<=0; rdata<=0; tdly<=0; end + else begin arready<=0; rvalid<=0; rlast<=0; + case (sst) + S_IDLE: if (arvalid) begin arready<=1; tbeat<=(araddr-LPDDR_TEX_BASE)>>5; tdly<=4'd2; sst<=S_WAIT; end + S_WAIT: if (tdly==0) sst<=S_DATA; else tdly<=tdly-1'b1; + S_DATA: if (rready) begin for (int w=0;w<8;w++) rdata[w*32 +: 32]<=lpddr_mem[tbeat*8+w]; + rresp<=2'b00; rvalid<=1; rlast<=1; sst<=S_IDLE; end + endcase + end + end + + // render epoch (per scene) + PSMCT32 writer + precleared LPDDR FB + logic fb_flush=0, render_inflight=0, feeder_ready_q=0; int eof_count; + wire feeder_ready_rise = feeder_ready_tb && !feeder_ready_q; + always_ff @(posedge clk or negedge rst_n) begin + if (!rst_n) begin render_inflight<=0; feeder_ready_q<=0; fb_flush<=0; eof_count<=0; end + else begin feeder_ready_q<=feeder_ready_tb; fb_flush<=1'b0; + if (feeder_go_tb && feeder_ready_tb) render_inflight<=1'b1; + if (render_inflight && feeder_ready_rise) begin fb_flush<=1'b1; render_inflight<=1'b0; eof_count<=eof_count+1; end + end + end + logic wr_arm=0; logic [255:0] fbw_wdata; logic [31:0] fbw_wstrb, fbw_awaddr; logic fbw_awvalid, fbw_wvalid; + logic [31:0] fbw_beats, fbw_ovf, fbw_bresp_err; logic fbw_idle, fbw_drained; + gs_lpddr_axi_master #(.FIFO_DEPTH(64), .PIX_BYTES(4)) u_wr ( + .gs_clk(clk), .gs_rst_n(rst_n), .enable(1'b1), + .arm(wr_arm), .canary(1'b0), .fb_base(32'h0), .ctrl_commit(fb_commit), + .px_emit(flush_emit_w && (flush_psm_w==6'h00)), .px_addr(flush_addr_w), .px_pix32(flush_color32_w), .flush(fb_flush), + .axi_clk(emif_clk), .axi_rst_n(rst_n), + .awaddr(fbw_awaddr), .awlen(), .awsize(), .awburst(), .awid(), .awvalid(fbw_awvalid), .awready(1'b1), + .wdata(fbw_wdata), .wstrb(fbw_wstrb), .wlast(), .wvalid(fbw_wvalid), .wready(1'b1), + .bvalid(1'b1), .bready(), .bresp(2'b00), + .beats_written(fbw_beats), .bursts_issued(), .bresp_err_count(fbw_bresp_err), + .fifo_overflow_count(fbw_ovf), .idle(fbw_idle), .frame_drained(fbw_drained) + ); + logic [7:0] fb [0:FB_BYTES-1]; logic [31:0] fb_awlat; + always_ff @(posedge emif_clk) begin + if (fbw_awvalid) fb_awlat<=fbw_awaddr; + if (fbw_wvalid) for (int i=0;i<32;i++) if (fbw_wstrb[i]) begin + int aa; aa=fb_awlat+i; if (aa>=0 && aa>2]<=flush_color32_w; + + // FRESH-DRAIN observer: count frame_drained low->high and high->low edges (emif domain). + logic fd_q; int fd_rises, fd_falls; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin fd_q<=0; fd_rises<=0; fd_falls<=0; end + else begin fd_q<=fbw_drained; + if (fbw_drained && !fd_q) fd_rises<=fd_rises+1; + if (!fbw_drained && fd_q) fd_falls<=fd_falls+1; + end + end + + // scanout (384x381), host-gated: enable = scan_en (video_src) AND frame_drained + logic scan_en=0; wire so_enable = scan_en & fbw_drained; + logic [11:0] px, py; logic vsync, in_win; logic [7:0] so_r, so_g, so_b; + logic so_underflow; logic [31:0] so_rd_errs; logic so_line_valid; + logic [29:0] so_araddr; logic [1:0] so_arburst; logic [6:0] so_arid; logic [7:0] so_arlen; + logic [2:0] so_arsize; logic so_arvalid, so_arready; + logic [255:0] so_rdata; logic [1:0] so_rresp; logic so_rlast, so_rvalid, so_rready; + gs_lpddr_scanout_lb #(.FB_BASE(30'd0), .STRIDE_BYTES(STRIDE), .ROW_BEATS(ROW_BEATS), + .N_ROWS(H), .PSMCT32(1'b1)) u_scan ( + .axi_clk(emif_clk), .axi_rst_n(rst_n), .enable(so_enable), + .video_clk(video_clk), .frame_start(vsync), .pixel_x(px), .pixel_y(py), .in_window(in_win), + .r(so_r), .g(so_g), .b(so_b), .line_valid(so_line_valid), .underflow(so_underflow), .rd_errs(so_rd_errs), + .araddr(so_araddr), .arburst(so_arburst), .arid(so_arid), .arlen(so_arlen), .arsize(so_arsize), + .arvalid(so_arvalid), .arready(so_arready), .rdata(so_rdata), .rresp(so_rresp), + .rlast(so_rlast), .rvalid(so_rvalid), .rready(so_rready) + ); + logic [7:0] rlfsr=8'h3C; always_ff @(posedge emif_clk) rlfsr<={rlfsr[6:0], rlfsr[7]^rlfsr[5]^rlfsr[4]^rlfsr[3]}; + typedef enum logic [1:0] { R_IDLE, R_WAIT, R_DATA } rst_t; rst_t rst_state; + logic [3:0] rdly; logic [29:0] rd_addr_l; int read_beats; + logic [2:0] vs_e; wire vs_edge_e = vs_e[1] && !vs_e[2]; int fb_reads, fb_reads_last; + always_ff @(posedge emif_clk or negedge rst_n) begin + if (!rst_n) begin rst_state<=R_IDLE; so_arready<=0; so_rvalid<=0; so_rlast<=0; so_rresp<=0; so_rdata<=0; rdly<=0; + read_beats<=0; vs_e<=0; fb_reads<=0; fb_reads_last<=0; end + else begin so_arready<=0; so_rvalid<=0; so_rlast<=0; vs_e<={vs_e[1:0], vsync}; + if (vs_edge_e) begin fb_reads_last<=fb_reads; fb_reads<=0; end + case (rst_state) + R_IDLE: if (so_arvalid) begin so_arready<=1; rd_addr_l<=so_araddr; rdly<=rlfsr[2:0]; rst_state<=R_WAIT; end + R_WAIT: if (rdly==0) rst_state<=R_DATA; else rdly<=rdly-1'b1; + R_DATA: if (so_rready) begin + for (int w=0;w<8;w++) begin int aa; aa=rd_addr_l+w*4; + so_rdata[w*32 +: 32] <= (aa+3=H_BP)&&(rawx=V_BP)&&(rawy=V_BP&&rawylow->high, or low->high on first) ---- + task automatic run_scene(input int k, input int exp_records); + int r0, f0, d=0; logic fd_before; + r0=fd_rises; f0=fd_falls; fd_before=fbw_drained; + @(negedge clk); feeder_go_tb=1'b1; @(negedge clk); feeder_go_tb=1'b0; + d=0; while (feeder_ready_tb && d<4000) begin @(posedge clk); d++; end + if (feeder_ready_tb!==1'b0) begin $error("[sched] epoch %0d: feeder_ready did not drop after GO", k); errors++; end + if (fd_before) begin + d=0; while (fd_falls==f0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_falls==f0) begin $error("[sched] epoch %0d: frame_drained never fell from stale high — STALE drain", k); errors++; end + end + d=0; while (fd_rises<=r0 && d<800000) begin @(posedge emif_clk); d++; end + if (fd_rises<=r0) begin $error("[sched] epoch %0d: frame_drained never rose — scene did not drain", k); errors++; end + repeat(100) @(posedge clk); + if (feeder_records_w!==exp_records) begin $error("[sched] epoch %0d: records_emitted=%0d exp %0d", k, feeder_records_w, exp_records); errors++; end + if (fbw_ovf!==0 || fbw_bresp_err!==0) begin $error("[sched] epoch %0d: writer ovf=%0d bresp=%0d", k, fbw_ovf, fbw_bresp_err); errors++; end + $display("[sched] epoch %0d: fresh drain (falls %0d->%0d, rises %0d->%0d), records=%0d, ovf=0", k, f0, fd_falls, r0, fd_rises, feeder_records_w); + endtask + + task automatic fill_cache(input int k, input logic [31:0] exp_crc); + int d=0; + @(posedge clk) fill_start<=1'b1; @(posedge clk) fill_start<=1'b0; + d=0; while (fill_done && d<1000) begin @(posedge clk); d++; end // wait it drops (busy) + d=0; while (!fill_done && d<400000) begin @(posedge clk); d++; end // then rises (done) + if (!fill_done) begin $error("[sched] fill %0d: fill_done never rose (rearm failed)", k); errors++; end + if (fill_crc_w!==exp_crc) begin $error("[sched] fill %0d: crc=%08x exp %08x", k, fill_crc_w, exp_crc); errors++; end + if (fill_beats!==N_BEATS) begin $error("[sched] fill %0d: beats=%0d exp %0d", k, fill_beats, N_BEATS); errors++; end + if (fill_bytes!==TEX_BYTES) begin $error("[sched] fill %0d: bytes=%0d exp %0d", k, fill_bytes, TEX_BYTES); errors++; end + if (tex_rd_errs!==0) begin $error("[sched] fill %0d: rd_errs=%0d", k, tex_rd_errs); errors++; end + $display("[sched] cache fill %0d: fresh done, crc=0x%08x (exp %08x), beats=%0d bytes=%0d rd_errs=0", k, fill_crc_w, exp_crc, fill_beats, fill_bytes); + endtask + + // texel lookup in epoch e's palette (module-level arrays, no per-call copy) + function automatic logic [23:0] cell_e(input int e, input integer u, input integer v); + integer lin; logic [31:0] w; logic [7:0] ix; + lin=v*TW+u; w=idx[e][lin/4]; ix=w[(8*(lin%4)) +: 8]; cell_e=pal[e][ix][23:0]; + endfunction + + // run ONE epoch fully (rebind tex -> fresh fill+CRC -> stream list -> GO -> fresh ordered drain) + task automatic run_epoch(input int k); + string fn; fn=$sformatf("../../data/top_psmct32_raster_demo/sh3_ztrio%0d_tex_lpddr.mem", k); + $readmemh(fn, lpddr_mem); + fill_cache(k, EP_CRC[k]); + stream_list(k); + run_scene(k, EP_REC[k]); + endtask + + string only_m; string fdump; int only_k; // +ONLY=ALL | +ONLY= ; +FBDUMP= + initial begin + errors=0; feeder_go_tb=1'b0; fill_start=1'b0; wr_arm=0; scan_en=0; stg_we=0; stg_waddr=0; stg_wdata=0; cap_fh=0; cap_ep=0; + if (!$value$plusargs("ONLY=%s", only_m)) only_m="ALL"; + only_k = (only_m=="ALL") ? -1 : only_m.atoi(); + for (int i=0;i= %0d)", checked, H_ACT*V_ACT); errors++; end + + // oracle (multi-texture correctness): a covered pixel must equal ONE of the COVERING epochs' texels. Each epoch + // stores its OWN (tu,tv) per pixel in refmap_ep[k]; we accept if the RTL colour matches any covering epoch's texel + // in the <=1-texel neighbourhood (owner-first, then neighbours — handles coverage-edge owner ambiguity between + // adjacent-order epochs, exactly the tolerance Ch355 used). multi-epoch pixels (>=2 covering) scored separately as + // the accumulation composite proof. clut_bad = an RTL-written pixel (ideal!=0) whose colour is in NO epoch palette + // (palettes are pairwise-distinct, so this still proves the pixel came from a real texture+CLUT, not garbage). + begin + int m_tot,m_ok,o_tot,o_ok,cb,D,ncov; bit mt; m_tot=0;m_ok=0;o_tot=0;o_ok=0;cb=0; + for (int y=0;y=0 && e!=only_k) && refmap_ep[e][o][31]) begin + int tu,tv; tu=(refmap_ep[e][o]>>9)&9'h1FF; tv=refmap_ep[e][o]&9'h1FF; ncov++; + for (int rad=0;rad<=1;rad++) for (int du=-rad;du<=rad;du++) for (int dv=-rad;dv<=rad;dv++) begin + int ch; ch=(du<0?-du:du); if((dv<0?-dv:dv)>ch) ch=(dv<0?-dv:dv); + if (ch==rad && (tu+du)>=0 && (tu+du)=0 && (tv+dv)=2 covering) + if (ideal[o]!==32'd0) begin bit f; f=1'b0; + for (int e=0;e=2)=%0d/%0d (%.1f%%) clut_bad=%0d", + only_m, m_ok,m_tot,(m_tot>0)?100.0*m_ok/m_tot:0.0, o_ok,o_tot,(o_tot>0)?100.0*o_ok/o_tot:0.0, cb); + if (cb!==0) begin $error("[sched][oracle] ONLY=%s: %0d covered px in NO epoch palette", only_m, cb); errors++; end + if (only_k<0) begin + if (o_tot<500) begin $error("[sched][oracle] only %0d multi-epoch px — accumulation not exercised", o_tot); errors++; end + // MULTI <=1texel is TEXTURE FIDELITY (RTL 11-bit reciprocal LUT precision), NOT accumulation correctness. + // It tracks the per-epoch isolated fidelity (ONLY=k gives 93.0/93.3/95.6%); the multi-epoch subset sits at + // the same reciprocal floor (~92%). The ACCUMULATION proof is separate and EXACT: compose_sched.py shows + // the joint ALL render == the composited ONLY=k isolation dumps 100% BIT-FOR-BIT. So gate this at the + // documented reciprocal floor, not an accumulation-implying bar. + if (o_tot>0 && (100.0*o_ok/o_tot)<90.0) begin $error("[sched][oracle] MULTI <=1texel %.1f%% < 90%% reciprocal floor", 100.0*o_ok/o_tot); errors++; end + end + end + // FB dump for the composition==isolated check (per-epoch dumps composed externally -> compare vs ALL dump) + if ($value$plusargs("FBDUMP=%s", fdump)) begin + int fh; fh=$fopen(fdump,"w"); + for (int y=0;y %s", W, H, fdump); + end + + $display("[tb_top_psmct32_sh3_ztrio_cap] checked=%0d beats/frame=%0d (exp %0d) fresh_drains(rise/fall)=%0d/%0d records=%0d underflow=%0b ovf=%0d errors=%0d", + checked, fb_reads_last, BEATS_PER_FRAME, fd_rises, fd_falls, feeder_records_w, so_underflow, fbw_ovf, errors); + if (cap_fh!=0) $fclose(cap_fh); + if (errors==0) $display("[tb_top_psmct32_sh3_ztrio_cap] PASS"); else $display("[tb_top_psmct32_sh3_ztrio_cap] FAIL"); + $finish; + end + initial begin #160000000; $error("[tb_top_psmct32_sh3_ztrio_cap] TIMEOUT"); $finish; end +endmodule : tb_top_psmct32_sh3_ztrio_cap diff --git a/synth/de25_nano/top_psmct32_raster_demo/build_quartus.sh b/synth/de25_nano/top_psmct32_raster_demo/build_quartus.sh index f68355e..43bdefd 100755 --- a/synth/de25_nano/top_psmct32_raster_demo/build_quartus.sh +++ b/synth/de25_nano/top_psmct32_raster_demo/build_quartus.sh @@ -69,33 +69,26 @@ echo "" echo "=== Re-baking .mem fixtures ===" make -C "$REPO_ROOT/sim" --no-print-directory top_psmct32_raster_demo_mem -# Quartus runs from the repo root because the QSF references RTL via -# repo-root-relative paths (rtl/...). The project name is the QSF -# basename, but the $QSF_DIR/PROJECT.qsf path is the absolute file. -# Quartus's `-project` flag wants the project base path (no .qsf -# suffix). With Quartus Pro, we run from the project dir and the file -# paths inside the QSF resolve via PROJECT_OUTPUT_DIRECTORY + -# implicit project-relative search. -# -# Strategy: copy the QSF to a working directory at the repo root so -# that (a) the SYSTEMVERILOG_FILE rtl/... paths resolve and (b) -# Quartus puts its db/ and output_files/ under the project dir, not -# the repo root. -WORK_DIR="$QSF_DIR/work" -mkdir -p "$WORK_DIR" -# Symlink the QSF + SDC into the work dir (Quartus reads them from -# the dir it's invoked in by default), then symlink the rtl/ + sim/ -# dirs so the QSF's relative paths resolve. -ln -sfn "$QSF_DIR/$PROJECT.qsf" "$WORK_DIR/$PROJECT.qsf" -ln -sfn "$QSF_DIR/$PROJECT.sdc" "$WORK_DIR/$PROJECT.sdc" -ln -sfn "$REPO_ROOT/rtl" "$WORK_DIR/rtl" -ln -sfn "$REPO_ROOT/sim" "$WORK_DIR/sim" -# Ch161 — IOPLL `.qip` references its synth/ subdir via paths -# relative to the .qip's own location. The QSF's QIP_FILE entry -# uses `ip/pll/pll.qip` (relative to the work dir), so symlink -# the synth-project's `ip/` tree into the work dir alongside -# `rtl/` and `sim/`. -ln -sfn "$QSF_DIR/ip" "$WORK_DIR/ip" +# The QSF deliberately mixes project-relative sources (`rtl/`, `sim/`, +# `qsys/`, `ip/`) with a sibling-repository source path +# (`../../../../retroDE_splash`). Run Quartus from the QSF directory so +# both path families retain their authored meaning. A former nested +# `work/` directory shifted the sibling path by one level and also omitted +# qsys/, making otherwise valid source trees appear missing during +# elaboration. +WORK_DIR="$QSF_DIR" + +for required_path in rtl sim qsys ip; do + if [ ! -e "$WORK_DIR/$required_path" ]; then + echo "error: required Quartus source path missing: $WORK_DIR/$required_path" >&2 + exit 1 + fi +done + +if [ ! -d "$REPO_ROOT/../retroDE_splash" ]; then + echo "error: sibling retroDE_splash checkout is required by the QSF" >&2 + exit 1 +fi cd "$WORK_DIR" @@ -217,7 +210,20 @@ else if run_step "quartus_asm" \ "$QUARTUS/quartus_asm $PROJECT -c $PROJECT" then - ASM_RC=0 + # Direct quartus_asm invocation does not execute the QSF + # POST_FLOW_SCRIPT_FILE hook (that hook is normally dispatched by + # quartus_sh --flow compile). Run it explicitly so a successful + # command-line build always produces the loader-ready split RBF, + # not merely the .sof. + if run_step "post_flow" \ + "$QUARTUS/quartus_sh -t post_flow.tcl quartus_asm $PROJECT $PROJECT" && \ + [ -s "$OUT_DIR/retroDE_ps2.core.rbf" ] + then + ASM_RC=0 + else + ASM_RC=2 + echo "FAIL: assembler completed but loader-ready retroDE_ps2.core.rbf was not produced" + fi else ASM_RC=$? fi @@ -226,8 +232,8 @@ else fi fi -# Move output_files from work dir into the canonical location. -if [ -d "$WORK_DIR/output_files" ]; then +# Move output_files from a distinct work dir into the canonical location. +if [ "$WORK_DIR" != "$QSF_DIR" ] && [ -d "$WORK_DIR/output_files" ]; then rsync -a --remove-source-files "$WORK_DIR/output_files/" "$OUT_DIR/" 2>/dev/null || \ cp -a "$WORK_DIR/output_files/." "$OUT_DIR/" fi diff --git a/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.qsf b/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.qsf index 37d839b..9726f78 100644 --- a/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.qsf +++ b/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.qsf @@ -857,8 +857,8 @@ set_location_assignment PIN_BC67 -to HPS_USB_STP # demos (bios_clut/textured/alpha/zbuffer/triangle/tritex) keep GS_RMW_DEMO # and drop the GS_*_DEMO line entirely. # >>> DE25_PROFILE_FIXTURE (managed by scripts/select_de25_profile.sh — do not hand-edit) >>> -set_global_assignment -name VERILOG_MACRO "TOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE=\"sim/data/top_psmct32_raster_demo/bios_sh3_real.mem\"" -set_global_assignment -name VERILOG_MACRO "TOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE=\"sim/data/top_psmct32_raster_demo/payload_sh3_real.mem\"" +set_global_assignment -name VERILOG_MACRO "TOP_PSMCT32_RASTER_DEMO_BIOS_IMAGE_FILE=\"sim/data/top_psmct32_raster_demo/bios_sh3_zs640c6.mem\"" +set_global_assignment -name VERILOG_MACRO "TOP_PSMCT32_RASTER_DEMO_PAYLOAD_IMAGE_FILE=\"sim/data/top_psmct32_raster_demo/payload_sh3_zs640c6.mem\"" # <<< DE25_PROFILE_FIXTURE <<< set_global_assignment -name VERILOG_MACRO "GS_RMW_DEMO=1" # Ch305: MULTI-PRIMITIVE tiled scene over the 2x2 grid (3 combined prims per tile: @@ -918,9 +918,10 @@ set_global_assignment -name VERILOG_MACRO "GS_RMW_DEMO=1" # to the Ch321 128x128 LPDDR scanout demo: restore GS_TILE_LPDDR128_DEMO=1, drop the # two Ch322 macros, and point the .mem paths back at bios/payload_tile_lpddr128. # >>> DE25_PROFILE_SCENE (managed by scripts/select_de25_profile.sh — do not hand-edit) >>> -set_global_assignment -name VERILOG_MACRO "GS_SH3_REAL_DRAW_DEMO=1" +set_global_assignment -name VERILOG_MACRO "GS_SH3_LPDDR_FB=1" +set_global_assignment -name VERILOG_MACRO "GS_SH3_LPDDR_FB_Z=1" +set_global_assignment -name VERILOG_MACRO "GS_SH3_LPDDR_FB_640=1" set_global_assignment -name VERILOG_MACRO "GS_LPDDR_TEX=1" -set_global_assignment -name VERILOG_MACRO "FEEDER_STG_INIT_FILE=\"sim/data/top_psmct32_raster_demo/feeder_sh3_real.mem\"" # <<< DE25_PROFILE_SCENE <<< set_global_assignment -name VERILOG_MACRO "GS_LPDDR_FB=1" # Ch319 Brick 1 — bring up the FPGA-private LPDDR4B EMIF (EMIF_Qsys) + prove calibration. @@ -978,11 +979,15 @@ set_instance_assignment -name PRESERVE_FANOUT_FREE_NODE ON -to soc_inst|subsys_h # fabric-driven config. # ---------------------------------------------------------------------------- set_global_assignment -name HPS_INITIALIZATION "HPS FIRST" -# Area-focused synthesis — the fitter overflows on LAB capacity (placement), -# not timing (demo clocks are slow, large Fmax margin), so optimize for area -# and let Quartus share arithmetic/resources to recover LABs. +# Area-focused synthesis — the fitter is constrained by LAB placement, so +# optimize for area and permit arithmetic/resource sharing. Ch439f compiled +# AUTO_RESOURCE_SHARING=OFF from fresh synthesis through route and produced an +# identical netlist, resource count, placement, and timing path; sharing was +# therefore not the source of the tap-to-texture-cache STA arc. set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE AREA" set_global_assignment -name AUTO_RESOURCE_SHARING ON +# Ch357 (Codex) — SEED left at default (1): seed 1 gave -0.019 (quasi-static EMIF-lock ONLY, all real datapaths met); +# seed 2 was worse (-0.155, exposed a different marginal path). The last sliver is closed via the scoped false-path in the SDC. set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X4" set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_125MHZ set_global_assignment -name USE_CONF_DONE SDM_IO16 @@ -1026,6 +1031,7 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_persp_uv.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_tile_ram.sv # Brick 2a — alpha-blend (transparency) unit, instantiated inside gs_stub. set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_alpha_blend.sv +set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_lpddr_color_blend.sv # Ch317/Ch318 — LPDDR framebuffer paths. gs_lpddr_axi_master (+ gs_async_fifo) is the # board write path (GS_LPDDR_FB); gs_lpddr_fb_writer is the Ch317 sim model, gen-guarded # OFF (LPDDR_FB_ENABLE=0) in the board build but listed so the source set is complete. @@ -1042,6 +1048,10 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_lpddr_wr_arb.sv # Ch323 — tile COLOR+Z spill/reload (instantiated under GS_TILE_SPILL; idle otherwise). set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_z_flush_writer.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_tile_reload.sv +# Ch357 — persistent-Z ROP (instantiated under GS_SH3_LPDDR_FB_Z; idle otherwise). map_pkg first (package). +set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_lpddr_map_pkg.sv +set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_lpddr_z_rmw.sv +set_global_assignment -name SYSTEMVERILOG_FILE rtl/gif_gs/gs_lpddr_zc_emit.sv # ---------------------------------------------------------------------------- # Design RTL added during the EE/qbert chapters (Ch287+) that reached the demo # hierarchy (via ee_memory_map_stub) but were only added to the SIM build, not @@ -1094,6 +1104,7 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/platform/ps2_hps_bridge_null. # 0x00C CORE_CAPS, 0x010/0x014 CORE_CTRL/CORE_PULSE (read-zero stubs), # 0x020 FRAME_COUNT, 0x024 DMA_DONE_COUNT, 0x028 RASTER_OVERFLOW_COUNT. set_global_assignment -name SYSTEMVERILOG_FILE rtl/platform/ps2_hps_bridge.sv +set_global_assignment -name SYSTEMVERILOG_FILE rtl/platform/clut_stage_cdc.sv # Ch250 — PS2-fabric input consumer. Brings sio2_input_stub onto the # synth top so bridge_input_p1_raw reaches a live fabric reader (Ch234 # built this module sim-only; Ch241 documented that the synth top diff --git a/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.sdc b/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.sdc index b178697..2846b62 100644 --- a/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.sdc +++ b/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.sdc @@ -95,6 +95,24 @@ set_clock_groups -asynchronous \ -group [get_clocks {CLOCK1_50}] \ -group [get_clocks {CLOCK2_50}] +# ---------------------------------------------------------------------------- +# Ch357 (Codex) — the HDMI I2C config FSM's internal work clock. I2C_HDMI_Config +# toggles mI2C_CTRL_CLK every 2501 CLOCK2_50 cycles (mI2C_CLK_DIV counts +# 0..CLK_Freq/I2C_Freq=2500, then resets+toggles), so its FULL period is a +# divide-by-5002 of CLOCK2_50. It clocks the I2C_Controller + the config FSM +# (.CLK(mI2C_CTRL_CLK) / posedge mI2C_CTRL_CLK), so it is a REAL generated clock — +# false-pathing the HDMI *pins* does NOT constrain it, which is why the last STA +# reported it unconstrained. Constrain it (~10 kHz class, trivially met) with a +# FATAL target-count check so a renamed register cannot silently orphan it. No +# extra cross-domain cut is needed: the module is a self-contained CLOCK2_50-rooted +# config sequencer whose only outputs are the already-false-pathed HDMI I2C pins. +# ---------------------------------------------------------------------------- +set i2c_ctrl_clk_reg [get_registers -nowarn {u_hdmi_i2c|mI2C_CTRL_CLK}] +set i2c_ctrl_clk_n [get_collection_size $i2c_ctrl_clk_reg] +if { $i2c_ctrl_clk_n != 1 } { error "Ch357 SDC FATAL: u_hdmi_i2c|mI2C_CTRL_CLK register count $i2c_ctrl_clk_n != 1 (renamed? generated clock would orphan and STA would flag it unconstrained)" } +create_generated_clock -name mI2C_CTRL_CLK -source [get_ports {CLOCK2_50}] -divide_by 5002 $i2c_ctrl_clk_reg +post_message -type info "Ch357 SDC: mI2C_CTRL_CLK generated clock (divide-by-5002 of CLOCK2_50) applied to $i2c_ctrl_clk_n register" + # ---------------------------------------------------------------------------- # Reset synchronizer — async assert, sync deassert. BOTH stages of # `rst_sync` are async-cleared by `(ninit_done | ~pll_locked)`, not @@ -115,6 +133,33 @@ set_clock_groups -asynchronous \ # ---------------------------------------------------------------------------- set_false_path -to [get_registers -nowarn {*rst_sync[*]}] +# HPS CORE_CTRL reset request is a CLOCK2_50-domain level sampled by the +# explicit two-flop hps_reset_sync chain in design_clk. Cut only the first +# synchronizer stage; the second stage remains timed normally. Without this +# CDC exception TimeQuest compares unrelated refclk/outclk edges and reports a +# placement-dependent multi-nanosecond hold violation on an otherwise correct +# synchronizer. +set hps_reset_sync0 [get_registers -nowarn {*hps_reset_sync[0]}] +set hps_reset_sync0_n [get_collection_size $hps_reset_sync0] +if { $hps_reset_sync0_n != 1 } { error "SDC FATAL: hps_reset_sync[0] count $hps_reset_sync0_n != 1" } +set_false_path -to $hps_reset_sync0 +post_message -type info "SDC: HPS core-reset CDC cut to first synchronizer stage ($hps_reset_sync0_n register)" + +# The runtime CLUT commit and OSD tile-write event are bridge/refclk-domain +# toggles received by explicit three-stage design-clock synchronizers. Time +# only stages 1->2 internally; the asynchronous source->stage-0 paths have no +# meaningful setup/hold relationship. Target counts are fatal so hierarchy +# drift cannot silently broaden or orphan these cuts. +set clut_commit_sync0 [get_registers -nowarn {u_runtime_clut|commit_sync[0]}] +set tile_toggle_sync0 [get_registers -nowarn {u_tile_cdc|toggle_sync[0]}] +set clut_commit_sync0_n [get_collection_size $clut_commit_sync0] +set tile_toggle_sync0_n [get_collection_size $tile_toggle_sync0] +if { $clut_commit_sync0_n != 1 } { error "SDC FATAL: CLUT commit synchronizer stage-0 count $clut_commit_sync0_n != 1" } +if { $tile_toggle_sync0_n != 1 } { error "SDC FATAL: tile toggle synchronizer stage-0 count $tile_toggle_sync0_n != 1" } +set_false_path -to $clut_commit_sync0 +set_false_path -to $tile_toggle_sync0 +post_message -type info "SDC: explicit toggle CDC cuts applied to CLUT=$clut_commit_sync0_n tile=$tile_toggle_sync0_n first stages" + # ---------------------------------------------------------------------------- # gs_async_fifo gray-pointer CDC (Ch324). The dual-clock FIFOs (gs_z_flush_writer # color/Z spill, gs_lpddr_axi_master FB writer, scanout) cross design_clk (u_pll, @@ -131,8 +176,23 @@ set_false_path -to [get_registers -nowarn {*rst_sync[*]}] # sync skew well under the fast emif period (3.225 ns) forces the tool to place the gray # bits compactly for EVERY gs_async_fifo instance, so at most one bit is ever in flight -> # the 2-FF synchronizers handle metastability normally. (1.0 ns << both clock periods.) -set_max_skew -from {*wgray[*]} -to {*wgray_s1[*]} 1.0 -set_max_skew -from {*rgray[*]} -to {*rgray_s1[*]} 1.0 +# Ch357 (Codex) — PER-INSTANCE gray-skew. Keep the global 1 ns for every gs_async_fifo EXCEPT the two Z-path FIFOs +# (u_zc_emit request FIFO + its color-writer FIFO): those route into the fast 310 MHz EMIF domain and route+placement +# put them just over 1 ns (worst -0.346). Give THEM a justified 2 ns bound — still < the 3.225 ns fast-source period, so +# at most one gray bit is ever in flight and the 2-FF synchronizers handle metastability normally. Overlapping +# set_max_skew take the TIGHTEST, so the Z FIFOs are CARVED OUT of the global 1 ns set (remove_from_collection) — the +# broad rule must not keep overriding the 2 ns exception. +set z_wgray [get_keepers -nowarn {*u_zc_emit|*wgray[*]}] +set z_rgray [get_keepers -nowarn {*u_zc_emit|*rgray[*]}] +set other_wgray [remove_from_collection [get_keepers -nowarn {*wgray[*]}] $z_wgray] +set other_rgray [remove_from_collection [get_keepers -nowarn {*rgray[*]}] $z_rgray] +set_max_skew -from $other_wgray -to {*wgray_s1[*]} 1.0 +set_max_skew -from $other_rgray -to {*rgray_s1[*]} 1.0 +set_max_skew -from {*u_zc_emit|*wgray[*]} -to {*u_zc_emit|*wgray_s1[*]} 2.0 +set_max_skew -from {*u_zc_emit|*rgray[*]} -to {*u_zc_emit|*rgray_s1[*]} 2.0 +set z_wgray_n [get_collection_size $z_wgray] +set z_rgray_n [get_collection_size $z_rgray] +post_message -type info "Ch357 SDC: gray-skew 1ns global (Z FIFOs carved out), 2ns for $z_wgray_n u_zc_emit wgray + $z_rgray_n rgray bits" # ---------------------------------------------------------------------------- # Ch352 — design fabric <-> EMIF user clock are ASYNCHRONOUS (Codex). Every @@ -154,23 +214,27 @@ set_max_skew -from {*rgray[*]} -to {*rgray_s1[*]} 1.0 # an empty/1-clock collection, the group never activated, and placement burned ~76 # min on the impossible fabric<->emif paths. The collection-size checks are now a # FATAL Tcl `error` (not a warning): a renamed/mistyped clock HALTS SDC immediately. -# Ch352 DIAG — collections + fatal checks DISABLED with their constraints (orphaned otherwise). -# set ch352_fabric_clks [get_clocks -nowarn {u_pll|iopll_0_refclk u_pll|iopll_0_outclk0}] -# set ch352_emif_user [get_clocks -nowarn {u_emif_lpddr4b|iopll|iopll_0_outclk0}] -# Ch352 LEAD CHANGE — false_path (both directions) INSTEAD of set_clock_groups. The clock-group declared the -# EMIF user clock ASYNC to u_pll|iopll_0_refclk = CLOCK2_50 = the EMIF IP's OWN refclk source -# (iopll_refclk_clk(CLOCK2_50)). Declaring a GENERATED clock asynchronous to the clock that GENERATES it is the -# leading suspect for the fitter's pathological Place grind (June-26 placed in 19 min; the only timing-constraint -# deltas since are this group + the gradient multicycle, and "ample RAM still stalled" ruled out congestion). -# false_path CUTS the same fabric<->emif DATA paths — all RTL-synchronized (gray FIFOs + bridge snapshots + the -# gs_lpddr_axi_master commit snapshot) — WITHOUT re-declaring the clock relationship the EMIF IP owns. set_max_skew -# is a separate analysis and survives false_path, so the gray pointers stay bounded. -# Ch352 DIAG (binary SDC-vs-RTL bisect) — fabric<->EMIF cut DISABLED. RTL CDC synchronizers make these crossings -# safe regardless; STA will report the -5.7/-7.5ns false violations, which (like June-26's -66ns) do not block a -# working board. Re-enable after the bisect tells us whether the SDC was the Place grind. -# set_false_path -from $ch352_fabric_clks -to $ch352_emif_user -# set_false_path -from $ch352_emif_user -to $ch352_fabric_clks -# (post_message removed — it falsely claimed false_path was applied while the two lines above are commented out.) +# Ch357 — RESTORED (signoff-clean for the persistent-Z fit). The Ch352 diagnostic/bisect that commented these +# out is over: STA is being closed properly, so the fabric<->EMIF crossings are cut with a TARGETED bidirectional +# set_false_path (NOT the asynchronous clock-group, which declared a generated clock async to its own generator and +# triggered the Place grind). Every fabric<->emif transfer is RTL-synchronized (gray-pointer FIFOs [max_skew below], +# bridge status snapshots/toggle syncs, the gs_lpddr_axi_master commit snapshot + admission-stable AXI, the zc_emit +# request FIFO), so cutting the raw setup/hold analysis on these two clock relationships is correct. set_max_skew is +# a SEPARATE analysis that survives false_path, so the gray pointers stay bounded. +# +# FATAL collection-size checks (Codex): a renamed/mistyped clock would silently orphan the exception and let Place +# churn the impossible fabric<->emif paths, so HALT immediately if the collection sizes are wrong. Clock names pinned +# from the post-fit STA summary: fabric = {u_pll|iopll_0_refclk, u_pll|iopll_0_outclk0} (2), EMIF user = +# {u_emif_lpddr4b|iopll|iopll_0_outclk0} (1). Do NOT wildcard the EMIF PHY/internal clocks — the EMIF IP owns those. +set ch352_fabric_clks [get_clocks -nowarn {u_pll|iopll_0_refclk u_pll|iopll_0_outclk0}] +set ch352_emif_user [get_clocks -nowarn {u_emif_lpddr4b|iopll|iopll_0_outclk0}] +set ch352_fabric_n [get_collection_size $ch352_fabric_clks] +set ch352_emif_n [get_collection_size $ch352_emif_user] +if { $ch352_fabric_n != 2 } { error "Ch352 SDC FATAL: fabric clock collection size $ch352_fabric_n != 2 (clock renamed? fabric<->emif cut would orphan)" } +if { $ch352_emif_n != 1 } { error "Ch352 SDC FATAL: emif user clock collection size $ch352_emif_n != 1 (clock renamed? fabric<->emif cut would orphan)" } +set_false_path -from $ch352_fabric_clks -to $ch352_emif_user +set_false_path -from $ch352_emif_user -to $ch352_fabric_clks +post_message -type info "Ch357 SDC: fabric<->EMIF bidirectional false_path applied (fabric=$ch352_fabric_n clks, emif_user=$ch352_emif_n clk)" # DEFERRED (Codex, acknowledged NOT hidden): the Ch323/324 tile-spill/reload + writer DEBUG counters at # 0x080-0x0FC (spill_*_errs, dbg_z/c_*_count, feeder_addr) are read by the bridge directly from the emif # domain and are now inside the async group above. They are explicitly DEFERRED "stable-after-scene @@ -231,28 +295,225 @@ set_false_path -from [get_ports {HDMI_TX_INT}] set_false_path -to [get_ports {HDMI_MCLK}] # ---------------------------------------------------------------------------- -# Ch352 — triangle-setup gradient divide is a MULTICYCLE path, terminated at ONE -# result register (Codex). gs_stub's gradient solve uses one shared combinational -# signed divide (grad_num_q[grad_step] / grad_det_q); the RTL holds the sources -# stable for GRAD_DIV_CYCLES=4 and captures the settled quotient into grad_result_q, -# which is then written to the selected gradient FIFO on the following (single-cycle) -# cycle. The exception DESTINATION is grad_result_q ALONE (~32 regs) — NOT the -# {*u_gs|fifo_d*} fields. The old fifo_d* wildcard matched 5120 destinations x 837 -# sources (~4M endpoint pairs); the timing-driven placer churned on that matrix -# indefinitely (Place stalled <1% for 50min+). Targeting grad_result_q drops the -# matrix ~160x. The grad_result_q -> fifo write stays an ordinary single-cycle path. +# Ch357 — DS2 (PSX-style SPI) controller pins on the GPIO_0 header, driven by +# ds2_controller at the slow SPI bit-clock (async to design_clk; timing dominated +# by the SPI period, not the fabric clock). Same treatment as the HDMI I2C control +# pins — false-path so STA reports NO unconstrained I2C/DS2 ports (Codex signoff). # ---------------------------------------------------------------------------- -# Bind the collections to variables and make the DESTINATION count fatal: grad_result_q is (* preserve *)'d to -# exactly 32 regs. If synthesis still optimizes/renames it (count != 32) the exception would silently apply to -# NOTHING and Place would churn the -66ns divider — so HALT here (same fail-fast policy as the clock-name checks), -# before A&S->Place, instead of discovering a dead exception 50 minutes into Place. -# Ch352 DIAG — collections + fatal check DISABLED with the multicycle (orphaned otherwise). NOTE: the error -# string above had a Tcl `[31:0]` command-substitution bug that fired during routing once the check tripped. -# set grad_mc_from [get_keepers -nowarn {*u_gs|grad_num_q* *u_gs|grad_det_q* *u_gs|grad_step*}] -# set grad_mc_to [get_keepers -nowarn {*u_gs|grad_result_q*}] -# Ch352 DIAG (binary SDC-vs-RTL bisect) — gradient multicycle DISABLED. The RTL grad_settle holds the divide -# for GRAD_DIV_CYCLES=4 real cycles, so the divider is FUNCTIONALLY correct without this exception; STA will -# report the divide as a -66ns single-cycle path (false — same as June-26, which placed and ran). Re-enable -# after the bisect tells us whether the SDC was the Place grind. -# set_multicycle_path -setup -end 4 -from $grad_mc_from -to $grad_mc_to -# set_multicycle_path -hold -end 3 -from $grad_mc_from -to $grad_mc_to +set_false_path -to [get_ports {GPIO_0_DS2_CLK}] +set_false_path -to [get_ports {GPIO_0_DS2_CMD}] +set_false_path -to [get_ports {GPIO_0_DS2_ATTN}] +set_false_path -from [get_ports {GPIO_0_DS2_DATA}] + +# ---------------------------------------------------------------------------- +# Ch357 (Codex) — tile_ram_cdc bundled-bus CDC. The bridge writes {tile_wr_index, tile_wr_data} as a STABLE bus and the +# receiver samples it into shadow_mem ONLY after a 2-FF-synchronized toggle (tile_ram_cdc.sv:18 guarantees >=2 dclk of +# stability before the sample). So the raw HOLD check bridge->shadow_mem is FALSE (the bus never changes near the capture +# edge). Cut HOLD only (targeted, NOT a blanket clock waiver), and bound the datapath skew so the bus bits still arrive +# compactly inside the stability window. FATAL count checks so a rename can't silently orphan the exception. +# Cut the (spurious) HOLD only, then bound the ACTUAL requirement (Codex): the bus must arrive within the >=2 dclk +# stability window before the synchronized toggle samples it. set_max_skew alone bounds only bit-to-bit spread, NOT +# arrival. NOTE: `set_max_delay -datapath_only` is a Quartus Prime STANDARD option and DOES NOT EXIST in Pro 25.3.1 +# (Error 332000 "Unknown option -datapath_only" aborts the fitter). The Pro-correct tool to bound CDC data-net arrival +# is `set_net_delay -max`, which bounds interconnect (routing) delay from source to destination. So the recipe is: +# HOLD false-path + set_max_skew (bit spread) + set_net_delay -max (arrival). Source = {tile_wr_index[9:0], +# tile_wr_data[31:0]} = 42 simple bridge regs (stable -> exact-count check); dest shadow_mem is M20K (nonzero check). +set tile_cdc_src [get_keepers -nowarn {*u_hps_bridge|tile_wr_data[*] *u_hps_bridge|tile_wr_index[*]}] +set tile_cdc_dst [get_keepers -nowarn {*u_tile_cdc|shadow_mem*}] +set tile_src_n [get_collection_size $tile_cdc_src] +set tile_dst_n [get_collection_size $tile_cdc_dst] +# This optional OSD tile path is correctly absent in profiles where the +# platform overlay is optimized away. Only a one-sided disappearance is an +# orphaned active CDC and therefore fatal; both sides absent needs no cut. +if { $tile_src_n == 0 && $tile_dst_n == 0 } { + post_message -type info "Ch357 SDC: tile_ram_cdc inactive in this profile (0 src, 0 dst)" +} else { + if { $tile_src_n != 42 } { error "Ch357 SDC FATAL: tile_ram_cdc source tile_wr_index+tile_wr_data count $tile_src_n != 42 (10+32; renamed/optimized? hold cut + net_delay would orphan)" } + if { $tile_dst_n == 0 } { error "Ch357 SDC FATAL: tile_ram_cdc dest u_tile_cdc|shadow_mem EMPTY (renamed? hold cut would orphan)" } + set_false_path -hold -from $tile_cdc_src -to $tile_cdc_dst + set_max_skew -from $tile_cdc_src -to $tile_cdc_dst 2.0 + set_net_delay -max -from $tile_cdc_src -to $tile_cdc_dst 2.0 + post_message -type info "Ch357 SDC: tile_ram_cdc hold-false-path + 2ns max_skew + 2ns net_delay ($tile_src_n src -> $tile_dst_n shadow_mem dst)" +} + +# Ch357 (Codex) — osd_cfg QUASI-STATIC config CDC. osd_cfg{0,1}_q (bridge, refclk/fabric domain) cross into +# osd_cfg{0,1}_sync[0] (design_clk, first synchronizer stage; 2-FF, (* dont_merge, preserve *)). The config is quasi- +# static and resolved by the 2-FF sync -> CUT the async crossing INTO stage 0 (setup+hold). Do NOT touch sync[0]->sync[1] +# (the timed MTBF leg). Counts are NONZERO-checked, NOT exact: unused OSD_CFG bits are pruned, so the surviving sync FF +# count is < 64 (dst observed = 35). A nonzero check confirms the pattern binds without ever halting the fit on a count. +set osd_cfg_src [get_keepers -nowarn {*u_hps_bridge|osd_cfg0_q[*] *u_hps_bridge|osd_cfg1_q[*]}] +set osd_cfg_dst [get_keepers -nowarn {*osd_cfg0_sync[0][*] *osd_cfg1_sync[0][*]}] +set osd_src_n [get_collection_size $osd_cfg_src] +set osd_dst_n [get_collection_size $osd_cfg_dst] +if { $osd_src_n == 0 } { post_message -type warning "Ch357 SDC WARN: osd_cfg src pattern matched 0 keepers (renamed? osd_cfg false-path NOT applied)" } +if { $osd_dst_n == 0 } { post_message -type warning "Ch357 SDC WARN: osd_cfg dst pattern matched 0 keepers (renamed? osd_cfg false-path NOT applied)" } +set_false_path -from $osd_cfg_src -to $osd_cfg_dst +post_message -type info "Ch357 SDC: osd_cfg refclk->design_clk synchronizer false-path ($osd_src_n src -> $osd_dst_n stage0 dst)" + +# Ch357 (Codex) — OSD MENU-STATE synchronizers (same quasi-static class as osd_cfg): cursor_row + osd_active cross +# refclk/menu -> design_clk via 2-FF (* dont_merge, preserve *) syncs. They change only on user menu input, never at the +# raster/EMIF rate. Cut the async input INTO the FIRST stage (sync[0]) only; sync[0]->sync[1] stays timed. Using -to (no +# -from) is the canonical synchronizer cut and needs no launch-reg name. Covers cursor_row (the -0.223 hold) + osd_active +# together so a future placement roll can't surface another OSD sync as the next hold. Nonzero-warn (never a fatal). +set osd_msync_dst [get_keepers -nowarn {*cursor_row_sync[0][*] *osd_active_sync[0]}] +set osd_msync_n [get_collection_size $osd_msync_dst] +if { $osd_msync_n == 0 } { post_message -type warning "Ch357 SDC WARN: OSD menu-state sync[0] matched 0 keepers (renamed? cursor_row/osd_active false-path NOT applied)" } +set_false_path -to $osd_msync_dst +post_message -type info "Ch357 SDC: OSD menu-state (cursor_row/osd_active) synchronizer stage-0 false-path ($osd_msync_n sync0 dst)" + +# Ch397 — LPDDR control-commit toggle enters design_clk through a three-flop +# synchronizer. Cut only the asynchronous/quasi-static source -> stage-0 leg; +# commit_d_sync[0] -> [1] -> [2] remains timed for metastability settling. +set lpddr_commit_sync0 [get_keepers -nowarn {*commit_d_sync[0]}] +set lpddr_commit_sync0_n [get_collection_size $lpddr_commit_sync0] +if { $lpddr_commit_sync0_n == 0 } { post_message -type warning "Ch397 SDC WARN: commit_d_sync[0] matched 0 keepers (LPDDR commit sync cut NOT applied)" } +set_false_path -to $lpddr_commit_sync0 +post_message -type info "Ch397 SDC: LPDDR commit synchronizer stage-0 false-path ($lpddr_commit_sync0_n sync0 dst)" + +# Ch439 — LPDDR video-source is a one-bit bundled control crossing from the +# bridge/refclk domain into design_clk. The source is written before +# lpddr_ctrl_commit toggles; vsrc_cap_d samples it only after that toggle has +# traversed commit_d_sync. Consequently the raw zero-cycle HOLD relationship +# between the unrelated clocks is not functional. Cut HOLD only and retain a +# 2 ns interconnect bound so the data remains well inside the commit-toggle +# stability window. Setup remains analyzed. +set lpddr_vsrc_src [get_keepers -nowarn {*u_hps_bridge|lpddr_video_src_q}] +set lpddr_vsrc_dst [get_keepers -nowarn {*vsrc_cap_d}] +set lpddr_vsrc_src_n [get_collection_size $lpddr_vsrc_src] +set lpddr_vsrc_dst_n [get_collection_size $lpddr_vsrc_dst] +if { $lpddr_vsrc_src_n == 0 } { post_message -type warning "Ch439 SDC WARN: LPDDR video-src source matched 0 keepers (bundled-CDC hold cut NOT applied)" } +if { $lpddr_vsrc_dst_n == 0 } { post_message -type warning "Ch439 SDC WARN: vsrc_cap_d matched 0 keepers (bundled-CDC hold cut NOT applied)" } +set_false_path -hold -from $lpddr_vsrc_src -to $lpddr_vsrc_dst +set_net_delay -max -from $lpddr_vsrc_src -to $lpddr_vsrc_dst 2.0 +post_message -type info "Ch439 SDC: LPDDR video-src bundled-CDC hold-false + 2ns net_delay ($lpddr_vsrc_src_n src -> $lpddr_vsrc_dst_n dst)" + +# Ch357 (Codex) — feeder staging BUNDLED-BUS CDC (same shape as tile_ram_cdc). {feeder_waddr_q[11:0], feeder_wdata_q[63:0]} +# = 76 stable bits cross from the bridge (refclk) into the feeder staging RAM (design_clk), sampled ONLY after the +# feeder_stg_we toggle 2-FF-syncs (fdr_we_sync). Cut the spurious HOLD, bound bit spread (max_skew) + arrival (net_delay). +# All counts NONZERO-checked, never exact (no count can halt the fit). Expected src ~76 (waddr 12 + wdata 64); the actual +# is recorded in the post_message. dest = the staging RAM (altsyncram) write registers, nonzero. Also false-path the toggle. +set fdr_cdc_src [get_keepers -nowarn {*u_hps_bridge|feeder_wdata_q[*] *u_hps_bridge|feeder_waddr_q[*]}] +set fdr_cdc_dst [get_keepers -nowarn {*g_feeder*feeder_stg*}] +set fdr_src_n [get_collection_size $fdr_cdc_src] +set fdr_dst_n [get_collection_size $fdr_cdc_dst] +if { $fdr_src_n == 0 } { post_message -type warning "Ch357 SDC WARN: feeder src pattern matched 0 keepers (renamed? feeder-CDC NOT applied)" } +if { $fdr_dst_n == 0 } { post_message -type warning "Ch357 SDC WARN: feeder staging RAM dest EMPTY (pattern *g_feeder*feeder_stg* matched 0 keepers; feeder-CDC hold NOT constrained this run)" } +set_false_path -hold -from $fdr_cdc_src -to $fdr_cdc_dst +set_max_skew -from $fdr_cdc_src -to $fdr_cdc_dst 2.0 +set_net_delay -max -from $fdr_cdc_src -to $fdr_cdc_dst 2.0 +set fdr_tgl_dst [get_keepers -nowarn {*fdr_we_sync[0] *fdr_go_sync[0]}] +if { [get_collection_size $fdr_tgl_dst] > 0 } { set_false_path -to $fdr_tgl_dst } +post_message -type info "Ch357 SDC: feeder staging bundled-CDC hold-false + 2ns max_skew + 2ns net_delay ($fdr_src_n src -> $fdr_dst_n RAM dst)" + +# Ch357 (Codex) — EMIF calibration-ready (lock) -> texture-cache RAM. emif_reset_n is the EMIF's calibrated/ready +# indicator (RTL comment: "low during cal, high when done"): QUASI-STATIC — it asserts once when calibration completes, +# BEFORE any texture access, and never toggles at runtime. Its lock synchronizer (lock_sync_inst|dreg) feeds the tex_mem +# init/reset, leaving a residual ~-0.019ns setup that is functionally irrelevant (the texcache is inactive until cal is +# stable). Cut the NARROWEST possible crossing: from ONLY the EMIF lock-sync node to ONLY the tex_mem endpoints. This is +# NOT a clock-group cut and NOT a multicycle. Nonzero-warn (never fatal) so a rename can't halt the fit. +set emif_lock_src [get_keepers -nowarn {*lock_sync_inst|dreg[*]}] +set tex_mem_dst [get_keepers -nowarn {*u_texcache|tex_mem*}] +set eln [get_collection_size $emif_lock_src] +set tdn [get_collection_size $tex_mem_dst] +if { $eln == 0 } { post_message -type warning "Ch357 SDC WARN: EMIF lock-sync src matched 0 keepers (renamed? lock->tex_mem false-path NOT applied)" } +if { $tdn == 0 } { post_message -type warning "Ch357 SDC WARN: tex_mem dst matched 0 keepers (renamed? lock->tex_mem false-path NOT applied)" } +set_false_path -from $emif_lock_src -to $tex_mem_dst +post_message -type info "Ch357 SDC: EMIF lock-sync -> tex_mem quasi-static false-path ($eln src -> $tdn dst)" + +# Ch439g — the bilinear tap bank is separated from every externally visible +# texture result by tex_color_hold (captured only in BS_DONE, exposed only in +# the following BS_OUT state). RTL has no combinational tap -> tex_rd_addr +# path. Nevertheless Agilex DSP packing creates a conservative STA arc from +# tap[*], through mutually exclusive bilinear/modulation/interpolation DSP +# modes, to tex_mem's registered address port. That address port is enabled +# only by tex_rd_en in BS_ISSUE/nearest-issue cycles; the tap blend is consumed +# only in BS_DONE, so the reported arc can never be captured functionally. +# +# Cut only this impossible launch family into the texture cache. Real address +# timing from walker/UV/perspective registers to tex_mem remains fully timed. +# Fail closed on the exact architectural 4x32 tap register population, and on +# a nonempty cache destination, so hierarchy drift cannot silently broaden or +# orphan the exception. +set ch439_bili_taps [get_registers -nowarn {*u_demo|u_gs|u_tex|g_bilinear.tap[*]}] +set ch439_bili_taps_n [get_collection_size $ch439_bili_taps] +if { $ch439_bili_taps_n != 128 } { error "Ch439g SDC FATAL: bilinear tap register count $ch439_bili_taps_n != 128 (4x32; false-path would orphan or broaden)" } +if { $tdn == 0 } { error "Ch439g SDC FATAL: tex_mem destination collection empty" } +set_false_path -from $ch439_bili_taps -to $tex_mem_dst +post_message -type info "Ch439g SDC: impossible bilinear-tap -> tex_mem packed-DSP arc cut ($ch439_bili_taps_n src -> $tdn dst); all non-tap texture-address launches remain timed" + +# Ch358 (Codex) — the SAME quasi-static EMIF calibration-ready signal also reaches the scanout LINE-BUFFER RAMs +# (26.1 fit at 640x480: lock_sync_inst|dreg[1] -> u_lpddr_scan_lb|lb0/lb1, 10 endpoints at -0.010ns). These are +# startup/reset-derived line-buffer control paths, NOT runtime scanout data (the line buffers are inactive until +# calibration is stable, exactly like tex_mem). Extend the SAME narrow waiver to the lb RAM endpoints ONLY — +# same source collection, endpoints-only dst, nonzero-warn guard; NOT a clock cut, NOT a whole-module waiver. +set scan_lb_dst [get_keepers -nowarn {*u_lpddr_scan_lb|lb*}] +set sln [get_collection_size $scan_lb_dst] +if { $sln == 0 } { post_message -type warning "Ch358 SDC WARN: scanout lb dst matched 0 keepers (renamed? lock->scan_lb false-path NOT applied)" } +set_false_path -from $emif_lock_src -to $scan_lb_dst +post_message -type info "Ch358 SDC: EMIF lock-sync -> u_lpddr_scan_lb|lb* quasi-static false-path ($eln src -> $sln dst)" + +# ---------------------------------------------------------------------------- +# Ch357 (Codex) — triangle-setup gradient divide MULTICYCLE, now with a REGISTERED numerator so both endpoints are +# tiny. The RTL (gs_stub) captures grad_num_q[grad_step] into grad_num_sel_q, holds grad_num_sel_q + grad_det_q stable +# for the GRAD_DIV_CYCLES=5 settle window, captures the quotient into grad_result_q, THEN advances grad_step. So the +# combinational divide is grad_num_sel_q / grad_det_q -> grad_result_q: a clean register->register multicycle. +# +# WHY THIS REPLACES the Ch352 {grad_num_q,grad_det_q,grad_step} -from set: that set matched ~1157 regs (grad_num_q is +# 20x56 bits) x 32 dests = ~37k relaxed paths. Even after Ch352 shrank the DEST side (fifo_d* 5120 -> grad_result_q 32), +# the ~1157-source cone (the 20-way dynamic numerator mux) still made the timing-driven placer churn ~6 h in Place. +# Registering the mux output removes it from the divide's LAUNCH cone: -from is now {grad_num_sel_q, grad_det_q} ~88 +# regs -> ~2.8k pairs (~13x smaller), and the divide is fed by 2 registers, not a 20-way mux. This is a structural fix +# (the mux is gone before the divider), not an SDC negotiation. +# +# FATAL checks (Codex): grad_num_sel_q + grad_det_q are (* preserve *)'d / real regs — HALT if the -from set is EMPTY +# (source orphaned) or the -to grad_result_q count != 32 (dest orphaned), before A&S->Place. Error strings interpolate +# only $vars (no square brackets -> no Tcl command-substitution bug). +# ---------------------------------------------------------------------------- +# CONDITIONAL (Codex): apply the gradient multicycle ONLY when the COMBINATIONAL divider exists. On the board profile +# (GRAD_SEQ_DIVIDER=1) gs_stub's generate strips the `/` entirely and instantiates gs_grad_divider (registered +# iterations) instead — there is no divide cone, so a gradient exception would be meaningless and must NOT be applied. +# Detect the build by the sequential divider's own registers (qbuild/iter live ONLY inside gs_grad_divider). +set seqdiv_regs [get_keepers -nowarn {*u_grad_div|qbuild* *u_grad_div|iter*}] +set seqdiv_n [get_collection_size $seqdiv_regs] +if { $seqdiv_n > 0 } { + # SEQUENTIAL build (board): combinational `/` generate-stripped -> NO gradient exception. + post_message -type info "Ch357 SDC: sequential gradient divider present ($seqdiv_n regs) -> combinational divide absent, NO gradient multicycle applied" +} else { + # COMBINATIONAL build (board): registered-numerator divide grad_num_sel_q/grad_det_q -> grad_result_q. Routed data + # delay was 108.132 ns at 56/32 bits. Ch417 widens the operands to 64/35 bits, so GRAD_DIV_CYCLES=5 gives a + # 200 ns functional window at design_clk = 40 ns (25 MHz). The RTL holds the sources for all five cycles before + # capturing grad_result_q; final STA therefore fail-closes the widened cone against the real 200 ns contract. + # + # STA-ONLY multicycle (Codex, 2026-07-05; widened Ch417 contract): setup=5/hold=4 is applied ONLY during final quartus_sta, + # NOT during quartus_fit. During the fit, a gradient multicycle makes the timing-driven placer treat the ~108 ns + # combinational divide as a "closeable" cone and GRIND (proven twice: 6 h and 13 min). Without it the fitter keeps + # its known-CONVERGENT "hopeless single-cycle" behavior (drops the path, places in seconds). Final quartus_sta then + # applies the multicycle and fail-closes against the real 200 ns window. Fatal source/dest + # collection checks live in this STA-only branch too. grad_result_q replicates for fanout during P&R (32 -> 55), so + # the dest check is ">= 32" (preserve blocks REMOVAL, not duplication), not "== 32". + if { [string match "quartus_sta*" $::quartus(nameofexecutable)] } { + set grad_mc_from [get_keepers -nowarn {*u_gs|grad_num_sel_q* *u_gs|grad_det_q*}] + set grad_mc_to [get_keepers -nowarn {*u_gs|grad_result_q*}] + set grad_from_n [get_collection_size $grad_mc_from] + set grad_to_n [get_collection_size $grad_mc_to] + # -to grad_result_q ONLY (no -from): the Agilex Hyper-Retimer pushes a register INTO the LPM divider + # (div_*_rtl_0|...|my_abs_den|dff), so the worst combinational launch is that INTERNAL register, NOT grad_num_sel_q. + # The named source set is diagnostics only; it may be optimized away while the retimed destination and its real + # divide cone survive. Keep the actual destination constraint in that case. If BOTH source tracking and the + # destination are absent, this profile has no combinational divider and no multicycle is needed. + if { $grad_to_n == 0 } { + post_message -type info "Ch357 SDC: gradient combinational divider inactive in this profile (0 grad_result_q destinations)" + } else { + if { $grad_to_n < 32 } { error "Ch357 SDC FATAL: grad_result_q destination count $grad_to_n < 32 (preserve lost? multicycle would orphan)" } + set_multicycle_path -setup -end 5 -to $grad_mc_to + set_multicycle_path -hold -end 4 -to $grad_mc_to + if { $grad_from_n == 0 } { + post_message -type warning "Ch357 SDC: grad_num_sel_q/grad_det_q tracker optimized away; retained destination-only gradient multicycle on $grad_to_n grad_result_q registers" + } else { + post_message -type info "Ch417 SDC (STA-only): widened gradient multicycle setup=5/hold=4 -to grad_result_q ($grad_to_n regs, all launches incl. retimed divider internals) — 200ns functional window; source set grad_num_sel_q+grad_det_q = $grad_from_n regs" + } + } + } else { + post_message -type info "Ch417 SDC (fit stage): gradient multicycle NOT applied (STA-only) -> fitter keeps convergent single-cycle behavior; final quartus_sta fail-closes the widened divide at the 200ns 5-cycle window" + } +} diff --git a/synth/de25_nano/top_psmct32_raster_demo/serv_req_info.txt b/synth/de25_nano/top_psmct32_raster_demo/serv_req_info.txt index 6696e8f..79477ae 100644 --- a/synth/de25_nano/top_psmct32_raster_demo/serv_req_info.txt +++ b/synth/de25_nano/top_psmct32_raster_demo/serv_req_info.txt @@ -1,37 +1,42 @@ ERR - 0x7f3a10511fd8: fitter_fitcc + 0x111fd8 (_ZN9FITCC_ENVC2EP10CMP_FACADEiPFP12FITCC_DEVICEPS_E + 0x1158) - 0x7f3a11701e54: fitter_fdrgn + 0x101e54 (_Z23fdrgn_initialize_fitterP10CMP_FACADEb + 0xa4) - 0x7f39fab870c8: comp_fit2 + 0x320c8 (fit2_create_fitter_netlist + 0x20e6) - 0x7f3a3f2a8b47: tcl8.6 + 0x4bb47 (TclNRRunCallbacks + 0x67) - 0x7f3a3f2a9f29: tcl8.6 + 0x4cf29 (TclEvalEx + 0x599) - 0x7f3a3f2aa646: tcl8.6 + 0x4d646 (Tcl_EvalEx + 0x16) - 0x7f3a3fce51e1: ccl_atcl + 0x331e1 (_Z13atcl_tcl_evalP10Tcl_InterpRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEb + 0x1c1) - 0x7f39fabd4563: comp_fit2 + 0x7f563 (_Z30fit2_run_create_fitter_netlistP10Tcl_InterpRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEER9ATCL_ARGSRib + 0x98b) - 0x7f39fab9bd9b: comp_fit2 + 0x46d9b (fit2_fit_plan + 0x2dd) - 0x7f3a3f2a8b47: tcl8.6 + 0x4bb47 (TclNRRunCallbacks + 0x67) - 0x7f3a3f2a9f29: tcl8.6 + 0x4cf29 (TclEvalEx + 0x599) - 0x7f3a3f3510de: tcl8.6 + 0xf40de (Tcl_FSEvalFileEx + 0x21e) - 0x7f3a3f351226: tcl8.6 + 0xf4226 (Tcl_EvalFile + 0x26) - 0x7f3a406f7a6b: comp_qexe + 0x2ba6b (_Z24qexe_evaluate_tcl_scriptRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE + 0x3b8) - 0x7f3a406fa17c: comp_qexe + 0x2e17c (_ZL11qexe_do_tclP14QEXE_FRAMEWORKRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES8_RKNS1_4listIS6_SaIS6_EEEbb + 0x7bb) - 0x7f3a406fb4db: comp_qexe + 0x2f4db (_Z19qexe_run_tcl_optionP14QEXE_FRAMEWORKPKcPNSt7__cxx114listINS3_12basic_stringIcSt11char_traitsIcESaIcEEESaIS9_EEEb + 0xa38) - 0x7f3a405ecdfc: comp_qcu + 0x8edfc (_ZN3QCU6DETAIL26intialise_qhd_and_run_qexeER13QCU_FRAMEWORKRK8FIO_PATHRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESD_PKcPNS6_4listISB_SaISB_EEEb + 0x99) - 0x7f3a405ed143: comp_qcu + 0x8f143 (_Z18qcu_run_tcl_optionP13QCU_FRAMEWORKPKcPNSt7__cxx114listINS3_12basic_stringIcSt11char_traitsIcESaIcEEESaIS9_EEEb + 0x2c5) - 0x7f3a40701b92: comp_qexe + 0x35b92 (_Z18qexe_standard_mainP14QEXE_FRAMEWORKPPK22QEXE_OPTION_DEFINITIONiPPKc + 0x1589) - 0x40bf79: quartus_fit + 0x40bf79 (_Z10qfit2_mainiPPKc + 0x99) - 0x7f3a400e3e4c: ccl_msg + 0x44e4c (_Z15msg_main_threadPv + 0x10) - 0x7f3a400e58f9: ccl_msg + 0x468f9 (_Z18msg_thread_wrapperPFPvS_ES_ + 0x8c) - 0x7f3a4052175d: ccl_mem + 0x1375d (_Z18mem_thread_wrapperPFPvS_ES_ + 0x9d) - 0x7f3a296882c8: ccl_err + 0xe2c8 (_Z18err_thread_wrapperPFPvS_ES_ + 0x1e) - 0x7f3a400e4646: ccl_msg + 0x45646 (_Z12msg_exe_mainiPPKcPFiiS1_E + 0xc2) - 0x7f3a3a22a1ca: c + 0x2a1ca - 0x7f3a3a22a28b: c + 0x2a28b (__libc_start_main + 0x8b) - 0x404e1a: quartus_fit + 0x404e1a (_start + 0x2a) + 0x74bed1866211: synth_vrfx2 + 0x866211 (_ZN8VRFX_DDM22create_gtn_assignmentsEv + 0xd9f) + 0x74bed1878597: synth_vrfx2 + 0x878597 (_ZN8VRFX_DDM18process_attributesEv + 0x581) + 0x74bed188b73b: synth_vrfx2 + 0x88b73b (_ZN8VRFX_DDM15convert_netlistEPN17VRFX2_TOPDOWN_MGR15ELAB_INST_ENTRYE + 0x6e5) + 0x74bed188c525: synth_vrfx2 + 0x88c525 (_Z30vrfx2_ddm_convert_all_netlistsP20BASEX_ELABORATE_INFOP7NetlistPN11new_verific30VRFX2_ENTITY_EXISTENCE_CHECKERE + 0x83d) + 0x74bed18e839e: synth_vrfx2 + 0x8e839e (_ZN11new_verific15VRFX2_EXTRACTOR17extract_hierarchyEPKcRKSt6vectorIP12BASEX_ENTITYSaIS5_EEP20BASEX_ELABORATE_INFObbbbbb + 0x2180) + 0x74bef09452b6: synth_qis + 0x1452b6 (_ZN13QIS_RTL_STAGE4IMPL17elaborate_verificEP13QHD_PARTITIONP12BASEX_ENTITYR20BASEX_ELAB_INFO_CORERKSt6vectorIS4_SaIS4_EEb + 0x302) + 0x74bef098bd1d: synth_qis + 0x18bd1d (_ZN13QIS_RTL_STAGE4IMPL20elaborate_ddm_moduleEP10DDM_MODULEP12BASEX_ENTITYRKSt6vectorIS4_SaIS4_EERS5_IS2_SaIS2_EE + 0xdf) + 0x74bef098c8b4: synth_qis + 0x18c8b4 (_ZN13QIS_RTL_STAGE4IMPL13elaborate_ddmEP10DDM_MODULE + 0x3d8) + 0x74bef09938d9: synth_qis + 0x1938d9 (_ZN13QIS_RTL_STAGE4IMPL13elaborate_ddmEv + 0x3bd) + 0x74bef0994072: synth_qis + 0x194072 (_ZN13QIS_RTL_STAGE13elaborate_ddmEv + 0xc) + 0x74beb1267cd0: synth_scmd + 0x3dcd0 (_ZN14SCMD_ELABORATE7executeEP10Tcl_InterpR9DTCL_ARGS + 0x65c) + 0x74bed539d931: mss_dtcl + 0xc931 (_ZN16DTCL_COMMAND_PKG8eval_cmdEPvP10Tcl_InterpiPKP7Tcl_Obj + 0xb7) + 0x74beee2a8b47: tcl8.6 + 0x4bb47 (TclNRRunCallbacks + 0x67) + 0x74beee2a9f29: tcl8.6 + 0x4cf29 (TclEvalEx + 0x599) + 0x74beee3510de: tcl8.6 + 0xf40de (Tcl_FSEvalFileEx + 0x21e) + 0x74beee351226: tcl8.6 + 0xf4226 (Tcl_EvalFile + 0x26) + 0x74bef19ada6b: comp_qexe + 0x2ba6b (_Z24qexe_evaluate_tcl_scriptRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE + 0x3b8) + 0x74bef19b017c: comp_qexe + 0x2e17c (_ZL11qexe_do_tclP14QEXE_FRAMEWORKRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES8_RKNS1_4listIS6_SaIS6_EEEbb + 0x7bb) + 0x74bef19b14db: comp_qexe + 0x2f4db (_Z19qexe_run_tcl_optionP14QEXE_FRAMEWORKPKcPNSt7__cxx114listINS3_12basic_stringIcSt11char_traitsIcESaIcEEESaIS9_EEEb + 0xa38) + 0x74bef1be0dfc: comp_qcu + 0x8edfc (_ZN3QCU6DETAIL26intialise_qhd_and_run_qexeER13QCU_FRAMEWORKRK8FIO_PATHRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESD_PKcPNS6_4listISB_SaISB_EEEb + 0x99) + 0x74bef1be1143: comp_qcu + 0x8f143 (_Z18qcu_run_tcl_optionP13QCU_FRAMEWORKPKcPNSt7__cxx114listINS3_12basic_stringIcSt11char_traitsIcESaIcEEESaIS9_EEEb + 0x2c5) + 0x407735: quartus_syn + 0x407735 (_ZL37qsyn2_tcl_process_default_flow_option22ACF_VARIABLE_TYPE_ENUMPKc + 0x575) + 0x74bef19b7b92: comp_qexe + 0x35b92 (_Z18qexe_standard_mainP14QEXE_FRAMEWORKPPK22QEXE_OPTION_DEFINITIONiPPKc + 0x1589) + 0x40709e: quartus_syn + 0x40709e (_Z10qsyn2_mainiPPKc + 0x155) + 0x74bef02e3e4c: ccl_msg + 0x44e4c (_Z15msg_main_threadPv + 0x10) + 0x74bef02e58f9: ccl_msg + 0x468f9 (_Z18msg_thread_wrapperPFPvS_ES_ + 0x8c) + 0x74bef117b75d: ccl_mem + 0x1375d (_Z18mem_thread_wrapperPFPvS_ES_ + 0x9d) + 0x74bed5a7e2c8: ccl_err + 0xe2c8 (_Z18err_thread_wrapperPFPvS_ES_ + 0x1e) + 0x74bef02e4646: ccl_msg + 0x45646 (_Z12msg_exe_mainiPPKcPFiiS1_E + 0xc2) + 0x406f42: quartus_syn + 0x406f42 (main + 0x26) + 0x74beea82a1ca: c + 0x2a1ca + 0x74beea82a28b: c + 0x2a28b (__libc_start_main + 0x8b) + 0x406e6a: quartus_syn + 0x406e6a (_start + 0x2a) - *** Fatal Error: Neither FAST FIT nor AUTO FIT is not supported by this family, but FAST FIT is requested in QSF - Mon Jun 29 05:22:29 2026 + *** Fatal Error: net + Sat Jul 11 17:34:52 2026 Version 26.1.0 Build 110 03/26/2026 SC Pro Edition diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_pa9f.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_pa9f.tdf deleted file mode 100644 index f2f82cf..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_pa9f.tdf +++ /dev/null @@ -1,154 +0,0 @@ ---a_dpfifo ADD_RAM_OUTPUT_REGISTER="ON" ALLOW_RWCYCLE_WHEN_FULL="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LPM_NUMWORDS=32 LPM_SHOWAHEAD="ON" lpm_width=9 lpm_widthu=5 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" clock data empty full q rreq sclr usedw wreq ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" INTENDED_DEVICE_FAMILY="Agilex" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_counter 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_fifo_common 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_counter 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_scfifo 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_counter (clk, enable, reset, sreset, updown) -WITH ( DIRECTION, MODULUS, WIDTH = 6) -RETURNS ( count[WIDTH-1..0], cout); -FUNCTION altera_syncram_4kqp (address_a[4..0], address_b[4..0], clock0, clock1, clocken1, data_a[8..0], wren_a) -RETURNS ( q_b[8..0]); -FUNCTION cmpr_jdut1 (dataa[4..0], datab[4..0]) -RETURNS ( aeb); - ---synthesis_resources = altera_counter 3 ram_bits (AUTO) 288 reg 13 -SUBDESIGN a_dpfifo_pa9f -( - clock : input; - data[8..0] : input; - empty : output; - full : output; - q[8..0] : output; - rreq : input; - sclr : input; - usedw[4..0] : output; - wreq : input; -) -VARIABLE - rd_ptr_msb : altera_counter - WITH ( - DIRECTION = "UP", - WIDTH = 4 - ); - usedw_counter : altera_counter - WITH ( - DIRECTION = "UPDOWN", - WIDTH = 5 - ); - wr_ptr : altera_counter - WITH ( - DIRECTION = "UP", - WIDTH = 5 - ); - FIFOram : altera_syncram_4kqp; - empty_dff : dffe; - full_dff : dffe; - low_addressa[4..0] : dffe; - rd_ptr_lsb : dffe; - usedw_is_0_dff : dffe; - usedw_is_1_dff : dffe; - usedw_is_2_dff : dffe; - wrreq_delaya[1..0] : dffe; - almost_full_comparer : cmpr_jdut1; - three_comparison : cmpr_jdut1; - aclr : NODE; - asynch_read_counter_enable : WIRE; - empty_out : WIRE; - full_out : WIRE; - pulse_ram_output : WIRE; - ram_read_address[4..0] : WIRE; - rd_ptr[4..0] : WIRE; - usedw_is_0 : WIRE; - usedw_is_1 : WIRE; - usedw_is_2 : WIRE; - usedw_will_be_0 : WIRE; - usedw_will_be_1 : WIRE; - usedw_will_be_2 : WIRE; - valid_rreq : WIRE; - valid_wreq : WIRE; - wait_state : WIRE; - -BEGIN - rd_ptr_msb.clk = clock; - rd_ptr_msb.enable = (asynch_read_counter_enable & (! rd_ptr_lsb.q)); - rd_ptr_msb.sreset = sclr; - usedw_counter.clk = clock; - usedw_counter.enable = (valid_wreq $ valid_rreq); - usedw_counter.sreset = sclr; - usedw_counter.updown = valid_wreq; - wr_ptr.clk = clock; - wr_ptr.enable = valid_wreq; - wr_ptr.sreset = sclr; - FIFOram.address_a[] = wr_ptr.count[]; - FIFOram.address_b[] = ram_read_address[]; - FIFOram.clock0 = clock; - FIFOram.clock1 = clock; - FIFOram.clocken1 = pulse_ram_output; - FIFOram.data_a[] = data[]; - FIFOram.wren_a = valid_wreq; - empty_dff.clk = clock; - empty_dff.clrn = (! aclr); - empty_dff.d = ((! (usedw_will_be_0 # wait_state)) & (! sclr)); - full_dff.clk = clock; - full_dff.clrn = (! aclr); - full_dff.d = ((! sclr) & (((valid_wreq & (! valid_rreq)) & almost_full_comparer.aeb) # (full_dff.q & (! (valid_wreq $ valid_rreq))))); - low_addressa[].clk = clock; - low_addressa[].clrn = (! aclr); - low_addressa[].d = ((! sclr) & ((asynch_read_counter_enable & rd_ptr[]) # ((! asynch_read_counter_enable) & low_addressa[].q))); - rd_ptr_lsb.clk = clock; - rd_ptr_lsb.clrn = (! aclr); - rd_ptr_lsb.d = ((! rd_ptr_lsb.q) & (! sclr)); - rd_ptr_lsb.ena = (asynch_read_counter_enable # sclr); - usedw_is_0_dff.clk = clock; - usedw_is_0_dff.clrn = (! aclr); - usedw_is_0_dff.d = (! usedw_will_be_0); - usedw_is_1_dff.clk = clock; - usedw_is_1_dff.clrn = (! aclr); - usedw_is_1_dff.d = usedw_will_be_1; - usedw_is_2_dff.clk = clock; - usedw_is_2_dff.clrn = (! aclr); - usedw_is_2_dff.d = usedw_will_be_2; - wrreq_delaya[].clk = clock; - wrreq_delaya[].clrn = (! aclr); - wrreq_delaya[].d = ( ((! sclr) & valid_wreq), ((! sclr) & wrreq_delaya[1].q)); - almost_full_comparer.dataa[] = B"11111"; - almost_full_comparer.datab[] = usedw_counter.count[]; - three_comparison.dataa[] = usedw_counter.count[]; - three_comparison.datab[] = B"00011"; - aclr = GND; - asynch_read_counter_enable = pulse_ram_output; - empty = empty_out; - empty_out = (! empty_dff.q); - full = full_out; - full_out = full_dff.q; - pulse_ram_output = ((((usedw_is_1 & wrreq_delaya[0].q) # ((usedw_is_2 & wrreq_delaya[1].q) & wrreq_delaya[0].q)) # ((! (usedw_is_1 # usedw_is_2)) & valid_rreq)) # ((usedw_is_2 & (! wrreq_delaya[1].q)) & valid_rreq)); - q[] = FIFOram.q_b[]; - ram_read_address[] = (((! asynch_read_counter_enable) & low_addressa[].q) # (asynch_read_counter_enable & rd_ptr[])); - rd_ptr[] = ( rd_ptr_msb.count[], (! rd_ptr_lsb.q)); - usedw[] = usedw_counter.count[]; - usedw_is_0 = (! usedw_is_0_dff.q); - usedw_is_1 = usedw_is_1_dff.q; - usedw_is_2 = usedw_is_2_dff.q; - usedw_will_be_0 = (! ((! sclr) & (! (((usedw_is_1 & valid_rreq) & (! valid_wreq)) # (usedw_is_0 & (! (valid_wreq $ valid_rreq))))))); - usedw_will_be_1 = ((! sclr) & (((usedw_is_1 & (! (valid_wreq $ valid_rreq))) # ((usedw_is_0 & valid_wreq) & (! valid_rreq))) # ((usedw_is_2 & valid_rreq) & (! valid_wreq)))); - usedw_will_be_2 = ((! sclr) & (((usedw_is_2_dff.q & (! (valid_wreq $ valid_rreq))) # ((usedw_is_1 & valid_wreq) & (! valid_rreq))) # ((three_comparison.aeb & valid_rreq) & (! valid_wreq)))); - valid_rreq = rreq; - valid_wreq = wreq; - wait_state = ((usedw_will_be_1 & (valid_wreq $ wrreq_delaya[1].q)) # ((usedw_will_be_2 & valid_wreq) & wrreq_delaya[1].q)); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_rntb1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_rntb1.tdf deleted file mode 100644 index 46bf43d..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/a_dpfifo_rntb1.tdf +++ /dev/null @@ -1,154 +0,0 @@ ---a_dpfifo ADD_RAM_OUTPUT_REGISTER="ON" ALLOW_RWCYCLE_WHEN_FULL="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LPM_NUMWORDS=32 LPM_SHOWAHEAD="ON" lpm_width=266 lpm_widthu=5 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" clock data empty full q rreq sclr usedw wreq ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" INTENDED_DEVICE_FAMILY="Agilex" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_counter 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_fifo_common 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_counter 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_scfifo 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_counter (clk, enable, reset, sreset, updown) -WITH ( DIRECTION, MODULUS, WIDTH = 6) -RETURNS ( count[WIDTH-1..0], cout); -FUNCTION altera_syncram_k8rl1 (address_a[4..0], address_b[4..0], clock0, clock1, clocken1, data_a[265..0], wren_a) -RETURNS ( q_b[265..0]); -FUNCTION cmpr_jdut1 (dataa[4..0], datab[4..0]) -RETURNS ( aeb); - ---synthesis_resources = altera_counter 3 ram_bits (AUTO) 8512 reg 13 -SUBDESIGN a_dpfifo_rntb1 -( - clock : input; - data[265..0] : input; - empty : output; - full : output; - q[265..0] : output; - rreq : input; - sclr : input; - usedw[4..0] : output; - wreq : input; -) -VARIABLE - rd_ptr_msb : altera_counter - WITH ( - DIRECTION = "UP", - WIDTH = 4 - ); - usedw_counter : altera_counter - WITH ( - DIRECTION = "UPDOWN", - WIDTH = 5 - ); - wr_ptr : altera_counter - WITH ( - DIRECTION = "UP", - WIDTH = 5 - ); - FIFOram : altera_syncram_k8rl1; - empty_dff : dffe; - full_dff : dffe; - low_addressa[4..0] : dffe; - rd_ptr_lsb : dffe; - usedw_is_0_dff : dffe; - usedw_is_1_dff : dffe; - usedw_is_2_dff : dffe; - wrreq_delaya[1..0] : dffe; - almost_full_comparer : cmpr_jdut1; - three_comparison : cmpr_jdut1; - aclr : NODE; - asynch_read_counter_enable : WIRE; - empty_out : WIRE; - full_out : WIRE; - pulse_ram_output : WIRE; - ram_read_address[4..0] : WIRE; - rd_ptr[4..0] : WIRE; - usedw_is_0 : WIRE; - usedw_is_1 : WIRE; - usedw_is_2 : WIRE; - usedw_will_be_0 : WIRE; - usedw_will_be_1 : WIRE; - usedw_will_be_2 : WIRE; - valid_rreq : WIRE; - valid_wreq : WIRE; - wait_state : WIRE; - -BEGIN - rd_ptr_msb.clk = clock; - rd_ptr_msb.enable = (asynch_read_counter_enable & (! rd_ptr_lsb.q)); - rd_ptr_msb.sreset = sclr; - usedw_counter.clk = clock; - usedw_counter.enable = (valid_wreq $ valid_rreq); - usedw_counter.sreset = sclr; - usedw_counter.updown = valid_wreq; - wr_ptr.clk = clock; - wr_ptr.enable = valid_wreq; - wr_ptr.sreset = sclr; - FIFOram.address_a[] = wr_ptr.count[]; - FIFOram.address_b[] = ram_read_address[]; - FIFOram.clock0 = clock; - FIFOram.clock1 = clock; - FIFOram.clocken1 = pulse_ram_output; - FIFOram.data_a[] = data[]; - FIFOram.wren_a = valid_wreq; - empty_dff.clk = clock; - empty_dff.clrn = (! aclr); - empty_dff.d = ((! (usedw_will_be_0 # wait_state)) & (! sclr)); - full_dff.clk = clock; - full_dff.clrn = (! aclr); - full_dff.d = ((! sclr) & (((valid_wreq & (! valid_rreq)) & almost_full_comparer.aeb) # (full_dff.q & (! (valid_wreq $ valid_rreq))))); - low_addressa[].clk = clock; - low_addressa[].clrn = (! aclr); - low_addressa[].d = ((! sclr) & ((asynch_read_counter_enable & rd_ptr[]) # ((! asynch_read_counter_enable) & low_addressa[].q))); - rd_ptr_lsb.clk = clock; - rd_ptr_lsb.clrn = (! aclr); - rd_ptr_lsb.d = ((! rd_ptr_lsb.q) & (! sclr)); - rd_ptr_lsb.ena = (asynch_read_counter_enable # sclr); - usedw_is_0_dff.clk = clock; - usedw_is_0_dff.clrn = (! aclr); - usedw_is_0_dff.d = (! usedw_will_be_0); - usedw_is_1_dff.clk = clock; - usedw_is_1_dff.clrn = (! aclr); - usedw_is_1_dff.d = usedw_will_be_1; - usedw_is_2_dff.clk = clock; - usedw_is_2_dff.clrn = (! aclr); - usedw_is_2_dff.d = usedw_will_be_2; - wrreq_delaya[].clk = clock; - wrreq_delaya[].clrn = (! aclr); - wrreq_delaya[].d = ( ((! sclr) & valid_wreq), ((! sclr) & wrreq_delaya[1].q)); - almost_full_comparer.dataa[] = B"11111"; - almost_full_comparer.datab[] = usedw_counter.count[]; - three_comparison.dataa[] = usedw_counter.count[]; - three_comparison.datab[] = B"00011"; - aclr = GND; - asynch_read_counter_enable = pulse_ram_output; - empty = empty_out; - empty_out = (! empty_dff.q); - full = full_out; - full_out = full_dff.q; - pulse_ram_output = ((((usedw_is_1 & wrreq_delaya[0].q) # ((usedw_is_2 & wrreq_delaya[1].q) & wrreq_delaya[0].q)) # ((! (usedw_is_1 # usedw_is_2)) & valid_rreq)) # ((usedw_is_2 & (! wrreq_delaya[1].q)) & valid_rreq)); - q[] = FIFOram.q_b[]; - ram_read_address[] = (((! asynch_read_counter_enable) & low_addressa[].q) # (asynch_read_counter_enable & rd_ptr[])); - rd_ptr[] = ( rd_ptr_msb.count[], (! rd_ptr_lsb.q)); - usedw[] = usedw_counter.count[]; - usedw_is_0 = (! usedw_is_0_dff.q); - usedw_is_1 = usedw_is_1_dff.q; - usedw_is_2 = usedw_is_2_dff.q; - usedw_will_be_0 = (! ((! sclr) & (! (((usedw_is_1 & valid_rreq) & (! valid_wreq)) # (usedw_is_0 & (! (valid_wreq $ valid_rreq))))))); - usedw_will_be_1 = ((! sclr) & (((usedw_is_1 & (! (valid_wreq $ valid_rreq))) # ((usedw_is_0 & valid_wreq) & (! valid_rreq))) # ((usedw_is_2 & valid_rreq) & (! valid_wreq)))); - usedw_will_be_2 = ((! sclr) & (((usedw_is_2_dff.q & (! (valid_wreq $ valid_rreq))) # ((usedw_is_1 & valid_wreq) & (! valid_rreq))) # ((three_comparison.aeb & valid_rreq) & (! valid_wreq)))); - valid_rreq = rreq; - valid_wreq = wreq; - wait_state = ((usedw_will_be_1 & (valid_wreq $ wrreq_delaya[1].q)) # ((usedw_will_be_2 & valid_wreq) & wrreq_delaya[1].q)); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/abs_divider_nsr72.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/abs_divider_nsr72.tdf deleted file mode 100644 index 6993ea0..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/abs_divider_nsr72.tdf +++ /dev/null @@ -1,89 +0,0 @@ ---abs_divider CBX_SINGLE_OUTPUT_FILE="OFF" DEN_REPRESENTATION="SIGNED" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="SIGNED" SKIP_BITS=0 WIDTH_D=32 WIDTH_N=33 denominator numerator quotient remainder ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION alt_u_div_6gam1 (denominator[31..0], numerator[32..0]) -RETURNS ( quotient[32..0], remainder[31..0]); -FUNCTION lpm_abs_unir (data[31..0]) -RETURNS ( overflow, result[31..0]); -FUNCTION lpm_abs_952f1 (data[32..0]) -RETURNS ( overflow, result[32..0]); - ---synthesis_resources = lut 724 -SUBDESIGN abs_divider_nsr72 -( - denominator[31..0] : input; - numerator[32..0] : input; - quotient[32..0] : output; - remainder[31..0] : output; -) -VARIABLE - divider : alt_u_div_6gam1; - my_abs_den : lpm_abs_unir; - my_abs_num : lpm_abs_952f1; - compl_add_quot_result_int[33..0] : WIRE; - compl_add_quot_cin : WIRE; - compl_add_quot_dataa[32..0] : WIRE; - compl_add_quot_datab[32..0] : WIRE; - compl_add_quot_result[32..0] : WIRE; - compl_add_rem_result_int[32..0] : WIRE; - compl_add_rem_cin : WIRE; - compl_add_rem_dataa[31..0] : WIRE; - compl_add_rem_datab[31..0] : WIRE; - compl_add_rem_result[31..0] : WIRE; - diff_signs : WIRE; - gnd_wire : WIRE; - neg_quot[32..0] : WIRE; - neg_rem[31..0] : WIRE; - norm_den[31..0] : WIRE; - norm_num[32..0] : WIRE; - num_sign : WIRE; - protect_quotient[32..0] : WIRE; - protect_remainder[31..0] : WIRE; - vcc_wire : WIRE; - -BEGIN - divider.denominator[] = norm_den[]; - divider.numerator[] = norm_num[]; - my_abs_den.data[] = denominator[]; - my_abs_num.data[] = numerator[]; - compl_add_quot_result_int[] = (compl_add_quot_dataa[], compl_add_quot_cin) + (compl_add_quot_datab[], compl_add_quot_cin); - compl_add_quot_result[] = compl_add_quot_result_int[33..1]; - compl_add_quot_cin = vcc_wire; - compl_add_quot_dataa[] = (! protect_quotient[]); - compl_add_quot_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire); - compl_add_rem_result_int[] = (compl_add_rem_dataa[], compl_add_rem_cin) + (compl_add_rem_datab[], compl_add_rem_cin); - compl_add_rem_result[] = compl_add_rem_result_int[32..1]; - compl_add_rem_cin = vcc_wire; - compl_add_rem_dataa[] = (! protect_remainder[]); - compl_add_rem_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire); - diff_signs = (numerator[32..32] $ denominator[31..31]); - gnd_wire = B"0"; - neg_quot[] = compl_add_quot_result[]; - neg_rem[] = compl_add_rem_result[]; - norm_den[] = my_abs_den.result[]; - norm_num[] = my_abs_num.result[]; - num_sign = numerator[32..32]; - protect_quotient[] = divider.quotient[]; - protect_remainder[] = divider.remainder[]; - quotient[] = ((protect_quotient[] & (! diff_signs)) # (neg_quot[] & diff_signs)); - remainder[] = ((protect_remainder[] & (! num_sign)) # (neg_rem[] & num_sign)); - vcc_wire = B"1"; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_6gam1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_6gam1.tdf deleted file mode 100644 index b7e8740..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_6gam1.tdf +++ /dev/null @@ -1,392 +0,0 @@ ---alt_u_div CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=32 WIDTH_N=33 WIDTH_Q=33 WIDTH_R=32 denominator numerator quotient remainder ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 594 -SUBDESIGN alt_u_div_6gam1 -( - denominator[31..0] : input; - numerator[32..0] : input; - quotient[32..0] : output; - remainder[31..0] : output; -) -VARIABLE - add_sub_0_result_int[1..0] : WIRE; - add_sub_0_cout : WIRE; - add_sub_0_dataa[0..0] : WIRE; - add_sub_0_datab[0..0] : WIRE; - add_sub_0_result[0..0] : WIRE; - add_sub_1_result_int[2..0] : WIRE; - add_sub_1_cout : WIRE; - add_sub_1_dataa[1..0] : WIRE; - add_sub_1_datab[1..0] : WIRE; - add_sub_1_result[1..0] : WIRE; - add_sub_10_result_int[11..0] : WIRE; - add_sub_10_cout : WIRE; - add_sub_10_dataa[10..0] : WIRE; - add_sub_10_datab[10..0] : WIRE; - add_sub_10_result[10..0] : WIRE; - add_sub_11_result_int[12..0] : WIRE; - add_sub_11_cout : WIRE; - add_sub_11_dataa[11..0] : WIRE; - add_sub_11_datab[11..0] : WIRE; - add_sub_11_result[11..0] : WIRE; - add_sub_12_result_int[13..0] : WIRE; - add_sub_12_cout : WIRE; - add_sub_12_dataa[12..0] : WIRE; - add_sub_12_datab[12..0] : WIRE; - add_sub_12_result[12..0] : WIRE; - add_sub_13_result_int[14..0] : WIRE; - add_sub_13_cout : WIRE; - add_sub_13_dataa[13..0] : WIRE; - add_sub_13_datab[13..0] : WIRE; - add_sub_13_result[13..0] : WIRE; - add_sub_14_result_int[15..0] : WIRE; - add_sub_14_cout : WIRE; - add_sub_14_dataa[14..0] : WIRE; - add_sub_14_datab[14..0] : WIRE; - add_sub_14_result[14..0] : WIRE; - add_sub_15_result_int[16..0] : WIRE; - add_sub_15_cout : WIRE; - add_sub_15_dataa[15..0] : WIRE; - add_sub_15_datab[15..0] : WIRE; - add_sub_15_result[15..0] : WIRE; - add_sub_16_result_int[17..0] : WIRE; - add_sub_16_cout : WIRE; - add_sub_16_dataa[16..0] : WIRE; - add_sub_16_datab[16..0] : WIRE; - add_sub_16_result[16..0] : WIRE; - add_sub_17_result_int[18..0] : WIRE; - add_sub_17_cout : WIRE; - add_sub_17_dataa[17..0] : WIRE; - add_sub_17_datab[17..0] : WIRE; - add_sub_17_result[17..0] : WIRE; - add_sub_18_result_int[19..0] : WIRE; - add_sub_18_cout : WIRE; - add_sub_18_dataa[18..0] : WIRE; - add_sub_18_datab[18..0] : WIRE; - add_sub_18_result[18..0] : WIRE; - add_sub_19_result_int[20..0] : WIRE; - add_sub_19_cout : WIRE; - add_sub_19_dataa[19..0] : WIRE; - add_sub_19_datab[19..0] : WIRE; - add_sub_19_result[19..0] : WIRE; - add_sub_2_result_int[3..0] : WIRE; - add_sub_2_cout : WIRE; - add_sub_2_dataa[2..0] : WIRE; - add_sub_2_datab[2..0] : WIRE; - add_sub_2_result[2..0] : WIRE; - add_sub_20_result_int[21..0] : WIRE; - add_sub_20_cout : WIRE; - add_sub_20_dataa[20..0] : WIRE; - add_sub_20_datab[20..0] : WIRE; - add_sub_20_result[20..0] : WIRE; - add_sub_21_result_int[22..0] : WIRE; - add_sub_21_cout : WIRE; - add_sub_21_dataa[21..0] : WIRE; - add_sub_21_datab[21..0] : WIRE; - add_sub_21_result[21..0] : WIRE; - add_sub_22_result_int[23..0] : WIRE; - add_sub_22_cout : WIRE; - add_sub_22_dataa[22..0] : WIRE; - add_sub_22_datab[22..0] : WIRE; - add_sub_22_result[22..0] : WIRE; - add_sub_23_result_int[24..0] : WIRE; - add_sub_23_cout : WIRE; - add_sub_23_dataa[23..0] : WIRE; - add_sub_23_datab[23..0] : WIRE; - add_sub_23_result[23..0] : WIRE; - add_sub_24_result_int[25..0] : WIRE; - add_sub_24_cout : WIRE; - add_sub_24_dataa[24..0] : WIRE; - add_sub_24_datab[24..0] : WIRE; - add_sub_24_result[24..0] : WIRE; - add_sub_25_result_int[26..0] : WIRE; - add_sub_25_cout : WIRE; - add_sub_25_dataa[25..0] : WIRE; - add_sub_25_datab[25..0] : WIRE; - add_sub_25_result[25..0] : WIRE; - add_sub_26_result_int[27..0] : WIRE; - add_sub_26_cout : WIRE; - add_sub_26_dataa[26..0] : WIRE; - add_sub_26_datab[26..0] : WIRE; - add_sub_26_result[26..0] : WIRE; - add_sub_27_result_int[28..0] : WIRE; - add_sub_27_cout : WIRE; - add_sub_27_dataa[27..0] : WIRE; - add_sub_27_datab[27..0] : WIRE; - add_sub_27_result[27..0] : WIRE; - add_sub_28_result_int[29..0] : WIRE; - add_sub_28_cout : WIRE; - add_sub_28_dataa[28..0] : WIRE; - add_sub_28_datab[28..0] : WIRE; - add_sub_28_result[28..0] : WIRE; - add_sub_29_result_int[30..0] : WIRE; - add_sub_29_cout : WIRE; - add_sub_29_dataa[29..0] : WIRE; - add_sub_29_datab[29..0] : WIRE; - add_sub_29_result[29..0] : WIRE; - add_sub_3_result_int[4..0] : WIRE; - add_sub_3_cout : WIRE; - add_sub_3_dataa[3..0] : WIRE; - add_sub_3_datab[3..0] : WIRE; - add_sub_3_result[3..0] : WIRE; - add_sub_30_result_int[31..0] : WIRE; - add_sub_30_cout : WIRE; - add_sub_30_dataa[30..0] : WIRE; - add_sub_30_datab[30..0] : WIRE; - add_sub_30_result[30..0] : WIRE; - add_sub_31_result_int[32..0] : WIRE; - add_sub_31_cout : WIRE; - add_sub_31_dataa[31..0] : WIRE; - add_sub_31_datab[31..0] : WIRE; - add_sub_31_result[31..0] : WIRE; - add_sub_32_result_int[33..0] : WIRE; - add_sub_32_cout : WIRE; - add_sub_32_dataa[32..0] : WIRE; - add_sub_32_datab[32..0] : WIRE; - add_sub_32_result[32..0] : WIRE; - add_sub_4_result_int[5..0] : WIRE; - add_sub_4_cout : WIRE; - add_sub_4_dataa[4..0] : WIRE; - add_sub_4_datab[4..0] : WIRE; - add_sub_4_result[4..0] : WIRE; - add_sub_5_result_int[6..0] : WIRE; - add_sub_5_cout : WIRE; - add_sub_5_dataa[5..0] : WIRE; - add_sub_5_datab[5..0] : WIRE; - add_sub_5_result[5..0] : WIRE; - add_sub_6_result_int[7..0] : WIRE; - add_sub_6_cout : WIRE; - add_sub_6_dataa[6..0] : WIRE; - add_sub_6_datab[6..0] : WIRE; - add_sub_6_result[6..0] : WIRE; - add_sub_7_result_int[8..0] : WIRE; - add_sub_7_cout : WIRE; - add_sub_7_dataa[7..0] : WIRE; - add_sub_7_datab[7..0] : WIRE; - add_sub_7_result[7..0] : WIRE; - add_sub_8_result_int[9..0] : WIRE; - add_sub_8_cout : WIRE; - add_sub_8_dataa[8..0] : WIRE; - add_sub_8_datab[8..0] : WIRE; - add_sub_8_result[8..0] : WIRE; - add_sub_9_result_int[10..0] : WIRE; - add_sub_9_cout : WIRE; - add_sub_9_dataa[9..0] : WIRE; - add_sub_9_datab[9..0] : WIRE; - add_sub_9_result[9..0] : WIRE; - DenominatorIn[1121..0] : WIRE; - DenominatorIn_tmp[1121..0] : WIRE; - gnd_wire : WIRE; - nose[1121..0] : WIRE; - NumeratorIn[1121..0] : WIRE; - NumeratorIn_tmp[1121..0] : WIRE; - prestg[1088..0] : WIRE; - quotient_tmp[32..0] : WIRE; - sel[1087..0] : WIRE; - selnose[1121..0] : WIRE; - StageIn[1121..0] : WIRE; - StageIn_tmp[1121..0] : WIRE; - StageOut[1088..0] : WIRE; - -BEGIN - add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]); - add_sub_0_result[] = add_sub_0_result_int[0..0]; - add_sub_0_cout = !add_sub_0_result_int[1]; - add_sub_0_dataa[] = NumeratorIn[32..32]; - add_sub_0_datab[] = DenominatorIn[0..0]; - add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]); - add_sub_1_result[] = add_sub_1_result_int[1..0]; - add_sub_1_cout = !add_sub_1_result_int[2]; - add_sub_1_dataa[] = ( StageIn[33..33], NumeratorIn[64..64]); - add_sub_1_datab[] = DenominatorIn[34..33]; - add_sub_10_result_int[] = (0, add_sub_10_dataa[]) - (0, add_sub_10_datab[]); - add_sub_10_result[] = add_sub_10_result_int[10..0]; - add_sub_10_cout = !add_sub_10_result_int[11]; - add_sub_10_dataa[] = ( StageIn[339..330], NumeratorIn[352..352]); - add_sub_10_datab[] = DenominatorIn[340..330]; - add_sub_11_result_int[] = (0, add_sub_11_dataa[]) - (0, add_sub_11_datab[]); - add_sub_11_result[] = add_sub_11_result_int[11..0]; - add_sub_11_cout = !add_sub_11_result_int[12]; - add_sub_11_dataa[] = ( StageIn[373..363], NumeratorIn[384..384]); - add_sub_11_datab[] = DenominatorIn[374..363]; - add_sub_12_result_int[] = (0, add_sub_12_dataa[]) - (0, add_sub_12_datab[]); - add_sub_12_result[] = add_sub_12_result_int[12..0]; - add_sub_12_cout = !add_sub_12_result_int[13]; - add_sub_12_dataa[] = ( StageIn[407..396], NumeratorIn[416..416]); - add_sub_12_datab[] = DenominatorIn[408..396]; - add_sub_13_result_int[] = (0, add_sub_13_dataa[]) - (0, add_sub_13_datab[]); - add_sub_13_result[] = add_sub_13_result_int[13..0]; - add_sub_13_cout = !add_sub_13_result_int[14]; - add_sub_13_dataa[] = ( StageIn[441..429], NumeratorIn[448..448]); - add_sub_13_datab[] = DenominatorIn[442..429]; - add_sub_14_result_int[] = (0, add_sub_14_dataa[]) - (0, add_sub_14_datab[]); - add_sub_14_result[] = add_sub_14_result_int[14..0]; - add_sub_14_cout = !add_sub_14_result_int[15]; - add_sub_14_dataa[] = ( StageIn[475..462], NumeratorIn[480..480]); - add_sub_14_datab[] = DenominatorIn[476..462]; - add_sub_15_result_int[] = (0, add_sub_15_dataa[]) - (0, add_sub_15_datab[]); - add_sub_15_result[] = add_sub_15_result_int[15..0]; - add_sub_15_cout = !add_sub_15_result_int[16]; - add_sub_15_dataa[] = ( StageIn[509..495], NumeratorIn[512..512]); - add_sub_15_datab[] = DenominatorIn[510..495]; - add_sub_16_result_int[] = (0, add_sub_16_dataa[]) - (0, add_sub_16_datab[]); - add_sub_16_result[] = add_sub_16_result_int[16..0]; - add_sub_16_cout = !add_sub_16_result_int[17]; - add_sub_16_dataa[] = ( StageIn[543..528], NumeratorIn[544..544]); - add_sub_16_datab[] = DenominatorIn[544..528]; - add_sub_17_result_int[] = (0, add_sub_17_dataa[]) - (0, add_sub_17_datab[]); - add_sub_17_result[] = add_sub_17_result_int[17..0]; - add_sub_17_cout = !add_sub_17_result_int[18]; - add_sub_17_dataa[] = ( StageIn[577..561], NumeratorIn[576..576]); - add_sub_17_datab[] = DenominatorIn[578..561]; - add_sub_18_result_int[] = (0, add_sub_18_dataa[]) - (0, add_sub_18_datab[]); - add_sub_18_result[] = add_sub_18_result_int[18..0]; - add_sub_18_cout = !add_sub_18_result_int[19]; - add_sub_18_dataa[] = ( StageIn[611..594], NumeratorIn[608..608]); - add_sub_18_datab[] = DenominatorIn[612..594]; - add_sub_19_result_int[] = (0, add_sub_19_dataa[]) - (0, add_sub_19_datab[]); - add_sub_19_result[] = add_sub_19_result_int[19..0]; - add_sub_19_cout = !add_sub_19_result_int[20]; - add_sub_19_dataa[] = ( StageIn[645..627], NumeratorIn[640..640]); - add_sub_19_datab[] = DenominatorIn[646..627]; - add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]); - add_sub_2_result[] = add_sub_2_result_int[2..0]; - add_sub_2_cout = !add_sub_2_result_int[3]; - add_sub_2_dataa[] = ( StageIn[67..66], NumeratorIn[96..96]); - add_sub_2_datab[] = DenominatorIn[68..66]; - add_sub_20_result_int[] = (0, add_sub_20_dataa[]) - (0, add_sub_20_datab[]); - add_sub_20_result[] = add_sub_20_result_int[20..0]; - add_sub_20_cout = !add_sub_20_result_int[21]; - add_sub_20_dataa[] = ( StageIn[679..660], NumeratorIn[672..672]); - add_sub_20_datab[] = DenominatorIn[680..660]; - add_sub_21_result_int[] = (0, add_sub_21_dataa[]) - (0, add_sub_21_datab[]); - add_sub_21_result[] = add_sub_21_result_int[21..0]; - add_sub_21_cout = !add_sub_21_result_int[22]; - add_sub_21_dataa[] = ( StageIn[713..693], NumeratorIn[704..704]); - add_sub_21_datab[] = DenominatorIn[714..693]; - add_sub_22_result_int[] = (0, add_sub_22_dataa[]) - (0, add_sub_22_datab[]); - add_sub_22_result[] = add_sub_22_result_int[22..0]; - add_sub_22_cout = !add_sub_22_result_int[23]; - add_sub_22_dataa[] = ( StageIn[747..726], NumeratorIn[736..736]); - add_sub_22_datab[] = DenominatorIn[748..726]; - add_sub_23_result_int[] = (0, add_sub_23_dataa[]) - (0, add_sub_23_datab[]); - add_sub_23_result[] = add_sub_23_result_int[23..0]; - add_sub_23_cout = !add_sub_23_result_int[24]; - add_sub_23_dataa[] = ( StageIn[781..759], NumeratorIn[768..768]); - add_sub_23_datab[] = DenominatorIn[782..759]; - add_sub_24_result_int[] = (0, add_sub_24_dataa[]) - (0, add_sub_24_datab[]); - add_sub_24_result[] = add_sub_24_result_int[24..0]; - add_sub_24_cout = !add_sub_24_result_int[25]; - add_sub_24_dataa[] = ( StageIn[815..792], NumeratorIn[800..800]); - add_sub_24_datab[] = DenominatorIn[816..792]; - add_sub_25_result_int[] = (0, add_sub_25_dataa[]) - (0, add_sub_25_datab[]); - add_sub_25_result[] = add_sub_25_result_int[25..0]; - add_sub_25_cout = !add_sub_25_result_int[26]; - add_sub_25_dataa[] = ( StageIn[849..825], NumeratorIn[832..832]); - add_sub_25_datab[] = DenominatorIn[850..825]; - add_sub_26_result_int[] = (0, add_sub_26_dataa[]) - (0, add_sub_26_datab[]); - add_sub_26_result[] = add_sub_26_result_int[26..0]; - add_sub_26_cout = !add_sub_26_result_int[27]; - add_sub_26_dataa[] = ( StageIn[883..858], NumeratorIn[864..864]); - add_sub_26_datab[] = DenominatorIn[884..858]; - add_sub_27_result_int[] = (0, add_sub_27_dataa[]) - (0, add_sub_27_datab[]); - add_sub_27_result[] = add_sub_27_result_int[27..0]; - add_sub_27_cout = !add_sub_27_result_int[28]; - add_sub_27_dataa[] = ( StageIn[917..891], NumeratorIn[896..896]); - add_sub_27_datab[] = DenominatorIn[918..891]; - add_sub_28_result_int[] = (0, add_sub_28_dataa[]) - (0, add_sub_28_datab[]); - add_sub_28_result[] = add_sub_28_result_int[28..0]; - add_sub_28_cout = !add_sub_28_result_int[29]; - add_sub_28_dataa[] = ( StageIn[951..924], NumeratorIn[928..928]); - add_sub_28_datab[] = DenominatorIn[952..924]; - add_sub_29_result_int[] = (0, add_sub_29_dataa[]) - (0, add_sub_29_datab[]); - add_sub_29_result[] = add_sub_29_result_int[29..0]; - add_sub_29_cout = !add_sub_29_result_int[30]; - add_sub_29_dataa[] = ( StageIn[985..957], NumeratorIn[960..960]); - add_sub_29_datab[] = DenominatorIn[986..957]; - add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]); - add_sub_3_result[] = add_sub_3_result_int[3..0]; - add_sub_3_cout = !add_sub_3_result_int[4]; - add_sub_3_dataa[] = ( StageIn[101..99], NumeratorIn[128..128]); - add_sub_3_datab[] = DenominatorIn[102..99]; - add_sub_30_result_int[] = (0, add_sub_30_dataa[]) - (0, add_sub_30_datab[]); - add_sub_30_result[] = add_sub_30_result_int[30..0]; - add_sub_30_cout = !add_sub_30_result_int[31]; - add_sub_30_dataa[] = ( StageIn[1019..990], NumeratorIn[992..992]); - add_sub_30_datab[] = DenominatorIn[1020..990]; - add_sub_31_result_int[] = (0, add_sub_31_dataa[]) - (0, add_sub_31_datab[]); - add_sub_31_result[] = add_sub_31_result_int[31..0]; - add_sub_31_cout = !add_sub_31_result_int[32]; - add_sub_31_dataa[] = ( StageIn[1053..1023], NumeratorIn[1024..1024]); - add_sub_31_datab[] = DenominatorIn[1054..1023]; - add_sub_32_result_int[] = (0, add_sub_32_dataa[]) - (0, add_sub_32_datab[]); - add_sub_32_result[] = add_sub_32_result_int[32..0]; - add_sub_32_cout = !add_sub_32_result_int[33]; - add_sub_32_dataa[] = ( StageIn[1087..1056], NumeratorIn[1056..1056]); - add_sub_32_datab[] = DenominatorIn[1088..1056]; - add_sub_4_result_int[] = (0, add_sub_4_dataa[]) - (0, add_sub_4_datab[]); - add_sub_4_result[] = add_sub_4_result_int[4..0]; - add_sub_4_cout = !add_sub_4_result_int[5]; - add_sub_4_dataa[] = ( StageIn[135..132], NumeratorIn[160..160]); - add_sub_4_datab[] = DenominatorIn[136..132]; - add_sub_5_result_int[] = (0, add_sub_5_dataa[]) - (0, add_sub_5_datab[]); - add_sub_5_result[] = add_sub_5_result_int[5..0]; - add_sub_5_cout = !add_sub_5_result_int[6]; - add_sub_5_dataa[] = ( StageIn[169..165], NumeratorIn[192..192]); - add_sub_5_datab[] = DenominatorIn[170..165]; - add_sub_6_result_int[] = (0, add_sub_6_dataa[]) - (0, add_sub_6_datab[]); - add_sub_6_result[] = add_sub_6_result_int[6..0]; - add_sub_6_cout = !add_sub_6_result_int[7]; - add_sub_6_dataa[] = ( StageIn[203..198], NumeratorIn[224..224]); - add_sub_6_datab[] = DenominatorIn[204..198]; - add_sub_7_result_int[] = (0, add_sub_7_dataa[]) - (0, add_sub_7_datab[]); - add_sub_7_result[] = add_sub_7_result_int[7..0]; - add_sub_7_cout = !add_sub_7_result_int[8]; - add_sub_7_dataa[] = ( StageIn[237..231], NumeratorIn[256..256]); - add_sub_7_datab[] = DenominatorIn[238..231]; - add_sub_8_result_int[] = (0, add_sub_8_dataa[]) - (0, add_sub_8_datab[]); - add_sub_8_result[] = add_sub_8_result_int[8..0]; - add_sub_8_cout = !add_sub_8_result_int[9]; - add_sub_8_dataa[] = ( StageIn[271..264], NumeratorIn[288..288]); - add_sub_8_datab[] = DenominatorIn[272..264]; - add_sub_9_result_int[] = (0, add_sub_9_dataa[]) - (0, add_sub_9_datab[]); - add_sub_9_result[] = add_sub_9_result_int[9..0]; - add_sub_9_cout = !add_sub_9_result_int[10]; - add_sub_9_dataa[] = ( StageIn[305..297], NumeratorIn[320..320]); - add_sub_9_datab[] = DenominatorIn[306..297]; - DenominatorIn[] = DenominatorIn_tmp[]; - DenominatorIn_tmp[] = ( DenominatorIn[1088..0], ( gnd_wire, denominator[])); - gnd_wire = B"0"; - nose[] = ( B"000000000000000000000000000000000", add_sub_32_cout, B"000000000000000000000000000000000", add_sub_31_cout, B"000000000000000000000000000000000", add_sub_30_cout, B"000000000000000000000000000000000", add_sub_29_cout, B"000000000000000000000000000000000", add_sub_28_cout, B"000000000000000000000000000000000", add_sub_27_cout, B"000000000000000000000000000000000", add_sub_26_cout, B"000000000000000000000000000000000", add_sub_25_cout, B"000000000000000000000000000000000", add_sub_24_cout, B"000000000000000000000000000000000", add_sub_23_cout, B"000000000000000000000000000000000", add_sub_22_cout, B"000000000000000000000000000000000", add_sub_21_cout, B"000000000000000000000000000000000", add_sub_20_cout, B"000000000000000000000000000000000", add_sub_19_cout, B"000000000000000000000000000000000", add_sub_18_cout, B"000000000000000000000000000000000", add_sub_17_cout, B"000000000000000000000000000000000", add_sub_16_cout, B"000000000000000000000000000000000", add_sub_15_cout, B"000000000000000000000000000000000", add_sub_14_cout, B"000000000000000000000000000000000", add_sub_13_cout, B"000000000000000000000000000000000", add_sub_12_cout, B"000000000000000000000000000000000", add_sub_11_cout, B"000000000000000000000000000000000", add_sub_10_cout, B"000000000000000000000000000000000", add_sub_9_cout, B"000000000000000000000000000000000", add_sub_8_cout, B"000000000000000000000000000000000", add_sub_7_cout, B"000000000000000000000000000000000", add_sub_6_cout, B"000000000000000000000000000000000", add_sub_5_cout, B"000000000000000000000000000000000", add_sub_4_cout, B"000000000000000000000000000000000", add_sub_3_cout, B"000000000000000000000000000000000", add_sub_2_cout, B"000000000000000000000000000000000", add_sub_1_cout, B"000000000000000000000000000000000", add_sub_0_cout); - NumeratorIn[] = NumeratorIn_tmp[]; - NumeratorIn_tmp[] = ( NumeratorIn[1088..0], numerator[]); - prestg[] = ( add_sub_32_result[], GND, add_sub_31_result[], B"00", add_sub_30_result[], B"000", add_sub_29_result[], B"0000", add_sub_28_result[], B"00000", add_sub_27_result[], B"000000", add_sub_26_result[], B"0000000", add_sub_25_result[], B"00000000", add_sub_24_result[], B"000000000", add_sub_23_result[], B"0000000000", add_sub_22_result[], B"00000000000", add_sub_21_result[], B"000000000000", add_sub_20_result[], B"0000000000000", add_sub_19_result[], B"00000000000000", add_sub_18_result[], B"000000000000000", add_sub_17_result[], B"0000000000000000", add_sub_16_result[], B"00000000000000000", add_sub_15_result[], B"000000000000000000", add_sub_14_result[], B"0000000000000000000", add_sub_13_result[], B"00000000000000000000", add_sub_12_result[], B"000000000000000000000", add_sub_11_result[], B"0000000000000000000000", add_sub_10_result[], B"00000000000000000000000", add_sub_9_result[], B"000000000000000000000000", add_sub_8_result[], B"0000000000000000000000000", add_sub_7_result[], B"00000000000000000000000000", add_sub_6_result[], B"000000000000000000000000000", add_sub_5_result[], B"0000000000000000000000000000", add_sub_4_result[], B"00000000000000000000000000000", add_sub_3_result[], B"000000000000000000000000000000", add_sub_2_result[], B"0000000000000000000000000000000", add_sub_1_result[], B"00000000000000000000000000000000", add_sub_0_result[]); - quotient[] = quotient_tmp[]; - quotient_tmp[] = ( (! selnose[0..0]), (! selnose[34..34]), (! selnose[68..68]), (! selnose[102..102]), (! selnose[136..136]), (! selnose[170..170]), (! selnose[204..204]), (! selnose[238..238]), (! selnose[272..272]), (! selnose[306..306]), (! selnose[340..340]), (! selnose[374..374]), (! selnose[408..408]), (! selnose[442..442]), (! selnose[476..476]), (! selnose[510..510]), (! selnose[544..544]), (! selnose[578..578]), (! selnose[612..612]), (! selnose[646..646]), (! selnose[680..680]), (! selnose[714..714]), (! selnose[748..748]), (! selnose[782..782]), (! selnose[816..816]), (! selnose[850..850]), (! selnose[884..884]), (! selnose[918..918]), (! selnose[952..952]), (! selnose[986..986]), (! selnose[1020..1020]), (! selnose[1054..1054]), (! selnose[1088..1088])); - remainder[31..0] = StageIn[1120..1089]; - sel[] = ( gnd_wire, (sel[1087..1087] # DenominatorIn[1120..1120]), (sel[1086..1086] # DenominatorIn[1119..1119]), (sel[1085..1085] # DenominatorIn[1118..1118]), (sel[1084..1084] # DenominatorIn[1117..1117]), (sel[1083..1083] # DenominatorIn[1116..1116]), (sel[1082..1082] # DenominatorIn[1115..1115]), (sel[1081..1081] # DenominatorIn[1114..1114]), (sel[1080..1080] # DenominatorIn[1113..1113]), (sel[1079..1079] # DenominatorIn[1112..1112]), (sel[1078..1078] # DenominatorIn[1111..1111]), (sel[1077..1077] # DenominatorIn[1110..1110]), (sel[1076..1076] # DenominatorIn[1109..1109]), (sel[1075..1075] # DenominatorIn[1108..1108]), (sel[1074..1074] # DenominatorIn[1107..1107]), (sel[1073..1073] # DenominatorIn[1106..1106]), (sel[1072..1072] # DenominatorIn[1105..1105]), (sel[1071..1071] # DenominatorIn[1104..1104]), (sel[1070..1070] # DenominatorIn[1103..1103]), (sel[1069..1069] # DenominatorIn[1102..1102]), (sel[1068..1068] # DenominatorIn[1101..1101]), (sel[1067..1067] # DenominatorIn[1100..1100]), (sel[1066..1066] # DenominatorIn[1099..1099]), (sel[1065..1065] # DenominatorIn[1098..1098]), (sel[1064..1064] # DenominatorIn[1097..1097]), (sel[1063..1063] # DenominatorIn[1096..1096]), (sel[1062..1062] # DenominatorIn[1095..1095]), (sel[1061..1061] # DenominatorIn[1094..1094]), (sel[1060..1060] # DenominatorIn[1093..1093]), (sel[1059..1059] # DenominatorIn[1092..1092]), (sel[1058..1058] # DenominatorIn[1091..1091]), (sel[1057..1057] # DenominatorIn[1090..1090]), gnd_wire, (sel[1055..1055] # DenominatorIn[1087..1087]), (sel[1054..1054] # DenominatorIn[1086..1086]), (sel[1053..1053] # DenominatorIn[1085..1085]), (sel[1052..1052] # DenominatorIn[1084..1084]), (sel[1051..1051] # DenominatorIn[1083..1083]), (sel[1050..1050] # DenominatorIn[1082..1082]), (sel[1049..1049] # DenominatorIn[1081..1081]), (sel[1048..1048] # DenominatorIn[1080..1080]), (sel[1047..1047] # DenominatorIn[1079..1079]), (sel[1046..1046] # DenominatorIn[1078..1078]), (sel[1045..1045] # DenominatorIn[1077..1077]), (sel[1044..1044] # DenominatorIn[1076..1076]), (sel[1043..1043] # DenominatorIn[1075..1075]), (sel[1042..1042] # DenominatorIn[1074..1074]), (sel[1041..1041] # DenominatorIn[1073..1073]), (sel[1040..1040] # DenominatorIn[1072..1072]), (sel[1039..1039] # DenominatorIn[1071..1071]), (sel[1038..1038] # DenominatorIn[1070..1070]), (sel[1037..1037] # DenominatorIn[1069..1069]), (sel[1036..1036] # DenominatorIn[1068..1068]), (sel[1035..1035] # DenominatorIn[1067..1067]), (sel[1034..1034] # DenominatorIn[1066..1066]), (sel[1033..1033] # DenominatorIn[1065..1065]), (sel[1032..1032] # DenominatorIn[1064..1064]), (sel[1031..1031] # DenominatorIn[1063..1063]), (sel[1030..1030] # DenominatorIn[1062..1062]), (sel[1029..1029] # DenominatorIn[1061..1061]), (sel[1028..1028] # DenominatorIn[1060..1060]), (sel[1027..1027] # DenominatorIn[1059..1059]), (sel[1026..1026] # DenominatorIn[1058..1058]), (sel[1025..1025] # DenominatorIn[1057..1057]), gnd_wire, (sel[1023..1023] # DenominatorIn[1054..1054]), (sel[1022..1022] # DenominatorIn[1053..1053]), (sel[1021..1021] # DenominatorIn[1052..1052]), (sel[1020..1020] # DenominatorIn[1051..1051]), (sel[1019..1019] # DenominatorIn[1050..1050]), (sel[1018..1018] # DenominatorIn[1049..1049]), (sel[1017..1017] # DenominatorIn[1048..1048]), (sel[1016..1016] # DenominatorIn[1047..1047]), (sel[1015..1015] # DenominatorIn[1046..1046]), (sel[1014..1014] # DenominatorIn[1045..1045]), (sel[1013..1013] # DenominatorIn[1044..1044]), (sel[1012..1012] # DenominatorIn[1043..1043]), (sel[1011..1011] # DenominatorIn[1042..1042]), (sel[1010..1010] # DenominatorIn[1041..1041]), (sel[1009..1009] # DenominatorIn[1040..1040]), (sel[1008..1008] # DenominatorIn[1039..1039]), (sel[1007..1007] # DenominatorIn[1038..1038]), (sel[1006..1006] # DenominatorIn[1037..1037]), (sel[1005..1005] # DenominatorIn[1036..1036]), (sel[1004..1004] # DenominatorIn[1035..1035]), (sel[1003..1003] # DenominatorIn[1034..1034]), (sel[1002..1002] # DenominatorIn[1033..1033]), (sel[1001..1001] # DenominatorIn[1032..1032]), (sel[1000..1000] # DenominatorIn[1031..1031]), (sel[999..999] # DenominatorIn[1030..1030]), (sel[998..998] # DenominatorIn[1029..1029]), (sel[997..997] # DenominatorIn[1028..1028]), (sel[996..996] # DenominatorIn[1027..1027]), (sel[995..995] # DenominatorIn[1026..1026]), (sel[994..994] # DenominatorIn[1025..1025]), (sel[993..993] # DenominatorIn[1024..1024]), gnd_wire, (sel[991..991] # DenominatorIn[1021..1021]), (sel[990..990] # DenominatorIn[1020..1020]), (sel[989..989] # DenominatorIn[1019..1019]), (sel[988..988] # DenominatorIn[1018..1018]), (sel[987..987] # DenominatorIn[1017..1017]), (sel[986..986] # DenominatorIn[1016..1016]), (sel[985..985] # DenominatorIn[1015..1015]), (sel[984..984] # DenominatorIn[1014..1014]), (sel[983..983] # DenominatorIn[1013..1013]), (sel[982..982] # DenominatorIn[1012..1012]), (sel[981..981] # DenominatorIn[1011..1011]), (sel[980..980] # DenominatorIn[1010..1010]), (sel[979..979] # DenominatorIn[1009..1009]), (sel[978..978] # DenominatorIn[1008..1008]), (sel[977..977] # DenominatorIn[1007..1007]), (sel[976..976] # DenominatorIn[1006..1006]), (sel[975..975] # DenominatorIn[1005..1005]), (sel[974..974] # DenominatorIn[1004..1004]), (sel[973..973] # DenominatorIn[1003..1003]), (sel[972..972] # DenominatorIn[1002..1002]), (sel[971..971] # DenominatorIn[1001..1001]), (sel[970..970] # DenominatorIn[1000..1000]), (sel[969..969] # DenominatorIn[999..999]), (sel[968..968] # DenominatorIn[998..998]), (sel[967..967] # DenominatorIn[997..997]), (sel[966..966] # DenominatorIn[996..996]), (sel[965..965] # DenominatorIn[995..995]), (sel[964..964] # DenominatorIn[994..994]), (sel[963..963] # DenominatorIn[993..993]), (sel[962..962] # DenominatorIn[992..992]), (sel[961..961] # DenominatorIn[991..991]), gnd_wire, (sel[959..959] # DenominatorIn[988..988]), (sel[958..958] # DenominatorIn[987..987]), (sel[957..957] # DenominatorIn[986..986]), (sel[956..956] # DenominatorIn[985..985]), (sel[955..955] # DenominatorIn[984..984]), (sel[954..954] # DenominatorIn[983..983]), (sel[953..953] # DenominatorIn[982..982]), (sel[952..952] # DenominatorIn[981..981]), (sel[951..951] # DenominatorIn[980..980]), (sel[950..950] # DenominatorIn[979..979]), (sel[949..949] # DenominatorIn[978..978]), (sel[948..948] # DenominatorIn[977..977]), (sel[947..947] # DenominatorIn[976..976]), (sel[946..946] # DenominatorIn[975..975]), (sel[945..945] # DenominatorIn[974..974]), (sel[944..944] # DenominatorIn[973..973]), (sel[943..943] # DenominatorIn[972..972]), (sel[942..942] # DenominatorIn[971..971]), (sel[941..941] # DenominatorIn[970..970]), (sel[940..940] # DenominatorIn[969..969]), (sel[939..939] # DenominatorIn[968..968]), (sel[938..938] # DenominatorIn[967..967]), (sel[937..937] # DenominatorIn[966..966]), (sel[936..936] # DenominatorIn[965..965]), (sel[935..935] # DenominatorIn[964..964]), (sel[934..934] # DenominatorIn[963..963]), (sel[933..933] # DenominatorIn[962..962]), (sel[932..932] # DenominatorIn[961..961]), (sel[931..931] # DenominatorIn[960..960]), (sel[930..930] # DenominatorIn[959..959]), (sel[929..929] # DenominatorIn[958..958]), gnd_wire, (sel[927..927] # DenominatorIn[955..955]), (sel[926..926] # DenominatorIn[954..954]), (sel[925..925] # DenominatorIn[953..953]), (sel[924..924] # DenominatorIn[952..952]), (sel[923..923] # DenominatorIn[951..951]), (sel[922..922] # DenominatorIn[950..950]), (sel[921..921] # DenominatorIn[949..949]), (sel[920..920] # DenominatorIn[948..948]), (sel[919..919] # DenominatorIn[947..947]), (sel[918..918] # DenominatorIn[946..946]), (sel[917..917] # DenominatorIn[945..945]), (sel[916..916] # DenominatorIn[944..944]), (sel[915..915] # DenominatorIn[943..943]), (sel[914..914] # DenominatorIn[942..942]), (sel[913..913] # DenominatorIn[941..941]), (sel[912..912] # DenominatorIn[940..940]), (sel[911..911] # DenominatorIn[939..939]), (sel[910..910] # DenominatorIn[938..938]), (sel[909..909] # DenominatorIn[937..937]), (sel[908..908] # DenominatorIn[936..936]), (sel[907..907] # DenominatorIn[935..935]), (sel[906..906] # DenominatorIn[934..934]), (sel[905..905] # DenominatorIn[933..933]), (sel[904..904] # DenominatorIn[932..932]), (sel[903..903] # DenominatorIn[931..931]), (sel[902..902] # DenominatorIn[930..930]), (sel[901..901] # DenominatorIn[929..929]), (sel[900..900] # DenominatorIn[928..928]), (sel[899..899] # DenominatorIn[927..927]), (sel[898..898] # DenominatorIn[926..926]), (sel[897..897] # DenominatorIn[925..925]), gnd_wire, (sel[895..895] # DenominatorIn[922..922]), (sel[894..894] # DenominatorIn[921..921]), (sel[893..893] # DenominatorIn[920..920]), (sel[892..892] # DenominatorIn[919..919]), (sel[891..891] # DenominatorIn[918..918]), (sel[890..890] # DenominatorIn[917..917]), (sel[889..889] # DenominatorIn[916..916]), (sel[888..888] # DenominatorIn[915..915]), (sel[887..887] # DenominatorIn[914..914]), (sel[886..886] # DenominatorIn[913..913]), (sel[885..885] # DenominatorIn[912..912]), (sel[884..884] # DenominatorIn[911..911]), (sel[883..883] # DenominatorIn[910..910]), (sel[882..882] # DenominatorIn[909..909]), (sel[881..881] # DenominatorIn[908..908]), (sel[880..880] # DenominatorIn[907..907]), (sel[879..879] # DenominatorIn[906..906]), (sel[878..878] # DenominatorIn[905..905]), (sel[877..877] # DenominatorIn[904..904]), (sel[876..876] # DenominatorIn[903..903]), (sel[875..875] # DenominatorIn[902..902]), (sel[874..874] # DenominatorIn[901..901]), (sel[873..873] # DenominatorIn[900..900]), (sel[872..872] # DenominatorIn[899..899]), (sel[871..871] # DenominatorIn[898..898]), (sel[870..870] # DenominatorIn[897..897]), (sel[869..869] # DenominatorIn[896..896]), (sel[868..868] # DenominatorIn[895..895]), (sel[867..867] # DenominatorIn[894..894]), (sel[866..866] # DenominatorIn[893..893]), (sel[865..865] # DenominatorIn[892..892]), gnd_wire, (sel[863..863] # DenominatorIn[889..889]), (sel[862..862] # DenominatorIn[888..888]), (sel[861..861] # DenominatorIn[887..887]), (sel[860..860] # DenominatorIn[886..886]), (sel[859..859] # DenominatorIn[885..885]), (sel[858..858] # DenominatorIn[884..884]), (sel[857..857] # DenominatorIn[883..883]), (sel[856..856] # DenominatorIn[882..882]), (sel[855..855] # DenominatorIn[881..881]), (sel[854..854] # DenominatorIn[880..880]), (sel[853..853] # DenominatorIn[879..879]), (sel[852..852] # DenominatorIn[878..878]), (sel[851..851] # DenominatorIn[877..877]), (sel[850..850] # DenominatorIn[876..876]), (sel[849..849] # DenominatorIn[875..875]), (sel[848..848] # DenominatorIn[874..874]), (sel[847..847] # DenominatorIn[873..873]), (sel[846..846] # DenominatorIn[872..872]), (sel[845..845] # DenominatorIn[871..871]), (sel[844..844] # DenominatorIn[870..870]), (sel[843..843] # DenominatorIn[869..869]), (sel[842..842] # DenominatorIn[868..868]), (sel[841..841] # DenominatorIn[867..867]), (sel[840..840] # DenominatorIn[866..866]), (sel[839..839] # DenominatorIn[865..865]), (sel[838..838] # DenominatorIn[864..864]), (sel[837..837] # DenominatorIn[863..863]), (sel[836..836] # DenominatorIn[862..862]), (sel[835..835] # DenominatorIn[861..861]), (sel[834..834] # DenominatorIn[860..860]), (sel[833..833] # DenominatorIn[859..859]), gnd_wire, (sel[831..831] # DenominatorIn[856..856]), (sel[830..830] # DenominatorIn[855..855]), (sel[829..829] # DenominatorIn[854..854]), (sel[828..828] # DenominatorIn[853..853]), (sel[827..827] # DenominatorIn[852..852]), (sel[826..826] # DenominatorIn[851..851]), (sel[825..825] # DenominatorIn[850..850]), (sel[824..824] # DenominatorIn[849..849]), (sel[823..823] # DenominatorIn[848..848]), (sel[822..822] # DenominatorIn[847..847]), (sel[821..821] # DenominatorIn[846..846]), (sel[820..820] # DenominatorIn[845..845]), (sel[819..819] # DenominatorIn[844..844]), (sel[818..818] # DenominatorIn[843..843]), (sel[817..817] # DenominatorIn[842..842]), (sel[816..816] # DenominatorIn[841..841]), (sel[815..815] # DenominatorIn[840..840]), (sel[814..814] # DenominatorIn[839..839]), (sel[813..813] # DenominatorIn[838..838]), (sel[812..812] # DenominatorIn[837..837]), (sel[811..811] # DenominatorIn[836..836]), (sel[810..810] # DenominatorIn[835..835]), (sel[809..809] # DenominatorIn[834..834]), (sel[808..808] # DenominatorIn[833..833]), (sel[807..807] # DenominatorIn[832..832]), (sel[806..806] # DenominatorIn[831..831]), (sel[805..805] # DenominatorIn[830..830]), (sel[804..804] # DenominatorIn[829..829]), (sel[803..803] # DenominatorIn[828..828]), (sel[802..802] # DenominatorIn[827..827]), (sel[801..801] # DenominatorIn[826..826]), gnd_wire, (sel[799..799] # DenominatorIn[823..823]), (sel[798..798] # DenominatorIn[822..822]), (sel[797..797] # DenominatorIn[821..821]), (sel[796..796] # DenominatorIn[820..820]), (sel[795..795] # DenominatorIn[819..819]), (sel[794..794] # DenominatorIn[818..818]), (sel[793..793] # DenominatorIn[817..817]), (sel[792..792] # DenominatorIn[816..816]), (sel[791..791] # DenominatorIn[815..815]), (sel[790..790] # DenominatorIn[814..814]), (sel[789..789] # DenominatorIn[813..813]), (sel[788..788] # DenominatorIn[812..812]), (sel[787..787] # DenominatorIn[811..811]), (sel[786..786] # DenominatorIn[810..810]), (sel[785..785] # DenominatorIn[809..809]), (sel[784..784] # DenominatorIn[808..808]), (sel[783..783] # DenominatorIn[807..807]), (sel[782..782] # DenominatorIn[806..806]), (sel[781..781] # DenominatorIn[805..805]), (sel[780..780] # DenominatorIn[804..804]), (sel[779..779] # DenominatorIn[803..803]), (sel[778..778] # DenominatorIn[802..802]), (sel[777..777] # DenominatorIn[801..801]), (sel[776..776] # DenominatorIn[800..800]), (sel[775..775] # DenominatorIn[799..799]), (sel[774..774] # DenominatorIn[798..798]), (sel[773..773] # DenominatorIn[797..797]), (sel[772..772] # DenominatorIn[796..796]), (sel[771..771] # DenominatorIn[795..795]), (sel[770..770] # DenominatorIn[794..794]), (sel[769..769] # DenominatorIn[793..793]), gnd_wire, (sel[767..767] # DenominatorIn[790..790]), (sel[766..766] # DenominatorIn[789..789]), (sel[765..765] # DenominatorIn[788..788]), (sel[764..764] # DenominatorIn[787..787]), (sel[763..763] # DenominatorIn[786..786]), (sel[762..762] # DenominatorIn[785..785]), (sel[761..761] # DenominatorIn[784..784]), (sel[760..760] # DenominatorIn[783..783]), (sel[759..759] # DenominatorIn[782..782]), (sel[758..758] # DenominatorIn[781..781]), (sel[757..757] # DenominatorIn[780..780]), (sel[756..756] # DenominatorIn[779..779]), (sel[755..755] # DenominatorIn[778..778]), (sel[754..754] # DenominatorIn[777..777]), (sel[753..753] # DenominatorIn[776..776]), (sel[752..752] # DenominatorIn[775..775]), (sel[751..751] # DenominatorIn[774..774]), (sel[750..750] # DenominatorIn[773..773]), (sel[749..749] # DenominatorIn[772..772]), (sel[748..748] # DenominatorIn[771..771]), (sel[747..747] # DenominatorIn[770..770]), (sel[746..746] # DenominatorIn[769..769]), (sel[745..745] # DenominatorIn[768..768]), (sel[744..744] # DenominatorIn[767..767]), (sel[743..743] # DenominatorIn[766..766]), (sel[742..742] # DenominatorIn[765..765]), (sel[741..741] # DenominatorIn[764..764]), (sel[740..740] # DenominatorIn[763..763]), (sel[739..739] # DenominatorIn[762..762]), (sel[738..738] # DenominatorIn[761..761]), (sel[737..737] # DenominatorIn[760..760]), gnd_wire, (sel[735..735] # DenominatorIn[757..757]), (sel[734..734] # DenominatorIn[756..756]), (sel[733..733] # DenominatorIn[755..755]), (sel[732..732] # DenominatorIn[754..754]), (sel[731..731] # DenominatorIn[753..753]), (sel[730..730] # DenominatorIn[752..752]), (sel[729..729] # DenominatorIn[751..751]), (sel[728..728] # DenominatorIn[750..750]), (sel[727..727] # DenominatorIn[749..749]), (sel[726..726] # DenominatorIn[748..748]), (sel[725..725] # DenominatorIn[747..747]), (sel[724..724] # DenominatorIn[746..746]), (sel[723..723] # DenominatorIn[745..745]), (sel[722..722] # DenominatorIn[744..744]), (sel[721..721] # DenominatorIn[743..743]), (sel[720..720] # DenominatorIn[742..742]), (sel[719..719] # DenominatorIn[741..741]), (sel[718..718] # DenominatorIn[740..740]), (sel[717..717] # DenominatorIn[739..739]), (sel[716..716] # DenominatorIn[738..738]), (sel[715..715] # DenominatorIn[737..737]), (sel[714..714] # DenominatorIn[736..736]), (sel[713..713] # DenominatorIn[735..735]), (sel[712..712] # DenominatorIn[734..734]), (sel[711..711] # DenominatorIn[733..733]), (sel[710..710] # DenominatorIn[732..732]), (sel[709..709] # DenominatorIn[731..731]), (sel[708..708] # DenominatorIn[730..730]), (sel[707..707] # DenominatorIn[729..729]), (sel[706..706] # DenominatorIn[728..728]), (sel[705..705] # DenominatorIn[727..727]), gnd_wire, (sel[703..703] # DenominatorIn[724..724]), (sel[702..702] # DenominatorIn[723..723]), (sel[701..701] # DenominatorIn[722..722]), (sel[700..700] # DenominatorIn[721..721]), (sel[699..699] # DenominatorIn[720..720]), (sel[698..698] # DenominatorIn[719..719]), (sel[697..697] # DenominatorIn[718..718]), (sel[696..696] # DenominatorIn[717..717]), (sel[695..695] # DenominatorIn[716..716]), (sel[694..694] # DenominatorIn[715..715]), (sel[693..693] # DenominatorIn[714..714]), (sel[692..692] # DenominatorIn[713..713]), (sel[691..691] # DenominatorIn[712..712]), (sel[690..690] # DenominatorIn[711..711]), (sel[689..689] # DenominatorIn[710..710]), (sel[688..688] # DenominatorIn[709..709]), (sel[687..687] # DenominatorIn[708..708]), (sel[686..686] # DenominatorIn[707..707]), (sel[685..685] # DenominatorIn[706..706]), (sel[684..684] # DenominatorIn[705..705]), (sel[683..683] # DenominatorIn[704..704]), (sel[682..682] # DenominatorIn[703..703]), (sel[681..681] # DenominatorIn[702..702]), (sel[680..680] # DenominatorIn[701..701]), (sel[679..679] # DenominatorIn[700..700]), (sel[678..678] # DenominatorIn[699..699]), (sel[677..677] # DenominatorIn[698..698]), (sel[676..676] # DenominatorIn[697..697]), (sel[675..675] # DenominatorIn[696..696]), (sel[674..674] # DenominatorIn[695..695]), (sel[673..673] # DenominatorIn[694..694]), gnd_wire, (sel[671..671] # DenominatorIn[691..691]), (sel[670..670] # DenominatorIn[690..690]), (sel[669..669] # DenominatorIn[689..689]), (sel[668..668] # DenominatorIn[688..688]), (sel[667..667] # DenominatorIn[687..687]), (sel[666..666] # DenominatorIn[686..686]), (sel[665..665] # DenominatorIn[685..685]), (sel[664..664] # DenominatorIn[684..684]), (sel[663..663] # DenominatorIn[683..683]), (sel[662..662] # DenominatorIn[682..682]), (sel[661..661] # DenominatorIn[681..681]), (sel[660..660] # DenominatorIn[680..680]), (sel[659..659] # DenominatorIn[679..679]), (sel[658..658] # DenominatorIn[678..678]), (sel[657..657] # DenominatorIn[677..677]), (sel[656..656] # DenominatorIn[676..676]), (sel[655..655] # DenominatorIn[675..675]), (sel[654..654] # DenominatorIn[674..674]), (sel[653..653] # DenominatorIn[673..673]), (sel[652..652] # DenominatorIn[672..672]), (sel[651..651] # DenominatorIn[671..671]), (sel[650..650] # DenominatorIn[670..670]), (sel[649..649] # DenominatorIn[669..669]), (sel[648..648] # DenominatorIn[668..668]), (sel[647..647] # DenominatorIn[667..667]), (sel[646..646] # DenominatorIn[666..666]), (sel[645..645] # DenominatorIn[665..665]), (sel[644..644] # DenominatorIn[664..664]), (sel[643..643] # DenominatorIn[663..663]), (sel[642..642] # DenominatorIn[662..662]), (sel[641..641] # DenominatorIn[661..661]), gnd_wire, (sel[639..639] # DenominatorIn[658..658]), (sel[638..638] # DenominatorIn[657..657]), (sel[637..637] # DenominatorIn[656..656]), (sel[636..636] # DenominatorIn[655..655]), (sel[635..635] # DenominatorIn[654..654]), (sel[634..634] # DenominatorIn[653..653]), (sel[633..633] # DenominatorIn[652..652]), (sel[632..632] # DenominatorIn[651..651]), (sel[631..631] # DenominatorIn[650..650]), (sel[630..630] # DenominatorIn[649..649]), (sel[629..629] # DenominatorIn[648..648]), (sel[628..628] # DenominatorIn[647..647]), (sel[627..627] # DenominatorIn[646..646]), (sel[626..626] # DenominatorIn[645..645]), (sel[625..625] # DenominatorIn[644..644]), (sel[624..624] # DenominatorIn[643..643]), (sel[623..623] # DenominatorIn[642..642]), (sel[622..622] # DenominatorIn[641..641]), (sel[621..621] # DenominatorIn[640..640]), (sel[620..620] # DenominatorIn[639..639]), (sel[619..619] # DenominatorIn[638..638]), (sel[618..618] # DenominatorIn[637..637]), (sel[617..617] # DenominatorIn[636..636]), (sel[616..616] # DenominatorIn[635..635]), (sel[615..615] # DenominatorIn[634..634]), (sel[614..614] # DenominatorIn[633..633]), (sel[613..613] # DenominatorIn[632..632]), (sel[612..612] # DenominatorIn[631..631]), (sel[611..611] # DenominatorIn[630..630]), (sel[610..610] # DenominatorIn[629..629]), (sel[609..609] # DenominatorIn[628..628]), gnd_wire, (sel[607..607] # DenominatorIn[625..625]), (sel[606..606] # DenominatorIn[624..624]), (sel[605..605] # DenominatorIn[623..623]), (sel[604..604] # DenominatorIn[622..622]), (sel[603..603] # DenominatorIn[621..621]), (sel[602..602] # DenominatorIn[620..620]), (sel[601..601] # DenominatorIn[619..619]), (sel[600..600] # DenominatorIn[618..618]), (sel[599..599] # DenominatorIn[617..617]), (sel[598..598] # DenominatorIn[616..616]), (sel[597..597] # DenominatorIn[615..615]), (sel[596..596] # DenominatorIn[614..614]), (sel[595..595] # DenominatorIn[613..613]), (sel[594..594] # DenominatorIn[612..612]), (sel[593..593] # DenominatorIn[611..611]), (sel[592..592] # DenominatorIn[610..610]), (sel[591..591] # DenominatorIn[609..609]), (sel[590..590] # DenominatorIn[608..608]), (sel[589..589] # DenominatorIn[607..607]), (sel[588..588] # DenominatorIn[606..606]), (sel[587..587] # DenominatorIn[605..605]), (sel[586..586] # DenominatorIn[604..604]), (sel[585..585] # DenominatorIn[603..603]), (sel[584..584] # DenominatorIn[602..602]), (sel[583..583] # DenominatorIn[601..601]), (sel[582..582] # DenominatorIn[600..600]), (sel[581..581] # DenominatorIn[599..599]), (sel[580..580] # DenominatorIn[598..598]), (sel[579..579] # DenominatorIn[597..597]), (sel[578..578] # DenominatorIn[596..596]), (sel[577..577] # DenominatorIn[595..595]), gnd_wire, (sel[575..575] # DenominatorIn[592..592]), (sel[574..574] # DenominatorIn[591..591]), (sel[573..573] # DenominatorIn[590..590]), (sel[572..572] # DenominatorIn[589..589]), (sel[571..571] # DenominatorIn[588..588]), (sel[570..570] # DenominatorIn[587..587]), (sel[569..569] # DenominatorIn[586..586]), (sel[568..568] # DenominatorIn[585..585]), (sel[567..567] # DenominatorIn[584..584]), (sel[566..566] # DenominatorIn[583..583]), (sel[565..565] # DenominatorIn[582..582]), (sel[564..564] # DenominatorIn[581..581]), (sel[563..563] # DenominatorIn[580..580]), (sel[562..562] # DenominatorIn[579..579]), (sel[561..561] # DenominatorIn[578..578]), (sel[560..560] # DenominatorIn[577..577]), (sel[559..559] # DenominatorIn[576..576]), (sel[558..558] # DenominatorIn[575..575]), (sel[557..557] # DenominatorIn[574..574]), (sel[556..556] # DenominatorIn[573..573]), (sel[555..555] # DenominatorIn[572..572]), (sel[554..554] # DenominatorIn[571..571]), (sel[553..553] # DenominatorIn[570..570]), (sel[552..552] # DenominatorIn[569..569]), (sel[551..551] # DenominatorIn[568..568]), (sel[550..550] # DenominatorIn[567..567]), (sel[549..549] # DenominatorIn[566..566]), (sel[548..548] # DenominatorIn[565..565]), (sel[547..547] # DenominatorIn[564..564]), (sel[546..546] # DenominatorIn[563..563]), (sel[545..545] # DenominatorIn[562..562]), gnd_wire, (sel[543..543] # DenominatorIn[559..559]), (sel[542..542] # DenominatorIn[558..558]), (sel[541..541] # DenominatorIn[557..557]), (sel[540..540] # DenominatorIn[556..556]), (sel[539..539] # DenominatorIn[555..555]), (sel[538..538] # DenominatorIn[554..554]), (sel[537..537] # DenominatorIn[553..553]), (sel[536..536] # DenominatorIn[552..552]), (sel[535..535] # DenominatorIn[551..551]), (sel[534..534] # DenominatorIn[550..550]), (sel[533..533] # DenominatorIn[549..549]), (sel[532..532] # DenominatorIn[548..548]), (sel[531..531] # DenominatorIn[547..547]), (sel[530..530] # DenominatorIn[546..546]), (sel[529..529] # DenominatorIn[545..545]), (sel[528..528] # DenominatorIn[544..544]), (sel[527..527] # DenominatorIn[543..543]), (sel[526..526] # DenominatorIn[542..542]), (sel[525..525] # DenominatorIn[541..541]), (sel[524..524] # DenominatorIn[540..540]), (sel[523..523] # DenominatorIn[539..539]), (sel[522..522] # DenominatorIn[538..538]), (sel[521..521] # DenominatorIn[537..537]), (sel[520..520] # DenominatorIn[536..536]), (sel[519..519] # DenominatorIn[535..535]), (sel[518..518] # DenominatorIn[534..534]), (sel[517..517] # DenominatorIn[533..533]), (sel[516..516] # DenominatorIn[532..532]), (sel[515..515] # DenominatorIn[531..531]), (sel[514..514] # DenominatorIn[530..530]), (sel[513..513] # DenominatorIn[529..529]), gnd_wire, (sel[511..511] # DenominatorIn[526..526]), (sel[510..510] # DenominatorIn[525..525]), (sel[509..509] # DenominatorIn[524..524]), (sel[508..508] # DenominatorIn[523..523]), (sel[507..507] # DenominatorIn[522..522]), (sel[506..506] # DenominatorIn[521..521]), (sel[505..505] # DenominatorIn[520..520]), (sel[504..504] # DenominatorIn[519..519]), (sel[503..503] # DenominatorIn[518..518]), (sel[502..502] # DenominatorIn[517..517]), (sel[501..501] # DenominatorIn[516..516]), (sel[500..500] # DenominatorIn[515..515]), (sel[499..499] # DenominatorIn[514..514]), (sel[498..498] # DenominatorIn[513..513]), (sel[497..497] # DenominatorIn[512..512]), (sel[496..496] # DenominatorIn[511..511]), (sel[495..495] # DenominatorIn[510..510]), (sel[494..494] # DenominatorIn[509..509]), (sel[493..493] # DenominatorIn[508..508]), (sel[492..492] # DenominatorIn[507..507]), (sel[491..491] # DenominatorIn[506..506]), (sel[490..490] # DenominatorIn[505..505]), (sel[489..489] # DenominatorIn[504..504]), (sel[488..488] # DenominatorIn[503..503]), (sel[487..487] # DenominatorIn[502..502]), (sel[486..486] # DenominatorIn[501..501]), (sel[485..485] # DenominatorIn[500..500]), (sel[484..484] # DenominatorIn[499..499]), (sel[483..483] # DenominatorIn[498..498]), (sel[482..482] # DenominatorIn[497..497]), (sel[481..481] # DenominatorIn[496..496]), gnd_wire, (sel[479..479] # DenominatorIn[493..493]), (sel[478..478] # DenominatorIn[492..492]), (sel[477..477] # DenominatorIn[491..491]), (sel[476..476] # DenominatorIn[490..490]), (sel[475..475] # DenominatorIn[489..489]), (sel[474..474] # DenominatorIn[488..488]), (sel[473..473] # DenominatorIn[487..487]), (sel[472..472] # DenominatorIn[486..486]), (sel[471..471] # DenominatorIn[485..485]), (sel[470..470] # DenominatorIn[484..484]), (sel[469..469] # DenominatorIn[483..483]), (sel[468..468] # DenominatorIn[482..482]), (sel[467..467] # DenominatorIn[481..481]), (sel[466..466] # DenominatorIn[480..480]), (sel[465..465] # DenominatorIn[479..479]), (sel[464..464] # DenominatorIn[478..478]), (sel[463..463] # DenominatorIn[477..477]), (sel[462..462] # DenominatorIn[476..476]), (sel[461..461] # DenominatorIn[475..475]), (sel[460..460] # DenominatorIn[474..474]), (sel[459..459] # DenominatorIn[473..473]), (sel[458..458] # DenominatorIn[472..472]), (sel[457..457] # DenominatorIn[471..471]), (sel[456..456] # DenominatorIn[470..470]), (sel[455..455] # DenominatorIn[469..469]), (sel[454..454] # DenominatorIn[468..468]), (sel[453..453] # DenominatorIn[467..467]), (sel[452..452] # DenominatorIn[466..466]), (sel[451..451] # DenominatorIn[465..465]), (sel[450..450] # DenominatorIn[464..464]), (sel[449..449] # DenominatorIn[463..463]), gnd_wire, (sel[447..447] # DenominatorIn[460..460]), (sel[446..446] # DenominatorIn[459..459]), (sel[445..445] # DenominatorIn[458..458]), (sel[444..444] # DenominatorIn[457..457]), (sel[443..443] # DenominatorIn[456..456]), (sel[442..442] # DenominatorIn[455..455]), (sel[441..441] # DenominatorIn[454..454]), (sel[440..440] # DenominatorIn[453..453]), (sel[439..439] # DenominatorIn[452..452]), (sel[438..438] # DenominatorIn[451..451]), (sel[437..437] # DenominatorIn[450..450]), (sel[436..436] # DenominatorIn[449..449]), (sel[435..435] # DenominatorIn[448..448]), (sel[434..434] # DenominatorIn[447..447]), (sel[433..433] # DenominatorIn[446..446]), (sel[432..432] # DenominatorIn[445..445]), (sel[431..431] # DenominatorIn[444..444]), (sel[430..430] # DenominatorIn[443..443]), (sel[429..429] # DenominatorIn[442..442]), (sel[428..428] # DenominatorIn[441..441]), (sel[427..427] # DenominatorIn[440..440]), (sel[426..426] # DenominatorIn[439..439]), (sel[425..425] # DenominatorIn[438..438]), (sel[424..424] # DenominatorIn[437..437]), (sel[423..423] # DenominatorIn[436..436]), (sel[422..422] # DenominatorIn[435..435]), (sel[421..421] # DenominatorIn[434..434]), (sel[420..420] # DenominatorIn[433..433]), (sel[419..419] # DenominatorIn[432..432]), (sel[418..418] # DenominatorIn[431..431]), (sel[417..417] # DenominatorIn[430..430]), gnd_wire, (sel[415..415] # DenominatorIn[427..427]), (sel[414..414] # DenominatorIn[426..426]), (sel[413..413] # DenominatorIn[425..425]), (sel[412..412] # DenominatorIn[424..424]), (sel[411..411] # DenominatorIn[423..423]), (sel[410..410] # DenominatorIn[422..422]), (sel[409..409] # DenominatorIn[421..421]), (sel[408..408] # DenominatorIn[420..420]), (sel[407..407] # DenominatorIn[419..419]), (sel[406..406] # DenominatorIn[418..418]), (sel[405..405] # DenominatorIn[417..417]), (sel[404..404] # DenominatorIn[416..416]), (sel[403..403] # DenominatorIn[415..415]), (sel[402..402] # DenominatorIn[414..414]), (sel[401..401] # DenominatorIn[413..413]), (sel[400..400] # DenominatorIn[412..412]), (sel[399..399] # DenominatorIn[411..411]), (sel[398..398] # DenominatorIn[410..410]), (sel[397..397] # DenominatorIn[409..409]), (sel[396..396] # DenominatorIn[408..408]), (sel[395..395] # DenominatorIn[407..407]), (sel[394..394] # DenominatorIn[406..406]), (sel[393..393] # DenominatorIn[405..405]), (sel[392..392] # DenominatorIn[404..404]), (sel[391..391] # DenominatorIn[403..403]), (sel[390..390] # DenominatorIn[402..402]), (sel[389..389] # DenominatorIn[401..401]), (sel[388..388] # DenominatorIn[400..400]), (sel[387..387] # DenominatorIn[399..399]), (sel[386..386] # DenominatorIn[398..398]), (sel[385..385] # DenominatorIn[397..397]), gnd_wire, (sel[383..383] # DenominatorIn[394..394]), (sel[382..382] # DenominatorIn[393..393]), (sel[381..381] # DenominatorIn[392..392]), (sel[380..380] # DenominatorIn[391..391]), (sel[379..379] # DenominatorIn[390..390]), (sel[378..378] # DenominatorIn[389..389]), (sel[377..377] # DenominatorIn[388..388]), (sel[376..376] # DenominatorIn[387..387]), (sel[375..375] # DenominatorIn[386..386]), (sel[374..374] # DenominatorIn[385..385]), (sel[373..373] # DenominatorIn[384..384]), (sel[372..372] # DenominatorIn[383..383]), (sel[371..371] # DenominatorIn[382..382]), (sel[370..370] # DenominatorIn[381..381]), (sel[369..369] # DenominatorIn[380..380]), (sel[368..368] # DenominatorIn[379..379]), (sel[367..367] # DenominatorIn[378..378]), (sel[366..366] # DenominatorIn[377..377]), (sel[365..365] # DenominatorIn[376..376]), (sel[364..364] # DenominatorIn[375..375]), (sel[363..363] # DenominatorIn[374..374]), (sel[362..362] # DenominatorIn[373..373]), (sel[361..361] # DenominatorIn[372..372]), (sel[360..360] # DenominatorIn[371..371]), (sel[359..359] # DenominatorIn[370..370]), (sel[358..358] # DenominatorIn[369..369]), (sel[357..357] # DenominatorIn[368..368]), (sel[356..356] # DenominatorIn[367..367]), (sel[355..355] # DenominatorIn[366..366]), (sel[354..354] # DenominatorIn[365..365]), (sel[353..353] # DenominatorIn[364..364]), gnd_wire, (sel[351..351] # DenominatorIn[361..361]), (sel[350..350] # DenominatorIn[360..360]), (sel[349..349] # DenominatorIn[359..359]), (sel[348..348] # DenominatorIn[358..358]), (sel[347..347] # DenominatorIn[357..357]), (sel[346..346] # DenominatorIn[356..356]), (sel[345..345] # DenominatorIn[355..355]), (sel[344..344] # DenominatorIn[354..354]), (sel[343..343] # DenominatorIn[353..353]), (sel[342..342] # DenominatorIn[352..352]), (sel[341..341] # DenominatorIn[351..351]), (sel[340..340] # DenominatorIn[350..350]), (sel[339..339] # DenominatorIn[349..349]), (sel[338..338] # DenominatorIn[348..348]), (sel[337..337] # DenominatorIn[347..347]), (sel[336..336] # DenominatorIn[346..346]), (sel[335..335] # DenominatorIn[345..345]), (sel[334..334] # DenominatorIn[344..344]), (sel[333..333] # DenominatorIn[343..343]), (sel[332..332] # DenominatorIn[342..342]), (sel[331..331] # DenominatorIn[341..341]), (sel[330..330] # DenominatorIn[340..340]), (sel[329..329] # DenominatorIn[339..339]), (sel[328..328] # DenominatorIn[338..338]), (sel[327..327] # DenominatorIn[337..337]), (sel[326..326] # DenominatorIn[336..336]), (sel[325..325] # DenominatorIn[335..335]), (sel[324..324] # DenominatorIn[334..334]), (sel[323..323] # DenominatorIn[333..333]), (sel[322..322] # DenominatorIn[332..332]), (sel[321..321] # DenominatorIn[331..331]), gnd_wire, (sel[319..319] # DenominatorIn[328..328]), (sel[318..318] # DenominatorIn[327..327]), (sel[317..317] # DenominatorIn[326..326]), (sel[316..316] # DenominatorIn[325..325]), (sel[315..315] # DenominatorIn[324..324]), (sel[314..314] # DenominatorIn[323..323]), (sel[313..313] # DenominatorIn[322..322]), (sel[312..312] # DenominatorIn[321..321]), (sel[311..311] # DenominatorIn[320..320]), (sel[310..310] # DenominatorIn[319..319]), (sel[309..309] # DenominatorIn[318..318]), (sel[308..308] # DenominatorIn[317..317]), (sel[307..307] # DenominatorIn[316..316]), (sel[306..306] # DenominatorIn[315..315]), (sel[305..305] # DenominatorIn[314..314]), (sel[304..304] # DenominatorIn[313..313]), (sel[303..303] # DenominatorIn[312..312]), (sel[302..302] # DenominatorIn[311..311]), (sel[301..301] # DenominatorIn[310..310]), (sel[300..300] # DenominatorIn[309..309]), (sel[299..299] # DenominatorIn[308..308]), (sel[298..298] # DenominatorIn[307..307]), (sel[297..297] # DenominatorIn[306..306]), (sel[296..296] # DenominatorIn[305..305]), (sel[295..295] # DenominatorIn[304..304]), (sel[294..294] # DenominatorIn[303..303]), (sel[293..293] # DenominatorIn[302..302]), (sel[292..292] # DenominatorIn[301..301]), (sel[291..291] # DenominatorIn[300..300]), (sel[290..290] # DenominatorIn[299..299]), (sel[289..289] # DenominatorIn[298..298]), gnd_wire, (sel[287..287] # DenominatorIn[295..295]), (sel[286..286] # DenominatorIn[294..294]), (sel[285..285] # DenominatorIn[293..293]), (sel[284..284] # DenominatorIn[292..292]), (sel[283..283] # DenominatorIn[291..291]), (sel[282..282] # DenominatorIn[290..290]), (sel[281..281] # DenominatorIn[289..289]), (sel[280..280] # DenominatorIn[288..288]), (sel[279..279] # DenominatorIn[287..287]), (sel[278..278] # DenominatorIn[286..286]), (sel[277..277] # DenominatorIn[285..285]), (sel[276..276] # DenominatorIn[284..284]), (sel[275..275] # DenominatorIn[283..283]), (sel[274..274] # DenominatorIn[282..282]), (sel[273..273] # DenominatorIn[281..281]), (sel[272..272] # DenominatorIn[280..280]), (sel[271..271] # DenominatorIn[279..279]), (sel[270..270] # DenominatorIn[278..278]), (sel[269..269] # DenominatorIn[277..277]), (sel[268..268] # DenominatorIn[276..276]), (sel[267..267] # DenominatorIn[275..275]), (sel[266..266] # DenominatorIn[274..274]), (sel[265..265] # DenominatorIn[273..273]), (sel[264..264] # DenominatorIn[272..272]), (sel[263..263] # DenominatorIn[271..271]), (sel[262..262] # DenominatorIn[270..270]), (sel[261..261] # DenominatorIn[269..269]), (sel[260..260] # DenominatorIn[268..268]), (sel[259..259] # DenominatorIn[267..267]), (sel[258..258] # DenominatorIn[266..266]), (sel[257..257] # DenominatorIn[265..265]), gnd_wire, (sel[255..255] # DenominatorIn[262..262]), (sel[254..254] # DenominatorIn[261..261]), (sel[253..253] # DenominatorIn[260..260]), (sel[252..252] # DenominatorIn[259..259]), (sel[251..251] # DenominatorIn[258..258]), (sel[250..250] # DenominatorIn[257..257]), (sel[249..249] # DenominatorIn[256..256]), (sel[248..248] # DenominatorIn[255..255]), (sel[247..247] # DenominatorIn[254..254]), (sel[246..246] # DenominatorIn[253..253]), (sel[245..245] # DenominatorIn[252..252]), (sel[244..244] # DenominatorIn[251..251]), (sel[243..243] # DenominatorIn[250..250]), (sel[242..242] # DenominatorIn[249..249]), (sel[241..241] # DenominatorIn[248..248]), (sel[240..240] # DenominatorIn[247..247]), (sel[239..239] # DenominatorIn[246..246]), (sel[238..238] # DenominatorIn[245..245]), (sel[237..237] # DenominatorIn[244..244]), (sel[236..236] # DenominatorIn[243..243]), (sel[235..235] # DenominatorIn[242..242]), (sel[234..234] # DenominatorIn[241..241]), (sel[233..233] # DenominatorIn[240..240]), (sel[232..232] # DenominatorIn[239..239]), (sel[231..231] # DenominatorIn[238..238]), (sel[230..230] # DenominatorIn[237..237]), (sel[229..229] # DenominatorIn[236..236]), (sel[228..228] # DenominatorIn[235..235]), (sel[227..227] # DenominatorIn[234..234]), (sel[226..226] # DenominatorIn[233..233]), (sel[225..225] # DenominatorIn[232..232]), gnd_wire, (sel[223..223] # DenominatorIn[229..229]), (sel[222..222] # DenominatorIn[228..228]), (sel[221..221] # DenominatorIn[227..227]), (sel[220..220] # DenominatorIn[226..226]), (sel[219..219] # DenominatorIn[225..225]), (sel[218..218] # DenominatorIn[224..224]), (sel[217..217] # DenominatorIn[223..223]), (sel[216..216] # DenominatorIn[222..222]), (sel[215..215] # DenominatorIn[221..221]), (sel[214..214] # DenominatorIn[220..220]), (sel[213..213] # DenominatorIn[219..219]), (sel[212..212] # DenominatorIn[218..218]), (sel[211..211] # DenominatorIn[217..217]), (sel[210..210] # DenominatorIn[216..216]), (sel[209..209] # DenominatorIn[215..215]), (sel[208..208] # DenominatorIn[214..214]), (sel[207..207] # DenominatorIn[213..213]), (sel[206..206] # DenominatorIn[212..212]), (sel[205..205] # DenominatorIn[211..211]), (sel[204..204] # DenominatorIn[210..210]), (sel[203..203] # DenominatorIn[209..209]), (sel[202..202] # DenominatorIn[208..208]), (sel[201..201] # DenominatorIn[207..207]), (sel[200..200] # DenominatorIn[206..206]), (sel[199..199] # DenominatorIn[205..205]), (sel[198..198] # DenominatorIn[204..204]), (sel[197..197] # DenominatorIn[203..203]), (sel[196..196] # DenominatorIn[202..202]), (sel[195..195] # DenominatorIn[201..201]), (sel[194..194] # DenominatorIn[200..200]), (sel[193..193] # DenominatorIn[199..199]), gnd_wire, (sel[191..191] # DenominatorIn[196..196]), (sel[190..190] # DenominatorIn[195..195]), (sel[189..189] # DenominatorIn[194..194]), (sel[188..188] # DenominatorIn[193..193]), (sel[187..187] # DenominatorIn[192..192]), (sel[186..186] # DenominatorIn[191..191]), (sel[185..185] # DenominatorIn[190..190]), (sel[184..184] # DenominatorIn[189..189]), (sel[183..183] # DenominatorIn[188..188]), (sel[182..182] # DenominatorIn[187..187]), (sel[181..181] # DenominatorIn[186..186]), (sel[180..180] # DenominatorIn[185..185]), (sel[179..179] # DenominatorIn[184..184]), (sel[178..178] # DenominatorIn[183..183]), (sel[177..177] # DenominatorIn[182..182]), (sel[176..176] # DenominatorIn[181..181]), (sel[175..175] # DenominatorIn[180..180]), (sel[174..174] # DenominatorIn[179..179]), (sel[173..173] # DenominatorIn[178..178]), (sel[172..172] # DenominatorIn[177..177]), (sel[171..171] # DenominatorIn[176..176]), (sel[170..170] # DenominatorIn[175..175]), (sel[169..169] # DenominatorIn[174..174]), (sel[168..168] # DenominatorIn[173..173]), (sel[167..167] # DenominatorIn[172..172]), (sel[166..166] # DenominatorIn[171..171]), (sel[165..165] # DenominatorIn[170..170]), (sel[164..164] # DenominatorIn[169..169]), (sel[163..163] # DenominatorIn[168..168]), (sel[162..162] # DenominatorIn[167..167]), (sel[161..161] # DenominatorIn[166..166]), gnd_wire, (sel[159..159] # DenominatorIn[163..163]), (sel[158..158] # DenominatorIn[162..162]), (sel[157..157] # DenominatorIn[161..161]), (sel[156..156] # DenominatorIn[160..160]), (sel[155..155] # DenominatorIn[159..159]), (sel[154..154] # DenominatorIn[158..158]), (sel[153..153] # DenominatorIn[157..157]), (sel[152..152] # DenominatorIn[156..156]), (sel[151..151] # DenominatorIn[155..155]), (sel[150..150] # DenominatorIn[154..154]), (sel[149..149] # DenominatorIn[153..153]), (sel[148..148] # DenominatorIn[152..152]), (sel[147..147] # DenominatorIn[151..151]), (sel[146..146] # DenominatorIn[150..150]), (sel[145..145] # DenominatorIn[149..149]), (sel[144..144] # DenominatorIn[148..148]), (sel[143..143] # DenominatorIn[147..147]), (sel[142..142] # DenominatorIn[146..146]), (sel[141..141] # DenominatorIn[145..145]), (sel[140..140] # DenominatorIn[144..144]), (sel[139..139] # DenominatorIn[143..143]), (sel[138..138] # DenominatorIn[142..142]), (sel[137..137] # DenominatorIn[141..141]), (sel[136..136] # DenominatorIn[140..140]), (sel[135..135] # DenominatorIn[139..139]), (sel[134..134] # DenominatorIn[138..138]), (sel[133..133] # DenominatorIn[137..137]), (sel[132..132] # DenominatorIn[136..136]), (sel[131..131] # DenominatorIn[135..135]), (sel[130..130] # DenominatorIn[134..134]), (sel[129..129] # DenominatorIn[133..133]), gnd_wire, (sel[127..127] # DenominatorIn[130..130]), (sel[126..126] # DenominatorIn[129..129]), (sel[125..125] # DenominatorIn[128..128]), (sel[124..124] # DenominatorIn[127..127]), (sel[123..123] # DenominatorIn[126..126]), (sel[122..122] # DenominatorIn[125..125]), (sel[121..121] # DenominatorIn[124..124]), (sel[120..120] # DenominatorIn[123..123]), (sel[119..119] # DenominatorIn[122..122]), (sel[118..118] # DenominatorIn[121..121]), (sel[117..117] # DenominatorIn[120..120]), (sel[116..116] # DenominatorIn[119..119]), (sel[115..115] # DenominatorIn[118..118]), (sel[114..114] # DenominatorIn[117..117]), (sel[113..113] # DenominatorIn[116..116]), (sel[112..112] # DenominatorIn[115..115]), (sel[111..111] # DenominatorIn[114..114]), (sel[110..110] # DenominatorIn[113..113]), (sel[109..109] # DenominatorIn[112..112]), (sel[108..108] # DenominatorIn[111..111]), (sel[107..107] # DenominatorIn[110..110]), (sel[106..106] # DenominatorIn[109..109]), (sel[105..105] # DenominatorIn[108..108]), (sel[104..104] # DenominatorIn[107..107]), (sel[103..103] # DenominatorIn[106..106]), (sel[102..102] # DenominatorIn[105..105]), (sel[101..101] # DenominatorIn[104..104]), (sel[100..100] # DenominatorIn[103..103]), (sel[99..99] # DenominatorIn[102..102]), (sel[98..98] # DenominatorIn[101..101]), (sel[97..97] # DenominatorIn[100..100]), gnd_wire, (sel[95..95] # DenominatorIn[97..97]), (sel[94..94] # DenominatorIn[96..96]), (sel[93..93] # DenominatorIn[95..95]), (sel[92..92] # DenominatorIn[94..94]), (sel[91..91] # DenominatorIn[93..93]), (sel[90..90] # DenominatorIn[92..92]), (sel[89..89] # DenominatorIn[91..91]), (sel[88..88] # DenominatorIn[90..90]), (sel[87..87] # DenominatorIn[89..89]), (sel[86..86] # DenominatorIn[88..88]), (sel[85..85] # DenominatorIn[87..87]), (sel[84..84] # DenominatorIn[86..86]), (sel[83..83] # DenominatorIn[85..85]), (sel[82..82] # DenominatorIn[84..84]), (sel[81..81] # DenominatorIn[83..83]), (sel[80..80] # DenominatorIn[82..82]), (sel[79..79] # DenominatorIn[81..81]), (sel[78..78] # DenominatorIn[80..80]), (sel[77..77] # DenominatorIn[79..79]), (sel[76..76] # DenominatorIn[78..78]), (sel[75..75] # DenominatorIn[77..77]), (sel[74..74] # DenominatorIn[76..76]), (sel[73..73] # DenominatorIn[75..75]), (sel[72..72] # DenominatorIn[74..74]), (sel[71..71] # DenominatorIn[73..73]), (sel[70..70] # DenominatorIn[72..72]), (sel[69..69] # DenominatorIn[71..71]), (sel[68..68] # DenominatorIn[70..70]), (sel[67..67] # DenominatorIn[69..69]), (sel[66..66] # DenominatorIn[68..68]), (sel[65..65] # DenominatorIn[67..67]), gnd_wire, (sel[63..63] # DenominatorIn[64..64]), (sel[62..62] # DenominatorIn[63..63]), (sel[61..61] # DenominatorIn[62..62]), (sel[60..60] # DenominatorIn[61..61]), (sel[59..59] # DenominatorIn[60..60]), (sel[58..58] # DenominatorIn[59..59]), (sel[57..57] # DenominatorIn[58..58]), (sel[56..56] # DenominatorIn[57..57]), (sel[55..55] # DenominatorIn[56..56]), (sel[54..54] # DenominatorIn[55..55]), (sel[53..53] # DenominatorIn[54..54]), (sel[52..52] # DenominatorIn[53..53]), (sel[51..51] # DenominatorIn[52..52]), (sel[50..50] # DenominatorIn[51..51]), (sel[49..49] # DenominatorIn[50..50]), (sel[48..48] # DenominatorIn[49..49]), (sel[47..47] # DenominatorIn[48..48]), (sel[46..46] # DenominatorIn[47..47]), (sel[45..45] # DenominatorIn[46..46]), (sel[44..44] # DenominatorIn[45..45]), (sel[43..43] # DenominatorIn[44..44]), (sel[42..42] # DenominatorIn[43..43]), (sel[41..41] # DenominatorIn[42..42]), (sel[40..40] # DenominatorIn[41..41]), (sel[39..39] # DenominatorIn[40..40]), (sel[38..38] # DenominatorIn[39..39]), (sel[37..37] # DenominatorIn[38..38]), (sel[36..36] # DenominatorIn[37..37]), (sel[35..35] # DenominatorIn[36..36]), (sel[34..34] # DenominatorIn[35..35]), (sel[33..33] # DenominatorIn[34..34]), gnd_wire, (sel[31..31] # DenominatorIn[31..31]), (sel[30..30] # DenominatorIn[30..30]), (sel[29..29] # DenominatorIn[29..29]), (sel[28..28] # DenominatorIn[28..28]), (sel[27..27] # DenominatorIn[27..27]), (sel[26..26] # DenominatorIn[26..26]), (sel[25..25] # DenominatorIn[25..25]), (sel[24..24] # DenominatorIn[24..24]), (sel[23..23] # DenominatorIn[23..23]), (sel[22..22] # DenominatorIn[22..22]), (sel[21..21] # DenominatorIn[21..21]), (sel[20..20] # DenominatorIn[20..20]), (sel[19..19] # DenominatorIn[19..19]), (sel[18..18] # DenominatorIn[18..18]), (sel[17..17] # DenominatorIn[17..17]), (sel[16..16] # DenominatorIn[16..16]), (sel[15..15] # DenominatorIn[15..15]), (sel[14..14] # DenominatorIn[14..14]), (sel[13..13] # DenominatorIn[13..13]), (sel[12..12] # DenominatorIn[12..12]), (sel[11..11] # DenominatorIn[11..11]), (sel[10..10] # DenominatorIn[10..10]), (sel[9..9] # DenominatorIn[9..9]), (sel[8..8] # DenominatorIn[8..8]), (sel[7..7] # DenominatorIn[7..7]), (sel[6..6] # DenominatorIn[6..6]), (sel[5..5] # DenominatorIn[5..5]), (sel[4..4] # DenominatorIn[4..4]), (sel[3..3] # DenominatorIn[3..3]), (sel[2..2] # DenominatorIn[2..2]), (sel[1..1] # DenominatorIn[1..1])); - selnose[] = ( (! nose[1121..1121]), ((! nose[1120..1120]) # sel[1087..1087]), ((! nose[1119..1119]) # sel[1086..1086]), ((! nose[1118..1118]) # sel[1085..1085]), ((! nose[1117..1117]) # sel[1084..1084]), ((! nose[1116..1116]) # sel[1083..1083]), ((! nose[1115..1115]) # sel[1082..1082]), ((! nose[1114..1114]) # sel[1081..1081]), ((! nose[1113..1113]) # sel[1080..1080]), ((! nose[1112..1112]) # sel[1079..1079]), ((! nose[1111..1111]) # sel[1078..1078]), ((! nose[1110..1110]) # sel[1077..1077]), ((! nose[1109..1109]) # sel[1076..1076]), ((! nose[1108..1108]) # sel[1075..1075]), ((! nose[1107..1107]) # sel[1074..1074]), ((! nose[1106..1106]) # sel[1073..1073]), ((! nose[1105..1105]) # sel[1072..1072]), ((! nose[1104..1104]) # sel[1071..1071]), ((! nose[1103..1103]) # sel[1070..1070]), ((! nose[1102..1102]) # sel[1069..1069]), ((! nose[1101..1101]) # sel[1068..1068]), ((! nose[1100..1100]) # sel[1067..1067]), ((! nose[1099..1099]) # sel[1066..1066]), ((! nose[1098..1098]) # sel[1065..1065]), ((! nose[1097..1097]) # sel[1064..1064]), ((! nose[1096..1096]) # sel[1063..1063]), ((! nose[1095..1095]) # sel[1062..1062]), ((! nose[1094..1094]) # sel[1061..1061]), ((! nose[1093..1093]) # sel[1060..1060]), ((! nose[1092..1092]) # sel[1059..1059]), ((! nose[1091..1091]) # sel[1058..1058]), ((! nose[1090..1090]) # sel[1057..1057]), ((! nose[1089..1089]) # sel[1056..1056]), (! nose[1088..1088]), ((! nose[1087..1087]) # sel[1055..1055]), ((! nose[1086..1086]) # sel[1054..1054]), ((! nose[1085..1085]) # sel[1053..1053]), ((! nose[1084..1084]) # sel[1052..1052]), ((! nose[1083..1083]) # sel[1051..1051]), ((! nose[1082..1082]) # sel[1050..1050]), ((! nose[1081..1081]) # sel[1049..1049]), ((! nose[1080..1080]) # sel[1048..1048]), ((! nose[1079..1079]) # sel[1047..1047]), ((! nose[1078..1078]) # sel[1046..1046]), ((! nose[1077..1077]) # sel[1045..1045]), ((! nose[1076..1076]) # sel[1044..1044]), ((! nose[1075..1075]) # sel[1043..1043]), ((! nose[1074..1074]) # sel[1042..1042]), ((! nose[1073..1073]) # sel[1041..1041]), ((! nose[1072..1072]) # sel[1040..1040]), ((! nose[1071..1071]) # sel[1039..1039]), ((! nose[1070..1070]) # sel[1038..1038]), ((! nose[1069..1069]) # sel[1037..1037]), ((! nose[1068..1068]) # sel[1036..1036]), ((! nose[1067..1067]) # sel[1035..1035]), ((! nose[1066..1066]) # sel[1034..1034]), ((! nose[1065..1065]) # sel[1033..1033]), ((! nose[1064..1064]) # sel[1032..1032]), ((! nose[1063..1063]) # sel[1031..1031]), ((! nose[1062..1062]) # sel[1030..1030]), ((! nose[1061..1061]) # sel[1029..1029]), ((! nose[1060..1060]) # sel[1028..1028]), ((! nose[1059..1059]) # sel[1027..1027]), ((! nose[1058..1058]) # sel[1026..1026]), ((! nose[1057..1057]) # sel[1025..1025]), ((! nose[1056..1056]) # sel[1024..1024]), (! nose[1055..1055]), ((! nose[1054..1054]) # sel[1023..1023]), ((! nose[1053..1053]) # sel[1022..1022]), ((! nose[1052..1052]) # sel[1021..1021]), ((! nose[1051..1051]) # sel[1020..1020]), ((! nose[1050..1050]) # sel[1019..1019]), ((! nose[1049..1049]) # sel[1018..1018]), ((! nose[1048..1048]) # sel[1017..1017]), ((! nose[1047..1047]) # sel[1016..1016]), ((! nose[1046..1046]) # sel[1015..1015]), ((! nose[1045..1045]) # sel[1014..1014]), ((! nose[1044..1044]) # sel[1013..1013]), ((! nose[1043..1043]) # sel[1012..1012]), ((! nose[1042..1042]) # sel[1011..1011]), ((! nose[1041..1041]) # sel[1010..1010]), ((! nose[1040..1040]) # sel[1009..1009]), ((! nose[1039..1039]) # sel[1008..1008]), ((! nose[1038..1038]) # sel[1007..1007]), ((! nose[1037..1037]) # sel[1006..1006]), ((! nose[1036..1036]) # sel[1005..1005]), ((! nose[1035..1035]) # sel[1004..1004]), ((! nose[1034..1034]) # sel[1003..1003]), ((! nose[1033..1033]) # sel[1002..1002]), ((! nose[1032..1032]) # sel[1001..1001]), ((! nose[1031..1031]) # sel[1000..1000]), ((! nose[1030..1030]) # sel[999..999]), ((! nose[1029..1029]) # sel[998..998]), ((! nose[1028..1028]) # sel[997..997]), ((! nose[1027..1027]) # sel[996..996]), ((! nose[1026..1026]) # sel[995..995]), ((! nose[1025..1025]) # sel[994..994]), ((! nose[1024..1024]) # sel[993..993]), ((! nose[1023..1023]) # sel[992..992]), (! nose[1022..1022]), ((! nose[1021..1021]) # sel[991..991]), ((! nose[1020..1020]) # sel[990..990]), ((! nose[1019..1019]) # sel[989..989]), ((! nose[1018..1018]) # sel[988..988]), ((! nose[1017..1017]) # sel[987..987]), ((! nose[1016..1016]) # sel[986..986]), ((! nose[1015..1015]) # sel[985..985]), ((! nose[1014..1014]) # sel[984..984]), ((! nose[1013..1013]) # sel[983..983]), ((! nose[1012..1012]) # sel[982..982]), ((! nose[1011..1011]) # sel[981..981]), ((! nose[1010..1010]) # sel[980..980]), ((! nose[1009..1009]) # sel[979..979]), ((! nose[1008..1008]) # sel[978..978]), ((! nose[1007..1007]) # sel[977..977]), ((! nose[1006..1006]) # sel[976..976]), ((! nose[1005..1005]) # sel[975..975]), ((! nose[1004..1004]) # sel[974..974]), ((! nose[1003..1003]) # sel[973..973]), ((! nose[1002..1002]) # sel[972..972]), ((! nose[1001..1001]) # sel[971..971]), ((! nose[1000..1000]) # sel[970..970]), ((! nose[999..999]) # sel[969..969]), ((! nose[998..998]) # sel[968..968]), ((! nose[997..997]) # sel[967..967]), ((! nose[996..996]) # sel[966..966]), ((! nose[995..995]) # sel[965..965]), ((! nose[994..994]) # sel[964..964]), ((! nose[993..993]) # sel[963..963]), ((! nose[992..992]) # sel[962..962]), ((! nose[991..991]) # sel[961..961]), ((! nose[990..990]) # sel[960..960]), (! nose[989..989]), ((! nose[988..988]) # sel[959..959]), ((! nose[987..987]) # sel[958..958]), ((! nose[986..986]) # sel[957..957]), ((! nose[985..985]) # sel[956..956]), ((! nose[984..984]) # sel[955..955]), ((! nose[983..983]) # sel[954..954]), ((! nose[982..982]) # sel[953..953]), ((! nose[981..981]) # sel[952..952]), ((! nose[980..980]) # sel[951..951]), ((! nose[979..979]) # sel[950..950]), ((! nose[978..978]) # sel[949..949]), ((! nose[977..977]) # sel[948..948]), ((! nose[976..976]) # sel[947..947]), ((! nose[975..975]) # sel[946..946]), ((! nose[974..974]) # sel[945..945]), ((! nose[973..973]) # sel[944..944]), ((! nose[972..972]) # sel[943..943]), ((! nose[971..971]) # sel[942..942]), ((! nose[970..970]) # sel[941..941]), ((! nose[969..969]) # sel[940..940]), ((! nose[968..968]) # sel[939..939]), ((! nose[967..967]) # sel[938..938]), ((! nose[966..966]) # sel[937..937]), ((! nose[965..965]) # sel[936..936]), ((! nose[964..964]) # sel[935..935]), ((! nose[963..963]) # sel[934..934]), ((! nose[962..962]) # sel[933..933]), ((! nose[961..961]) # sel[932..932]), ((! nose[960..960]) # sel[931..931]), ((! nose[959..959]) # sel[930..930]), ((! nose[958..958]) # sel[929..929]), ((! nose[957..957]) # sel[928..928]), (! nose[956..956]), ((! nose[955..955]) # sel[927..927]), ((! nose[954..954]) # sel[926..926]), ((! nose[953..953]) # sel[925..925]), ((! nose[952..952]) # sel[924..924]), ((! nose[951..951]) # sel[923..923]), ((! nose[950..950]) # sel[922..922]), ((! nose[949..949]) # sel[921..921]), ((! nose[948..948]) # sel[920..920]), ((! nose[947..947]) # sel[919..919]), ((! nose[946..946]) # sel[918..918]), ((! nose[945..945]) # sel[917..917]), ((! nose[944..944]) # sel[916..916]), ((! nose[943..943]) # sel[915..915]), ((! nose[942..942]) # sel[914..914]), ((! nose[941..941]) # sel[913..913]), ((! nose[940..940]) # sel[912..912]), ((! nose[939..939]) # sel[911..911]), ((! nose[938..938]) # sel[910..910]), ((! nose[937..937]) # sel[909..909]), ((! nose[936..936]) # sel[908..908]), ((! nose[935..935]) # sel[907..907]), ((! nose[934..934]) # sel[906..906]), ((! nose[933..933]) # sel[905..905]), ((! nose[932..932]) # sel[904..904]), ((! nose[931..931]) # sel[903..903]), ((! nose[930..930]) # sel[902..902]), ((! nose[929..929]) # sel[901..901]), ((! nose[928..928]) # sel[900..900]), ((! nose[927..927]) # sel[899..899]), ((! nose[926..926]) # sel[898..898]), ((! nose[925..925]) # sel[897..897]), ((! nose[924..924]) # sel[896..896]), (! nose[923..923]), ((! nose[922..922]) # sel[895..895]), ((! nose[921..921]) # sel[894..894]), ((! nose[920..920]) # sel[893..893]), ((! nose[919..919]) # sel[892..892]), ((! nose[918..918]) # sel[891..891]), ((! nose[917..917]) # sel[890..890]), ((! nose[916..916]) # sel[889..889]), ((! nose[915..915]) # sel[888..888]), ((! nose[914..914]) # sel[887..887]), ((! nose[913..913]) # sel[886..886]), ((! nose[912..912]) # sel[885..885]), ((! nose[911..911]) # sel[884..884]), ((! nose[910..910]) # sel[883..883]), ((! nose[909..909]) # sel[882..882]), ((! nose[908..908]) # sel[881..881]), ((! nose[907..907]) # sel[880..880]), ((! nose[906..906]) # sel[879..879]), ((! nose[905..905]) # sel[878..878]), ((! nose[904..904]) # sel[877..877]), ((! nose[903..903]) # sel[876..876]), ((! nose[902..902]) # sel[875..875]), ((! nose[901..901]) # sel[874..874]), ((! nose[900..900]) # sel[873..873]), ((! nose[899..899]) # sel[872..872]), ((! nose[898..898]) # sel[871..871]), ((! nose[897..897]) # sel[870..870]), ((! nose[896..896]) # sel[869..869]), ((! nose[895..895]) # sel[868..868]), ((! nose[894..894]) # sel[867..867]), ((! nose[893..893]) # sel[866..866]), ((! nose[892..892]) # sel[865..865]), ((! nose[891..891]) # sel[864..864]), (! nose[890..890]), ((! nose[889..889]) # sel[863..863]), ((! nose[888..888]) # sel[862..862]), ((! nose[887..887]) # sel[861..861]), ((! nose[886..886]) # sel[860..860]), ((! nose[885..885]) # sel[859..859]), ((! nose[884..884]) # sel[858..858]), ((! nose[883..883]) # sel[857..857]), ((! nose[882..882]) # sel[856..856]), ((! nose[881..881]) # sel[855..855]), ((! nose[880..880]) # sel[854..854]), ((! nose[879..879]) # sel[853..853]), ((! nose[878..878]) # sel[852..852]), ((! nose[877..877]) # sel[851..851]), ((! nose[876..876]) # sel[850..850]), ((! nose[875..875]) # sel[849..849]), ((! nose[874..874]) # sel[848..848]), ((! nose[873..873]) # sel[847..847]), ((! nose[872..872]) # sel[846..846]), ((! nose[871..871]) # sel[845..845]), ((! nose[870..870]) # sel[844..844]), ((! nose[869..869]) # sel[843..843]), ((! nose[868..868]) # sel[842..842]), ((! nose[867..867]) # sel[841..841]), ((! nose[866..866]) # sel[840..840]), ((! nose[865..865]) # sel[839..839]), ((! nose[864..864]) # sel[838..838]), ((! nose[863..863]) # sel[837..837]), ((! nose[862..862]) # sel[836..836]), ((! nose[861..861]) # sel[835..835]), ((! nose[860..860]) # sel[834..834]), ((! nose[859..859]) # sel[833..833]), ((! nose[858..858]) # sel[832..832]), (! nose[857..857]), ((! nose[856..856]) # sel[831..831]), ((! nose[855..855]) # sel[830..830]), ((! nose[854..854]) # sel[829..829]), ((! nose[853..853]) # sel[828..828]), ((! nose[852..852]) # sel[827..827]), ((! nose[851..851]) # sel[826..826]), ((! nose[850..850]) # sel[825..825]), ((! nose[849..849]) # sel[824..824]), ((! nose[848..848]) # sel[823..823]), ((! nose[847..847]) # sel[822..822]), ((! nose[846..846]) # sel[821..821]), ((! nose[845..845]) # sel[820..820]), ((! nose[844..844]) # sel[819..819]), ((! nose[843..843]) # sel[818..818]), ((! nose[842..842]) # sel[817..817]), ((! nose[841..841]) # sel[816..816]), ((! nose[840..840]) # sel[815..815]), ((! nose[839..839]) # sel[814..814]), ((! nose[838..838]) # sel[813..813]), ((! nose[837..837]) # sel[812..812]), ((! nose[836..836]) # sel[811..811]), ((! nose[835..835]) # sel[810..810]), ((! nose[834..834]) # sel[809..809]), ((! nose[833..833]) # sel[808..808]), ((! nose[832..832]) # sel[807..807]), ((! nose[831..831]) # sel[806..806]), ((! nose[830..830]) # sel[805..805]), ((! nose[829..829]) # sel[804..804]), ((! nose[828..828]) # sel[803..803]), ((! nose[827..827]) # sel[802..802]), ((! nose[826..826]) # sel[801..801]), ((! nose[825..825]) # sel[800..800]), (! nose[824..824]), ((! nose[823..823]) # sel[799..799]), ((! nose[822..822]) # sel[798..798]), ((! nose[821..821]) # sel[797..797]), ((! nose[820..820]) # sel[796..796]), ((! nose[819..819]) # sel[795..795]), ((! nose[818..818]) # sel[794..794]), ((! nose[817..817]) # sel[793..793]), ((! nose[816..816]) # sel[792..792]), ((! nose[815..815]) # sel[791..791]), ((! nose[814..814]) # sel[790..790]), ((! nose[813..813]) # sel[789..789]), ((! nose[812..812]) # sel[788..788]), ((! nose[811..811]) # sel[787..787]), ((! nose[810..810]) # sel[786..786]), ((! nose[809..809]) # sel[785..785]), ((! nose[808..808]) # sel[784..784]), ((! nose[807..807]) # sel[783..783]), ((! nose[806..806]) # sel[782..782]), ((! nose[805..805]) # sel[781..781]), ((! nose[804..804]) # sel[780..780]), ((! nose[803..803]) # sel[779..779]), ((! nose[802..802]) # sel[778..778]), ((! nose[801..801]) # sel[777..777]), ((! nose[800..800]) # sel[776..776]), ((! nose[799..799]) # sel[775..775]), ((! nose[798..798]) # sel[774..774]), ((! nose[797..797]) # sel[773..773]), ((! nose[796..796]) # sel[772..772]), ((! nose[795..795]) # sel[771..771]), ((! nose[794..794]) # sel[770..770]), ((! nose[793..793]) # sel[769..769]), ((! nose[792..792]) # sel[768..768]), (! nose[791..791]), ((! nose[790..790]) # sel[767..767]), ((! nose[789..789]) # sel[766..766]), ((! nose[788..788]) # sel[765..765]), ((! nose[787..787]) # sel[764..764]), ((! nose[786..786]) # sel[763..763]), ((! nose[785..785]) # sel[762..762]), ((! nose[784..784]) # sel[761..761]), ((! nose[783..783]) # sel[760..760]), ((! nose[782..782]) # sel[759..759]), ((! nose[781..781]) # sel[758..758]), ((! nose[780..780]) # sel[757..757]), ((! nose[779..779]) # sel[756..756]), ((! nose[778..778]) # sel[755..755]), ((! nose[777..777]) # sel[754..754]), ((! nose[776..776]) # sel[753..753]), ((! nose[775..775]) # sel[752..752]), ((! nose[774..774]) # sel[751..751]), ((! nose[773..773]) # sel[750..750]), ((! nose[772..772]) # sel[749..749]), ((! nose[771..771]) # sel[748..748]), ((! nose[770..770]) # sel[747..747]), ((! nose[769..769]) # sel[746..746]), ((! nose[768..768]) # sel[745..745]), ((! nose[767..767]) # sel[744..744]), ((! nose[766..766]) # sel[743..743]), ((! nose[765..765]) # sel[742..742]), ((! nose[764..764]) # sel[741..741]), ((! nose[763..763]) # sel[740..740]), ((! nose[762..762]) # sel[739..739]), ((! nose[761..761]) # sel[738..738]), ((! nose[760..760]) # sel[737..737]), ((! nose[759..759]) # sel[736..736]), (! nose[758..758]), ((! nose[757..757]) # sel[735..735]), ((! nose[756..756]) # sel[734..734]), ((! nose[755..755]) # sel[733..733]), ((! nose[754..754]) # sel[732..732]), ((! nose[753..753]) # sel[731..731]), ((! nose[752..752]) # sel[730..730]), ((! nose[751..751]) # sel[729..729]), ((! nose[750..750]) # sel[728..728]), ((! nose[749..749]) # sel[727..727]), ((! nose[748..748]) # sel[726..726]), ((! nose[747..747]) # sel[725..725]), ((! nose[746..746]) # sel[724..724]), ((! nose[745..745]) # sel[723..723]), ((! nose[744..744]) # sel[722..722]), ((! nose[743..743]) # sel[721..721]), ((! nose[742..742]) # sel[720..720]), ((! nose[741..741]) # sel[719..719]), ((! nose[740..740]) # sel[718..718]), ((! nose[739..739]) # sel[717..717]), ((! nose[738..738]) # sel[716..716]), ((! nose[737..737]) # sel[715..715]), ((! nose[736..736]) # sel[714..714]), ((! nose[735..735]) # sel[713..713]), ((! nose[734..734]) # sel[712..712]), ((! nose[733..733]) # sel[711..711]), ((! nose[732..732]) # sel[710..710]), ((! nose[731..731]) # sel[709..709]), ((! nose[730..730]) # sel[708..708]), ((! nose[729..729]) # sel[707..707]), ((! nose[728..728]) # sel[706..706]), ((! nose[727..727]) # sel[705..705]), ((! nose[726..726]) # sel[704..704]), (! nose[725..725]), ((! nose[724..724]) # sel[703..703]), ((! nose[723..723]) # sel[702..702]), ((! nose[722..722]) # sel[701..701]), ((! nose[721..721]) # sel[700..700]), ((! nose[720..720]) # sel[699..699]), ((! nose[719..719]) # sel[698..698]), ((! nose[718..718]) # sel[697..697]), ((! nose[717..717]) # sel[696..696]), ((! nose[716..716]) # sel[695..695]), ((! nose[715..715]) # sel[694..694]), ((! nose[714..714]) # sel[693..693]), ((! nose[713..713]) # sel[692..692]), ((! nose[712..712]) # sel[691..691]), ((! nose[711..711]) # sel[690..690]), ((! nose[710..710]) # sel[689..689]), ((! nose[709..709]) # sel[688..688]), ((! nose[708..708]) # sel[687..687]), ((! nose[707..707]) # sel[686..686]), ((! nose[706..706]) # sel[685..685]), ((! nose[705..705]) # sel[684..684]), ((! nose[704..704]) # sel[683..683]), ((! nose[703..703]) # sel[682..682]), ((! nose[702..702]) # sel[681..681]), ((! nose[701..701]) # sel[680..680]), ((! nose[700..700]) # sel[679..679]), ((! nose[699..699]) # sel[678..678]), ((! nose[698..698]) # sel[677..677]), ((! nose[697..697]) # sel[676..676]), ((! nose[696..696]) # sel[675..675]), ((! nose[695..695]) # sel[674..674]), ((! nose[694..694]) # sel[673..673]), ((! nose[693..693]) # sel[672..672]), (! nose[692..692]), ((! nose[691..691]) # sel[671..671]), ((! nose[690..690]) # sel[670..670]), ((! nose[689..689]) # sel[669..669]), ((! nose[688..688]) # sel[668..668]), ((! nose[687..687]) # sel[667..667]), ((! nose[686..686]) # sel[666..666]), ((! nose[685..685]) # sel[665..665]), ((! nose[684..684]) # sel[664..664]), ((! nose[683..683]) # sel[663..663]), ((! nose[682..682]) # sel[662..662]), ((! nose[681..681]) # sel[661..661]), ((! nose[680..680]) # sel[660..660]), ((! nose[679..679]) # sel[659..659]), ((! nose[678..678]) # sel[658..658]), ((! nose[677..677]) # sel[657..657]), ((! nose[676..676]) # sel[656..656]), ((! nose[675..675]) # sel[655..655]), ((! nose[674..674]) # sel[654..654]), ((! nose[673..673]) # sel[653..653]), ((! nose[672..672]) # sel[652..652]), ((! nose[671..671]) # sel[651..651]), ((! nose[670..670]) # sel[650..650]), ((! nose[669..669]) # sel[649..649]), ((! nose[668..668]) # sel[648..648]), ((! nose[667..667]) # sel[647..647]), ((! nose[666..666]) # sel[646..646]), ((! nose[665..665]) # sel[645..645]), ((! nose[664..664]) # sel[644..644]), ((! nose[663..663]) # sel[643..643]), ((! nose[662..662]) # sel[642..642]), ((! nose[661..661]) # sel[641..641]), ((! nose[660..660]) # sel[640..640]), (! nose[659..659]), ((! nose[658..658]) # sel[639..639]), ((! nose[657..657]) # sel[638..638]), ((! nose[656..656]) # sel[637..637]), ((! nose[655..655]) # sel[636..636]), ((! nose[654..654]) # sel[635..635]), ((! nose[653..653]) # sel[634..634]), ((! nose[652..652]) # sel[633..633]), ((! nose[651..651]) # sel[632..632]), ((! nose[650..650]) # sel[631..631]), ((! nose[649..649]) # sel[630..630]), ((! nose[648..648]) # sel[629..629]), ((! nose[647..647]) # sel[628..628]), ((! nose[646..646]) # sel[627..627]), ((! nose[645..645]) # sel[626..626]), ((! nose[644..644]) # sel[625..625]), ((! nose[643..643]) # sel[624..624]), ((! nose[642..642]) # sel[623..623]), ((! nose[641..641]) # sel[622..622]), ((! nose[640..640]) # sel[621..621]), ((! nose[639..639]) # sel[620..620]), ((! nose[638..638]) # sel[619..619]), ((! nose[637..637]) # sel[618..618]), ((! nose[636..636]) # sel[617..617]), ((! nose[635..635]) # sel[616..616]), ((! nose[634..634]) # sel[615..615]), ((! nose[633..633]) # sel[614..614]), ((! nose[632..632]) # sel[613..613]), ((! nose[631..631]) # sel[612..612]), ((! nose[630..630]) # sel[611..611]), ((! nose[629..629]) # sel[610..610]), ((! nose[628..628]) # sel[609..609]), ((! nose[627..627]) # sel[608..608]), (! nose[626..626]), ((! nose[625..625]) # sel[607..607]), ((! nose[624..624]) # sel[606..606]), ((! nose[623..623]) # sel[605..605]), ((! nose[622..622]) # sel[604..604]), ((! nose[621..621]) # sel[603..603]), ((! nose[620..620]) # sel[602..602]), ((! nose[619..619]) # sel[601..601]), ((! nose[618..618]) # sel[600..600]), ((! nose[617..617]) # sel[599..599]), ((! nose[616..616]) # sel[598..598]), ((! nose[615..615]) # sel[597..597]), ((! nose[614..614]) # sel[596..596]), ((! nose[613..613]) # sel[595..595]), ((! nose[612..612]) # sel[594..594]), ((! nose[611..611]) # sel[593..593]), ((! nose[610..610]) # sel[592..592]), ((! nose[609..609]) # sel[591..591]), ((! nose[608..608]) # sel[590..590]), ((! nose[607..607]) # sel[589..589]), ((! nose[606..606]) # sel[588..588]), ((! nose[605..605]) # sel[587..587]), ((! nose[604..604]) # sel[586..586]), ((! nose[603..603]) # sel[585..585]), ((! nose[602..602]) # sel[584..584]), ((! nose[601..601]) # sel[583..583]), ((! nose[600..600]) # sel[582..582]), ((! nose[599..599]) # sel[581..581]), ((! nose[598..598]) # sel[580..580]), ((! nose[597..597]) # sel[579..579]), ((! nose[596..596]) # sel[578..578]), ((! nose[595..595]) # sel[577..577]), ((! nose[594..594]) # sel[576..576]), (! nose[593..593]), ((! nose[592..592]) # sel[575..575]), ((! nose[591..591]) # sel[574..574]), ((! nose[590..590]) # sel[573..573]), ((! nose[589..589]) # sel[572..572]), ((! nose[588..588]) # sel[571..571]), ((! nose[587..587]) # sel[570..570]), ((! nose[586..586]) # sel[569..569]), ((! nose[585..585]) # sel[568..568]), ((! nose[584..584]) # sel[567..567]), ((! nose[583..583]) # sel[566..566]), ((! nose[582..582]) # sel[565..565]), ((! nose[581..581]) # sel[564..564]), ((! nose[580..580]) # sel[563..563]), ((! nose[579..579]) # sel[562..562]), ((! nose[578..578]) # sel[561..561]), ((! nose[577..577]) # sel[560..560]), ((! nose[576..576]) # sel[559..559]), ((! nose[575..575]) # sel[558..558]), ((! nose[574..574]) # sel[557..557]), ((! nose[573..573]) # sel[556..556]), ((! nose[572..572]) # sel[555..555]), ((! nose[571..571]) # sel[554..554]), ((! nose[570..570]) # sel[553..553]), ((! nose[569..569]) # sel[552..552]), ((! nose[568..568]) # sel[551..551]), ((! nose[567..567]) # sel[550..550]), ((! nose[566..566]) # sel[549..549]), ((! nose[565..565]) # sel[548..548]), ((! nose[564..564]) # sel[547..547]), ((! nose[563..563]) # sel[546..546]), ((! nose[562..562]) # sel[545..545]), ((! nose[561..561]) # sel[544..544]), (! nose[560..560]), ((! nose[559..559]) # sel[543..543]), ((! nose[558..558]) # sel[542..542]), ((! nose[557..557]) # sel[541..541]), ((! nose[556..556]) # sel[540..540]), ((! nose[555..555]) # sel[539..539]), ((! nose[554..554]) # sel[538..538]), ((! nose[553..553]) # sel[537..537]), ((! nose[552..552]) # sel[536..536]), ((! nose[551..551]) # sel[535..535]), ((! nose[550..550]) # sel[534..534]), ((! nose[549..549]) # sel[533..533]), ((! nose[548..548]) # sel[532..532]), ((! nose[547..547]) # sel[531..531]), ((! nose[546..546]) # sel[530..530]), ((! nose[545..545]) # sel[529..529]), ((! nose[544..544]) # sel[528..528]), ((! nose[543..543]) # sel[527..527]), ((! nose[542..542]) # sel[526..526]), ((! nose[541..541]) # sel[525..525]), ((! nose[540..540]) # sel[524..524]), ((! nose[539..539]) # sel[523..523]), ((! nose[538..538]) # sel[522..522]), ((! nose[537..537]) # sel[521..521]), ((! nose[536..536]) # sel[520..520]), ((! nose[535..535]) # sel[519..519]), ((! nose[534..534]) # sel[518..518]), ((! nose[533..533]) # sel[517..517]), ((! nose[532..532]) # sel[516..516]), ((! nose[531..531]) # sel[515..515]), ((! nose[530..530]) # sel[514..514]), ((! nose[529..529]) # sel[513..513]), ((! nose[528..528]) # sel[512..512]), (! nose[527..527]), ((! nose[526..526]) # sel[511..511]), ((! nose[525..525]) # sel[510..510]), ((! nose[524..524]) # sel[509..509]), ((! nose[523..523]) # sel[508..508]), ((! nose[522..522]) # sel[507..507]), ((! nose[521..521]) # sel[506..506]), ((! nose[520..520]) # sel[505..505]), ((! nose[519..519]) # sel[504..504]), ((! nose[518..518]) # sel[503..503]), ((! nose[517..517]) # sel[502..502]), ((! nose[516..516]) # sel[501..501]), ((! nose[515..515]) # sel[500..500]), ((! nose[514..514]) # sel[499..499]), ((! nose[513..513]) # sel[498..498]), ((! nose[512..512]) # sel[497..497]), ((! nose[511..511]) # sel[496..496]), ((! nose[510..510]) # sel[495..495]), ((! nose[509..509]) # sel[494..494]), ((! nose[508..508]) # sel[493..493]), ((! nose[507..507]) # sel[492..492]), ((! nose[506..506]) # sel[491..491]), ((! nose[505..505]) # sel[490..490]), ((! nose[504..504]) # sel[489..489]), ((! nose[503..503]) # sel[488..488]), ((! nose[502..502]) # sel[487..487]), ((! nose[501..501]) # sel[486..486]), ((! nose[500..500]) # sel[485..485]), ((! nose[499..499]) # sel[484..484]), ((! nose[498..498]) # sel[483..483]), ((! nose[497..497]) # sel[482..482]), ((! nose[496..496]) # sel[481..481]), ((! nose[495..495]) # sel[480..480]), (! nose[494..494]), ((! nose[493..493]) # sel[479..479]), ((! nose[492..492]) # sel[478..478]), ((! nose[491..491]) # sel[477..477]), ((! nose[490..490]) # sel[476..476]), ((! nose[489..489]) # sel[475..475]), ((! nose[488..488]) # sel[474..474]), ((! nose[487..487]) # sel[473..473]), ((! nose[486..486]) # sel[472..472]), ((! nose[485..485]) # sel[471..471]), ((! nose[484..484]) # sel[470..470]), ((! nose[483..483]) # sel[469..469]), ((! nose[482..482]) # sel[468..468]), ((! nose[481..481]) # sel[467..467]), ((! nose[480..480]) # sel[466..466]), ((! nose[479..479]) # sel[465..465]), ((! nose[478..478]) # sel[464..464]), ((! nose[477..477]) # sel[463..463]), ((! nose[476..476]) # sel[462..462]), ((! nose[475..475]) # sel[461..461]), ((! nose[474..474]) # sel[460..460]), ((! nose[473..473]) # sel[459..459]), ((! nose[472..472]) # sel[458..458]), ((! nose[471..471]) # sel[457..457]), ((! nose[470..470]) # sel[456..456]), ((! nose[469..469]) # sel[455..455]), ((! nose[468..468]) # sel[454..454]), ((! nose[467..467]) # sel[453..453]), ((! nose[466..466]) # sel[452..452]), ((! nose[465..465]) # sel[451..451]), ((! nose[464..464]) # sel[450..450]), ((! nose[463..463]) # sel[449..449]), ((! nose[462..462]) # sel[448..448]), (! nose[461..461]), ((! nose[460..460]) # sel[447..447]), ((! nose[459..459]) # sel[446..446]), ((! nose[458..458]) # sel[445..445]), ((! nose[457..457]) # sel[444..444]), ((! nose[456..456]) # sel[443..443]), ((! nose[455..455]) # sel[442..442]), ((! nose[454..454]) # sel[441..441]), ((! nose[453..453]) # sel[440..440]), ((! nose[452..452]) # sel[439..439]), ((! nose[451..451]) # sel[438..438]), ((! nose[450..450]) # sel[437..437]), ((! nose[449..449]) # sel[436..436]), ((! nose[448..448]) # sel[435..435]), ((! nose[447..447]) # sel[434..434]), ((! nose[446..446]) # sel[433..433]), ((! nose[445..445]) # sel[432..432]), ((! nose[444..444]) # sel[431..431]), ((! nose[443..443]) # sel[430..430]), ((! nose[442..442]) # sel[429..429]), ((! nose[441..441]) # sel[428..428]), ((! nose[440..440]) # sel[427..427]), ((! nose[439..439]) # sel[426..426]), ((! nose[438..438]) # sel[425..425]), ((! nose[437..437]) # sel[424..424]), ((! nose[436..436]) # sel[423..423]), ((! nose[435..435]) # sel[422..422]), ((! nose[434..434]) # sel[421..421]), ((! nose[433..433]) # sel[420..420]), ((! nose[432..432]) # sel[419..419]), ((! nose[431..431]) # sel[418..418]), ((! nose[430..430]) # sel[417..417]), ((! nose[429..429]) # sel[416..416]), (! nose[428..428]), ((! nose[427..427]) # sel[415..415]), ((! nose[426..426]) # sel[414..414]), ((! nose[425..425]) # sel[413..413]), ((! nose[424..424]) # sel[412..412]), ((! nose[423..423]) # sel[411..411]), ((! nose[422..422]) # sel[410..410]), ((! nose[421..421]) # sel[409..409]), ((! nose[420..420]) # sel[408..408]), ((! nose[419..419]) # sel[407..407]), ((! nose[418..418]) # sel[406..406]), ((! nose[417..417]) # sel[405..405]), ((! nose[416..416]) # sel[404..404]), ((! nose[415..415]) # sel[403..403]), ((! nose[414..414]) # sel[402..402]), ((! nose[413..413]) # sel[401..401]), ((! nose[412..412]) # sel[400..400]), ((! nose[411..411]) # sel[399..399]), ((! nose[410..410]) # sel[398..398]), ((! nose[409..409]) # sel[397..397]), ((! nose[408..408]) # sel[396..396]), ((! nose[407..407]) # sel[395..395]), ((! nose[406..406]) # sel[394..394]), ((! nose[405..405]) # sel[393..393]), ((! nose[404..404]) # sel[392..392]), ((! nose[403..403]) # sel[391..391]), ((! nose[402..402]) # sel[390..390]), ((! nose[401..401]) # sel[389..389]), ((! nose[400..400]) # sel[388..388]), ((! nose[399..399]) # sel[387..387]), ((! nose[398..398]) # sel[386..386]), ((! nose[397..397]) # sel[385..385]), ((! nose[396..396]) # sel[384..384]), (! nose[395..395]), ((! nose[394..394]) # sel[383..383]), ((! nose[393..393]) # sel[382..382]), ((! nose[392..392]) # sel[381..381]), ((! nose[391..391]) # sel[380..380]), ((! nose[390..390]) # sel[379..379]), ((! nose[389..389]) # sel[378..378]), ((! nose[388..388]) # sel[377..377]), ((! nose[387..387]) # sel[376..376]), ((! nose[386..386]) # sel[375..375]), ((! nose[385..385]) # sel[374..374]), ((! nose[384..384]) # sel[373..373]), ((! nose[383..383]) # sel[372..372]), ((! nose[382..382]) # sel[371..371]), ((! nose[381..381]) # sel[370..370]), ((! nose[380..380]) # sel[369..369]), ((! nose[379..379]) # sel[368..368]), ((! nose[378..378]) # sel[367..367]), ((! nose[377..377]) # sel[366..366]), ((! nose[376..376]) # sel[365..365]), ((! nose[375..375]) # sel[364..364]), ((! nose[374..374]) # sel[363..363]), ((! nose[373..373]) # sel[362..362]), ((! nose[372..372]) # sel[361..361]), ((! nose[371..371]) # sel[360..360]), ((! nose[370..370]) # sel[359..359]), ((! nose[369..369]) # sel[358..358]), ((! nose[368..368]) # sel[357..357]), ((! nose[367..367]) # sel[356..356]), ((! nose[366..366]) # sel[355..355]), ((! nose[365..365]) # sel[354..354]), ((! nose[364..364]) # sel[353..353]), ((! nose[363..363]) # sel[352..352]), (! nose[362..362]), ((! nose[361..361]) # sel[351..351]), ((! nose[360..360]) # sel[350..350]), ((! nose[359..359]) # sel[349..349]), ((! nose[358..358]) # sel[348..348]), ((! nose[357..357]) # sel[347..347]), ((! nose[356..356]) # sel[346..346]), ((! nose[355..355]) # sel[345..345]), ((! nose[354..354]) # sel[344..344]), ((! nose[353..353]) # sel[343..343]), ((! nose[352..352]) # sel[342..342]), ((! nose[351..351]) # sel[341..341]), ((! nose[350..350]) # sel[340..340]), ((! nose[349..349]) # sel[339..339]), ((! nose[348..348]) # sel[338..338]), ((! nose[347..347]) # sel[337..337]), ((! nose[346..346]) # sel[336..336]), ((! nose[345..345]) # sel[335..335]), ((! nose[344..344]) # sel[334..334]), ((! nose[343..343]) # sel[333..333]), ((! nose[342..342]) # sel[332..332]), ((! nose[341..341]) # sel[331..331]), ((! nose[340..340]) # sel[330..330]), ((! nose[339..339]) # sel[329..329]), ((! nose[338..338]) # sel[328..328]), ((! nose[337..337]) # sel[327..327]), ((! nose[336..336]) # sel[326..326]), ((! nose[335..335]) # sel[325..325]), ((! nose[334..334]) # sel[324..324]), ((! nose[333..333]) # sel[323..323]), ((! nose[332..332]) # sel[322..322]), ((! nose[331..331]) # sel[321..321]), ((! nose[330..330]) # sel[320..320]), (! nose[329..329]), ((! nose[328..328]) # sel[319..319]), ((! nose[327..327]) # sel[318..318]), ((! nose[326..326]) # sel[317..317]), ((! nose[325..325]) # sel[316..316]), ((! nose[324..324]) # sel[315..315]), ((! nose[323..323]) # sel[314..314]), ((! nose[322..322]) # sel[313..313]), ((! nose[321..321]) # sel[312..312]), ((! nose[320..320]) # sel[311..311]), ((! nose[319..319]) # sel[310..310]), ((! nose[318..318]) # sel[309..309]), ((! nose[317..317]) # sel[308..308]), ((! nose[316..316]) # sel[307..307]), ((! nose[315..315]) # sel[306..306]), ((! nose[314..314]) # sel[305..305]), ((! nose[313..313]) # sel[304..304]), ((! nose[312..312]) # sel[303..303]), ((! nose[311..311]) # sel[302..302]), ((! nose[310..310]) # sel[301..301]), ((! nose[309..309]) # sel[300..300]), ((! nose[308..308]) # sel[299..299]), ((! nose[307..307]) # sel[298..298]), ((! nose[306..306]) # sel[297..297]), ((! nose[305..305]) # sel[296..296]), ((! nose[304..304]) # sel[295..295]), ((! nose[303..303]) # sel[294..294]), ((! nose[302..302]) # sel[293..293]), ((! nose[301..301]) # sel[292..292]), ((! nose[300..300]) # sel[291..291]), ((! nose[299..299]) # sel[290..290]), ((! nose[298..298]) # sel[289..289]), ((! nose[297..297]) # sel[288..288]), (! nose[296..296]), ((! nose[295..295]) # sel[287..287]), ((! nose[294..294]) # sel[286..286]), ((! nose[293..293]) # sel[285..285]), ((! nose[292..292]) # sel[284..284]), ((! nose[291..291]) # sel[283..283]), ((! nose[290..290]) # sel[282..282]), ((! nose[289..289]) # sel[281..281]), ((! nose[288..288]) # sel[280..280]), ((! nose[287..287]) # sel[279..279]), ((! nose[286..286]) # sel[278..278]), ((! nose[285..285]) # sel[277..277]), ((! nose[284..284]) # sel[276..276]), ((! nose[283..283]) # sel[275..275]), ((! nose[282..282]) # sel[274..274]), ((! nose[281..281]) # sel[273..273]), ((! nose[280..280]) # sel[272..272]), ((! nose[279..279]) # sel[271..271]), ((! nose[278..278]) # sel[270..270]), ((! nose[277..277]) # sel[269..269]), ((! nose[276..276]) # sel[268..268]), ((! nose[275..275]) # sel[267..267]), ((! nose[274..274]) # sel[266..266]), ((! nose[273..273]) # sel[265..265]), ((! nose[272..272]) # sel[264..264]), ((! nose[271..271]) # sel[263..263]), ((! nose[270..270]) # sel[262..262]), ((! nose[269..269]) # sel[261..261]), ((! nose[268..268]) # sel[260..260]), ((! nose[267..267]) # sel[259..259]), ((! nose[266..266]) # sel[258..258]), ((! nose[265..265]) # sel[257..257]), ((! nose[264..264]) # sel[256..256]), (! nose[263..263]), ((! nose[262..262]) # sel[255..255]), ((! nose[261..261]) # sel[254..254]), ((! nose[260..260]) # sel[253..253]), ((! nose[259..259]) # sel[252..252]), ((! nose[258..258]) # sel[251..251]), ((! nose[257..257]) # sel[250..250]), ((! nose[256..256]) # sel[249..249]), ((! nose[255..255]) # sel[248..248]), ((! nose[254..254]) # sel[247..247]), ((! nose[253..253]) # sel[246..246]), ((! nose[252..252]) # sel[245..245]), ((! nose[251..251]) # sel[244..244]), ((! nose[250..250]) # sel[243..243]), ((! nose[249..249]) # sel[242..242]), ((! nose[248..248]) # sel[241..241]), ((! nose[247..247]) # sel[240..240]), ((! nose[246..246]) # sel[239..239]), ((! nose[245..245]) # sel[238..238]), ((! nose[244..244]) # sel[237..237]), ((! nose[243..243]) # sel[236..236]), ((! nose[242..242]) # sel[235..235]), ((! nose[241..241]) # sel[234..234]), ((! nose[240..240]) # sel[233..233]), ((! nose[239..239]) # sel[232..232]), ((! nose[238..238]) # sel[231..231]), ((! nose[237..237]) # sel[230..230]), ((! nose[236..236]) # sel[229..229]), ((! nose[235..235]) # sel[228..228]), ((! nose[234..234]) # sel[227..227]), ((! nose[233..233]) # sel[226..226]), ((! nose[232..232]) # sel[225..225]), ((! nose[231..231]) # sel[224..224]), (! nose[230..230]), ((! nose[229..229]) # sel[223..223]), ((! nose[228..228]) # sel[222..222]), ((! nose[227..227]) # sel[221..221]), ((! nose[226..226]) # sel[220..220]), ((! nose[225..225]) # sel[219..219]), ((! nose[224..224]) # sel[218..218]), ((! nose[223..223]) # sel[217..217]), ((! nose[222..222]) # sel[216..216]), ((! nose[221..221]) # sel[215..215]), ((! nose[220..220]) # sel[214..214]), ((! nose[219..219]) # sel[213..213]), ((! nose[218..218]) # sel[212..212]), ((! nose[217..217]) # sel[211..211]), ((! nose[216..216]) # sel[210..210]), ((! nose[215..215]) # sel[209..209]), ((! nose[214..214]) # sel[208..208]), ((! nose[213..213]) # sel[207..207]), ((! nose[212..212]) # sel[206..206]), ((! nose[211..211]) # sel[205..205]), ((! nose[210..210]) # sel[204..204]), ((! nose[209..209]) # sel[203..203]), ((! nose[208..208]) # sel[202..202]), ((! nose[207..207]) # sel[201..201]), ((! nose[206..206]) # sel[200..200]), ((! nose[205..205]) # sel[199..199]), ((! nose[204..204]) # sel[198..198]), ((! nose[203..203]) # sel[197..197]), ((! nose[202..202]) # sel[196..196]), ((! nose[201..201]) # sel[195..195]), ((! nose[200..200]) # sel[194..194]), ((! nose[199..199]) # sel[193..193]), ((! nose[198..198]) # sel[192..192]), (! nose[197..197]), ((! nose[196..196]) # sel[191..191]), ((! nose[195..195]) # sel[190..190]), ((! nose[194..194]) # sel[189..189]), ((! nose[193..193]) # sel[188..188]), ((! nose[192..192]) # sel[187..187]), ((! nose[191..191]) # sel[186..186]), ((! nose[190..190]) # sel[185..185]), ((! nose[189..189]) # sel[184..184]), ((! nose[188..188]) # sel[183..183]), ((! nose[187..187]) # sel[182..182]), ((! nose[186..186]) # sel[181..181]), ((! nose[185..185]) # sel[180..180]), ((! nose[184..184]) # sel[179..179]), ((! nose[183..183]) # sel[178..178]), ((! nose[182..182]) # sel[177..177]), ((! nose[181..181]) # sel[176..176]), ((! nose[180..180]) # sel[175..175]), ((! nose[179..179]) # sel[174..174]), ((! nose[178..178]) # sel[173..173]), ((! nose[177..177]) # sel[172..172]), ((! nose[176..176]) # sel[171..171]), ((! nose[175..175]) # sel[170..170]), ((! nose[174..174]) # sel[169..169]), ((! nose[173..173]) # sel[168..168]), ((! nose[172..172]) # sel[167..167]), ((! nose[171..171]) # sel[166..166]), ((! nose[170..170]) # sel[165..165]), ((! nose[169..169]) # sel[164..164]), ((! nose[168..168]) # sel[163..163]), ((! nose[167..167]) # sel[162..162]), ((! nose[166..166]) # sel[161..161]), ((! nose[165..165]) # sel[160..160]), (! nose[164..164]), ((! nose[163..163]) # sel[159..159]), ((! nose[162..162]) # sel[158..158]), ((! nose[161..161]) # sel[157..157]), ((! nose[160..160]) # sel[156..156]), ((! nose[159..159]) # sel[155..155]), ((! nose[158..158]) # sel[154..154]), ((! nose[157..157]) # sel[153..153]), ((! nose[156..156]) # sel[152..152]), ((! nose[155..155]) # sel[151..151]), ((! nose[154..154]) # sel[150..150]), ((! nose[153..153]) # sel[149..149]), ((! nose[152..152]) # sel[148..148]), ((! nose[151..151]) # sel[147..147]), ((! nose[150..150]) # sel[146..146]), ((! nose[149..149]) # sel[145..145]), ((! nose[148..148]) # sel[144..144]), ((! nose[147..147]) # sel[143..143]), ((! nose[146..146]) # sel[142..142]), ((! nose[145..145]) # sel[141..141]), ((! nose[144..144]) # sel[140..140]), ((! nose[143..143]) # sel[139..139]), ((! nose[142..142]) # sel[138..138]), ((! nose[141..141]) # sel[137..137]), ((! nose[140..140]) # sel[136..136]), ((! nose[139..139]) # sel[135..135]), ((! nose[138..138]) # sel[134..134]), ((! nose[137..137]) # sel[133..133]), ((! nose[136..136]) # sel[132..132]), ((! nose[135..135]) # sel[131..131]), ((! nose[134..134]) # sel[130..130]), ((! nose[133..133]) # sel[129..129]), ((! nose[132..132]) # sel[128..128]), (! nose[131..131]), ((! nose[130..130]) # sel[127..127]), ((! nose[129..129]) # sel[126..126]), ((! nose[128..128]) # sel[125..125]), ((! nose[127..127]) # sel[124..124]), ((! nose[126..126]) # sel[123..123]), ((! nose[125..125]) # sel[122..122]), ((! nose[124..124]) # sel[121..121]), ((! nose[123..123]) # sel[120..120]), ((! nose[122..122]) # sel[119..119]), ((! nose[121..121]) # sel[118..118]), ((! nose[120..120]) # sel[117..117]), ((! nose[119..119]) # sel[116..116]), ((! nose[118..118]) # sel[115..115]), ((! nose[117..117]) # sel[114..114]), ((! nose[116..116]) # sel[113..113]), ((! nose[115..115]) # sel[112..112]), ((! nose[114..114]) # sel[111..111]), ((! nose[113..113]) # sel[110..110]), ((! nose[112..112]) # sel[109..109]), ((! nose[111..111]) # sel[108..108]), ((! nose[110..110]) # sel[107..107]), ((! nose[109..109]) # sel[106..106]), ((! nose[108..108]) # sel[105..105]), ((! nose[107..107]) # sel[104..104]), ((! nose[106..106]) # sel[103..103]), ((! nose[105..105]) # sel[102..102]), ((! nose[104..104]) # sel[101..101]), ((! nose[103..103]) # sel[100..100]), ((! nose[102..102]) # sel[99..99]), ((! nose[101..101]) # sel[98..98]), ((! nose[100..100]) # sel[97..97]), ((! nose[99..99]) # sel[96..96]), (! nose[98..98]), ((! nose[97..97]) # sel[95..95]), ((! nose[96..96]) # sel[94..94]), ((! nose[95..95]) # sel[93..93]), ((! nose[94..94]) # sel[92..92]), ((! nose[93..93]) # sel[91..91]), ((! nose[92..92]) # sel[90..90]), ((! nose[91..91]) # sel[89..89]), ((! nose[90..90]) # sel[88..88]), ((! nose[89..89]) # sel[87..87]), ((! nose[88..88]) # sel[86..86]), ((! nose[87..87]) # sel[85..85]), ((! nose[86..86]) # sel[84..84]), ((! nose[85..85]) # sel[83..83]), ((! nose[84..84]) # sel[82..82]), ((! nose[83..83]) # sel[81..81]), ((! nose[82..82]) # sel[80..80]), ((! nose[81..81]) # sel[79..79]), ((! nose[80..80]) # sel[78..78]), ((! nose[79..79]) # sel[77..77]), ((! nose[78..78]) # sel[76..76]), ((! nose[77..77]) # sel[75..75]), ((! nose[76..76]) # sel[74..74]), ((! nose[75..75]) # sel[73..73]), ((! nose[74..74]) # sel[72..72]), ((! nose[73..73]) # sel[71..71]), ((! nose[72..72]) # sel[70..70]), ((! nose[71..71]) # sel[69..69]), ((! nose[70..70]) # sel[68..68]), ((! nose[69..69]) # sel[67..67]), ((! nose[68..68]) # sel[66..66]), ((! nose[67..67]) # sel[65..65]), ((! nose[66..66]) # sel[64..64]), (! nose[65..65]), ((! nose[64..64]) # sel[63..63]), ((! nose[63..63]) # sel[62..62]), ((! nose[62..62]) # sel[61..61]), ((! nose[61..61]) # sel[60..60]), ((! nose[60..60]) # sel[59..59]), ((! nose[59..59]) # sel[58..58]), ((! nose[58..58]) # sel[57..57]), ((! nose[57..57]) # sel[56..56]), ((! nose[56..56]) # sel[55..55]), ((! nose[55..55]) # sel[54..54]), ((! nose[54..54]) # sel[53..53]), ((! nose[53..53]) # sel[52..52]), ((! nose[52..52]) # sel[51..51]), ((! nose[51..51]) # sel[50..50]), ((! nose[50..50]) # sel[49..49]), ((! nose[49..49]) # sel[48..48]), ((! nose[48..48]) # sel[47..47]), ((! nose[47..47]) # sel[46..46]), ((! nose[46..46]) # sel[45..45]), ((! nose[45..45]) # sel[44..44]), ((! nose[44..44]) # sel[43..43]), ((! nose[43..43]) # sel[42..42]), ((! nose[42..42]) # sel[41..41]), ((! nose[41..41]) # sel[40..40]), ((! nose[40..40]) # sel[39..39]), ((! nose[39..39]) # sel[38..38]), ((! nose[38..38]) # sel[37..37]), ((! nose[37..37]) # sel[36..36]), ((! nose[36..36]) # sel[35..35]), ((! nose[35..35]) # sel[34..34]), ((! nose[34..34]) # sel[33..33]), ((! nose[33..33]) # sel[32..32]), (! nose[32..32]), ((! nose[31..31]) # sel[31..31]), ((! nose[30..30]) # sel[30..30]), ((! nose[29..29]) # sel[29..29]), ((! nose[28..28]) # sel[28..28]), ((! nose[27..27]) # sel[27..27]), ((! nose[26..26]) # sel[26..26]), ((! nose[25..25]) # sel[25..25]), ((! nose[24..24]) # sel[24..24]), ((! nose[23..23]) # sel[23..23]), ((! nose[22..22]) # sel[22..22]), ((! nose[21..21]) # sel[21..21]), ((! nose[20..20]) # sel[20..20]), ((! nose[19..19]) # sel[19..19]), ((! nose[18..18]) # sel[18..18]), ((! nose[17..17]) # sel[17..17]), ((! nose[16..16]) # sel[16..16]), ((! nose[15..15]) # sel[15..15]), ((! nose[14..14]) # sel[14..14]), ((! nose[13..13]) # sel[13..13]), ((! nose[12..12]) # sel[12..12]), ((! nose[11..11]) # sel[11..11]), ((! nose[10..10]) # sel[10..10]), ((! nose[9..9]) # sel[9..9]), ((! nose[8..8]) # sel[8..8]), ((! nose[7..7]) # sel[7..7]), ((! nose[6..6]) # sel[6..6]), ((! nose[5..5]) # sel[5..5]), ((! nose[4..4]) # sel[4..4]), ((! nose[3..3]) # sel[3..3]), ((! nose[2..2]) # sel[2..2]), ((! nose[1..1]) # sel[1..1]), ((! nose[0..0]) # sel[0..0])); - StageIn[] = StageIn_tmp[]; - StageIn_tmp[] = ( StageOut[1088..0], B"000000000000000000000000000000000"); - StageOut[] = ( ((( StageIn[1087..1056], NumeratorIn[1056..1056]) & selnose[1088..1088]) # (prestg[1088..1056] & (! selnose[1088..1088]))), ((( StageIn[1054..1023], NumeratorIn[1024..1024]) & selnose[1054..1054]) # (prestg[1055..1023] & (! selnose[1054..1054]))), ((( StageIn[1021..990], NumeratorIn[992..992]) & selnose[1020..1020]) # (prestg[1022..990] & (! selnose[1020..1020]))), ((( StageIn[988..957], NumeratorIn[960..960]) & selnose[986..986]) # (prestg[989..957] & (! selnose[986..986]))), ((( StageIn[955..924], NumeratorIn[928..928]) & selnose[952..952]) # (prestg[956..924] & (! selnose[952..952]))), ((( StageIn[922..891], NumeratorIn[896..896]) & selnose[918..918]) # (prestg[923..891] & (! selnose[918..918]))), ((( StageIn[889..858], NumeratorIn[864..864]) & selnose[884..884]) # (prestg[890..858] & (! selnose[884..884]))), ((( StageIn[856..825], NumeratorIn[832..832]) & selnose[850..850]) # (prestg[857..825] & (! selnose[850..850]))), ((( StageIn[823..792], NumeratorIn[800..800]) & selnose[816..816]) # (prestg[824..792] & (! selnose[816..816]))), ((( StageIn[790..759], NumeratorIn[768..768]) & selnose[782..782]) # (prestg[791..759] & (! selnose[782..782]))), ((( StageIn[757..726], NumeratorIn[736..736]) & selnose[748..748]) # (prestg[758..726] & (! selnose[748..748]))), ((( StageIn[724..693], NumeratorIn[704..704]) & selnose[714..714]) # (prestg[725..693] & (! selnose[714..714]))), ((( StageIn[691..660], NumeratorIn[672..672]) & selnose[680..680]) # (prestg[692..660] & (! selnose[680..680]))), ((( StageIn[658..627], NumeratorIn[640..640]) & selnose[646..646]) # (prestg[659..627] & (! selnose[646..646]))), ((( StageIn[625..594], NumeratorIn[608..608]) & selnose[612..612]) # (prestg[626..594] & (! selnose[612..612]))), ((( StageIn[592..561], NumeratorIn[576..576]) & selnose[578..578]) # (prestg[593..561] & (! selnose[578..578]))), ((( StageIn[559..528], NumeratorIn[544..544]) & selnose[544..544]) # (prestg[560..528] & (! selnose[544..544]))), ((( StageIn[526..495], NumeratorIn[512..512]) & selnose[510..510]) # (prestg[527..495] & (! selnose[510..510]))), ((( StageIn[493..462], NumeratorIn[480..480]) & selnose[476..476]) # (prestg[494..462] & (! selnose[476..476]))), ((( StageIn[460..429], NumeratorIn[448..448]) & selnose[442..442]) # (prestg[461..429] & (! selnose[442..442]))), ((( StageIn[427..396], NumeratorIn[416..416]) & selnose[408..408]) # (prestg[428..396] & (! selnose[408..408]))), ((( StageIn[394..363], NumeratorIn[384..384]) & selnose[374..374]) # (prestg[395..363] & (! selnose[374..374]))), ((( StageIn[361..330], NumeratorIn[352..352]) & selnose[340..340]) # (prestg[362..330] & (! selnose[340..340]))), ((( StageIn[328..297], NumeratorIn[320..320]) & selnose[306..306]) # (prestg[329..297] & (! selnose[306..306]))), ((( StageIn[295..264], NumeratorIn[288..288]) & selnose[272..272]) # (prestg[296..264] & (! selnose[272..272]))), ((( StageIn[262..231], NumeratorIn[256..256]) & selnose[238..238]) # (prestg[263..231] & (! selnose[238..238]))), ((( StageIn[229..198], NumeratorIn[224..224]) & selnose[204..204]) # (prestg[230..198] & (! selnose[204..204]))), ((( StageIn[196..165], NumeratorIn[192..192]) & selnose[170..170]) # (prestg[197..165] & (! selnose[170..170]))), ((( StageIn[163..132], NumeratorIn[160..160]) & selnose[136..136]) # (prestg[164..132] & (! selnose[136..136]))), ((( StageIn[130..99], NumeratorIn[128..128]) & selnose[102..102]) # (prestg[131..99] & (! selnose[102..102]))), ((( StageIn[97..66], NumeratorIn[96..96]) & selnose[68..68]) # (prestg[98..66] & (! selnose[68..68]))), ((( StageIn[64..33], NumeratorIn[64..64]) & selnose[34..34]) # (prestg[65..33] & (! selnose[34..34]))), ((( StageIn[31..0], NumeratorIn[32..32]) & selnose[0..0]) # (prestg[32..0] & (! selnose[0..0])))); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_8oak.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_8oak.tdf deleted file mode 100644 index 7767aa4..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/alt_u_div_8oak.tdf +++ /dev/null @@ -1,102 +0,0 @@ ---alt_u_div CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=2 WIDTH_N=4 WIDTH_Q=4 WIDTH_R=2 denominator numerator quotient remainder ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 13 -SUBDESIGN alt_u_div_8oak -( - denominator[1..0] : input; - numerator[3..0] : input; - quotient[3..0] : output; - remainder[1..0] : output; -) -VARIABLE - add_sub_0_result_int[1..0] : WIRE; - add_sub_0_cout : WIRE; - add_sub_0_dataa[0..0] : WIRE; - add_sub_0_datab[0..0] : WIRE; - add_sub_0_result[0..0] : WIRE; - add_sub_1_result_int[2..0] : WIRE; - add_sub_1_cout : WIRE; - add_sub_1_dataa[1..0] : WIRE; - add_sub_1_datab[1..0] : WIRE; - add_sub_1_result[1..0] : WIRE; - add_sub_2_result_int[3..0] : WIRE; - add_sub_2_cout : WIRE; - add_sub_2_dataa[2..0] : WIRE; - add_sub_2_datab[2..0] : WIRE; - add_sub_2_result[2..0] : WIRE; - add_sub_3_result_int[3..0] : WIRE; - add_sub_3_cout : WIRE; - add_sub_3_dataa[2..0] : WIRE; - add_sub_3_datab[2..0] : WIRE; - add_sub_3_result[2..0] : WIRE; - DenominatorIn[14..0] : WIRE; - DenominatorIn_tmp[14..0] : WIRE; - gnd_wire : WIRE; - nose[19..0] : WIRE; - NumeratorIn[19..0] : WIRE; - NumeratorIn_tmp[19..0] : WIRE; - prestg[11..0] : WIRE; - quotient_tmp[3..0] : WIRE; - sel[9..0] : WIRE; - selnose[19..0] : WIRE; - StageIn[14..0] : WIRE; - StageIn_tmp[14..0] : WIRE; - StageOut[11..0] : WIRE; - -BEGIN - add_sub_0_result_int[] = (0, add_sub_0_dataa[]) - (0, add_sub_0_datab[]); - add_sub_0_result[] = add_sub_0_result_int[0..0]; - add_sub_0_cout = !add_sub_0_result_int[1]; - add_sub_0_dataa[] = NumeratorIn[3..3]; - add_sub_0_datab[] = DenominatorIn[0..0]; - add_sub_1_result_int[] = (0, add_sub_1_dataa[]) - (0, add_sub_1_datab[]); - add_sub_1_result[] = add_sub_1_result_int[1..0]; - add_sub_1_cout = !add_sub_1_result_int[2]; - add_sub_1_dataa[] = ( StageIn[3..3], NumeratorIn[6..6]); - add_sub_1_datab[] = DenominatorIn[4..3]; - add_sub_2_result_int[] = (0, add_sub_2_dataa[]) - (0, add_sub_2_datab[]); - add_sub_2_result[] = add_sub_2_result_int[2..0]; - add_sub_2_cout = !add_sub_2_result_int[3]; - add_sub_2_dataa[] = ( StageIn[7..6], NumeratorIn[9..9]); - add_sub_2_datab[] = DenominatorIn[8..6]; - add_sub_3_result_int[] = (0, add_sub_3_dataa[]) - (0, add_sub_3_datab[]); - add_sub_3_result[] = add_sub_3_result_int[2..0]; - add_sub_3_cout = !add_sub_3_result_int[3]; - add_sub_3_dataa[] = ( StageIn[10..9], NumeratorIn[12..12]); - add_sub_3_datab[] = DenominatorIn[11..9]; - DenominatorIn[] = DenominatorIn_tmp[]; - DenominatorIn_tmp[] = ( DenominatorIn[11..0], ( gnd_wire, denominator[])); - gnd_wire = B"0"; - nose[] = ( B"0000", add_sub_3_cout, B"0000", add_sub_2_cout, B"0000", add_sub_1_cout, B"0000", add_sub_0_cout); - NumeratorIn[] = NumeratorIn_tmp[]; - NumeratorIn_tmp[] = ( NumeratorIn[15..0], numerator[]); - prestg[] = ( add_sub_3_result[], add_sub_2_result[], GND, add_sub_1_result[], B"00", add_sub_0_result[]); - quotient[] = quotient_tmp[]; - quotient_tmp[] = ( (! selnose[0..0]), (! selnose[5..5]), (! selnose[10..10]), (! selnose[15..15])); - remainder[1..0] = StageIn[13..12]; - sel[] = ( gnd_wire, (sel[9..9] # DenominatorIn[13..13]), gnd_wire, (sel[7..7] # DenominatorIn[10..10]), gnd_wire, (sel[5..5] # DenominatorIn[7..7]), gnd_wire, (sel[3..3] # DenominatorIn[4..4]), gnd_wire, (sel[1..1] # DenominatorIn[1..1])); - selnose[] = ( (! nose[19..19]), (! nose[18..18]), ((! nose[17..17]) # sel[9..9]), ((! nose[16..16]) # sel[8..8]), (! nose[15..15]), (! nose[14..14]), ((! nose[13..13]) # sel[7..7]), ((! nose[12..12]) # sel[6..6]), (! nose[11..11]), (! nose[10..10]), ((! nose[9..9]) # sel[5..5]), ((! nose[8..8]) # sel[4..4]), (! nose[7..7]), (! nose[6..6]), ((! nose[5..5]) # sel[3..3]), ((! nose[4..4]) # sel[2..2]), (! nose[3..3]), (! nose[2..2]), ((! nose[1..1]) # sel[1..1]), ((! nose[0..0]) # sel[0..0])); - StageIn[] = StageIn_tmp[]; - StageIn_tmp[] = ( StageOut[11..0], B"000"); - StageOut[] = ( ((( StageIn[10..9], NumeratorIn[12..12]) & selnose[15..15]) # (prestg[11..9] & (! selnose[15..15]))), ((( StageIn[7..6], NumeratorIn[9..9]) & selnose[10..10]) # (prestg[8..6] & (! selnose[10..10]))), ((( StageIn[4..3], NumeratorIn[6..6]) & selnose[5..5]) # (prestg[5..3] & (! selnose[5..5]))), ((( StageIn[1..0], NumeratorIn[3..3]) & selnose[0..0]) # (prestg[2..0] & (! selnose[0..0])))); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_40oq1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_40oq1.tdf deleted file mode 100644 index a311591..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_40oq1.tdf +++ /dev/null @@ -1,43 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=1024 OPERATION_MODE="ROM" OUTDATA_ACLR_A="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_SCLR_A="SCLEAR" WIDTH_A=32 WIDTHAD_A=10 address_a clock0 q_a rden_a sclr CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_fihn1 (address_a[9..0], clock0, rden_a, sclr) -RETURNS ( q_a[31..0]); - ---synthesis_resources = ram_bits (AUTO) 32768 -SUBDESIGN altera_syncram_40oq1 -( - address_a[9..0] : input; - clock0 : input; - q_a[31..0] : output; - rden_a : input; - sclr : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_fihn1; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.rden_a = rden_a; - altera_syncram_impl1.sclr = sclr; - q_a[] = altera_syncram_impl1.q_a[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_4kqp.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_4kqp.tdf deleted file mode 100644 index d96a0be..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_4kqp.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" CBX_SINGLE_OUTPUT_FILE="OFF" CLOCK_ENABLE_INPUT_B="BYPASS" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=32 NUMWORDS_B=32 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="CLOCK1" WIDTH_A=9 WIDTH_B=9 WIDTH_BYTEENA_A=1 WIDTH_ECCSTATUS=2 WIDTHAD_A=5 WIDTHAD_B=5 address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_1q3n (address_a[4..0], address_b[4..0], clock0, clock1, clocken1, data_a[8..0], wren_a) -RETURNS ( q_b[8..0]); - ---synthesis_resources = ram_bits (AUTO) 288 -SUBDESIGN altera_syncram_4kqp -( - address_a[4..0] : input; - address_b[4..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[8..0] : input; - q_b[8..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_1q3n; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.clocken1 = clocken1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5brq1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5brq1.tdf deleted file mode 100644 index 9845df8..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5brq1.tdf +++ /dev/null @@ -1,45 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=8 NUMWORDS_B=8 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" RAM_BLOCK_TYPE="M20K" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=1053 WIDTH_B=1053 WIDTHAD_A=3 WIDTHAD_B=3 address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_gsmn (address_a[2..0], address_b[2..0], clock0, data_a[1052..0], wren_a) -RETURNS ( q_b[1052..0]); - ---synthesis_resources = M20K 27 -SUBDESIGN altera_syncram_5brq1 -( - address_a[2..0] : input; - address_b[2..0] : input; - clock0 : input; - data_a[1052..0] : input; - q_b[1052..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_gsmn; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5om81.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5om81.tdf deleted file mode 100644 index ec22c25..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_5om81.tdf +++ /dev/null @@ -1,39 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=2048 OPERATION_MODE="ROM" OUTDATA_ACLR_A="NONE" OUTDATA_REG_A="UNREGISTERED" WIDTH_A=8 WIDTHAD_A=11 address_a clock0 q_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_bnt71 (address_a[10..0], clock0) -RETURNS ( q_a[7..0]); - ---synthesis_resources = ram_bits (AUTO) 16384 -SUBDESIGN altera_syncram_5om81 -( - address_a[10..0] : input; - clock0 : input; - q_a[7..0] : output; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_bnt71; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.clock0 = clock0; - q_a[] = altera_syncram_impl1.q_a[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_71ha1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_71ha1.tdf deleted file mode 100644 index 04a4f04..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_71ha1.tdf +++ /dev/null @@ -1,45 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=768 NUMWORDS_B=768 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=64 WIDTH_B=64 WIDTHAD_A=10 WIDTHAD_B=10 address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_scbg (address_a[9..0], address_b[9..0], clock0, data_a[63..0], wren_a) -RETURNS ( q_b[63..0]); - ---synthesis_resources = ram_bits (AUTO) 49152 -SUBDESIGN altera_syncram_71ha1 -( - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[63..0] : input; - q_b[63..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_scbg; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_cd5h1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_cd5h1.tdf deleted file mode 100644 index 2d3ffc2..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_cd5h1.tdf +++ /dev/null @@ -1,45 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=1024 NUMWORDS_B=1024 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" RAM_BLOCK_TYPE="M20K" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=32 WIDTH_B=32 WIDTHAD_A=10 WIDTHAD_B=10 address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_hlsq1 (address_a[9..0], address_b[9..0], clock0, data_a[31..0], wren_a) -RETURNS ( q_b[31..0]); - ---synthesis_resources = M20K 2 -SUBDESIGN altera_syncram_cd5h1 -( - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_hlsq1; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_esnu1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_esnu1.tdf deleted file mode 100644 index feb656f..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_esnu1.tdf +++ /dev/null @@ -1,47 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=256 NUMWORDS_B=256 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" WIDTH_A=240 WIDTH_B=240 WIDTHAD_A=8 WIDTHAD_B=8 address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_8q921 (address_a[7..0], address_b[7..0], clock0, clock1, data_a[239..0], wren_a) -RETURNS ( q_b[239..0]); - ---synthesis_resources = ram_bits (AUTO) 61440 -SUBDESIGN altera_syncram_esnu1 -( - address_a[7..0] : input; - address_b[7..0] : input; - clock0 : input; - clock1 : input; - data_a[239..0] : input; - q_b[239..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_8q921; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hhrf1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hhrf1.tdf deleted file mode 100644 index 385e1cb..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hhrf1.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=65536 NUMWORDS_B=65536 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" RAM_BLOCK_TYPE="M20K" WIDTH_A=32 WIDTH_B=32 WIDTHAD_A=16 WIDTHAD_B=16 address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_rq6n (address_a[15..0], address_b[15..0], clock0, clock1, clocken1, data_a[31..0], wren_a) -RETURNS ( q_b[31..0]); - ---synthesis_resources = lut 367 M20K 128 reg 5 -SUBDESIGN altera_syncram_hhrf1 -( - address_a[15..0] : input; - address_b[15..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_rq6n; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.clocken1 = clocken1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hin22.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hin22.tdf deleted file mode 100644 index 01508e4..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_hin22.tdf +++ /dev/null @@ -1,47 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=1024 NUMWORDS_B=1024 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" RAM_BLOCK_TYPE="M20K" WIDTH_A=32 WIDTH_B=32 WIDTHAD_A=10 WIDTHAD_B=10 aclr0 address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_anr2 (aclr0, address_a[9..0], address_b[9..0], clock0, data_a[31..0], wren_a) -RETURNS ( q_b[31..0]); - ---synthesis_resources = M20K 2 -SUBDESIGN altera_syncram_hin22 -( - aclr0 : input; - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_anr2; - -BEGIN - altera_syncram_impl1.aclr0 = aclr0; - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_iihv.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_iihv.tdf deleted file mode 100644 index 745f091..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_iihv.tdf +++ /dev/null @@ -1,41 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=2048 OPERATION_MODE="ROM" OUTDATA_ACLR_A="CLEAR0" OUTDATA_REG_A="UNREGISTERED" WIDTH_A=25 WIDTHAD_A=11 aclr0 address_a clock0 q_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_su9o (aclr0, address_a[10..0], clock0) -RETURNS ( q_a[24..0]); - ---synthesis_resources = ram_bits (AUTO) 51200 -SUBDESIGN altera_syncram_iihv -( - aclr0 : input; - address_a[10..0] : input; - clock0 : input; - q_a[24..0] : output; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_su9o; - -BEGIN - altera_syncram_impl1.aclr0 = aclr0; - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.clock0 = clock0; - q_a[] = altera_syncram_impl1.q_a[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_1q3n.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_1q3n.tdf deleted file mode 100644 index 450424e..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_1q3n.tdf +++ /dev/null @@ -1,345 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="BYPASS" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=32 NUMWORDS_B=32 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="CLOCK1" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=9 WIDTH_B=9 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=2 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=5 WIDTHAD_B=5 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 288 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_1q3n -( - address_a[4..0] : input; - address_b[4..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[8..0] : input; - q_b[8..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 9, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 9, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[4..0] : WIRE; - address_b_wire[4..0] : WIRE; - q_b_wire[8..0] : WIRE; - -BEGIN - ram_block2a[8..0].clk0 = clock0; - ram_block2a[8..0].clk1 = clock1; - ram_block2a[8..0].ena1 = clocken1; - ram_block2a[8..0].portaaddr[] = ( address_a_wire[4..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[8..0].portawe = wren_a; - ram_block2a[8..0].portbaddr[] = ( address_b_wire[4..0]); - ram_block2a[8..0].portbre = B"111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[8..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8q921.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8q921.tdf deleted file mode 100644 index 14768b3..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8q921.tdf +++ /dev/null @@ -1,7255 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=256 NUMWORDS_B=256 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=240 WIDTH_B=240 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=8 WIDTHAD_B=8 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 61440 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_8q921 -( - address_a[7..0] : input; - address_b[7..0] : input; - clock0 : input; - clock1 : input; - data_a[239..0] : input; - q_b[239..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 128, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 128, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 129, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 129, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 130, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 130, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 131, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 131, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 132, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 132, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 133, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 133, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 134, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 134, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 135, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 135, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 136, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 136, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 137, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 137, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 138, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 138, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 139, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 139, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 140, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 140, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 141, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 141, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 142, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 142, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 143, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 143, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 144, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 144, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 145, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 145, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 146, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 146, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 147, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 147, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 148, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 148, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 149, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 149, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 150, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 150, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 151, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 151, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 152, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 152, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 153, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 153, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 154, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 154, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 155, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 155, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 156, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 156, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 157, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 157, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 158, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 158, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 159, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 159, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 160, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 160, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 161, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 161, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 162, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 162, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 163, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 163, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 164, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 164, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 165, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 165, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 166, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 166, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 167, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 167, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 168, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 168, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 169, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 169, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 170, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 170, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 171, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 171, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 172, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 172, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 173, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 173, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 174, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 174, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 175, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 175, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 176, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 176, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 177, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 177, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 178, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 178, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 179, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 179, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 180, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 180, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 181, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 181, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 182, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 182, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 183, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 183, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 184, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 184, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 185, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 185, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 186, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 186, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 187, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 187, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 188, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 188, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 189, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 189, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 190, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 190, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 191, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 191, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 192, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 192, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 193, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 193, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 194, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 194, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 195, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 195, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 196, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 196, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 197, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 197, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 198, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 198, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 199, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 199, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 200, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 200, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 201, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 201, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 202, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 202, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 203, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 203, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 204, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 204, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 205, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 205, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 206, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 206, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 207, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 207, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 208, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 208, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 209, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 209, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 210, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 210, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 211, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 211, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 212, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 212, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 213, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 213, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 214, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 214, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 215, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 215, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 216, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 216, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 217, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 217, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 218, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 218, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 219, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 219, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 220, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 220, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 221, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 221, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 222, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 222, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 223, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 223, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 224, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 224, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 225, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 225, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 226, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 226, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 227, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 227, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 228, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 228, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 229, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 229, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 230, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 230, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 231, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 231, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 232, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 232, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 233, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 233, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 234, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 234, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 235, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 235, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 236, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 236, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 237, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 237, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 238, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 238, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 8, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 239, - PORT_A_LAST_ADDRESS = 255, - PORT_A_LOGICAL_RAM_DEPTH = 256, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 8, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 239, - PORT_B_LAST_ADDRESS = 255, - PORT_B_LOGICAL_RAM_DEPTH = 256, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[7..0] : WIRE; - address_b_wire[7..0] : WIRE; - q_b_wire[239..0] : WIRE; - -BEGIN - ram_block2a[239..0].clk0 = clock0; - ram_block2a[239..0].clk1 = clock1; - ram_block2a[239..0].portaaddr[] = ( address_a_wire[7..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[128].portadatain[] = ( data_a[128..128]); - ram_block2a[129].portadatain[] = ( data_a[129..129]); - ram_block2a[130].portadatain[] = ( data_a[130..130]); - ram_block2a[131].portadatain[] = ( data_a[131..131]); - ram_block2a[132].portadatain[] = ( data_a[132..132]); - ram_block2a[133].portadatain[] = ( data_a[133..133]); - ram_block2a[134].portadatain[] = ( data_a[134..134]); - ram_block2a[135].portadatain[] = ( data_a[135..135]); - ram_block2a[136].portadatain[] = ( data_a[136..136]); - ram_block2a[137].portadatain[] = ( data_a[137..137]); - ram_block2a[138].portadatain[] = ( data_a[138..138]); - ram_block2a[139].portadatain[] = ( data_a[139..139]); - ram_block2a[140].portadatain[] = ( data_a[140..140]); - ram_block2a[141].portadatain[] = ( data_a[141..141]); - ram_block2a[142].portadatain[] = ( data_a[142..142]); - ram_block2a[143].portadatain[] = ( data_a[143..143]); - ram_block2a[144].portadatain[] = ( data_a[144..144]); - ram_block2a[145].portadatain[] = ( data_a[145..145]); - ram_block2a[146].portadatain[] = ( data_a[146..146]); - ram_block2a[147].portadatain[] = ( data_a[147..147]); - ram_block2a[148].portadatain[] = ( data_a[148..148]); - ram_block2a[149].portadatain[] = ( data_a[149..149]); - ram_block2a[150].portadatain[] = ( data_a[150..150]); - ram_block2a[151].portadatain[] = ( data_a[151..151]); - ram_block2a[152].portadatain[] = ( data_a[152..152]); - ram_block2a[153].portadatain[] = ( data_a[153..153]); - ram_block2a[154].portadatain[] = ( data_a[154..154]); - ram_block2a[155].portadatain[] = ( data_a[155..155]); - ram_block2a[156].portadatain[] = ( data_a[156..156]); - ram_block2a[157].portadatain[] = ( data_a[157..157]); - ram_block2a[158].portadatain[] = ( data_a[158..158]); - ram_block2a[159].portadatain[] = ( data_a[159..159]); - ram_block2a[160].portadatain[] = ( data_a[160..160]); - ram_block2a[161].portadatain[] = ( data_a[161..161]); - ram_block2a[162].portadatain[] = ( data_a[162..162]); - ram_block2a[163].portadatain[] = ( data_a[163..163]); - ram_block2a[164].portadatain[] = ( data_a[164..164]); - ram_block2a[165].portadatain[] = ( data_a[165..165]); - ram_block2a[166].portadatain[] = ( data_a[166..166]); - ram_block2a[167].portadatain[] = ( data_a[167..167]); - ram_block2a[168].portadatain[] = ( data_a[168..168]); - ram_block2a[169].portadatain[] = ( data_a[169..169]); - ram_block2a[170].portadatain[] = ( data_a[170..170]); - ram_block2a[171].portadatain[] = ( data_a[171..171]); - ram_block2a[172].portadatain[] = ( data_a[172..172]); - ram_block2a[173].portadatain[] = ( data_a[173..173]); - ram_block2a[174].portadatain[] = ( data_a[174..174]); - ram_block2a[175].portadatain[] = ( data_a[175..175]); - ram_block2a[176].portadatain[] = ( data_a[176..176]); - ram_block2a[177].portadatain[] = ( data_a[177..177]); - ram_block2a[178].portadatain[] = ( data_a[178..178]); - ram_block2a[179].portadatain[] = ( data_a[179..179]); - ram_block2a[180].portadatain[] = ( data_a[180..180]); - ram_block2a[181].portadatain[] = ( data_a[181..181]); - ram_block2a[182].portadatain[] = ( data_a[182..182]); - ram_block2a[183].portadatain[] = ( data_a[183..183]); - ram_block2a[184].portadatain[] = ( data_a[184..184]); - ram_block2a[185].portadatain[] = ( data_a[185..185]); - ram_block2a[186].portadatain[] = ( data_a[186..186]); - ram_block2a[187].portadatain[] = ( data_a[187..187]); - ram_block2a[188].portadatain[] = ( data_a[188..188]); - ram_block2a[189].portadatain[] = ( data_a[189..189]); - ram_block2a[190].portadatain[] = ( data_a[190..190]); - ram_block2a[191].portadatain[] = ( data_a[191..191]); - ram_block2a[192].portadatain[] = ( data_a[192..192]); - ram_block2a[193].portadatain[] = ( data_a[193..193]); - ram_block2a[194].portadatain[] = ( data_a[194..194]); - ram_block2a[195].portadatain[] = ( data_a[195..195]); - ram_block2a[196].portadatain[] = ( data_a[196..196]); - ram_block2a[197].portadatain[] = ( data_a[197..197]); - ram_block2a[198].portadatain[] = ( data_a[198..198]); - ram_block2a[199].portadatain[] = ( data_a[199..199]); - ram_block2a[200].portadatain[] = ( data_a[200..200]); - ram_block2a[201].portadatain[] = ( data_a[201..201]); - ram_block2a[202].portadatain[] = ( data_a[202..202]); - ram_block2a[203].portadatain[] = ( data_a[203..203]); - ram_block2a[204].portadatain[] = ( data_a[204..204]); - ram_block2a[205].portadatain[] = ( data_a[205..205]); - ram_block2a[206].portadatain[] = ( data_a[206..206]); - ram_block2a[207].portadatain[] = ( data_a[207..207]); - ram_block2a[208].portadatain[] = ( data_a[208..208]); - ram_block2a[209].portadatain[] = ( data_a[209..209]); - ram_block2a[210].portadatain[] = ( data_a[210..210]); - ram_block2a[211].portadatain[] = ( data_a[211..211]); - ram_block2a[212].portadatain[] = ( data_a[212..212]); - ram_block2a[213].portadatain[] = ( data_a[213..213]); - ram_block2a[214].portadatain[] = ( data_a[214..214]); - ram_block2a[215].portadatain[] = ( data_a[215..215]); - ram_block2a[216].portadatain[] = ( data_a[216..216]); - ram_block2a[217].portadatain[] = ( data_a[217..217]); - ram_block2a[218].portadatain[] = ( data_a[218..218]); - ram_block2a[219].portadatain[] = ( data_a[219..219]); - ram_block2a[220].portadatain[] = ( data_a[220..220]); - ram_block2a[221].portadatain[] = ( data_a[221..221]); - ram_block2a[222].portadatain[] = ( data_a[222..222]); - ram_block2a[223].portadatain[] = ( data_a[223..223]); - ram_block2a[224].portadatain[] = ( data_a[224..224]); - ram_block2a[225].portadatain[] = ( data_a[225..225]); - ram_block2a[226].portadatain[] = ( data_a[226..226]); - ram_block2a[227].portadatain[] = ( data_a[227..227]); - ram_block2a[228].portadatain[] = ( data_a[228..228]); - ram_block2a[229].portadatain[] = ( data_a[229..229]); - ram_block2a[230].portadatain[] = ( data_a[230..230]); - ram_block2a[231].portadatain[] = ( data_a[231..231]); - ram_block2a[232].portadatain[] = ( data_a[232..232]); - ram_block2a[233].portadatain[] = ( data_a[233..233]); - ram_block2a[234].portadatain[] = ( data_a[234..234]); - ram_block2a[235].portadatain[] = ( data_a[235..235]); - ram_block2a[236].portadatain[] = ( data_a[236..236]); - ram_block2a[237].portadatain[] = ( data_a[237..237]); - ram_block2a[238].portadatain[] = ( data_a[238..238]); - ram_block2a[239].portadatain[] = ( data_a[239..239]); - ram_block2a[239..0].portawe = wren_a; - ram_block2a[239..0].portbaddr[] = ( address_b_wire[7..0]); - ram_block2a[239..0].portbre = B"111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[239..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8sj71.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8sj71.tdf deleted file mode 100644 index 390b748..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8sj71.tdf +++ /dev/null @@ -1,16005 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=32768 NUMWORDS_B=32768 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=32 WIDTH_B=32 WIDTH_BYTEENA_A=4 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=15 WIDTHAD_B=15 WREN_POWER_OPTIMIZATION="OFF" address_a address_b byteena_a clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION decode_m7op (data[3..0], enable) -RETURNS ( eq[15..0]); -FUNCTION mux_lrsc1 (data[511..0], sel[3..0]) -RETURNS ( result[31..0]); -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = lut 178 ram_bits (AUTO) 1048576 reg 4 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_8sj71 -( - address_a[14..0] : input; - address_b[14..0] : input; - byteena_a[3..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - address_reg_b[3..0] : dffe; - decode3 : decode_m7op; - mux4 : mux_lrsc1; - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a240 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a241 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a242 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a243 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a244 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a245 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a246 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a247 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a248 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a249 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a250 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a251 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a252 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a253 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a254 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a255 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a256 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a257 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a258 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a259 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a260 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a261 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a262 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a263 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a264 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a265 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a266 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a267 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a268 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a269 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a270 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a271 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a272 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a273 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a274 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a275 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a276 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a277 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a278 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a279 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a280 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a281 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a282 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a283 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a284 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a285 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a286 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a287 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a288 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a289 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a290 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a291 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a292 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a293 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a294 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a295 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a296 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a297 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a298 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a299 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a300 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a301 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a302 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a303 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a304 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a305 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a306 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a307 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a308 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a309 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a310 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a311 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a312 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a313 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a314 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a315 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a316 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a317 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a318 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a319 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a320 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a321 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a322 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a323 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a324 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a325 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a326 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a327 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a328 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a329 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a330 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a331 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a332 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a333 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a334 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a335 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a336 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a337 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a338 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a339 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a340 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a341 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a342 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a343 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a344 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a345 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a346 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a347 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a348 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a349 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a350 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a351 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a352 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a353 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a354 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a355 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a356 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a357 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a358 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a359 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a360 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a361 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a362 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a363 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a364 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a365 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a366 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a367 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a368 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a369 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a370 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a371 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a372 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a373 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a374 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a375 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a376 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a377 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a378 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a379 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a380 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a381 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a382 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a383 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a384 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a385 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a386 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a387 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a388 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a389 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a390 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a391 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a392 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a393 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a394 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a395 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a396 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a397 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a398 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a399 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a400 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a401 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a402 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a403 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a404 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a405 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a406 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a407 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a408 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a409 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a410 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a411 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a412 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a413 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a414 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a415 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a416 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a417 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a418 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a419 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a420 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a421 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a422 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a423 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a424 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a425 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a426 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a427 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a428 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a429 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a430 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a431 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a432 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a433 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a434 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a435 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a436 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a437 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a438 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a439 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a440 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a441 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a442 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a443 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a444 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a445 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a446 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a447 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a448 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a449 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a450 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a451 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a452 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a453 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a454 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a455 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a456 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a457 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a458 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a459 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a460 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a461 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a462 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a463 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a464 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a465 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a466 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a467 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a468 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a469 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a470 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a471 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a472 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a473 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a474 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a475 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a476 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a477 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a478 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a479 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a480 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a481 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a482 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a483 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a484 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a485 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a486 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a487 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a488 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a489 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a490 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a491 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a492 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a493 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a494 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a495 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a496 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a497 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a498 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a499 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a500 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a501 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a502 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a503 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a504 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a505 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a506 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a507 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a508 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a509 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a510 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a511 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 32768, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 32768, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[14..0] : WIRE; - address_b_sel[3..0] : WIRE; - address_b_wire[14..0] : WIRE; - q_b_wire[31..0] : WIRE; - -BEGIN - address_reg_b[].clk = clock0; - address_reg_b[].d = address_b_sel[]; - decode3.data[3..0] = address_a_wire[14..11]; - decode3.enable = wren_a; - mux4.data[] = ( ram_block2a[511..0].portbdataout[0..0]); - mux4.sel[] = address_reg_b[].q; - ram_block2a[511..0].clk0 = clock0; - ram_block2a[511..0].portaaddr[] = ( address_a_wire[10..0]); - ram_block2a[7..0].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[15..8].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[23..16].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[31..24].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[39..32].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[47..40].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[55..48].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[63..56].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[71..64].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[79..72].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[87..80].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[95..88].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[103..96].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[111..104].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[119..112].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[127..120].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[135..128].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[143..136].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[151..144].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[159..152].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[167..160].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[175..168].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[183..176].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[191..184].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[199..192].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[207..200].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[215..208].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[223..216].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[231..224].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[239..232].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[247..240].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[255..248].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[263..256].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[271..264].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[279..272].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[287..280].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[295..288].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[303..296].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[311..304].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[319..312].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[327..320].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[335..328].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[343..336].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[351..344].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[359..352].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[367..360].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[375..368].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[383..376].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[391..384].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[399..392].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[407..400].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[415..408].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[423..416].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[431..424].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[439..432].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[447..440].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[455..448].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[463..456].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[471..464].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[479..472].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[487..480].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[495..488].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[503..496].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[511..504].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[0..0]); - ram_block2a[33].portadatain[] = ( data_a[1..1]); - ram_block2a[34].portadatain[] = ( data_a[2..2]); - ram_block2a[35].portadatain[] = ( data_a[3..3]); - ram_block2a[36].portadatain[] = ( data_a[4..4]); - ram_block2a[37].portadatain[] = ( data_a[5..5]); - ram_block2a[38].portadatain[] = ( data_a[6..6]); - ram_block2a[39].portadatain[] = ( data_a[7..7]); - ram_block2a[40].portadatain[] = ( data_a[8..8]); - ram_block2a[41].portadatain[] = ( data_a[9..9]); - ram_block2a[42].portadatain[] = ( data_a[10..10]); - ram_block2a[43].portadatain[] = ( data_a[11..11]); - ram_block2a[44].portadatain[] = ( data_a[12..12]); - ram_block2a[45].portadatain[] = ( data_a[13..13]); - ram_block2a[46].portadatain[] = ( data_a[14..14]); - ram_block2a[47].portadatain[] = ( data_a[15..15]); - ram_block2a[48].portadatain[] = ( data_a[16..16]); - ram_block2a[49].portadatain[] = ( data_a[17..17]); - ram_block2a[50].portadatain[] = ( data_a[18..18]); - ram_block2a[51].portadatain[] = ( data_a[19..19]); - ram_block2a[52].portadatain[] = ( data_a[20..20]); - ram_block2a[53].portadatain[] = ( data_a[21..21]); - ram_block2a[54].portadatain[] = ( data_a[22..22]); - ram_block2a[55].portadatain[] = ( data_a[23..23]); - ram_block2a[56].portadatain[] = ( data_a[24..24]); - ram_block2a[57].portadatain[] = ( data_a[25..25]); - ram_block2a[58].portadatain[] = ( data_a[26..26]); - ram_block2a[59].portadatain[] = ( data_a[27..27]); - ram_block2a[60].portadatain[] = ( data_a[28..28]); - ram_block2a[61].portadatain[] = ( data_a[29..29]); - ram_block2a[62].portadatain[] = ( data_a[30..30]); - ram_block2a[63].portadatain[] = ( data_a[31..31]); - ram_block2a[64].portadatain[] = ( data_a[0..0]); - ram_block2a[65].portadatain[] = ( data_a[1..1]); - ram_block2a[66].portadatain[] = ( data_a[2..2]); - ram_block2a[67].portadatain[] = ( data_a[3..3]); - ram_block2a[68].portadatain[] = ( data_a[4..4]); - ram_block2a[69].portadatain[] = ( data_a[5..5]); - ram_block2a[70].portadatain[] = ( data_a[6..6]); - ram_block2a[71].portadatain[] = ( data_a[7..7]); - ram_block2a[72].portadatain[] = ( data_a[8..8]); - ram_block2a[73].portadatain[] = ( data_a[9..9]); - ram_block2a[74].portadatain[] = ( data_a[10..10]); - ram_block2a[75].portadatain[] = ( data_a[11..11]); - ram_block2a[76].portadatain[] = ( data_a[12..12]); - ram_block2a[77].portadatain[] = ( data_a[13..13]); - ram_block2a[78].portadatain[] = ( data_a[14..14]); - ram_block2a[79].portadatain[] = ( data_a[15..15]); - ram_block2a[80].portadatain[] = ( data_a[16..16]); - ram_block2a[81].portadatain[] = ( data_a[17..17]); - ram_block2a[82].portadatain[] = ( data_a[18..18]); - ram_block2a[83].portadatain[] = ( data_a[19..19]); - ram_block2a[84].portadatain[] = ( data_a[20..20]); - ram_block2a[85].portadatain[] = ( data_a[21..21]); - ram_block2a[86].portadatain[] = ( data_a[22..22]); - ram_block2a[87].portadatain[] = ( data_a[23..23]); - ram_block2a[88].portadatain[] = ( data_a[24..24]); - ram_block2a[89].portadatain[] = ( data_a[25..25]); - ram_block2a[90].portadatain[] = ( data_a[26..26]); - ram_block2a[91].portadatain[] = ( data_a[27..27]); - ram_block2a[92].portadatain[] = ( data_a[28..28]); - ram_block2a[93].portadatain[] = ( data_a[29..29]); - ram_block2a[94].portadatain[] = ( data_a[30..30]); - ram_block2a[95].portadatain[] = ( data_a[31..31]); - ram_block2a[96].portadatain[] = ( data_a[0..0]); - ram_block2a[97].portadatain[] = ( data_a[1..1]); - ram_block2a[98].portadatain[] = ( data_a[2..2]); - ram_block2a[99].portadatain[] = ( data_a[3..3]); - ram_block2a[100].portadatain[] = ( data_a[4..4]); - ram_block2a[101].portadatain[] = ( data_a[5..5]); - ram_block2a[102].portadatain[] = ( data_a[6..6]); - ram_block2a[103].portadatain[] = ( data_a[7..7]); - ram_block2a[104].portadatain[] = ( data_a[8..8]); - ram_block2a[105].portadatain[] = ( data_a[9..9]); - ram_block2a[106].portadatain[] = ( data_a[10..10]); - ram_block2a[107].portadatain[] = ( data_a[11..11]); - ram_block2a[108].portadatain[] = ( data_a[12..12]); - ram_block2a[109].portadatain[] = ( data_a[13..13]); - ram_block2a[110].portadatain[] = ( data_a[14..14]); - ram_block2a[111].portadatain[] = ( data_a[15..15]); - ram_block2a[112].portadatain[] = ( data_a[16..16]); - ram_block2a[113].portadatain[] = ( data_a[17..17]); - ram_block2a[114].portadatain[] = ( data_a[18..18]); - ram_block2a[115].portadatain[] = ( data_a[19..19]); - ram_block2a[116].portadatain[] = ( data_a[20..20]); - ram_block2a[117].portadatain[] = ( data_a[21..21]); - ram_block2a[118].portadatain[] = ( data_a[22..22]); - ram_block2a[119].portadatain[] = ( data_a[23..23]); - ram_block2a[120].portadatain[] = ( data_a[24..24]); - ram_block2a[121].portadatain[] = ( data_a[25..25]); - ram_block2a[122].portadatain[] = ( data_a[26..26]); - ram_block2a[123].portadatain[] = ( data_a[27..27]); - ram_block2a[124].portadatain[] = ( data_a[28..28]); - ram_block2a[125].portadatain[] = ( data_a[29..29]); - ram_block2a[126].portadatain[] = ( data_a[30..30]); - ram_block2a[127].portadatain[] = ( data_a[31..31]); - ram_block2a[128].portadatain[] = ( data_a[0..0]); - ram_block2a[129].portadatain[] = ( data_a[1..1]); - ram_block2a[130].portadatain[] = ( data_a[2..2]); - ram_block2a[131].portadatain[] = ( data_a[3..3]); - ram_block2a[132].portadatain[] = ( data_a[4..4]); - ram_block2a[133].portadatain[] = ( data_a[5..5]); - ram_block2a[134].portadatain[] = ( data_a[6..6]); - ram_block2a[135].portadatain[] = ( data_a[7..7]); - ram_block2a[136].portadatain[] = ( data_a[8..8]); - ram_block2a[137].portadatain[] = ( data_a[9..9]); - ram_block2a[138].portadatain[] = ( data_a[10..10]); - ram_block2a[139].portadatain[] = ( data_a[11..11]); - ram_block2a[140].portadatain[] = ( data_a[12..12]); - ram_block2a[141].portadatain[] = ( data_a[13..13]); - ram_block2a[142].portadatain[] = ( data_a[14..14]); - ram_block2a[143].portadatain[] = ( data_a[15..15]); - ram_block2a[144].portadatain[] = ( data_a[16..16]); - ram_block2a[145].portadatain[] = ( data_a[17..17]); - ram_block2a[146].portadatain[] = ( data_a[18..18]); - ram_block2a[147].portadatain[] = ( data_a[19..19]); - ram_block2a[148].portadatain[] = ( data_a[20..20]); - ram_block2a[149].portadatain[] = ( data_a[21..21]); - ram_block2a[150].portadatain[] = ( data_a[22..22]); - ram_block2a[151].portadatain[] = ( data_a[23..23]); - ram_block2a[152].portadatain[] = ( data_a[24..24]); - ram_block2a[153].portadatain[] = ( data_a[25..25]); - ram_block2a[154].portadatain[] = ( data_a[26..26]); - ram_block2a[155].portadatain[] = ( data_a[27..27]); - ram_block2a[156].portadatain[] = ( data_a[28..28]); - ram_block2a[157].portadatain[] = ( data_a[29..29]); - ram_block2a[158].portadatain[] = ( data_a[30..30]); - ram_block2a[159].portadatain[] = ( data_a[31..31]); - ram_block2a[160].portadatain[] = ( data_a[0..0]); - ram_block2a[161].portadatain[] = ( data_a[1..1]); - ram_block2a[162].portadatain[] = ( data_a[2..2]); - ram_block2a[163].portadatain[] = ( data_a[3..3]); - ram_block2a[164].portadatain[] = ( data_a[4..4]); - ram_block2a[165].portadatain[] = ( data_a[5..5]); - ram_block2a[166].portadatain[] = ( data_a[6..6]); - ram_block2a[167].portadatain[] = ( data_a[7..7]); - ram_block2a[168].portadatain[] = ( data_a[8..8]); - ram_block2a[169].portadatain[] = ( data_a[9..9]); - ram_block2a[170].portadatain[] = ( data_a[10..10]); - ram_block2a[171].portadatain[] = ( data_a[11..11]); - ram_block2a[172].portadatain[] = ( data_a[12..12]); - ram_block2a[173].portadatain[] = ( data_a[13..13]); - ram_block2a[174].portadatain[] = ( data_a[14..14]); - ram_block2a[175].portadatain[] = ( data_a[15..15]); - ram_block2a[176].portadatain[] = ( data_a[16..16]); - ram_block2a[177].portadatain[] = ( data_a[17..17]); - ram_block2a[178].portadatain[] = ( data_a[18..18]); - ram_block2a[179].portadatain[] = ( data_a[19..19]); - ram_block2a[180].portadatain[] = ( data_a[20..20]); - ram_block2a[181].portadatain[] = ( data_a[21..21]); - ram_block2a[182].portadatain[] = ( data_a[22..22]); - ram_block2a[183].portadatain[] = ( data_a[23..23]); - ram_block2a[184].portadatain[] = ( data_a[24..24]); - ram_block2a[185].portadatain[] = ( data_a[25..25]); - ram_block2a[186].portadatain[] = ( data_a[26..26]); - ram_block2a[187].portadatain[] = ( data_a[27..27]); - ram_block2a[188].portadatain[] = ( data_a[28..28]); - ram_block2a[189].portadatain[] = ( data_a[29..29]); - ram_block2a[190].portadatain[] = ( data_a[30..30]); - ram_block2a[191].portadatain[] = ( data_a[31..31]); - ram_block2a[192].portadatain[] = ( data_a[0..0]); - ram_block2a[193].portadatain[] = ( data_a[1..1]); - ram_block2a[194].portadatain[] = ( data_a[2..2]); - ram_block2a[195].portadatain[] = ( data_a[3..3]); - ram_block2a[196].portadatain[] = ( data_a[4..4]); - ram_block2a[197].portadatain[] = ( data_a[5..5]); - ram_block2a[198].portadatain[] = ( data_a[6..6]); - ram_block2a[199].portadatain[] = ( data_a[7..7]); - ram_block2a[200].portadatain[] = ( data_a[8..8]); - ram_block2a[201].portadatain[] = ( data_a[9..9]); - ram_block2a[202].portadatain[] = ( data_a[10..10]); - ram_block2a[203].portadatain[] = ( data_a[11..11]); - ram_block2a[204].portadatain[] = ( data_a[12..12]); - ram_block2a[205].portadatain[] = ( data_a[13..13]); - ram_block2a[206].portadatain[] = ( data_a[14..14]); - ram_block2a[207].portadatain[] = ( data_a[15..15]); - ram_block2a[208].portadatain[] = ( data_a[16..16]); - ram_block2a[209].portadatain[] = ( data_a[17..17]); - ram_block2a[210].portadatain[] = ( data_a[18..18]); - ram_block2a[211].portadatain[] = ( data_a[19..19]); - ram_block2a[212].portadatain[] = ( data_a[20..20]); - ram_block2a[213].portadatain[] = ( data_a[21..21]); - ram_block2a[214].portadatain[] = ( data_a[22..22]); - ram_block2a[215].portadatain[] = ( data_a[23..23]); - ram_block2a[216].portadatain[] = ( data_a[24..24]); - ram_block2a[217].portadatain[] = ( data_a[25..25]); - ram_block2a[218].portadatain[] = ( data_a[26..26]); - ram_block2a[219].portadatain[] = ( data_a[27..27]); - ram_block2a[220].portadatain[] = ( data_a[28..28]); - ram_block2a[221].portadatain[] = ( data_a[29..29]); - ram_block2a[222].portadatain[] = ( data_a[30..30]); - ram_block2a[223].portadatain[] = ( data_a[31..31]); - ram_block2a[224].portadatain[] = ( data_a[0..0]); - ram_block2a[225].portadatain[] = ( data_a[1..1]); - ram_block2a[226].portadatain[] = ( data_a[2..2]); - ram_block2a[227].portadatain[] = ( data_a[3..3]); - ram_block2a[228].portadatain[] = ( data_a[4..4]); - ram_block2a[229].portadatain[] = ( data_a[5..5]); - ram_block2a[230].portadatain[] = ( data_a[6..6]); - ram_block2a[231].portadatain[] = ( data_a[7..7]); - ram_block2a[232].portadatain[] = ( data_a[8..8]); - ram_block2a[233].portadatain[] = ( data_a[9..9]); - ram_block2a[234].portadatain[] = ( data_a[10..10]); - ram_block2a[235].portadatain[] = ( data_a[11..11]); - ram_block2a[236].portadatain[] = ( data_a[12..12]); - ram_block2a[237].portadatain[] = ( data_a[13..13]); - ram_block2a[238].portadatain[] = ( data_a[14..14]); - ram_block2a[239].portadatain[] = ( data_a[15..15]); - ram_block2a[240].portadatain[] = ( data_a[16..16]); - ram_block2a[241].portadatain[] = ( data_a[17..17]); - ram_block2a[242].portadatain[] = ( data_a[18..18]); - ram_block2a[243].portadatain[] = ( data_a[19..19]); - ram_block2a[244].portadatain[] = ( data_a[20..20]); - ram_block2a[245].portadatain[] = ( data_a[21..21]); - ram_block2a[246].portadatain[] = ( data_a[22..22]); - ram_block2a[247].portadatain[] = ( data_a[23..23]); - ram_block2a[248].portadatain[] = ( data_a[24..24]); - ram_block2a[249].portadatain[] = ( data_a[25..25]); - ram_block2a[250].portadatain[] = ( data_a[26..26]); - ram_block2a[251].portadatain[] = ( data_a[27..27]); - ram_block2a[252].portadatain[] = ( data_a[28..28]); - ram_block2a[253].portadatain[] = ( data_a[29..29]); - ram_block2a[254].portadatain[] = ( data_a[30..30]); - ram_block2a[255].portadatain[] = ( data_a[31..31]); - ram_block2a[256].portadatain[] = ( data_a[0..0]); - ram_block2a[257].portadatain[] = ( data_a[1..1]); - ram_block2a[258].portadatain[] = ( data_a[2..2]); - ram_block2a[259].portadatain[] = ( data_a[3..3]); - ram_block2a[260].portadatain[] = ( data_a[4..4]); - ram_block2a[261].portadatain[] = ( data_a[5..5]); - ram_block2a[262].portadatain[] = ( data_a[6..6]); - ram_block2a[263].portadatain[] = ( data_a[7..7]); - ram_block2a[264].portadatain[] = ( data_a[8..8]); - ram_block2a[265].portadatain[] = ( data_a[9..9]); - ram_block2a[266].portadatain[] = ( data_a[10..10]); - ram_block2a[267].portadatain[] = ( data_a[11..11]); - ram_block2a[268].portadatain[] = ( data_a[12..12]); - ram_block2a[269].portadatain[] = ( data_a[13..13]); - ram_block2a[270].portadatain[] = ( data_a[14..14]); - ram_block2a[271].portadatain[] = ( data_a[15..15]); - ram_block2a[272].portadatain[] = ( data_a[16..16]); - ram_block2a[273].portadatain[] = ( data_a[17..17]); - ram_block2a[274].portadatain[] = ( data_a[18..18]); - ram_block2a[275].portadatain[] = ( data_a[19..19]); - ram_block2a[276].portadatain[] = ( data_a[20..20]); - ram_block2a[277].portadatain[] = ( data_a[21..21]); - ram_block2a[278].portadatain[] = ( data_a[22..22]); - ram_block2a[279].portadatain[] = ( data_a[23..23]); - ram_block2a[280].portadatain[] = ( data_a[24..24]); - ram_block2a[281].portadatain[] = ( data_a[25..25]); - ram_block2a[282].portadatain[] = ( data_a[26..26]); - ram_block2a[283].portadatain[] = ( data_a[27..27]); - ram_block2a[284].portadatain[] = ( data_a[28..28]); - ram_block2a[285].portadatain[] = ( data_a[29..29]); - ram_block2a[286].portadatain[] = ( data_a[30..30]); - ram_block2a[287].portadatain[] = ( data_a[31..31]); - ram_block2a[288].portadatain[] = ( data_a[0..0]); - ram_block2a[289].portadatain[] = ( data_a[1..1]); - ram_block2a[290].portadatain[] = ( data_a[2..2]); - ram_block2a[291].portadatain[] = ( data_a[3..3]); - ram_block2a[292].portadatain[] = ( data_a[4..4]); - ram_block2a[293].portadatain[] = ( data_a[5..5]); - ram_block2a[294].portadatain[] = ( data_a[6..6]); - ram_block2a[295].portadatain[] = ( data_a[7..7]); - ram_block2a[296].portadatain[] = ( data_a[8..8]); - ram_block2a[297].portadatain[] = ( data_a[9..9]); - ram_block2a[298].portadatain[] = ( data_a[10..10]); - ram_block2a[299].portadatain[] = ( data_a[11..11]); - ram_block2a[300].portadatain[] = ( data_a[12..12]); - ram_block2a[301].portadatain[] = ( data_a[13..13]); - ram_block2a[302].portadatain[] = ( data_a[14..14]); - ram_block2a[303].portadatain[] = ( data_a[15..15]); - ram_block2a[304].portadatain[] = ( data_a[16..16]); - ram_block2a[305].portadatain[] = ( data_a[17..17]); - ram_block2a[306].portadatain[] = ( data_a[18..18]); - ram_block2a[307].portadatain[] = ( data_a[19..19]); - ram_block2a[308].portadatain[] = ( data_a[20..20]); - ram_block2a[309].portadatain[] = ( data_a[21..21]); - ram_block2a[310].portadatain[] = ( data_a[22..22]); - ram_block2a[311].portadatain[] = ( data_a[23..23]); - ram_block2a[312].portadatain[] = ( data_a[24..24]); - ram_block2a[313].portadatain[] = ( data_a[25..25]); - ram_block2a[314].portadatain[] = ( data_a[26..26]); - ram_block2a[315].portadatain[] = ( data_a[27..27]); - ram_block2a[316].portadatain[] = ( data_a[28..28]); - ram_block2a[317].portadatain[] = ( data_a[29..29]); - ram_block2a[318].portadatain[] = ( data_a[30..30]); - ram_block2a[319].portadatain[] = ( data_a[31..31]); - ram_block2a[320].portadatain[] = ( data_a[0..0]); - ram_block2a[321].portadatain[] = ( data_a[1..1]); - ram_block2a[322].portadatain[] = ( data_a[2..2]); - ram_block2a[323].portadatain[] = ( data_a[3..3]); - ram_block2a[324].portadatain[] = ( data_a[4..4]); - ram_block2a[325].portadatain[] = ( data_a[5..5]); - ram_block2a[326].portadatain[] = ( data_a[6..6]); - ram_block2a[327].portadatain[] = ( data_a[7..7]); - ram_block2a[328].portadatain[] = ( data_a[8..8]); - ram_block2a[329].portadatain[] = ( data_a[9..9]); - ram_block2a[330].portadatain[] = ( data_a[10..10]); - ram_block2a[331].portadatain[] = ( data_a[11..11]); - ram_block2a[332].portadatain[] = ( data_a[12..12]); - ram_block2a[333].portadatain[] = ( data_a[13..13]); - ram_block2a[334].portadatain[] = ( data_a[14..14]); - ram_block2a[335].portadatain[] = ( data_a[15..15]); - ram_block2a[336].portadatain[] = ( data_a[16..16]); - ram_block2a[337].portadatain[] = ( data_a[17..17]); - ram_block2a[338].portadatain[] = ( data_a[18..18]); - ram_block2a[339].portadatain[] = ( data_a[19..19]); - ram_block2a[340].portadatain[] = ( data_a[20..20]); - ram_block2a[341].portadatain[] = ( data_a[21..21]); - ram_block2a[342].portadatain[] = ( data_a[22..22]); - ram_block2a[343].portadatain[] = ( data_a[23..23]); - ram_block2a[344].portadatain[] = ( data_a[24..24]); - ram_block2a[345].portadatain[] = ( data_a[25..25]); - ram_block2a[346].portadatain[] = ( data_a[26..26]); - ram_block2a[347].portadatain[] = ( data_a[27..27]); - ram_block2a[348].portadatain[] = ( data_a[28..28]); - ram_block2a[349].portadatain[] = ( data_a[29..29]); - ram_block2a[350].portadatain[] = ( data_a[30..30]); - ram_block2a[351].portadatain[] = ( data_a[31..31]); - ram_block2a[352].portadatain[] = ( data_a[0..0]); - ram_block2a[353].portadatain[] = ( data_a[1..1]); - ram_block2a[354].portadatain[] = ( data_a[2..2]); - ram_block2a[355].portadatain[] = ( data_a[3..3]); - ram_block2a[356].portadatain[] = ( data_a[4..4]); - ram_block2a[357].portadatain[] = ( data_a[5..5]); - ram_block2a[358].portadatain[] = ( data_a[6..6]); - ram_block2a[359].portadatain[] = ( data_a[7..7]); - ram_block2a[360].portadatain[] = ( data_a[8..8]); - ram_block2a[361].portadatain[] = ( data_a[9..9]); - ram_block2a[362].portadatain[] = ( data_a[10..10]); - ram_block2a[363].portadatain[] = ( data_a[11..11]); - ram_block2a[364].portadatain[] = ( data_a[12..12]); - ram_block2a[365].portadatain[] = ( data_a[13..13]); - ram_block2a[366].portadatain[] = ( data_a[14..14]); - ram_block2a[367].portadatain[] = ( data_a[15..15]); - ram_block2a[368].portadatain[] = ( data_a[16..16]); - ram_block2a[369].portadatain[] = ( data_a[17..17]); - ram_block2a[370].portadatain[] = ( data_a[18..18]); - ram_block2a[371].portadatain[] = ( data_a[19..19]); - ram_block2a[372].portadatain[] = ( data_a[20..20]); - ram_block2a[373].portadatain[] = ( data_a[21..21]); - ram_block2a[374].portadatain[] = ( data_a[22..22]); - ram_block2a[375].portadatain[] = ( data_a[23..23]); - ram_block2a[376].portadatain[] = ( data_a[24..24]); - ram_block2a[377].portadatain[] = ( data_a[25..25]); - ram_block2a[378].portadatain[] = ( data_a[26..26]); - ram_block2a[379].portadatain[] = ( data_a[27..27]); - ram_block2a[380].portadatain[] = ( data_a[28..28]); - ram_block2a[381].portadatain[] = ( data_a[29..29]); - ram_block2a[382].portadatain[] = ( data_a[30..30]); - ram_block2a[383].portadatain[] = ( data_a[31..31]); - ram_block2a[384].portadatain[] = ( data_a[0..0]); - ram_block2a[385].portadatain[] = ( data_a[1..1]); - ram_block2a[386].portadatain[] = ( data_a[2..2]); - ram_block2a[387].portadatain[] = ( data_a[3..3]); - ram_block2a[388].portadatain[] = ( data_a[4..4]); - ram_block2a[389].portadatain[] = ( data_a[5..5]); - ram_block2a[390].portadatain[] = ( data_a[6..6]); - ram_block2a[391].portadatain[] = ( data_a[7..7]); - ram_block2a[392].portadatain[] = ( data_a[8..8]); - ram_block2a[393].portadatain[] = ( data_a[9..9]); - ram_block2a[394].portadatain[] = ( data_a[10..10]); - ram_block2a[395].portadatain[] = ( data_a[11..11]); - ram_block2a[396].portadatain[] = ( data_a[12..12]); - ram_block2a[397].portadatain[] = ( data_a[13..13]); - ram_block2a[398].portadatain[] = ( data_a[14..14]); - ram_block2a[399].portadatain[] = ( data_a[15..15]); - ram_block2a[400].portadatain[] = ( data_a[16..16]); - ram_block2a[401].portadatain[] = ( data_a[17..17]); - ram_block2a[402].portadatain[] = ( data_a[18..18]); - ram_block2a[403].portadatain[] = ( data_a[19..19]); - ram_block2a[404].portadatain[] = ( data_a[20..20]); - ram_block2a[405].portadatain[] = ( data_a[21..21]); - ram_block2a[406].portadatain[] = ( data_a[22..22]); - ram_block2a[407].portadatain[] = ( data_a[23..23]); - ram_block2a[408].portadatain[] = ( data_a[24..24]); - ram_block2a[409].portadatain[] = ( data_a[25..25]); - ram_block2a[410].portadatain[] = ( data_a[26..26]); - ram_block2a[411].portadatain[] = ( data_a[27..27]); - ram_block2a[412].portadatain[] = ( data_a[28..28]); - ram_block2a[413].portadatain[] = ( data_a[29..29]); - ram_block2a[414].portadatain[] = ( data_a[30..30]); - ram_block2a[415].portadatain[] = ( data_a[31..31]); - ram_block2a[416].portadatain[] = ( data_a[0..0]); - ram_block2a[417].portadatain[] = ( data_a[1..1]); - ram_block2a[418].portadatain[] = ( data_a[2..2]); - ram_block2a[419].portadatain[] = ( data_a[3..3]); - ram_block2a[420].portadatain[] = ( data_a[4..4]); - ram_block2a[421].portadatain[] = ( data_a[5..5]); - ram_block2a[422].portadatain[] = ( data_a[6..6]); - ram_block2a[423].portadatain[] = ( data_a[7..7]); - ram_block2a[424].portadatain[] = ( data_a[8..8]); - ram_block2a[425].portadatain[] = ( data_a[9..9]); - ram_block2a[426].portadatain[] = ( data_a[10..10]); - ram_block2a[427].portadatain[] = ( data_a[11..11]); - ram_block2a[428].portadatain[] = ( data_a[12..12]); - ram_block2a[429].portadatain[] = ( data_a[13..13]); - ram_block2a[430].portadatain[] = ( data_a[14..14]); - ram_block2a[431].portadatain[] = ( data_a[15..15]); - ram_block2a[432].portadatain[] = ( data_a[16..16]); - ram_block2a[433].portadatain[] = ( data_a[17..17]); - ram_block2a[434].portadatain[] = ( data_a[18..18]); - ram_block2a[435].portadatain[] = ( data_a[19..19]); - ram_block2a[436].portadatain[] = ( data_a[20..20]); - ram_block2a[437].portadatain[] = ( data_a[21..21]); - ram_block2a[438].portadatain[] = ( data_a[22..22]); - ram_block2a[439].portadatain[] = ( data_a[23..23]); - ram_block2a[440].portadatain[] = ( data_a[24..24]); - ram_block2a[441].portadatain[] = ( data_a[25..25]); - ram_block2a[442].portadatain[] = ( data_a[26..26]); - ram_block2a[443].portadatain[] = ( data_a[27..27]); - ram_block2a[444].portadatain[] = ( data_a[28..28]); - ram_block2a[445].portadatain[] = ( data_a[29..29]); - ram_block2a[446].portadatain[] = ( data_a[30..30]); - ram_block2a[447].portadatain[] = ( data_a[31..31]); - ram_block2a[448].portadatain[] = ( data_a[0..0]); - ram_block2a[449].portadatain[] = ( data_a[1..1]); - ram_block2a[450].portadatain[] = ( data_a[2..2]); - ram_block2a[451].portadatain[] = ( data_a[3..3]); - ram_block2a[452].portadatain[] = ( data_a[4..4]); - ram_block2a[453].portadatain[] = ( data_a[5..5]); - ram_block2a[454].portadatain[] = ( data_a[6..6]); - ram_block2a[455].portadatain[] = ( data_a[7..7]); - ram_block2a[456].portadatain[] = ( data_a[8..8]); - ram_block2a[457].portadatain[] = ( data_a[9..9]); - ram_block2a[458].portadatain[] = ( data_a[10..10]); - ram_block2a[459].portadatain[] = ( data_a[11..11]); - ram_block2a[460].portadatain[] = ( data_a[12..12]); - ram_block2a[461].portadatain[] = ( data_a[13..13]); - ram_block2a[462].portadatain[] = ( data_a[14..14]); - ram_block2a[463].portadatain[] = ( data_a[15..15]); - ram_block2a[464].portadatain[] = ( data_a[16..16]); - ram_block2a[465].portadatain[] = ( data_a[17..17]); - ram_block2a[466].portadatain[] = ( data_a[18..18]); - ram_block2a[467].portadatain[] = ( data_a[19..19]); - ram_block2a[468].portadatain[] = ( data_a[20..20]); - ram_block2a[469].portadatain[] = ( data_a[21..21]); - ram_block2a[470].portadatain[] = ( data_a[22..22]); - ram_block2a[471].portadatain[] = ( data_a[23..23]); - ram_block2a[472].portadatain[] = ( data_a[24..24]); - ram_block2a[473].portadatain[] = ( data_a[25..25]); - ram_block2a[474].portadatain[] = ( data_a[26..26]); - ram_block2a[475].portadatain[] = ( data_a[27..27]); - ram_block2a[476].portadatain[] = ( data_a[28..28]); - ram_block2a[477].portadatain[] = ( data_a[29..29]); - ram_block2a[478].portadatain[] = ( data_a[30..30]); - ram_block2a[479].portadatain[] = ( data_a[31..31]); - ram_block2a[480].portadatain[] = ( data_a[0..0]); - ram_block2a[481].portadatain[] = ( data_a[1..1]); - ram_block2a[482].portadatain[] = ( data_a[2..2]); - ram_block2a[483].portadatain[] = ( data_a[3..3]); - ram_block2a[484].portadatain[] = ( data_a[4..4]); - ram_block2a[485].portadatain[] = ( data_a[5..5]); - ram_block2a[486].portadatain[] = ( data_a[6..6]); - ram_block2a[487].portadatain[] = ( data_a[7..7]); - ram_block2a[488].portadatain[] = ( data_a[8..8]); - ram_block2a[489].portadatain[] = ( data_a[9..9]); - ram_block2a[490].portadatain[] = ( data_a[10..10]); - ram_block2a[491].portadatain[] = ( data_a[11..11]); - ram_block2a[492].portadatain[] = ( data_a[12..12]); - ram_block2a[493].portadatain[] = ( data_a[13..13]); - ram_block2a[494].portadatain[] = ( data_a[14..14]); - ram_block2a[495].portadatain[] = ( data_a[15..15]); - ram_block2a[496].portadatain[] = ( data_a[16..16]); - ram_block2a[497].portadatain[] = ( data_a[17..17]); - ram_block2a[498].portadatain[] = ( data_a[18..18]); - ram_block2a[499].portadatain[] = ( data_a[19..19]); - ram_block2a[500].portadatain[] = ( data_a[20..20]); - ram_block2a[501].portadatain[] = ( data_a[21..21]); - ram_block2a[502].portadatain[] = ( data_a[22..22]); - ram_block2a[503].portadatain[] = ( data_a[23..23]); - ram_block2a[504].portadatain[] = ( data_a[24..24]); - ram_block2a[505].portadatain[] = ( data_a[25..25]); - ram_block2a[506].portadatain[] = ( data_a[26..26]); - ram_block2a[507].portadatain[] = ( data_a[27..27]); - ram_block2a[508].portadatain[] = ( data_a[28..28]); - ram_block2a[509].portadatain[] = ( data_a[29..29]); - ram_block2a[510].portadatain[] = ( data_a[30..30]); - ram_block2a[511].portadatain[] = ( data_a[31..31]); - ram_block2a[511..0].portawe = ( decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], 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decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], 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decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0]); - ram_block2a[511..0].portbaddr[] = ( address_b_wire[10..0]); - ram_block2a[511..0].portbre = B"11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_sel[3..0] = address_b[14..11]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = mux4.result[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8u7u1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8u7u1.tdf deleted file mode 100644 index 73e69e7..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_8u7u1.tdf +++ /dev/null @@ -1,8569 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="BYPASS" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=32 NUMWORDS_B=32 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="CLOCK1" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=266 WIDTH_B=266 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=2 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=5 WIDTHAD_B=5 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 8512 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_8u7u1 -( - address_a[4..0] : input; - address_b[4..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[265..0] : input; - q_b[265..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 128, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 128, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 129, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 129, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 130, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 130, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 131, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 131, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 132, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 132, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 133, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 133, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 134, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 134, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 135, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 135, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 136, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 136, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 137, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 137, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 138, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 138, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 139, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 139, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 140, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 140, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 141, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 141, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 142, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 142, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 143, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 143, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 144, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 144, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 145, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 145, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 146, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 146, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 147, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 147, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 148, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 148, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 149, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 149, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 150, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 150, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 151, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 151, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 152, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 152, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 153, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 153, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 154, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 154, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 155, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 155, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 156, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 156, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 157, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 157, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 158, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 158, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 159, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 159, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 160, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 160, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 161, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 161, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 162, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 162, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 163, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 163, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 164, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 164, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 165, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 165, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 166, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 166, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 167, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 167, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 168, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 168, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 169, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 169, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 170, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 170, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 171, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 171, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 172, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 172, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 173, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 173, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 174, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 174, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 175, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 175, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 176, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 176, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 177, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 177, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 178, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 178, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 179, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 179, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 180, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 180, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 181, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 181, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 182, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 182, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 183, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 183, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 184, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 184, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 185, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 185, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 186, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 186, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 187, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 187, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 188, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 188, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 189, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 189, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 190, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 190, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 191, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 191, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 192, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 192, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 193, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 193, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 194, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 194, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 195, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 195, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 196, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 196, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 197, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 197, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 198, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 198, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 199, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 199, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 200, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 200, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 201, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 201, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 202, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 202, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 203, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 203, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 204, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 204, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 205, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 205, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 206, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 206, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 207, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 207, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 208, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 208, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 209, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 209, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 210, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 210, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 211, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 211, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 212, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 212, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 213, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 213, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 214, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 214, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 215, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 215, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 216, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 216, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 217, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 217, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 218, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 218, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 219, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 219, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 220, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 220, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 221, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 221, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 222, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 222, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 223, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 223, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 224, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 224, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 225, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 225, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 226, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 226, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 227, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 227, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 228, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 228, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 229, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 229, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 230, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 230, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 231, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 231, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 232, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 232, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 233, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 233, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 234, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 234, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 235, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 235, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 236, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 236, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 237, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 237, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 238, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 238, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 239, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 239, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a240 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 240, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 240, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a241 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 241, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 241, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a242 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 242, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 242, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a243 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 243, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 243, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a244 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 244, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 244, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a245 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 245, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 245, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a246 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 246, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 246, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a247 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 247, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 247, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a248 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 248, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 248, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a249 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 249, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 249, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a250 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 250, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 250, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a251 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 251, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 251, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a252 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 252, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 252, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a253 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 253, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 253, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a254 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 254, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 254, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a255 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 255, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 255, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a256 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 256, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 256, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a257 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 257, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 257, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a258 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 258, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 258, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a259 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 259, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 259, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a260 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 260, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 260, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a261 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 261, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 261, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a262 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 262, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 262, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a263 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 263, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 263, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a264 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 264, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 264, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a265 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CLK1_OUTPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 5, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 265, - PORT_A_LAST_ADDRESS = 31, - PORT_A_LOGICAL_RAM_DEPTH = 32, - PORT_A_LOGICAL_RAM_WIDTH = 266, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 5, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "clock1", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 265, - PORT_B_LAST_ADDRESS = 31, - PORT_B_LOGICAL_RAM_DEPTH = 32, - PORT_B_LOGICAL_RAM_WIDTH = 266, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[4..0] : WIRE; - address_b_wire[4..0] : WIRE; - q_b_wire[265..0] : WIRE; - -BEGIN - ram_block2a[265..0].clk0 = clock0; - ram_block2a[265..0].clk1 = clock1; - ram_block2a[265..0].ena1 = clocken1; - ram_block2a[265..0].portaaddr[] = ( address_a_wire[4..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[128].portadatain[] = ( data_a[128..128]); - ram_block2a[129].portadatain[] = ( data_a[129..129]); - ram_block2a[130].portadatain[] = ( data_a[130..130]); - ram_block2a[131].portadatain[] = ( data_a[131..131]); - ram_block2a[132].portadatain[] = ( data_a[132..132]); - ram_block2a[133].portadatain[] = ( data_a[133..133]); - ram_block2a[134].portadatain[] = ( data_a[134..134]); - ram_block2a[135].portadatain[] = ( data_a[135..135]); - ram_block2a[136].portadatain[] = ( data_a[136..136]); - ram_block2a[137].portadatain[] = ( data_a[137..137]); - ram_block2a[138].portadatain[] = ( data_a[138..138]); - ram_block2a[139].portadatain[] = ( data_a[139..139]); - ram_block2a[140].portadatain[] = ( data_a[140..140]); - ram_block2a[141].portadatain[] = ( data_a[141..141]); - ram_block2a[142].portadatain[] = ( data_a[142..142]); - ram_block2a[143].portadatain[] = ( data_a[143..143]); - ram_block2a[144].portadatain[] = ( data_a[144..144]); - ram_block2a[145].portadatain[] = ( data_a[145..145]); - ram_block2a[146].portadatain[] = ( data_a[146..146]); - ram_block2a[147].portadatain[] = ( data_a[147..147]); - ram_block2a[148].portadatain[] = ( data_a[148..148]); - ram_block2a[149].portadatain[] = ( data_a[149..149]); - ram_block2a[150].portadatain[] = ( data_a[150..150]); - ram_block2a[151].portadatain[] = ( data_a[151..151]); - ram_block2a[152].portadatain[] = ( data_a[152..152]); - ram_block2a[153].portadatain[] = ( data_a[153..153]); - ram_block2a[154].portadatain[] = ( data_a[154..154]); - ram_block2a[155].portadatain[] = ( data_a[155..155]); - ram_block2a[156].portadatain[] = ( data_a[156..156]); - ram_block2a[157].portadatain[] = ( data_a[157..157]); - ram_block2a[158].portadatain[] = ( data_a[158..158]); - ram_block2a[159].portadatain[] = ( data_a[159..159]); - ram_block2a[160].portadatain[] = ( data_a[160..160]); - ram_block2a[161].portadatain[] = ( data_a[161..161]); - ram_block2a[162].portadatain[] = ( data_a[162..162]); - ram_block2a[163].portadatain[] = ( data_a[163..163]); - ram_block2a[164].portadatain[] = ( data_a[164..164]); - ram_block2a[165].portadatain[] = ( data_a[165..165]); - ram_block2a[166].portadatain[] = ( data_a[166..166]); - ram_block2a[167].portadatain[] = ( data_a[167..167]); - ram_block2a[168].portadatain[] = ( data_a[168..168]); - ram_block2a[169].portadatain[] = ( data_a[169..169]); - ram_block2a[170].portadatain[] = ( data_a[170..170]); - ram_block2a[171].portadatain[] = ( data_a[171..171]); - ram_block2a[172].portadatain[] = ( data_a[172..172]); - ram_block2a[173].portadatain[] = ( data_a[173..173]); - ram_block2a[174].portadatain[] = ( data_a[174..174]); - ram_block2a[175].portadatain[] = ( data_a[175..175]); - ram_block2a[176].portadatain[] = ( data_a[176..176]); - ram_block2a[177].portadatain[] = ( data_a[177..177]); - ram_block2a[178].portadatain[] = ( data_a[178..178]); - ram_block2a[179].portadatain[] = ( data_a[179..179]); - ram_block2a[180].portadatain[] = ( data_a[180..180]); - ram_block2a[181].portadatain[] = ( data_a[181..181]); - ram_block2a[182].portadatain[] = ( data_a[182..182]); - ram_block2a[183].portadatain[] = ( data_a[183..183]); - ram_block2a[184].portadatain[] = ( data_a[184..184]); - ram_block2a[185].portadatain[] = ( data_a[185..185]); - ram_block2a[186].portadatain[] = ( data_a[186..186]); - ram_block2a[187].portadatain[] = ( data_a[187..187]); - ram_block2a[188].portadatain[] = ( data_a[188..188]); - ram_block2a[189].portadatain[] = ( data_a[189..189]); - ram_block2a[190].portadatain[] = ( data_a[190..190]); - ram_block2a[191].portadatain[] = ( data_a[191..191]); - ram_block2a[192].portadatain[] = ( data_a[192..192]); - ram_block2a[193].portadatain[] = ( data_a[193..193]); - ram_block2a[194].portadatain[] = ( data_a[194..194]); - ram_block2a[195].portadatain[] = ( data_a[195..195]); - ram_block2a[196].portadatain[] = ( data_a[196..196]); - ram_block2a[197].portadatain[] = ( data_a[197..197]); - ram_block2a[198].portadatain[] = ( data_a[198..198]); - ram_block2a[199].portadatain[] = ( data_a[199..199]); - ram_block2a[200].portadatain[] = ( data_a[200..200]); - ram_block2a[201].portadatain[] = ( data_a[201..201]); - ram_block2a[202].portadatain[] = ( data_a[202..202]); - ram_block2a[203].portadatain[] = ( data_a[203..203]); - ram_block2a[204].portadatain[] = ( data_a[204..204]); - ram_block2a[205].portadatain[] = ( data_a[205..205]); - ram_block2a[206].portadatain[] = ( data_a[206..206]); - ram_block2a[207].portadatain[] = ( data_a[207..207]); - ram_block2a[208].portadatain[] = ( data_a[208..208]); - ram_block2a[209].portadatain[] = ( data_a[209..209]); - ram_block2a[210].portadatain[] = ( data_a[210..210]); - ram_block2a[211].portadatain[] = ( data_a[211..211]); - ram_block2a[212].portadatain[] = ( data_a[212..212]); - ram_block2a[213].portadatain[] = ( data_a[213..213]); - ram_block2a[214].portadatain[] = ( data_a[214..214]); - ram_block2a[215].portadatain[] = ( data_a[215..215]); - ram_block2a[216].portadatain[] = ( data_a[216..216]); - ram_block2a[217].portadatain[] = ( data_a[217..217]); - ram_block2a[218].portadatain[] = ( data_a[218..218]); - ram_block2a[219].portadatain[] = ( data_a[219..219]); - ram_block2a[220].portadatain[] = ( data_a[220..220]); - ram_block2a[221].portadatain[] = ( data_a[221..221]); - ram_block2a[222].portadatain[] = ( data_a[222..222]); - ram_block2a[223].portadatain[] = ( data_a[223..223]); - ram_block2a[224].portadatain[] = ( data_a[224..224]); - ram_block2a[225].portadatain[] = ( data_a[225..225]); - ram_block2a[226].portadatain[] = ( data_a[226..226]); - ram_block2a[227].portadatain[] = ( data_a[227..227]); - ram_block2a[228].portadatain[] = ( data_a[228..228]); - ram_block2a[229].portadatain[] = ( data_a[229..229]); - ram_block2a[230].portadatain[] = ( data_a[230..230]); - ram_block2a[231].portadatain[] = ( data_a[231..231]); - ram_block2a[232].portadatain[] = ( data_a[232..232]); - ram_block2a[233].portadatain[] = ( data_a[233..233]); - ram_block2a[234].portadatain[] = ( data_a[234..234]); - ram_block2a[235].portadatain[] = ( data_a[235..235]); - ram_block2a[236].portadatain[] = ( data_a[236..236]); - ram_block2a[237].portadatain[] = ( data_a[237..237]); - ram_block2a[238].portadatain[] = ( data_a[238..238]); - ram_block2a[239].portadatain[] = ( data_a[239..239]); - ram_block2a[240].portadatain[] = ( data_a[240..240]); - ram_block2a[241].portadatain[] = ( data_a[241..241]); - ram_block2a[242].portadatain[] = ( data_a[242..242]); - ram_block2a[243].portadatain[] = ( data_a[243..243]); - ram_block2a[244].portadatain[] = ( data_a[244..244]); - ram_block2a[245].portadatain[] = ( data_a[245..245]); - ram_block2a[246].portadatain[] = ( data_a[246..246]); - ram_block2a[247].portadatain[] = ( data_a[247..247]); - ram_block2a[248].portadatain[] = ( data_a[248..248]); - ram_block2a[249].portadatain[] = ( data_a[249..249]); - ram_block2a[250].portadatain[] = ( data_a[250..250]); - ram_block2a[251].portadatain[] = ( data_a[251..251]); - ram_block2a[252].portadatain[] = ( data_a[252..252]); - ram_block2a[253].portadatain[] = ( data_a[253..253]); - ram_block2a[254].portadatain[] = ( data_a[254..254]); - ram_block2a[255].portadatain[] = ( data_a[255..255]); - ram_block2a[256].portadatain[] = ( data_a[256..256]); - ram_block2a[257].portadatain[] = ( data_a[257..257]); - ram_block2a[258].portadatain[] = ( data_a[258..258]); - ram_block2a[259].portadatain[] = ( data_a[259..259]); - ram_block2a[260].portadatain[] = ( data_a[260..260]); - ram_block2a[261].portadatain[] = ( data_a[261..261]); - ram_block2a[262].portadatain[] = ( data_a[262..262]); - ram_block2a[263].portadatain[] = ( data_a[263..263]); - ram_block2a[264].portadatain[] = ( data_a[264..264]); - ram_block2a[265].portadatain[] = ( data_a[265..265]); - ram_block2a[265..0].portawe = wren_a; - ram_block2a[265..0].portbaddr[] = ( address_b_wire[4..0]); - ram_block2a[265..0].portbre = B"11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[265..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_anr2.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_anr2.tdf deleted file mode 100644 index 847a830..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_anr2.tdf +++ /dev/null @@ -1,1047 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=1024 NUMWORDS_B=1024 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="M20K" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=32 WIDTH_B=32 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=10 WIDTHAD_B=10 WREN_POWER_OPTIMIZATION="OFF" aclr0 address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = M20K 2 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_anr2 -( - aclr0 : input; - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram1_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - address_a_wire[9..0] : WIRE; - address_b_wire[9..0] : WIRE; - q_b_wire[31..0] : WIRE; - -BEGIN - ram_block2a[31..0].aclr = aclr0; - ram_block2a[31..0].clk0 = clock0; - ram_block2a[31..0].portaaddr[] = ( address_a_wire[9..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[31..0].portawe = wren_a; - ram_block2a[31..0].portbaddr[] = ( address_b_wire[9..0]); - ram_block2a[31..0].portbre = B"11111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[31..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_bnt71.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_bnt71.tdf deleted file mode 100644 index cbc0c9c..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_bnt71.tdf +++ /dev/null @@ -1,298 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=2048 NUMWORDS_B=0 OPERATION_MODE="ROM" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=8 WIDTH_B=1 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=11 WIDTHAD_B=1 WREN_POWER_OPTIMIZATION="OFF" address_a clock0 q_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 16384 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_bnt71 -( - address_a[10..0] : input; - clock0 : input; - q_a[7..0] : output; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram2_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 8, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 8, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[10..0] : WIRE; - data_a[7..0] : NODE; - wren_a : NODE; - -BEGIN - ram_block2a[7..0].clk0 = clock0; - ram_block2a[7..0].portaaddr[] = ( address_a_wire[10..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[7..0].portawe = wren_a; - ram_block2a[7..0].portbaddr[] = ( address_a_wire[10..0]); - ram_block2a[7..0].portbre = B"11111111"; - address_a_wire[] = address_a[]; - data_a[] = VCC; - q_a[] = ( ram_block2a[7..0].portbdataout[0..0]); - wren_a = GND; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_d2gq.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_d2gq.tdf deleted file mode 100644 index ef20fad..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_d2gq.tdf +++ /dev/null @@ -1,4294 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=2048 NUMWORDS_B=0 OPERATION_MODE="ROM" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="SCLEAR" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=128 WIDTH_B=1 WIDTH_BYTEENA_A=16 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=11 WIDTHAD_B=1 WREN_POWER_OPTIMIZATION="OFF" address_a byteena_a clock0 q_a rden_a sclr CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 262144 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_d2gq -( - address_a[10..0] : input; - byteena_a[15..0] : input; - clock0 : input; - q_a[127..0] : output; - rden_a : input; - sclr : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, - PORT_A_BYTE_SIZE = 1, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 128, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 128, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[10..0] : WIRE; - data_a[127..0] : NODE; - wren_a : NODE; - -BEGIN - ram_block2a[127..0].clk0 = clock0; - ram_block2a[127..0].portaaddr[] = ( address_a_wire[10..0]); - ram_block2a[7..0].portabyteenamasks[] = ( byteena_a[0..0]); - ram_block2a[15..8].portabyteenamasks[] = ( byteena_a[1..1]); - ram_block2a[23..16].portabyteenamasks[] = ( byteena_a[2..2]); - ram_block2a[31..24].portabyteenamasks[] = ( byteena_a[3..3]); - ram_block2a[39..32].portabyteenamasks[] = ( byteena_a[4..4]); - ram_block2a[47..40].portabyteenamasks[] = ( byteena_a[5..5]); - ram_block2a[55..48].portabyteenamasks[] = ( byteena_a[6..6]); - ram_block2a[63..56].portabyteenamasks[] = ( byteena_a[7..7]); - ram_block2a[71..64].portabyteenamasks[] = ( byteena_a[8..8]); - ram_block2a[79..72].portabyteenamasks[] = ( byteena_a[9..9]); - ram_block2a[87..80].portabyteenamasks[] = ( byteena_a[10..10]); - ram_block2a[95..88].portabyteenamasks[] = ( byteena_a[11..11]); - ram_block2a[103..96].portabyteenamasks[] = ( byteena_a[12..12]); - ram_block2a[111..104].portabyteenamasks[] = ( byteena_a[13..13]); - ram_block2a[119..112].portabyteenamasks[] = ( byteena_a[14..14]); - ram_block2a[127..120].portabyteenamasks[] = ( byteena_a[15..15]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[127..0].portawe = wren_a; - ram_block2a[127..0].portbaddr[] = ( address_a_wire[10..0]); - ram_block2a[127..0].portbre = rden_a; - ram_block2a[127..0].sclr = sclr; - address_a_wire[] = address_a[]; - data_a[] = VCC; - q_a[] = ( ram_block2a[127..0].portbdataout[0..0]); - wren_a = GND; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_fihn1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_fihn1.tdf deleted file mode 100644 index e93347e..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_fihn1.tdf +++ /dev/null @@ -1,1045 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=1024 NUMWORDS_B=0 OPERATION_MODE="ROM" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="SCLEAR" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=32 WIDTH_B=1 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=10 WIDTHAD_B=1 WREN_POWER_OPTIMIZATION="OFF" address_a clock0 q_a rden_a sclr CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 32768 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_fihn1 -( - address_a[9..0] : input; - clock0 : input; - q_a[31..0] : output; - rden_a : input; - sclr : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram5_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "sclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[9..0] : WIRE; - data_a[31..0] : NODE; - wren_a : NODE; - -BEGIN - ram_block2a[31..0].clk0 = clock0; - ram_block2a[31..0].portaaddr[] = ( address_a_wire[9..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[31..0].portawe = wren_a; - ram_block2a[31..0].portbaddr[] = ( address_a_wire[9..0]); - ram_block2a[31..0].portbre = rden_a; - ram_block2a[31..0].sclr = sclr; - address_a_wire[] = address_a[]; - data_a[] = VCC; - q_a[] = ( ram_block2a[31..0].portbdataout[0..0]); - wren_a = GND; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_gsmn.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_gsmn.tdf deleted file mode 100644 index aa1d6ee..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_gsmn.tdf +++ /dev/null @@ -1,30590 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=8 NUMWORDS_B=8 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="M20K" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=1053 WIDTH_B=1053 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=3 WIDTHAD_B=3 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = M20K 27 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_gsmn -( - address_a[2..0] : input; - address_b[2..0] : input; - clock0 : input; - data_a[1052..0] : input; - q_b[1052..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 128, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 128, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 129, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 129, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 130, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 130, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 131, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 131, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 132, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 132, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 133, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 133, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 134, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 134, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 135, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 135, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 136, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 136, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 137, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 137, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 138, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 138, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 139, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 139, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 140, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 140, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 141, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 141, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 142, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 142, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 143, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 143, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 144, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 144, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 145, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 145, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 146, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 146, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 147, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 147, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 148, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 148, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 149, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 149, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 150, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 150, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 151, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 151, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 152, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 152, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 153, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 153, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 154, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 154, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 155, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 155, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 156, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 156, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 157, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 157, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 158, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 158, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 159, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 159, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 160, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 160, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 161, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 161, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 162, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 162, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 163, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 163, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 164, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 164, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 165, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 165, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 166, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 166, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 167, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 167, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 168, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 168, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 169, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 169, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 170, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 170, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 171, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 171, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 172, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 172, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 173, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 173, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 174, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 174, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 175, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 175, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 176, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 176, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 177, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 177, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 178, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 178, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 179, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 179, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 180, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 180, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 181, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 181, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 182, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 182, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 183, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 183, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 184, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 184, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 185, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 185, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 186, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 186, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 187, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 187, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 188, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 188, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 189, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 189, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 190, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 190, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 191, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 191, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 192, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 192, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 193, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 193, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 194, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 194, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 195, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 195, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 196, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 196, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 197, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 197, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 198, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 198, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 199, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 199, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 200, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 200, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 201, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 201, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 202, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 202, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 203, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 203, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 204, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 204, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 205, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 205, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 206, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 206, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 207, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 207, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 208, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 208, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 209, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 209, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 210, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 210, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 211, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 211, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 212, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 212, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 213, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 213, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 214, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 214, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 215, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 215, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 216, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 216, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 217, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 217, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 218, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 218, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 219, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 219, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 220, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 220, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 221, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 221, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 222, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 222, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 223, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 223, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 224, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 224, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 225, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 225, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 226, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 226, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 227, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 227, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 228, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 228, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 229, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 229, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 230, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 230, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 231, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 231, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 232, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 232, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 233, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 233, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 234, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 234, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 235, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 235, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 236, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 236, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 237, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 237, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 238, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 238, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 239, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 239, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a240 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 240, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 240, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a241 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 241, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 241, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a242 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 242, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 242, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a243 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 243, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 243, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a244 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 244, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 244, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a245 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 245, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 245, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a246 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 246, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 246, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a247 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 247, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 247, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a248 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 248, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 248, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a249 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 249, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 249, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a250 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 250, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 250, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a251 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 251, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 251, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a252 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 252, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 252, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a253 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 253, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 253, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a254 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 254, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 254, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a255 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 255, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 255, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a256 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 256, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 256, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a257 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 257, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 257, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a258 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 258, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 258, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a259 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 259, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 259, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a260 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 260, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 260, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a261 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 261, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 261, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a262 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 262, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 262, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a263 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 263, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 263, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a264 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 264, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 264, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a265 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 265, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 265, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a266 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 266, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 266, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a267 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 267, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 267, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a268 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 268, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 268, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a269 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 269, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 269, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a270 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 270, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 270, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a271 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 271, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 271, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a272 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 272, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 272, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a273 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 273, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 273, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a274 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 274, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 274, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a275 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 275, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 275, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a276 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 276, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 276, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a277 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 277, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 277, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a278 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 278, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 278, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a279 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 279, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 279, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a280 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 280, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 280, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a281 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 281, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 281, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a282 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 282, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 282, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a283 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 283, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 283, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a284 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 284, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 284, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a285 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 285, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 285, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a286 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 286, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 286, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a287 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 287, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 287, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a288 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 288, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 288, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a289 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 289, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 289, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a290 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 290, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 290, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a291 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 291, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 291, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a292 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 292, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 292, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a293 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 293, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 293, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a294 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 294, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 294, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a295 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 295, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 295, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a296 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 296, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 296, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a297 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 297, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 297, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a298 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 298, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 298, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a299 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 299, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 299, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a300 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 300, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 300, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a301 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 301, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 301, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a302 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 302, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 302, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a303 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 303, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 303, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a304 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 304, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 304, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a305 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 305, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 305, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a306 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 306, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 306, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a307 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 307, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 307, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a308 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 308, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 308, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a309 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 309, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 309, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a310 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 310, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 310, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a311 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 311, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 311, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a312 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 312, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 312, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a313 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 313, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 313, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a314 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 314, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 314, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a315 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 315, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 315, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a316 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 316, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 316, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a317 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 317, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 317, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a318 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 318, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 318, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a319 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 319, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 319, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a320 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 320, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 320, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a321 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 321, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 321, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a322 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 322, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 322, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a323 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 323, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 323, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a324 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 324, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 324, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a325 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 325, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 325, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a326 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 326, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 326, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a327 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 327, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 327, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a328 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 328, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 328, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a329 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 329, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 329, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a330 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 330, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 330, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a331 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 331, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 331, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a332 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 332, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 332, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a333 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 333, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 333, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a334 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 334, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 334, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a335 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 335, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 335, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a336 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 336, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 336, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a337 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 337, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 337, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a338 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 338, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 338, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a339 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 339, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 339, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a340 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 340, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 340, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a341 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 341, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 341, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a342 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 342, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 342, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a343 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 343, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 343, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a344 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 344, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 344, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a345 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 345, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 345, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a346 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 346, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 346, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a347 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 347, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 347, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a348 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 348, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 348, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a349 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 349, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 349, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a350 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 350, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 350, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a351 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 351, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 351, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a352 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 352, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 352, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a353 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 353, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 353, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a354 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 354, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 354, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a355 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 355, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 355, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a356 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 356, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 356, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a357 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 357, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 357, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a358 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 358, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 358, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a359 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 359, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 359, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a360 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 360, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 360, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a361 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 361, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 361, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a362 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 362, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 362, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a363 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 363, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 363, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a364 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 364, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 364, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a365 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 365, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 365, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a366 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 366, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 366, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a367 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 367, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 367, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a368 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 368, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 368, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a369 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 369, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 369, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a370 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 370, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 370, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a371 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 371, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 371, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a372 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 372, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 372, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a373 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 373, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 373, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a374 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 374, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 374, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a375 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 375, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 375, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a376 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 376, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 376, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a377 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 377, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 377, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a378 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 378, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 378, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a379 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 379, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 379, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a380 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 380, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 380, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a381 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 381, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 381, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a382 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 382, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 382, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a383 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 383, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 383, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a384 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 384, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 384, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a385 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 385, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 385, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a386 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 386, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 386, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a387 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 387, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 387, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a388 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 388, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 388, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a389 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 389, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 389, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a390 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 390, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 390, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a391 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 391, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 391, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a392 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 392, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 392, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a393 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 393, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 393, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a394 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 394, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 394, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a395 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 395, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 395, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a396 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 396, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 396, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a397 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 397, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 397, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a398 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 398, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 398, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a399 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 399, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 399, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a400 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 400, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 400, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a401 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 401, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 401, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a402 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 402, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 402, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a403 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 403, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 403, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a404 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 404, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 404, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a405 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 405, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 405, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a406 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 406, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 406, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a407 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 407, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 407, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a408 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 408, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 408, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a409 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 409, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 409, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a410 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 410, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 410, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a411 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 411, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 411, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a412 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 412, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 412, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a413 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 413, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 413, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a414 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 414, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 414, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a415 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 415, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 415, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a416 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 416, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 416, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a417 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 417, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 417, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a418 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 418, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 418, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a419 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 419, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 419, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a420 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 420, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 420, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a421 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 421, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 421, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a422 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 422, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 422, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a423 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 423, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 423, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a424 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 424, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 424, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a425 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 425, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 425, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a426 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 426, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 426, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a427 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 427, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 427, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a428 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 428, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 428, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a429 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 429, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 429, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a430 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 430, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 430, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a431 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 431, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 431, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a432 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 432, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 432, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a433 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 433, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 433, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a434 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 434, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 434, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a435 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 435, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 435, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a436 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 436, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 436, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a437 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 437, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 437, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a438 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 438, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 438, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a439 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 439, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 439, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a440 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 440, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 440, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a441 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 441, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 441, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a442 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 442, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 442, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a443 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 443, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 443, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a444 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 444, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 444, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a445 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 445, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 445, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a446 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 446, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 446, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a447 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 447, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 447, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a448 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 448, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 448, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a449 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 449, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 449, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a450 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 450, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 450, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a451 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 451, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 451, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a452 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 452, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 452, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a453 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 453, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 453, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a454 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 454, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 454, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a455 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 455, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 455, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a456 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 456, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 456, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a457 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 457, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 457, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a458 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 458, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 458, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a459 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 459, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 459, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a460 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 460, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 460, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a461 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 461, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 461, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a462 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 462, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 462, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a463 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 463, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 463, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a464 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 464, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 464, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a465 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 465, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 465, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a466 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 466, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 466, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a467 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 467, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 467, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a468 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 468, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 468, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a469 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 469, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 469, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a470 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 470, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 470, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a471 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 471, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 471, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a472 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 472, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 472, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a473 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 473, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 473, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a474 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 474, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 474, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a475 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 475, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 475, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a476 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 476, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 476, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a477 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 477, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 477, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a478 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 478, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 478, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a479 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 479, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 479, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a480 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 480, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 480, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a481 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 481, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 481, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a482 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 482, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 482, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a483 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 483, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 483, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a484 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 484, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 484, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a485 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 485, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 485, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a486 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 486, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 486, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a487 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 487, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 487, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a488 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 488, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 488, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a489 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 489, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 489, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a490 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 490, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 490, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a491 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 491, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 491, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a492 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 492, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 492, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a493 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 493, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 493, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a494 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 494, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 494, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a495 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 495, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 495, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a496 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 496, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 496, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a497 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 497, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 497, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a498 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 498, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 498, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a499 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 499, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 499, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a500 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 500, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 500, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a501 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 501, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 501, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a502 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 502, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 502, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a503 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 503, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 503, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a504 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 504, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 504, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a505 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 505, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 505, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a506 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 506, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 506, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a507 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 507, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 507, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a508 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 508, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 508, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a509 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 509, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 509, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a510 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 510, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 510, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a511 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 511, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 511, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a512 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 512, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 512, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a513 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 513, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 513, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a514 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 514, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 514, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a515 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 515, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 515, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a516 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 516, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 516, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a517 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 517, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 517, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a518 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 518, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 518, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a519 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 519, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 519, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a520 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 520, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 520, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a521 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 521, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 521, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a522 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 522, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 522, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a523 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 523, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 523, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a524 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 524, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 524, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a525 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 525, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 525, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a526 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 526, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 526, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a527 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 527, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 527, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a528 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 528, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 528, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a529 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 529, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 529, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a530 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 530, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 530, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a531 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 531, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 531, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a532 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 532, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 532, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a533 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 533, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 533, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a534 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 534, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 534, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a535 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 535, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 535, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a536 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 536, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 536, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a537 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 537, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 537, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a538 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 538, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 538, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a539 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 539, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 539, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a540 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 540, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 540, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a541 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 541, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 541, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a542 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 542, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 542, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a543 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 543, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 543, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a544 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 544, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 544, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a545 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 545, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 545, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a546 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 546, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 546, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a547 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 547, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 547, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a548 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 548, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 548, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a549 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 549, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 549, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a550 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 550, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 550, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a551 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 551, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 551, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a552 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 552, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 552, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a553 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 553, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 553, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a554 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 554, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 554, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a555 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 555, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 555, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a556 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 556, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 556, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a557 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 557, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 557, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a558 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 558, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 558, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a559 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 559, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 559, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a560 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 560, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 560, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a561 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 561, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 561, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a562 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 562, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 562, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a563 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 563, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 563, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a564 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 564, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 564, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a565 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 565, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 565, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a566 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 566, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 566, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a567 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 567, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 567, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a568 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 568, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 568, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a569 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 569, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 569, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a570 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 570, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 570, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a571 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 571, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 571, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a572 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 572, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 572, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a573 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 573, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 573, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a574 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 574, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 574, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a575 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 575, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 575, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a576 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 576, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 576, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a577 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 577, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 577, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a578 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 578, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 578, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a579 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 579, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 579, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a580 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 580, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 580, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a581 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 581, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 581, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a582 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 582, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 582, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a583 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 583, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 583, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a584 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 584, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 584, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a585 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 585, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 585, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a586 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 586, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 586, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a587 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 587, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 587, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a588 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 588, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 588, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a589 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 589, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 589, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a590 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 590, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 590, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a591 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 591, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 591, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a592 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 592, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 592, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a593 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 593, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 593, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a594 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 594, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 594, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a595 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 595, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 595, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a596 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 596, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 596, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a597 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 597, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 597, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a598 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 598, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 598, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a599 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 599, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 599, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a600 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 600, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 600, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a601 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 601, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 601, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a602 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 602, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 602, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a603 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 603, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 603, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a604 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 604, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 604, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a605 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 605, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 605, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a606 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 606, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 606, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a607 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 607, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 607, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a608 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 608, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 608, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a609 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 609, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 609, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a610 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 610, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 610, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a611 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 611, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 611, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a612 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 612, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 612, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a613 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 613, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 613, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a614 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 614, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 614, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a615 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 615, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 615, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a616 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 616, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 616, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a617 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 617, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 617, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a618 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 618, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 618, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a619 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 619, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 619, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a620 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 620, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 620, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a621 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 621, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 621, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a622 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 622, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 622, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a623 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 623, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 623, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a624 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 624, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 624, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a625 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 625, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 625, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a626 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 626, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 626, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a627 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 627, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 627, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a628 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 628, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 628, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a629 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 629, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 629, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a630 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 630, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 630, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a631 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 631, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 631, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a632 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 632, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 632, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a633 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 633, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 633, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a634 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 634, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 634, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a635 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 635, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 635, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a636 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 636, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 636, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a637 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 637, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 637, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a638 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 638, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 638, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a639 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 639, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 639, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a640 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 640, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 640, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a641 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 641, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 641, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a642 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 642, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 642, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a643 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 643, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 643, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a644 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 644, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 644, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a645 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 645, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 645, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a646 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 646, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 646, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a647 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 647, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 647, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a648 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 648, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 648, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a649 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 649, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 649, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a650 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 650, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 650, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a651 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 651, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 651, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a652 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 652, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 652, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a653 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 653, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 653, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a654 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 654, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 654, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a655 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 655, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 655, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a656 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 656, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 656, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a657 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 657, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 657, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a658 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 658, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 658, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a659 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 659, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 659, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a660 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 660, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 660, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a661 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 661, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 661, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a662 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 662, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 662, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a663 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 663, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 663, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a664 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 664, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 664, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a665 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 665, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 665, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a666 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 666, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 666, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a667 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 667, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 667, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a668 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 668, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 668, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a669 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 669, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 669, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a670 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 670, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 670, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a671 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 671, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 671, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a672 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 672, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 672, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a673 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 673, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 673, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a674 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 674, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 674, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a675 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 675, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 675, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a676 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 676, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 676, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a677 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 677, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 677, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a678 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 678, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 678, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a679 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 679, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 679, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a680 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 680, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 680, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a681 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 681, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 681, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a682 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 682, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 682, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a683 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 683, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 683, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a684 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 684, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 684, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a685 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 685, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 685, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a686 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 686, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 686, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a687 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 687, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 687, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a688 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 688, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 688, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a689 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 689, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 689, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a690 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 690, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 690, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a691 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 691, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 691, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a692 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 692, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 692, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a693 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 693, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 693, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a694 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 694, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 694, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a695 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 695, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 695, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a696 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 696, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 696, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a697 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 697, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 697, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a698 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 698, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 698, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a699 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 699, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 699, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a700 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 700, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 700, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a701 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 701, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 701, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a702 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 702, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 702, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a703 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 703, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 703, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a704 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 704, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 704, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a705 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 705, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 705, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a706 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 706, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 706, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a707 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 707, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 707, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a708 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 708, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 708, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a709 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 709, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 709, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a710 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 710, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 710, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a711 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 711, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 711, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a712 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 712, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 712, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a713 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 713, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 713, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a714 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 714, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 714, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a715 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 715, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 715, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a716 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 716, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 716, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a717 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 717, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 717, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a718 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 718, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 718, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a719 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 719, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 719, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a720 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 720, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 720, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a721 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 721, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 721, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a722 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 722, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 722, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a723 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 723, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 723, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a724 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 724, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 724, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a725 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 725, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 725, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a726 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 726, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 726, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a727 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 727, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 727, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a728 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 728, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 728, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a729 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 729, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 729, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a730 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 730, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 730, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a731 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 731, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 731, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a732 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 732, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 732, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a733 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 733, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 733, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a734 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 734, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 734, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a735 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 735, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 735, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a736 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 736, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 736, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a737 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 737, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 737, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a738 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 738, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 738, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a739 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 739, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 739, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a740 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 740, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 740, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a741 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 741, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 741, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a742 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 742, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 742, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a743 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 743, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 743, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a744 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 744, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 744, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a745 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 745, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 745, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a746 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 746, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 746, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a747 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 747, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 747, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a748 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 748, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 748, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a749 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 749, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 749, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a750 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 750, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 750, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a751 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 751, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 751, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a752 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 752, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 752, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a753 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 753, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 753, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a754 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 754, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 754, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a755 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 755, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 755, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a756 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 756, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 756, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a757 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 757, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 757, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a758 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 758, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 758, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a759 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 759, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 759, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a760 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 760, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 760, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a761 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 761, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 761, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a762 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 762, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 762, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a763 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 763, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 763, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a764 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 764, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 764, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a765 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 765, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 765, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a766 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 766, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 766, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a767 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 767, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 767, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a768 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 768, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 768, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a769 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 769, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 769, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a770 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 770, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 770, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a771 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 771, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 771, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a772 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 772, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 772, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a773 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 773, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 773, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a774 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 774, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 774, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a775 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 775, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 775, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a776 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 776, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 776, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a777 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 777, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 777, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a778 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 778, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 778, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a779 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 779, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 779, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a780 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 780, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 780, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a781 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 781, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 781, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a782 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 782, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 782, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a783 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 783, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 783, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a784 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 784, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 784, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a785 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 785, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 785, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a786 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 786, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 786, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a787 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 787, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 787, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a788 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 788, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 788, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a789 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 789, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 789, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a790 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 790, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 790, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a791 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 791, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 791, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a792 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 792, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 792, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a793 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 793, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 793, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a794 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 794, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 794, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a795 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 795, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 795, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a796 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 796, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 796, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a797 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 797, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 797, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a798 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 798, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 798, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a799 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 799, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 799, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a800 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 800, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 800, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a801 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 801, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 801, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a802 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 802, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 802, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a803 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 803, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 803, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a804 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 804, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 804, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a805 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 805, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 805, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a806 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 806, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 806, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a807 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 807, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 807, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a808 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 808, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 808, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a809 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 809, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 809, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a810 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 810, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 810, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a811 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 811, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 811, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a812 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 812, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 812, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a813 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 813, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 813, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a814 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 814, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 814, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a815 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 815, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 815, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a816 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 816, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 816, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a817 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 817, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 817, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a818 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 818, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 818, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a819 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 819, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 819, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a820 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 820, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 820, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a821 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 821, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 821, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a822 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 822, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 822, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a823 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 823, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 823, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a824 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 824, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 824, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a825 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 825, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 825, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a826 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 826, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 826, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a827 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 827, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 827, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a828 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 828, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 828, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a829 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 829, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 829, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a830 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 830, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 830, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a831 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 831, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 831, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a832 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 832, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 832, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a833 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 833, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 833, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a834 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 834, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 834, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a835 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 835, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 835, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a836 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 836, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 836, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a837 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 837, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 837, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a838 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 838, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 838, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a839 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 839, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 839, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a840 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 840, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 840, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a841 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 841, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 841, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a842 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 842, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 842, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a843 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 843, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 843, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a844 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 844, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 844, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a845 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 845, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 845, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a846 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 846, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 846, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a847 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 847, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 847, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a848 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 848, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 848, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a849 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 849, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 849, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a850 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 850, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 850, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a851 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 851, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 851, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a852 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 852, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 852, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a853 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 853, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 853, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a854 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 854, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 854, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a855 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 855, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 855, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a856 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 856, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 856, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a857 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 857, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 857, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a858 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 858, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 858, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a859 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 859, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 859, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a860 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 860, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 860, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a861 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 861, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 861, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a862 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 862, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 862, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a863 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 863, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 863, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a864 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 864, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 864, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a865 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 865, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 865, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a866 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 866, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 866, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a867 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 867, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 867, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a868 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 868, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 868, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a869 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 869, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 869, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a870 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 870, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 870, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a871 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 871, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 871, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a872 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 872, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 872, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a873 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 873, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 873, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a874 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 874, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 874, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a875 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 875, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 875, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a876 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 876, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 876, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a877 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 877, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 877, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a878 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 878, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 878, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a879 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 879, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 879, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a880 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 880, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 880, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a881 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 881, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 881, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a882 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 882, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 882, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a883 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 883, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 883, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a884 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 884, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 884, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a885 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 885, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 885, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a886 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 886, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 886, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a887 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 887, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 887, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a888 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 888, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 888, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a889 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 889, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 889, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a890 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 890, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 890, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a891 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 891, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 891, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a892 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 892, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 892, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a893 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 893, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 893, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a894 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 894, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 894, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a895 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 895, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 895, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a896 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 896, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 896, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a897 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 897, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 897, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a898 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 898, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 898, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a899 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 899, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 899, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a900 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 900, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 900, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a901 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 901, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 901, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a902 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 902, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 902, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a903 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 903, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 903, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a904 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 904, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 904, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a905 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 905, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 905, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a906 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 906, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 906, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a907 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 907, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 907, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a908 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 908, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 908, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a909 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 909, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 909, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a910 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 910, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 910, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a911 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 911, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 911, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a912 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 912, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 912, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a913 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 913, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 913, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a914 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 914, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 914, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a915 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 915, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 915, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a916 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 916, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 916, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a917 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 917, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 917, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a918 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 918, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 918, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a919 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 919, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 919, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a920 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 920, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 920, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a921 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 921, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 921, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a922 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 922, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 922, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a923 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 923, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 923, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a924 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 924, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 924, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a925 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 925, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 925, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a926 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 926, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 926, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a927 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 927, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 927, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a928 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 928, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 928, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a929 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 929, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 929, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a930 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 930, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 930, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a931 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 931, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 931, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a932 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 932, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 932, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a933 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 933, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 933, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a934 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 934, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 934, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a935 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 935, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 935, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a936 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 936, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 936, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a937 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 937, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 937, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a938 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 938, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 938, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a939 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 939, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 939, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a940 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 940, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 940, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a941 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 941, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 941, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a942 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 942, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 942, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a943 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 943, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 943, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a944 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 944, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 944, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a945 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 945, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 945, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a946 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 946, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 946, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a947 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 947, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 947, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a948 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 948, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 948, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a949 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 949, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 949, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a950 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 950, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 950, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a951 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 951, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 951, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a952 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 952, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 952, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a953 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 953, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 953, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a954 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 954, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 954, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a955 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 955, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 955, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a956 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 956, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 956, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a957 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 957, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 957, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a958 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 958, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 958, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a959 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 959, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 959, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a960 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 960, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 960, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a961 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 961, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 961, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a962 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 962, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 962, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a963 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 963, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 963, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a964 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 964, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 964, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a965 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 965, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 965, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a966 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 966, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 966, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a967 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 967, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 967, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a968 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 968, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 968, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a969 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 969, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 969, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a970 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 970, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 970, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a971 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 971, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 971, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a972 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 972, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 972, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a973 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 973, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 973, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a974 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 974, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 974, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a975 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 975, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 975, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a976 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 976, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 976, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a977 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 977, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 977, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a978 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 978, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 978, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a979 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 979, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 979, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a980 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 980, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 980, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a981 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 981, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 981, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a982 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 982, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 982, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a983 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 983, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 983, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a984 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 984, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 984, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a985 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 985, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 985, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a986 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 986, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 986, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a987 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 987, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 987, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a988 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 988, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 988, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a989 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 989, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 989, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a990 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 990, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 990, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a991 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 991, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 991, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a992 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 992, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 992, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a993 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 993, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 993, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a994 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 994, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 994, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a995 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 995, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 995, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a996 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 996, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 996, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a997 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 997, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 997, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a998 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 998, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 998, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a999 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 999, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 999, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1000 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1000, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1000, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1001 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1001, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1001, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1002 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1002, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1002, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1003 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1003, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1003, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1004 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1004, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1004, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1005 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1005, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1005, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1006 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1006, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1006, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1007 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1007, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1007, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1008 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1008, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1008, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1009 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1009, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1009, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1010 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1010, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1010, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1011 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1011, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1011, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1012 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1012, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1012, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1013 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1013, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1013, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1014 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1014, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1014, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1015 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1015, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1015, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1016 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1016, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1016, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1017 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1017, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1017, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1018 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1018, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1018, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1019 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1019, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1019, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1020 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1020, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1020, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1021 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1021, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1021, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1022 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1022, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1022, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1023 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1023, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1023, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1024 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1024, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1024, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1025 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1025, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1025, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1026 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1026, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1026, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1027 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1027, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1027, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1028 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1028, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1028, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1029 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1029, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1029, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1030 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1030, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1030, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1031 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1031, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1031, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1032 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1032, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1032, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1033 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1033, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1033, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1034 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1034, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1034, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1035 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1035, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1035, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1036 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1036, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1036, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1037 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1037, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1037, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1038 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1038, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1038, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1039 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1039, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1039, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1040 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1040, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1040, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1041 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1041, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1041, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1042 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1042, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1042, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1043 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1043, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1043, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1044 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1044, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1044, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1045 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1045, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1045, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1046 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1046, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1046, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1047 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1047, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1047, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1048 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1048, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1048, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1049 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1049, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1049, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1050 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1050, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1050, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1051 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1051, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1051, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1052 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1052, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 1053, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1052, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 1053, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - address_a_wire[2..0] : WIRE; - address_b_wire[2..0] : WIRE; - q_b_wire[1052..0] : WIRE; - -BEGIN - ram_block2a[1052..0].clk0 = clock0; - ram_block2a[1052..0].portaaddr[] = ( address_a_wire[2..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[128].portadatain[] = ( data_a[128..128]); - ram_block2a[129].portadatain[] = ( data_a[129..129]); - ram_block2a[130].portadatain[] = ( data_a[130..130]); - ram_block2a[131].portadatain[] = ( data_a[131..131]); - ram_block2a[132].portadatain[] = ( data_a[132..132]); - ram_block2a[133].portadatain[] = ( data_a[133..133]); - ram_block2a[134].portadatain[] = ( data_a[134..134]); - ram_block2a[135].portadatain[] = ( data_a[135..135]); - ram_block2a[136].portadatain[] = ( data_a[136..136]); - ram_block2a[137].portadatain[] = ( data_a[137..137]); - ram_block2a[138].portadatain[] = ( data_a[138..138]); - ram_block2a[139].portadatain[] = ( data_a[139..139]); - ram_block2a[140].portadatain[] = ( data_a[140..140]); - ram_block2a[141].portadatain[] = ( data_a[141..141]); - ram_block2a[142].portadatain[] = ( data_a[142..142]); - ram_block2a[143].portadatain[] = ( data_a[143..143]); - ram_block2a[144].portadatain[] = ( data_a[144..144]); - ram_block2a[145].portadatain[] = ( data_a[145..145]); - ram_block2a[146].portadatain[] = ( data_a[146..146]); - ram_block2a[147].portadatain[] = ( data_a[147..147]); - ram_block2a[148].portadatain[] = ( data_a[148..148]); - ram_block2a[149].portadatain[] = ( data_a[149..149]); - ram_block2a[150].portadatain[] = ( data_a[150..150]); - ram_block2a[151].portadatain[] = ( data_a[151..151]); - ram_block2a[152].portadatain[] = ( data_a[152..152]); - ram_block2a[153].portadatain[] = ( data_a[153..153]); - ram_block2a[154].portadatain[] = ( data_a[154..154]); - ram_block2a[155].portadatain[] = ( data_a[155..155]); - ram_block2a[156].portadatain[] = ( data_a[156..156]); - ram_block2a[157].portadatain[] = ( data_a[157..157]); - ram_block2a[158].portadatain[] = ( data_a[158..158]); - ram_block2a[159].portadatain[] = ( data_a[159..159]); - ram_block2a[160].portadatain[] = ( data_a[160..160]); - ram_block2a[161].portadatain[] = ( data_a[161..161]); - ram_block2a[162].portadatain[] = ( data_a[162..162]); - ram_block2a[163].portadatain[] = ( data_a[163..163]); - ram_block2a[164].portadatain[] = ( data_a[164..164]); - ram_block2a[165].portadatain[] = ( data_a[165..165]); - ram_block2a[166].portadatain[] = ( data_a[166..166]); - ram_block2a[167].portadatain[] = ( data_a[167..167]); - ram_block2a[168].portadatain[] = ( data_a[168..168]); - ram_block2a[169].portadatain[] = ( data_a[169..169]); - ram_block2a[170].portadatain[] = ( data_a[170..170]); - ram_block2a[171].portadatain[] = ( data_a[171..171]); - ram_block2a[172].portadatain[] = ( data_a[172..172]); - ram_block2a[173].portadatain[] = ( data_a[173..173]); - ram_block2a[174].portadatain[] = ( data_a[174..174]); - ram_block2a[175].portadatain[] = ( data_a[175..175]); - ram_block2a[176].portadatain[] = ( data_a[176..176]); - ram_block2a[177].portadatain[] = ( data_a[177..177]); - ram_block2a[178].portadatain[] = ( data_a[178..178]); - ram_block2a[179].portadatain[] = ( data_a[179..179]); - ram_block2a[180].portadatain[] = ( data_a[180..180]); - ram_block2a[181].portadatain[] = ( data_a[181..181]); - ram_block2a[182].portadatain[] = ( data_a[182..182]); - ram_block2a[183].portadatain[] = ( data_a[183..183]); - ram_block2a[184].portadatain[] = ( data_a[184..184]); - ram_block2a[185].portadatain[] = ( data_a[185..185]); - ram_block2a[186].portadatain[] = ( data_a[186..186]); - ram_block2a[187].portadatain[] = ( data_a[187..187]); - ram_block2a[188].portadatain[] = ( data_a[188..188]); - ram_block2a[189].portadatain[] = ( data_a[189..189]); - ram_block2a[190].portadatain[] = ( data_a[190..190]); - ram_block2a[191].portadatain[] = ( data_a[191..191]); - ram_block2a[192].portadatain[] = ( data_a[192..192]); - ram_block2a[193].portadatain[] = ( data_a[193..193]); - ram_block2a[194].portadatain[] = ( data_a[194..194]); - ram_block2a[195].portadatain[] = ( data_a[195..195]); - ram_block2a[196].portadatain[] = ( data_a[196..196]); - ram_block2a[197].portadatain[] = ( data_a[197..197]); - ram_block2a[198].portadatain[] = ( data_a[198..198]); - ram_block2a[199].portadatain[] = ( data_a[199..199]); - ram_block2a[200].portadatain[] = ( data_a[200..200]); - ram_block2a[201].portadatain[] = ( data_a[201..201]); - ram_block2a[202].portadatain[] = ( data_a[202..202]); - ram_block2a[203].portadatain[] = ( data_a[203..203]); - ram_block2a[204].portadatain[] = ( data_a[204..204]); - ram_block2a[205].portadatain[] = ( data_a[205..205]); - ram_block2a[206].portadatain[] = ( data_a[206..206]); - ram_block2a[207].portadatain[] = ( data_a[207..207]); - ram_block2a[208].portadatain[] = ( data_a[208..208]); - ram_block2a[209].portadatain[] = ( data_a[209..209]); - ram_block2a[210].portadatain[] = ( data_a[210..210]); - ram_block2a[211].portadatain[] = ( data_a[211..211]); - ram_block2a[212].portadatain[] = ( data_a[212..212]); - ram_block2a[213].portadatain[] = ( data_a[213..213]); - ram_block2a[214].portadatain[] = ( data_a[214..214]); - ram_block2a[215].portadatain[] = ( data_a[215..215]); - ram_block2a[216].portadatain[] = ( data_a[216..216]); - ram_block2a[217].portadatain[] = ( data_a[217..217]); - ram_block2a[218].portadatain[] = ( data_a[218..218]); - ram_block2a[219].portadatain[] = ( data_a[219..219]); - ram_block2a[220].portadatain[] = ( data_a[220..220]); - ram_block2a[221].portadatain[] = ( data_a[221..221]); - ram_block2a[222].portadatain[] = ( data_a[222..222]); - ram_block2a[223].portadatain[] = ( data_a[223..223]); - ram_block2a[224].portadatain[] = ( data_a[224..224]); - ram_block2a[225].portadatain[] = ( data_a[225..225]); - ram_block2a[226].portadatain[] = ( data_a[226..226]); - ram_block2a[227].portadatain[] = ( data_a[227..227]); - ram_block2a[228].portadatain[] = ( data_a[228..228]); - ram_block2a[229].portadatain[] = ( data_a[229..229]); - ram_block2a[230].portadatain[] = ( data_a[230..230]); - ram_block2a[231].portadatain[] = ( data_a[231..231]); - ram_block2a[232].portadatain[] = ( data_a[232..232]); - ram_block2a[233].portadatain[] = ( data_a[233..233]); - ram_block2a[234].portadatain[] = ( data_a[234..234]); - ram_block2a[235].portadatain[] = ( data_a[235..235]); - ram_block2a[236].portadatain[] = ( data_a[236..236]); - ram_block2a[237].portadatain[] = ( data_a[237..237]); - ram_block2a[238].portadatain[] = ( data_a[238..238]); - ram_block2a[239].portadatain[] = ( data_a[239..239]); - ram_block2a[240].portadatain[] = ( data_a[240..240]); - ram_block2a[241].portadatain[] = ( data_a[241..241]); - ram_block2a[242].portadatain[] = ( data_a[242..242]); - ram_block2a[243].portadatain[] = ( data_a[243..243]); - ram_block2a[244].portadatain[] = ( data_a[244..244]); - ram_block2a[245].portadatain[] = ( data_a[245..245]); - ram_block2a[246].portadatain[] = ( data_a[246..246]); - ram_block2a[247].portadatain[] = ( data_a[247..247]); - ram_block2a[248].portadatain[] = ( data_a[248..248]); - ram_block2a[249].portadatain[] = ( data_a[249..249]); - ram_block2a[250].portadatain[] = ( data_a[250..250]); - ram_block2a[251].portadatain[] = ( data_a[251..251]); - ram_block2a[252].portadatain[] = ( data_a[252..252]); - ram_block2a[253].portadatain[] = ( data_a[253..253]); - ram_block2a[254].portadatain[] = ( data_a[254..254]); - ram_block2a[255].portadatain[] = ( data_a[255..255]); - ram_block2a[256].portadatain[] = ( data_a[256..256]); - ram_block2a[257].portadatain[] = ( data_a[257..257]); - ram_block2a[258].portadatain[] = ( data_a[258..258]); - ram_block2a[259].portadatain[] = ( data_a[259..259]); - ram_block2a[260].portadatain[] = ( data_a[260..260]); - ram_block2a[261].portadatain[] = ( data_a[261..261]); - ram_block2a[262].portadatain[] = ( data_a[262..262]); - ram_block2a[263].portadatain[] = ( data_a[263..263]); - ram_block2a[264].portadatain[] = ( data_a[264..264]); - ram_block2a[265].portadatain[] = ( data_a[265..265]); - ram_block2a[266].portadatain[] = ( data_a[266..266]); - ram_block2a[267].portadatain[] = ( data_a[267..267]); - ram_block2a[268].portadatain[] = ( data_a[268..268]); - ram_block2a[269].portadatain[] = ( data_a[269..269]); - ram_block2a[270].portadatain[] = ( data_a[270..270]); - ram_block2a[271].portadatain[] = ( data_a[271..271]); - ram_block2a[272].portadatain[] = ( data_a[272..272]); - ram_block2a[273].portadatain[] = ( data_a[273..273]); - ram_block2a[274].portadatain[] = ( data_a[274..274]); - ram_block2a[275].portadatain[] = ( data_a[275..275]); - ram_block2a[276].portadatain[] = ( data_a[276..276]); - ram_block2a[277].portadatain[] = ( data_a[277..277]); - ram_block2a[278].portadatain[] = ( data_a[278..278]); - ram_block2a[279].portadatain[] = ( data_a[279..279]); - ram_block2a[280].portadatain[] = ( data_a[280..280]); - ram_block2a[281].portadatain[] = ( data_a[281..281]); - ram_block2a[282].portadatain[] = ( data_a[282..282]); - ram_block2a[283].portadatain[] = ( data_a[283..283]); - ram_block2a[284].portadatain[] = ( data_a[284..284]); - ram_block2a[285].portadatain[] = ( data_a[285..285]); - ram_block2a[286].portadatain[] = ( data_a[286..286]); - ram_block2a[287].portadatain[] = ( data_a[287..287]); - ram_block2a[288].portadatain[] = ( data_a[288..288]); - ram_block2a[289].portadatain[] = ( data_a[289..289]); - ram_block2a[290].portadatain[] = ( data_a[290..290]); - ram_block2a[291].portadatain[] = ( data_a[291..291]); - ram_block2a[292].portadatain[] = ( data_a[292..292]); - ram_block2a[293].portadatain[] = ( data_a[293..293]); - ram_block2a[294].portadatain[] = ( data_a[294..294]); - ram_block2a[295].portadatain[] = ( data_a[295..295]); - ram_block2a[296].portadatain[] = ( data_a[296..296]); - ram_block2a[297].portadatain[] = ( data_a[297..297]); - ram_block2a[298].portadatain[] = ( data_a[298..298]); - ram_block2a[299].portadatain[] = ( data_a[299..299]); - ram_block2a[300].portadatain[] = ( data_a[300..300]); - ram_block2a[301].portadatain[] = ( data_a[301..301]); - ram_block2a[302].portadatain[] = ( data_a[302..302]); - ram_block2a[303].portadatain[] = ( data_a[303..303]); - ram_block2a[304].portadatain[] = ( data_a[304..304]); - ram_block2a[305].portadatain[] = ( data_a[305..305]); - ram_block2a[306].portadatain[] = ( data_a[306..306]); - ram_block2a[307].portadatain[] = ( data_a[307..307]); - ram_block2a[308].portadatain[] = ( data_a[308..308]); - ram_block2a[309].portadatain[] = ( data_a[309..309]); - ram_block2a[310].portadatain[] = ( data_a[310..310]); - ram_block2a[311].portadatain[] = ( data_a[311..311]); - ram_block2a[312].portadatain[] = ( data_a[312..312]); - ram_block2a[313].portadatain[] = ( data_a[313..313]); - ram_block2a[314].portadatain[] = ( data_a[314..314]); - ram_block2a[315].portadatain[] = ( data_a[315..315]); - ram_block2a[316].portadatain[] = ( data_a[316..316]); - ram_block2a[317].portadatain[] = ( data_a[317..317]); - ram_block2a[318].portadatain[] = ( data_a[318..318]); - ram_block2a[319].portadatain[] = ( data_a[319..319]); - ram_block2a[320].portadatain[] = ( data_a[320..320]); - ram_block2a[321].portadatain[] = ( data_a[321..321]); - ram_block2a[322].portadatain[] = ( data_a[322..322]); - ram_block2a[323].portadatain[] = ( data_a[323..323]); - ram_block2a[324].portadatain[] = ( data_a[324..324]); - ram_block2a[325].portadatain[] = ( data_a[325..325]); - ram_block2a[326].portadatain[] = ( data_a[326..326]); - ram_block2a[327].portadatain[] = ( data_a[327..327]); - ram_block2a[328].portadatain[] = ( data_a[328..328]); - ram_block2a[329].portadatain[] = ( data_a[329..329]); - ram_block2a[330].portadatain[] = ( data_a[330..330]); - ram_block2a[331].portadatain[] = ( data_a[331..331]); - ram_block2a[332].portadatain[] = ( data_a[332..332]); - ram_block2a[333].portadatain[] = ( data_a[333..333]); - ram_block2a[334].portadatain[] = ( data_a[334..334]); - ram_block2a[335].portadatain[] = ( data_a[335..335]); - ram_block2a[336].portadatain[] = ( data_a[336..336]); - ram_block2a[337].portadatain[] = ( data_a[337..337]); - ram_block2a[338].portadatain[] = ( data_a[338..338]); - ram_block2a[339].portadatain[] = ( data_a[339..339]); - ram_block2a[340].portadatain[] = ( data_a[340..340]); - ram_block2a[341].portadatain[] = ( data_a[341..341]); - ram_block2a[342].portadatain[] = ( data_a[342..342]); - ram_block2a[343].portadatain[] = ( data_a[343..343]); - ram_block2a[344].portadatain[] = ( data_a[344..344]); - ram_block2a[345].portadatain[] = ( data_a[345..345]); - ram_block2a[346].portadatain[] = ( data_a[346..346]); - ram_block2a[347].portadatain[] = ( data_a[347..347]); - ram_block2a[348].portadatain[] = ( data_a[348..348]); - ram_block2a[349].portadatain[] = ( data_a[349..349]); - ram_block2a[350].portadatain[] = ( data_a[350..350]); - ram_block2a[351].portadatain[] = ( data_a[351..351]); - ram_block2a[352].portadatain[] = ( data_a[352..352]); - ram_block2a[353].portadatain[] = ( data_a[353..353]); - ram_block2a[354].portadatain[] = ( data_a[354..354]); - ram_block2a[355].portadatain[] = ( data_a[355..355]); - ram_block2a[356].portadatain[] = ( data_a[356..356]); - ram_block2a[357].portadatain[] = ( data_a[357..357]); - ram_block2a[358].portadatain[] = ( data_a[358..358]); - ram_block2a[359].portadatain[] = ( data_a[359..359]); - ram_block2a[360].portadatain[] = ( data_a[360..360]); - ram_block2a[361].portadatain[] = ( data_a[361..361]); - ram_block2a[362].portadatain[] = ( data_a[362..362]); - ram_block2a[363].portadatain[] = ( data_a[363..363]); - ram_block2a[364].portadatain[] = ( data_a[364..364]); - ram_block2a[365].portadatain[] = ( data_a[365..365]); - ram_block2a[366].portadatain[] = ( data_a[366..366]); - ram_block2a[367].portadatain[] = ( data_a[367..367]); - ram_block2a[368].portadatain[] = ( data_a[368..368]); - ram_block2a[369].portadatain[] = ( data_a[369..369]); - ram_block2a[370].portadatain[] = ( data_a[370..370]); - ram_block2a[371].portadatain[] = ( data_a[371..371]); - ram_block2a[372].portadatain[] = ( data_a[372..372]); - ram_block2a[373].portadatain[] = ( data_a[373..373]); - ram_block2a[374].portadatain[] = ( data_a[374..374]); - ram_block2a[375].portadatain[] = ( data_a[375..375]); - ram_block2a[376].portadatain[] = ( data_a[376..376]); - ram_block2a[377].portadatain[] = ( data_a[377..377]); - ram_block2a[378].portadatain[] = ( data_a[378..378]); - ram_block2a[379].portadatain[] = ( data_a[379..379]); - ram_block2a[380].portadatain[] = ( data_a[380..380]); - ram_block2a[381].portadatain[] = ( data_a[381..381]); - ram_block2a[382].portadatain[] = ( data_a[382..382]); - ram_block2a[383].portadatain[] = ( data_a[383..383]); - ram_block2a[384].portadatain[] = ( data_a[384..384]); - ram_block2a[385].portadatain[] = ( data_a[385..385]); - ram_block2a[386].portadatain[] = ( data_a[386..386]); - ram_block2a[387].portadatain[] = ( data_a[387..387]); - ram_block2a[388].portadatain[] = ( data_a[388..388]); - ram_block2a[389].portadatain[] = ( data_a[389..389]); - ram_block2a[390].portadatain[] = ( data_a[390..390]); - ram_block2a[391].portadatain[] = ( data_a[391..391]); - ram_block2a[392].portadatain[] = ( data_a[392..392]); - ram_block2a[393].portadatain[] = ( data_a[393..393]); - ram_block2a[394].portadatain[] = ( data_a[394..394]); - ram_block2a[395].portadatain[] = ( data_a[395..395]); - ram_block2a[396].portadatain[] = ( data_a[396..396]); - ram_block2a[397].portadatain[] = ( data_a[397..397]); - ram_block2a[398].portadatain[] = ( data_a[398..398]); - ram_block2a[399].portadatain[] = ( data_a[399..399]); - ram_block2a[400].portadatain[] = ( data_a[400..400]); - ram_block2a[401].portadatain[] = ( data_a[401..401]); - ram_block2a[402].portadatain[] = ( data_a[402..402]); - ram_block2a[403].portadatain[] = ( data_a[403..403]); - ram_block2a[404].portadatain[] = ( data_a[404..404]); - ram_block2a[405].portadatain[] = ( data_a[405..405]); - ram_block2a[406].portadatain[] = ( data_a[406..406]); - ram_block2a[407].portadatain[] = ( data_a[407..407]); - ram_block2a[408].portadatain[] = ( data_a[408..408]); - ram_block2a[409].portadatain[] = ( data_a[409..409]); - ram_block2a[410].portadatain[] = ( data_a[410..410]); - ram_block2a[411].portadatain[] = ( data_a[411..411]); - ram_block2a[412].portadatain[] = ( data_a[412..412]); - ram_block2a[413].portadatain[] = ( data_a[413..413]); - ram_block2a[414].portadatain[] = ( data_a[414..414]); - ram_block2a[415].portadatain[] = ( data_a[415..415]); - ram_block2a[416].portadatain[] = ( data_a[416..416]); - ram_block2a[417].portadatain[] = ( data_a[417..417]); - ram_block2a[418].portadatain[] = ( data_a[418..418]); - ram_block2a[419].portadatain[] = ( data_a[419..419]); - ram_block2a[420].portadatain[] = ( data_a[420..420]); - ram_block2a[421].portadatain[] = ( data_a[421..421]); - ram_block2a[422].portadatain[] = ( data_a[422..422]); - ram_block2a[423].portadatain[] = ( data_a[423..423]); - ram_block2a[424].portadatain[] = ( data_a[424..424]); - ram_block2a[425].portadatain[] = ( data_a[425..425]); - ram_block2a[426].portadatain[] = ( data_a[426..426]); - ram_block2a[427].portadatain[] = ( data_a[427..427]); - ram_block2a[428].portadatain[] = ( data_a[428..428]); - ram_block2a[429].portadatain[] = ( data_a[429..429]); - ram_block2a[430].portadatain[] = ( data_a[430..430]); - ram_block2a[431].portadatain[] = ( data_a[431..431]); - ram_block2a[432].portadatain[] = ( data_a[432..432]); - ram_block2a[433].portadatain[] = ( data_a[433..433]); - ram_block2a[434].portadatain[] = ( data_a[434..434]); - ram_block2a[435].portadatain[] = ( data_a[435..435]); - ram_block2a[436].portadatain[] = ( data_a[436..436]); - ram_block2a[437].portadatain[] = ( data_a[437..437]); - ram_block2a[438].portadatain[] = ( data_a[438..438]); - ram_block2a[439].portadatain[] = ( data_a[439..439]); - ram_block2a[440].portadatain[] = ( data_a[440..440]); - ram_block2a[441].portadatain[] = ( data_a[441..441]); - ram_block2a[442].portadatain[] = ( data_a[442..442]); - ram_block2a[443].portadatain[] = ( data_a[443..443]); - ram_block2a[444].portadatain[] = ( data_a[444..444]); - ram_block2a[445].portadatain[] = ( data_a[445..445]); - ram_block2a[446].portadatain[] = ( data_a[446..446]); - ram_block2a[447].portadatain[] = ( data_a[447..447]); - ram_block2a[448].portadatain[] = ( data_a[448..448]); - ram_block2a[449].portadatain[] = ( data_a[449..449]); - ram_block2a[450].portadatain[] = ( data_a[450..450]); - ram_block2a[451].portadatain[] = ( data_a[451..451]); - ram_block2a[452].portadatain[] = ( data_a[452..452]); - ram_block2a[453].portadatain[] = ( data_a[453..453]); - ram_block2a[454].portadatain[] = ( data_a[454..454]); - ram_block2a[455].portadatain[] = ( data_a[455..455]); - ram_block2a[456].portadatain[] = ( data_a[456..456]); - ram_block2a[457].portadatain[] = ( data_a[457..457]); - ram_block2a[458].portadatain[] = ( data_a[458..458]); - ram_block2a[459].portadatain[] = ( data_a[459..459]); - ram_block2a[460].portadatain[] = ( data_a[460..460]); - ram_block2a[461].portadatain[] = ( data_a[461..461]); - ram_block2a[462].portadatain[] = ( data_a[462..462]); - ram_block2a[463].portadatain[] = ( data_a[463..463]); - ram_block2a[464].portadatain[] = ( data_a[464..464]); - ram_block2a[465].portadatain[] = ( data_a[465..465]); - ram_block2a[466].portadatain[] = ( data_a[466..466]); - ram_block2a[467].portadatain[] = ( data_a[467..467]); - ram_block2a[468].portadatain[] = ( data_a[468..468]); - ram_block2a[469].portadatain[] = ( data_a[469..469]); - ram_block2a[470].portadatain[] = ( data_a[470..470]); - ram_block2a[471].portadatain[] = ( data_a[471..471]); - ram_block2a[472].portadatain[] = ( data_a[472..472]); - ram_block2a[473].portadatain[] = ( data_a[473..473]); - ram_block2a[474].portadatain[] = ( data_a[474..474]); - ram_block2a[475].portadatain[] = ( data_a[475..475]); - ram_block2a[476].portadatain[] = ( data_a[476..476]); - ram_block2a[477].portadatain[] = ( data_a[477..477]); - ram_block2a[478].portadatain[] = ( data_a[478..478]); - ram_block2a[479].portadatain[] = ( data_a[479..479]); - ram_block2a[480].portadatain[] = ( data_a[480..480]); - ram_block2a[481].portadatain[] = ( data_a[481..481]); - ram_block2a[482].portadatain[] = ( data_a[482..482]); - ram_block2a[483].portadatain[] = ( data_a[483..483]); - ram_block2a[484].portadatain[] = ( data_a[484..484]); - ram_block2a[485].portadatain[] = ( data_a[485..485]); - ram_block2a[486].portadatain[] = ( data_a[486..486]); - ram_block2a[487].portadatain[] = ( data_a[487..487]); - ram_block2a[488].portadatain[] = ( data_a[488..488]); - ram_block2a[489].portadatain[] = ( data_a[489..489]); - ram_block2a[490].portadatain[] = ( data_a[490..490]); - ram_block2a[491].portadatain[] = ( data_a[491..491]); - ram_block2a[492].portadatain[] = ( data_a[492..492]); - ram_block2a[493].portadatain[] = ( data_a[493..493]); - ram_block2a[494].portadatain[] = ( data_a[494..494]); - ram_block2a[495].portadatain[] = ( data_a[495..495]); - ram_block2a[496].portadatain[] = ( data_a[496..496]); - ram_block2a[497].portadatain[] = ( data_a[497..497]); - ram_block2a[498].portadatain[] = ( data_a[498..498]); - ram_block2a[499].portadatain[] = ( data_a[499..499]); - ram_block2a[500].portadatain[] = ( data_a[500..500]); - ram_block2a[501].portadatain[] = ( data_a[501..501]); - ram_block2a[502].portadatain[] = ( data_a[502..502]); - ram_block2a[503].portadatain[] = ( data_a[503..503]); - ram_block2a[504].portadatain[] = ( data_a[504..504]); - ram_block2a[505].portadatain[] = ( data_a[505..505]); - ram_block2a[506].portadatain[] = ( data_a[506..506]); - ram_block2a[507].portadatain[] = ( data_a[507..507]); - ram_block2a[508].portadatain[] = ( data_a[508..508]); - ram_block2a[509].portadatain[] = ( data_a[509..509]); - ram_block2a[510].portadatain[] = ( data_a[510..510]); - ram_block2a[511].portadatain[] = ( data_a[511..511]); - ram_block2a[512].portadatain[] = ( data_a[512..512]); - ram_block2a[513].portadatain[] = ( data_a[513..513]); - ram_block2a[514].portadatain[] = ( data_a[514..514]); - ram_block2a[515].portadatain[] = ( data_a[515..515]); - ram_block2a[516].portadatain[] = ( data_a[516..516]); - ram_block2a[517].portadatain[] = ( data_a[517..517]); - ram_block2a[518].portadatain[] = ( data_a[518..518]); - ram_block2a[519].portadatain[] = ( data_a[519..519]); - ram_block2a[520].portadatain[] = ( data_a[520..520]); - ram_block2a[521].portadatain[] = ( data_a[521..521]); - ram_block2a[522].portadatain[] = ( data_a[522..522]); - ram_block2a[523].portadatain[] = ( data_a[523..523]); - ram_block2a[524].portadatain[] = ( data_a[524..524]); - ram_block2a[525].portadatain[] = ( data_a[525..525]); - ram_block2a[526].portadatain[] = ( data_a[526..526]); - ram_block2a[527].portadatain[] = ( data_a[527..527]); - ram_block2a[528].portadatain[] = ( data_a[528..528]); - ram_block2a[529].portadatain[] = ( data_a[529..529]); - ram_block2a[530].portadatain[] = ( data_a[530..530]); - ram_block2a[531].portadatain[] = ( data_a[531..531]); - ram_block2a[532].portadatain[] = ( data_a[532..532]); - ram_block2a[533].portadatain[] = ( data_a[533..533]); - ram_block2a[534].portadatain[] = ( data_a[534..534]); - ram_block2a[535].portadatain[] = ( data_a[535..535]); - ram_block2a[536].portadatain[] = ( data_a[536..536]); - ram_block2a[537].portadatain[] = ( data_a[537..537]); - ram_block2a[538].portadatain[] = ( data_a[538..538]); - ram_block2a[539].portadatain[] = ( data_a[539..539]); - ram_block2a[540].portadatain[] = ( data_a[540..540]); - ram_block2a[541].portadatain[] = ( data_a[541..541]); - ram_block2a[542].portadatain[] = ( data_a[542..542]); - ram_block2a[543].portadatain[] = ( data_a[543..543]); - ram_block2a[544].portadatain[] = ( data_a[544..544]); - ram_block2a[545].portadatain[] = ( data_a[545..545]); - ram_block2a[546].portadatain[] = ( data_a[546..546]); - ram_block2a[547].portadatain[] = ( data_a[547..547]); - ram_block2a[548].portadatain[] = ( data_a[548..548]); - ram_block2a[549].portadatain[] = ( data_a[549..549]); - ram_block2a[550].portadatain[] = ( data_a[550..550]); - ram_block2a[551].portadatain[] = ( data_a[551..551]); - ram_block2a[552].portadatain[] = ( data_a[552..552]); - ram_block2a[553].portadatain[] = ( data_a[553..553]); - ram_block2a[554].portadatain[] = ( data_a[554..554]); - ram_block2a[555].portadatain[] = ( data_a[555..555]); - ram_block2a[556].portadatain[] = ( data_a[556..556]); - ram_block2a[557].portadatain[] = ( data_a[557..557]); - ram_block2a[558].portadatain[] = ( data_a[558..558]); - ram_block2a[559].portadatain[] = ( data_a[559..559]); - ram_block2a[560].portadatain[] = ( data_a[560..560]); - ram_block2a[561].portadatain[] = ( data_a[561..561]); - ram_block2a[562].portadatain[] = ( data_a[562..562]); - ram_block2a[563].portadatain[] = ( data_a[563..563]); - ram_block2a[564].portadatain[] = ( data_a[564..564]); - ram_block2a[565].portadatain[] = ( data_a[565..565]); - ram_block2a[566].portadatain[] = ( data_a[566..566]); - ram_block2a[567].portadatain[] = ( data_a[567..567]); - ram_block2a[568].portadatain[] = ( data_a[568..568]); - ram_block2a[569].portadatain[] = ( data_a[569..569]); - ram_block2a[570].portadatain[] = ( data_a[570..570]); - ram_block2a[571].portadatain[] = ( data_a[571..571]); - ram_block2a[572].portadatain[] = ( data_a[572..572]); - ram_block2a[573].portadatain[] = ( data_a[573..573]); - ram_block2a[574].portadatain[] = ( data_a[574..574]); - ram_block2a[575].portadatain[] = ( data_a[575..575]); - ram_block2a[576].portadatain[] = ( data_a[576..576]); - ram_block2a[577].portadatain[] = ( data_a[577..577]); - ram_block2a[578].portadatain[] = ( data_a[578..578]); - ram_block2a[579].portadatain[] = ( data_a[579..579]); - ram_block2a[580].portadatain[] = ( data_a[580..580]); - ram_block2a[581].portadatain[] = ( data_a[581..581]); - ram_block2a[582].portadatain[] = ( data_a[582..582]); - ram_block2a[583].portadatain[] = ( data_a[583..583]); - ram_block2a[584].portadatain[] = ( data_a[584..584]); - ram_block2a[585].portadatain[] = ( data_a[585..585]); - ram_block2a[586].portadatain[] = ( data_a[586..586]); - ram_block2a[587].portadatain[] = ( data_a[587..587]); - ram_block2a[588].portadatain[] = ( data_a[588..588]); - ram_block2a[589].portadatain[] = ( data_a[589..589]); - ram_block2a[590].portadatain[] = ( data_a[590..590]); - ram_block2a[591].portadatain[] = ( data_a[591..591]); - ram_block2a[592].portadatain[] = ( data_a[592..592]); - ram_block2a[593].portadatain[] = ( data_a[593..593]); - ram_block2a[594].portadatain[] = ( data_a[594..594]); - ram_block2a[595].portadatain[] = ( data_a[595..595]); - ram_block2a[596].portadatain[] = ( data_a[596..596]); - ram_block2a[597].portadatain[] = ( data_a[597..597]); - ram_block2a[598].portadatain[] = ( data_a[598..598]); - ram_block2a[599].portadatain[] = ( data_a[599..599]); - ram_block2a[600].portadatain[] = ( data_a[600..600]); - ram_block2a[601].portadatain[] = ( data_a[601..601]); - ram_block2a[602].portadatain[] = ( data_a[602..602]); - ram_block2a[603].portadatain[] = ( data_a[603..603]); - ram_block2a[604].portadatain[] = ( data_a[604..604]); - ram_block2a[605].portadatain[] = ( data_a[605..605]); - ram_block2a[606].portadatain[] = ( data_a[606..606]); - ram_block2a[607].portadatain[] = ( data_a[607..607]); - ram_block2a[608].portadatain[] = ( data_a[608..608]); - ram_block2a[609].portadatain[] = ( data_a[609..609]); - ram_block2a[610].portadatain[] = ( data_a[610..610]); - ram_block2a[611].portadatain[] = ( data_a[611..611]); - ram_block2a[612].portadatain[] = ( data_a[612..612]); - ram_block2a[613].portadatain[] = ( data_a[613..613]); - ram_block2a[614].portadatain[] = ( data_a[614..614]); - ram_block2a[615].portadatain[] = ( data_a[615..615]); - ram_block2a[616].portadatain[] = ( data_a[616..616]); - ram_block2a[617].portadatain[] = ( data_a[617..617]); - ram_block2a[618].portadatain[] = ( data_a[618..618]); - ram_block2a[619].portadatain[] = ( data_a[619..619]); - ram_block2a[620].portadatain[] = ( data_a[620..620]); - ram_block2a[621].portadatain[] = ( data_a[621..621]); - ram_block2a[622].portadatain[] = ( data_a[622..622]); - ram_block2a[623].portadatain[] = ( data_a[623..623]); - ram_block2a[624].portadatain[] = ( data_a[624..624]); - ram_block2a[625].portadatain[] = ( data_a[625..625]); - ram_block2a[626].portadatain[] = ( data_a[626..626]); - ram_block2a[627].portadatain[] = ( data_a[627..627]); - ram_block2a[628].portadatain[] = ( data_a[628..628]); - ram_block2a[629].portadatain[] = ( data_a[629..629]); - ram_block2a[630].portadatain[] = ( data_a[630..630]); - ram_block2a[631].portadatain[] = ( data_a[631..631]); - ram_block2a[632].portadatain[] = ( data_a[632..632]); - ram_block2a[633].portadatain[] = ( data_a[633..633]); - ram_block2a[634].portadatain[] = ( data_a[634..634]); - ram_block2a[635].portadatain[] = ( data_a[635..635]); - ram_block2a[636].portadatain[] = ( data_a[636..636]); - ram_block2a[637].portadatain[] = ( data_a[637..637]); - ram_block2a[638].portadatain[] = ( data_a[638..638]); - ram_block2a[639].portadatain[] = ( data_a[639..639]); - ram_block2a[640].portadatain[] = ( data_a[640..640]); - ram_block2a[641].portadatain[] = ( data_a[641..641]); - ram_block2a[642].portadatain[] = ( data_a[642..642]); - ram_block2a[643].portadatain[] = ( data_a[643..643]); - ram_block2a[644].portadatain[] = ( data_a[644..644]); - ram_block2a[645].portadatain[] = ( data_a[645..645]); - ram_block2a[646].portadatain[] = ( data_a[646..646]); - ram_block2a[647].portadatain[] = ( data_a[647..647]); - ram_block2a[648].portadatain[] = ( data_a[648..648]); - ram_block2a[649].portadatain[] = ( data_a[649..649]); - ram_block2a[650].portadatain[] = ( data_a[650..650]); - ram_block2a[651].portadatain[] = ( data_a[651..651]); - ram_block2a[652].portadatain[] = ( data_a[652..652]); - ram_block2a[653].portadatain[] = ( data_a[653..653]); - ram_block2a[654].portadatain[] = ( data_a[654..654]); - ram_block2a[655].portadatain[] = ( data_a[655..655]); - ram_block2a[656].portadatain[] = ( data_a[656..656]); - ram_block2a[657].portadatain[] = ( data_a[657..657]); - ram_block2a[658].portadatain[] = ( data_a[658..658]); - ram_block2a[659].portadatain[] = ( data_a[659..659]); - ram_block2a[660].portadatain[] = ( data_a[660..660]); - ram_block2a[661].portadatain[] = ( data_a[661..661]); - ram_block2a[662].portadatain[] = ( data_a[662..662]); - ram_block2a[663].portadatain[] = ( data_a[663..663]); - ram_block2a[664].portadatain[] = ( data_a[664..664]); - ram_block2a[665].portadatain[] = ( data_a[665..665]); - ram_block2a[666].portadatain[] = ( data_a[666..666]); - ram_block2a[667].portadatain[] = ( data_a[667..667]); - ram_block2a[668].portadatain[] = ( data_a[668..668]); - ram_block2a[669].portadatain[] = ( data_a[669..669]); - ram_block2a[670].portadatain[] = ( data_a[670..670]); - ram_block2a[671].portadatain[] = ( data_a[671..671]); - ram_block2a[672].portadatain[] = ( data_a[672..672]); - ram_block2a[673].portadatain[] = ( data_a[673..673]); - ram_block2a[674].portadatain[] = ( data_a[674..674]); - ram_block2a[675].portadatain[] = ( data_a[675..675]); - ram_block2a[676].portadatain[] = ( data_a[676..676]); - ram_block2a[677].portadatain[] = ( data_a[677..677]); - ram_block2a[678].portadatain[] = ( data_a[678..678]); - ram_block2a[679].portadatain[] = ( data_a[679..679]); - ram_block2a[680].portadatain[] = ( data_a[680..680]); - ram_block2a[681].portadatain[] = ( data_a[681..681]); - ram_block2a[682].portadatain[] = ( data_a[682..682]); - ram_block2a[683].portadatain[] = ( data_a[683..683]); - ram_block2a[684].portadatain[] = ( data_a[684..684]); - ram_block2a[685].portadatain[] = ( data_a[685..685]); - ram_block2a[686].portadatain[] = ( data_a[686..686]); - ram_block2a[687].portadatain[] = ( data_a[687..687]); - ram_block2a[688].portadatain[] = ( data_a[688..688]); - ram_block2a[689].portadatain[] = ( data_a[689..689]); - ram_block2a[690].portadatain[] = ( data_a[690..690]); - ram_block2a[691].portadatain[] = ( data_a[691..691]); - ram_block2a[692].portadatain[] = ( data_a[692..692]); - ram_block2a[693].portadatain[] = ( data_a[693..693]); - ram_block2a[694].portadatain[] = ( data_a[694..694]); - ram_block2a[695].portadatain[] = ( data_a[695..695]); - ram_block2a[696].portadatain[] = ( data_a[696..696]); - ram_block2a[697].portadatain[] = ( data_a[697..697]); - ram_block2a[698].portadatain[] = ( data_a[698..698]); - ram_block2a[699].portadatain[] = ( data_a[699..699]); - ram_block2a[700].portadatain[] = ( data_a[700..700]); - ram_block2a[701].portadatain[] = ( data_a[701..701]); - ram_block2a[702].portadatain[] = ( data_a[702..702]); - ram_block2a[703].portadatain[] = ( data_a[703..703]); - ram_block2a[704].portadatain[] = ( data_a[704..704]); - ram_block2a[705].portadatain[] = ( data_a[705..705]); - ram_block2a[706].portadatain[] = ( data_a[706..706]); - ram_block2a[707].portadatain[] = ( data_a[707..707]); - ram_block2a[708].portadatain[] = ( data_a[708..708]); - ram_block2a[709].portadatain[] = ( data_a[709..709]); - ram_block2a[710].portadatain[] = ( data_a[710..710]); - ram_block2a[711].portadatain[] = ( data_a[711..711]); - ram_block2a[712].portadatain[] = ( data_a[712..712]); - ram_block2a[713].portadatain[] = ( data_a[713..713]); - ram_block2a[714].portadatain[] = ( data_a[714..714]); - ram_block2a[715].portadatain[] = ( data_a[715..715]); - ram_block2a[716].portadatain[] = ( data_a[716..716]); - ram_block2a[717].portadatain[] = ( data_a[717..717]); - ram_block2a[718].portadatain[] = ( data_a[718..718]); - ram_block2a[719].portadatain[] = ( data_a[719..719]); - ram_block2a[720].portadatain[] = ( data_a[720..720]); - ram_block2a[721].portadatain[] = ( data_a[721..721]); - ram_block2a[722].portadatain[] = ( data_a[722..722]); - ram_block2a[723].portadatain[] = ( data_a[723..723]); - ram_block2a[724].portadatain[] = ( data_a[724..724]); - ram_block2a[725].portadatain[] = ( data_a[725..725]); - ram_block2a[726].portadatain[] = ( data_a[726..726]); - ram_block2a[727].portadatain[] = ( data_a[727..727]); - ram_block2a[728].portadatain[] = ( data_a[728..728]); - ram_block2a[729].portadatain[] = ( data_a[729..729]); - ram_block2a[730].portadatain[] = ( data_a[730..730]); - ram_block2a[731].portadatain[] = ( data_a[731..731]); - ram_block2a[732].portadatain[] = ( data_a[732..732]); - ram_block2a[733].portadatain[] = ( data_a[733..733]); - ram_block2a[734].portadatain[] = ( data_a[734..734]); - ram_block2a[735].portadatain[] = ( data_a[735..735]); - ram_block2a[736].portadatain[] = ( data_a[736..736]); - ram_block2a[737].portadatain[] = ( data_a[737..737]); - ram_block2a[738].portadatain[] = ( data_a[738..738]); - ram_block2a[739].portadatain[] = ( data_a[739..739]); - ram_block2a[740].portadatain[] = ( data_a[740..740]); - ram_block2a[741].portadatain[] = ( data_a[741..741]); - ram_block2a[742].portadatain[] = ( data_a[742..742]); - ram_block2a[743].portadatain[] = ( data_a[743..743]); - ram_block2a[744].portadatain[] = ( data_a[744..744]); - ram_block2a[745].portadatain[] = ( data_a[745..745]); - ram_block2a[746].portadatain[] = ( data_a[746..746]); - ram_block2a[747].portadatain[] = ( data_a[747..747]); - ram_block2a[748].portadatain[] = ( data_a[748..748]); - ram_block2a[749].portadatain[] = ( data_a[749..749]); - ram_block2a[750].portadatain[] = ( data_a[750..750]); - ram_block2a[751].portadatain[] = ( data_a[751..751]); - ram_block2a[752].portadatain[] = ( data_a[752..752]); - ram_block2a[753].portadatain[] = ( data_a[753..753]); - ram_block2a[754].portadatain[] = ( data_a[754..754]); - ram_block2a[755].portadatain[] = ( data_a[755..755]); - ram_block2a[756].portadatain[] = ( data_a[756..756]); - ram_block2a[757].portadatain[] = ( data_a[757..757]); - ram_block2a[758].portadatain[] = ( data_a[758..758]); - ram_block2a[759].portadatain[] = ( data_a[759..759]); - ram_block2a[760].portadatain[] = ( data_a[760..760]); - ram_block2a[761].portadatain[] = ( data_a[761..761]); - ram_block2a[762].portadatain[] = ( data_a[762..762]); - ram_block2a[763].portadatain[] = ( data_a[763..763]); - ram_block2a[764].portadatain[] = ( data_a[764..764]); - ram_block2a[765].portadatain[] = ( data_a[765..765]); - ram_block2a[766].portadatain[] = ( data_a[766..766]); - ram_block2a[767].portadatain[] = ( data_a[767..767]); - ram_block2a[768].portadatain[] = ( data_a[768..768]); - ram_block2a[769].portadatain[] = ( data_a[769..769]); - ram_block2a[770].portadatain[] = ( data_a[770..770]); - ram_block2a[771].portadatain[] = ( data_a[771..771]); - ram_block2a[772].portadatain[] = ( data_a[772..772]); - ram_block2a[773].portadatain[] = ( data_a[773..773]); - ram_block2a[774].portadatain[] = ( data_a[774..774]); - ram_block2a[775].portadatain[] = ( data_a[775..775]); - ram_block2a[776].portadatain[] = ( data_a[776..776]); - ram_block2a[777].portadatain[] = ( data_a[777..777]); - ram_block2a[778].portadatain[] = ( data_a[778..778]); - ram_block2a[779].portadatain[] = ( data_a[779..779]); - ram_block2a[780].portadatain[] = ( data_a[780..780]); - ram_block2a[781].portadatain[] = ( data_a[781..781]); - ram_block2a[782].portadatain[] = ( data_a[782..782]); - ram_block2a[783].portadatain[] = ( data_a[783..783]); - ram_block2a[784].portadatain[] = ( data_a[784..784]); - ram_block2a[785].portadatain[] = ( data_a[785..785]); - ram_block2a[786].portadatain[] = ( data_a[786..786]); - ram_block2a[787].portadatain[] = ( data_a[787..787]); - ram_block2a[788].portadatain[] = ( data_a[788..788]); - ram_block2a[789].portadatain[] = ( data_a[789..789]); - ram_block2a[790].portadatain[] = ( data_a[790..790]); - ram_block2a[791].portadatain[] = ( data_a[791..791]); - ram_block2a[792].portadatain[] = ( data_a[792..792]); - ram_block2a[793].portadatain[] = ( data_a[793..793]); - ram_block2a[794].portadatain[] = ( data_a[794..794]); - ram_block2a[795].portadatain[] = ( data_a[795..795]); - ram_block2a[796].portadatain[] = ( data_a[796..796]); - ram_block2a[797].portadatain[] = ( data_a[797..797]); - ram_block2a[798].portadatain[] = ( data_a[798..798]); - ram_block2a[799].portadatain[] = ( data_a[799..799]); - ram_block2a[800].portadatain[] = ( data_a[800..800]); - ram_block2a[801].portadatain[] = ( data_a[801..801]); - ram_block2a[802].portadatain[] = ( data_a[802..802]); - ram_block2a[803].portadatain[] = ( data_a[803..803]); - ram_block2a[804].portadatain[] = ( data_a[804..804]); - ram_block2a[805].portadatain[] = ( data_a[805..805]); - ram_block2a[806].portadatain[] = ( data_a[806..806]); - ram_block2a[807].portadatain[] = ( data_a[807..807]); - ram_block2a[808].portadatain[] = ( data_a[808..808]); - ram_block2a[809].portadatain[] = ( data_a[809..809]); - ram_block2a[810].portadatain[] = ( data_a[810..810]); - ram_block2a[811].portadatain[] = ( data_a[811..811]); - ram_block2a[812].portadatain[] = ( data_a[812..812]); - ram_block2a[813].portadatain[] = ( data_a[813..813]); - ram_block2a[814].portadatain[] = ( data_a[814..814]); - ram_block2a[815].portadatain[] = ( data_a[815..815]); - ram_block2a[816].portadatain[] = ( data_a[816..816]); - ram_block2a[817].portadatain[] = ( data_a[817..817]); - ram_block2a[818].portadatain[] = ( data_a[818..818]); - ram_block2a[819].portadatain[] = ( data_a[819..819]); - ram_block2a[820].portadatain[] = ( data_a[820..820]); - ram_block2a[821].portadatain[] = ( data_a[821..821]); - ram_block2a[822].portadatain[] = ( data_a[822..822]); - ram_block2a[823].portadatain[] = ( data_a[823..823]); - ram_block2a[824].portadatain[] = ( data_a[824..824]); - ram_block2a[825].portadatain[] = ( data_a[825..825]); - ram_block2a[826].portadatain[] = ( data_a[826..826]); - ram_block2a[827].portadatain[] = ( data_a[827..827]); - ram_block2a[828].portadatain[] = ( data_a[828..828]); - ram_block2a[829].portadatain[] = ( data_a[829..829]); - ram_block2a[830].portadatain[] = ( data_a[830..830]); - ram_block2a[831].portadatain[] = ( data_a[831..831]); - ram_block2a[832].portadatain[] = ( data_a[832..832]); - ram_block2a[833].portadatain[] = ( data_a[833..833]); - ram_block2a[834].portadatain[] = ( data_a[834..834]); - ram_block2a[835].portadatain[] = ( data_a[835..835]); - ram_block2a[836].portadatain[] = ( data_a[836..836]); - ram_block2a[837].portadatain[] = ( data_a[837..837]); - ram_block2a[838].portadatain[] = ( data_a[838..838]); - ram_block2a[839].portadatain[] = ( data_a[839..839]); - ram_block2a[840].portadatain[] = ( data_a[840..840]); - ram_block2a[841].portadatain[] = ( data_a[841..841]); - ram_block2a[842].portadatain[] = ( data_a[842..842]); - ram_block2a[843].portadatain[] = ( data_a[843..843]); - ram_block2a[844].portadatain[] = ( data_a[844..844]); - ram_block2a[845].portadatain[] = ( data_a[845..845]); - ram_block2a[846].portadatain[] = ( data_a[846..846]); - ram_block2a[847].portadatain[] = ( data_a[847..847]); - ram_block2a[848].portadatain[] = ( data_a[848..848]); - ram_block2a[849].portadatain[] = ( data_a[849..849]); - ram_block2a[850].portadatain[] = ( data_a[850..850]); - ram_block2a[851].portadatain[] = ( data_a[851..851]); - ram_block2a[852].portadatain[] = ( data_a[852..852]); - ram_block2a[853].portadatain[] = ( data_a[853..853]); - ram_block2a[854].portadatain[] = ( data_a[854..854]); - ram_block2a[855].portadatain[] = ( data_a[855..855]); - ram_block2a[856].portadatain[] = ( data_a[856..856]); - ram_block2a[857].portadatain[] = ( data_a[857..857]); - ram_block2a[858].portadatain[] = ( data_a[858..858]); - ram_block2a[859].portadatain[] = ( data_a[859..859]); - ram_block2a[860].portadatain[] = ( data_a[860..860]); - ram_block2a[861].portadatain[] = ( data_a[861..861]); - ram_block2a[862].portadatain[] = ( data_a[862..862]); - ram_block2a[863].portadatain[] = ( data_a[863..863]); - ram_block2a[864].portadatain[] = ( data_a[864..864]); - ram_block2a[865].portadatain[] = ( data_a[865..865]); - ram_block2a[866].portadatain[] = ( data_a[866..866]); - ram_block2a[867].portadatain[] = ( data_a[867..867]); - ram_block2a[868].portadatain[] = ( data_a[868..868]); - ram_block2a[869].portadatain[] = ( data_a[869..869]); - ram_block2a[870].portadatain[] = ( data_a[870..870]); - ram_block2a[871].portadatain[] = ( data_a[871..871]); - ram_block2a[872].portadatain[] = ( data_a[872..872]); - ram_block2a[873].portadatain[] = ( data_a[873..873]); - ram_block2a[874].portadatain[] = ( data_a[874..874]); - ram_block2a[875].portadatain[] = ( data_a[875..875]); - ram_block2a[876].portadatain[] = ( data_a[876..876]); - ram_block2a[877].portadatain[] = ( data_a[877..877]); - ram_block2a[878].portadatain[] = ( data_a[878..878]); - ram_block2a[879].portadatain[] = ( data_a[879..879]); - ram_block2a[880].portadatain[] = ( data_a[880..880]); - ram_block2a[881].portadatain[] = ( data_a[881..881]); - ram_block2a[882].portadatain[] = ( data_a[882..882]); - ram_block2a[883].portadatain[] = ( data_a[883..883]); - ram_block2a[884].portadatain[] = ( data_a[884..884]); - ram_block2a[885].portadatain[] = ( data_a[885..885]); - ram_block2a[886].portadatain[] = ( data_a[886..886]); - ram_block2a[887].portadatain[] = ( data_a[887..887]); - ram_block2a[888].portadatain[] = ( data_a[888..888]); - ram_block2a[889].portadatain[] = ( data_a[889..889]); - ram_block2a[890].portadatain[] = ( data_a[890..890]); - ram_block2a[891].portadatain[] = ( data_a[891..891]); - ram_block2a[892].portadatain[] = ( data_a[892..892]); - ram_block2a[893].portadatain[] = ( data_a[893..893]); - ram_block2a[894].portadatain[] = ( data_a[894..894]); - ram_block2a[895].portadatain[] = ( data_a[895..895]); - ram_block2a[896].portadatain[] = ( data_a[896..896]); - ram_block2a[897].portadatain[] = ( data_a[897..897]); - ram_block2a[898].portadatain[] = ( data_a[898..898]); - ram_block2a[899].portadatain[] = ( data_a[899..899]); - ram_block2a[900].portadatain[] = ( data_a[900..900]); - ram_block2a[901].portadatain[] = ( data_a[901..901]); - ram_block2a[902].portadatain[] = ( data_a[902..902]); - ram_block2a[903].portadatain[] = ( data_a[903..903]); - ram_block2a[904].portadatain[] = ( data_a[904..904]); - ram_block2a[905].portadatain[] = ( data_a[905..905]); - ram_block2a[906].portadatain[] = ( data_a[906..906]); - ram_block2a[907].portadatain[] = ( data_a[907..907]); - ram_block2a[908].portadatain[] = ( data_a[908..908]); - ram_block2a[909].portadatain[] = ( data_a[909..909]); - ram_block2a[910].portadatain[] = ( data_a[910..910]); - ram_block2a[911].portadatain[] = ( data_a[911..911]); - ram_block2a[912].portadatain[] = ( data_a[912..912]); - ram_block2a[913].portadatain[] = ( data_a[913..913]); - ram_block2a[914].portadatain[] = ( data_a[914..914]); - ram_block2a[915].portadatain[] = ( data_a[915..915]); - ram_block2a[916].portadatain[] = ( data_a[916..916]); - ram_block2a[917].portadatain[] = ( data_a[917..917]); - ram_block2a[918].portadatain[] = ( data_a[918..918]); - ram_block2a[919].portadatain[] = ( data_a[919..919]); - ram_block2a[920].portadatain[] = ( data_a[920..920]); - ram_block2a[921].portadatain[] = ( data_a[921..921]); - ram_block2a[922].portadatain[] = ( data_a[922..922]); - ram_block2a[923].portadatain[] = ( data_a[923..923]); - ram_block2a[924].portadatain[] = ( data_a[924..924]); - ram_block2a[925].portadatain[] = ( data_a[925..925]); - ram_block2a[926].portadatain[] = ( data_a[926..926]); - ram_block2a[927].portadatain[] = ( data_a[927..927]); - ram_block2a[928].portadatain[] = ( data_a[928..928]); - ram_block2a[929].portadatain[] = ( data_a[929..929]); - ram_block2a[930].portadatain[] = ( data_a[930..930]); - ram_block2a[931].portadatain[] = ( data_a[931..931]); - ram_block2a[932].portadatain[] = ( data_a[932..932]); - ram_block2a[933].portadatain[] = ( data_a[933..933]); - ram_block2a[934].portadatain[] = ( data_a[934..934]); - ram_block2a[935].portadatain[] = ( data_a[935..935]); - ram_block2a[936].portadatain[] = ( data_a[936..936]); - ram_block2a[937].portadatain[] = ( data_a[937..937]); - ram_block2a[938].portadatain[] = ( data_a[938..938]); - ram_block2a[939].portadatain[] = ( data_a[939..939]); - ram_block2a[940].portadatain[] = ( data_a[940..940]); - ram_block2a[941].portadatain[] = ( data_a[941..941]); - ram_block2a[942].portadatain[] = ( data_a[942..942]); - ram_block2a[943].portadatain[] = ( data_a[943..943]); - ram_block2a[944].portadatain[] = ( data_a[944..944]); - ram_block2a[945].portadatain[] = ( data_a[945..945]); - ram_block2a[946].portadatain[] = ( data_a[946..946]); - ram_block2a[947].portadatain[] = ( data_a[947..947]); - ram_block2a[948].portadatain[] = ( data_a[948..948]); - ram_block2a[949].portadatain[] = ( data_a[949..949]); - ram_block2a[950].portadatain[] = ( data_a[950..950]); - ram_block2a[951].portadatain[] = ( data_a[951..951]); - ram_block2a[952].portadatain[] = ( data_a[952..952]); - ram_block2a[953].portadatain[] = ( data_a[953..953]); - ram_block2a[954].portadatain[] = ( data_a[954..954]); - ram_block2a[955].portadatain[] = ( data_a[955..955]); - ram_block2a[956].portadatain[] = ( data_a[956..956]); - ram_block2a[957].portadatain[] = ( data_a[957..957]); - ram_block2a[958].portadatain[] = ( data_a[958..958]); - ram_block2a[959].portadatain[] = ( data_a[959..959]); - ram_block2a[960].portadatain[] = ( data_a[960..960]); - ram_block2a[961].portadatain[] = ( data_a[961..961]); - ram_block2a[962].portadatain[] = ( data_a[962..962]); - ram_block2a[963].portadatain[] = ( data_a[963..963]); - ram_block2a[964].portadatain[] = ( data_a[964..964]); - ram_block2a[965].portadatain[] = ( data_a[965..965]); - ram_block2a[966].portadatain[] = ( data_a[966..966]); - ram_block2a[967].portadatain[] = ( data_a[967..967]); - ram_block2a[968].portadatain[] = ( data_a[968..968]); - ram_block2a[969].portadatain[] = ( data_a[969..969]); - ram_block2a[970].portadatain[] = ( data_a[970..970]); - ram_block2a[971].portadatain[] = ( data_a[971..971]); - ram_block2a[972].portadatain[] = ( data_a[972..972]); - ram_block2a[973].portadatain[] = ( data_a[973..973]); - ram_block2a[974].portadatain[] = ( data_a[974..974]); - ram_block2a[975].portadatain[] = ( data_a[975..975]); - ram_block2a[976].portadatain[] = ( data_a[976..976]); - ram_block2a[977].portadatain[] = ( data_a[977..977]); - ram_block2a[978].portadatain[] = ( data_a[978..978]); - ram_block2a[979].portadatain[] = ( data_a[979..979]); - ram_block2a[980].portadatain[] = ( data_a[980..980]); - ram_block2a[981].portadatain[] = ( data_a[981..981]); - ram_block2a[982].portadatain[] = ( data_a[982..982]); - ram_block2a[983].portadatain[] = ( data_a[983..983]); - ram_block2a[984].portadatain[] = ( data_a[984..984]); - ram_block2a[985].portadatain[] = ( data_a[985..985]); - ram_block2a[986].portadatain[] = ( data_a[986..986]); - ram_block2a[987].portadatain[] = ( data_a[987..987]); - ram_block2a[988].portadatain[] = ( data_a[988..988]); - ram_block2a[989].portadatain[] = ( data_a[989..989]); - ram_block2a[990].portadatain[] = ( data_a[990..990]); - ram_block2a[991].portadatain[] = ( data_a[991..991]); - ram_block2a[992].portadatain[] = ( data_a[992..992]); - ram_block2a[993].portadatain[] = ( data_a[993..993]); - ram_block2a[994].portadatain[] = ( data_a[994..994]); - ram_block2a[995].portadatain[] = ( data_a[995..995]); - ram_block2a[996].portadatain[] = ( data_a[996..996]); - ram_block2a[997].portadatain[] = ( data_a[997..997]); - ram_block2a[998].portadatain[] = ( data_a[998..998]); - ram_block2a[999].portadatain[] = ( data_a[999..999]); - ram_block2a[1000].portadatain[] = ( data_a[1000..1000]); - ram_block2a[1001].portadatain[] = ( data_a[1001..1001]); - ram_block2a[1002].portadatain[] = ( data_a[1002..1002]); - ram_block2a[1003].portadatain[] = ( data_a[1003..1003]); - ram_block2a[1004].portadatain[] = ( data_a[1004..1004]); - ram_block2a[1005].portadatain[] = ( data_a[1005..1005]); - ram_block2a[1006].portadatain[] = ( data_a[1006..1006]); - ram_block2a[1007].portadatain[] = ( data_a[1007..1007]); - ram_block2a[1008].portadatain[] = ( data_a[1008..1008]); - ram_block2a[1009].portadatain[] = ( data_a[1009..1009]); - ram_block2a[1010].portadatain[] = ( data_a[1010..1010]); - ram_block2a[1011].portadatain[] = ( data_a[1011..1011]); - ram_block2a[1012].portadatain[] = ( data_a[1012..1012]); - ram_block2a[1013].portadatain[] = ( data_a[1013..1013]); - ram_block2a[1014].portadatain[] = ( data_a[1014..1014]); - ram_block2a[1015].portadatain[] = ( data_a[1015..1015]); - ram_block2a[1016].portadatain[] = ( data_a[1016..1016]); - ram_block2a[1017].portadatain[] = ( data_a[1017..1017]); - ram_block2a[1018].portadatain[] = ( data_a[1018..1018]); - ram_block2a[1019].portadatain[] = ( data_a[1019..1019]); - ram_block2a[1020].portadatain[] = ( data_a[1020..1020]); - ram_block2a[1021].portadatain[] = ( data_a[1021..1021]); - ram_block2a[1022].portadatain[] = ( data_a[1022..1022]); - ram_block2a[1023].portadatain[] = ( data_a[1023..1023]); - ram_block2a[1024].portadatain[] = ( data_a[1024..1024]); - ram_block2a[1025].portadatain[] = ( data_a[1025..1025]); - ram_block2a[1026].portadatain[] = ( data_a[1026..1026]); - ram_block2a[1027].portadatain[] = ( data_a[1027..1027]); - ram_block2a[1028].portadatain[] = ( data_a[1028..1028]); - ram_block2a[1029].portadatain[] = ( data_a[1029..1029]); - ram_block2a[1030].portadatain[] = ( data_a[1030..1030]); - ram_block2a[1031].portadatain[] = ( data_a[1031..1031]); - ram_block2a[1032].portadatain[] = ( data_a[1032..1032]); - ram_block2a[1033].portadatain[] = ( data_a[1033..1033]); - ram_block2a[1034].portadatain[] = ( data_a[1034..1034]); - ram_block2a[1035].portadatain[] = ( data_a[1035..1035]); - ram_block2a[1036].portadatain[] = ( data_a[1036..1036]); - ram_block2a[1037].portadatain[] = ( data_a[1037..1037]); - ram_block2a[1038].portadatain[] = ( data_a[1038..1038]); - ram_block2a[1039].portadatain[] = ( data_a[1039..1039]); - ram_block2a[1040].portadatain[] = ( data_a[1040..1040]); - ram_block2a[1041].portadatain[] = ( data_a[1041..1041]); - ram_block2a[1042].portadatain[] = ( data_a[1042..1042]); - ram_block2a[1043].portadatain[] = ( data_a[1043..1043]); - ram_block2a[1044].portadatain[] = ( data_a[1044..1044]); - ram_block2a[1045].portadatain[] = ( data_a[1045..1045]); - ram_block2a[1046].portadatain[] = ( data_a[1046..1046]); - ram_block2a[1047].portadatain[] = ( data_a[1047..1047]); - ram_block2a[1048].portadatain[] = ( data_a[1048..1048]); - ram_block2a[1049].portadatain[] = ( data_a[1049..1049]); - ram_block2a[1050].portadatain[] = ( data_a[1050..1050]); - ram_block2a[1051].portadatain[] = ( data_a[1051..1051]); - ram_block2a[1052].portadatain[] = ( data_a[1052..1052]); - ram_block2a[1052..0].portawe = wren_a; - ram_block2a[1052..0].portbaddr[] = ( address_b_wire[2..0]); - ram_block2a[1052..0].portbre = B"111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[1052..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_hlsq1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_hlsq1.tdf deleted file mode 100644 index a609f61..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_hlsq1.tdf +++ /dev/null @@ -1,1045 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=1024 NUMWORDS_B=1024 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="M20K" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=32 WIDTH_B=32 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=10 WIDTHAD_B=10 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = M20K 2 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_hlsq1 -( - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram3_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 1023, - PORT_A_LOGICAL_RAM_DEPTH = 1024, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 1023, - PORT_B_LOGICAL_RAM_DEPTH = 1024, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - address_a_wire[9..0] : WIRE; - address_b_wire[9..0] : WIRE; - q_b_wire[31..0] : WIRE; - -BEGIN - ram_block2a[31..0].clk0 = clock0; - ram_block2a[31..0].portaaddr[] = ( address_a_wire[9..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[31..0].portawe = wren_a; - ram_block2a[31..0].portbaddr[] = ( address_b_wire[9..0]); - ram_block2a[31..0].portbre = B"11111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[31..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_j85g1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_j85g1.tdf deleted file mode 100644 index fa6d614..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_j85g1.tdf +++ /dev/null @@ -1,9657 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=16 NUMWORDS_B=16 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=320 WIDTH_B=320 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=4 WIDTHAD_B=4 WREN_POWER_OPTIMIZATION="OFF" aclr0 address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 5120 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_j85g1 -( - aclr0 : input; - address_a[3..0] : input; - address_b[3..0] : input; - clock0 : input; - clock1 : input; - data_a[319..0] : input; - q_b[319..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 128, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 128, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 129, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 129, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 130, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 130, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 131, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 131, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 132, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 132, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 133, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 133, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 134, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 134, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 135, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 135, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 136, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 136, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 137, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 137, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 138, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 138, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 139, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 139, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 140, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 140, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 141, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 141, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 142, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 142, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 143, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 143, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 144, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 144, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 145, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 145, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 146, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 146, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 147, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 147, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 148, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 148, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 149, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 149, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 150, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 150, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 151, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 151, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 152, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 152, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 153, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 153, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 154, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 154, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 155, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 155, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 156, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 156, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 157, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 157, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 158, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 158, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 159, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 159, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 160, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 160, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 161, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 161, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 162, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 162, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 163, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 163, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 164, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 164, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 165, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 165, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 166, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 166, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 167, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 167, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 168, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 168, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 169, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 169, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 170, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 170, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 171, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 171, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 172, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 172, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 173, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 173, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 174, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 174, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 175, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 175, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 176, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 176, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 177, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 177, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 178, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 178, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 179, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 179, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 180, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 180, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 181, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 181, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 182, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 182, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 183, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 183, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 184, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 184, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 185, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 185, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 186, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 186, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 187, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 187, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 188, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 188, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 189, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 189, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 190, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 190, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 191, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 191, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 192, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 192, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 193, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 193, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 194, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 194, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 195, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 195, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 196, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 196, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 197, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 197, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 198, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 198, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 199, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 199, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 200, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 200, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 201, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 201, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 202, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 202, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 203, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 203, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 204, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 204, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 205, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 205, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 206, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 206, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 207, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 207, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 208, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 208, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 209, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 209, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 210, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 210, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 211, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 211, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 212, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 212, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 213, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 213, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 214, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 214, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 215, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 215, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 216, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 216, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 217, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 217, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 218, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 218, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 219, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 219, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 220, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 220, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 221, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 221, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 222, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 222, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 223, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 223, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 224, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 224, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 225, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 225, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 226, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 226, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 227, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 227, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 228, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 228, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 229, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 229, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 230, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 230, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 231, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 231, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 232, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 232, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 233, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 233, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 234, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 234, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 235, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 235, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 236, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 236, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 237, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 237, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 238, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 238, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 239, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 239, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a240 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 240, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 240, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a241 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 241, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 241, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a242 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 242, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 242, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a243 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 243, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 243, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a244 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 244, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 244, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a245 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 245, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 245, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a246 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 246, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 246, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a247 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 247, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 247, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a248 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 248, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 248, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a249 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 249, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 249, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a250 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 250, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 250, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a251 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 251, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 251, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a252 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 252, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 252, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a253 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 253, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 253, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a254 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 254, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 254, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a255 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 255, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 255, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a256 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 256, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 256, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a257 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 257, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 257, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a258 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 258, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 258, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a259 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 259, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 259, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a260 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 260, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 260, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a261 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 261, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 261, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a262 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 262, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 262, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a263 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 263, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 263, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a264 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 264, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 264, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a265 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 265, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 265, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a266 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 266, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 266, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a267 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 267, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 267, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a268 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 268, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 268, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a269 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 269, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 269, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a270 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 270, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 270, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a271 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 271, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 271, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a272 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 272, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 272, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a273 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 273, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 273, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a274 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 274, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 274, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a275 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 275, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 275, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a276 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 276, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 276, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a277 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 277, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 277, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a278 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 278, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 278, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a279 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 279, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 279, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a280 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 280, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 280, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a281 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 281, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 281, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a282 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 282, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 282, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a283 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 283, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 283, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a284 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 284, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 284, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a285 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 285, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 285, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a286 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 286, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 286, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a287 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 287, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 287, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a288 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 288, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 288, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a289 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 289, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 289, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a290 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 290, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 290, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a291 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 291, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 291, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a292 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 292, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 292, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a293 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 293, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 293, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a294 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 294, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 294, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a295 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 295, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 295, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a296 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 296, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 296, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a297 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 297, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 297, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a298 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 298, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 298, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a299 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 299, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 299, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a300 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 300, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 300, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a301 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 301, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 301, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a302 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 302, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 302, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a303 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 303, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 303, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a304 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 304, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 304, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a305 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 305, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 305, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a306 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 306, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 306, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a307 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 307, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 307, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a308 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 308, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 308, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a309 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 309, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 309, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a310 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 310, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 310, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a311 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 311, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 311, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a312 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 312, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 312, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a313 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 313, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 313, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a314 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 314, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 314, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a315 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 315, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 315, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a316 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 316, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 316, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a317 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 317, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 317, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a318 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 318, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 318, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a319 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 4, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 319, - PORT_A_LAST_ADDRESS = 15, - PORT_A_LOGICAL_RAM_DEPTH = 16, - PORT_A_LOGICAL_RAM_WIDTH = 320, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 4, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 319, - PORT_B_LAST_ADDRESS = 15, - PORT_B_LOGICAL_RAM_DEPTH = 16, - PORT_B_LOGICAL_RAM_WIDTH = 320, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[3..0] : WIRE; - address_b_wire[3..0] : WIRE; - q_b_wire[319..0] : WIRE; - -BEGIN - ram_block2a[319..0].aclr = aclr0; - ram_block2a[319..0].clk0 = clock0; - ram_block2a[319..0].clk1 = clock1; - ram_block2a[319..0].portaaddr[] = ( address_a_wire[3..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[128].portadatain[] = ( data_a[128..128]); - ram_block2a[129].portadatain[] = ( data_a[129..129]); - ram_block2a[130].portadatain[] = ( data_a[130..130]); - ram_block2a[131].portadatain[] = ( data_a[131..131]); - ram_block2a[132].portadatain[] = ( data_a[132..132]); - ram_block2a[133].portadatain[] = ( data_a[133..133]); - ram_block2a[134].portadatain[] = ( data_a[134..134]); - ram_block2a[135].portadatain[] = ( data_a[135..135]); - ram_block2a[136].portadatain[] = ( data_a[136..136]); - ram_block2a[137].portadatain[] = ( data_a[137..137]); - ram_block2a[138].portadatain[] = ( data_a[138..138]); - ram_block2a[139].portadatain[] = ( data_a[139..139]); - ram_block2a[140].portadatain[] = ( data_a[140..140]); - ram_block2a[141].portadatain[] = ( data_a[141..141]); - ram_block2a[142].portadatain[] = ( data_a[142..142]); - ram_block2a[143].portadatain[] = ( data_a[143..143]); - ram_block2a[144].portadatain[] = ( data_a[144..144]); - ram_block2a[145].portadatain[] = ( data_a[145..145]); - ram_block2a[146].portadatain[] = ( data_a[146..146]); - ram_block2a[147].portadatain[] = ( data_a[147..147]); - ram_block2a[148].portadatain[] = ( data_a[148..148]); - ram_block2a[149].portadatain[] = ( data_a[149..149]); - ram_block2a[150].portadatain[] = ( data_a[150..150]); - ram_block2a[151].portadatain[] = ( data_a[151..151]); - ram_block2a[152].portadatain[] = ( data_a[152..152]); - ram_block2a[153].portadatain[] = ( data_a[153..153]); - ram_block2a[154].portadatain[] = ( data_a[154..154]); - ram_block2a[155].portadatain[] = ( data_a[155..155]); - ram_block2a[156].portadatain[] = ( data_a[156..156]); - ram_block2a[157].portadatain[] = ( data_a[157..157]); - ram_block2a[158].portadatain[] = ( data_a[158..158]); - ram_block2a[159].portadatain[] = ( data_a[159..159]); - ram_block2a[160].portadatain[] = ( data_a[160..160]); - ram_block2a[161].portadatain[] = ( data_a[161..161]); - ram_block2a[162].portadatain[] = ( data_a[162..162]); - ram_block2a[163].portadatain[] = ( data_a[163..163]); - ram_block2a[164].portadatain[] = ( data_a[164..164]); - ram_block2a[165].portadatain[] = ( data_a[165..165]); - ram_block2a[166].portadatain[] = ( data_a[166..166]); - ram_block2a[167].portadatain[] = ( data_a[167..167]); - ram_block2a[168].portadatain[] = ( data_a[168..168]); - ram_block2a[169].portadatain[] = ( data_a[169..169]); - ram_block2a[170].portadatain[] = ( data_a[170..170]); - ram_block2a[171].portadatain[] = ( data_a[171..171]); - ram_block2a[172].portadatain[] = ( data_a[172..172]); - ram_block2a[173].portadatain[] = ( data_a[173..173]); - ram_block2a[174].portadatain[] = ( data_a[174..174]); - ram_block2a[175].portadatain[] = ( data_a[175..175]); - ram_block2a[176].portadatain[] = ( data_a[176..176]); - ram_block2a[177].portadatain[] = ( data_a[177..177]); - ram_block2a[178].portadatain[] = ( data_a[178..178]); - ram_block2a[179].portadatain[] = ( data_a[179..179]); - ram_block2a[180].portadatain[] = ( data_a[180..180]); - ram_block2a[181].portadatain[] = ( data_a[181..181]); - ram_block2a[182].portadatain[] = ( data_a[182..182]); - ram_block2a[183].portadatain[] = ( data_a[183..183]); - ram_block2a[184].portadatain[] = ( data_a[184..184]); - ram_block2a[185].portadatain[] = ( data_a[185..185]); - ram_block2a[186].portadatain[] = ( data_a[186..186]); - ram_block2a[187].portadatain[] = ( data_a[187..187]); - ram_block2a[188].portadatain[] = ( data_a[188..188]); - ram_block2a[189].portadatain[] = ( data_a[189..189]); - ram_block2a[190].portadatain[] = ( data_a[190..190]); - ram_block2a[191].portadatain[] = ( data_a[191..191]); - ram_block2a[192].portadatain[] = ( data_a[192..192]); - ram_block2a[193].portadatain[] = ( data_a[193..193]); - ram_block2a[194].portadatain[] = ( data_a[194..194]); - ram_block2a[195].portadatain[] = ( data_a[195..195]); - ram_block2a[196].portadatain[] = ( data_a[196..196]); - ram_block2a[197].portadatain[] = ( data_a[197..197]); - ram_block2a[198].portadatain[] = ( data_a[198..198]); - ram_block2a[199].portadatain[] = ( data_a[199..199]); - ram_block2a[200].portadatain[] = ( data_a[200..200]); - ram_block2a[201].portadatain[] = ( data_a[201..201]); - ram_block2a[202].portadatain[] = ( data_a[202..202]); - ram_block2a[203].portadatain[] = ( data_a[203..203]); - ram_block2a[204].portadatain[] = ( data_a[204..204]); - ram_block2a[205].portadatain[] = ( data_a[205..205]); - ram_block2a[206].portadatain[] = ( data_a[206..206]); - ram_block2a[207].portadatain[] = ( data_a[207..207]); - ram_block2a[208].portadatain[] = ( data_a[208..208]); - ram_block2a[209].portadatain[] = ( data_a[209..209]); - ram_block2a[210].portadatain[] = ( data_a[210..210]); - ram_block2a[211].portadatain[] = ( data_a[211..211]); - ram_block2a[212].portadatain[] = ( data_a[212..212]); - ram_block2a[213].portadatain[] = ( data_a[213..213]); - ram_block2a[214].portadatain[] = ( data_a[214..214]); - ram_block2a[215].portadatain[] = ( data_a[215..215]); - ram_block2a[216].portadatain[] = ( data_a[216..216]); - ram_block2a[217].portadatain[] = ( data_a[217..217]); - ram_block2a[218].portadatain[] = ( data_a[218..218]); - ram_block2a[219].portadatain[] = ( data_a[219..219]); - ram_block2a[220].portadatain[] = ( data_a[220..220]); - ram_block2a[221].portadatain[] = ( data_a[221..221]); - ram_block2a[222].portadatain[] = ( data_a[222..222]); - ram_block2a[223].portadatain[] = ( data_a[223..223]); - ram_block2a[224].portadatain[] = ( data_a[224..224]); - ram_block2a[225].portadatain[] = ( data_a[225..225]); - ram_block2a[226].portadatain[] = ( data_a[226..226]); - ram_block2a[227].portadatain[] = ( data_a[227..227]); - ram_block2a[228].portadatain[] = ( data_a[228..228]); - ram_block2a[229].portadatain[] = ( data_a[229..229]); - ram_block2a[230].portadatain[] = ( data_a[230..230]); - ram_block2a[231].portadatain[] = ( data_a[231..231]); - ram_block2a[232].portadatain[] = ( data_a[232..232]); - ram_block2a[233].portadatain[] = ( data_a[233..233]); - ram_block2a[234].portadatain[] = ( data_a[234..234]); - ram_block2a[235].portadatain[] = ( data_a[235..235]); - ram_block2a[236].portadatain[] = ( data_a[236..236]); - ram_block2a[237].portadatain[] = ( data_a[237..237]); - ram_block2a[238].portadatain[] = ( data_a[238..238]); - ram_block2a[239].portadatain[] = ( data_a[239..239]); - ram_block2a[240].portadatain[] = ( data_a[240..240]); - ram_block2a[241].portadatain[] = ( data_a[241..241]); - ram_block2a[242].portadatain[] = ( data_a[242..242]); - ram_block2a[243].portadatain[] = ( data_a[243..243]); - ram_block2a[244].portadatain[] = ( data_a[244..244]); - ram_block2a[245].portadatain[] = ( data_a[245..245]); - ram_block2a[246].portadatain[] = ( data_a[246..246]); - ram_block2a[247].portadatain[] = ( data_a[247..247]); - ram_block2a[248].portadatain[] = ( data_a[248..248]); - ram_block2a[249].portadatain[] = ( data_a[249..249]); - ram_block2a[250].portadatain[] = ( data_a[250..250]); - ram_block2a[251].portadatain[] = ( data_a[251..251]); - ram_block2a[252].portadatain[] = ( data_a[252..252]); - ram_block2a[253].portadatain[] = ( data_a[253..253]); - ram_block2a[254].portadatain[] = ( data_a[254..254]); - ram_block2a[255].portadatain[] = ( data_a[255..255]); - ram_block2a[256].portadatain[] = ( data_a[256..256]); - ram_block2a[257].portadatain[] = ( data_a[257..257]); - ram_block2a[258].portadatain[] = ( data_a[258..258]); - ram_block2a[259].portadatain[] = ( data_a[259..259]); - ram_block2a[260].portadatain[] = ( data_a[260..260]); - ram_block2a[261].portadatain[] = ( data_a[261..261]); - ram_block2a[262].portadatain[] = ( data_a[262..262]); - ram_block2a[263].portadatain[] = ( data_a[263..263]); - ram_block2a[264].portadatain[] = ( data_a[264..264]); - ram_block2a[265].portadatain[] = ( data_a[265..265]); - ram_block2a[266].portadatain[] = ( data_a[266..266]); - ram_block2a[267].portadatain[] = ( data_a[267..267]); - ram_block2a[268].portadatain[] = ( data_a[268..268]); - ram_block2a[269].portadatain[] = ( data_a[269..269]); - ram_block2a[270].portadatain[] = ( data_a[270..270]); - ram_block2a[271].portadatain[] = ( data_a[271..271]); - ram_block2a[272].portadatain[] = ( data_a[272..272]); - ram_block2a[273].portadatain[] = ( data_a[273..273]); - ram_block2a[274].portadatain[] = ( data_a[274..274]); - ram_block2a[275].portadatain[] = ( data_a[275..275]); - ram_block2a[276].portadatain[] = ( data_a[276..276]); - ram_block2a[277].portadatain[] = ( data_a[277..277]); - ram_block2a[278].portadatain[] = ( data_a[278..278]); - ram_block2a[279].portadatain[] = ( data_a[279..279]); - ram_block2a[280].portadatain[] = ( data_a[280..280]); - ram_block2a[281].portadatain[] = ( data_a[281..281]); - ram_block2a[282].portadatain[] = ( data_a[282..282]); - ram_block2a[283].portadatain[] = ( data_a[283..283]); - ram_block2a[284].portadatain[] = ( data_a[284..284]); - ram_block2a[285].portadatain[] = ( data_a[285..285]); - ram_block2a[286].portadatain[] = ( data_a[286..286]); - ram_block2a[287].portadatain[] = ( data_a[287..287]); - ram_block2a[288].portadatain[] = ( data_a[288..288]); - ram_block2a[289].portadatain[] = ( data_a[289..289]); - ram_block2a[290].portadatain[] = ( data_a[290..290]); - ram_block2a[291].portadatain[] = ( data_a[291..291]); - ram_block2a[292].portadatain[] = ( data_a[292..292]); - ram_block2a[293].portadatain[] = ( data_a[293..293]); - ram_block2a[294].portadatain[] = ( data_a[294..294]); - ram_block2a[295].portadatain[] = ( data_a[295..295]); - ram_block2a[296].portadatain[] = ( data_a[296..296]); - ram_block2a[297].portadatain[] = ( data_a[297..297]); - ram_block2a[298].portadatain[] = ( data_a[298..298]); - ram_block2a[299].portadatain[] = ( data_a[299..299]); - ram_block2a[300].portadatain[] = ( data_a[300..300]); - ram_block2a[301].portadatain[] = ( data_a[301..301]); - ram_block2a[302].portadatain[] = ( data_a[302..302]); - ram_block2a[303].portadatain[] = ( data_a[303..303]); - ram_block2a[304].portadatain[] = ( data_a[304..304]); - ram_block2a[305].portadatain[] = ( data_a[305..305]); - ram_block2a[306].portadatain[] = ( data_a[306..306]); - ram_block2a[307].portadatain[] = ( data_a[307..307]); - ram_block2a[308].portadatain[] = ( data_a[308..308]); - ram_block2a[309].portadatain[] = ( data_a[309..309]); - ram_block2a[310].portadatain[] = ( data_a[310..310]); - ram_block2a[311].portadatain[] = ( data_a[311..311]); - ram_block2a[312].portadatain[] = ( data_a[312..312]); - ram_block2a[313].portadatain[] = ( data_a[313..313]); - ram_block2a[314].portadatain[] = ( data_a[314..314]); - ram_block2a[315].portadatain[] = ( data_a[315..315]); - ram_block2a[316].portadatain[] = ( data_a[316..316]); - ram_block2a[317].portadatain[] = ( data_a[317..317]); - ram_block2a[318].portadatain[] = ( data_a[318..318]); - ram_block2a[319].portadatain[] = ( data_a[319..319]); - ram_block2a[319..0].portawe = wren_a; - ram_block2a[319..0].portbaddr[] = ( address_b_wire[3..0]); - ram_block2a[319..0].portbre = B"11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[319..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_rq6n.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_rq6n.tdf deleted file mode 100644 index fba815d..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_rq6n.tdf +++ /dev/null @@ -1,30793 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=65536 NUMWORDS_B=65536 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="M20K" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=32 WIDTH_B=32 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=16 WIDTHAD_B=16 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION decode_1j971 (data[4..0], enable) -RETURNS ( eq[31..0]); -FUNCTION mux_33p31 (data[1023..0], sel[4..0]) -RETURNS ( result[31..0]); -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = lut 367 M20K 128 reg 5 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_rq6n -( - address_a[15..0] : input; - address_b[15..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - address_reg_b[4..0] : dffe; - decode3 : decode_1j971; - mux4 : mux_33p31; - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 2048, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 4095, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 2048, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 4095, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 4096, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 6143, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 4096, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 6143, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 6144, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 8191, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 6144, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 8191, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 8192, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 10239, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 8192, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 10239, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 10240, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 12287, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 10240, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 12287, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 12288, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 14335, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 12288, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 14335, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a240 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a241 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a242 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a243 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a244 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a245 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a246 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a247 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a248 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a249 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a250 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a251 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a252 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a253 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a254 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a255 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 14336, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 16383, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 14336, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 16383, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a256 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a257 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a258 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a259 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a260 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a261 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a262 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a263 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a264 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a265 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a266 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a267 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a268 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a269 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a270 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a271 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a272 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a273 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a274 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a275 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a276 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a277 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a278 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a279 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a280 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a281 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a282 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a283 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a284 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a285 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a286 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a287 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 16384, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 18431, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 16384, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 18431, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a288 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a289 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a290 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a291 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a292 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a293 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a294 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a295 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a296 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a297 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a298 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a299 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a300 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a301 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a302 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a303 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a304 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a305 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a306 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a307 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a308 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a309 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a310 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a311 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a312 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a313 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a314 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a315 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a316 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a317 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a318 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a319 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 18432, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 20479, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 18432, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 20479, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a320 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a321 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a322 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a323 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a324 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a325 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a326 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a327 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a328 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a329 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a330 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a331 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a332 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a333 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a334 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a335 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a336 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a337 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a338 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a339 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a340 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a341 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a342 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a343 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a344 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a345 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a346 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a347 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a348 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a349 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a350 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a351 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 20480, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 22527, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 20480, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 22527, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a352 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a353 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a354 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a355 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a356 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a357 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a358 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a359 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a360 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a361 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a362 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a363 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a364 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a365 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a366 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a367 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a368 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a369 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a370 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a371 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a372 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a373 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a374 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a375 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a376 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a377 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a378 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a379 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a380 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a381 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a382 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a383 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 22528, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 24575, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 22528, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 24575, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a384 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a385 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a386 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a387 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a388 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a389 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a390 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a391 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a392 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a393 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a394 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a395 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a396 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a397 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a398 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a399 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a400 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a401 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a402 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a403 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a404 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a405 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a406 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a407 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a408 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a409 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a410 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a411 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a412 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a413 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a414 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a415 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 24576, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 26623, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 24576, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 26623, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a416 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a417 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a418 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a419 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a420 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a421 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a422 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a423 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a424 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a425 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a426 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a427 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a428 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a429 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a430 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a431 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a432 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a433 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a434 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a435 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a436 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a437 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a438 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a439 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a440 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a441 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a442 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a443 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a444 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a445 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a446 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a447 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 26624, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 28671, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 26624, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 28671, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a448 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a449 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a450 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a451 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a452 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a453 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a454 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a455 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a456 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a457 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a458 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a459 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a460 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a461 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a462 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a463 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a464 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a465 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a466 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a467 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a468 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a469 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a470 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a471 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a472 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a473 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a474 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a475 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a476 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a477 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a478 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a479 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 28672, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 30719, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 28672, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 30719, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a480 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a481 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a482 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a483 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a484 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a485 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a486 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a487 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a488 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a489 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a490 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a491 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a492 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a493 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a494 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a495 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a496 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a497 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a498 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a499 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a500 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a501 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a502 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a503 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a504 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a505 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a506 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a507 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a508 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a509 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a510 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a511 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 30720, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 32767, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 30720, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 32767, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a512 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a513 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a514 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a515 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a516 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a517 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a518 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a519 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a520 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a521 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a522 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a523 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a524 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a525 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a526 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a527 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a528 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a529 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a530 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a531 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a532 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a533 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a534 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a535 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a536 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a537 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a538 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a539 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a540 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a541 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a542 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a543 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 32768, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 34815, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 32768, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 34815, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a544 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a545 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a546 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a547 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a548 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a549 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a550 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a551 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a552 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a553 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a554 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a555 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a556 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a557 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a558 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a559 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a560 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a561 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a562 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a563 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a564 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a565 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a566 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a567 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a568 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a569 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a570 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a571 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a572 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a573 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a574 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a575 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 34816, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 36863, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 34816, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 36863, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a576 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a577 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a578 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a579 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a580 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a581 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a582 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a583 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a584 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a585 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a586 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a587 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a588 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a589 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a590 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a591 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a592 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a593 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a594 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a595 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a596 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a597 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a598 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a599 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a600 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a601 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a602 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a603 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a604 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a605 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a606 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a607 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 36864, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 38911, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 36864, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 38911, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a608 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a609 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a610 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a611 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a612 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a613 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a614 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a615 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a616 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a617 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a618 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a619 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a620 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a621 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a622 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a623 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a624 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a625 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a626 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a627 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a628 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a629 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a630 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a631 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a632 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a633 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a634 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a635 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a636 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a637 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a638 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a639 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 38912, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 40959, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 38912, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 40959, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a640 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a641 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a642 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a643 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a644 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a645 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a646 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a647 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a648 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a649 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a650 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a651 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a652 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a653 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a654 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a655 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a656 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a657 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a658 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a659 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a660 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a661 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a662 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a663 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a664 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a665 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a666 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a667 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a668 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a669 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a670 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a671 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 40960, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 43007, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 40960, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 43007, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a672 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a673 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a674 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a675 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a676 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a677 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a678 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a679 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a680 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a681 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a682 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a683 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a684 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a685 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a686 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a687 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a688 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a689 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a690 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a691 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a692 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a693 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a694 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a695 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a696 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a697 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a698 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a699 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a700 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a701 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a702 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a703 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 43008, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 45055, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 43008, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 45055, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a704 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a705 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a706 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a707 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a708 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a709 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a710 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a711 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a712 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a713 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a714 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a715 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a716 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a717 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a718 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a719 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a720 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a721 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a722 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a723 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a724 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a725 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a726 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a727 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a728 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a729 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a730 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a731 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a732 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a733 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a734 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a735 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 45056, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 47103, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 45056, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 47103, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a736 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a737 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a738 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a739 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a740 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a741 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a742 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a743 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a744 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a745 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a746 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a747 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a748 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a749 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a750 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a751 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a752 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a753 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a754 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a755 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a756 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a757 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a758 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a759 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a760 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a761 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a762 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a763 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a764 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a765 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a766 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a767 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 47104, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 49151, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 47104, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 49151, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a768 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a769 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a770 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a771 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a772 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a773 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a774 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a775 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a776 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a777 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a778 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a779 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a780 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a781 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a782 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a783 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a784 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a785 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a786 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a787 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a788 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a789 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a790 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a791 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a792 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a793 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a794 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a795 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a796 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a797 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a798 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a799 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 49152, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 51199, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 49152, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 51199, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a800 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a801 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a802 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a803 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a804 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a805 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a806 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a807 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a808 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a809 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a810 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a811 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a812 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a813 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a814 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a815 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a816 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a817 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a818 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a819 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a820 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a821 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a822 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a823 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a824 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a825 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a826 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a827 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a828 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a829 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a830 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a831 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 51200, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 53247, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 51200, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 53247, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a832 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a833 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a834 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a835 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a836 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a837 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a838 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a839 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a840 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a841 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a842 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a843 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a844 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a845 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a846 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a847 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a848 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a849 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a850 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a851 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a852 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a853 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a854 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a855 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a856 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a857 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a858 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a859 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a860 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a861 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a862 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a863 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 53248, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 55295, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 53248, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 55295, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a864 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a865 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a866 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a867 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a868 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a869 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a870 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a871 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a872 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a873 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a874 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a875 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a876 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a877 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a878 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a879 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a880 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a881 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a882 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a883 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a884 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a885 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a886 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a887 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a888 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a889 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a890 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a891 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a892 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a893 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a894 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a895 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 55296, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 57343, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 55296, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 57343, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a896 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a897 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a898 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a899 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a900 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a901 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a902 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a903 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a904 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a905 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a906 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a907 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a908 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a909 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a910 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a911 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a912 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a913 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a914 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a915 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a916 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a917 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a918 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a919 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a920 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a921 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a922 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a923 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a924 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a925 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a926 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a927 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 57344, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 59391, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 57344, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 59391, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a928 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a929 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a930 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a931 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a932 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a933 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a934 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a935 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a936 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a937 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a938 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a939 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a940 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a941 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a942 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a943 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a944 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a945 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a946 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a947 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a948 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a949 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a950 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a951 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a952 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a953 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a954 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a955 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a956 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a957 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a958 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a959 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 59392, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 61439, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 59392, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 61439, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a960 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a961 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a962 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a963 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a964 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a965 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a966 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a967 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a968 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a969 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a970 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a971 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a972 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a973 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a974 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a975 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a976 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a977 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a978 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a979 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a980 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a981 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a982 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a983 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a984 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a985 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a986 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a987 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a988 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a989 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a990 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a991 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 61440, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 63487, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 61440, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 63487, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a992 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a993 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a994 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a995 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a996 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a997 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a998 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a999 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1000 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1001 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1002 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1003 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1004 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1005 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1006 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1007 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1008 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1009 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1010 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1011 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1012 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1013 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1014 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1015 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1016 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1017 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1018 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1019 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1020 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1021 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1022 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - ram_block2a1023 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "ena1", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 63488, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 65535, - PORT_A_LOGICAL_RAM_DEPTH = 65536, - PORT_A_LOGICAL_RAM_WIDTH = 32, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 63488, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 65535, - PORT_B_LOGICAL_RAM_DEPTH = 65536, - PORT_B_LOGICAL_RAM_WIDTH = 32, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "M20K" - ); - address_a_wire[15..0] : WIRE; - address_b_sel[4..0] : WIRE; - address_b_wire[15..0] : WIRE; - q_b_wire[31..0] : WIRE; - -BEGIN - address_reg_b[].clk = clock1; - address_reg_b[].d = address_b_sel[]; - address_reg_b[].ena = clocken1; - decode3.data[4..0] = address_a_wire[15..11]; - decode3.enable = wren_a; - mux4.data[] = ( ram_block2a[1023..0].portbdataout[0..0]); - mux4.sel[] = address_reg_b[].q; - ram_block2a[1023..0].clk0 = clock0; - ram_block2a[1023..0].clk1 = clock1; - ram_block2a[1023..0].ena1 = clocken1; - ram_block2a[1023..0].portaaddr[] = ( address_a_wire[10..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[0..0]); - ram_block2a[33].portadatain[] = ( data_a[1..1]); - ram_block2a[34].portadatain[] = ( data_a[2..2]); - ram_block2a[35].portadatain[] = ( data_a[3..3]); - ram_block2a[36].portadatain[] = ( data_a[4..4]); - ram_block2a[37].portadatain[] = ( data_a[5..5]); - ram_block2a[38].portadatain[] = ( data_a[6..6]); - ram_block2a[39].portadatain[] = ( data_a[7..7]); - ram_block2a[40].portadatain[] = ( data_a[8..8]); - ram_block2a[41].portadatain[] = ( data_a[9..9]); - ram_block2a[42].portadatain[] = ( data_a[10..10]); - ram_block2a[43].portadatain[] = ( data_a[11..11]); - ram_block2a[44].portadatain[] = ( data_a[12..12]); - ram_block2a[45].portadatain[] = ( data_a[13..13]); - ram_block2a[46].portadatain[] = ( data_a[14..14]); - ram_block2a[47].portadatain[] = ( data_a[15..15]); - ram_block2a[48].portadatain[] = ( data_a[16..16]); - ram_block2a[49].portadatain[] = ( data_a[17..17]); - ram_block2a[50].portadatain[] = ( data_a[18..18]); - ram_block2a[51].portadatain[] = ( data_a[19..19]); - ram_block2a[52].portadatain[] = ( data_a[20..20]); - ram_block2a[53].portadatain[] = ( data_a[21..21]); - ram_block2a[54].portadatain[] = ( data_a[22..22]); - ram_block2a[55].portadatain[] = ( data_a[23..23]); - ram_block2a[56].portadatain[] = ( data_a[24..24]); - ram_block2a[57].portadatain[] = ( data_a[25..25]); - ram_block2a[58].portadatain[] = ( data_a[26..26]); - ram_block2a[59].portadatain[] = ( data_a[27..27]); - ram_block2a[60].portadatain[] = ( data_a[28..28]); - ram_block2a[61].portadatain[] = ( data_a[29..29]); - ram_block2a[62].portadatain[] = ( data_a[30..30]); - ram_block2a[63].portadatain[] = ( data_a[31..31]); - ram_block2a[64].portadatain[] = ( data_a[0..0]); - ram_block2a[65].portadatain[] = ( data_a[1..1]); - ram_block2a[66].portadatain[] = ( data_a[2..2]); - ram_block2a[67].portadatain[] = ( data_a[3..3]); - ram_block2a[68].portadatain[] = ( data_a[4..4]); - ram_block2a[69].portadatain[] = ( data_a[5..5]); - ram_block2a[70].portadatain[] = ( data_a[6..6]); - ram_block2a[71].portadatain[] = ( data_a[7..7]); - ram_block2a[72].portadatain[] = ( data_a[8..8]); - ram_block2a[73].portadatain[] = ( data_a[9..9]); - ram_block2a[74].portadatain[] = ( data_a[10..10]); - ram_block2a[75].portadatain[] = ( data_a[11..11]); - ram_block2a[76].portadatain[] = ( data_a[12..12]); - ram_block2a[77].portadatain[] = ( data_a[13..13]); - ram_block2a[78].portadatain[] = ( data_a[14..14]); - ram_block2a[79].portadatain[] = ( data_a[15..15]); - ram_block2a[80].portadatain[] = ( data_a[16..16]); - ram_block2a[81].portadatain[] = ( data_a[17..17]); - ram_block2a[82].portadatain[] = ( data_a[18..18]); - ram_block2a[83].portadatain[] = ( data_a[19..19]); - ram_block2a[84].portadatain[] = ( data_a[20..20]); - ram_block2a[85].portadatain[] = ( data_a[21..21]); - ram_block2a[86].portadatain[] = ( data_a[22..22]); - ram_block2a[87].portadatain[] = ( data_a[23..23]); - ram_block2a[88].portadatain[] = ( data_a[24..24]); - ram_block2a[89].portadatain[] = ( data_a[25..25]); - ram_block2a[90].portadatain[] = ( data_a[26..26]); - ram_block2a[91].portadatain[] = ( data_a[27..27]); - ram_block2a[92].portadatain[] = ( data_a[28..28]); - ram_block2a[93].portadatain[] = ( data_a[29..29]); - ram_block2a[94].portadatain[] = ( data_a[30..30]); - ram_block2a[95].portadatain[] = ( data_a[31..31]); - ram_block2a[96].portadatain[] = ( data_a[0..0]); - ram_block2a[97].portadatain[] = ( data_a[1..1]); - ram_block2a[98].portadatain[] = ( data_a[2..2]); - ram_block2a[99].portadatain[] = ( data_a[3..3]); - ram_block2a[100].portadatain[] = ( data_a[4..4]); - ram_block2a[101].portadatain[] = ( data_a[5..5]); - ram_block2a[102].portadatain[] = ( data_a[6..6]); - ram_block2a[103].portadatain[] = ( data_a[7..7]); - ram_block2a[104].portadatain[] = ( data_a[8..8]); - ram_block2a[105].portadatain[] = ( data_a[9..9]); - ram_block2a[106].portadatain[] = ( data_a[10..10]); - ram_block2a[107].portadatain[] = ( data_a[11..11]); - ram_block2a[108].portadatain[] = ( data_a[12..12]); - ram_block2a[109].portadatain[] = ( data_a[13..13]); - ram_block2a[110].portadatain[] = ( data_a[14..14]); - ram_block2a[111].portadatain[] = ( data_a[15..15]); - ram_block2a[112].portadatain[] = ( data_a[16..16]); - ram_block2a[113].portadatain[] = ( data_a[17..17]); - ram_block2a[114].portadatain[] = ( data_a[18..18]); - ram_block2a[115].portadatain[] = ( data_a[19..19]); - ram_block2a[116].portadatain[] = ( data_a[20..20]); - ram_block2a[117].portadatain[] = ( data_a[21..21]); - ram_block2a[118].portadatain[] = ( data_a[22..22]); - ram_block2a[119].portadatain[] = ( data_a[23..23]); - ram_block2a[120].portadatain[] = ( data_a[24..24]); - ram_block2a[121].portadatain[] = ( data_a[25..25]); - ram_block2a[122].portadatain[] = ( data_a[26..26]); - ram_block2a[123].portadatain[] = ( data_a[27..27]); - ram_block2a[124].portadatain[] = ( data_a[28..28]); - ram_block2a[125].portadatain[] = ( data_a[29..29]); - ram_block2a[126].portadatain[] = ( data_a[30..30]); - ram_block2a[127].portadatain[] = ( data_a[31..31]); - ram_block2a[128].portadatain[] = ( data_a[0..0]); - ram_block2a[129].portadatain[] = ( data_a[1..1]); - ram_block2a[130].portadatain[] = ( data_a[2..2]); - ram_block2a[131].portadatain[] = ( data_a[3..3]); - ram_block2a[132].portadatain[] = ( data_a[4..4]); - ram_block2a[133].portadatain[] = ( data_a[5..5]); - ram_block2a[134].portadatain[] = ( data_a[6..6]); - ram_block2a[135].portadatain[] = ( data_a[7..7]); - ram_block2a[136].portadatain[] = ( data_a[8..8]); - ram_block2a[137].portadatain[] = ( data_a[9..9]); - ram_block2a[138].portadatain[] = ( data_a[10..10]); - ram_block2a[139].portadatain[] = ( data_a[11..11]); - ram_block2a[140].portadatain[] = ( data_a[12..12]); - ram_block2a[141].portadatain[] = ( data_a[13..13]); - ram_block2a[142].portadatain[] = ( data_a[14..14]); - ram_block2a[143].portadatain[] = ( data_a[15..15]); - ram_block2a[144].portadatain[] = ( data_a[16..16]); - ram_block2a[145].portadatain[] = ( data_a[17..17]); - ram_block2a[146].portadatain[] = ( data_a[18..18]); - ram_block2a[147].portadatain[] = ( data_a[19..19]); - ram_block2a[148].portadatain[] = ( data_a[20..20]); - ram_block2a[149].portadatain[] = ( data_a[21..21]); - ram_block2a[150].portadatain[] = ( data_a[22..22]); - ram_block2a[151].portadatain[] = ( data_a[23..23]); - ram_block2a[152].portadatain[] = ( data_a[24..24]); - ram_block2a[153].portadatain[] = ( data_a[25..25]); - ram_block2a[154].portadatain[] = ( data_a[26..26]); - ram_block2a[155].portadatain[] = ( data_a[27..27]); - ram_block2a[156].portadatain[] = ( data_a[28..28]); - ram_block2a[157].portadatain[] = ( data_a[29..29]); - ram_block2a[158].portadatain[] = ( data_a[30..30]); - ram_block2a[159].portadatain[] = ( data_a[31..31]); - ram_block2a[160].portadatain[] = ( data_a[0..0]); - ram_block2a[161].portadatain[] = ( data_a[1..1]); - ram_block2a[162].portadatain[] = ( data_a[2..2]); - ram_block2a[163].portadatain[] = ( data_a[3..3]); - ram_block2a[164].portadatain[] = ( data_a[4..4]); - ram_block2a[165].portadatain[] = ( data_a[5..5]); - ram_block2a[166].portadatain[] = ( data_a[6..6]); - ram_block2a[167].portadatain[] = ( data_a[7..7]); - ram_block2a[168].portadatain[] = ( data_a[8..8]); - ram_block2a[169].portadatain[] = ( data_a[9..9]); - ram_block2a[170].portadatain[] = ( data_a[10..10]); - ram_block2a[171].portadatain[] = ( data_a[11..11]); - ram_block2a[172].portadatain[] = ( data_a[12..12]); - ram_block2a[173].portadatain[] = ( data_a[13..13]); - ram_block2a[174].portadatain[] = ( data_a[14..14]); - ram_block2a[175].portadatain[] = ( data_a[15..15]); - ram_block2a[176].portadatain[] = ( data_a[16..16]); - ram_block2a[177].portadatain[] = ( data_a[17..17]); - ram_block2a[178].portadatain[] = ( data_a[18..18]); - ram_block2a[179].portadatain[] = ( data_a[19..19]); - ram_block2a[180].portadatain[] = ( data_a[20..20]); - ram_block2a[181].portadatain[] = ( data_a[21..21]); - ram_block2a[182].portadatain[] = ( data_a[22..22]); - ram_block2a[183].portadatain[] = ( data_a[23..23]); - ram_block2a[184].portadatain[] = ( data_a[24..24]); - ram_block2a[185].portadatain[] = ( data_a[25..25]); - ram_block2a[186].portadatain[] = ( data_a[26..26]); - ram_block2a[187].portadatain[] = ( data_a[27..27]); - ram_block2a[188].portadatain[] = ( data_a[28..28]); - ram_block2a[189].portadatain[] = ( data_a[29..29]); - ram_block2a[190].portadatain[] = ( data_a[30..30]); - ram_block2a[191].portadatain[] = ( data_a[31..31]); - ram_block2a[192].portadatain[] = ( data_a[0..0]); - ram_block2a[193].portadatain[] = ( data_a[1..1]); - ram_block2a[194].portadatain[] = ( data_a[2..2]); - ram_block2a[195].portadatain[] = ( data_a[3..3]); - ram_block2a[196].portadatain[] = ( data_a[4..4]); - ram_block2a[197].portadatain[] = ( data_a[5..5]); - ram_block2a[198].portadatain[] = ( data_a[6..6]); - ram_block2a[199].portadatain[] = ( data_a[7..7]); - ram_block2a[200].portadatain[] = ( data_a[8..8]); - ram_block2a[201].portadatain[] = ( data_a[9..9]); - ram_block2a[202].portadatain[] = ( data_a[10..10]); - ram_block2a[203].portadatain[] = ( data_a[11..11]); - ram_block2a[204].portadatain[] = ( data_a[12..12]); - ram_block2a[205].portadatain[] = ( data_a[13..13]); - ram_block2a[206].portadatain[] = ( data_a[14..14]); - ram_block2a[207].portadatain[] = ( data_a[15..15]); - ram_block2a[208].portadatain[] = ( data_a[16..16]); - ram_block2a[209].portadatain[] = ( data_a[17..17]); - ram_block2a[210].portadatain[] = ( data_a[18..18]); - ram_block2a[211].portadatain[] = ( data_a[19..19]); - ram_block2a[212].portadatain[] = ( data_a[20..20]); - ram_block2a[213].portadatain[] = ( data_a[21..21]); - ram_block2a[214].portadatain[] = ( data_a[22..22]); - ram_block2a[215].portadatain[] = ( data_a[23..23]); - ram_block2a[216].portadatain[] = ( data_a[24..24]); - ram_block2a[217].portadatain[] = ( data_a[25..25]); - ram_block2a[218].portadatain[] = ( data_a[26..26]); - ram_block2a[219].portadatain[] = ( data_a[27..27]); - ram_block2a[220].portadatain[] = ( data_a[28..28]); - ram_block2a[221].portadatain[] = ( data_a[29..29]); - ram_block2a[222].portadatain[] = ( data_a[30..30]); - ram_block2a[223].portadatain[] = ( data_a[31..31]); - ram_block2a[224].portadatain[] = ( data_a[0..0]); - ram_block2a[225].portadatain[] = ( data_a[1..1]); - ram_block2a[226].portadatain[] = ( data_a[2..2]); - ram_block2a[227].portadatain[] = ( data_a[3..3]); - ram_block2a[228].portadatain[] = ( data_a[4..4]); - ram_block2a[229].portadatain[] = ( data_a[5..5]); - ram_block2a[230].portadatain[] = ( data_a[6..6]); - ram_block2a[231].portadatain[] = ( data_a[7..7]); - ram_block2a[232].portadatain[] = ( data_a[8..8]); - ram_block2a[233].portadatain[] = ( data_a[9..9]); - ram_block2a[234].portadatain[] = ( data_a[10..10]); - ram_block2a[235].portadatain[] = ( data_a[11..11]); - ram_block2a[236].portadatain[] = ( data_a[12..12]); - ram_block2a[237].portadatain[] = ( data_a[13..13]); - ram_block2a[238].portadatain[] = ( data_a[14..14]); - ram_block2a[239].portadatain[] = ( data_a[15..15]); - ram_block2a[240].portadatain[] = ( data_a[16..16]); - ram_block2a[241].portadatain[] = ( data_a[17..17]); - ram_block2a[242].portadatain[] = ( data_a[18..18]); - ram_block2a[243].portadatain[] = ( data_a[19..19]); - ram_block2a[244].portadatain[] = ( data_a[20..20]); - ram_block2a[245].portadatain[] = ( data_a[21..21]); - ram_block2a[246].portadatain[] = ( data_a[22..22]); - ram_block2a[247].portadatain[] = ( data_a[23..23]); - ram_block2a[248].portadatain[] = ( data_a[24..24]); - ram_block2a[249].portadatain[] = ( data_a[25..25]); - ram_block2a[250].portadatain[] = ( data_a[26..26]); - ram_block2a[251].portadatain[] = ( data_a[27..27]); - ram_block2a[252].portadatain[] = ( data_a[28..28]); - ram_block2a[253].portadatain[] = ( data_a[29..29]); - ram_block2a[254].portadatain[] = ( data_a[30..30]); - ram_block2a[255].portadatain[] = ( data_a[31..31]); - ram_block2a[256].portadatain[] = ( data_a[0..0]); - ram_block2a[257].portadatain[] = ( data_a[1..1]); - ram_block2a[258].portadatain[] = ( data_a[2..2]); - ram_block2a[259].portadatain[] = ( data_a[3..3]); - ram_block2a[260].portadatain[] = ( data_a[4..4]); - ram_block2a[261].portadatain[] = ( data_a[5..5]); - ram_block2a[262].portadatain[] = ( data_a[6..6]); - ram_block2a[263].portadatain[] = ( data_a[7..7]); - ram_block2a[264].portadatain[] = ( data_a[8..8]); - ram_block2a[265].portadatain[] = ( data_a[9..9]); - ram_block2a[266].portadatain[] = ( data_a[10..10]); - ram_block2a[267].portadatain[] = ( data_a[11..11]); - ram_block2a[268].portadatain[] = ( data_a[12..12]); - ram_block2a[269].portadatain[] = ( data_a[13..13]); - ram_block2a[270].portadatain[] = ( data_a[14..14]); - ram_block2a[271].portadatain[] = ( data_a[15..15]); - ram_block2a[272].portadatain[] = ( data_a[16..16]); - ram_block2a[273].portadatain[] = ( data_a[17..17]); - ram_block2a[274].portadatain[] = ( data_a[18..18]); - ram_block2a[275].portadatain[] = ( data_a[19..19]); - ram_block2a[276].portadatain[] = ( data_a[20..20]); - ram_block2a[277].portadatain[] = ( data_a[21..21]); - ram_block2a[278].portadatain[] = ( data_a[22..22]); - ram_block2a[279].portadatain[] = ( data_a[23..23]); - ram_block2a[280].portadatain[] = ( data_a[24..24]); - ram_block2a[281].portadatain[] = ( data_a[25..25]); - ram_block2a[282].portadatain[] = ( data_a[26..26]); - ram_block2a[283].portadatain[] = ( data_a[27..27]); - ram_block2a[284].portadatain[] = ( data_a[28..28]); - ram_block2a[285].portadatain[] = ( data_a[29..29]); - ram_block2a[286].portadatain[] = ( data_a[30..30]); - ram_block2a[287].portadatain[] = ( data_a[31..31]); - ram_block2a[288].portadatain[] = ( data_a[0..0]); - ram_block2a[289].portadatain[] = ( data_a[1..1]); - ram_block2a[290].portadatain[] = ( data_a[2..2]); - ram_block2a[291].portadatain[] = ( data_a[3..3]); - ram_block2a[292].portadatain[] = ( data_a[4..4]); - ram_block2a[293].portadatain[] = ( data_a[5..5]); - ram_block2a[294].portadatain[] = ( data_a[6..6]); - ram_block2a[295].portadatain[] = ( data_a[7..7]); - ram_block2a[296].portadatain[] = ( data_a[8..8]); - ram_block2a[297].portadatain[] = ( data_a[9..9]); - ram_block2a[298].portadatain[] = ( data_a[10..10]); - ram_block2a[299].portadatain[] = ( data_a[11..11]); - ram_block2a[300].portadatain[] = ( data_a[12..12]); - ram_block2a[301].portadatain[] = ( data_a[13..13]); - ram_block2a[302].portadatain[] = ( data_a[14..14]); - ram_block2a[303].portadatain[] = ( data_a[15..15]); - ram_block2a[304].portadatain[] = ( data_a[16..16]); - ram_block2a[305].portadatain[] = ( data_a[17..17]); - ram_block2a[306].portadatain[] = ( data_a[18..18]); - ram_block2a[307].portadatain[] = ( data_a[19..19]); - ram_block2a[308].portadatain[] = ( data_a[20..20]); - ram_block2a[309].portadatain[] = ( data_a[21..21]); - ram_block2a[310].portadatain[] = ( data_a[22..22]); - ram_block2a[311].portadatain[] = ( data_a[23..23]); - ram_block2a[312].portadatain[] = ( data_a[24..24]); - ram_block2a[313].portadatain[] = ( data_a[25..25]); - ram_block2a[314].portadatain[] = ( data_a[26..26]); - ram_block2a[315].portadatain[] = ( data_a[27..27]); - ram_block2a[316].portadatain[] = ( data_a[28..28]); - ram_block2a[317].portadatain[] = ( data_a[29..29]); - ram_block2a[318].portadatain[] = ( data_a[30..30]); - ram_block2a[319].portadatain[] = ( data_a[31..31]); - ram_block2a[320].portadatain[] = ( data_a[0..0]); - ram_block2a[321].portadatain[] = ( data_a[1..1]); - ram_block2a[322].portadatain[] = ( data_a[2..2]); - ram_block2a[323].portadatain[] = ( data_a[3..3]); - ram_block2a[324].portadatain[] = ( data_a[4..4]); - ram_block2a[325].portadatain[] = ( data_a[5..5]); - ram_block2a[326].portadatain[] = ( data_a[6..6]); - ram_block2a[327].portadatain[] = ( data_a[7..7]); - ram_block2a[328].portadatain[] = ( data_a[8..8]); - ram_block2a[329].portadatain[] = ( data_a[9..9]); - ram_block2a[330].portadatain[] = ( data_a[10..10]); - ram_block2a[331].portadatain[] = ( data_a[11..11]); - ram_block2a[332].portadatain[] = ( data_a[12..12]); - ram_block2a[333].portadatain[] = ( data_a[13..13]); - ram_block2a[334].portadatain[] = ( data_a[14..14]); - ram_block2a[335].portadatain[] = ( data_a[15..15]); - ram_block2a[336].portadatain[] = ( data_a[16..16]); - ram_block2a[337].portadatain[] = ( data_a[17..17]); - ram_block2a[338].portadatain[] = ( data_a[18..18]); - ram_block2a[339].portadatain[] = ( data_a[19..19]); - ram_block2a[340].portadatain[] = ( data_a[20..20]); - ram_block2a[341].portadatain[] = ( data_a[21..21]); - ram_block2a[342].portadatain[] = ( data_a[22..22]); - ram_block2a[343].portadatain[] = ( data_a[23..23]); - ram_block2a[344].portadatain[] = ( data_a[24..24]); - ram_block2a[345].portadatain[] = ( data_a[25..25]); - ram_block2a[346].portadatain[] = ( data_a[26..26]); - ram_block2a[347].portadatain[] = ( data_a[27..27]); - ram_block2a[348].portadatain[] = ( data_a[28..28]); - ram_block2a[349].portadatain[] = ( data_a[29..29]); - ram_block2a[350].portadatain[] = ( data_a[30..30]); - ram_block2a[351].portadatain[] = ( data_a[31..31]); - ram_block2a[352].portadatain[] = ( data_a[0..0]); - ram_block2a[353].portadatain[] = ( data_a[1..1]); - ram_block2a[354].portadatain[] = ( data_a[2..2]); - ram_block2a[355].portadatain[] = ( data_a[3..3]); - ram_block2a[356].portadatain[] = ( data_a[4..4]); - ram_block2a[357].portadatain[] = ( data_a[5..5]); - ram_block2a[358].portadatain[] = ( data_a[6..6]); - ram_block2a[359].portadatain[] = ( data_a[7..7]); - ram_block2a[360].portadatain[] = ( data_a[8..8]); - ram_block2a[361].portadatain[] = ( data_a[9..9]); - ram_block2a[362].portadatain[] = ( data_a[10..10]); - ram_block2a[363].portadatain[] = ( data_a[11..11]); - ram_block2a[364].portadatain[] = ( data_a[12..12]); - ram_block2a[365].portadatain[] = ( data_a[13..13]); - ram_block2a[366].portadatain[] = ( data_a[14..14]); - ram_block2a[367].portadatain[] = ( data_a[15..15]); - ram_block2a[368].portadatain[] = ( data_a[16..16]); - ram_block2a[369].portadatain[] = ( data_a[17..17]); - ram_block2a[370].portadatain[] = ( data_a[18..18]); - ram_block2a[371].portadatain[] = ( data_a[19..19]); - ram_block2a[372].portadatain[] = ( data_a[20..20]); - ram_block2a[373].portadatain[] = ( data_a[21..21]); - ram_block2a[374].portadatain[] = ( data_a[22..22]); - ram_block2a[375].portadatain[] = ( data_a[23..23]); - ram_block2a[376].portadatain[] = ( data_a[24..24]); - ram_block2a[377].portadatain[] = ( data_a[25..25]); - ram_block2a[378].portadatain[] = ( data_a[26..26]); - ram_block2a[379].portadatain[] = ( data_a[27..27]); - ram_block2a[380].portadatain[] = ( data_a[28..28]); - ram_block2a[381].portadatain[] = ( data_a[29..29]); - ram_block2a[382].portadatain[] = ( data_a[30..30]); - ram_block2a[383].portadatain[] = ( data_a[31..31]); - ram_block2a[384].portadatain[] = ( data_a[0..0]); - ram_block2a[385].portadatain[] = ( data_a[1..1]); - ram_block2a[386].portadatain[] = ( data_a[2..2]); - ram_block2a[387].portadatain[] = ( data_a[3..3]); - ram_block2a[388].portadatain[] = ( data_a[4..4]); - ram_block2a[389].portadatain[] = ( data_a[5..5]); - ram_block2a[390].portadatain[] = ( data_a[6..6]); - ram_block2a[391].portadatain[] = ( data_a[7..7]); - ram_block2a[392].portadatain[] = ( data_a[8..8]); - ram_block2a[393].portadatain[] = ( data_a[9..9]); - ram_block2a[394].portadatain[] = ( data_a[10..10]); - ram_block2a[395].portadatain[] = ( data_a[11..11]); - ram_block2a[396].portadatain[] = ( data_a[12..12]); - ram_block2a[397].portadatain[] = ( data_a[13..13]); - ram_block2a[398].portadatain[] = ( data_a[14..14]); - ram_block2a[399].portadatain[] = ( data_a[15..15]); - ram_block2a[400].portadatain[] = ( data_a[16..16]); - ram_block2a[401].portadatain[] = ( data_a[17..17]); - ram_block2a[402].portadatain[] = ( data_a[18..18]); - ram_block2a[403].portadatain[] = ( data_a[19..19]); - ram_block2a[404].portadatain[] = ( data_a[20..20]); - ram_block2a[405].portadatain[] = ( data_a[21..21]); - ram_block2a[406].portadatain[] = ( data_a[22..22]); - ram_block2a[407].portadatain[] = ( data_a[23..23]); - ram_block2a[408].portadatain[] = ( data_a[24..24]); - ram_block2a[409].portadatain[] = ( data_a[25..25]); - ram_block2a[410].portadatain[] = ( data_a[26..26]); - ram_block2a[411].portadatain[] = ( data_a[27..27]); - ram_block2a[412].portadatain[] = ( data_a[28..28]); - ram_block2a[413].portadatain[] = ( data_a[29..29]); - ram_block2a[414].portadatain[] = ( data_a[30..30]); - ram_block2a[415].portadatain[] = ( data_a[31..31]); - ram_block2a[416].portadatain[] = ( data_a[0..0]); - ram_block2a[417].portadatain[] = ( data_a[1..1]); - ram_block2a[418].portadatain[] = ( data_a[2..2]); - ram_block2a[419].portadatain[] = ( data_a[3..3]); - ram_block2a[420].portadatain[] = ( data_a[4..4]); - ram_block2a[421].portadatain[] = ( data_a[5..5]); - ram_block2a[422].portadatain[] = ( data_a[6..6]); - ram_block2a[423].portadatain[] = ( data_a[7..7]); - ram_block2a[424].portadatain[] = ( data_a[8..8]); - ram_block2a[425].portadatain[] = ( data_a[9..9]); - ram_block2a[426].portadatain[] = ( data_a[10..10]); - ram_block2a[427].portadatain[] = ( data_a[11..11]); - ram_block2a[428].portadatain[] = ( data_a[12..12]); - ram_block2a[429].portadatain[] = ( data_a[13..13]); - ram_block2a[430].portadatain[] = ( data_a[14..14]); - ram_block2a[431].portadatain[] = ( data_a[15..15]); - ram_block2a[432].portadatain[] = ( data_a[16..16]); - ram_block2a[433].portadatain[] = ( data_a[17..17]); - ram_block2a[434].portadatain[] = ( data_a[18..18]); - ram_block2a[435].portadatain[] = ( data_a[19..19]); - ram_block2a[436].portadatain[] = ( data_a[20..20]); - ram_block2a[437].portadatain[] = ( data_a[21..21]); - ram_block2a[438].portadatain[] = ( data_a[22..22]); - ram_block2a[439].portadatain[] = ( data_a[23..23]); - ram_block2a[440].portadatain[] = ( data_a[24..24]); - ram_block2a[441].portadatain[] = ( data_a[25..25]); - ram_block2a[442].portadatain[] = ( data_a[26..26]); - ram_block2a[443].portadatain[] = ( data_a[27..27]); - ram_block2a[444].portadatain[] = ( data_a[28..28]); - ram_block2a[445].portadatain[] = ( data_a[29..29]); - ram_block2a[446].portadatain[] = ( data_a[30..30]); - ram_block2a[447].portadatain[] = ( data_a[31..31]); - ram_block2a[448].portadatain[] = ( data_a[0..0]); - ram_block2a[449].portadatain[] = ( data_a[1..1]); - ram_block2a[450].portadatain[] = ( data_a[2..2]); - ram_block2a[451].portadatain[] = ( data_a[3..3]); - ram_block2a[452].portadatain[] = ( data_a[4..4]); - ram_block2a[453].portadatain[] = ( data_a[5..5]); - ram_block2a[454].portadatain[] = ( data_a[6..6]); - ram_block2a[455].portadatain[] = ( data_a[7..7]); - ram_block2a[456].portadatain[] = ( data_a[8..8]); - ram_block2a[457].portadatain[] = ( data_a[9..9]); - ram_block2a[458].portadatain[] = ( data_a[10..10]); - ram_block2a[459].portadatain[] = ( data_a[11..11]); - ram_block2a[460].portadatain[] = ( data_a[12..12]); - ram_block2a[461].portadatain[] = ( data_a[13..13]); - ram_block2a[462].portadatain[] = ( data_a[14..14]); - ram_block2a[463].portadatain[] = ( data_a[15..15]); - ram_block2a[464].portadatain[] = ( data_a[16..16]); - ram_block2a[465].portadatain[] = ( data_a[17..17]); - ram_block2a[466].portadatain[] = ( data_a[18..18]); - ram_block2a[467].portadatain[] = ( data_a[19..19]); - ram_block2a[468].portadatain[] = ( data_a[20..20]); - ram_block2a[469].portadatain[] = ( data_a[21..21]); - ram_block2a[470].portadatain[] = ( data_a[22..22]); - ram_block2a[471].portadatain[] = ( data_a[23..23]); - ram_block2a[472].portadatain[] = ( data_a[24..24]); - ram_block2a[473].portadatain[] = ( data_a[25..25]); - ram_block2a[474].portadatain[] = ( data_a[26..26]); - ram_block2a[475].portadatain[] = ( data_a[27..27]); - ram_block2a[476].portadatain[] = ( data_a[28..28]); - ram_block2a[477].portadatain[] = ( data_a[29..29]); - ram_block2a[478].portadatain[] = ( data_a[30..30]); - ram_block2a[479].portadatain[] = ( data_a[31..31]); - ram_block2a[480].portadatain[] = ( data_a[0..0]); - ram_block2a[481].portadatain[] = ( data_a[1..1]); - ram_block2a[482].portadatain[] = ( data_a[2..2]); - ram_block2a[483].portadatain[] = ( data_a[3..3]); - ram_block2a[484].portadatain[] = ( data_a[4..4]); - ram_block2a[485].portadatain[] = ( data_a[5..5]); - ram_block2a[486].portadatain[] = ( data_a[6..6]); - ram_block2a[487].portadatain[] = ( data_a[7..7]); - ram_block2a[488].portadatain[] = ( data_a[8..8]); - ram_block2a[489].portadatain[] = ( data_a[9..9]); - ram_block2a[490].portadatain[] = ( data_a[10..10]); - ram_block2a[491].portadatain[] = ( data_a[11..11]); - ram_block2a[492].portadatain[] = ( data_a[12..12]); - ram_block2a[493].portadatain[] = ( data_a[13..13]); - ram_block2a[494].portadatain[] = ( data_a[14..14]); - ram_block2a[495].portadatain[] = ( data_a[15..15]); - ram_block2a[496].portadatain[] = ( data_a[16..16]); - ram_block2a[497].portadatain[] = ( data_a[17..17]); - ram_block2a[498].portadatain[] = ( data_a[18..18]); - ram_block2a[499].portadatain[] = ( data_a[19..19]); - ram_block2a[500].portadatain[] = ( data_a[20..20]); - ram_block2a[501].portadatain[] = ( data_a[21..21]); - ram_block2a[502].portadatain[] = ( data_a[22..22]); - ram_block2a[503].portadatain[] = ( data_a[23..23]); - ram_block2a[504].portadatain[] = ( data_a[24..24]); - ram_block2a[505].portadatain[] = ( data_a[25..25]); - ram_block2a[506].portadatain[] = ( data_a[26..26]); - ram_block2a[507].portadatain[] = ( data_a[27..27]); - ram_block2a[508].portadatain[] = ( data_a[28..28]); - ram_block2a[509].portadatain[] = ( data_a[29..29]); - ram_block2a[510].portadatain[] = ( data_a[30..30]); - ram_block2a[511].portadatain[] = ( data_a[31..31]); - ram_block2a[512].portadatain[] = ( data_a[0..0]); - ram_block2a[513].portadatain[] = ( data_a[1..1]); - ram_block2a[514].portadatain[] = ( data_a[2..2]); - ram_block2a[515].portadatain[] = ( data_a[3..3]); - ram_block2a[516].portadatain[] = ( data_a[4..4]); - ram_block2a[517].portadatain[] = ( data_a[5..5]); - ram_block2a[518].portadatain[] = ( data_a[6..6]); - ram_block2a[519].portadatain[] = ( data_a[7..7]); - ram_block2a[520].portadatain[] = ( data_a[8..8]); - ram_block2a[521].portadatain[] = ( data_a[9..9]); - ram_block2a[522].portadatain[] = ( data_a[10..10]); - ram_block2a[523].portadatain[] = ( data_a[11..11]); - ram_block2a[524].portadatain[] = ( data_a[12..12]); - ram_block2a[525].portadatain[] = ( data_a[13..13]); - ram_block2a[526].portadatain[] = ( data_a[14..14]); - ram_block2a[527].portadatain[] = ( data_a[15..15]); - ram_block2a[528].portadatain[] = ( data_a[16..16]); - ram_block2a[529].portadatain[] = ( data_a[17..17]); - ram_block2a[530].portadatain[] = ( data_a[18..18]); - ram_block2a[531].portadatain[] = ( data_a[19..19]); - ram_block2a[532].portadatain[] = ( data_a[20..20]); - ram_block2a[533].portadatain[] = ( data_a[21..21]); - ram_block2a[534].portadatain[] = ( data_a[22..22]); - ram_block2a[535].portadatain[] = ( data_a[23..23]); - ram_block2a[536].portadatain[] = ( data_a[24..24]); - ram_block2a[537].portadatain[] = ( data_a[25..25]); - ram_block2a[538].portadatain[] = ( data_a[26..26]); - ram_block2a[539].portadatain[] = ( data_a[27..27]); - ram_block2a[540].portadatain[] = ( data_a[28..28]); - ram_block2a[541].portadatain[] = ( data_a[29..29]); - ram_block2a[542].portadatain[] = ( data_a[30..30]); - ram_block2a[543].portadatain[] = ( data_a[31..31]); - ram_block2a[544].portadatain[] = ( data_a[0..0]); - ram_block2a[545].portadatain[] = ( data_a[1..1]); - ram_block2a[546].portadatain[] = ( data_a[2..2]); - ram_block2a[547].portadatain[] = ( data_a[3..3]); - ram_block2a[548].portadatain[] = ( data_a[4..4]); - ram_block2a[549].portadatain[] = ( data_a[5..5]); - ram_block2a[550].portadatain[] = ( data_a[6..6]); - ram_block2a[551].portadatain[] = ( data_a[7..7]); - ram_block2a[552].portadatain[] = ( data_a[8..8]); - ram_block2a[553].portadatain[] = ( data_a[9..9]); - ram_block2a[554].portadatain[] = ( data_a[10..10]); - ram_block2a[555].portadatain[] = ( data_a[11..11]); - ram_block2a[556].portadatain[] = ( data_a[12..12]); - ram_block2a[557].portadatain[] = ( data_a[13..13]); - ram_block2a[558].portadatain[] = ( data_a[14..14]); - ram_block2a[559].portadatain[] = ( data_a[15..15]); - ram_block2a[560].portadatain[] = ( data_a[16..16]); - ram_block2a[561].portadatain[] = ( data_a[17..17]); - ram_block2a[562].portadatain[] = ( data_a[18..18]); - ram_block2a[563].portadatain[] = ( data_a[19..19]); - ram_block2a[564].portadatain[] = ( data_a[20..20]); - ram_block2a[565].portadatain[] = ( data_a[21..21]); - ram_block2a[566].portadatain[] = ( data_a[22..22]); - ram_block2a[567].portadatain[] = ( data_a[23..23]); - ram_block2a[568].portadatain[] = ( data_a[24..24]); - ram_block2a[569].portadatain[] = ( data_a[25..25]); - ram_block2a[570].portadatain[] = ( data_a[26..26]); - ram_block2a[571].portadatain[] = ( data_a[27..27]); - ram_block2a[572].portadatain[] = ( data_a[28..28]); - ram_block2a[573].portadatain[] = ( data_a[29..29]); - ram_block2a[574].portadatain[] = ( data_a[30..30]); - ram_block2a[575].portadatain[] = ( data_a[31..31]); - ram_block2a[576].portadatain[] = ( data_a[0..0]); - ram_block2a[577].portadatain[] = ( data_a[1..1]); - ram_block2a[578].portadatain[] = ( data_a[2..2]); - ram_block2a[579].portadatain[] = ( data_a[3..3]); - ram_block2a[580].portadatain[] = ( data_a[4..4]); - ram_block2a[581].portadatain[] = ( data_a[5..5]); - ram_block2a[582].portadatain[] = ( data_a[6..6]); - ram_block2a[583].portadatain[] = ( data_a[7..7]); - ram_block2a[584].portadatain[] = ( data_a[8..8]); - ram_block2a[585].portadatain[] = ( data_a[9..9]); - ram_block2a[586].portadatain[] = ( data_a[10..10]); - ram_block2a[587].portadatain[] = ( data_a[11..11]); - ram_block2a[588].portadatain[] = ( data_a[12..12]); - ram_block2a[589].portadatain[] = ( data_a[13..13]); - ram_block2a[590].portadatain[] = ( data_a[14..14]); - ram_block2a[591].portadatain[] = ( data_a[15..15]); - ram_block2a[592].portadatain[] = ( data_a[16..16]); - ram_block2a[593].portadatain[] = ( data_a[17..17]); - ram_block2a[594].portadatain[] = ( data_a[18..18]); - ram_block2a[595].portadatain[] = ( data_a[19..19]); - ram_block2a[596].portadatain[] = ( data_a[20..20]); - ram_block2a[597].portadatain[] = ( data_a[21..21]); - ram_block2a[598].portadatain[] = ( data_a[22..22]); - ram_block2a[599].portadatain[] = ( data_a[23..23]); - ram_block2a[600].portadatain[] = ( data_a[24..24]); - ram_block2a[601].portadatain[] = ( data_a[25..25]); - ram_block2a[602].portadatain[] = ( data_a[26..26]); - ram_block2a[603].portadatain[] = ( data_a[27..27]); - ram_block2a[604].portadatain[] = ( data_a[28..28]); - ram_block2a[605].portadatain[] = ( data_a[29..29]); - ram_block2a[606].portadatain[] = ( data_a[30..30]); - ram_block2a[607].portadatain[] = ( data_a[31..31]); - ram_block2a[608].portadatain[] = ( data_a[0..0]); - ram_block2a[609].portadatain[] = ( data_a[1..1]); - ram_block2a[610].portadatain[] = ( data_a[2..2]); - ram_block2a[611].portadatain[] = ( data_a[3..3]); - ram_block2a[612].portadatain[] = ( data_a[4..4]); - ram_block2a[613].portadatain[] = ( data_a[5..5]); - ram_block2a[614].portadatain[] = ( data_a[6..6]); - ram_block2a[615].portadatain[] = ( data_a[7..7]); - ram_block2a[616].portadatain[] = ( data_a[8..8]); - ram_block2a[617].portadatain[] = ( data_a[9..9]); - ram_block2a[618].portadatain[] = ( data_a[10..10]); - ram_block2a[619].portadatain[] = ( data_a[11..11]); - ram_block2a[620].portadatain[] = ( data_a[12..12]); - ram_block2a[621].portadatain[] = ( data_a[13..13]); - ram_block2a[622].portadatain[] = ( data_a[14..14]); - ram_block2a[623].portadatain[] = ( data_a[15..15]); - ram_block2a[624].portadatain[] = ( data_a[16..16]); - ram_block2a[625].portadatain[] = ( data_a[17..17]); - ram_block2a[626].portadatain[] = ( data_a[18..18]); - ram_block2a[627].portadatain[] = ( data_a[19..19]); - ram_block2a[628].portadatain[] = ( data_a[20..20]); - ram_block2a[629].portadatain[] = ( data_a[21..21]); - ram_block2a[630].portadatain[] = ( data_a[22..22]); - ram_block2a[631].portadatain[] = ( data_a[23..23]); - ram_block2a[632].portadatain[] = ( data_a[24..24]); - ram_block2a[633].portadatain[] = ( data_a[25..25]); - ram_block2a[634].portadatain[] = ( data_a[26..26]); - ram_block2a[635].portadatain[] = ( data_a[27..27]); - ram_block2a[636].portadatain[] = ( data_a[28..28]); - ram_block2a[637].portadatain[] = ( data_a[29..29]); - ram_block2a[638].portadatain[] = ( data_a[30..30]); - ram_block2a[639].portadatain[] = ( data_a[31..31]); - ram_block2a[640].portadatain[] = ( data_a[0..0]); - ram_block2a[641].portadatain[] = ( data_a[1..1]); - ram_block2a[642].portadatain[] = ( data_a[2..2]); - ram_block2a[643].portadatain[] = ( data_a[3..3]); - ram_block2a[644].portadatain[] = ( data_a[4..4]); - ram_block2a[645].portadatain[] = ( data_a[5..5]); - ram_block2a[646].portadatain[] = ( data_a[6..6]); - ram_block2a[647].portadatain[] = ( data_a[7..7]); - ram_block2a[648].portadatain[] = ( data_a[8..8]); - ram_block2a[649].portadatain[] = ( data_a[9..9]); - ram_block2a[650].portadatain[] = ( data_a[10..10]); - ram_block2a[651].portadatain[] = ( data_a[11..11]); - ram_block2a[652].portadatain[] = ( data_a[12..12]); - ram_block2a[653].portadatain[] = ( data_a[13..13]); - ram_block2a[654].portadatain[] = ( data_a[14..14]); - ram_block2a[655].portadatain[] = ( data_a[15..15]); - ram_block2a[656].portadatain[] = ( data_a[16..16]); - ram_block2a[657].portadatain[] = ( data_a[17..17]); - ram_block2a[658].portadatain[] = ( data_a[18..18]); - ram_block2a[659].portadatain[] = ( data_a[19..19]); - ram_block2a[660].portadatain[] = ( data_a[20..20]); - ram_block2a[661].portadatain[] = ( data_a[21..21]); - ram_block2a[662].portadatain[] = ( data_a[22..22]); - ram_block2a[663].portadatain[] = ( data_a[23..23]); - ram_block2a[664].portadatain[] = ( data_a[24..24]); - ram_block2a[665].portadatain[] = ( data_a[25..25]); - ram_block2a[666].portadatain[] = ( data_a[26..26]); - ram_block2a[667].portadatain[] = ( data_a[27..27]); - ram_block2a[668].portadatain[] = ( data_a[28..28]); - ram_block2a[669].portadatain[] = ( data_a[29..29]); - ram_block2a[670].portadatain[] = ( data_a[30..30]); - ram_block2a[671].portadatain[] = ( data_a[31..31]); - ram_block2a[672].portadatain[] = ( data_a[0..0]); - ram_block2a[673].portadatain[] = ( data_a[1..1]); - ram_block2a[674].portadatain[] = ( data_a[2..2]); - ram_block2a[675].portadatain[] = ( data_a[3..3]); - ram_block2a[676].portadatain[] = ( data_a[4..4]); - ram_block2a[677].portadatain[] = ( data_a[5..5]); - ram_block2a[678].portadatain[] = ( data_a[6..6]); - ram_block2a[679].portadatain[] = ( data_a[7..7]); - ram_block2a[680].portadatain[] = ( data_a[8..8]); - ram_block2a[681].portadatain[] = ( data_a[9..9]); - ram_block2a[682].portadatain[] = ( data_a[10..10]); - ram_block2a[683].portadatain[] = ( data_a[11..11]); - ram_block2a[684].portadatain[] = ( data_a[12..12]); - ram_block2a[685].portadatain[] = ( data_a[13..13]); - ram_block2a[686].portadatain[] = ( data_a[14..14]); - ram_block2a[687].portadatain[] = ( data_a[15..15]); - ram_block2a[688].portadatain[] = ( data_a[16..16]); - ram_block2a[689].portadatain[] = ( data_a[17..17]); - ram_block2a[690].portadatain[] = ( data_a[18..18]); - ram_block2a[691].portadatain[] = ( data_a[19..19]); - ram_block2a[692].portadatain[] = ( data_a[20..20]); - ram_block2a[693].portadatain[] = ( data_a[21..21]); - ram_block2a[694].portadatain[] = ( data_a[22..22]); - ram_block2a[695].portadatain[] = ( data_a[23..23]); - ram_block2a[696].portadatain[] = ( data_a[24..24]); - ram_block2a[697].portadatain[] = ( data_a[25..25]); - ram_block2a[698].portadatain[] = ( data_a[26..26]); - ram_block2a[699].portadatain[] = ( data_a[27..27]); - ram_block2a[700].portadatain[] = ( data_a[28..28]); - ram_block2a[701].portadatain[] = ( data_a[29..29]); - ram_block2a[702].portadatain[] = ( data_a[30..30]); - ram_block2a[703].portadatain[] = ( data_a[31..31]); - ram_block2a[704].portadatain[] = ( data_a[0..0]); - ram_block2a[705].portadatain[] = ( data_a[1..1]); - ram_block2a[706].portadatain[] = ( data_a[2..2]); - ram_block2a[707].portadatain[] = ( data_a[3..3]); - ram_block2a[708].portadatain[] = ( data_a[4..4]); - ram_block2a[709].portadatain[] = ( data_a[5..5]); - ram_block2a[710].portadatain[] = ( data_a[6..6]); - ram_block2a[711].portadatain[] = ( data_a[7..7]); - ram_block2a[712].portadatain[] = ( data_a[8..8]); - ram_block2a[713].portadatain[] = ( data_a[9..9]); - ram_block2a[714].portadatain[] = ( data_a[10..10]); - ram_block2a[715].portadatain[] = ( data_a[11..11]); - ram_block2a[716].portadatain[] = ( data_a[12..12]); - ram_block2a[717].portadatain[] = ( data_a[13..13]); - ram_block2a[718].portadatain[] = ( data_a[14..14]); - ram_block2a[719].portadatain[] = ( data_a[15..15]); - ram_block2a[720].portadatain[] = ( data_a[16..16]); - ram_block2a[721].portadatain[] = ( data_a[17..17]); - ram_block2a[722].portadatain[] = ( data_a[18..18]); - ram_block2a[723].portadatain[] = ( data_a[19..19]); - ram_block2a[724].portadatain[] = ( data_a[20..20]); - ram_block2a[725].portadatain[] = ( data_a[21..21]); - ram_block2a[726].portadatain[] = ( data_a[22..22]); - ram_block2a[727].portadatain[] = ( data_a[23..23]); - ram_block2a[728].portadatain[] = ( data_a[24..24]); - ram_block2a[729].portadatain[] = ( data_a[25..25]); - ram_block2a[730].portadatain[] = ( data_a[26..26]); - ram_block2a[731].portadatain[] = ( data_a[27..27]); - ram_block2a[732].portadatain[] = ( data_a[28..28]); - ram_block2a[733].portadatain[] = ( data_a[29..29]); - ram_block2a[734].portadatain[] = ( data_a[30..30]); - ram_block2a[735].portadatain[] = ( data_a[31..31]); - ram_block2a[736].portadatain[] = ( data_a[0..0]); - ram_block2a[737].portadatain[] = ( data_a[1..1]); - ram_block2a[738].portadatain[] = ( data_a[2..2]); - ram_block2a[739].portadatain[] = ( data_a[3..3]); - ram_block2a[740].portadatain[] = ( data_a[4..4]); - ram_block2a[741].portadatain[] = ( data_a[5..5]); - ram_block2a[742].portadatain[] = ( data_a[6..6]); - ram_block2a[743].portadatain[] = ( data_a[7..7]); - ram_block2a[744].portadatain[] = ( data_a[8..8]); - ram_block2a[745].portadatain[] = ( data_a[9..9]); - ram_block2a[746].portadatain[] = ( data_a[10..10]); - ram_block2a[747].portadatain[] = ( data_a[11..11]); - ram_block2a[748].portadatain[] = ( data_a[12..12]); - ram_block2a[749].portadatain[] = ( data_a[13..13]); - ram_block2a[750].portadatain[] = ( data_a[14..14]); - ram_block2a[751].portadatain[] = ( data_a[15..15]); - ram_block2a[752].portadatain[] = ( data_a[16..16]); - ram_block2a[753].portadatain[] = ( data_a[17..17]); - ram_block2a[754].portadatain[] = ( data_a[18..18]); - ram_block2a[755].portadatain[] = ( data_a[19..19]); - ram_block2a[756].portadatain[] = ( data_a[20..20]); - ram_block2a[757].portadatain[] = ( data_a[21..21]); - ram_block2a[758].portadatain[] = ( data_a[22..22]); - ram_block2a[759].portadatain[] = ( data_a[23..23]); - ram_block2a[760].portadatain[] = ( data_a[24..24]); - ram_block2a[761].portadatain[] = ( data_a[25..25]); - ram_block2a[762].portadatain[] = ( data_a[26..26]); - ram_block2a[763].portadatain[] = ( data_a[27..27]); - ram_block2a[764].portadatain[] = ( data_a[28..28]); - ram_block2a[765].portadatain[] = ( data_a[29..29]); - ram_block2a[766].portadatain[] = ( data_a[30..30]); - ram_block2a[767].portadatain[] = ( data_a[31..31]); - ram_block2a[768].portadatain[] = ( data_a[0..0]); - ram_block2a[769].portadatain[] = ( data_a[1..1]); - ram_block2a[770].portadatain[] = ( data_a[2..2]); - ram_block2a[771].portadatain[] = ( data_a[3..3]); - ram_block2a[772].portadatain[] = ( data_a[4..4]); - ram_block2a[773].portadatain[] = ( data_a[5..5]); - ram_block2a[774].portadatain[] = ( data_a[6..6]); - ram_block2a[775].portadatain[] = ( data_a[7..7]); - ram_block2a[776].portadatain[] = ( data_a[8..8]); - ram_block2a[777].portadatain[] = ( data_a[9..9]); - ram_block2a[778].portadatain[] = ( data_a[10..10]); - ram_block2a[779].portadatain[] = ( data_a[11..11]); - ram_block2a[780].portadatain[] = ( data_a[12..12]); - ram_block2a[781].portadatain[] = ( data_a[13..13]); - ram_block2a[782].portadatain[] = ( data_a[14..14]); - ram_block2a[783].portadatain[] = ( data_a[15..15]); - ram_block2a[784].portadatain[] = ( data_a[16..16]); - ram_block2a[785].portadatain[] = ( data_a[17..17]); - ram_block2a[786].portadatain[] = ( data_a[18..18]); - ram_block2a[787].portadatain[] = ( data_a[19..19]); - ram_block2a[788].portadatain[] = ( data_a[20..20]); - ram_block2a[789].portadatain[] = ( data_a[21..21]); - ram_block2a[790].portadatain[] = ( data_a[22..22]); - ram_block2a[791].portadatain[] = ( data_a[23..23]); - ram_block2a[792].portadatain[] = ( data_a[24..24]); - ram_block2a[793].portadatain[] = ( data_a[25..25]); - ram_block2a[794].portadatain[] = ( data_a[26..26]); - ram_block2a[795].portadatain[] = ( data_a[27..27]); - ram_block2a[796].portadatain[] = ( data_a[28..28]); - ram_block2a[797].portadatain[] = ( data_a[29..29]); - ram_block2a[798].portadatain[] = ( data_a[30..30]); - ram_block2a[799].portadatain[] = ( data_a[31..31]); - ram_block2a[800].portadatain[] = ( data_a[0..0]); - ram_block2a[801].portadatain[] = ( data_a[1..1]); - ram_block2a[802].portadatain[] = ( data_a[2..2]); - ram_block2a[803].portadatain[] = ( data_a[3..3]); - ram_block2a[804].portadatain[] = ( data_a[4..4]); - ram_block2a[805].portadatain[] = ( data_a[5..5]); - ram_block2a[806].portadatain[] = ( data_a[6..6]); - ram_block2a[807].portadatain[] = ( data_a[7..7]); - ram_block2a[808].portadatain[] = ( data_a[8..8]); - ram_block2a[809].portadatain[] = ( data_a[9..9]); - ram_block2a[810].portadatain[] = ( data_a[10..10]); - ram_block2a[811].portadatain[] = ( data_a[11..11]); - ram_block2a[812].portadatain[] = ( data_a[12..12]); - ram_block2a[813].portadatain[] = ( data_a[13..13]); - ram_block2a[814].portadatain[] = ( data_a[14..14]); - ram_block2a[815].portadatain[] = ( data_a[15..15]); - ram_block2a[816].portadatain[] = ( data_a[16..16]); - ram_block2a[817].portadatain[] = ( data_a[17..17]); - ram_block2a[818].portadatain[] = ( data_a[18..18]); - ram_block2a[819].portadatain[] = ( data_a[19..19]); - ram_block2a[820].portadatain[] = ( data_a[20..20]); - ram_block2a[821].portadatain[] = ( data_a[21..21]); - ram_block2a[822].portadatain[] = ( data_a[22..22]); - ram_block2a[823].portadatain[] = ( data_a[23..23]); - ram_block2a[824].portadatain[] = ( data_a[24..24]); - ram_block2a[825].portadatain[] = ( data_a[25..25]); - ram_block2a[826].portadatain[] = ( data_a[26..26]); - ram_block2a[827].portadatain[] = ( data_a[27..27]); - ram_block2a[828].portadatain[] = ( data_a[28..28]); - ram_block2a[829].portadatain[] = ( data_a[29..29]); - ram_block2a[830].portadatain[] = ( data_a[30..30]); - ram_block2a[831].portadatain[] = ( data_a[31..31]); - ram_block2a[832].portadatain[] = ( data_a[0..0]); - ram_block2a[833].portadatain[] = ( data_a[1..1]); - ram_block2a[834].portadatain[] = ( data_a[2..2]); - ram_block2a[835].portadatain[] = ( data_a[3..3]); - ram_block2a[836].portadatain[] = ( data_a[4..4]); - ram_block2a[837].portadatain[] = ( data_a[5..5]); - ram_block2a[838].portadatain[] = ( data_a[6..6]); - ram_block2a[839].portadatain[] = ( data_a[7..7]); - ram_block2a[840].portadatain[] = ( data_a[8..8]); - ram_block2a[841].portadatain[] = ( data_a[9..9]); - ram_block2a[842].portadatain[] = ( data_a[10..10]); - ram_block2a[843].portadatain[] = ( data_a[11..11]); - ram_block2a[844].portadatain[] = ( data_a[12..12]); - ram_block2a[845].portadatain[] = ( data_a[13..13]); - ram_block2a[846].portadatain[] = ( data_a[14..14]); - ram_block2a[847].portadatain[] = ( data_a[15..15]); - ram_block2a[848].portadatain[] = ( data_a[16..16]); - ram_block2a[849].portadatain[] = ( data_a[17..17]); - ram_block2a[850].portadatain[] = ( data_a[18..18]); - ram_block2a[851].portadatain[] = ( data_a[19..19]); - ram_block2a[852].portadatain[] = ( data_a[20..20]); - ram_block2a[853].portadatain[] = ( data_a[21..21]); - ram_block2a[854].portadatain[] = ( data_a[22..22]); - ram_block2a[855].portadatain[] = ( data_a[23..23]); - ram_block2a[856].portadatain[] = ( data_a[24..24]); - ram_block2a[857].portadatain[] = ( data_a[25..25]); - ram_block2a[858].portadatain[] = ( data_a[26..26]); - ram_block2a[859].portadatain[] = ( data_a[27..27]); - ram_block2a[860].portadatain[] = ( data_a[28..28]); - ram_block2a[861].portadatain[] = ( data_a[29..29]); - ram_block2a[862].portadatain[] = ( data_a[30..30]); - ram_block2a[863].portadatain[] = ( data_a[31..31]); - ram_block2a[864].portadatain[] = ( data_a[0..0]); - ram_block2a[865].portadatain[] = ( data_a[1..1]); - ram_block2a[866].portadatain[] = ( data_a[2..2]); - ram_block2a[867].portadatain[] = ( data_a[3..3]); - ram_block2a[868].portadatain[] = ( data_a[4..4]); - ram_block2a[869].portadatain[] = ( data_a[5..5]); - ram_block2a[870].portadatain[] = ( data_a[6..6]); - ram_block2a[871].portadatain[] = ( data_a[7..7]); - ram_block2a[872].portadatain[] = ( data_a[8..8]); - ram_block2a[873].portadatain[] = ( data_a[9..9]); - ram_block2a[874].portadatain[] = ( data_a[10..10]); - ram_block2a[875].portadatain[] = ( data_a[11..11]); - ram_block2a[876].portadatain[] = ( data_a[12..12]); - ram_block2a[877].portadatain[] = ( data_a[13..13]); - ram_block2a[878].portadatain[] = ( data_a[14..14]); - ram_block2a[879].portadatain[] = ( data_a[15..15]); - ram_block2a[880].portadatain[] = ( data_a[16..16]); - ram_block2a[881].portadatain[] = ( data_a[17..17]); - ram_block2a[882].portadatain[] = ( data_a[18..18]); - ram_block2a[883].portadatain[] = ( data_a[19..19]); - ram_block2a[884].portadatain[] = ( data_a[20..20]); - ram_block2a[885].portadatain[] = ( data_a[21..21]); - ram_block2a[886].portadatain[] = ( data_a[22..22]); - ram_block2a[887].portadatain[] = ( data_a[23..23]); - ram_block2a[888].portadatain[] = ( data_a[24..24]); - ram_block2a[889].portadatain[] = ( data_a[25..25]); - ram_block2a[890].portadatain[] = ( data_a[26..26]); - ram_block2a[891].portadatain[] = ( data_a[27..27]); - ram_block2a[892].portadatain[] = ( data_a[28..28]); - ram_block2a[893].portadatain[] = ( data_a[29..29]); - ram_block2a[894].portadatain[] = ( data_a[30..30]); - ram_block2a[895].portadatain[] = ( data_a[31..31]); - ram_block2a[896].portadatain[] = ( data_a[0..0]); - ram_block2a[897].portadatain[] = ( data_a[1..1]); - ram_block2a[898].portadatain[] = ( data_a[2..2]); - ram_block2a[899].portadatain[] = ( data_a[3..3]); - ram_block2a[900].portadatain[] = ( data_a[4..4]); - ram_block2a[901].portadatain[] = ( data_a[5..5]); - ram_block2a[902].portadatain[] = ( data_a[6..6]); - ram_block2a[903].portadatain[] = ( data_a[7..7]); - ram_block2a[904].portadatain[] = ( data_a[8..8]); - ram_block2a[905].portadatain[] = ( data_a[9..9]); - ram_block2a[906].portadatain[] = ( data_a[10..10]); - ram_block2a[907].portadatain[] = ( data_a[11..11]); - ram_block2a[908].portadatain[] = ( data_a[12..12]); - ram_block2a[909].portadatain[] = ( data_a[13..13]); - ram_block2a[910].portadatain[] = ( data_a[14..14]); - ram_block2a[911].portadatain[] = ( data_a[15..15]); - ram_block2a[912].portadatain[] = ( data_a[16..16]); - ram_block2a[913].portadatain[] = ( data_a[17..17]); - ram_block2a[914].portadatain[] = ( data_a[18..18]); - ram_block2a[915].portadatain[] = ( data_a[19..19]); - ram_block2a[916].portadatain[] = ( data_a[20..20]); - ram_block2a[917].portadatain[] = ( data_a[21..21]); - ram_block2a[918].portadatain[] = ( data_a[22..22]); - ram_block2a[919].portadatain[] = ( data_a[23..23]); - ram_block2a[920].portadatain[] = ( data_a[24..24]); - ram_block2a[921].portadatain[] = ( data_a[25..25]); - ram_block2a[922].portadatain[] = ( data_a[26..26]); - ram_block2a[923].portadatain[] = ( data_a[27..27]); - ram_block2a[924].portadatain[] = ( data_a[28..28]); - ram_block2a[925].portadatain[] = ( data_a[29..29]); - ram_block2a[926].portadatain[] = ( data_a[30..30]); - ram_block2a[927].portadatain[] = ( data_a[31..31]); - ram_block2a[928].portadatain[] = ( data_a[0..0]); - ram_block2a[929].portadatain[] = ( data_a[1..1]); - ram_block2a[930].portadatain[] = ( data_a[2..2]); - ram_block2a[931].portadatain[] = ( data_a[3..3]); - ram_block2a[932].portadatain[] = ( data_a[4..4]); - ram_block2a[933].portadatain[] = ( data_a[5..5]); - ram_block2a[934].portadatain[] = ( data_a[6..6]); - ram_block2a[935].portadatain[] = ( data_a[7..7]); - ram_block2a[936].portadatain[] = ( data_a[8..8]); - ram_block2a[937].portadatain[] = ( data_a[9..9]); - ram_block2a[938].portadatain[] = ( data_a[10..10]); - ram_block2a[939].portadatain[] = ( data_a[11..11]); - ram_block2a[940].portadatain[] = ( data_a[12..12]); - ram_block2a[941].portadatain[] = ( data_a[13..13]); - ram_block2a[942].portadatain[] = ( data_a[14..14]); - ram_block2a[943].portadatain[] = ( data_a[15..15]); - ram_block2a[944].portadatain[] = ( data_a[16..16]); - ram_block2a[945].portadatain[] = ( data_a[17..17]); - ram_block2a[946].portadatain[] = ( data_a[18..18]); - ram_block2a[947].portadatain[] = ( data_a[19..19]); - ram_block2a[948].portadatain[] = ( data_a[20..20]); - ram_block2a[949].portadatain[] = ( data_a[21..21]); - ram_block2a[950].portadatain[] = ( data_a[22..22]); - ram_block2a[951].portadatain[] = ( data_a[23..23]); - ram_block2a[952].portadatain[] = ( data_a[24..24]); - ram_block2a[953].portadatain[] = ( data_a[25..25]); - ram_block2a[954].portadatain[] = ( data_a[26..26]); - ram_block2a[955].portadatain[] = ( data_a[27..27]); - ram_block2a[956].portadatain[] = ( data_a[28..28]); - ram_block2a[957].portadatain[] = ( data_a[29..29]); - ram_block2a[958].portadatain[] = ( data_a[30..30]); - ram_block2a[959].portadatain[] = ( data_a[31..31]); - ram_block2a[960].portadatain[] = ( data_a[0..0]); - ram_block2a[961].portadatain[] = ( data_a[1..1]); - ram_block2a[962].portadatain[] = ( data_a[2..2]); - ram_block2a[963].portadatain[] = ( data_a[3..3]); - ram_block2a[964].portadatain[] = ( data_a[4..4]); - ram_block2a[965].portadatain[] = ( data_a[5..5]); - ram_block2a[966].portadatain[] = ( data_a[6..6]); - ram_block2a[967].portadatain[] = ( data_a[7..7]); - ram_block2a[968].portadatain[] = ( data_a[8..8]); - ram_block2a[969].portadatain[] = ( data_a[9..9]); - ram_block2a[970].portadatain[] = ( data_a[10..10]); - ram_block2a[971].portadatain[] = ( data_a[11..11]); - ram_block2a[972].portadatain[] = ( data_a[12..12]); - ram_block2a[973].portadatain[] = ( data_a[13..13]); - ram_block2a[974].portadatain[] = ( data_a[14..14]); - ram_block2a[975].portadatain[] = ( data_a[15..15]); - ram_block2a[976].portadatain[] = ( data_a[16..16]); - ram_block2a[977].portadatain[] = ( data_a[17..17]); - ram_block2a[978].portadatain[] = ( data_a[18..18]); - ram_block2a[979].portadatain[] = ( data_a[19..19]); - ram_block2a[980].portadatain[] = ( data_a[20..20]); - ram_block2a[981].portadatain[] = ( data_a[21..21]); - ram_block2a[982].portadatain[] = ( data_a[22..22]); - ram_block2a[983].portadatain[] = ( data_a[23..23]); - ram_block2a[984].portadatain[] = ( data_a[24..24]); - ram_block2a[985].portadatain[] = ( data_a[25..25]); - ram_block2a[986].portadatain[] = ( data_a[26..26]); - ram_block2a[987].portadatain[] = ( data_a[27..27]); - ram_block2a[988].portadatain[] = ( data_a[28..28]); - ram_block2a[989].portadatain[] = ( data_a[29..29]); - ram_block2a[990].portadatain[] = ( data_a[30..30]); - ram_block2a[991].portadatain[] = ( data_a[31..31]); - ram_block2a[992].portadatain[] = ( data_a[0..0]); - ram_block2a[993].portadatain[] = ( data_a[1..1]); - ram_block2a[994].portadatain[] = ( data_a[2..2]); - ram_block2a[995].portadatain[] = ( data_a[3..3]); - ram_block2a[996].portadatain[] = ( data_a[4..4]); - ram_block2a[997].portadatain[] = ( data_a[5..5]); - ram_block2a[998].portadatain[] = ( data_a[6..6]); - ram_block2a[999].portadatain[] = ( data_a[7..7]); - ram_block2a[1000].portadatain[] = ( data_a[8..8]); - ram_block2a[1001].portadatain[] = ( data_a[9..9]); - ram_block2a[1002].portadatain[] = ( data_a[10..10]); - ram_block2a[1003].portadatain[] = ( data_a[11..11]); - ram_block2a[1004].portadatain[] = ( data_a[12..12]); - ram_block2a[1005].portadatain[] = ( data_a[13..13]); - ram_block2a[1006].portadatain[] = ( data_a[14..14]); - ram_block2a[1007].portadatain[] = ( data_a[15..15]); - ram_block2a[1008].portadatain[] = ( data_a[16..16]); - ram_block2a[1009].portadatain[] = ( data_a[17..17]); - ram_block2a[1010].portadatain[] = ( data_a[18..18]); - ram_block2a[1011].portadatain[] = ( data_a[19..19]); - ram_block2a[1012].portadatain[] = ( data_a[20..20]); - ram_block2a[1013].portadatain[] = ( data_a[21..21]); - ram_block2a[1014].portadatain[] = ( data_a[22..22]); - ram_block2a[1015].portadatain[] = ( data_a[23..23]); - ram_block2a[1016].portadatain[] = ( data_a[24..24]); - ram_block2a[1017].portadatain[] = ( data_a[25..25]); - ram_block2a[1018].portadatain[] = ( data_a[26..26]); - ram_block2a[1019].portadatain[] = ( data_a[27..27]); - ram_block2a[1020].portadatain[] = ( data_a[28..28]); - ram_block2a[1021].portadatain[] = ( data_a[29..29]); - ram_block2a[1022].portadatain[] = ( data_a[30..30]); - ram_block2a[1023].portadatain[] = ( data_a[31..31]); - ram_block2a[1023..0].portawe = ( decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..31], decode3.eq[31..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..30], decode3.eq[30..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..29], decode3.eq[29..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..28], decode3.eq[28..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..27], decode3.eq[27..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..26], decode3.eq[26..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..25], decode3.eq[25..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..24], decode3.eq[24..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..23], decode3.eq[23..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..22], decode3.eq[22..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..21], decode3.eq[21..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..20], decode3.eq[20..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..19], decode3.eq[19..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..18], decode3.eq[18..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..17], decode3.eq[17..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..16], decode3.eq[16..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..15], decode3.eq[15..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..14], decode3.eq[14..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..13], decode3.eq[13..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..12], decode3.eq[12..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..11], decode3.eq[11..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..10], decode3.eq[10..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..9], decode3.eq[9..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..8], decode3.eq[8..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..7], decode3.eq[7..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..6], decode3.eq[6..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..5], decode3.eq[5..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..4], decode3.eq[4..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..3], decode3.eq[3..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..2], decode3.eq[2..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..1], decode3.eq[1..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0], decode3.eq[0..0]); - ram_block2a[1023..0].portbaddr[] = ( address_b_wire[10..0]); - ram_block2a[1023..0].portbre = B"1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_sel[4..0] = address_b[15..11]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = mux4.result[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_scbg.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_scbg.tdf deleted file mode 100644 index 1b48a57..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_scbg.tdf +++ /dev/null @@ -1,2037 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=768 NUMWORDS_B=768 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=64 WIDTH_B=64 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=10 WIDTHAD_B=10 WREN_POWER_OPTIMIZATION="OFF" address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 49152 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_scbg -( - address_a[9..0] : input; - address_b[9..0] : input; - clock0 : input; - data_a[63..0] : input; - q_b[63..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram0_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "old", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 10, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 767, - PORT_A_LOGICAL_RAM_DEPTH = 768, - PORT_A_LOGICAL_RAM_WIDTH = 64, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 10, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 767, - PORT_B_LOGICAL_RAM_DEPTH = 768, - PORT_B_LOGICAL_RAM_WIDTH = 64, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[9..0] : WIRE; - address_b_wire[9..0] : WIRE; - q_b_wire[63..0] : WIRE; - -BEGIN - ram_block2a[63..0].clk0 = clock0; - ram_block2a[63..0].portaaddr[] = ( address_a_wire[9..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[63..0].portawe = wren_a; - ram_block2a[63..0].portbaddr[] = ( address_b_wire[9..0]); - ram_block2a[63..0].portbre = B"1111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[63..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_su9o.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_su9o.tdf deleted file mode 100644 index d287576..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_su9o.tdf +++ /dev/null @@ -1,827 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=2048 NUMWORDS_B=0 OPERATION_MODE="ROM" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="CLEAR0" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=25 WIDTH_B=1 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=11 WIDTHAD_B=1 WREN_POWER_OPTIMIZATION="OFF" aclr0 address_a clock0 q_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 51200 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_su9o -( - aclr0 : input; - address_a[10..0] : input; - clock0 : input; - q_a[24..0] : output; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - INIT_FILE = "qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram7_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif", - INIT_FILE_LAYOUT = "port_a", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 11, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 2047, - PORT_A_LOGICAL_RAM_DEPTH = 2048, - PORT_A_LOGICAL_RAM_WIDTH = 25, - PORT_B_ADDRESS_CLOCK = "clock0", - PORT_B_ADDRESS_WIDTH = 11, - PORT_B_DATA_OUT_CLEAR = "aclear", - PORT_B_DATA_OUT_CLOCK = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 2047, - PORT_B_LOGICAL_RAM_DEPTH = 2048, - PORT_B_LOGICAL_RAM_WIDTH = 25, - PORT_B_RDADDRESS_CLEAR = "none", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[10..0] : WIRE; - data_a[24..0] : NODE; - wren_a : NODE; - -BEGIN - ram_block2a[24..0].aclr = aclr0; - ram_block2a[24..0].clk0 = clock0; - ram_block2a[24..0].portaaddr[] = ( address_a_wire[10..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[24..0].portawe = wren_a; - ram_block2a[24..0].portbaddr[] = ( address_a_wire[10..0]); - ram_block2a[24..0].portbre = B"1111111111111111111111111"; - address_a_wire[] = address_a[]; - data_a[] = VCC; - q_a[] = ( ram_block2a[24..0].portbdataout[0..0]); - wren_a = GND; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_t0ga1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_t0ga1.tdf deleted file mode 100644 index 217c89b..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_impl_t0ga1.tdf +++ /dev/null @@ -1,7257 +0,0 @@ ---altera_syncram_nd_impl ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS="AUTO" ACF_DISABLE_MLAB_RAM_USE="FALSE" ACF_IMPLEMENT_MLAB_IN_16_BIT_DEEP_MODE="FALSE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" CLKEN_POWER_OPTIMIZATION="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="NORMAL" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="NORMAL" CLOCK_ENABLE_OUTPUT_B="NORMAL" DEVICE_FAMILY="Agilex 5" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_COHERENT_READ="FALSE" ENABLE_ECC="FALSE" ENABLE_ECC_ENCODER_BYPASS="FALSE" ENABLE_FORCE_TO_ZERO="FALSE" IMPLEMENT_IN_LES="OFF" INDATA_REG_B="CLOCK1" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=8 NUMWORDS_B=8 OPERATION_MODE="DUAL_PORT" OPTIMIZATION_OPTION="AUTO" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" OUTDATA_SCLR_A="NONE" OUTDATA_SCLR_B="NONE" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_REG_B="CLOCK1" RDEN_POWER_OPTIMIZATION="OFF" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" READ_DURING_WRITE_MODE_PORT_A="NEW_DATA_NO_NBE_READ" READ_DURING_WRITE_MODE_PORT_B="NEW_DATA_NO_NBE_READ" WIDTH_A=240 WIDTH_B=240 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCENCPARITY=8 WIDTH_ECCSTATUS=3 WIDTHAD2_A=1 WIDTHAD2_B=1 WIDTHAD_A=3 WIDTHAD_B=3 WREN_POWER_OPTIMIZATION="OFF" aclr0 address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_ram_block (aclr, clk0, clk1, eccencbypass, eccencparity[WIDTH_ECCENCPARITY-1..0], ena0, ena1, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddr2[PORT_A_ADDRESS2_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddr2[PORT_B_ADDRESS2_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe, sclr) -WITH ( CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ECC_PIPELINE_STAGE_ENABLED, ENABLE_COHERENT_READ, ENABLE_ECC, ENABLE_ECC_ENCODER_BYPASS, ENABLE_FORCE_TO_ZERO, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, OPTIMIZATION_OPTION, PORT_A_ADDRESS2_WIDTH = 1, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_RDADDRESS_CLEAR, PORT_B_ADDRESS2_WIDTH = 1, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_RDADDRESS_CLEAR, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCENCPARITY = 1, WIDTH_ECCSTATUS = 2) -RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); - ---synthesis_resources = ram_bits (AUTO) 1920 -OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; - -SUBDESIGN altera_syncram_impl_t0ga1 -( - aclr0 : input; - address_a[2..0] : input; - address_b[2..0] : input; - clock0 : input; - clock1 : input; - data_a[239..0] : input; - q_b[239..0] : output; - wren_a : input; -) -VARIABLE - ram_block2a0 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 0, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 0, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a1 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 1, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 1, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a2 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 2, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 2, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a3 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 3, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 3, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a4 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 4, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 4, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a5 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 5, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 5, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a6 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 6, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 6, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a7 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 7, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 7, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a8 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 8, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 8, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a9 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 9, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 9, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a10 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 10, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 10, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a11 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 11, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 11, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a12 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 12, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 12, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a13 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 13, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 13, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a14 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 14, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 14, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a15 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 15, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 15, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a16 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 16, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 16, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a17 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 17, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 17, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a18 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 18, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 18, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a19 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 19, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 19, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a20 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 20, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 20, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a21 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 21, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 21, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a22 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 22, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 22, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a23 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 23, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 23, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a24 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 24, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 24, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a25 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 25, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 25, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a26 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 26, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 26, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a27 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 27, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 27, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a28 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 28, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 28, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a29 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 29, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 29, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a30 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 30, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 30, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a31 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 31, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 31, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a32 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 32, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 32, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a33 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 33, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 33, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a34 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 34, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 34, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a35 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 35, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 35, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a36 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 36, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 36, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a37 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 37, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 37, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a38 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 38, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 38, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a39 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 39, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 39, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a40 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 40, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 40, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a41 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 41, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 41, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a42 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 42, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 42, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a43 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 43, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 43, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a44 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 44, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 44, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a45 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 45, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 45, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a46 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 46, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 46, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a47 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 47, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 47, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a48 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 48, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 48, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a49 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 49, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 49, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a50 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 50, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 50, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a51 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 51, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 51, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a52 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 52, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 52, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a53 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 53, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 53, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a54 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 54, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 54, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a55 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 55, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 55, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a56 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 56, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 56, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a57 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 57, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 57, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a58 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 58, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 58, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a59 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 59, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 59, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a60 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 60, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 60, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a61 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 61, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 61, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a62 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 62, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 62, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a63 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 63, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 63, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a64 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 64, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 64, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a65 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 65, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 65, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a66 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 66, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 66, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a67 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 67, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 67, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a68 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 68, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 68, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a69 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 69, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 69, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a70 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 70, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 70, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a71 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 71, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 71, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a72 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 72, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 72, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a73 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 73, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 73, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a74 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 74, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 74, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a75 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 75, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 75, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a76 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 76, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 76, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a77 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 77, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 77, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a78 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 78, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 78, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a79 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 79, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 79, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a80 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 80, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 80, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a81 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 81, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 81, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a82 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 82, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 82, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a83 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 83, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 83, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a84 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 84, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 84, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a85 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 85, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 85, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a86 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 86, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 86, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a87 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 87, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 87, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a88 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 88, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 88, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a89 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 89, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 89, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a90 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 90, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 90, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a91 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 91, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 91, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a92 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 92, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 92, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a93 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 93, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 93, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a94 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 94, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 94, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a95 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 95, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 95, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a96 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 96, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 96, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a97 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 97, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 97, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a98 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 98, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 98, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a99 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 99, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 99, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a100 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 100, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 100, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a101 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 101, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 101, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a102 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 102, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 102, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a103 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 103, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 103, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a104 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 104, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 104, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a105 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 105, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 105, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a106 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 106, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 106, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a107 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 107, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 107, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a108 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 108, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 108, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a109 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 109, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 109, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a110 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 110, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 110, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a111 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 111, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 111, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a112 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 112, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 112, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a113 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 113, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 113, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a114 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 114, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 114, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a115 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 115, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 115, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a116 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 116, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 116, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a117 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 117, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 117, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a118 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 118, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 118, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a119 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 119, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 119, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a120 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 120, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 120, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a121 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 121, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 121, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a122 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 122, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 122, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a123 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 123, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 123, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a124 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 124, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 124, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a125 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 125, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 125, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a126 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 126, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 126, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a127 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 127, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 127, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a128 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 128, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 128, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a129 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 129, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 129, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a130 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 130, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 130, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a131 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 131, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 131, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a132 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 132, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 132, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a133 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 133, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 133, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a134 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 134, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 134, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a135 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 135, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 135, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a136 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 136, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 136, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a137 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 137, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 137, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a138 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 138, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 138, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a139 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 139, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 139, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a140 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 140, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 140, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a141 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 141, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 141, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a142 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 142, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 142, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a143 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 143, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 143, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a144 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 144, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 144, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a145 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 145, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 145, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a146 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 146, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 146, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a147 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 147, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 147, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a148 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 148, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 148, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a149 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 149, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 149, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a150 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 150, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 150, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a151 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 151, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 151, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a152 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 152, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 152, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a153 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 153, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 153, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a154 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 154, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 154, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a155 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 155, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 155, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a156 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 156, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 156, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a157 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 157, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 157, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a158 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 158, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 158, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a159 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 159, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 159, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a160 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 160, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 160, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a161 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 161, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 161, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a162 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 162, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 162, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a163 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 163, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 163, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a164 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 164, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 164, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a165 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 165, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 165, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a166 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 166, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 166, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a167 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 167, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 167, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a168 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 168, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 168, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a169 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 169, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 169, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a170 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 170, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 170, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a171 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 171, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 171, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a172 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 172, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 172, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a173 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 173, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 173, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a174 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 174, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 174, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a175 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 175, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 175, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a176 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 176, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 176, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a177 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 177, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 177, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a178 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 178, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 178, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a179 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 179, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 179, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a180 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 180, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 180, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a181 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 181, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 181, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a182 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 182, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 182, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a183 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 183, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 183, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a184 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 184, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 184, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a185 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 185, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 185, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a186 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 186, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 186, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a187 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 187, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 187, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a188 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 188, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 188, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a189 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 189, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 189, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a190 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 190, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 190, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a191 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 191, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 191, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a192 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 192, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 192, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a193 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 193, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 193, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a194 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 194, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 194, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a195 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 195, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 195, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a196 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 196, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 196, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a197 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 197, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 197, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a198 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 198, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 198, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a199 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 199, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 199, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a200 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 200, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 200, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a201 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 201, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 201, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a202 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 202, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 202, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a203 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 203, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 203, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a204 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 204, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 204, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a205 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 205, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 205, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a206 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 206, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 206, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a207 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 207, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 207, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a208 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 208, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 208, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a209 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 209, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 209, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a210 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 210, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 210, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a211 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 211, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 211, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a212 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 212, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 212, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a213 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 213, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 213, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a214 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 214, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 214, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a215 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 215, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 215, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a216 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 216, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 216, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a217 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 217, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 217, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a218 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 218, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 218, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a219 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 219, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 219, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a220 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 220, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 220, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a221 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 221, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 221, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a222 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 222, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 222, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a223 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 223, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 223, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a224 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 224, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 224, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a225 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 225, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 225, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a226 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 226, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 226, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a227 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 227, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 227, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a228 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 228, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 228, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a229 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 229, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 229, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a230 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 230, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 230, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a231 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 231, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 231, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a232 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 232, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 232, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a233 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 233, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 233, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a234 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 234, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 234, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a235 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 235, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 235, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a236 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 236, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 236, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a237 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 237, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 237, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a238 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 238, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 238, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - ram_block2a239 : tennm_ram_block - WITH ( - CLK0_INPUT_CLOCK_ENABLE = "none", - CLK1_INPUT_CLOCK_ENABLE = "none", - CONNECTIVITY_CHECKING = "OFF", - LOGICAL_RAM_NAME = "ALTERA_SYNCRAM", - MIXED_PORT_FEED_THROUGH_MODE = "dont_care", - OPERATION_MODE = "dual_port", - OPTIMIZATION_OPTION = "auto", - PORT_A_ADDRESS_WIDTH = 3, - PORT_A_DATA_WIDTH = 1, - PORT_A_FIRST_ADDRESS = 0, - PORT_A_FIRST_BIT_NUMBER = 239, - PORT_A_LAST_ADDRESS = 7, - PORT_A_LOGICAL_RAM_DEPTH = 8, - PORT_A_LOGICAL_RAM_WIDTH = 240, - PORT_B_ADDRESS_CLOCK = "clock1", - PORT_B_ADDRESS_WIDTH = 3, - PORT_B_DATA_OUT_CLEAR = "none", - PORT_B_DATA_WIDTH = 1, - PORT_B_FIRST_ADDRESS = 0, - PORT_B_FIRST_BIT_NUMBER = 239, - PORT_B_LAST_ADDRESS = 7, - PORT_B_LOGICAL_RAM_DEPTH = 8, - PORT_B_LOGICAL_RAM_WIDTH = 240, - PORT_B_RDADDRESS_CLEAR = "aclear", - POWER_UP_UNINITIALIZED = "false", - RAM_BLOCK_TYPE = "AUTO" - ); - address_a_wire[2..0] : WIRE; - address_b_wire[2..0] : WIRE; - q_b_wire[239..0] : WIRE; - -BEGIN - ram_block2a[239..0].aclr = aclr0; - ram_block2a[239..0].clk0 = clock0; - ram_block2a[239..0].clk1 = clock1; - ram_block2a[239..0].portaaddr[] = ( address_a_wire[2..0]); - ram_block2a[0].portadatain[] = ( data_a[0..0]); - ram_block2a[1].portadatain[] = ( data_a[1..1]); - ram_block2a[2].portadatain[] = ( data_a[2..2]); - ram_block2a[3].portadatain[] = ( data_a[3..3]); - ram_block2a[4].portadatain[] = ( data_a[4..4]); - ram_block2a[5].portadatain[] = ( data_a[5..5]); - ram_block2a[6].portadatain[] = ( data_a[6..6]); - ram_block2a[7].portadatain[] = ( data_a[7..7]); - ram_block2a[8].portadatain[] = ( data_a[8..8]); - ram_block2a[9].portadatain[] = ( data_a[9..9]); - ram_block2a[10].portadatain[] = ( data_a[10..10]); - ram_block2a[11].portadatain[] = ( data_a[11..11]); - ram_block2a[12].portadatain[] = ( data_a[12..12]); - ram_block2a[13].portadatain[] = ( data_a[13..13]); - ram_block2a[14].portadatain[] = ( data_a[14..14]); - ram_block2a[15].portadatain[] = ( data_a[15..15]); - ram_block2a[16].portadatain[] = ( data_a[16..16]); - ram_block2a[17].portadatain[] = ( data_a[17..17]); - ram_block2a[18].portadatain[] = ( data_a[18..18]); - ram_block2a[19].portadatain[] = ( data_a[19..19]); - ram_block2a[20].portadatain[] = ( data_a[20..20]); - ram_block2a[21].portadatain[] = ( data_a[21..21]); - ram_block2a[22].portadatain[] = ( data_a[22..22]); - ram_block2a[23].portadatain[] = ( data_a[23..23]); - ram_block2a[24].portadatain[] = ( data_a[24..24]); - ram_block2a[25].portadatain[] = ( data_a[25..25]); - ram_block2a[26].portadatain[] = ( data_a[26..26]); - ram_block2a[27].portadatain[] = ( data_a[27..27]); - ram_block2a[28].portadatain[] = ( data_a[28..28]); - ram_block2a[29].portadatain[] = ( data_a[29..29]); - ram_block2a[30].portadatain[] = ( data_a[30..30]); - ram_block2a[31].portadatain[] = ( data_a[31..31]); - ram_block2a[32].portadatain[] = ( data_a[32..32]); - ram_block2a[33].portadatain[] = ( data_a[33..33]); - ram_block2a[34].portadatain[] = ( data_a[34..34]); - ram_block2a[35].portadatain[] = ( data_a[35..35]); - ram_block2a[36].portadatain[] = ( data_a[36..36]); - ram_block2a[37].portadatain[] = ( data_a[37..37]); - ram_block2a[38].portadatain[] = ( data_a[38..38]); - ram_block2a[39].portadatain[] = ( data_a[39..39]); - ram_block2a[40].portadatain[] = ( data_a[40..40]); - ram_block2a[41].portadatain[] = ( data_a[41..41]); - ram_block2a[42].portadatain[] = ( data_a[42..42]); - ram_block2a[43].portadatain[] = ( data_a[43..43]); - ram_block2a[44].portadatain[] = ( data_a[44..44]); - ram_block2a[45].portadatain[] = ( data_a[45..45]); - ram_block2a[46].portadatain[] = ( data_a[46..46]); - ram_block2a[47].portadatain[] = ( data_a[47..47]); - ram_block2a[48].portadatain[] = ( data_a[48..48]); - ram_block2a[49].portadatain[] = ( data_a[49..49]); - ram_block2a[50].portadatain[] = ( data_a[50..50]); - ram_block2a[51].portadatain[] = ( data_a[51..51]); - ram_block2a[52].portadatain[] = ( data_a[52..52]); - ram_block2a[53].portadatain[] = ( data_a[53..53]); - ram_block2a[54].portadatain[] = ( data_a[54..54]); - ram_block2a[55].portadatain[] = ( data_a[55..55]); - ram_block2a[56].portadatain[] = ( data_a[56..56]); - ram_block2a[57].portadatain[] = ( data_a[57..57]); - ram_block2a[58].portadatain[] = ( data_a[58..58]); - ram_block2a[59].portadatain[] = ( data_a[59..59]); - ram_block2a[60].portadatain[] = ( data_a[60..60]); - ram_block2a[61].portadatain[] = ( data_a[61..61]); - ram_block2a[62].portadatain[] = ( data_a[62..62]); - ram_block2a[63].portadatain[] = ( data_a[63..63]); - ram_block2a[64].portadatain[] = ( data_a[64..64]); - ram_block2a[65].portadatain[] = ( data_a[65..65]); - ram_block2a[66].portadatain[] = ( data_a[66..66]); - ram_block2a[67].portadatain[] = ( data_a[67..67]); - ram_block2a[68].portadatain[] = ( data_a[68..68]); - ram_block2a[69].portadatain[] = ( data_a[69..69]); - ram_block2a[70].portadatain[] = ( data_a[70..70]); - ram_block2a[71].portadatain[] = ( data_a[71..71]); - ram_block2a[72].portadatain[] = ( data_a[72..72]); - ram_block2a[73].portadatain[] = ( data_a[73..73]); - ram_block2a[74].portadatain[] = ( data_a[74..74]); - ram_block2a[75].portadatain[] = ( data_a[75..75]); - ram_block2a[76].portadatain[] = ( data_a[76..76]); - ram_block2a[77].portadatain[] = ( data_a[77..77]); - ram_block2a[78].portadatain[] = ( data_a[78..78]); - ram_block2a[79].portadatain[] = ( data_a[79..79]); - ram_block2a[80].portadatain[] = ( data_a[80..80]); - ram_block2a[81].portadatain[] = ( data_a[81..81]); - ram_block2a[82].portadatain[] = ( data_a[82..82]); - ram_block2a[83].portadatain[] = ( data_a[83..83]); - ram_block2a[84].portadatain[] = ( data_a[84..84]); - ram_block2a[85].portadatain[] = ( data_a[85..85]); - ram_block2a[86].portadatain[] = ( data_a[86..86]); - ram_block2a[87].portadatain[] = ( data_a[87..87]); - ram_block2a[88].portadatain[] = ( data_a[88..88]); - ram_block2a[89].portadatain[] = ( data_a[89..89]); - ram_block2a[90].portadatain[] = ( data_a[90..90]); - ram_block2a[91].portadatain[] = ( data_a[91..91]); - ram_block2a[92].portadatain[] = ( data_a[92..92]); - ram_block2a[93].portadatain[] = ( data_a[93..93]); - ram_block2a[94].portadatain[] = ( data_a[94..94]); - ram_block2a[95].portadatain[] = ( data_a[95..95]); - ram_block2a[96].portadatain[] = ( data_a[96..96]); - ram_block2a[97].portadatain[] = ( data_a[97..97]); - ram_block2a[98].portadatain[] = ( data_a[98..98]); - ram_block2a[99].portadatain[] = ( data_a[99..99]); - ram_block2a[100].portadatain[] = ( data_a[100..100]); - ram_block2a[101].portadatain[] = ( data_a[101..101]); - ram_block2a[102].portadatain[] = ( data_a[102..102]); - ram_block2a[103].portadatain[] = ( data_a[103..103]); - ram_block2a[104].portadatain[] = ( data_a[104..104]); - ram_block2a[105].portadatain[] = ( data_a[105..105]); - ram_block2a[106].portadatain[] = ( data_a[106..106]); - ram_block2a[107].portadatain[] = ( data_a[107..107]); - ram_block2a[108].portadatain[] = ( data_a[108..108]); - ram_block2a[109].portadatain[] = ( data_a[109..109]); - ram_block2a[110].portadatain[] = ( data_a[110..110]); - ram_block2a[111].portadatain[] = ( data_a[111..111]); - ram_block2a[112].portadatain[] = ( data_a[112..112]); - ram_block2a[113].portadatain[] = ( data_a[113..113]); - ram_block2a[114].portadatain[] = ( data_a[114..114]); - ram_block2a[115].portadatain[] = ( data_a[115..115]); - ram_block2a[116].portadatain[] = ( data_a[116..116]); - ram_block2a[117].portadatain[] = ( data_a[117..117]); - ram_block2a[118].portadatain[] = ( data_a[118..118]); - ram_block2a[119].portadatain[] = ( data_a[119..119]); - ram_block2a[120].portadatain[] = ( data_a[120..120]); - ram_block2a[121].portadatain[] = ( data_a[121..121]); - ram_block2a[122].portadatain[] = ( data_a[122..122]); - ram_block2a[123].portadatain[] = ( data_a[123..123]); - ram_block2a[124].portadatain[] = ( data_a[124..124]); - ram_block2a[125].portadatain[] = ( data_a[125..125]); - ram_block2a[126].portadatain[] = ( data_a[126..126]); - ram_block2a[127].portadatain[] = ( data_a[127..127]); - ram_block2a[128].portadatain[] = ( data_a[128..128]); - ram_block2a[129].portadatain[] = ( data_a[129..129]); - ram_block2a[130].portadatain[] = ( data_a[130..130]); - ram_block2a[131].portadatain[] = ( data_a[131..131]); - ram_block2a[132].portadatain[] = ( data_a[132..132]); - ram_block2a[133].portadatain[] = ( data_a[133..133]); - ram_block2a[134].portadatain[] = ( data_a[134..134]); - ram_block2a[135].portadatain[] = ( data_a[135..135]); - ram_block2a[136].portadatain[] = ( data_a[136..136]); - ram_block2a[137].portadatain[] = ( data_a[137..137]); - ram_block2a[138].portadatain[] = ( data_a[138..138]); - ram_block2a[139].portadatain[] = ( data_a[139..139]); - ram_block2a[140].portadatain[] = ( data_a[140..140]); - ram_block2a[141].portadatain[] = ( data_a[141..141]); - ram_block2a[142].portadatain[] = ( data_a[142..142]); - ram_block2a[143].portadatain[] = ( data_a[143..143]); - ram_block2a[144].portadatain[] = ( data_a[144..144]); - ram_block2a[145].portadatain[] = ( data_a[145..145]); - ram_block2a[146].portadatain[] = ( data_a[146..146]); - ram_block2a[147].portadatain[] = ( data_a[147..147]); - ram_block2a[148].portadatain[] = ( data_a[148..148]); - ram_block2a[149].portadatain[] = ( data_a[149..149]); - ram_block2a[150].portadatain[] = ( data_a[150..150]); - ram_block2a[151].portadatain[] = ( data_a[151..151]); - ram_block2a[152].portadatain[] = ( data_a[152..152]); - ram_block2a[153].portadatain[] = ( data_a[153..153]); - ram_block2a[154].portadatain[] = ( data_a[154..154]); - ram_block2a[155].portadatain[] = ( data_a[155..155]); - ram_block2a[156].portadatain[] = ( data_a[156..156]); - ram_block2a[157].portadatain[] = ( data_a[157..157]); - ram_block2a[158].portadatain[] = ( data_a[158..158]); - ram_block2a[159].portadatain[] = ( data_a[159..159]); - ram_block2a[160].portadatain[] = ( data_a[160..160]); - ram_block2a[161].portadatain[] = ( data_a[161..161]); - ram_block2a[162].portadatain[] = ( data_a[162..162]); - ram_block2a[163].portadatain[] = ( data_a[163..163]); - ram_block2a[164].portadatain[] = ( data_a[164..164]); - ram_block2a[165].portadatain[] = ( data_a[165..165]); - ram_block2a[166].portadatain[] = ( data_a[166..166]); - ram_block2a[167].portadatain[] = ( data_a[167..167]); - ram_block2a[168].portadatain[] = ( data_a[168..168]); - ram_block2a[169].portadatain[] = ( data_a[169..169]); - ram_block2a[170].portadatain[] = ( data_a[170..170]); - ram_block2a[171].portadatain[] = ( data_a[171..171]); - ram_block2a[172].portadatain[] = ( data_a[172..172]); - ram_block2a[173].portadatain[] = ( data_a[173..173]); - ram_block2a[174].portadatain[] = ( data_a[174..174]); - ram_block2a[175].portadatain[] = ( data_a[175..175]); - ram_block2a[176].portadatain[] = ( data_a[176..176]); - ram_block2a[177].portadatain[] = ( data_a[177..177]); - ram_block2a[178].portadatain[] = ( data_a[178..178]); - ram_block2a[179].portadatain[] = ( data_a[179..179]); - ram_block2a[180].portadatain[] = ( data_a[180..180]); - ram_block2a[181].portadatain[] = ( data_a[181..181]); - ram_block2a[182].portadatain[] = ( data_a[182..182]); - ram_block2a[183].portadatain[] = ( data_a[183..183]); - ram_block2a[184].portadatain[] = ( data_a[184..184]); - ram_block2a[185].portadatain[] = ( data_a[185..185]); - ram_block2a[186].portadatain[] = ( data_a[186..186]); - ram_block2a[187].portadatain[] = ( data_a[187..187]); - ram_block2a[188].portadatain[] = ( data_a[188..188]); - ram_block2a[189].portadatain[] = ( data_a[189..189]); - ram_block2a[190].portadatain[] = ( data_a[190..190]); - ram_block2a[191].portadatain[] = ( data_a[191..191]); - ram_block2a[192].portadatain[] = ( data_a[192..192]); - ram_block2a[193].portadatain[] = ( data_a[193..193]); - ram_block2a[194].portadatain[] = ( data_a[194..194]); - ram_block2a[195].portadatain[] = ( data_a[195..195]); - ram_block2a[196].portadatain[] = ( data_a[196..196]); - ram_block2a[197].portadatain[] = ( data_a[197..197]); - ram_block2a[198].portadatain[] = ( data_a[198..198]); - ram_block2a[199].portadatain[] = ( data_a[199..199]); - ram_block2a[200].portadatain[] = ( data_a[200..200]); - ram_block2a[201].portadatain[] = ( data_a[201..201]); - ram_block2a[202].portadatain[] = ( data_a[202..202]); - ram_block2a[203].portadatain[] = ( data_a[203..203]); - ram_block2a[204].portadatain[] = ( data_a[204..204]); - ram_block2a[205].portadatain[] = ( data_a[205..205]); - ram_block2a[206].portadatain[] = ( data_a[206..206]); - ram_block2a[207].portadatain[] = ( data_a[207..207]); - ram_block2a[208].portadatain[] = ( data_a[208..208]); - ram_block2a[209].portadatain[] = ( data_a[209..209]); - ram_block2a[210].portadatain[] = ( data_a[210..210]); - ram_block2a[211].portadatain[] = ( data_a[211..211]); - ram_block2a[212].portadatain[] = ( data_a[212..212]); - ram_block2a[213].portadatain[] = ( data_a[213..213]); - ram_block2a[214].portadatain[] = ( data_a[214..214]); - ram_block2a[215].portadatain[] = ( data_a[215..215]); - ram_block2a[216].portadatain[] = ( data_a[216..216]); - ram_block2a[217].portadatain[] = ( data_a[217..217]); - ram_block2a[218].portadatain[] = ( data_a[218..218]); - ram_block2a[219].portadatain[] = ( data_a[219..219]); - ram_block2a[220].portadatain[] = ( data_a[220..220]); - ram_block2a[221].portadatain[] = ( data_a[221..221]); - ram_block2a[222].portadatain[] = ( data_a[222..222]); - ram_block2a[223].portadatain[] = ( data_a[223..223]); - ram_block2a[224].portadatain[] = ( data_a[224..224]); - ram_block2a[225].portadatain[] = ( data_a[225..225]); - ram_block2a[226].portadatain[] = ( data_a[226..226]); - ram_block2a[227].portadatain[] = ( data_a[227..227]); - ram_block2a[228].portadatain[] = ( data_a[228..228]); - ram_block2a[229].portadatain[] = ( data_a[229..229]); - ram_block2a[230].portadatain[] = ( data_a[230..230]); - ram_block2a[231].portadatain[] = ( data_a[231..231]); - ram_block2a[232].portadatain[] = ( data_a[232..232]); - ram_block2a[233].portadatain[] = ( data_a[233..233]); - ram_block2a[234].portadatain[] = ( data_a[234..234]); - ram_block2a[235].portadatain[] = ( data_a[235..235]); - ram_block2a[236].portadatain[] = ( data_a[236..236]); - ram_block2a[237].portadatain[] = ( data_a[237..237]); - ram_block2a[238].portadatain[] = ( data_a[238..238]); - ram_block2a[239].portadatain[] = ( data_a[239..239]); - ram_block2a[239..0].portawe = wren_a; - ram_block2a[239..0].portbaddr[] = ( address_b_wire[2..0]); - ram_block2a[239..0].portbre = B"111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111"; - address_a_wire[] = address_a[]; - address_b_wire[] = address_b[]; - q_b[] = q_b_wire[]; - q_b_wire[] = ( ram_block2a[239..0].portbdataout[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_j2gd1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_j2gd1.tdf deleted file mode 100644 index 178ee3a..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_j2gd1.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=16 NUMWORDS_B=16 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" WIDTH_A=320 WIDTH_B=320 WIDTHAD_A=4 WIDTHAD_B=4 aclr0 address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_j85g1 (aclr0, address_a[3..0], address_b[3..0], clock0, clock1, data_a[319..0], wren_a) -RETURNS ( q_b[319..0]); - ---synthesis_resources = ram_bits (AUTO) 5120 -SUBDESIGN altera_syncram_j2gd1 -( - aclr0 : input; - address_a[3..0] : input; - address_b[3..0] : input; - clock0 : input; - clock1 : input; - data_a[319..0] : input; - q_b[319..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_j85g1; - -BEGIN - altera_syncram_impl1.aclr0 = aclr0; - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_k8rl1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_k8rl1.tdf deleted file mode 100644 index c1005cc..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_k8rl1.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" CBX_SINGLE_OUTPUT_FILE="OFF" CLOCK_ENABLE_INPUT_B="BYPASS" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=32 NUMWORDS_B=32 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="CLOCK1" WIDTH_A=266 WIDTH_B=266 WIDTH_BYTEENA_A=1 WIDTH_ECCSTATUS=2 WIDTHAD_A=5 WIDTHAD_B=5 address_a address_b clock0 clock1 clocken1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_8u7u1 (address_a[4..0], address_b[4..0], clock0, clock1, clocken1, data_a[265..0], wren_a) -RETURNS ( q_b[265..0]); - ---synthesis_resources = ram_bits (AUTO) 8512 -SUBDESIGN altera_syncram_k8rl1 -( - address_a[4..0] : input; - address_b[4..0] : input; - clock0 : input; - clock1 : input; - clocken1 : input; - data_a[265..0] : input; - q_b[265..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_8u7u1; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.clocken1 = clocken1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mj1c1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mj1c1.tdf deleted file mode 100644 index 1b90645..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mj1c1.tdf +++ /dev/null @@ -1,47 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=32768 NUMWORDS_B=32768 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=32 WIDTH_B=32 WIDTH_BYTEENA_A=4 WIDTHAD_A=15 WIDTHAD_B=15 address_a address_b byteena_a clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_8sj71 (address_a[14..0], address_b[14..0], byteena_a[3..0], clock0, data_a[31..0], wren_a) -RETURNS ( q_b[31..0]); - ---synthesis_resources = lut 178 ram_bits (AUTO) 1048576 reg 4 -SUBDESIGN altera_syncram_mj1c1 -( - address_a[14..0] : input; - address_b[14..0] : input; - byteena_a[3..0] : input; - clock0 : input; - data_a[31..0] : input; - q_b[31..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_8sj71; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.byteena_a[] = byteena_a[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mjo02.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mjo02.tdf deleted file mode 100644 index 007f232..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_mjo02.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="CLEAR0" ADDRESS_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LOW_POWER_MODE="AUTO" NUMWORDS_A=8 NUMWORDS_B=8 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" WIDTH_A=240 WIDTH_B=240 WIDTHAD_A=3 WIDTHAD_B=3 aclr0 address_a address_b clock0 clock1 data_a q_b wren_a CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_t0ga1 (aclr0, address_a[2..0], address_b[2..0], clock0, clock1, data_a[239..0], wren_a) -RETURNS ( q_b[239..0]); - ---synthesis_resources = ram_bits (AUTO) 1920 -SUBDESIGN altera_syncram_mjo02 -( - aclr0 : input; - address_a[2..0] : input; - address_b[2..0] : input; - clock0 : input; - clock1 : input; - data_a[239..0] : input; - q_b[239..0] : output; - wren_a : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_t0ga1; - -BEGIN - altera_syncram_impl1.aclr0 = aclr0; - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.address_b[] = address_b[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.clock1 = clock1; - altera_syncram_impl1.data_a[] = data_a[]; - altera_syncram_impl1.wren_a = wren_a; - q_b[] = altera_syncram_impl1.q_b[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_pgtk.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_pgtk.tdf deleted file mode 100644 index 456a18b..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/altera_syncram_pgtk.tdf +++ /dev/null @@ -1,45 +0,0 @@ ---altera_syncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" BYTE_SIZE=8 CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INIT_FILE="qdb/_compiler/de25_nano_psmct32_raster_demo_top/root_partition/26.1.0/partitioned/1/mifs/ram4_de25_nano_psmct32_raster_demo_top_24852d2f.hdl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=2048 OPERATION_MODE="ROM" OUTDATA_ACLR_A="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_SCLR_A="SCLEAR" WIDTH_A=128 WIDTH_BYTEENA_A=16 WIDTHAD_A=11 address_a byteena_a clock0 q_a rden_a sclr CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" ---VERSION_BEGIN 26.1 cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION altera_syncram_impl_d2gq (address_a[10..0], byteena_a[15..0], clock0, rden_a, sclr) -RETURNS ( q_a[127..0]); - ---synthesis_resources = ram_bits (AUTO) 262144 -SUBDESIGN altera_syncram_pgtk -( - address_a[10..0] : input; - byteena_a[15..0] : input; - clock0 : input; - q_a[127..0] : output; - rden_a : input; - sclr : input; -) -VARIABLE - altera_syncram_impl1 : altera_syncram_impl_d2gq; - -BEGIN - altera_syncram_impl1.address_a[] = address_a[]; - altera_syncram_impl1.byteena_a[] = byteena_a[]; - altera_syncram_impl1.clock0 = clock0; - altera_syncram_impl1.rden_a = rden_a; - altera_syncram_impl1.sclr = sclr; - q_a[] = altera_syncram_impl1.q_a[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/cmpr_jdut1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/cmpr_jdut1.tdf deleted file mode 100644 index 1c61b17..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/cmpr_jdut1.tdf +++ /dev/null @@ -1,42 +0,0 @@ ---lpm_compare CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_WIDTH=5 ONE_INPUT_IS_CONSTANT="YES" aeb dataa datab ---VERSION_BEGIN 26.1 cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = -SUBDESIGN cmpr_jdut1 -( - aeb : output; - dataa[4..0] : input; - datab[4..0] : input; -) -VARIABLE - aeb_result_wire[0..0] : WIRE; - aneb_result_wire[0..0] : WIRE; - data_wire[12..0] : WIRE; - eq_wire : WIRE; - -BEGIN - aeb = eq_wire; - aeb_result_wire[] = (! aneb_result_wire[]); - aneb_result_wire[] = ((data_wire[0..0] # data_wire[1..1]) # data_wire[2..2]); - data_wire[] = ( datab[4..4], dataa[4..4], datab[3..3], dataa[3..3], datab[2..2], dataa[2..2], datab[1..1], dataa[1..1], datab[0..0], dataa[0..0], (data_wire[11..11] $ data_wire[12..12]), ((data_wire[7..7] $ data_wire[8..8]) # (data_wire[9..9] $ data_wire[10..10])), ((data_wire[3..3] $ data_wire[4..4]) # (data_wire[5..5] $ data_wire[6..6]))); - eq_wire = aeb_result_wire[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_1j971.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_1j971.tdf deleted file mode 100644 index 6f8c356..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_1j971.tdf +++ /dev/null @@ -1,116 +0,0 @@ ---lpm_decode CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_DECODES=32 LPM_WIDTH=5 data enable eq ---VERSION_BEGIN 26.1 cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 36 -SUBDESIGN decode_1j971 -( - data[4..0] : input; - enable : input; - eq[31..0] : output; -) -VARIABLE - data_wire[4..0] : WIRE; - enable_wire : WIRE; - eq_node[31..0] : WIRE; - eq_wire[31..0] : WIRE; - w_anode8297w[2..0] : WIRE; - w_anode8310w[3..0] : WIRE; - w_anode8327w[3..0] : WIRE; - w_anode8337w[3..0] : WIRE; - w_anode8347w[3..0] : WIRE; - w_anode8357w[3..0] : WIRE; - w_anode8367w[3..0] : WIRE; - w_anode8377w[3..0] : WIRE; - w_anode8387w[3..0] : WIRE; - w_anode8399w[2..0] : WIRE; - w_anode8408w[3..0] : WIRE; - w_anode8419w[3..0] : WIRE; - w_anode8429w[3..0] : WIRE; - w_anode8439w[3..0] : WIRE; - w_anode8449w[3..0] : WIRE; - w_anode8459w[3..0] : WIRE; - w_anode8469w[3..0] : WIRE; - w_anode8479w[3..0] : WIRE; - w_anode8490w[2..0] : WIRE; - w_anode8499w[3..0] : WIRE; - w_anode8510w[3..0] : WIRE; - w_anode8520w[3..0] : WIRE; - w_anode8530w[3..0] : WIRE; - w_anode8540w[3..0] : WIRE; - w_anode8550w[3..0] : WIRE; - w_anode8560w[3..0] : WIRE; - w_anode8570w[3..0] : WIRE; - w_anode8581w[2..0] : WIRE; - w_anode8590w[3..0] : WIRE; - w_anode8601w[3..0] : WIRE; - w_anode8611w[3..0] : WIRE; - w_anode8621w[3..0] : WIRE; - w_anode8631w[3..0] : WIRE; - w_anode8641w[3..0] : WIRE; - w_anode8651w[3..0] : WIRE; - w_anode8661w[3..0] : WIRE; - w_data8295w[2..0] : WIRE; - -BEGIN - data_wire[] = data[]; - enable_wire = enable; - eq[] = eq_node[]; - eq_node[31..0] = eq_wire[31..0]; - eq_wire[] = ( ( w_anode8661w[3..3], w_anode8651w[3..3], w_anode8641w[3..3], w_anode8631w[3..3], w_anode8621w[3..3], w_anode8611w[3..3], w_anode8601w[3..3], w_anode8590w[3..3]), ( w_anode8570w[3..3], w_anode8560w[3..3], w_anode8550w[3..3], w_anode8540w[3..3], w_anode8530w[3..3], w_anode8520w[3..3], w_anode8510w[3..3], w_anode8499w[3..3]), ( w_anode8479w[3..3], w_anode8469w[3..3], w_anode8459w[3..3], w_anode8449w[3..3], w_anode8439w[3..3], w_anode8429w[3..3], w_anode8419w[3..3], w_anode8408w[3..3]), ( w_anode8387w[3..3], w_anode8377w[3..3], w_anode8367w[3..3], w_anode8357w[3..3], w_anode8347w[3..3], w_anode8337w[3..3], w_anode8327w[3..3], w_anode8310w[3..3])); - w_anode8297w[] = ( (w_anode8297w[1..1] & (! data_wire[4..4])), (w_anode8297w[0..0] & (! data_wire[3..3])), enable_wire); - w_anode8310w[] = ( (w_anode8310w[2..2] & (! w_data8295w[2..2])), (w_anode8310w[1..1] & (! w_data8295w[1..1])), (w_anode8310w[0..0] & (! w_data8295w[0..0])), w_anode8297w[2..2]); - w_anode8327w[] = ( (w_anode8327w[2..2] & (! w_data8295w[2..2])), (w_anode8327w[1..1] & (! w_data8295w[1..1])), (w_anode8327w[0..0] & w_data8295w[0..0]), w_anode8297w[2..2]); - w_anode8337w[] = ( (w_anode8337w[2..2] & (! w_data8295w[2..2])), (w_anode8337w[1..1] & w_data8295w[1..1]), (w_anode8337w[0..0] & (! w_data8295w[0..0])), w_anode8297w[2..2]); - w_anode8347w[] = ( (w_anode8347w[2..2] & (! w_data8295w[2..2])), (w_anode8347w[1..1] & w_data8295w[1..1]), (w_anode8347w[0..0] & w_data8295w[0..0]), w_anode8297w[2..2]); - w_anode8357w[] = ( (w_anode8357w[2..2] & w_data8295w[2..2]), (w_anode8357w[1..1] & (! w_data8295w[1..1])), (w_anode8357w[0..0] & (! w_data8295w[0..0])), w_anode8297w[2..2]); - w_anode8367w[] = ( (w_anode8367w[2..2] & w_data8295w[2..2]), (w_anode8367w[1..1] & (! w_data8295w[1..1])), (w_anode8367w[0..0] & w_data8295w[0..0]), w_anode8297w[2..2]); - w_anode8377w[] = ( (w_anode8377w[2..2] & w_data8295w[2..2]), (w_anode8377w[1..1] & w_data8295w[1..1]), (w_anode8377w[0..0] & (! w_data8295w[0..0])), w_anode8297w[2..2]); - w_anode8387w[] = ( (w_anode8387w[2..2] & w_data8295w[2..2]), (w_anode8387w[1..1] & w_data8295w[1..1]), (w_anode8387w[0..0] & w_data8295w[0..0]), w_anode8297w[2..2]); - w_anode8399w[] = ( (w_anode8399w[1..1] & (! data_wire[4..4])), (w_anode8399w[0..0] & data_wire[3..3]), enable_wire); - w_anode8408w[] = ( (w_anode8408w[2..2] & (! w_data8295w[2..2])), (w_anode8408w[1..1] & (! w_data8295w[1..1])), (w_anode8408w[0..0] & (! w_data8295w[0..0])), w_anode8399w[2..2]); - w_anode8419w[] = ( (w_anode8419w[2..2] & (! w_data8295w[2..2])), (w_anode8419w[1..1] & (! w_data8295w[1..1])), (w_anode8419w[0..0] & w_data8295w[0..0]), w_anode8399w[2..2]); - w_anode8429w[] = ( (w_anode8429w[2..2] & (! w_data8295w[2..2])), (w_anode8429w[1..1] & w_data8295w[1..1]), (w_anode8429w[0..0] & (! w_data8295w[0..0])), w_anode8399w[2..2]); - w_anode8439w[] = ( (w_anode8439w[2..2] & (! w_data8295w[2..2])), (w_anode8439w[1..1] & w_data8295w[1..1]), (w_anode8439w[0..0] & w_data8295w[0..0]), w_anode8399w[2..2]); - w_anode8449w[] = ( (w_anode8449w[2..2] & w_data8295w[2..2]), (w_anode8449w[1..1] & (! w_data8295w[1..1])), (w_anode8449w[0..0] & (! w_data8295w[0..0])), w_anode8399w[2..2]); - w_anode8459w[] = ( (w_anode8459w[2..2] & w_data8295w[2..2]), (w_anode8459w[1..1] & (! w_data8295w[1..1])), (w_anode8459w[0..0] & w_data8295w[0..0]), w_anode8399w[2..2]); - w_anode8469w[] = ( (w_anode8469w[2..2] & w_data8295w[2..2]), (w_anode8469w[1..1] & w_data8295w[1..1]), (w_anode8469w[0..0] & (! w_data8295w[0..0])), w_anode8399w[2..2]); - w_anode8479w[] = ( (w_anode8479w[2..2] & w_data8295w[2..2]), (w_anode8479w[1..1] & w_data8295w[1..1]), (w_anode8479w[0..0] & w_data8295w[0..0]), w_anode8399w[2..2]); - w_anode8490w[] = ( (w_anode8490w[1..1] & data_wire[4..4]), (w_anode8490w[0..0] & (! data_wire[3..3])), enable_wire); - w_anode8499w[] = ( (w_anode8499w[2..2] & (! w_data8295w[2..2])), (w_anode8499w[1..1] & (! w_data8295w[1..1])), (w_anode8499w[0..0] & (! w_data8295w[0..0])), w_anode8490w[2..2]); - w_anode8510w[] = ( (w_anode8510w[2..2] & (! w_data8295w[2..2])), (w_anode8510w[1..1] & (! w_data8295w[1..1])), (w_anode8510w[0..0] & w_data8295w[0..0]), w_anode8490w[2..2]); - w_anode8520w[] = ( (w_anode8520w[2..2] & (! w_data8295w[2..2])), (w_anode8520w[1..1] & w_data8295w[1..1]), (w_anode8520w[0..0] & (! w_data8295w[0..0])), w_anode8490w[2..2]); - w_anode8530w[] = ( (w_anode8530w[2..2] & (! w_data8295w[2..2])), (w_anode8530w[1..1] & w_data8295w[1..1]), (w_anode8530w[0..0] & w_data8295w[0..0]), w_anode8490w[2..2]); - w_anode8540w[] = ( (w_anode8540w[2..2] & w_data8295w[2..2]), (w_anode8540w[1..1] & (! w_data8295w[1..1])), (w_anode8540w[0..0] & (! w_data8295w[0..0])), w_anode8490w[2..2]); - w_anode8550w[] = ( (w_anode8550w[2..2] & w_data8295w[2..2]), (w_anode8550w[1..1] & (! w_data8295w[1..1])), (w_anode8550w[0..0] & w_data8295w[0..0]), w_anode8490w[2..2]); - w_anode8560w[] = ( (w_anode8560w[2..2] & w_data8295w[2..2]), (w_anode8560w[1..1] & w_data8295w[1..1]), (w_anode8560w[0..0] & (! w_data8295w[0..0])), w_anode8490w[2..2]); - w_anode8570w[] = ( (w_anode8570w[2..2] & w_data8295w[2..2]), (w_anode8570w[1..1] & w_data8295w[1..1]), (w_anode8570w[0..0] & w_data8295w[0..0]), w_anode8490w[2..2]); - w_anode8581w[] = ( (w_anode8581w[1..1] & data_wire[4..4]), (w_anode8581w[0..0] & data_wire[3..3]), enable_wire); - w_anode8590w[] = ( (w_anode8590w[2..2] & (! w_data8295w[2..2])), (w_anode8590w[1..1] & (! w_data8295w[1..1])), (w_anode8590w[0..0] & (! w_data8295w[0..0])), w_anode8581w[2..2]); - w_anode8601w[] = ( (w_anode8601w[2..2] & (! w_data8295w[2..2])), (w_anode8601w[1..1] & (! w_data8295w[1..1])), (w_anode8601w[0..0] & w_data8295w[0..0]), w_anode8581w[2..2]); - w_anode8611w[] = ( (w_anode8611w[2..2] & (! w_data8295w[2..2])), (w_anode8611w[1..1] & w_data8295w[1..1]), (w_anode8611w[0..0] & (! w_data8295w[0..0])), w_anode8581w[2..2]); - w_anode8621w[] = ( (w_anode8621w[2..2] & (! w_data8295w[2..2])), (w_anode8621w[1..1] & w_data8295w[1..1]), (w_anode8621w[0..0] & w_data8295w[0..0]), w_anode8581w[2..2]); - w_anode8631w[] = ( (w_anode8631w[2..2] & w_data8295w[2..2]), (w_anode8631w[1..1] & (! w_data8295w[1..1])), (w_anode8631w[0..0] & (! w_data8295w[0..0])), w_anode8581w[2..2]); - w_anode8641w[] = ( (w_anode8641w[2..2] & w_data8295w[2..2]), (w_anode8641w[1..1] & (! w_data8295w[1..1])), (w_anode8641w[0..0] & w_data8295w[0..0]), w_anode8581w[2..2]); - w_anode8651w[] = ( (w_anode8651w[2..2] & w_data8295w[2..2]), (w_anode8651w[1..1] & w_data8295w[1..1]), (w_anode8651w[0..0] & (! w_data8295w[0..0])), w_anode8581w[2..2]); - w_anode8661w[] = ( (w_anode8661w[2..2] & w_data8295w[2..2]), (w_anode8661w[1..1] & w_data8295w[1..1]), (w_anode8661w[0..0] & w_data8295w[0..0]), w_anode8581w[2..2]); - w_data8295w[2..0] = data_wire[2..0]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_m7op.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_m7op.tdf deleted file mode 100644 index 165869c..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/decode_m7op.tdf +++ /dev/null @@ -1,80 +0,0 @@ ---lpm_decode CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_DECODES=16 LPM_WIDTH=4 data enable eq ---VERSION_BEGIN 26.1 cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 18 -SUBDESIGN decode_m7op -( - data[3..0] : input; - enable : input; - eq[15..0] : output; -) -VARIABLE - data_wire[3..0] : WIRE; - enable_wire : WIRE; - eq_node[15..0] : WIRE; - eq_wire[15..0] : WIRE; - w_anode5197w[1..0] : WIRE; - w_anode5206w[3..0] : WIRE; - w_anode5223w[3..0] : WIRE; - w_anode5233w[3..0] : WIRE; - w_anode5243w[3..0] : WIRE; - w_anode5253w[3..0] : WIRE; - w_anode5263w[3..0] : WIRE; - w_anode5273w[3..0] : WIRE; - w_anode5283w[3..0] : WIRE; - w_anode5295w[1..0] : WIRE; - w_anode5302w[3..0] : WIRE; - w_anode5313w[3..0] : WIRE; - w_anode5323w[3..0] : WIRE; - w_anode5333w[3..0] : WIRE; - w_anode5343w[3..0] : WIRE; - w_anode5353w[3..0] : WIRE; - w_anode5363w[3..0] : WIRE; - w_anode5373w[3..0] : WIRE; - w_data5195w[2..0] : WIRE; - -BEGIN - data_wire[] = data[]; - enable_wire = enable; - eq[] = eq_node[]; - eq_node[15..0] = eq_wire[15..0]; - eq_wire[] = ( ( w_anode5373w[3..3], w_anode5363w[3..3], w_anode5353w[3..3], w_anode5343w[3..3], w_anode5333w[3..3], w_anode5323w[3..3], w_anode5313w[3..3], w_anode5302w[3..3]), ( w_anode5283w[3..3], w_anode5273w[3..3], w_anode5263w[3..3], w_anode5253w[3..3], w_anode5243w[3..3], w_anode5233w[3..3], w_anode5223w[3..3], w_anode5206w[3..3])); - w_anode5197w[] = ( (w_anode5197w[0..0] & (! data_wire[3..3])), enable_wire); - w_anode5206w[] = ( (w_anode5206w[2..2] & (! w_data5195w[2..2])), (w_anode5206w[1..1] & (! w_data5195w[1..1])), (w_anode5206w[0..0] & (! w_data5195w[0..0])), w_anode5197w[1..1]); - w_anode5223w[] = ( (w_anode5223w[2..2] & (! w_data5195w[2..2])), (w_anode5223w[1..1] & (! w_data5195w[1..1])), (w_anode5223w[0..0] & w_data5195w[0..0]), w_anode5197w[1..1]); - w_anode5233w[] = ( (w_anode5233w[2..2] & (! w_data5195w[2..2])), (w_anode5233w[1..1] & w_data5195w[1..1]), (w_anode5233w[0..0] & (! w_data5195w[0..0])), w_anode5197w[1..1]); - w_anode5243w[] = ( (w_anode5243w[2..2] & (! w_data5195w[2..2])), (w_anode5243w[1..1] & w_data5195w[1..1]), (w_anode5243w[0..0] & w_data5195w[0..0]), w_anode5197w[1..1]); - w_anode5253w[] = ( (w_anode5253w[2..2] & w_data5195w[2..2]), (w_anode5253w[1..1] & (! w_data5195w[1..1])), (w_anode5253w[0..0] & (! w_data5195w[0..0])), w_anode5197w[1..1]); - w_anode5263w[] = ( (w_anode5263w[2..2] & w_data5195w[2..2]), (w_anode5263w[1..1] & (! w_data5195w[1..1])), (w_anode5263w[0..0] & w_data5195w[0..0]), w_anode5197w[1..1]); - w_anode5273w[] = ( (w_anode5273w[2..2] & w_data5195w[2..2]), (w_anode5273w[1..1] & w_data5195w[1..1]), (w_anode5273w[0..0] & (! w_data5195w[0..0])), w_anode5197w[1..1]); - w_anode5283w[] = ( (w_anode5283w[2..2] & w_data5195w[2..2]), (w_anode5283w[1..1] & w_data5195w[1..1]), (w_anode5283w[0..0] & w_data5195w[0..0]), w_anode5197w[1..1]); - w_anode5295w[] = ( (w_anode5295w[0..0] & data_wire[3..3]), enable_wire); - w_anode5302w[] = ( (w_anode5302w[2..2] & (! w_data5195w[2..2])), (w_anode5302w[1..1] & (! w_data5195w[1..1])), (w_anode5302w[0..0] & (! w_data5195w[0..0])), w_anode5295w[1..1]); - w_anode5313w[] = ( (w_anode5313w[2..2] & (! w_data5195w[2..2])), (w_anode5313w[1..1] & (! w_data5195w[1..1])), (w_anode5313w[0..0] & w_data5195w[0..0]), w_anode5295w[1..1]); - w_anode5323w[] = ( (w_anode5323w[2..2] & (! w_data5195w[2..2])), (w_anode5323w[1..1] & w_data5195w[1..1]), (w_anode5323w[0..0] & (! w_data5195w[0..0])), w_anode5295w[1..1]); - w_anode5333w[] = ( (w_anode5333w[2..2] & (! w_data5195w[2..2])), (w_anode5333w[1..1] & w_data5195w[1..1]), (w_anode5333w[0..0] & w_data5195w[0..0]), w_anode5295w[1..1]); - w_anode5343w[] = ( (w_anode5343w[2..2] & w_data5195w[2..2]), (w_anode5343w[1..1] & (! w_data5195w[1..1])), (w_anode5343w[0..0] & (! w_data5195w[0..0])), w_anode5295w[1..1]); - w_anode5353w[] = ( (w_anode5353w[2..2] & w_data5195w[2..2]), (w_anode5353w[1..1] & (! w_data5195w[1..1])), (w_anode5353w[0..0] & w_data5195w[0..0]), w_anode5295w[1..1]); - w_anode5363w[] = ( (w_anode5363w[2..2] & w_data5195w[2..2]), (w_anode5363w[1..1] & w_data5195w[1..1]), (w_anode5363w[0..0] & (! w_data5195w[0..0])), w_anode5295w[1..1]); - w_anode5373w[] = ( (w_anode5373w[2..2] & w_data5195w[2..2]), (w_anode5373w[1..1] & w_data5195w[1..1]), (w_anode5373w[0..0] & w_data5195w[0..0]), w_anode5295w[1..1]); - w_data5195w[2..0] = data_wire[2..0]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6mgv1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6mgv1.tdf deleted file mode 100644 index aad2a5a..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6mgv1.tdf +++ /dev/null @@ -1,658 +0,0 @@ ---altdpram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INDATA_ACLR="OFF" INDATA_REG="INCLOCK" NUMWORDS=8 OUTDATA_ACLR="OFF" OUTDATA_REG="UNREGISTERED" RAM_BLOCK_TYPE="MLAB" RDADDRESS_ACLR="OFF" RDADDRESS_REG="OUTCLOCK" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" WIDTH=46 WIDTHAD=3 WRADDRESS_ACLR="OFF" WRADDRESS_REG="INCLOCK" WRCONTROL_ACLR="OFF" WRCONTROL_REG="INCLOCK" data inclock outclock q rdaddress wraddress wren CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO" ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_mlab_cell (clk0, clk1, clr, ena0, ena1, ena2, portaaddr[address_width-1..0], portabyteenamasks[byte_enable_mask_width-1..0], portadatain[data_width-1..0], portbaddr[address_width-1..0]) -WITH ( address_width = 1, byte_enable_mask_width = 2, data_width = 1, first_address, first_bit_number, init_file, last_address, logical_ram_depth, logical_ram_name, logical_ram_width, mem_init0, mixed_port_feed_through_mode, port_b_data_out_clear, port_b_data_out_clock) -RETURNS ( portbdataout[data_width-1..0]); - ---synthesis_resources = MLAB 3 reg 3 -SUBDESIGN dpram_6mgv1 -( - data[45..0] : input; - inclock : input; - outclock : input; - q[45..0] : output; - rdaddress[2..0] : input; - wraddress[2..0] : input; - wren : input; -) -VARIABLE - lutrama0 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 0, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama1 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 1, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama2 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 2, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama3 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 3, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama4 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 4, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama5 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 5, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama6 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 6, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama7 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 7, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama8 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 8, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama9 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 9, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama10 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 10, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama11 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 11, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama12 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 12, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama13 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 13, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama14 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 14, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama15 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 15, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama16 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 16, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama17 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 17, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama18 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 18, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama19 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 19, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama20 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 20, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama21 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 21, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama22 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 22, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama23 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 23, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama24 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 24, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama25 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 25, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama26 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 26, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama27 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 27, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama28 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 28, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama29 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 29, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama30 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 30, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama31 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 31, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama32 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 32, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama33 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 33, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama34 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 34, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama35 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 35, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama36 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 36, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama37 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 37, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama38 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 38, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama39 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 39, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama40 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 40, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama41 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 41, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama42 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 42, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama43 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 43, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama44 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 44, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - lutrama45 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 45, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 46, - mixed_port_feed_through_mode = "dont care" - ); - rdaddr_reg[2..0] : dffe; - datain_wire[45..0] : WIRE; - dataout_latch[45..0] : WIRE; - dataout_wire[45..0] : WIRE; - rdaddr_wire[2..0] : WIRE; - wr_en : WIRE; - wraddr_wire[2..0] : WIRE; - -BEGIN - lutrama[45..0].clk0 = inclock; - lutrama[45..0].ena0 = wr_en; - lutrama[45..0].portaaddr[2..0] = wraddr_wire[2..0]; - lutrama[0].portadatain[0..0] = datain_wire[0..0]; - lutrama[1].portadatain[0..0] = datain_wire[1..1]; - lutrama[2].portadatain[0..0] = datain_wire[2..2]; - lutrama[3].portadatain[0..0] = datain_wire[3..3]; - lutrama[4].portadatain[0..0] = datain_wire[4..4]; - lutrama[5].portadatain[0..0] = datain_wire[5..5]; - lutrama[6].portadatain[0..0] = datain_wire[6..6]; - lutrama[7].portadatain[0..0] = datain_wire[7..7]; - lutrama[8].portadatain[0..0] = datain_wire[8..8]; - lutrama[9].portadatain[0..0] = datain_wire[9..9]; - lutrama[10].portadatain[0..0] = datain_wire[10..10]; - lutrama[11].portadatain[0..0] = datain_wire[11..11]; - lutrama[12].portadatain[0..0] = datain_wire[12..12]; - lutrama[13].portadatain[0..0] = datain_wire[13..13]; - lutrama[14].portadatain[0..0] = datain_wire[14..14]; - lutrama[15].portadatain[0..0] = datain_wire[15..15]; - lutrama[16].portadatain[0..0] = datain_wire[16..16]; - lutrama[17].portadatain[0..0] = datain_wire[17..17]; - lutrama[18].portadatain[0..0] = datain_wire[18..18]; - lutrama[19].portadatain[0..0] = datain_wire[19..19]; - lutrama[20].portadatain[0..0] = datain_wire[20..20]; - lutrama[21].portadatain[0..0] = datain_wire[21..21]; - lutrama[22].portadatain[0..0] = datain_wire[22..22]; - lutrama[23].portadatain[0..0] = datain_wire[23..23]; - lutrama[24].portadatain[0..0] = datain_wire[24..24]; - lutrama[25].portadatain[0..0] = datain_wire[25..25]; - lutrama[26].portadatain[0..0] = datain_wire[26..26]; - lutrama[27].portadatain[0..0] = datain_wire[27..27]; - lutrama[28].portadatain[0..0] = datain_wire[28..28]; - lutrama[29].portadatain[0..0] = datain_wire[29..29]; - lutrama[30].portadatain[0..0] = datain_wire[30..30]; - lutrama[31].portadatain[0..0] = datain_wire[31..31]; - lutrama[32].portadatain[0..0] = datain_wire[32..32]; - lutrama[33].portadatain[0..0] = datain_wire[33..33]; - lutrama[34].portadatain[0..0] = datain_wire[34..34]; - lutrama[35].portadatain[0..0] = datain_wire[35..35]; - lutrama[36].portadatain[0..0] = datain_wire[36..36]; - lutrama[37].portadatain[0..0] = datain_wire[37..37]; - lutrama[38].portadatain[0..0] = datain_wire[38..38]; - lutrama[39].portadatain[0..0] = datain_wire[39..39]; - lutrama[40].portadatain[0..0] = datain_wire[40..40]; - lutrama[41].portadatain[0..0] = datain_wire[41..41]; - lutrama[42].portadatain[0..0] = datain_wire[42..42]; - lutrama[43].portadatain[0..0] = datain_wire[43..43]; - lutrama[44].portadatain[0..0] = datain_wire[44..44]; - lutrama[45].portadatain[0..0] = datain_wire[45..45]; - lutrama[45..0].portbaddr[2..0] = rdaddr_wire[2..0]; - rdaddr_reg[].clk = outclock; - rdaddr_reg[].d = rdaddress[]; - datain_wire[] = data[]; - dataout_latch[] = dataout_wire[]; - dataout_wire[] = lutrama[45..0].portbdataout[]; - q[] = dataout_latch[]; - rdaddr_wire[] = rdaddr_reg[].q; - wr_en = wren; - wraddr_wire[] = wraddress[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6vba.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6vba.tdf deleted file mode 100644 index 3e40fdf..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_6vba.tdf +++ /dev/null @@ -1,580 +0,0 @@ ---altdpram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INDATA_ACLR="OFF" INDATA_REG="INCLOCK" NUMWORDS=8 OUTDATA_ACLR="OFF" OUTDATA_REG="UNREGISTERED" RAM_BLOCK_TYPE="MLAB" RDADDRESS_ACLR="OFF" RDADDRESS_REG="OUTCLOCK" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" WIDTH=40 WIDTHAD=3 WRADDRESS_ACLR="OFF" WRADDRESS_REG="INCLOCK" WRCONTROL_ACLR="OFF" WRCONTROL_REG="INCLOCK" data inclock outclock q rdaddress wraddress wren CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO" ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_mlab_cell (clk0, clk1, clr, ena0, ena1, ena2, portaaddr[address_width-1..0], portabyteenamasks[byte_enable_mask_width-1..0], portadatain[data_width-1..0], portbaddr[address_width-1..0]) -WITH ( address_width = 1, byte_enable_mask_width = 2, data_width = 1, first_address, first_bit_number, init_file, last_address, logical_ram_depth, logical_ram_name, logical_ram_width, mem_init0, mixed_port_feed_through_mode, port_b_data_out_clear, port_b_data_out_clock) -RETURNS ( portbdataout[data_width-1..0]); - ---synthesis_resources = MLAB 2 reg 3 -SUBDESIGN dpram_6vba -( - data[39..0] : input; - inclock : input; - outclock : input; - q[39..0] : output; - rdaddress[2..0] : input; - wraddress[2..0] : input; - wren : input; -) -VARIABLE - lutrama0 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 0, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama1 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 1, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama2 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 2, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama3 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 3, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama4 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 4, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama5 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 5, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama6 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 6, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama7 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 7, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama8 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 8, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama9 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 9, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama10 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 10, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama11 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 11, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama12 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 12, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama13 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 13, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama14 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 14, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama15 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 15, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama16 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 16, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama17 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 17, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama18 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 18, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama19 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 19, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama20 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 20, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama21 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 21, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama22 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 22, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama23 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 23, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama24 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 24, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama25 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 25, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama26 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 26, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama27 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 27, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama28 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 28, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama29 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 29, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama30 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 30, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama31 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 31, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama32 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 32, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama33 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 33, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama34 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 34, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama35 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 35, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama36 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 36, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama37 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 37, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama38 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 38, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - lutrama39 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 39, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 40, - mixed_port_feed_through_mode = "dont care" - ); - rdaddr_reg[2..0] : dffe; - datain_wire[39..0] : WIRE; - dataout_latch[39..0] : WIRE; - dataout_wire[39..0] : WIRE; - rdaddr_wire[2..0] : WIRE; - wr_en : WIRE; - wraddr_wire[2..0] : WIRE; - -BEGIN - lutrama[39..0].clk0 = inclock; - lutrama[39..0].ena0 = wr_en; - lutrama[39..0].portaaddr[2..0] = wraddr_wire[2..0]; - lutrama[0].portadatain[0..0] = datain_wire[0..0]; - lutrama[1].portadatain[0..0] = datain_wire[1..1]; - lutrama[2].portadatain[0..0] = datain_wire[2..2]; - lutrama[3].portadatain[0..0] = datain_wire[3..3]; - lutrama[4].portadatain[0..0] = datain_wire[4..4]; - lutrama[5].portadatain[0..0] = datain_wire[5..5]; - lutrama[6].portadatain[0..0] = datain_wire[6..6]; - lutrama[7].portadatain[0..0] = datain_wire[7..7]; - lutrama[8].portadatain[0..0] = datain_wire[8..8]; - lutrama[9].portadatain[0..0] = datain_wire[9..9]; - lutrama[10].portadatain[0..0] = datain_wire[10..10]; - lutrama[11].portadatain[0..0] = datain_wire[11..11]; - lutrama[12].portadatain[0..0] = datain_wire[12..12]; - lutrama[13].portadatain[0..0] = datain_wire[13..13]; - lutrama[14].portadatain[0..0] = datain_wire[14..14]; - lutrama[15].portadatain[0..0] = datain_wire[15..15]; - lutrama[16].portadatain[0..0] = datain_wire[16..16]; - lutrama[17].portadatain[0..0] = datain_wire[17..17]; - lutrama[18].portadatain[0..0] = datain_wire[18..18]; - lutrama[19].portadatain[0..0] = datain_wire[19..19]; - lutrama[20].portadatain[0..0] = datain_wire[20..20]; - lutrama[21].portadatain[0..0] = datain_wire[21..21]; - lutrama[22].portadatain[0..0] = datain_wire[22..22]; - lutrama[23].portadatain[0..0] = datain_wire[23..23]; - lutrama[24].portadatain[0..0] = datain_wire[24..24]; - lutrama[25].portadatain[0..0] = datain_wire[25..25]; - lutrama[26].portadatain[0..0] = datain_wire[26..26]; - lutrama[27].portadatain[0..0] = datain_wire[27..27]; - lutrama[28].portadatain[0..0] = datain_wire[28..28]; - lutrama[29].portadatain[0..0] = datain_wire[29..29]; - lutrama[30].portadatain[0..0] = datain_wire[30..30]; - lutrama[31].portadatain[0..0] = datain_wire[31..31]; - lutrama[32].portadatain[0..0] = datain_wire[32..32]; - lutrama[33].portadatain[0..0] = datain_wire[33..33]; - lutrama[34].portadatain[0..0] = datain_wire[34..34]; - lutrama[35].portadatain[0..0] = datain_wire[35..35]; - lutrama[36].portadatain[0..0] = datain_wire[36..36]; - lutrama[37].portadatain[0..0] = datain_wire[37..37]; - lutrama[38].portadatain[0..0] = datain_wire[38..38]; - lutrama[39].portadatain[0..0] = datain_wire[39..39]; - lutrama[39..0].portbaddr[2..0] = rdaddr_wire[2..0]; - rdaddr_reg[].clk = outclock; - rdaddr_reg[].d = rdaddress[]; - datain_wire[] = data[]; - dataout_latch[] = dataout_wire[]; - dataout_wire[] = lutrama[39..0].portbdataout[]; - q[] = dataout_latch[]; - rdaddr_wire[] = rdaddr_reg[].q; - wr_en = wren; - wraddr_wire[] = wraddress[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_gtv62.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_gtv62.tdf deleted file mode 100644 index da0ba71..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_gtv62.tdf +++ /dev/null @@ -1,1724 +0,0 @@ ---altdpram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INDATA_ACLR="OFF" INDATA_REG="INCLOCK" NUMWORDS=8 OUTDATA_ACLR="OFF" OUTDATA_REG="UNREGISTERED" RAM_BLOCK_TYPE="MLAB" RDADDRESS_ACLR="OFF" RDADDRESS_REG="OUTCLOCK" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" WIDTH=128 WIDTHAD=3 WRADDRESS_ACLR="OFF" WRADDRESS_REG="INCLOCK" WRCONTROL_ACLR="OFF" WRCONTROL_REG="INCLOCK" data inclock outclock q rdaddress wraddress wren CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO" ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_mlab_cell (clk0, clk1, clr, ena0, ena1, ena2, portaaddr[address_width-1..0], portabyteenamasks[byte_enable_mask_width-1..0], portadatain[data_width-1..0], portbaddr[address_width-1..0]) -WITH ( address_width = 1, byte_enable_mask_width = 2, data_width = 1, first_address, first_bit_number, init_file, last_address, logical_ram_depth, logical_ram_name, logical_ram_width, mem_init0, mixed_port_feed_through_mode, port_b_data_out_clear, port_b_data_out_clock) -RETURNS ( portbdataout[data_width-1..0]); - ---synthesis_resources = MLAB 7 reg 3 -SUBDESIGN dpram_gtv62 -( - data[127..0] : input; - inclock : input; - outclock : input; - q[127..0] : output; - rdaddress[2..0] : input; - wraddress[2..0] : input; - wren : input; -) -VARIABLE - lutrama0 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 0, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama1 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 1, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama2 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 2, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama3 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 3, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama4 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 4, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama5 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 5, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama6 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 6, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama7 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 7, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama8 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 8, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama9 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 9, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama10 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 10, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama11 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 11, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama12 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 12, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama13 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 13, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama14 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 14, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama15 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 15, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama16 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 16, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama17 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 17, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama18 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 18, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama19 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 19, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama20 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 20, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama21 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 21, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama22 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 22, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama23 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 23, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama24 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 24, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama25 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 25, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama26 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 26, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama27 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 27, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama28 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 28, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama29 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 29, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama30 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 30, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama31 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 31, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama32 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 32, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama33 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 33, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama34 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 34, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama35 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 35, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama36 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 36, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama37 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 37, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama38 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 38, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama39 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 39, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama40 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 40, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama41 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 41, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama42 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 42, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama43 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 43, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama44 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 44, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama45 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 45, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama46 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 46, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama47 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 47, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama48 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 48, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama49 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 49, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama50 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 50, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama51 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 51, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama52 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 52, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama53 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 53, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama54 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 54, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama55 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 55, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama56 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 56, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama57 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 57, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama58 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 58, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama59 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 59, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama60 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 60, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama61 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 61, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama62 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 62, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama63 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 63, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama64 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 64, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama65 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 65, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama66 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 66, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama67 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 67, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama68 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 68, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama69 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 69, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama70 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 70, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama71 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 71, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama72 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 72, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama73 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 73, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama74 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 74, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama75 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 75, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama76 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 76, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama77 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 77, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama78 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 78, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama79 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 79, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama80 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 80, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama81 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 81, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama82 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 82, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama83 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 83, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama84 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 84, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama85 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 85, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama86 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 86, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama87 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 87, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama88 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 88, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama89 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 89, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama90 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 90, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama91 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 91, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama92 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 92, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama93 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 93, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama94 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 94, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama95 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 95, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama96 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 96, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama97 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 97, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama98 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 98, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama99 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 99, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama100 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 100, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama101 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 101, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama102 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 102, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama103 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 103, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama104 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 104, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama105 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 105, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama106 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 106, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama107 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 107, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama108 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 108, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama109 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 109, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama110 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 110, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama111 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 111, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama112 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 112, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama113 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 113, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama114 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 114, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama115 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 115, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama116 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 116, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama117 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 117, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama118 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 118, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama119 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 119, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama120 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 120, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama121 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 121, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama122 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 122, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama123 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 123, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama124 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 124, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama125 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 125, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama126 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 126, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - lutrama127 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 127, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 128, - mixed_port_feed_through_mode = "dont care" - ); - rdaddr_reg[2..0] : dffe; - datain_wire[127..0] : WIRE; - dataout_latch[127..0] : WIRE; - dataout_wire[127..0] : WIRE; - rdaddr_wire[2..0] : WIRE; - wr_en : WIRE; - wraddr_wire[2..0] : WIRE; - -BEGIN - lutrama[127..0].clk0 = inclock; - lutrama[127..0].ena0 = wr_en; - lutrama[127..0].portaaddr[2..0] = wraddr_wire[2..0]; - lutrama[0].portadatain[0..0] = datain_wire[0..0]; - lutrama[1].portadatain[0..0] = datain_wire[1..1]; - lutrama[2].portadatain[0..0] = datain_wire[2..2]; - lutrama[3].portadatain[0..0] = datain_wire[3..3]; - lutrama[4].portadatain[0..0] = datain_wire[4..4]; - lutrama[5].portadatain[0..0] = datain_wire[5..5]; - lutrama[6].portadatain[0..0] = datain_wire[6..6]; - lutrama[7].portadatain[0..0] = datain_wire[7..7]; - lutrama[8].portadatain[0..0] = datain_wire[8..8]; - lutrama[9].portadatain[0..0] = datain_wire[9..9]; - lutrama[10].portadatain[0..0] = datain_wire[10..10]; - lutrama[11].portadatain[0..0] = datain_wire[11..11]; - lutrama[12].portadatain[0..0] = datain_wire[12..12]; - lutrama[13].portadatain[0..0] = datain_wire[13..13]; - lutrama[14].portadatain[0..0] = datain_wire[14..14]; - lutrama[15].portadatain[0..0] = datain_wire[15..15]; - lutrama[16].portadatain[0..0] = datain_wire[16..16]; - lutrama[17].portadatain[0..0] = datain_wire[17..17]; - lutrama[18].portadatain[0..0] = datain_wire[18..18]; - lutrama[19].portadatain[0..0] = datain_wire[19..19]; - lutrama[20].portadatain[0..0] = datain_wire[20..20]; - lutrama[21].portadatain[0..0] = datain_wire[21..21]; - lutrama[22].portadatain[0..0] = datain_wire[22..22]; - lutrama[23].portadatain[0..0] = datain_wire[23..23]; - lutrama[24].portadatain[0..0] = datain_wire[24..24]; - lutrama[25].portadatain[0..0] = datain_wire[25..25]; - lutrama[26].portadatain[0..0] = datain_wire[26..26]; - lutrama[27].portadatain[0..0] = datain_wire[27..27]; - lutrama[28].portadatain[0..0] = datain_wire[28..28]; - lutrama[29].portadatain[0..0] = datain_wire[29..29]; - lutrama[30].portadatain[0..0] = datain_wire[30..30]; - lutrama[31].portadatain[0..0] = datain_wire[31..31]; - lutrama[32].portadatain[0..0] = datain_wire[32..32]; - lutrama[33].portadatain[0..0] = datain_wire[33..33]; - lutrama[34].portadatain[0..0] = datain_wire[34..34]; - lutrama[35].portadatain[0..0] = datain_wire[35..35]; - lutrama[36].portadatain[0..0] = datain_wire[36..36]; - lutrama[37].portadatain[0..0] = datain_wire[37..37]; - lutrama[38].portadatain[0..0] = datain_wire[38..38]; - lutrama[39].portadatain[0..0] = datain_wire[39..39]; - lutrama[40].portadatain[0..0] = datain_wire[40..40]; - lutrama[41].portadatain[0..0] = datain_wire[41..41]; - lutrama[42].portadatain[0..0] = datain_wire[42..42]; - lutrama[43].portadatain[0..0] = datain_wire[43..43]; - lutrama[44].portadatain[0..0] = datain_wire[44..44]; - lutrama[45].portadatain[0..0] = datain_wire[45..45]; - lutrama[46].portadatain[0..0] = datain_wire[46..46]; - lutrama[47].portadatain[0..0] = datain_wire[47..47]; - lutrama[48].portadatain[0..0] = datain_wire[48..48]; - lutrama[49].portadatain[0..0] = datain_wire[49..49]; - lutrama[50].portadatain[0..0] = datain_wire[50..50]; - lutrama[51].portadatain[0..0] = datain_wire[51..51]; - lutrama[52].portadatain[0..0] = datain_wire[52..52]; - lutrama[53].portadatain[0..0] = datain_wire[53..53]; - lutrama[54].portadatain[0..0] = datain_wire[54..54]; - lutrama[55].portadatain[0..0] = datain_wire[55..55]; - lutrama[56].portadatain[0..0] = datain_wire[56..56]; - lutrama[57].portadatain[0..0] = datain_wire[57..57]; - lutrama[58].portadatain[0..0] = datain_wire[58..58]; - lutrama[59].portadatain[0..0] = datain_wire[59..59]; - lutrama[60].portadatain[0..0] = datain_wire[60..60]; - lutrama[61].portadatain[0..0] = datain_wire[61..61]; - lutrama[62].portadatain[0..0] = datain_wire[62..62]; - lutrama[63].portadatain[0..0] = datain_wire[63..63]; - lutrama[64].portadatain[0..0] = datain_wire[64..64]; - lutrama[65].portadatain[0..0] = datain_wire[65..65]; - lutrama[66].portadatain[0..0] = datain_wire[66..66]; - lutrama[67].portadatain[0..0] = datain_wire[67..67]; - lutrama[68].portadatain[0..0] = datain_wire[68..68]; - lutrama[69].portadatain[0..0] = datain_wire[69..69]; - lutrama[70].portadatain[0..0] = datain_wire[70..70]; - lutrama[71].portadatain[0..0] = datain_wire[71..71]; - lutrama[72].portadatain[0..0] = datain_wire[72..72]; - lutrama[73].portadatain[0..0] = datain_wire[73..73]; - lutrama[74].portadatain[0..0] = datain_wire[74..74]; - lutrama[75].portadatain[0..0] = datain_wire[75..75]; - lutrama[76].portadatain[0..0] = datain_wire[76..76]; - lutrama[77].portadatain[0..0] = datain_wire[77..77]; - lutrama[78].portadatain[0..0] = datain_wire[78..78]; - lutrama[79].portadatain[0..0] = datain_wire[79..79]; - lutrama[80].portadatain[0..0] = datain_wire[80..80]; - lutrama[81].portadatain[0..0] = datain_wire[81..81]; - lutrama[82].portadatain[0..0] = datain_wire[82..82]; - lutrama[83].portadatain[0..0] = datain_wire[83..83]; - lutrama[84].portadatain[0..0] = datain_wire[84..84]; - lutrama[85].portadatain[0..0] = datain_wire[85..85]; - lutrama[86].portadatain[0..0] = datain_wire[86..86]; - lutrama[87].portadatain[0..0] = datain_wire[87..87]; - lutrama[88].portadatain[0..0] = datain_wire[88..88]; - lutrama[89].portadatain[0..0] = datain_wire[89..89]; - lutrama[90].portadatain[0..0] = datain_wire[90..90]; - lutrama[91].portadatain[0..0] = datain_wire[91..91]; - lutrama[92].portadatain[0..0] = datain_wire[92..92]; - lutrama[93].portadatain[0..0] = datain_wire[93..93]; - lutrama[94].portadatain[0..0] = datain_wire[94..94]; - lutrama[95].portadatain[0..0] = datain_wire[95..95]; - lutrama[96].portadatain[0..0] = datain_wire[96..96]; - lutrama[97].portadatain[0..0] = datain_wire[97..97]; - lutrama[98].portadatain[0..0] = datain_wire[98..98]; - lutrama[99].portadatain[0..0] = datain_wire[99..99]; - lutrama[100].portadatain[0..0] = datain_wire[100..100]; - lutrama[101].portadatain[0..0] = datain_wire[101..101]; - lutrama[102].portadatain[0..0] = datain_wire[102..102]; - lutrama[103].portadatain[0..0] = datain_wire[103..103]; - lutrama[104].portadatain[0..0] = datain_wire[104..104]; - lutrama[105].portadatain[0..0] = datain_wire[105..105]; - lutrama[106].portadatain[0..0] = datain_wire[106..106]; - lutrama[107].portadatain[0..0] = datain_wire[107..107]; - lutrama[108].portadatain[0..0] = datain_wire[108..108]; - lutrama[109].portadatain[0..0] = datain_wire[109..109]; - lutrama[110].portadatain[0..0] = datain_wire[110..110]; - lutrama[111].portadatain[0..0] = datain_wire[111..111]; - lutrama[112].portadatain[0..0] = datain_wire[112..112]; - lutrama[113].portadatain[0..0] = datain_wire[113..113]; - lutrama[114].portadatain[0..0] = datain_wire[114..114]; - lutrama[115].portadatain[0..0] = datain_wire[115..115]; - lutrama[116].portadatain[0..0] = datain_wire[116..116]; - lutrama[117].portadatain[0..0] = datain_wire[117..117]; - lutrama[118].portadatain[0..0] = datain_wire[118..118]; - lutrama[119].portadatain[0..0] = datain_wire[119..119]; - lutrama[120].portadatain[0..0] = datain_wire[120..120]; - lutrama[121].portadatain[0..0] = datain_wire[121..121]; - lutrama[122].portadatain[0..0] = datain_wire[122..122]; - lutrama[123].portadatain[0..0] = datain_wire[123..123]; - lutrama[124].portadatain[0..0] = datain_wire[124..124]; - lutrama[125].portadatain[0..0] = datain_wire[125..125]; - lutrama[126].portadatain[0..0] = datain_wire[126..126]; - lutrama[127].portadatain[0..0] = datain_wire[127..127]; - lutrama[127..0].portbaddr[2..0] = rdaddr_wire[2..0]; - rdaddr_reg[].clk = outclock; - rdaddr_reg[].d = rdaddress[]; - datain_wire[] = data[]; - dataout_latch[] = dataout_wire[]; - dataout_wire[] = lutrama[127..0].portbdataout[]; - q[] = dataout_latch[]; - rdaddr_wire[] = rdaddr_reg[].q; - wr_en = wren; - wraddr_wire[] = wraddress[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_qkuh.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_qkuh.tdf deleted file mode 100644 index 2918337..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/dpram_qkuh.tdf +++ /dev/null @@ -1,177 +0,0 @@ ---altdpram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" INDATA_ACLR="OFF" INDATA_REG="INCLOCK" NUMWORDS=8 OUTDATA_ACLR="OFF" OUTDATA_REG="UNREGISTERED" RAM_BLOCK_TYPE="MLAB" RDADDRESS_ACLR="OFF" RDADDRESS_REG="OUTCLOCK" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" WIDTH=9 WIDTHAD=3 WRADDRESS_ACLR="OFF" WRADDRESS_REG="INCLOCK" WRCONTROL_ACLR="OFF" WRCONTROL_REG="INCLOCK" data inclock outclock q rdaddress wraddress wren CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO" ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION tennm_mlab_cell (clk0, clk1, clr, ena0, ena1, ena2, portaaddr[address_width-1..0], portabyteenamasks[byte_enable_mask_width-1..0], portadatain[data_width-1..0], portbaddr[address_width-1..0]) -WITH ( address_width = 1, byte_enable_mask_width = 2, data_width = 1, first_address, first_bit_number, init_file, last_address, logical_ram_depth, logical_ram_name, logical_ram_width, mem_init0, mixed_port_feed_through_mode, port_b_data_out_clear, port_b_data_out_clock) -RETURNS ( portbdataout[data_width-1..0]); - ---synthesis_resources = MLAB 1 reg 3 -SUBDESIGN dpram_qkuh -( - data[8..0] : input; - inclock : input; - outclock : input; - q[8..0] : output; - rdaddress[2..0] : input; - wraddress[2..0] : input; - wren : input; -) -VARIABLE - lutrama0 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 0, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama1 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 1, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama2 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 2, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama3 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 3, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama4 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 4, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama5 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 5, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama6 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 6, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama7 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 7, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - lutrama8 : tennm_mlab_cell - WITH ( - address_width = 3, - data_width = 1, - first_address = 0, - first_bit_number = 8, - last_address = 7, - logical_ram_depth = 8, - logical_ram_name = "ALTDPRAM_INSTANCE", - logical_ram_width = 9, - mixed_port_feed_through_mode = "dont care" - ); - rdaddr_reg[2..0] : dffe; - datain_wire[8..0] : WIRE; - dataout_latch[8..0] : WIRE; - dataout_wire[8..0] : WIRE; - rdaddr_wire[2..0] : WIRE; - wr_en : WIRE; - wraddr_wire[2..0] : WIRE; - -BEGIN - lutrama[8..0].clk0 = inclock; - lutrama[8..0].ena0 = wr_en; - lutrama[8..0].portaaddr[2..0] = wraddr_wire[2..0]; - lutrama[0].portadatain[0..0] = datain_wire[0..0]; - lutrama[1].portadatain[0..0] = datain_wire[1..1]; - lutrama[2].portadatain[0..0] = datain_wire[2..2]; - lutrama[3].portadatain[0..0] = datain_wire[3..3]; - lutrama[4].portadatain[0..0] = datain_wire[4..4]; - lutrama[5].portadatain[0..0] = datain_wire[5..5]; - lutrama[6].portadatain[0..0] = datain_wire[6..6]; - lutrama[7].portadatain[0..0] = datain_wire[7..7]; - lutrama[8].portadatain[0..0] = datain_wire[8..8]; - lutrama[8..0].portbaddr[2..0] = rdaddr_wire[2..0]; - rdaddr_reg[].clk = outclock; - rdaddr_reg[].d = rdaddress[]; - datain_wire[] = data[]; - dataout_latch[] = dataout_wire[]; - dataout_wire[] = lutrama[8..0].portbdataout[]; - q[] = dataout_latch[]; - rdaddr_wire[] = rdaddr_reg[].q; - wr_en = wren; - wraddr_wire[] = wraddress[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_952f1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_952f1.tdf deleted file mode 100644 index cb006bf..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_952f1.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---lpm_abs CARRY_CHAIN="MANUAL" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_WIDTH=33 data result ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 33 -SUBDESIGN lpm_abs_952f1 -( - data[32..0] : input; - overflow : output; - result[32..0] : output; -) -VARIABLE - adder_result_int[33..0] : WIRE; - adder_cin : WIRE; - adder_dataa[32..0] : WIRE; - adder_datab[32..0] : WIRE; - adder_result[32..0] : WIRE; - gnd_wire : WIRE; - result_tmp[32..0] : WIRE; - -BEGIN - adder_result_int[] = (adder_dataa[], adder_cin) + (adder_datab[], adder_cin); - adder_result[] = adder_result_int[33..1]; - adder_cin = data[32..32]; - adder_dataa[] = (data[] $ data[32..32]); - adder_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire); - gnd_wire = B"0"; - overflow = (result_tmp[32..32] & data[32..32]); - result[] = result_tmp[]; - result_tmp[] = adder_result[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_unir.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_unir.tdf deleted file mode 100644 index 883ffea..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_abs_unir.tdf +++ /dev/null @@ -1,49 +0,0 @@ ---lpm_abs CARRY_CHAIN="MANUAL" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_WIDTH=32 data result ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 32 -SUBDESIGN lpm_abs_unir -( - data[31..0] : input; - overflow : output; - result[31..0] : output; -) -VARIABLE - adder_result_int[32..0] : WIRE; - adder_cin : WIRE; - adder_dataa[31..0] : WIRE; - adder_datab[31..0] : WIRE; - adder_result[31..0] : WIRE; - gnd_wire : WIRE; - result_tmp[31..0] : WIRE; - -BEGIN - adder_result_int[] = (adder_dataa[], adder_cin) + (adder_datab[], adder_cin); - adder_result[] = adder_result_int[32..1]; - adder_cin = data[31..31]; - adder_dataa[] = (data[] $ data[31..31]); - adder_datab[] = ( gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire, gnd_wire); - gnd_wire = B"0"; - overflow = (result_tmp[31..31] & data[31..31]); - result[] = result_tmp[]; - result_tmp[] = adder_result[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_clj31.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_clj31.tdf deleted file mode 100644 index 0dff9e3..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_clj31.tdf +++ /dev/null @@ -1,43 +0,0 @@ ---lpm_divide CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_DREPRESENTATION="SIGNED" LPM_NREPRESENTATION="SIGNED" LPM_REMAINDERPOSITIVE="FALSE" LPM_WIDTHD=32 LPM_WIDTHN=33 OPTIMIZE_FOR_SPEED=5 denom numer quotient CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION abs_divider_nsr72 (denominator[31..0], numerator[32..0]) -RETURNS ( quotient[32..0], remainder[31..0]); - ---synthesis_resources = lut 724 -SUBDESIGN lpm_divide_clj31 -( - denom[31..0] : input; - numer[32..0] : input; - quotient[32..0] : output; - remain[31..0] : output; -) -VARIABLE - divider : abs_divider_nsr72; - numer_tmp[32..0] : WIRE; - -BEGIN - divider.denominator[] = denom[]; - divider.numerator[] = numer_tmp[]; - numer_tmp[] = numer[]; - quotient[] = divider.quotient[]; - remain[] = divider.remainder[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_erdi1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_erdi1.tdf deleted file mode 100644 index 0b3637b..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/lpm_divide_erdi1.tdf +++ /dev/null @@ -1,43 +0,0 @@ ---lpm_divide CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=2 LPM_WIDTHN=4 OPTIMIZE_FOR_SPEED=5 denom numer remain CARRY_CHAIN="MANUAL" ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION sign_div_unsign_1bss1 (denominator[1..0], numerator[3..0]) -RETURNS ( quotient[3..0], remainder[1..0]); - ---synthesis_resources = lut 13 -SUBDESIGN lpm_divide_erdi1 -( - denom[1..0] : input; - numer[3..0] : input; - quotient[3..0] : output; - remain[1..0] : output; -) -VARIABLE - divider : sign_div_unsign_1bss1; - numer_tmp[3..0] : WIRE; - -BEGIN - divider.denominator[] = denom[]; - divider.numerator[] = numer_tmp[]; - numer_tmp[] = numer[]; - quotient[] = divider.quotient[]; - remain[] = divider.remainder[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_33p31.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_33p31.tdf deleted file mode 100644 index 83876b1..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_33p31.tdf +++ /dev/null @@ -1,2024 +0,0 @@ ---lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_SIZE=32 LPM_WIDTH=32 LPM_WIDTHS=5 data result sel ---VERSION_BEGIN 26.1 cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 331 -SUBDESIGN mux_33p31 -( - data[1023..0] : input; - result[31..0] : output; - sel[4..0] : input; -) -VARIABLE - l1_w0_n0_mux_dataout : WIRE; - l1_w0_n10_mux_dataout : WIRE; - l1_w0_n11_mux_dataout : WIRE; - l1_w0_n12_mux_dataout : WIRE; - l1_w0_n13_mux_dataout : WIRE; - l1_w0_n14_mux_dataout : WIRE; - l1_w0_n15_mux_dataout : WIRE; - l1_w0_n1_mux_dataout : WIRE; - l1_w0_n2_mux_dataout : WIRE; - l1_w0_n3_mux_dataout : WIRE; - l1_w0_n4_mux_dataout : WIRE; - l1_w0_n5_mux_dataout : WIRE; - l1_w0_n6_mux_dataout : WIRE; - l1_w0_n7_mux_dataout : WIRE; - l1_w0_n8_mux_dataout : WIRE; - l1_w0_n9_mux_dataout : WIRE; - l1_w10_n0_mux_dataout : WIRE; - l1_w10_n10_mux_dataout : WIRE; - l1_w10_n11_mux_dataout : WIRE; - l1_w10_n12_mux_dataout : WIRE; - l1_w10_n13_mux_dataout : WIRE; - l1_w10_n14_mux_dataout : WIRE; - l1_w10_n15_mux_dataout : WIRE; - l1_w10_n1_mux_dataout : WIRE; - l1_w10_n2_mux_dataout : WIRE; - l1_w10_n3_mux_dataout : WIRE; - l1_w10_n4_mux_dataout : WIRE; - l1_w10_n5_mux_dataout : WIRE; - l1_w10_n6_mux_dataout : WIRE; - l1_w10_n7_mux_dataout : WIRE; - l1_w10_n8_mux_dataout : WIRE; - l1_w10_n9_mux_dataout : WIRE; - l1_w11_n0_mux_dataout : WIRE; - l1_w11_n10_mux_dataout : WIRE; - l1_w11_n11_mux_dataout : WIRE; - l1_w11_n12_mux_dataout : WIRE; - l1_w11_n13_mux_dataout : WIRE; - l1_w11_n14_mux_dataout : WIRE; - l1_w11_n15_mux_dataout : WIRE; - l1_w11_n1_mux_dataout : WIRE; - l1_w11_n2_mux_dataout : WIRE; - l1_w11_n3_mux_dataout : WIRE; - l1_w11_n4_mux_dataout : WIRE; - l1_w11_n5_mux_dataout : WIRE; - l1_w11_n6_mux_dataout : WIRE; - l1_w11_n7_mux_dataout : WIRE; - l1_w11_n8_mux_dataout : WIRE; - l1_w11_n9_mux_dataout : WIRE; - l1_w12_n0_mux_dataout : WIRE; - l1_w12_n10_mux_dataout : WIRE; - l1_w12_n11_mux_dataout : WIRE; - l1_w12_n12_mux_dataout : WIRE; - l1_w12_n13_mux_dataout : WIRE; - l1_w12_n14_mux_dataout : WIRE; - l1_w12_n15_mux_dataout : WIRE; - l1_w12_n1_mux_dataout : WIRE; - l1_w12_n2_mux_dataout : WIRE; - l1_w12_n3_mux_dataout : WIRE; - l1_w12_n4_mux_dataout : WIRE; - l1_w12_n5_mux_dataout : WIRE; - l1_w12_n6_mux_dataout : WIRE; - l1_w12_n7_mux_dataout : WIRE; - l1_w12_n8_mux_dataout : WIRE; - l1_w12_n9_mux_dataout : WIRE; - l1_w13_n0_mux_dataout : WIRE; - l1_w13_n10_mux_dataout : WIRE; - l1_w13_n11_mux_dataout : WIRE; - l1_w13_n12_mux_dataout : WIRE; - l1_w13_n13_mux_dataout : WIRE; - l1_w13_n14_mux_dataout : WIRE; - l1_w13_n15_mux_dataout : WIRE; - l1_w13_n1_mux_dataout : WIRE; - l1_w13_n2_mux_dataout : WIRE; - l1_w13_n3_mux_dataout : WIRE; - l1_w13_n4_mux_dataout : WIRE; - l1_w13_n5_mux_dataout : WIRE; - l1_w13_n6_mux_dataout : WIRE; - l1_w13_n7_mux_dataout : WIRE; - l1_w13_n8_mux_dataout : WIRE; - l1_w13_n9_mux_dataout : WIRE; - l1_w14_n0_mux_dataout : WIRE; - l1_w14_n10_mux_dataout : WIRE; - l1_w14_n11_mux_dataout : WIRE; - l1_w14_n12_mux_dataout : WIRE; - l1_w14_n13_mux_dataout : WIRE; - l1_w14_n14_mux_dataout : WIRE; - l1_w14_n15_mux_dataout : WIRE; - l1_w14_n1_mux_dataout : WIRE; - l1_w14_n2_mux_dataout : WIRE; - l1_w14_n3_mux_dataout : WIRE; - l1_w14_n4_mux_dataout : WIRE; - l1_w14_n5_mux_dataout : WIRE; - l1_w14_n6_mux_dataout : WIRE; - l1_w14_n7_mux_dataout : WIRE; - l1_w14_n8_mux_dataout : WIRE; - l1_w14_n9_mux_dataout : WIRE; - l1_w15_n0_mux_dataout : WIRE; - l1_w15_n10_mux_dataout : WIRE; - l1_w15_n11_mux_dataout : WIRE; - l1_w15_n12_mux_dataout : WIRE; - l1_w15_n13_mux_dataout : WIRE; - l1_w15_n14_mux_dataout : WIRE; - l1_w15_n15_mux_dataout : WIRE; - l1_w15_n1_mux_dataout : WIRE; - l1_w15_n2_mux_dataout : WIRE; - l1_w15_n3_mux_dataout : WIRE; - l1_w15_n4_mux_dataout : WIRE; - l1_w15_n5_mux_dataout : WIRE; - l1_w15_n6_mux_dataout : WIRE; - l1_w15_n7_mux_dataout : WIRE; - l1_w15_n8_mux_dataout : WIRE; - l1_w15_n9_mux_dataout : WIRE; - l1_w16_n0_mux_dataout : WIRE; - l1_w16_n10_mux_dataout : WIRE; - l1_w16_n11_mux_dataout : WIRE; - l1_w16_n12_mux_dataout : WIRE; - l1_w16_n13_mux_dataout : WIRE; - l1_w16_n14_mux_dataout : WIRE; - l1_w16_n15_mux_dataout : WIRE; - l1_w16_n1_mux_dataout : WIRE; - l1_w16_n2_mux_dataout : WIRE; - l1_w16_n3_mux_dataout : WIRE; - l1_w16_n4_mux_dataout : WIRE; - l1_w16_n5_mux_dataout : WIRE; - l1_w16_n6_mux_dataout : WIRE; - l1_w16_n7_mux_dataout : WIRE; - l1_w16_n8_mux_dataout : WIRE; - l1_w16_n9_mux_dataout : WIRE; - l1_w17_n0_mux_dataout : WIRE; - l1_w17_n10_mux_dataout : WIRE; - l1_w17_n11_mux_dataout : WIRE; - l1_w17_n12_mux_dataout : WIRE; - l1_w17_n13_mux_dataout : WIRE; - l1_w17_n14_mux_dataout : WIRE; - l1_w17_n15_mux_dataout : WIRE; - l1_w17_n1_mux_dataout : WIRE; - l1_w17_n2_mux_dataout : WIRE; - l1_w17_n3_mux_dataout : WIRE; - l1_w17_n4_mux_dataout : WIRE; - l1_w17_n5_mux_dataout : WIRE; - l1_w17_n6_mux_dataout : WIRE; - l1_w17_n7_mux_dataout : WIRE; - l1_w17_n8_mux_dataout : WIRE; - l1_w17_n9_mux_dataout : WIRE; - l1_w18_n0_mux_dataout : WIRE; - l1_w18_n10_mux_dataout : WIRE; - l1_w18_n11_mux_dataout : WIRE; - l1_w18_n12_mux_dataout : WIRE; - l1_w18_n13_mux_dataout : WIRE; - l1_w18_n14_mux_dataout : WIRE; - l1_w18_n15_mux_dataout : WIRE; - l1_w18_n1_mux_dataout : WIRE; - l1_w18_n2_mux_dataout : WIRE; - l1_w18_n3_mux_dataout : WIRE; - l1_w18_n4_mux_dataout : WIRE; - l1_w18_n5_mux_dataout : WIRE; - l1_w18_n6_mux_dataout : WIRE; - l1_w18_n7_mux_dataout : WIRE; - l1_w18_n8_mux_dataout : WIRE; - l1_w18_n9_mux_dataout : WIRE; - l1_w19_n0_mux_dataout : WIRE; - l1_w19_n10_mux_dataout : WIRE; - l1_w19_n11_mux_dataout : WIRE; - l1_w19_n12_mux_dataout : WIRE; - l1_w19_n13_mux_dataout : WIRE; - l1_w19_n14_mux_dataout : WIRE; - l1_w19_n15_mux_dataout : WIRE; - l1_w19_n1_mux_dataout : WIRE; - l1_w19_n2_mux_dataout : WIRE; - l1_w19_n3_mux_dataout : WIRE; - l1_w19_n4_mux_dataout : WIRE; - l1_w19_n5_mux_dataout : WIRE; - l1_w19_n6_mux_dataout : WIRE; - l1_w19_n7_mux_dataout : WIRE; - l1_w19_n8_mux_dataout : WIRE; - l1_w19_n9_mux_dataout : WIRE; - l1_w1_n0_mux_dataout : WIRE; - l1_w1_n10_mux_dataout : WIRE; - l1_w1_n11_mux_dataout : WIRE; - l1_w1_n12_mux_dataout : WIRE; - l1_w1_n13_mux_dataout : WIRE; - l1_w1_n14_mux_dataout : WIRE; - l1_w1_n15_mux_dataout : WIRE; - l1_w1_n1_mux_dataout : WIRE; - l1_w1_n2_mux_dataout : WIRE; - l1_w1_n3_mux_dataout : WIRE; - l1_w1_n4_mux_dataout : WIRE; - l1_w1_n5_mux_dataout : WIRE; - l1_w1_n6_mux_dataout : WIRE; - l1_w1_n7_mux_dataout : WIRE; - l1_w1_n8_mux_dataout : WIRE; - l1_w1_n9_mux_dataout : WIRE; - l1_w20_n0_mux_dataout : WIRE; - l1_w20_n10_mux_dataout : WIRE; - l1_w20_n11_mux_dataout : WIRE; - l1_w20_n12_mux_dataout : WIRE; - l1_w20_n13_mux_dataout : WIRE; - l1_w20_n14_mux_dataout : WIRE; - l1_w20_n15_mux_dataout : WIRE; - l1_w20_n1_mux_dataout : WIRE; - l1_w20_n2_mux_dataout : WIRE; - l1_w20_n3_mux_dataout : WIRE; - l1_w20_n4_mux_dataout : WIRE; - l1_w20_n5_mux_dataout : WIRE; - l1_w20_n6_mux_dataout : WIRE; - l1_w20_n7_mux_dataout : WIRE; - l1_w20_n8_mux_dataout : WIRE; - l1_w20_n9_mux_dataout : WIRE; - l1_w21_n0_mux_dataout : WIRE; - l1_w21_n10_mux_dataout : WIRE; - l1_w21_n11_mux_dataout : WIRE; - l1_w21_n12_mux_dataout : WIRE; - l1_w21_n13_mux_dataout : WIRE; - l1_w21_n14_mux_dataout : WIRE; - l1_w21_n15_mux_dataout : WIRE; - l1_w21_n1_mux_dataout : WIRE; - l1_w21_n2_mux_dataout : WIRE; - l1_w21_n3_mux_dataout : WIRE; - l1_w21_n4_mux_dataout : WIRE; - l1_w21_n5_mux_dataout : WIRE; - l1_w21_n6_mux_dataout : WIRE; - l1_w21_n7_mux_dataout : WIRE; - l1_w21_n8_mux_dataout : WIRE; - l1_w21_n9_mux_dataout : WIRE; - l1_w22_n0_mux_dataout : WIRE; - l1_w22_n10_mux_dataout : WIRE; - l1_w22_n11_mux_dataout : WIRE; - l1_w22_n12_mux_dataout : WIRE; - l1_w22_n13_mux_dataout : WIRE; - l1_w22_n14_mux_dataout : WIRE; - l1_w22_n15_mux_dataout : WIRE; - l1_w22_n1_mux_dataout : WIRE; - l1_w22_n2_mux_dataout : WIRE; - l1_w22_n3_mux_dataout : WIRE; - l1_w22_n4_mux_dataout : WIRE; - l1_w22_n5_mux_dataout : WIRE; - l1_w22_n6_mux_dataout : WIRE; - l1_w22_n7_mux_dataout : WIRE; - l1_w22_n8_mux_dataout : WIRE; - l1_w22_n9_mux_dataout : WIRE; - l1_w23_n0_mux_dataout : WIRE; - l1_w23_n10_mux_dataout : WIRE; - l1_w23_n11_mux_dataout : WIRE; - l1_w23_n12_mux_dataout : WIRE; - l1_w23_n13_mux_dataout : WIRE; - l1_w23_n14_mux_dataout : WIRE; - l1_w23_n15_mux_dataout : WIRE; - l1_w23_n1_mux_dataout : WIRE; - l1_w23_n2_mux_dataout : WIRE; - l1_w23_n3_mux_dataout : WIRE; - l1_w23_n4_mux_dataout : WIRE; - l1_w23_n5_mux_dataout : WIRE; - l1_w23_n6_mux_dataout : WIRE; - l1_w23_n7_mux_dataout : WIRE; - l1_w23_n8_mux_dataout : WIRE; - l1_w23_n9_mux_dataout : WIRE; - l1_w24_n0_mux_dataout : WIRE; - l1_w24_n10_mux_dataout : WIRE; - l1_w24_n11_mux_dataout : WIRE; - l1_w24_n12_mux_dataout : WIRE; - l1_w24_n13_mux_dataout : WIRE; - l1_w24_n14_mux_dataout : WIRE; - l1_w24_n15_mux_dataout : WIRE; - l1_w24_n1_mux_dataout : WIRE; - l1_w24_n2_mux_dataout : WIRE; - l1_w24_n3_mux_dataout : WIRE; - l1_w24_n4_mux_dataout : WIRE; - l1_w24_n5_mux_dataout : WIRE; - l1_w24_n6_mux_dataout : WIRE; - l1_w24_n7_mux_dataout : WIRE; - l1_w24_n8_mux_dataout : WIRE; - l1_w24_n9_mux_dataout : WIRE; - l1_w25_n0_mux_dataout : WIRE; - l1_w25_n10_mux_dataout : WIRE; - l1_w25_n11_mux_dataout : WIRE; - l1_w25_n12_mux_dataout : WIRE; - l1_w25_n13_mux_dataout : WIRE; - l1_w25_n14_mux_dataout : WIRE; - l1_w25_n15_mux_dataout : WIRE; - l1_w25_n1_mux_dataout : WIRE; - l1_w25_n2_mux_dataout : WIRE; - l1_w25_n3_mux_dataout : WIRE; - l1_w25_n4_mux_dataout : WIRE; - l1_w25_n5_mux_dataout : WIRE; - l1_w25_n6_mux_dataout : WIRE; - l1_w25_n7_mux_dataout : WIRE; - l1_w25_n8_mux_dataout : WIRE; - l1_w25_n9_mux_dataout : WIRE; - l1_w26_n0_mux_dataout : WIRE; - l1_w26_n10_mux_dataout : WIRE; - l1_w26_n11_mux_dataout : WIRE; - l1_w26_n12_mux_dataout : WIRE; - l1_w26_n13_mux_dataout : WIRE; - l1_w26_n14_mux_dataout : WIRE; - l1_w26_n15_mux_dataout : WIRE; - l1_w26_n1_mux_dataout : WIRE; - l1_w26_n2_mux_dataout : WIRE; - l1_w26_n3_mux_dataout : WIRE; - l1_w26_n4_mux_dataout : WIRE; - l1_w26_n5_mux_dataout : WIRE; - l1_w26_n6_mux_dataout : WIRE; - l1_w26_n7_mux_dataout : WIRE; - l1_w26_n8_mux_dataout : WIRE; - l1_w26_n9_mux_dataout : WIRE; - l1_w27_n0_mux_dataout : WIRE; - l1_w27_n10_mux_dataout : WIRE; - l1_w27_n11_mux_dataout : WIRE; - l1_w27_n12_mux_dataout : WIRE; - l1_w27_n13_mux_dataout : WIRE; - l1_w27_n14_mux_dataout : WIRE; - l1_w27_n15_mux_dataout : WIRE; - l1_w27_n1_mux_dataout : WIRE; - l1_w27_n2_mux_dataout : WIRE; - l1_w27_n3_mux_dataout : WIRE; - l1_w27_n4_mux_dataout : WIRE; - l1_w27_n5_mux_dataout : WIRE; - l1_w27_n6_mux_dataout : WIRE; - l1_w27_n7_mux_dataout : WIRE; - l1_w27_n8_mux_dataout : WIRE; - l1_w27_n9_mux_dataout : WIRE; - l1_w28_n0_mux_dataout : WIRE; - l1_w28_n10_mux_dataout : WIRE; - l1_w28_n11_mux_dataout : WIRE; - l1_w28_n12_mux_dataout : WIRE; - l1_w28_n13_mux_dataout : WIRE; - l1_w28_n14_mux_dataout : WIRE; - l1_w28_n15_mux_dataout : WIRE; - l1_w28_n1_mux_dataout : WIRE; - l1_w28_n2_mux_dataout : WIRE; - l1_w28_n3_mux_dataout : WIRE; - l1_w28_n4_mux_dataout : WIRE; - l1_w28_n5_mux_dataout : WIRE; - l1_w28_n6_mux_dataout : WIRE; - l1_w28_n7_mux_dataout : WIRE; - l1_w28_n8_mux_dataout : WIRE; - l1_w28_n9_mux_dataout : WIRE; - l1_w29_n0_mux_dataout : WIRE; - l1_w29_n10_mux_dataout : WIRE; - l1_w29_n11_mux_dataout : WIRE; - l1_w29_n12_mux_dataout : WIRE; - l1_w29_n13_mux_dataout : WIRE; - l1_w29_n14_mux_dataout : WIRE; - l1_w29_n15_mux_dataout : WIRE; - l1_w29_n1_mux_dataout : WIRE; - l1_w29_n2_mux_dataout : WIRE; - l1_w29_n3_mux_dataout : WIRE; - l1_w29_n4_mux_dataout : WIRE; - l1_w29_n5_mux_dataout : WIRE; - l1_w29_n6_mux_dataout : WIRE; - l1_w29_n7_mux_dataout : WIRE; - l1_w29_n8_mux_dataout : WIRE; - l1_w29_n9_mux_dataout : WIRE; - l1_w2_n0_mux_dataout : WIRE; - l1_w2_n10_mux_dataout : WIRE; - l1_w2_n11_mux_dataout : WIRE; - l1_w2_n12_mux_dataout : WIRE; - l1_w2_n13_mux_dataout : WIRE; - l1_w2_n14_mux_dataout : WIRE; - l1_w2_n15_mux_dataout : WIRE; - l1_w2_n1_mux_dataout : WIRE; - l1_w2_n2_mux_dataout : WIRE; - l1_w2_n3_mux_dataout : WIRE; - l1_w2_n4_mux_dataout : WIRE; - l1_w2_n5_mux_dataout : WIRE; - l1_w2_n6_mux_dataout : WIRE; - l1_w2_n7_mux_dataout : WIRE; - l1_w2_n8_mux_dataout : WIRE; - l1_w2_n9_mux_dataout : WIRE; - l1_w30_n0_mux_dataout : WIRE; - l1_w30_n10_mux_dataout : WIRE; - l1_w30_n11_mux_dataout : WIRE; - l1_w30_n12_mux_dataout : WIRE; - l1_w30_n13_mux_dataout : WIRE; - l1_w30_n14_mux_dataout : WIRE; - l1_w30_n15_mux_dataout : WIRE; - l1_w30_n1_mux_dataout : WIRE; - l1_w30_n2_mux_dataout : WIRE; - l1_w30_n3_mux_dataout : WIRE; - l1_w30_n4_mux_dataout : WIRE; - l1_w30_n5_mux_dataout : WIRE; - l1_w30_n6_mux_dataout : WIRE; - l1_w30_n7_mux_dataout : WIRE; - l1_w30_n8_mux_dataout : WIRE; - l1_w30_n9_mux_dataout : WIRE; - l1_w31_n0_mux_dataout : WIRE; - l1_w31_n10_mux_dataout : WIRE; - l1_w31_n11_mux_dataout : WIRE; - l1_w31_n12_mux_dataout : WIRE; - l1_w31_n13_mux_dataout : WIRE; - l1_w31_n14_mux_dataout : WIRE; - l1_w31_n15_mux_dataout : WIRE; - l1_w31_n1_mux_dataout : WIRE; - l1_w31_n2_mux_dataout : WIRE; - l1_w31_n3_mux_dataout : WIRE; - l1_w31_n4_mux_dataout : WIRE; - l1_w31_n5_mux_dataout : WIRE; - l1_w31_n6_mux_dataout : WIRE; - l1_w31_n7_mux_dataout : WIRE; - l1_w31_n8_mux_dataout : WIRE; - l1_w31_n9_mux_dataout : WIRE; - l1_w3_n0_mux_dataout : WIRE; - l1_w3_n10_mux_dataout : WIRE; - l1_w3_n11_mux_dataout : WIRE; - l1_w3_n12_mux_dataout : WIRE; - l1_w3_n13_mux_dataout : WIRE; - l1_w3_n14_mux_dataout : WIRE; - l1_w3_n15_mux_dataout : WIRE; - l1_w3_n1_mux_dataout : WIRE; - l1_w3_n2_mux_dataout : WIRE; - l1_w3_n3_mux_dataout : WIRE; - l1_w3_n4_mux_dataout : WIRE; - l1_w3_n5_mux_dataout : WIRE; - l1_w3_n6_mux_dataout : WIRE; - l1_w3_n7_mux_dataout : WIRE; - l1_w3_n8_mux_dataout : WIRE; - l1_w3_n9_mux_dataout : WIRE; - l1_w4_n0_mux_dataout : WIRE; - l1_w4_n10_mux_dataout : WIRE; - l1_w4_n11_mux_dataout : WIRE; - l1_w4_n12_mux_dataout : WIRE; - l1_w4_n13_mux_dataout : WIRE; - l1_w4_n14_mux_dataout : WIRE; - l1_w4_n15_mux_dataout : WIRE; - l1_w4_n1_mux_dataout : WIRE; - l1_w4_n2_mux_dataout : WIRE; - l1_w4_n3_mux_dataout : WIRE; - l1_w4_n4_mux_dataout : WIRE; - l1_w4_n5_mux_dataout : WIRE; - l1_w4_n6_mux_dataout : WIRE; - l1_w4_n7_mux_dataout : WIRE; - l1_w4_n8_mux_dataout : WIRE; - l1_w4_n9_mux_dataout : WIRE; - l1_w5_n0_mux_dataout : WIRE; - l1_w5_n10_mux_dataout : WIRE; - l1_w5_n11_mux_dataout : WIRE; - l1_w5_n12_mux_dataout : WIRE; - l1_w5_n13_mux_dataout : WIRE; - l1_w5_n14_mux_dataout : WIRE; - l1_w5_n15_mux_dataout : WIRE; - l1_w5_n1_mux_dataout : WIRE; - l1_w5_n2_mux_dataout : WIRE; - l1_w5_n3_mux_dataout : WIRE; - l1_w5_n4_mux_dataout : WIRE; - l1_w5_n5_mux_dataout : WIRE; - l1_w5_n6_mux_dataout : WIRE; - l1_w5_n7_mux_dataout : WIRE; - l1_w5_n8_mux_dataout : WIRE; - l1_w5_n9_mux_dataout : WIRE; - l1_w6_n0_mux_dataout : WIRE; - l1_w6_n10_mux_dataout : WIRE; - l1_w6_n11_mux_dataout : WIRE; - l1_w6_n12_mux_dataout : WIRE; - l1_w6_n13_mux_dataout : WIRE; - l1_w6_n14_mux_dataout : WIRE; - l1_w6_n15_mux_dataout : WIRE; - l1_w6_n1_mux_dataout : WIRE; - l1_w6_n2_mux_dataout : WIRE; - l1_w6_n3_mux_dataout : WIRE; - l1_w6_n4_mux_dataout : WIRE; - l1_w6_n5_mux_dataout : WIRE; - l1_w6_n6_mux_dataout : WIRE; - l1_w6_n7_mux_dataout : WIRE; - l1_w6_n8_mux_dataout : WIRE; - l1_w6_n9_mux_dataout : WIRE; - l1_w7_n0_mux_dataout : WIRE; - l1_w7_n10_mux_dataout : WIRE; - l1_w7_n11_mux_dataout : WIRE; - l1_w7_n12_mux_dataout : WIRE; - l1_w7_n13_mux_dataout : WIRE; - l1_w7_n14_mux_dataout : WIRE; - l1_w7_n15_mux_dataout : WIRE; - l1_w7_n1_mux_dataout : WIRE; - l1_w7_n2_mux_dataout : WIRE; - l1_w7_n3_mux_dataout : WIRE; - l1_w7_n4_mux_dataout : WIRE; - l1_w7_n5_mux_dataout : WIRE; - l1_w7_n6_mux_dataout : WIRE; - l1_w7_n7_mux_dataout : WIRE; - l1_w7_n8_mux_dataout : WIRE; - l1_w7_n9_mux_dataout : WIRE; - l1_w8_n0_mux_dataout : WIRE; - l1_w8_n10_mux_dataout : WIRE; - l1_w8_n11_mux_dataout : WIRE; - l1_w8_n12_mux_dataout : WIRE; - l1_w8_n13_mux_dataout : WIRE; - l1_w8_n14_mux_dataout : WIRE; - l1_w8_n15_mux_dataout : WIRE; - l1_w8_n1_mux_dataout : WIRE; - l1_w8_n2_mux_dataout : WIRE; - l1_w8_n3_mux_dataout : WIRE; - l1_w8_n4_mux_dataout : WIRE; - l1_w8_n5_mux_dataout : WIRE; - l1_w8_n6_mux_dataout : WIRE; - l1_w8_n7_mux_dataout : WIRE; - l1_w8_n8_mux_dataout : WIRE; - l1_w8_n9_mux_dataout : WIRE; - l1_w9_n0_mux_dataout : WIRE; - l1_w9_n10_mux_dataout : WIRE; - l1_w9_n11_mux_dataout : WIRE; - l1_w9_n12_mux_dataout : WIRE; - l1_w9_n13_mux_dataout : WIRE; - l1_w9_n14_mux_dataout : WIRE; - l1_w9_n15_mux_dataout : WIRE; - l1_w9_n1_mux_dataout : WIRE; - l1_w9_n2_mux_dataout : WIRE; - l1_w9_n3_mux_dataout : WIRE; - l1_w9_n4_mux_dataout : WIRE; - l1_w9_n5_mux_dataout : WIRE; - l1_w9_n6_mux_dataout : WIRE; - l1_w9_n7_mux_dataout : WIRE; - l1_w9_n8_mux_dataout : WIRE; - l1_w9_n9_mux_dataout : WIRE; - l2_w0_n0_mux_dataout : WIRE; - l2_w0_n1_mux_dataout : WIRE; - l2_w0_n2_mux_dataout : WIRE; - l2_w0_n3_mux_dataout : WIRE; - l2_w0_n4_mux_dataout : WIRE; - l2_w0_n5_mux_dataout : WIRE; - l2_w0_n6_mux_dataout : WIRE; - l2_w0_n7_mux_dataout : WIRE; - l2_w10_n0_mux_dataout : WIRE; - l2_w10_n1_mux_dataout : WIRE; - l2_w10_n2_mux_dataout : WIRE; - l2_w10_n3_mux_dataout : WIRE; - l2_w10_n4_mux_dataout : WIRE; - l2_w10_n5_mux_dataout : WIRE; - l2_w10_n6_mux_dataout : WIRE; - l2_w10_n7_mux_dataout : WIRE; - l2_w11_n0_mux_dataout : WIRE; - l2_w11_n1_mux_dataout : WIRE; - l2_w11_n2_mux_dataout : WIRE; - l2_w11_n3_mux_dataout : WIRE; - l2_w11_n4_mux_dataout : WIRE; - l2_w11_n5_mux_dataout : WIRE; - l2_w11_n6_mux_dataout : WIRE; - l2_w11_n7_mux_dataout : WIRE; - l2_w12_n0_mux_dataout : WIRE; - l2_w12_n1_mux_dataout : WIRE; - l2_w12_n2_mux_dataout : WIRE; - l2_w12_n3_mux_dataout : WIRE; - l2_w12_n4_mux_dataout : WIRE; - l2_w12_n5_mux_dataout : WIRE; - l2_w12_n6_mux_dataout : WIRE; - l2_w12_n7_mux_dataout : WIRE; - l2_w13_n0_mux_dataout : WIRE; - l2_w13_n1_mux_dataout : WIRE; - l2_w13_n2_mux_dataout : WIRE; - l2_w13_n3_mux_dataout : WIRE; - l2_w13_n4_mux_dataout : WIRE; - l2_w13_n5_mux_dataout : WIRE; - l2_w13_n6_mux_dataout : WIRE; - l2_w13_n7_mux_dataout : WIRE; - l2_w14_n0_mux_dataout : WIRE; - l2_w14_n1_mux_dataout : WIRE; - l2_w14_n2_mux_dataout : WIRE; - l2_w14_n3_mux_dataout : WIRE; - l2_w14_n4_mux_dataout : WIRE; - l2_w14_n5_mux_dataout : WIRE; - l2_w14_n6_mux_dataout : WIRE; - l2_w14_n7_mux_dataout : WIRE; - l2_w15_n0_mux_dataout : WIRE; - l2_w15_n1_mux_dataout : WIRE; - l2_w15_n2_mux_dataout : WIRE; - l2_w15_n3_mux_dataout : WIRE; - l2_w15_n4_mux_dataout : WIRE; - l2_w15_n5_mux_dataout : WIRE; - l2_w15_n6_mux_dataout : WIRE; - l2_w15_n7_mux_dataout : WIRE; - l2_w16_n0_mux_dataout : WIRE; - l2_w16_n1_mux_dataout : WIRE; - l2_w16_n2_mux_dataout : WIRE; - l2_w16_n3_mux_dataout : WIRE; - l2_w16_n4_mux_dataout : WIRE; - l2_w16_n5_mux_dataout : WIRE; - l2_w16_n6_mux_dataout : WIRE; - l2_w16_n7_mux_dataout : WIRE; - l2_w17_n0_mux_dataout : WIRE; - l2_w17_n1_mux_dataout : WIRE; - l2_w17_n2_mux_dataout : WIRE; - l2_w17_n3_mux_dataout : WIRE; - l2_w17_n4_mux_dataout : WIRE; - l2_w17_n5_mux_dataout : WIRE; - l2_w17_n6_mux_dataout : WIRE; - l2_w17_n7_mux_dataout : WIRE; - l2_w18_n0_mux_dataout : WIRE; - l2_w18_n1_mux_dataout : WIRE; - l2_w18_n2_mux_dataout : WIRE; - l2_w18_n3_mux_dataout : WIRE; - l2_w18_n4_mux_dataout : WIRE; - l2_w18_n5_mux_dataout : WIRE; - l2_w18_n6_mux_dataout : WIRE; - l2_w18_n7_mux_dataout : WIRE; - l2_w19_n0_mux_dataout : WIRE; - l2_w19_n1_mux_dataout : WIRE; - l2_w19_n2_mux_dataout : WIRE; - l2_w19_n3_mux_dataout : WIRE; - l2_w19_n4_mux_dataout : WIRE; - l2_w19_n5_mux_dataout : WIRE; - l2_w19_n6_mux_dataout : WIRE; - l2_w19_n7_mux_dataout : WIRE; - l2_w1_n0_mux_dataout : WIRE; - l2_w1_n1_mux_dataout : WIRE; - l2_w1_n2_mux_dataout : WIRE; - l2_w1_n3_mux_dataout : WIRE; - l2_w1_n4_mux_dataout : WIRE; - l2_w1_n5_mux_dataout : WIRE; - l2_w1_n6_mux_dataout : WIRE; - l2_w1_n7_mux_dataout : WIRE; - l2_w20_n0_mux_dataout : WIRE; - l2_w20_n1_mux_dataout : WIRE; - l2_w20_n2_mux_dataout : WIRE; - l2_w20_n3_mux_dataout : WIRE; - l2_w20_n4_mux_dataout : WIRE; - l2_w20_n5_mux_dataout : WIRE; - l2_w20_n6_mux_dataout : WIRE; - l2_w20_n7_mux_dataout : WIRE; - l2_w21_n0_mux_dataout : WIRE; - l2_w21_n1_mux_dataout : WIRE; - l2_w21_n2_mux_dataout : WIRE; - l2_w21_n3_mux_dataout : WIRE; - l2_w21_n4_mux_dataout : WIRE; - l2_w21_n5_mux_dataout : WIRE; - l2_w21_n6_mux_dataout : WIRE; - l2_w21_n7_mux_dataout : WIRE; - l2_w22_n0_mux_dataout : WIRE; - l2_w22_n1_mux_dataout : WIRE; - l2_w22_n2_mux_dataout : WIRE; - l2_w22_n3_mux_dataout : WIRE; - l2_w22_n4_mux_dataout : WIRE; - l2_w22_n5_mux_dataout : WIRE; - l2_w22_n6_mux_dataout : WIRE; - l2_w22_n7_mux_dataout : WIRE; - l2_w23_n0_mux_dataout : WIRE; - l2_w23_n1_mux_dataout : WIRE; - l2_w23_n2_mux_dataout : WIRE; - l2_w23_n3_mux_dataout : WIRE; - l2_w23_n4_mux_dataout : WIRE; - l2_w23_n5_mux_dataout : WIRE; - l2_w23_n6_mux_dataout : WIRE; - l2_w23_n7_mux_dataout : WIRE; - l2_w24_n0_mux_dataout : WIRE; - l2_w24_n1_mux_dataout : WIRE; - l2_w24_n2_mux_dataout : WIRE; - l2_w24_n3_mux_dataout : WIRE; - l2_w24_n4_mux_dataout : WIRE; - l2_w24_n5_mux_dataout : WIRE; - l2_w24_n6_mux_dataout : WIRE; - l2_w24_n7_mux_dataout : WIRE; - l2_w25_n0_mux_dataout : WIRE; - l2_w25_n1_mux_dataout : WIRE; - l2_w25_n2_mux_dataout : WIRE; - l2_w25_n3_mux_dataout : WIRE; - l2_w25_n4_mux_dataout : WIRE; - l2_w25_n5_mux_dataout : WIRE; - l2_w25_n6_mux_dataout : WIRE; - l2_w25_n7_mux_dataout : WIRE; - l2_w26_n0_mux_dataout : WIRE; - l2_w26_n1_mux_dataout : WIRE; - l2_w26_n2_mux_dataout : WIRE; - l2_w26_n3_mux_dataout : WIRE; - l2_w26_n4_mux_dataout : WIRE; - l2_w26_n5_mux_dataout : WIRE; - l2_w26_n6_mux_dataout : WIRE; - l2_w26_n7_mux_dataout : WIRE; - l2_w27_n0_mux_dataout : WIRE; - l2_w27_n1_mux_dataout : WIRE; - l2_w27_n2_mux_dataout : WIRE; - l2_w27_n3_mux_dataout : WIRE; - l2_w27_n4_mux_dataout : WIRE; - l2_w27_n5_mux_dataout : WIRE; - l2_w27_n6_mux_dataout : WIRE; - l2_w27_n7_mux_dataout : WIRE; - l2_w28_n0_mux_dataout : WIRE; - l2_w28_n1_mux_dataout : WIRE; - l2_w28_n2_mux_dataout : WIRE; - l2_w28_n3_mux_dataout : WIRE; - l2_w28_n4_mux_dataout : WIRE; - l2_w28_n5_mux_dataout : WIRE; - l2_w28_n6_mux_dataout : WIRE; - l2_w28_n7_mux_dataout : WIRE; - l2_w29_n0_mux_dataout : WIRE; - l2_w29_n1_mux_dataout : WIRE; - l2_w29_n2_mux_dataout : WIRE; - l2_w29_n3_mux_dataout : WIRE; - l2_w29_n4_mux_dataout : WIRE; - l2_w29_n5_mux_dataout : WIRE; - l2_w29_n6_mux_dataout : WIRE; - l2_w29_n7_mux_dataout : WIRE; - l2_w2_n0_mux_dataout : WIRE; - l2_w2_n1_mux_dataout : WIRE; - l2_w2_n2_mux_dataout : WIRE; - l2_w2_n3_mux_dataout : WIRE; - l2_w2_n4_mux_dataout : WIRE; - l2_w2_n5_mux_dataout : WIRE; - l2_w2_n6_mux_dataout : WIRE; - l2_w2_n7_mux_dataout : WIRE; - l2_w30_n0_mux_dataout : WIRE; - l2_w30_n1_mux_dataout : WIRE; - l2_w30_n2_mux_dataout : WIRE; - l2_w30_n3_mux_dataout : WIRE; - l2_w30_n4_mux_dataout : WIRE; - l2_w30_n5_mux_dataout : WIRE; - l2_w30_n6_mux_dataout : WIRE; - l2_w30_n7_mux_dataout : WIRE; - l2_w31_n0_mux_dataout : WIRE; - l2_w31_n1_mux_dataout : WIRE; - l2_w31_n2_mux_dataout : WIRE; - l2_w31_n3_mux_dataout : WIRE; - l2_w31_n4_mux_dataout : WIRE; - l2_w31_n5_mux_dataout : WIRE; - l2_w31_n6_mux_dataout : WIRE; - l2_w31_n7_mux_dataout : WIRE; - l2_w3_n0_mux_dataout : WIRE; - l2_w3_n1_mux_dataout : WIRE; - l2_w3_n2_mux_dataout : WIRE; - l2_w3_n3_mux_dataout : WIRE; - l2_w3_n4_mux_dataout : WIRE; - l2_w3_n5_mux_dataout : WIRE; - l2_w3_n6_mux_dataout : WIRE; - l2_w3_n7_mux_dataout : WIRE; - l2_w4_n0_mux_dataout : WIRE; - l2_w4_n1_mux_dataout : WIRE; - l2_w4_n2_mux_dataout : WIRE; - l2_w4_n3_mux_dataout : WIRE; - l2_w4_n4_mux_dataout : WIRE; - l2_w4_n5_mux_dataout : WIRE; - l2_w4_n6_mux_dataout : WIRE; - l2_w4_n7_mux_dataout : WIRE; - l2_w5_n0_mux_dataout : WIRE; - l2_w5_n1_mux_dataout : WIRE; - l2_w5_n2_mux_dataout : WIRE; - l2_w5_n3_mux_dataout : WIRE; - l2_w5_n4_mux_dataout : WIRE; - l2_w5_n5_mux_dataout : WIRE; - l2_w5_n6_mux_dataout : WIRE; - l2_w5_n7_mux_dataout : WIRE; - l2_w6_n0_mux_dataout : WIRE; - l2_w6_n1_mux_dataout : WIRE; - l2_w6_n2_mux_dataout : WIRE; - l2_w6_n3_mux_dataout : WIRE; - l2_w6_n4_mux_dataout : WIRE; - l2_w6_n5_mux_dataout : WIRE; - l2_w6_n6_mux_dataout : WIRE; - l2_w6_n7_mux_dataout : WIRE; - l2_w7_n0_mux_dataout : WIRE; - l2_w7_n1_mux_dataout : WIRE; - l2_w7_n2_mux_dataout : WIRE; - l2_w7_n3_mux_dataout : WIRE; - l2_w7_n4_mux_dataout : WIRE; - l2_w7_n5_mux_dataout : WIRE; - l2_w7_n6_mux_dataout : WIRE; - l2_w7_n7_mux_dataout : WIRE; - l2_w8_n0_mux_dataout : WIRE; - l2_w8_n1_mux_dataout : WIRE; - l2_w8_n2_mux_dataout : WIRE; - l2_w8_n3_mux_dataout : WIRE; - l2_w8_n4_mux_dataout : WIRE; - l2_w8_n5_mux_dataout : WIRE; - l2_w8_n6_mux_dataout : WIRE; - l2_w8_n7_mux_dataout : WIRE; - l2_w9_n0_mux_dataout : WIRE; - l2_w9_n1_mux_dataout : WIRE; - l2_w9_n2_mux_dataout : WIRE; - l2_w9_n3_mux_dataout : WIRE; - l2_w9_n4_mux_dataout : WIRE; - l2_w9_n5_mux_dataout : WIRE; - l2_w9_n6_mux_dataout : WIRE; - l2_w9_n7_mux_dataout : WIRE; - l3_w0_n0_mux_dataout : WIRE; - l3_w0_n1_mux_dataout : WIRE; - l3_w0_n2_mux_dataout : WIRE; - l3_w0_n3_mux_dataout : WIRE; - l3_w10_n0_mux_dataout : WIRE; - l3_w10_n1_mux_dataout : WIRE; - l3_w10_n2_mux_dataout : WIRE; - l3_w10_n3_mux_dataout : WIRE; - l3_w11_n0_mux_dataout : WIRE; - l3_w11_n1_mux_dataout : WIRE; - l3_w11_n2_mux_dataout : WIRE; - l3_w11_n3_mux_dataout : WIRE; - l3_w12_n0_mux_dataout : WIRE; - l3_w12_n1_mux_dataout : WIRE; - l3_w12_n2_mux_dataout : WIRE; - l3_w12_n3_mux_dataout : WIRE; - l3_w13_n0_mux_dataout : WIRE; - l3_w13_n1_mux_dataout : WIRE; - l3_w13_n2_mux_dataout : WIRE; - l3_w13_n3_mux_dataout : WIRE; - l3_w14_n0_mux_dataout : WIRE; - l3_w14_n1_mux_dataout : WIRE; - l3_w14_n2_mux_dataout : WIRE; - l3_w14_n3_mux_dataout : WIRE; - l3_w15_n0_mux_dataout : WIRE; - l3_w15_n1_mux_dataout : WIRE; - l3_w15_n2_mux_dataout : WIRE; - l3_w15_n3_mux_dataout : WIRE; - l3_w16_n0_mux_dataout : WIRE; - l3_w16_n1_mux_dataout : WIRE; - l3_w16_n2_mux_dataout : WIRE; - l3_w16_n3_mux_dataout : WIRE; - l3_w17_n0_mux_dataout : WIRE; - l3_w17_n1_mux_dataout : WIRE; - l3_w17_n2_mux_dataout : WIRE; - l3_w17_n3_mux_dataout : WIRE; - l3_w18_n0_mux_dataout : WIRE; - l3_w18_n1_mux_dataout : WIRE; - l3_w18_n2_mux_dataout : WIRE; - l3_w18_n3_mux_dataout : WIRE; - l3_w19_n0_mux_dataout : WIRE; - l3_w19_n1_mux_dataout : WIRE; - l3_w19_n2_mux_dataout : WIRE; - l3_w19_n3_mux_dataout : WIRE; - l3_w1_n0_mux_dataout : WIRE; - l3_w1_n1_mux_dataout : WIRE; - l3_w1_n2_mux_dataout : WIRE; - l3_w1_n3_mux_dataout : WIRE; - l3_w20_n0_mux_dataout : WIRE; - l3_w20_n1_mux_dataout : WIRE; - l3_w20_n2_mux_dataout : WIRE; - l3_w20_n3_mux_dataout : WIRE; - l3_w21_n0_mux_dataout : WIRE; - l3_w21_n1_mux_dataout : WIRE; - l3_w21_n2_mux_dataout : WIRE; - l3_w21_n3_mux_dataout : WIRE; - l3_w22_n0_mux_dataout : WIRE; - l3_w22_n1_mux_dataout : WIRE; - l3_w22_n2_mux_dataout : WIRE; - l3_w22_n3_mux_dataout : WIRE; - l3_w23_n0_mux_dataout : WIRE; - l3_w23_n1_mux_dataout : WIRE; - l3_w23_n2_mux_dataout : WIRE; - l3_w23_n3_mux_dataout : WIRE; - l3_w24_n0_mux_dataout : WIRE; - l3_w24_n1_mux_dataout : WIRE; - l3_w24_n2_mux_dataout : WIRE; - l3_w24_n3_mux_dataout : WIRE; - l3_w25_n0_mux_dataout : WIRE; - l3_w25_n1_mux_dataout : WIRE; - l3_w25_n2_mux_dataout : WIRE; - l3_w25_n3_mux_dataout : WIRE; - l3_w26_n0_mux_dataout : WIRE; - l3_w26_n1_mux_dataout : WIRE; - l3_w26_n2_mux_dataout : WIRE; - l3_w26_n3_mux_dataout : WIRE; - l3_w27_n0_mux_dataout : WIRE; - l3_w27_n1_mux_dataout : WIRE; - l3_w27_n2_mux_dataout : WIRE; - l3_w27_n3_mux_dataout : WIRE; - l3_w28_n0_mux_dataout : WIRE; - l3_w28_n1_mux_dataout : WIRE; - l3_w28_n2_mux_dataout : WIRE; - l3_w28_n3_mux_dataout : WIRE; - l3_w29_n0_mux_dataout : WIRE; - l3_w29_n1_mux_dataout : WIRE; - l3_w29_n2_mux_dataout : WIRE; - l3_w29_n3_mux_dataout : WIRE; - l3_w2_n0_mux_dataout : WIRE; - l3_w2_n1_mux_dataout : WIRE; - l3_w2_n2_mux_dataout : WIRE; - l3_w2_n3_mux_dataout : WIRE; - l3_w30_n0_mux_dataout : WIRE; - l3_w30_n1_mux_dataout : WIRE; - l3_w30_n2_mux_dataout : WIRE; - l3_w30_n3_mux_dataout : WIRE; - l3_w31_n0_mux_dataout : WIRE; - l3_w31_n1_mux_dataout : WIRE; - l3_w31_n2_mux_dataout : WIRE; - l3_w31_n3_mux_dataout : WIRE; - l3_w3_n0_mux_dataout : WIRE; - l3_w3_n1_mux_dataout : WIRE; - l3_w3_n2_mux_dataout : WIRE; - l3_w3_n3_mux_dataout : WIRE; - l3_w4_n0_mux_dataout : WIRE; - l3_w4_n1_mux_dataout : WIRE; - l3_w4_n2_mux_dataout : WIRE; - l3_w4_n3_mux_dataout : WIRE; - l3_w5_n0_mux_dataout : WIRE; - l3_w5_n1_mux_dataout : WIRE; - l3_w5_n2_mux_dataout : WIRE; - l3_w5_n3_mux_dataout : WIRE; - l3_w6_n0_mux_dataout : WIRE; - l3_w6_n1_mux_dataout : WIRE; - l3_w6_n2_mux_dataout : WIRE; - l3_w6_n3_mux_dataout : WIRE; - l3_w7_n0_mux_dataout : WIRE; - l3_w7_n1_mux_dataout : WIRE; - l3_w7_n2_mux_dataout : WIRE; - l3_w7_n3_mux_dataout : WIRE; - l3_w8_n0_mux_dataout : WIRE; - l3_w8_n1_mux_dataout : WIRE; - l3_w8_n2_mux_dataout : WIRE; - l3_w8_n3_mux_dataout : WIRE; - l3_w9_n0_mux_dataout : WIRE; - l3_w9_n1_mux_dataout : WIRE; - l3_w9_n2_mux_dataout : WIRE; - l3_w9_n3_mux_dataout : WIRE; - l4_w0_n0_mux_dataout : WIRE; - l4_w0_n1_mux_dataout : WIRE; - l4_w10_n0_mux_dataout : WIRE; - l4_w10_n1_mux_dataout : WIRE; - l4_w11_n0_mux_dataout : WIRE; - l4_w11_n1_mux_dataout : WIRE; - l4_w12_n0_mux_dataout : WIRE; - l4_w12_n1_mux_dataout : WIRE; - l4_w13_n0_mux_dataout : WIRE; - l4_w13_n1_mux_dataout : WIRE; - l4_w14_n0_mux_dataout : WIRE; - l4_w14_n1_mux_dataout : WIRE; - l4_w15_n0_mux_dataout : WIRE; - l4_w15_n1_mux_dataout : WIRE; - l4_w16_n0_mux_dataout : WIRE; - l4_w16_n1_mux_dataout : WIRE; - l4_w17_n0_mux_dataout : WIRE; - l4_w17_n1_mux_dataout : WIRE; - l4_w18_n0_mux_dataout : WIRE; - l4_w18_n1_mux_dataout : WIRE; - l4_w19_n0_mux_dataout : WIRE; - l4_w19_n1_mux_dataout : WIRE; - l4_w1_n0_mux_dataout : WIRE; - l4_w1_n1_mux_dataout : WIRE; - l4_w20_n0_mux_dataout : WIRE; - l4_w20_n1_mux_dataout : WIRE; - l4_w21_n0_mux_dataout : WIRE; - l4_w21_n1_mux_dataout : WIRE; - l4_w22_n0_mux_dataout : WIRE; - l4_w22_n1_mux_dataout : WIRE; - l4_w23_n0_mux_dataout : WIRE; - l4_w23_n1_mux_dataout : WIRE; - l4_w24_n0_mux_dataout : WIRE; - l4_w24_n1_mux_dataout : WIRE; - l4_w25_n0_mux_dataout : WIRE; - l4_w25_n1_mux_dataout : WIRE; - l4_w26_n0_mux_dataout : WIRE; - l4_w26_n1_mux_dataout : WIRE; - l4_w27_n0_mux_dataout : WIRE; - l4_w27_n1_mux_dataout : WIRE; - l4_w28_n0_mux_dataout : WIRE; - l4_w28_n1_mux_dataout : WIRE; - l4_w29_n0_mux_dataout : WIRE; - l4_w29_n1_mux_dataout : WIRE; - l4_w2_n0_mux_dataout : WIRE; - l4_w2_n1_mux_dataout : WIRE; - l4_w30_n0_mux_dataout : WIRE; - l4_w30_n1_mux_dataout : WIRE; - l4_w31_n0_mux_dataout : WIRE; - l4_w31_n1_mux_dataout : WIRE; - l4_w3_n0_mux_dataout : WIRE; - l4_w3_n1_mux_dataout : WIRE; - l4_w4_n0_mux_dataout : WIRE; - l4_w4_n1_mux_dataout : WIRE; - l4_w5_n0_mux_dataout : WIRE; - l4_w5_n1_mux_dataout : WIRE; - l4_w6_n0_mux_dataout : WIRE; - l4_w6_n1_mux_dataout : WIRE; - l4_w7_n0_mux_dataout : WIRE; - l4_w7_n1_mux_dataout : WIRE; - l4_w8_n0_mux_dataout : WIRE; - l4_w8_n1_mux_dataout : WIRE; - l4_w9_n0_mux_dataout : WIRE; - l4_w9_n1_mux_dataout : WIRE; - l5_w0_n0_mux_dataout : WIRE; - l5_w10_n0_mux_dataout : WIRE; - l5_w11_n0_mux_dataout : WIRE; - l5_w12_n0_mux_dataout : WIRE; - l5_w13_n0_mux_dataout : WIRE; - l5_w14_n0_mux_dataout : WIRE; - l5_w15_n0_mux_dataout : WIRE; - l5_w16_n0_mux_dataout : WIRE; - l5_w17_n0_mux_dataout : WIRE; - l5_w18_n0_mux_dataout : WIRE; - l5_w19_n0_mux_dataout : WIRE; - l5_w1_n0_mux_dataout : WIRE; - l5_w20_n0_mux_dataout : WIRE; - l5_w21_n0_mux_dataout : WIRE; - l5_w22_n0_mux_dataout : WIRE; - l5_w23_n0_mux_dataout : WIRE; - l5_w24_n0_mux_dataout : WIRE; - l5_w25_n0_mux_dataout : WIRE; - l5_w26_n0_mux_dataout : WIRE; - l5_w27_n0_mux_dataout : WIRE; - l5_w28_n0_mux_dataout : WIRE; - l5_w29_n0_mux_dataout : WIRE; - l5_w2_n0_mux_dataout : WIRE; - l5_w30_n0_mux_dataout : WIRE; - l5_w31_n0_mux_dataout : WIRE; - l5_w3_n0_mux_dataout : WIRE; - l5_w4_n0_mux_dataout : WIRE; - l5_w5_n0_mux_dataout : WIRE; - l5_w6_n0_mux_dataout : WIRE; - l5_w7_n0_mux_dataout : WIRE; - l5_w8_n0_mux_dataout : WIRE; - l5_w9_n0_mux_dataout : WIRE; - data_wire[1983..0] : WIRE; - result_wire_ext[31..0] : WIRE; - sel_wire[24..0] : WIRE; - -BEGIN - l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[32..32] # !(sel_wire[0..0]) & data_wire[0..0]; - l1_w0_n10_mux_dataout = sel_wire[0..0] & data_wire[672..672] # !(sel_wire[0..0]) & data_wire[640..640]; - l1_w0_n11_mux_dataout = sel_wire[0..0] & data_wire[736..736] # !(sel_wire[0..0]) & data_wire[704..704]; - l1_w0_n12_mux_dataout = sel_wire[0..0] & data_wire[800..800] # !(sel_wire[0..0]) & data_wire[768..768]; - l1_w0_n13_mux_dataout = sel_wire[0..0] & data_wire[864..864] # !(sel_wire[0..0]) & data_wire[832..832]; - l1_w0_n14_mux_dataout = sel_wire[0..0] & data_wire[928..928] # !(sel_wire[0..0]) & data_wire[896..896]; - l1_w0_n15_mux_dataout = sel_wire[0..0] & data_wire[992..992] # !(sel_wire[0..0]) & data_wire[960..960]; - l1_w0_n1_mux_dataout = sel_wire[0..0] & data_wire[96..96] # !(sel_wire[0..0]) & data_wire[64..64]; - l1_w0_n2_mux_dataout = sel_wire[0..0] & data_wire[160..160] # !(sel_wire[0..0]) & data_wire[128..128]; - l1_w0_n3_mux_dataout = sel_wire[0..0] & data_wire[224..224] # !(sel_wire[0..0]) & data_wire[192..192]; - l1_w0_n4_mux_dataout = sel_wire[0..0] & data_wire[288..288] # !(sel_wire[0..0]) & data_wire[256..256]; - l1_w0_n5_mux_dataout = sel_wire[0..0] & data_wire[352..352] # !(sel_wire[0..0]) & data_wire[320..320]; - l1_w0_n6_mux_dataout = sel_wire[0..0] & data_wire[416..416] # !(sel_wire[0..0]) & data_wire[384..384]; - l1_w0_n7_mux_dataout = sel_wire[0..0] & data_wire[480..480] # !(sel_wire[0..0]) & data_wire[448..448]; - l1_w0_n8_mux_dataout = sel_wire[0..0] & data_wire[544..544] # !(sel_wire[0..0]) & data_wire[512..512]; - l1_w0_n9_mux_dataout = sel_wire[0..0] & data_wire[608..608] # !(sel_wire[0..0]) & data_wire[576..576]; - l1_w10_n0_mux_dataout = sel_wire[0..0] & data_wire[42..42] # !(sel_wire[0..0]) & data_wire[10..10]; - l1_w10_n10_mux_dataout = sel_wire[0..0] & data_wire[682..682] # !(sel_wire[0..0]) & data_wire[650..650]; - l1_w10_n11_mux_dataout = sel_wire[0..0] & data_wire[746..746] # !(sel_wire[0..0]) & data_wire[714..714]; - l1_w10_n12_mux_dataout = sel_wire[0..0] & data_wire[810..810] # !(sel_wire[0..0]) & data_wire[778..778]; - l1_w10_n13_mux_dataout = sel_wire[0..0] & data_wire[874..874] # !(sel_wire[0..0]) & data_wire[842..842]; - l1_w10_n14_mux_dataout = sel_wire[0..0] & data_wire[938..938] # !(sel_wire[0..0]) & data_wire[906..906]; - l1_w10_n15_mux_dataout = sel_wire[0..0] & data_wire[1002..1002] # !(sel_wire[0..0]) & data_wire[970..970]; - l1_w10_n1_mux_dataout = sel_wire[0..0] & data_wire[106..106] # !(sel_wire[0..0]) & data_wire[74..74]; - l1_w10_n2_mux_dataout = sel_wire[0..0] & data_wire[170..170] # !(sel_wire[0..0]) & data_wire[138..138]; - l1_w10_n3_mux_dataout = sel_wire[0..0] & data_wire[234..234] # !(sel_wire[0..0]) & data_wire[202..202]; - l1_w10_n4_mux_dataout = sel_wire[0..0] & data_wire[298..298] # !(sel_wire[0..0]) & data_wire[266..266]; - l1_w10_n5_mux_dataout = sel_wire[0..0] & data_wire[362..362] # !(sel_wire[0..0]) & data_wire[330..330]; - l1_w10_n6_mux_dataout = sel_wire[0..0] & data_wire[426..426] # !(sel_wire[0..0]) & data_wire[394..394]; - l1_w10_n7_mux_dataout = sel_wire[0..0] & data_wire[490..490] # !(sel_wire[0..0]) & data_wire[458..458]; - l1_w10_n8_mux_dataout = sel_wire[0..0] & data_wire[554..554] # !(sel_wire[0..0]) & data_wire[522..522]; - l1_w10_n9_mux_dataout = sel_wire[0..0] & data_wire[618..618] # !(sel_wire[0..0]) & data_wire[586..586]; - l1_w11_n0_mux_dataout = sel_wire[0..0] & data_wire[43..43] # !(sel_wire[0..0]) & data_wire[11..11]; - l1_w11_n10_mux_dataout = sel_wire[0..0] & data_wire[683..683] # !(sel_wire[0..0]) & data_wire[651..651]; - l1_w11_n11_mux_dataout = sel_wire[0..0] & data_wire[747..747] # !(sel_wire[0..0]) & data_wire[715..715]; - l1_w11_n12_mux_dataout = sel_wire[0..0] & data_wire[811..811] # !(sel_wire[0..0]) & data_wire[779..779]; - l1_w11_n13_mux_dataout = sel_wire[0..0] & data_wire[875..875] # !(sel_wire[0..0]) & data_wire[843..843]; - l1_w11_n14_mux_dataout = sel_wire[0..0] & data_wire[939..939] # !(sel_wire[0..0]) & data_wire[907..907]; - l1_w11_n15_mux_dataout = sel_wire[0..0] & data_wire[1003..1003] # !(sel_wire[0..0]) & data_wire[971..971]; - l1_w11_n1_mux_dataout = sel_wire[0..0] & data_wire[107..107] # !(sel_wire[0..0]) & data_wire[75..75]; - l1_w11_n2_mux_dataout = sel_wire[0..0] & data_wire[171..171] # !(sel_wire[0..0]) & data_wire[139..139]; - l1_w11_n3_mux_dataout = sel_wire[0..0] & data_wire[235..235] # !(sel_wire[0..0]) & data_wire[203..203]; - l1_w11_n4_mux_dataout = sel_wire[0..0] & data_wire[299..299] # !(sel_wire[0..0]) & data_wire[267..267]; - l1_w11_n5_mux_dataout = sel_wire[0..0] & data_wire[363..363] # !(sel_wire[0..0]) & data_wire[331..331]; - l1_w11_n6_mux_dataout = sel_wire[0..0] & data_wire[427..427] # !(sel_wire[0..0]) & data_wire[395..395]; - l1_w11_n7_mux_dataout = sel_wire[0..0] & data_wire[491..491] # !(sel_wire[0..0]) & data_wire[459..459]; - l1_w11_n8_mux_dataout = sel_wire[0..0] & data_wire[555..555] # !(sel_wire[0..0]) & data_wire[523..523]; - l1_w11_n9_mux_dataout = sel_wire[0..0] & data_wire[619..619] # !(sel_wire[0..0]) & data_wire[587..587]; - l1_w12_n0_mux_dataout = sel_wire[0..0] & data_wire[44..44] # !(sel_wire[0..0]) & data_wire[12..12]; - l1_w12_n10_mux_dataout = sel_wire[0..0] & data_wire[684..684] # !(sel_wire[0..0]) & data_wire[652..652]; - l1_w12_n11_mux_dataout = sel_wire[0..0] & data_wire[748..748] # !(sel_wire[0..0]) & data_wire[716..716]; - l1_w12_n12_mux_dataout = sel_wire[0..0] & data_wire[812..812] # !(sel_wire[0..0]) & data_wire[780..780]; - l1_w12_n13_mux_dataout = sel_wire[0..0] & data_wire[876..876] # !(sel_wire[0..0]) & data_wire[844..844]; - l1_w12_n14_mux_dataout = sel_wire[0..0] & data_wire[940..940] # !(sel_wire[0..0]) & data_wire[908..908]; - l1_w12_n15_mux_dataout = sel_wire[0..0] & data_wire[1004..1004] # !(sel_wire[0..0]) & data_wire[972..972]; - l1_w12_n1_mux_dataout = sel_wire[0..0] & data_wire[108..108] # !(sel_wire[0..0]) & data_wire[76..76]; - l1_w12_n2_mux_dataout = sel_wire[0..0] & data_wire[172..172] # !(sel_wire[0..0]) & data_wire[140..140]; - l1_w12_n3_mux_dataout = sel_wire[0..0] & data_wire[236..236] # !(sel_wire[0..0]) & data_wire[204..204]; - l1_w12_n4_mux_dataout = sel_wire[0..0] & data_wire[300..300] # !(sel_wire[0..0]) & data_wire[268..268]; - l1_w12_n5_mux_dataout = sel_wire[0..0] & data_wire[364..364] # !(sel_wire[0..0]) & data_wire[332..332]; - l1_w12_n6_mux_dataout = sel_wire[0..0] & data_wire[428..428] # !(sel_wire[0..0]) & data_wire[396..396]; - l1_w12_n7_mux_dataout = sel_wire[0..0] & data_wire[492..492] # !(sel_wire[0..0]) & data_wire[460..460]; - l1_w12_n8_mux_dataout = sel_wire[0..0] & data_wire[556..556] # !(sel_wire[0..0]) & data_wire[524..524]; - l1_w12_n9_mux_dataout = sel_wire[0..0] & data_wire[620..620] # !(sel_wire[0..0]) & data_wire[588..588]; - l1_w13_n0_mux_dataout = sel_wire[0..0] & data_wire[45..45] # !(sel_wire[0..0]) & data_wire[13..13]; - l1_w13_n10_mux_dataout = sel_wire[0..0] & data_wire[685..685] # !(sel_wire[0..0]) & data_wire[653..653]; - l1_w13_n11_mux_dataout = sel_wire[0..0] & data_wire[749..749] # !(sel_wire[0..0]) & data_wire[717..717]; - l1_w13_n12_mux_dataout = sel_wire[0..0] & data_wire[813..813] # !(sel_wire[0..0]) & data_wire[781..781]; - l1_w13_n13_mux_dataout = sel_wire[0..0] & data_wire[877..877] # !(sel_wire[0..0]) & data_wire[845..845]; - l1_w13_n14_mux_dataout = sel_wire[0..0] & data_wire[941..941] # !(sel_wire[0..0]) & data_wire[909..909]; - l1_w13_n15_mux_dataout = sel_wire[0..0] & data_wire[1005..1005] # !(sel_wire[0..0]) & data_wire[973..973]; - l1_w13_n1_mux_dataout = sel_wire[0..0] & data_wire[109..109] # !(sel_wire[0..0]) & data_wire[77..77]; - l1_w13_n2_mux_dataout = sel_wire[0..0] & data_wire[173..173] # !(sel_wire[0..0]) & data_wire[141..141]; - l1_w13_n3_mux_dataout = sel_wire[0..0] & data_wire[237..237] # !(sel_wire[0..0]) & data_wire[205..205]; - l1_w13_n4_mux_dataout = sel_wire[0..0] & data_wire[301..301] # !(sel_wire[0..0]) & data_wire[269..269]; - l1_w13_n5_mux_dataout = sel_wire[0..0] & data_wire[365..365] # !(sel_wire[0..0]) & data_wire[333..333]; - l1_w13_n6_mux_dataout = sel_wire[0..0] & data_wire[429..429] # !(sel_wire[0..0]) & data_wire[397..397]; - l1_w13_n7_mux_dataout = sel_wire[0..0] & data_wire[493..493] # !(sel_wire[0..0]) & data_wire[461..461]; - l1_w13_n8_mux_dataout = sel_wire[0..0] & data_wire[557..557] # !(sel_wire[0..0]) & data_wire[525..525]; - l1_w13_n9_mux_dataout = sel_wire[0..0] & data_wire[621..621] # !(sel_wire[0..0]) & data_wire[589..589]; - l1_w14_n0_mux_dataout = sel_wire[0..0] & data_wire[46..46] # !(sel_wire[0..0]) & data_wire[14..14]; - l1_w14_n10_mux_dataout = sel_wire[0..0] & data_wire[686..686] # !(sel_wire[0..0]) & data_wire[654..654]; - l1_w14_n11_mux_dataout = sel_wire[0..0] & data_wire[750..750] # !(sel_wire[0..0]) & data_wire[718..718]; - l1_w14_n12_mux_dataout = sel_wire[0..0] & data_wire[814..814] # !(sel_wire[0..0]) & data_wire[782..782]; - l1_w14_n13_mux_dataout = sel_wire[0..0] & data_wire[878..878] # !(sel_wire[0..0]) & data_wire[846..846]; - l1_w14_n14_mux_dataout = sel_wire[0..0] & data_wire[942..942] # !(sel_wire[0..0]) & data_wire[910..910]; - l1_w14_n15_mux_dataout = sel_wire[0..0] & data_wire[1006..1006] # !(sel_wire[0..0]) & data_wire[974..974]; - l1_w14_n1_mux_dataout = sel_wire[0..0] & data_wire[110..110] # !(sel_wire[0..0]) & data_wire[78..78]; - l1_w14_n2_mux_dataout = sel_wire[0..0] & data_wire[174..174] # !(sel_wire[0..0]) & data_wire[142..142]; - l1_w14_n3_mux_dataout = sel_wire[0..0] & data_wire[238..238] # !(sel_wire[0..0]) & data_wire[206..206]; - l1_w14_n4_mux_dataout = sel_wire[0..0] & data_wire[302..302] # !(sel_wire[0..0]) & data_wire[270..270]; - l1_w14_n5_mux_dataout = sel_wire[0..0] & data_wire[366..366] # !(sel_wire[0..0]) & data_wire[334..334]; - l1_w14_n6_mux_dataout = sel_wire[0..0] & data_wire[430..430] # !(sel_wire[0..0]) & data_wire[398..398]; - l1_w14_n7_mux_dataout = sel_wire[0..0] & data_wire[494..494] # !(sel_wire[0..0]) & data_wire[462..462]; - l1_w14_n8_mux_dataout = sel_wire[0..0] & data_wire[558..558] # !(sel_wire[0..0]) & data_wire[526..526]; - l1_w14_n9_mux_dataout = sel_wire[0..0] & data_wire[622..622] # !(sel_wire[0..0]) & data_wire[590..590]; - l1_w15_n0_mux_dataout = sel_wire[0..0] & data_wire[47..47] # !(sel_wire[0..0]) & data_wire[15..15]; - l1_w15_n10_mux_dataout = sel_wire[0..0] & data_wire[687..687] # !(sel_wire[0..0]) & data_wire[655..655]; - l1_w15_n11_mux_dataout = sel_wire[0..0] & data_wire[751..751] # !(sel_wire[0..0]) & data_wire[719..719]; - l1_w15_n12_mux_dataout = sel_wire[0..0] & data_wire[815..815] # !(sel_wire[0..0]) & data_wire[783..783]; - l1_w15_n13_mux_dataout = sel_wire[0..0] & data_wire[879..879] # !(sel_wire[0..0]) & data_wire[847..847]; - l1_w15_n14_mux_dataout = sel_wire[0..0] & data_wire[943..943] # !(sel_wire[0..0]) & data_wire[911..911]; - l1_w15_n15_mux_dataout = sel_wire[0..0] & data_wire[1007..1007] # !(sel_wire[0..0]) & data_wire[975..975]; - l1_w15_n1_mux_dataout = sel_wire[0..0] & data_wire[111..111] # !(sel_wire[0..0]) & data_wire[79..79]; - l1_w15_n2_mux_dataout = sel_wire[0..0] & data_wire[175..175] # !(sel_wire[0..0]) & data_wire[143..143]; - l1_w15_n3_mux_dataout = sel_wire[0..0] & data_wire[239..239] # !(sel_wire[0..0]) & data_wire[207..207]; - l1_w15_n4_mux_dataout = sel_wire[0..0] & data_wire[303..303] # !(sel_wire[0..0]) & data_wire[271..271]; - l1_w15_n5_mux_dataout = sel_wire[0..0] & data_wire[367..367] # !(sel_wire[0..0]) & data_wire[335..335]; - l1_w15_n6_mux_dataout = sel_wire[0..0] & data_wire[431..431] # !(sel_wire[0..0]) & data_wire[399..399]; - l1_w15_n7_mux_dataout = sel_wire[0..0] & data_wire[495..495] # !(sel_wire[0..0]) & data_wire[463..463]; - l1_w15_n8_mux_dataout = sel_wire[0..0] & data_wire[559..559] # !(sel_wire[0..0]) & data_wire[527..527]; - l1_w15_n9_mux_dataout = sel_wire[0..0] & data_wire[623..623] # !(sel_wire[0..0]) & data_wire[591..591]; - l1_w16_n0_mux_dataout = sel_wire[0..0] & data_wire[48..48] # !(sel_wire[0..0]) & data_wire[16..16]; - l1_w16_n10_mux_dataout = sel_wire[0..0] & data_wire[688..688] # !(sel_wire[0..0]) & data_wire[656..656]; - l1_w16_n11_mux_dataout = sel_wire[0..0] & data_wire[752..752] # !(sel_wire[0..0]) & data_wire[720..720]; - l1_w16_n12_mux_dataout = sel_wire[0..0] & data_wire[816..816] # !(sel_wire[0..0]) & data_wire[784..784]; - l1_w16_n13_mux_dataout = sel_wire[0..0] & data_wire[880..880] # !(sel_wire[0..0]) & data_wire[848..848]; - l1_w16_n14_mux_dataout = sel_wire[0..0] & data_wire[944..944] # !(sel_wire[0..0]) & data_wire[912..912]; - l1_w16_n15_mux_dataout = sel_wire[0..0] & data_wire[1008..1008] # !(sel_wire[0..0]) & data_wire[976..976]; - l1_w16_n1_mux_dataout = sel_wire[0..0] & data_wire[112..112] # !(sel_wire[0..0]) & data_wire[80..80]; - l1_w16_n2_mux_dataout = sel_wire[0..0] & data_wire[176..176] # !(sel_wire[0..0]) & data_wire[144..144]; - l1_w16_n3_mux_dataout = sel_wire[0..0] & data_wire[240..240] # !(sel_wire[0..0]) & data_wire[208..208]; - l1_w16_n4_mux_dataout = sel_wire[0..0] & data_wire[304..304] # !(sel_wire[0..0]) & data_wire[272..272]; - l1_w16_n5_mux_dataout = sel_wire[0..0] & data_wire[368..368] # !(sel_wire[0..0]) & data_wire[336..336]; - l1_w16_n6_mux_dataout = sel_wire[0..0] & data_wire[432..432] # !(sel_wire[0..0]) & data_wire[400..400]; - l1_w16_n7_mux_dataout = sel_wire[0..0] & data_wire[496..496] # !(sel_wire[0..0]) & data_wire[464..464]; - l1_w16_n8_mux_dataout = sel_wire[0..0] & data_wire[560..560] # !(sel_wire[0..0]) & data_wire[528..528]; - l1_w16_n9_mux_dataout = sel_wire[0..0] & data_wire[624..624] # !(sel_wire[0..0]) & data_wire[592..592]; - l1_w17_n0_mux_dataout = sel_wire[0..0] & data_wire[49..49] # !(sel_wire[0..0]) & data_wire[17..17]; - l1_w17_n10_mux_dataout = sel_wire[0..0] & data_wire[689..689] # !(sel_wire[0..0]) & data_wire[657..657]; - l1_w17_n11_mux_dataout = sel_wire[0..0] & data_wire[753..753] # !(sel_wire[0..0]) & data_wire[721..721]; - l1_w17_n12_mux_dataout = sel_wire[0..0] & data_wire[817..817] # !(sel_wire[0..0]) & data_wire[785..785]; - l1_w17_n13_mux_dataout = sel_wire[0..0] & data_wire[881..881] # !(sel_wire[0..0]) & data_wire[849..849]; - l1_w17_n14_mux_dataout = sel_wire[0..0] & data_wire[945..945] # !(sel_wire[0..0]) & data_wire[913..913]; - l1_w17_n15_mux_dataout = sel_wire[0..0] & data_wire[1009..1009] # !(sel_wire[0..0]) & data_wire[977..977]; - l1_w17_n1_mux_dataout = sel_wire[0..0] & data_wire[113..113] # !(sel_wire[0..0]) & data_wire[81..81]; - l1_w17_n2_mux_dataout = sel_wire[0..0] & data_wire[177..177] # !(sel_wire[0..0]) & data_wire[145..145]; - l1_w17_n3_mux_dataout = sel_wire[0..0] & data_wire[241..241] # !(sel_wire[0..0]) & data_wire[209..209]; - l1_w17_n4_mux_dataout = sel_wire[0..0] & data_wire[305..305] # !(sel_wire[0..0]) & data_wire[273..273]; - l1_w17_n5_mux_dataout = sel_wire[0..0] & data_wire[369..369] # !(sel_wire[0..0]) & data_wire[337..337]; - l1_w17_n6_mux_dataout = sel_wire[0..0] & data_wire[433..433] # !(sel_wire[0..0]) & data_wire[401..401]; - l1_w17_n7_mux_dataout = sel_wire[0..0] & data_wire[497..497] # !(sel_wire[0..0]) & data_wire[465..465]; - l1_w17_n8_mux_dataout = sel_wire[0..0] & data_wire[561..561] # !(sel_wire[0..0]) & data_wire[529..529]; - l1_w17_n9_mux_dataout = sel_wire[0..0] & data_wire[625..625] # !(sel_wire[0..0]) & data_wire[593..593]; - l1_w18_n0_mux_dataout = sel_wire[0..0] & data_wire[50..50] # !(sel_wire[0..0]) & data_wire[18..18]; - l1_w18_n10_mux_dataout = sel_wire[0..0] & data_wire[690..690] # !(sel_wire[0..0]) & data_wire[658..658]; - l1_w18_n11_mux_dataout = sel_wire[0..0] & data_wire[754..754] # !(sel_wire[0..0]) & data_wire[722..722]; - l1_w18_n12_mux_dataout = sel_wire[0..0] & data_wire[818..818] # !(sel_wire[0..0]) & data_wire[786..786]; - l1_w18_n13_mux_dataout = sel_wire[0..0] & data_wire[882..882] # !(sel_wire[0..0]) & data_wire[850..850]; - l1_w18_n14_mux_dataout = sel_wire[0..0] & data_wire[946..946] # !(sel_wire[0..0]) & data_wire[914..914]; - l1_w18_n15_mux_dataout = sel_wire[0..0] & data_wire[1010..1010] # !(sel_wire[0..0]) & data_wire[978..978]; - l1_w18_n1_mux_dataout = sel_wire[0..0] & data_wire[114..114] # !(sel_wire[0..0]) & data_wire[82..82]; - l1_w18_n2_mux_dataout = sel_wire[0..0] & data_wire[178..178] # !(sel_wire[0..0]) & data_wire[146..146]; - l1_w18_n3_mux_dataout = sel_wire[0..0] & data_wire[242..242] # !(sel_wire[0..0]) & data_wire[210..210]; - l1_w18_n4_mux_dataout = sel_wire[0..0] & data_wire[306..306] # !(sel_wire[0..0]) & data_wire[274..274]; - l1_w18_n5_mux_dataout = sel_wire[0..0] & data_wire[370..370] # !(sel_wire[0..0]) & data_wire[338..338]; - l1_w18_n6_mux_dataout = sel_wire[0..0] & data_wire[434..434] # !(sel_wire[0..0]) & data_wire[402..402]; - l1_w18_n7_mux_dataout = sel_wire[0..0] & data_wire[498..498] # !(sel_wire[0..0]) & data_wire[466..466]; - l1_w18_n8_mux_dataout = sel_wire[0..0] & data_wire[562..562] # !(sel_wire[0..0]) & data_wire[530..530]; - l1_w18_n9_mux_dataout = sel_wire[0..0] & data_wire[626..626] # !(sel_wire[0..0]) & data_wire[594..594]; - l1_w19_n0_mux_dataout = sel_wire[0..0] & data_wire[51..51] # !(sel_wire[0..0]) & data_wire[19..19]; - l1_w19_n10_mux_dataout = sel_wire[0..0] & data_wire[691..691] # !(sel_wire[0..0]) & data_wire[659..659]; - l1_w19_n11_mux_dataout = sel_wire[0..0] & data_wire[755..755] # !(sel_wire[0..0]) & data_wire[723..723]; - l1_w19_n12_mux_dataout = sel_wire[0..0] & data_wire[819..819] # !(sel_wire[0..0]) & data_wire[787..787]; - l1_w19_n13_mux_dataout = sel_wire[0..0] & data_wire[883..883] # !(sel_wire[0..0]) & data_wire[851..851]; - l1_w19_n14_mux_dataout = sel_wire[0..0] & data_wire[947..947] # !(sel_wire[0..0]) & data_wire[915..915]; - l1_w19_n15_mux_dataout = sel_wire[0..0] & data_wire[1011..1011] # !(sel_wire[0..0]) & data_wire[979..979]; - l1_w19_n1_mux_dataout = sel_wire[0..0] & data_wire[115..115] # !(sel_wire[0..0]) & data_wire[83..83]; - l1_w19_n2_mux_dataout = sel_wire[0..0] & data_wire[179..179] # !(sel_wire[0..0]) & data_wire[147..147]; - l1_w19_n3_mux_dataout = sel_wire[0..0] & data_wire[243..243] # !(sel_wire[0..0]) & data_wire[211..211]; - l1_w19_n4_mux_dataout = sel_wire[0..0] & data_wire[307..307] # !(sel_wire[0..0]) & data_wire[275..275]; - l1_w19_n5_mux_dataout = sel_wire[0..0] & data_wire[371..371] # !(sel_wire[0..0]) & data_wire[339..339]; - l1_w19_n6_mux_dataout = sel_wire[0..0] & data_wire[435..435] # !(sel_wire[0..0]) & data_wire[403..403]; - l1_w19_n7_mux_dataout = sel_wire[0..0] & data_wire[499..499] # !(sel_wire[0..0]) & data_wire[467..467]; - l1_w19_n8_mux_dataout = sel_wire[0..0] & data_wire[563..563] # !(sel_wire[0..0]) & data_wire[531..531]; - l1_w19_n9_mux_dataout = sel_wire[0..0] & data_wire[627..627] # !(sel_wire[0..0]) & data_wire[595..595]; - l1_w1_n0_mux_dataout = sel_wire[0..0] & data_wire[33..33] # !(sel_wire[0..0]) & data_wire[1..1]; - l1_w1_n10_mux_dataout = sel_wire[0..0] & data_wire[673..673] # !(sel_wire[0..0]) & data_wire[641..641]; - l1_w1_n11_mux_dataout = sel_wire[0..0] & data_wire[737..737] # !(sel_wire[0..0]) & data_wire[705..705]; - l1_w1_n12_mux_dataout = sel_wire[0..0] & data_wire[801..801] # !(sel_wire[0..0]) & data_wire[769..769]; - l1_w1_n13_mux_dataout = sel_wire[0..0] & data_wire[865..865] # !(sel_wire[0..0]) & data_wire[833..833]; - l1_w1_n14_mux_dataout = sel_wire[0..0] & data_wire[929..929] # !(sel_wire[0..0]) & data_wire[897..897]; - l1_w1_n15_mux_dataout = sel_wire[0..0] & data_wire[993..993] # !(sel_wire[0..0]) & data_wire[961..961]; - l1_w1_n1_mux_dataout = sel_wire[0..0] & data_wire[97..97] # !(sel_wire[0..0]) & data_wire[65..65]; - l1_w1_n2_mux_dataout = sel_wire[0..0] & data_wire[161..161] # !(sel_wire[0..0]) & data_wire[129..129]; - l1_w1_n3_mux_dataout = sel_wire[0..0] & data_wire[225..225] # !(sel_wire[0..0]) & data_wire[193..193]; - l1_w1_n4_mux_dataout = sel_wire[0..0] & data_wire[289..289] # !(sel_wire[0..0]) & data_wire[257..257]; - l1_w1_n5_mux_dataout = sel_wire[0..0] & data_wire[353..353] # !(sel_wire[0..0]) & data_wire[321..321]; - l1_w1_n6_mux_dataout = sel_wire[0..0] & data_wire[417..417] # !(sel_wire[0..0]) & data_wire[385..385]; - l1_w1_n7_mux_dataout = sel_wire[0..0] & data_wire[481..481] # !(sel_wire[0..0]) & data_wire[449..449]; - l1_w1_n8_mux_dataout = sel_wire[0..0] & data_wire[545..545] # !(sel_wire[0..0]) & data_wire[513..513]; - l1_w1_n9_mux_dataout = sel_wire[0..0] & data_wire[609..609] # !(sel_wire[0..0]) & data_wire[577..577]; - l1_w20_n0_mux_dataout = sel_wire[0..0] & data_wire[52..52] # !(sel_wire[0..0]) & data_wire[20..20]; - l1_w20_n10_mux_dataout = sel_wire[0..0] & data_wire[692..692] # !(sel_wire[0..0]) & data_wire[660..660]; - l1_w20_n11_mux_dataout = sel_wire[0..0] & data_wire[756..756] # !(sel_wire[0..0]) & data_wire[724..724]; - l1_w20_n12_mux_dataout = sel_wire[0..0] & data_wire[820..820] # !(sel_wire[0..0]) & data_wire[788..788]; - l1_w20_n13_mux_dataout = sel_wire[0..0] & data_wire[884..884] # !(sel_wire[0..0]) & data_wire[852..852]; - l1_w20_n14_mux_dataout = sel_wire[0..0] & data_wire[948..948] # !(sel_wire[0..0]) & data_wire[916..916]; - l1_w20_n15_mux_dataout = sel_wire[0..0] & data_wire[1012..1012] # !(sel_wire[0..0]) & data_wire[980..980]; - l1_w20_n1_mux_dataout = sel_wire[0..0] & data_wire[116..116] # !(sel_wire[0..0]) & data_wire[84..84]; - l1_w20_n2_mux_dataout = sel_wire[0..0] & data_wire[180..180] # !(sel_wire[0..0]) & data_wire[148..148]; - l1_w20_n3_mux_dataout = sel_wire[0..0] & data_wire[244..244] # !(sel_wire[0..0]) & data_wire[212..212]; - l1_w20_n4_mux_dataout = sel_wire[0..0] & data_wire[308..308] # !(sel_wire[0..0]) & data_wire[276..276]; - l1_w20_n5_mux_dataout = sel_wire[0..0] & data_wire[372..372] # !(sel_wire[0..0]) & data_wire[340..340]; - l1_w20_n6_mux_dataout = sel_wire[0..0] & data_wire[436..436] # !(sel_wire[0..0]) & data_wire[404..404]; - l1_w20_n7_mux_dataout = sel_wire[0..0] & data_wire[500..500] # !(sel_wire[0..0]) & data_wire[468..468]; - l1_w20_n8_mux_dataout = sel_wire[0..0] & data_wire[564..564] # !(sel_wire[0..0]) & data_wire[532..532]; - l1_w20_n9_mux_dataout = sel_wire[0..0] & data_wire[628..628] # !(sel_wire[0..0]) & data_wire[596..596]; - l1_w21_n0_mux_dataout = sel_wire[0..0] & data_wire[53..53] # !(sel_wire[0..0]) & data_wire[21..21]; - l1_w21_n10_mux_dataout = sel_wire[0..0] & data_wire[693..693] # !(sel_wire[0..0]) & data_wire[661..661]; - l1_w21_n11_mux_dataout = sel_wire[0..0] & data_wire[757..757] # !(sel_wire[0..0]) & data_wire[725..725]; - l1_w21_n12_mux_dataout = sel_wire[0..0] & data_wire[821..821] # !(sel_wire[0..0]) & data_wire[789..789]; - l1_w21_n13_mux_dataout = sel_wire[0..0] & data_wire[885..885] # !(sel_wire[0..0]) & data_wire[853..853]; - l1_w21_n14_mux_dataout = sel_wire[0..0] & data_wire[949..949] # !(sel_wire[0..0]) & data_wire[917..917]; - l1_w21_n15_mux_dataout = sel_wire[0..0] & data_wire[1013..1013] # !(sel_wire[0..0]) & data_wire[981..981]; - l1_w21_n1_mux_dataout = sel_wire[0..0] & data_wire[117..117] # !(sel_wire[0..0]) & data_wire[85..85]; - l1_w21_n2_mux_dataout = sel_wire[0..0] & data_wire[181..181] # !(sel_wire[0..0]) & data_wire[149..149]; - l1_w21_n3_mux_dataout = sel_wire[0..0] & data_wire[245..245] # !(sel_wire[0..0]) & data_wire[213..213]; - l1_w21_n4_mux_dataout = sel_wire[0..0] & data_wire[309..309] # !(sel_wire[0..0]) & data_wire[277..277]; - l1_w21_n5_mux_dataout = sel_wire[0..0] & data_wire[373..373] # !(sel_wire[0..0]) & data_wire[341..341]; - l1_w21_n6_mux_dataout = sel_wire[0..0] & data_wire[437..437] # !(sel_wire[0..0]) & data_wire[405..405]; - l1_w21_n7_mux_dataout = sel_wire[0..0] & data_wire[501..501] # !(sel_wire[0..0]) & data_wire[469..469]; - l1_w21_n8_mux_dataout = sel_wire[0..0] & data_wire[565..565] # !(sel_wire[0..0]) & data_wire[533..533]; - l1_w21_n9_mux_dataout = sel_wire[0..0] & data_wire[629..629] # !(sel_wire[0..0]) & data_wire[597..597]; - l1_w22_n0_mux_dataout = sel_wire[0..0] & data_wire[54..54] # !(sel_wire[0..0]) & data_wire[22..22]; - l1_w22_n10_mux_dataout = sel_wire[0..0] & data_wire[694..694] # !(sel_wire[0..0]) & data_wire[662..662]; - l1_w22_n11_mux_dataout = sel_wire[0..0] & data_wire[758..758] # !(sel_wire[0..0]) & data_wire[726..726]; - l1_w22_n12_mux_dataout = sel_wire[0..0] & data_wire[822..822] # !(sel_wire[0..0]) & data_wire[790..790]; - l1_w22_n13_mux_dataout = sel_wire[0..0] & data_wire[886..886] # !(sel_wire[0..0]) & data_wire[854..854]; - l1_w22_n14_mux_dataout = sel_wire[0..0] & data_wire[950..950] # !(sel_wire[0..0]) & data_wire[918..918]; - l1_w22_n15_mux_dataout = sel_wire[0..0] & data_wire[1014..1014] # !(sel_wire[0..0]) & data_wire[982..982]; - l1_w22_n1_mux_dataout = sel_wire[0..0] & data_wire[118..118] # !(sel_wire[0..0]) & data_wire[86..86]; - l1_w22_n2_mux_dataout = sel_wire[0..0] & data_wire[182..182] # !(sel_wire[0..0]) & data_wire[150..150]; - l1_w22_n3_mux_dataout = sel_wire[0..0] & data_wire[246..246] # !(sel_wire[0..0]) & data_wire[214..214]; - l1_w22_n4_mux_dataout = sel_wire[0..0] & data_wire[310..310] # !(sel_wire[0..0]) & data_wire[278..278]; - l1_w22_n5_mux_dataout = sel_wire[0..0] & data_wire[374..374] # !(sel_wire[0..0]) & data_wire[342..342]; - l1_w22_n6_mux_dataout = sel_wire[0..0] & data_wire[438..438] # !(sel_wire[0..0]) & data_wire[406..406]; - l1_w22_n7_mux_dataout = sel_wire[0..0] & data_wire[502..502] # !(sel_wire[0..0]) & data_wire[470..470]; - l1_w22_n8_mux_dataout = sel_wire[0..0] & data_wire[566..566] # !(sel_wire[0..0]) & data_wire[534..534]; - l1_w22_n9_mux_dataout = sel_wire[0..0] & data_wire[630..630] # !(sel_wire[0..0]) & data_wire[598..598]; - l1_w23_n0_mux_dataout = sel_wire[0..0] & data_wire[55..55] # !(sel_wire[0..0]) & data_wire[23..23]; - l1_w23_n10_mux_dataout = sel_wire[0..0] & data_wire[695..695] # !(sel_wire[0..0]) & data_wire[663..663]; - l1_w23_n11_mux_dataout = sel_wire[0..0] & data_wire[759..759] # !(sel_wire[0..0]) & data_wire[727..727]; - l1_w23_n12_mux_dataout = sel_wire[0..0] & data_wire[823..823] # !(sel_wire[0..0]) & data_wire[791..791]; - l1_w23_n13_mux_dataout = sel_wire[0..0] & data_wire[887..887] # !(sel_wire[0..0]) & data_wire[855..855]; - l1_w23_n14_mux_dataout = sel_wire[0..0] & data_wire[951..951] # !(sel_wire[0..0]) & data_wire[919..919]; - l1_w23_n15_mux_dataout = sel_wire[0..0] & data_wire[1015..1015] # !(sel_wire[0..0]) & data_wire[983..983]; - l1_w23_n1_mux_dataout = sel_wire[0..0] & data_wire[119..119] # !(sel_wire[0..0]) & data_wire[87..87]; - l1_w23_n2_mux_dataout = sel_wire[0..0] & data_wire[183..183] # !(sel_wire[0..0]) & data_wire[151..151]; - l1_w23_n3_mux_dataout = sel_wire[0..0] & data_wire[247..247] # !(sel_wire[0..0]) & data_wire[215..215]; - l1_w23_n4_mux_dataout = sel_wire[0..0] & data_wire[311..311] # !(sel_wire[0..0]) & data_wire[279..279]; - l1_w23_n5_mux_dataout = sel_wire[0..0] & data_wire[375..375] # !(sel_wire[0..0]) & data_wire[343..343]; - l1_w23_n6_mux_dataout = sel_wire[0..0] & data_wire[439..439] # !(sel_wire[0..0]) & data_wire[407..407]; - l1_w23_n7_mux_dataout = sel_wire[0..0] & data_wire[503..503] # !(sel_wire[0..0]) & data_wire[471..471]; - l1_w23_n8_mux_dataout = sel_wire[0..0] & data_wire[567..567] # !(sel_wire[0..0]) & data_wire[535..535]; - l1_w23_n9_mux_dataout = sel_wire[0..0] & data_wire[631..631] # !(sel_wire[0..0]) & data_wire[599..599]; - l1_w24_n0_mux_dataout = sel_wire[0..0] & data_wire[56..56] # !(sel_wire[0..0]) & data_wire[24..24]; - l1_w24_n10_mux_dataout = sel_wire[0..0] & data_wire[696..696] # !(sel_wire[0..0]) & data_wire[664..664]; - l1_w24_n11_mux_dataout = sel_wire[0..0] & data_wire[760..760] # !(sel_wire[0..0]) & data_wire[728..728]; - l1_w24_n12_mux_dataout = sel_wire[0..0] & data_wire[824..824] # !(sel_wire[0..0]) & data_wire[792..792]; - l1_w24_n13_mux_dataout = sel_wire[0..0] & data_wire[888..888] # !(sel_wire[0..0]) & data_wire[856..856]; - l1_w24_n14_mux_dataout = sel_wire[0..0] & data_wire[952..952] # !(sel_wire[0..0]) & data_wire[920..920]; - l1_w24_n15_mux_dataout = sel_wire[0..0] & data_wire[1016..1016] # !(sel_wire[0..0]) & data_wire[984..984]; - l1_w24_n1_mux_dataout = sel_wire[0..0] & data_wire[120..120] # !(sel_wire[0..0]) & data_wire[88..88]; - l1_w24_n2_mux_dataout = sel_wire[0..0] & data_wire[184..184] # !(sel_wire[0..0]) & data_wire[152..152]; - l1_w24_n3_mux_dataout = sel_wire[0..0] & data_wire[248..248] # !(sel_wire[0..0]) & data_wire[216..216]; - l1_w24_n4_mux_dataout = sel_wire[0..0] & data_wire[312..312] # !(sel_wire[0..0]) & data_wire[280..280]; - l1_w24_n5_mux_dataout = sel_wire[0..0] & data_wire[376..376] # !(sel_wire[0..0]) & data_wire[344..344]; - l1_w24_n6_mux_dataout = sel_wire[0..0] & data_wire[440..440] # !(sel_wire[0..0]) & data_wire[408..408]; - l1_w24_n7_mux_dataout = sel_wire[0..0] & data_wire[504..504] # !(sel_wire[0..0]) & data_wire[472..472]; - l1_w24_n8_mux_dataout = sel_wire[0..0] & data_wire[568..568] # !(sel_wire[0..0]) & data_wire[536..536]; - l1_w24_n9_mux_dataout = sel_wire[0..0] & data_wire[632..632] # !(sel_wire[0..0]) & data_wire[600..600]; - l1_w25_n0_mux_dataout = sel_wire[0..0] & data_wire[57..57] # !(sel_wire[0..0]) & data_wire[25..25]; - l1_w25_n10_mux_dataout = sel_wire[0..0] & data_wire[697..697] # !(sel_wire[0..0]) & data_wire[665..665]; - l1_w25_n11_mux_dataout = sel_wire[0..0] & data_wire[761..761] # !(sel_wire[0..0]) & data_wire[729..729]; - l1_w25_n12_mux_dataout = sel_wire[0..0] & data_wire[825..825] # !(sel_wire[0..0]) & data_wire[793..793]; - l1_w25_n13_mux_dataout = sel_wire[0..0] & data_wire[889..889] # !(sel_wire[0..0]) & data_wire[857..857]; - l1_w25_n14_mux_dataout = sel_wire[0..0] & data_wire[953..953] # !(sel_wire[0..0]) & data_wire[921..921]; - l1_w25_n15_mux_dataout = sel_wire[0..0] & data_wire[1017..1017] # !(sel_wire[0..0]) & data_wire[985..985]; - l1_w25_n1_mux_dataout = sel_wire[0..0] & data_wire[121..121] # !(sel_wire[0..0]) & data_wire[89..89]; - l1_w25_n2_mux_dataout = sel_wire[0..0] & data_wire[185..185] # !(sel_wire[0..0]) & data_wire[153..153]; - l1_w25_n3_mux_dataout = sel_wire[0..0] & data_wire[249..249] # !(sel_wire[0..0]) & data_wire[217..217]; - l1_w25_n4_mux_dataout = sel_wire[0..0] & data_wire[313..313] # !(sel_wire[0..0]) & data_wire[281..281]; - l1_w25_n5_mux_dataout = sel_wire[0..0] & data_wire[377..377] # !(sel_wire[0..0]) & data_wire[345..345]; - l1_w25_n6_mux_dataout = sel_wire[0..0] & data_wire[441..441] # !(sel_wire[0..0]) & data_wire[409..409]; - l1_w25_n7_mux_dataout = sel_wire[0..0] & data_wire[505..505] # !(sel_wire[0..0]) & data_wire[473..473]; - l1_w25_n8_mux_dataout = sel_wire[0..0] & data_wire[569..569] # !(sel_wire[0..0]) & data_wire[537..537]; - l1_w25_n9_mux_dataout = sel_wire[0..0] & data_wire[633..633] # !(sel_wire[0..0]) & data_wire[601..601]; - l1_w26_n0_mux_dataout = sel_wire[0..0] & data_wire[58..58] # !(sel_wire[0..0]) & data_wire[26..26]; - l1_w26_n10_mux_dataout = sel_wire[0..0] & data_wire[698..698] # !(sel_wire[0..0]) & data_wire[666..666]; - l1_w26_n11_mux_dataout = sel_wire[0..0] & data_wire[762..762] # !(sel_wire[0..0]) & data_wire[730..730]; - l1_w26_n12_mux_dataout = sel_wire[0..0] & data_wire[826..826] # !(sel_wire[0..0]) & data_wire[794..794]; - l1_w26_n13_mux_dataout = sel_wire[0..0] & data_wire[890..890] # !(sel_wire[0..0]) & data_wire[858..858]; - l1_w26_n14_mux_dataout = sel_wire[0..0] & data_wire[954..954] # !(sel_wire[0..0]) & data_wire[922..922]; - l1_w26_n15_mux_dataout = sel_wire[0..0] & data_wire[1018..1018] # !(sel_wire[0..0]) & data_wire[986..986]; - l1_w26_n1_mux_dataout = sel_wire[0..0] & data_wire[122..122] # !(sel_wire[0..0]) & data_wire[90..90]; - l1_w26_n2_mux_dataout = sel_wire[0..0] & data_wire[186..186] # !(sel_wire[0..0]) & data_wire[154..154]; - l1_w26_n3_mux_dataout = sel_wire[0..0] & data_wire[250..250] # !(sel_wire[0..0]) & data_wire[218..218]; - l1_w26_n4_mux_dataout = sel_wire[0..0] & data_wire[314..314] # !(sel_wire[0..0]) & data_wire[282..282]; - l1_w26_n5_mux_dataout = sel_wire[0..0] & data_wire[378..378] # !(sel_wire[0..0]) & data_wire[346..346]; - l1_w26_n6_mux_dataout = sel_wire[0..0] & data_wire[442..442] # !(sel_wire[0..0]) & data_wire[410..410]; - l1_w26_n7_mux_dataout = sel_wire[0..0] & data_wire[506..506] # !(sel_wire[0..0]) & data_wire[474..474]; - l1_w26_n8_mux_dataout = sel_wire[0..0] & data_wire[570..570] # !(sel_wire[0..0]) & data_wire[538..538]; - l1_w26_n9_mux_dataout = sel_wire[0..0] & data_wire[634..634] # !(sel_wire[0..0]) & data_wire[602..602]; - l1_w27_n0_mux_dataout = sel_wire[0..0] & data_wire[59..59] # !(sel_wire[0..0]) & data_wire[27..27]; - l1_w27_n10_mux_dataout = sel_wire[0..0] & data_wire[699..699] # !(sel_wire[0..0]) & data_wire[667..667]; - l1_w27_n11_mux_dataout = sel_wire[0..0] & data_wire[763..763] # !(sel_wire[0..0]) & data_wire[731..731]; - l1_w27_n12_mux_dataout = sel_wire[0..0] & data_wire[827..827] # !(sel_wire[0..0]) & data_wire[795..795]; - l1_w27_n13_mux_dataout = sel_wire[0..0] & data_wire[891..891] # !(sel_wire[0..0]) & data_wire[859..859]; - l1_w27_n14_mux_dataout = sel_wire[0..0] & data_wire[955..955] # !(sel_wire[0..0]) & data_wire[923..923]; - l1_w27_n15_mux_dataout = sel_wire[0..0] & data_wire[1019..1019] # !(sel_wire[0..0]) & data_wire[987..987]; - l1_w27_n1_mux_dataout = sel_wire[0..0] & data_wire[123..123] # !(sel_wire[0..0]) & data_wire[91..91]; - l1_w27_n2_mux_dataout = sel_wire[0..0] & data_wire[187..187] # !(sel_wire[0..0]) & data_wire[155..155]; - l1_w27_n3_mux_dataout = sel_wire[0..0] & data_wire[251..251] # !(sel_wire[0..0]) & data_wire[219..219]; - l1_w27_n4_mux_dataout = sel_wire[0..0] & data_wire[315..315] # !(sel_wire[0..0]) & data_wire[283..283]; - l1_w27_n5_mux_dataout = sel_wire[0..0] & data_wire[379..379] # !(sel_wire[0..0]) & data_wire[347..347]; - l1_w27_n6_mux_dataout = sel_wire[0..0] & data_wire[443..443] # !(sel_wire[0..0]) & data_wire[411..411]; - l1_w27_n7_mux_dataout = sel_wire[0..0] & data_wire[507..507] # !(sel_wire[0..0]) & data_wire[475..475]; - l1_w27_n8_mux_dataout = sel_wire[0..0] & data_wire[571..571] # !(sel_wire[0..0]) & data_wire[539..539]; - l1_w27_n9_mux_dataout = sel_wire[0..0] & data_wire[635..635] # !(sel_wire[0..0]) & data_wire[603..603]; - l1_w28_n0_mux_dataout = sel_wire[0..0] & data_wire[60..60] # !(sel_wire[0..0]) & data_wire[28..28]; - l1_w28_n10_mux_dataout = sel_wire[0..0] & data_wire[700..700] # !(sel_wire[0..0]) & data_wire[668..668]; - l1_w28_n11_mux_dataout = sel_wire[0..0] & data_wire[764..764] # !(sel_wire[0..0]) & data_wire[732..732]; - l1_w28_n12_mux_dataout = sel_wire[0..0] & data_wire[828..828] # !(sel_wire[0..0]) & data_wire[796..796]; - l1_w28_n13_mux_dataout = sel_wire[0..0] & data_wire[892..892] # !(sel_wire[0..0]) & data_wire[860..860]; - l1_w28_n14_mux_dataout = sel_wire[0..0] & data_wire[956..956] # !(sel_wire[0..0]) & data_wire[924..924]; - l1_w28_n15_mux_dataout = sel_wire[0..0] & data_wire[1020..1020] # !(sel_wire[0..0]) & data_wire[988..988]; - l1_w28_n1_mux_dataout = sel_wire[0..0] & data_wire[124..124] # !(sel_wire[0..0]) & data_wire[92..92]; - l1_w28_n2_mux_dataout = sel_wire[0..0] & data_wire[188..188] # !(sel_wire[0..0]) & data_wire[156..156]; - l1_w28_n3_mux_dataout = sel_wire[0..0] & data_wire[252..252] # !(sel_wire[0..0]) & data_wire[220..220]; - l1_w28_n4_mux_dataout = sel_wire[0..0] & data_wire[316..316] # !(sel_wire[0..0]) & data_wire[284..284]; - l1_w28_n5_mux_dataout = sel_wire[0..0] & data_wire[380..380] # !(sel_wire[0..0]) & data_wire[348..348]; - l1_w28_n6_mux_dataout = sel_wire[0..0] & data_wire[444..444] # !(sel_wire[0..0]) & data_wire[412..412]; - l1_w28_n7_mux_dataout = sel_wire[0..0] & data_wire[508..508] # !(sel_wire[0..0]) & data_wire[476..476]; - l1_w28_n8_mux_dataout = sel_wire[0..0] & data_wire[572..572] # !(sel_wire[0..0]) & data_wire[540..540]; - l1_w28_n9_mux_dataout = sel_wire[0..0] & data_wire[636..636] # !(sel_wire[0..0]) & data_wire[604..604]; - l1_w29_n0_mux_dataout = sel_wire[0..0] & data_wire[61..61] # !(sel_wire[0..0]) & data_wire[29..29]; - l1_w29_n10_mux_dataout = sel_wire[0..0] & data_wire[701..701] # !(sel_wire[0..0]) & data_wire[669..669]; - l1_w29_n11_mux_dataout = sel_wire[0..0] & data_wire[765..765] # !(sel_wire[0..0]) & data_wire[733..733]; - l1_w29_n12_mux_dataout = sel_wire[0..0] & data_wire[829..829] # !(sel_wire[0..0]) & data_wire[797..797]; - l1_w29_n13_mux_dataout = sel_wire[0..0] & data_wire[893..893] # !(sel_wire[0..0]) & data_wire[861..861]; - l1_w29_n14_mux_dataout = sel_wire[0..0] & data_wire[957..957] # !(sel_wire[0..0]) & data_wire[925..925]; - l1_w29_n15_mux_dataout = sel_wire[0..0] & data_wire[1021..1021] # !(sel_wire[0..0]) & data_wire[989..989]; - l1_w29_n1_mux_dataout = sel_wire[0..0] & data_wire[125..125] # !(sel_wire[0..0]) & data_wire[93..93]; - l1_w29_n2_mux_dataout = sel_wire[0..0] & data_wire[189..189] # !(sel_wire[0..0]) & data_wire[157..157]; - l1_w29_n3_mux_dataout = sel_wire[0..0] & data_wire[253..253] # !(sel_wire[0..0]) & data_wire[221..221]; - l1_w29_n4_mux_dataout = sel_wire[0..0] & data_wire[317..317] # !(sel_wire[0..0]) & data_wire[285..285]; - l1_w29_n5_mux_dataout = sel_wire[0..0] & data_wire[381..381] # !(sel_wire[0..0]) & data_wire[349..349]; - l1_w29_n6_mux_dataout = sel_wire[0..0] & data_wire[445..445] # !(sel_wire[0..0]) & data_wire[413..413]; - l1_w29_n7_mux_dataout = sel_wire[0..0] & data_wire[509..509] # !(sel_wire[0..0]) & data_wire[477..477]; - l1_w29_n8_mux_dataout = sel_wire[0..0] & data_wire[573..573] # !(sel_wire[0..0]) & data_wire[541..541]; - l1_w29_n9_mux_dataout = sel_wire[0..0] & data_wire[637..637] # !(sel_wire[0..0]) & data_wire[605..605]; - l1_w2_n0_mux_dataout = sel_wire[0..0] & data_wire[34..34] # !(sel_wire[0..0]) & data_wire[2..2]; - l1_w2_n10_mux_dataout = sel_wire[0..0] & data_wire[674..674] # !(sel_wire[0..0]) & data_wire[642..642]; - l1_w2_n11_mux_dataout = sel_wire[0..0] & data_wire[738..738] # !(sel_wire[0..0]) & data_wire[706..706]; - l1_w2_n12_mux_dataout = sel_wire[0..0] & data_wire[802..802] # !(sel_wire[0..0]) & data_wire[770..770]; - l1_w2_n13_mux_dataout = sel_wire[0..0] & data_wire[866..866] # !(sel_wire[0..0]) & data_wire[834..834]; - l1_w2_n14_mux_dataout = sel_wire[0..0] & data_wire[930..930] # !(sel_wire[0..0]) & data_wire[898..898]; - l1_w2_n15_mux_dataout = sel_wire[0..0] & data_wire[994..994] # !(sel_wire[0..0]) & data_wire[962..962]; - l1_w2_n1_mux_dataout = sel_wire[0..0] & data_wire[98..98] # !(sel_wire[0..0]) & data_wire[66..66]; - l1_w2_n2_mux_dataout = sel_wire[0..0] & data_wire[162..162] # !(sel_wire[0..0]) & data_wire[130..130]; - l1_w2_n3_mux_dataout = sel_wire[0..0] & data_wire[226..226] # !(sel_wire[0..0]) & data_wire[194..194]; - l1_w2_n4_mux_dataout = sel_wire[0..0] & data_wire[290..290] # !(sel_wire[0..0]) & data_wire[258..258]; - l1_w2_n5_mux_dataout = sel_wire[0..0] & data_wire[354..354] # !(sel_wire[0..0]) & data_wire[322..322]; - l1_w2_n6_mux_dataout = sel_wire[0..0] & data_wire[418..418] # !(sel_wire[0..0]) & data_wire[386..386]; - l1_w2_n7_mux_dataout = sel_wire[0..0] & data_wire[482..482] # !(sel_wire[0..0]) & data_wire[450..450]; - l1_w2_n8_mux_dataout = sel_wire[0..0] & data_wire[546..546] # !(sel_wire[0..0]) & data_wire[514..514]; - l1_w2_n9_mux_dataout = sel_wire[0..0] & data_wire[610..610] # !(sel_wire[0..0]) & data_wire[578..578]; - l1_w30_n0_mux_dataout = sel_wire[0..0] & data_wire[62..62] # !(sel_wire[0..0]) & data_wire[30..30]; - l1_w30_n10_mux_dataout = sel_wire[0..0] & data_wire[702..702] # !(sel_wire[0..0]) & data_wire[670..670]; - l1_w30_n11_mux_dataout = sel_wire[0..0] & data_wire[766..766] # !(sel_wire[0..0]) & data_wire[734..734]; - l1_w30_n12_mux_dataout = sel_wire[0..0] & data_wire[830..830] # !(sel_wire[0..0]) & data_wire[798..798]; - l1_w30_n13_mux_dataout = sel_wire[0..0] & data_wire[894..894] # !(sel_wire[0..0]) & data_wire[862..862]; - l1_w30_n14_mux_dataout = sel_wire[0..0] & data_wire[958..958] # !(sel_wire[0..0]) & data_wire[926..926]; - l1_w30_n15_mux_dataout = sel_wire[0..0] & data_wire[1022..1022] # !(sel_wire[0..0]) & data_wire[990..990]; - l1_w30_n1_mux_dataout = sel_wire[0..0] & data_wire[126..126] # !(sel_wire[0..0]) & data_wire[94..94]; - l1_w30_n2_mux_dataout = sel_wire[0..0] & data_wire[190..190] # !(sel_wire[0..0]) & data_wire[158..158]; - l1_w30_n3_mux_dataout = sel_wire[0..0] & data_wire[254..254] # !(sel_wire[0..0]) & data_wire[222..222]; - l1_w30_n4_mux_dataout = sel_wire[0..0] & data_wire[318..318] # !(sel_wire[0..0]) & data_wire[286..286]; - l1_w30_n5_mux_dataout = sel_wire[0..0] & data_wire[382..382] # !(sel_wire[0..0]) & data_wire[350..350]; - l1_w30_n6_mux_dataout = sel_wire[0..0] & data_wire[446..446] # !(sel_wire[0..0]) & data_wire[414..414]; - l1_w30_n7_mux_dataout = sel_wire[0..0] & data_wire[510..510] # !(sel_wire[0..0]) & data_wire[478..478]; - l1_w30_n8_mux_dataout = sel_wire[0..0] & data_wire[574..574] # !(sel_wire[0..0]) & data_wire[542..542]; - l1_w30_n9_mux_dataout = sel_wire[0..0] & data_wire[638..638] # !(sel_wire[0..0]) & data_wire[606..606]; - l1_w31_n0_mux_dataout = sel_wire[0..0] & data_wire[63..63] # !(sel_wire[0..0]) & data_wire[31..31]; - l1_w31_n10_mux_dataout = sel_wire[0..0] & data_wire[703..703] # !(sel_wire[0..0]) & data_wire[671..671]; - l1_w31_n11_mux_dataout = sel_wire[0..0] & data_wire[767..767] # !(sel_wire[0..0]) & data_wire[735..735]; - l1_w31_n12_mux_dataout = sel_wire[0..0] & data_wire[831..831] # !(sel_wire[0..0]) & data_wire[799..799]; - l1_w31_n13_mux_dataout = sel_wire[0..0] & data_wire[895..895] # !(sel_wire[0..0]) & data_wire[863..863]; - l1_w31_n14_mux_dataout = sel_wire[0..0] & data_wire[959..959] # !(sel_wire[0..0]) & data_wire[927..927]; - l1_w31_n15_mux_dataout = sel_wire[0..0] & data_wire[1023..1023] # !(sel_wire[0..0]) & data_wire[991..991]; - l1_w31_n1_mux_dataout = sel_wire[0..0] & data_wire[127..127] # !(sel_wire[0..0]) & data_wire[95..95]; - l1_w31_n2_mux_dataout = sel_wire[0..0] & data_wire[191..191] # !(sel_wire[0..0]) & data_wire[159..159]; - l1_w31_n3_mux_dataout = sel_wire[0..0] & data_wire[255..255] # !(sel_wire[0..0]) & data_wire[223..223]; - l1_w31_n4_mux_dataout = sel_wire[0..0] & data_wire[319..319] # !(sel_wire[0..0]) & data_wire[287..287]; - l1_w31_n5_mux_dataout = sel_wire[0..0] & data_wire[383..383] # !(sel_wire[0..0]) & data_wire[351..351]; - l1_w31_n6_mux_dataout = sel_wire[0..0] & data_wire[447..447] # !(sel_wire[0..0]) & data_wire[415..415]; - l1_w31_n7_mux_dataout = sel_wire[0..0] & data_wire[511..511] # !(sel_wire[0..0]) & data_wire[479..479]; - l1_w31_n8_mux_dataout = sel_wire[0..0] & data_wire[575..575] # !(sel_wire[0..0]) & data_wire[543..543]; - l1_w31_n9_mux_dataout = sel_wire[0..0] & data_wire[639..639] # !(sel_wire[0..0]) & data_wire[607..607]; - l1_w3_n0_mux_dataout = sel_wire[0..0] & data_wire[35..35] # !(sel_wire[0..0]) & data_wire[3..3]; - l1_w3_n10_mux_dataout = sel_wire[0..0] & data_wire[675..675] # !(sel_wire[0..0]) & data_wire[643..643]; - l1_w3_n11_mux_dataout = sel_wire[0..0] & data_wire[739..739] # !(sel_wire[0..0]) & data_wire[707..707]; - l1_w3_n12_mux_dataout = sel_wire[0..0] & data_wire[803..803] # !(sel_wire[0..0]) & data_wire[771..771]; - l1_w3_n13_mux_dataout = sel_wire[0..0] & data_wire[867..867] # !(sel_wire[0..0]) & data_wire[835..835]; - l1_w3_n14_mux_dataout = sel_wire[0..0] & data_wire[931..931] # !(sel_wire[0..0]) & data_wire[899..899]; - l1_w3_n15_mux_dataout = sel_wire[0..0] & data_wire[995..995] # !(sel_wire[0..0]) & data_wire[963..963]; - l1_w3_n1_mux_dataout = sel_wire[0..0] & data_wire[99..99] # !(sel_wire[0..0]) & data_wire[67..67]; - l1_w3_n2_mux_dataout = sel_wire[0..0] & data_wire[163..163] # !(sel_wire[0..0]) & data_wire[131..131]; - l1_w3_n3_mux_dataout = sel_wire[0..0] & data_wire[227..227] # !(sel_wire[0..0]) & data_wire[195..195]; - l1_w3_n4_mux_dataout = sel_wire[0..0] & data_wire[291..291] # !(sel_wire[0..0]) & data_wire[259..259]; - l1_w3_n5_mux_dataout = sel_wire[0..0] & data_wire[355..355] # !(sel_wire[0..0]) & data_wire[323..323]; - l1_w3_n6_mux_dataout = sel_wire[0..0] & data_wire[419..419] # !(sel_wire[0..0]) & data_wire[387..387]; - l1_w3_n7_mux_dataout = sel_wire[0..0] & data_wire[483..483] # !(sel_wire[0..0]) & data_wire[451..451]; - l1_w3_n8_mux_dataout = sel_wire[0..0] & data_wire[547..547] # !(sel_wire[0..0]) & data_wire[515..515]; - l1_w3_n9_mux_dataout = sel_wire[0..0] & data_wire[611..611] # !(sel_wire[0..0]) & data_wire[579..579]; - l1_w4_n0_mux_dataout = sel_wire[0..0] & data_wire[36..36] # !(sel_wire[0..0]) & data_wire[4..4]; - l1_w4_n10_mux_dataout = sel_wire[0..0] & data_wire[676..676] # !(sel_wire[0..0]) & data_wire[644..644]; - l1_w4_n11_mux_dataout = sel_wire[0..0] & data_wire[740..740] # !(sel_wire[0..0]) & data_wire[708..708]; - l1_w4_n12_mux_dataout = sel_wire[0..0] & data_wire[804..804] # !(sel_wire[0..0]) & data_wire[772..772]; - l1_w4_n13_mux_dataout = sel_wire[0..0] & data_wire[868..868] # !(sel_wire[0..0]) & data_wire[836..836]; - l1_w4_n14_mux_dataout = sel_wire[0..0] & data_wire[932..932] # !(sel_wire[0..0]) & data_wire[900..900]; - l1_w4_n15_mux_dataout = sel_wire[0..0] & data_wire[996..996] # !(sel_wire[0..0]) & data_wire[964..964]; - l1_w4_n1_mux_dataout = sel_wire[0..0] & data_wire[100..100] # !(sel_wire[0..0]) & data_wire[68..68]; - l1_w4_n2_mux_dataout = sel_wire[0..0] & data_wire[164..164] # !(sel_wire[0..0]) & data_wire[132..132]; - l1_w4_n3_mux_dataout = sel_wire[0..0] & data_wire[228..228] # !(sel_wire[0..0]) & data_wire[196..196]; - l1_w4_n4_mux_dataout = sel_wire[0..0] & data_wire[292..292] # !(sel_wire[0..0]) & data_wire[260..260]; - l1_w4_n5_mux_dataout = sel_wire[0..0] & data_wire[356..356] # !(sel_wire[0..0]) & data_wire[324..324]; - l1_w4_n6_mux_dataout = sel_wire[0..0] & data_wire[420..420] # !(sel_wire[0..0]) & data_wire[388..388]; - l1_w4_n7_mux_dataout = sel_wire[0..0] & data_wire[484..484] # !(sel_wire[0..0]) & data_wire[452..452]; - l1_w4_n8_mux_dataout = sel_wire[0..0] & data_wire[548..548] # !(sel_wire[0..0]) & data_wire[516..516]; - l1_w4_n9_mux_dataout = sel_wire[0..0] & data_wire[612..612] # !(sel_wire[0..0]) & data_wire[580..580]; - l1_w5_n0_mux_dataout = sel_wire[0..0] & data_wire[37..37] # !(sel_wire[0..0]) & data_wire[5..5]; - l1_w5_n10_mux_dataout = sel_wire[0..0] & data_wire[677..677] # !(sel_wire[0..0]) & data_wire[645..645]; - l1_w5_n11_mux_dataout = sel_wire[0..0] & data_wire[741..741] # !(sel_wire[0..0]) & data_wire[709..709]; - l1_w5_n12_mux_dataout = sel_wire[0..0] & data_wire[805..805] # !(sel_wire[0..0]) & data_wire[773..773]; - l1_w5_n13_mux_dataout = sel_wire[0..0] & data_wire[869..869] # !(sel_wire[0..0]) & data_wire[837..837]; - l1_w5_n14_mux_dataout = sel_wire[0..0] & data_wire[933..933] # !(sel_wire[0..0]) & data_wire[901..901]; - l1_w5_n15_mux_dataout = sel_wire[0..0] & data_wire[997..997] # !(sel_wire[0..0]) & data_wire[965..965]; - l1_w5_n1_mux_dataout = sel_wire[0..0] & data_wire[101..101] # !(sel_wire[0..0]) & data_wire[69..69]; - l1_w5_n2_mux_dataout = sel_wire[0..0] & data_wire[165..165] # !(sel_wire[0..0]) & data_wire[133..133]; - l1_w5_n3_mux_dataout = sel_wire[0..0] & data_wire[229..229] # !(sel_wire[0..0]) & data_wire[197..197]; - l1_w5_n4_mux_dataout = sel_wire[0..0] & data_wire[293..293] # !(sel_wire[0..0]) & data_wire[261..261]; - l1_w5_n5_mux_dataout = sel_wire[0..0] & data_wire[357..357] # !(sel_wire[0..0]) & data_wire[325..325]; - l1_w5_n6_mux_dataout = sel_wire[0..0] & data_wire[421..421] # !(sel_wire[0..0]) & data_wire[389..389]; - l1_w5_n7_mux_dataout = sel_wire[0..0] & data_wire[485..485] # !(sel_wire[0..0]) & data_wire[453..453]; - l1_w5_n8_mux_dataout = sel_wire[0..0] & data_wire[549..549] # !(sel_wire[0..0]) & data_wire[517..517]; - l1_w5_n9_mux_dataout = sel_wire[0..0] & data_wire[613..613] # !(sel_wire[0..0]) & data_wire[581..581]; - l1_w6_n0_mux_dataout = sel_wire[0..0] & data_wire[38..38] # !(sel_wire[0..0]) & data_wire[6..6]; - l1_w6_n10_mux_dataout = sel_wire[0..0] & data_wire[678..678] # !(sel_wire[0..0]) & data_wire[646..646]; - l1_w6_n11_mux_dataout = sel_wire[0..0] & data_wire[742..742] # !(sel_wire[0..0]) & data_wire[710..710]; - l1_w6_n12_mux_dataout = sel_wire[0..0] & data_wire[806..806] # !(sel_wire[0..0]) & data_wire[774..774]; - l1_w6_n13_mux_dataout = sel_wire[0..0] & data_wire[870..870] # !(sel_wire[0..0]) & data_wire[838..838]; - l1_w6_n14_mux_dataout = sel_wire[0..0] & data_wire[934..934] # !(sel_wire[0..0]) & data_wire[902..902]; - l1_w6_n15_mux_dataout = sel_wire[0..0] & data_wire[998..998] # !(sel_wire[0..0]) & data_wire[966..966]; - l1_w6_n1_mux_dataout = sel_wire[0..0] & data_wire[102..102] # !(sel_wire[0..0]) & data_wire[70..70]; - l1_w6_n2_mux_dataout = sel_wire[0..0] & data_wire[166..166] # !(sel_wire[0..0]) & data_wire[134..134]; - l1_w6_n3_mux_dataout = sel_wire[0..0] & data_wire[230..230] # !(sel_wire[0..0]) & data_wire[198..198]; - l1_w6_n4_mux_dataout = sel_wire[0..0] & data_wire[294..294] # !(sel_wire[0..0]) & data_wire[262..262]; - l1_w6_n5_mux_dataout = sel_wire[0..0] & data_wire[358..358] # !(sel_wire[0..0]) & data_wire[326..326]; - l1_w6_n6_mux_dataout = sel_wire[0..0] & data_wire[422..422] # !(sel_wire[0..0]) & data_wire[390..390]; - l1_w6_n7_mux_dataout = sel_wire[0..0] & data_wire[486..486] # !(sel_wire[0..0]) & data_wire[454..454]; - l1_w6_n8_mux_dataout = sel_wire[0..0] & data_wire[550..550] # !(sel_wire[0..0]) & data_wire[518..518]; - l1_w6_n9_mux_dataout = sel_wire[0..0] & data_wire[614..614] # !(sel_wire[0..0]) & data_wire[582..582]; - l1_w7_n0_mux_dataout = sel_wire[0..0] & data_wire[39..39] # !(sel_wire[0..0]) & data_wire[7..7]; - l1_w7_n10_mux_dataout = sel_wire[0..0] & data_wire[679..679] # !(sel_wire[0..0]) & data_wire[647..647]; - l1_w7_n11_mux_dataout = sel_wire[0..0] & data_wire[743..743] # !(sel_wire[0..0]) & data_wire[711..711]; - l1_w7_n12_mux_dataout = sel_wire[0..0] & data_wire[807..807] # !(sel_wire[0..0]) & data_wire[775..775]; - l1_w7_n13_mux_dataout = sel_wire[0..0] & data_wire[871..871] # !(sel_wire[0..0]) & data_wire[839..839]; - l1_w7_n14_mux_dataout = sel_wire[0..0] & data_wire[935..935] # !(sel_wire[0..0]) & data_wire[903..903]; - l1_w7_n15_mux_dataout = sel_wire[0..0] & data_wire[999..999] # !(sel_wire[0..0]) & data_wire[967..967]; - l1_w7_n1_mux_dataout = sel_wire[0..0] & data_wire[103..103] # !(sel_wire[0..0]) & data_wire[71..71]; - l1_w7_n2_mux_dataout = sel_wire[0..0] & data_wire[167..167] # !(sel_wire[0..0]) & data_wire[135..135]; - l1_w7_n3_mux_dataout = sel_wire[0..0] & data_wire[231..231] # !(sel_wire[0..0]) & data_wire[199..199]; - l1_w7_n4_mux_dataout = sel_wire[0..0] & data_wire[295..295] # !(sel_wire[0..0]) & data_wire[263..263]; - l1_w7_n5_mux_dataout = sel_wire[0..0] & data_wire[359..359] # !(sel_wire[0..0]) & data_wire[327..327]; - l1_w7_n6_mux_dataout = sel_wire[0..0] & data_wire[423..423] # !(sel_wire[0..0]) & data_wire[391..391]; - l1_w7_n7_mux_dataout = sel_wire[0..0] & data_wire[487..487] # !(sel_wire[0..0]) & data_wire[455..455]; - l1_w7_n8_mux_dataout = sel_wire[0..0] & data_wire[551..551] # !(sel_wire[0..0]) & data_wire[519..519]; - l1_w7_n9_mux_dataout = sel_wire[0..0] & data_wire[615..615] # !(sel_wire[0..0]) & data_wire[583..583]; - l1_w8_n0_mux_dataout = sel_wire[0..0] & data_wire[40..40] # !(sel_wire[0..0]) & data_wire[8..8]; - l1_w8_n10_mux_dataout = sel_wire[0..0] & data_wire[680..680] # !(sel_wire[0..0]) & data_wire[648..648]; - l1_w8_n11_mux_dataout = sel_wire[0..0] & data_wire[744..744] # !(sel_wire[0..0]) & data_wire[712..712]; - l1_w8_n12_mux_dataout = sel_wire[0..0] & data_wire[808..808] # !(sel_wire[0..0]) & data_wire[776..776]; - l1_w8_n13_mux_dataout = sel_wire[0..0] & data_wire[872..872] # !(sel_wire[0..0]) & data_wire[840..840]; - l1_w8_n14_mux_dataout = sel_wire[0..0] & data_wire[936..936] # !(sel_wire[0..0]) & data_wire[904..904]; - l1_w8_n15_mux_dataout = sel_wire[0..0] & data_wire[1000..1000] # !(sel_wire[0..0]) & data_wire[968..968]; - l1_w8_n1_mux_dataout = sel_wire[0..0] & data_wire[104..104] # !(sel_wire[0..0]) & data_wire[72..72]; - l1_w8_n2_mux_dataout = sel_wire[0..0] & data_wire[168..168] # !(sel_wire[0..0]) & data_wire[136..136]; - l1_w8_n3_mux_dataout = sel_wire[0..0] & data_wire[232..232] # !(sel_wire[0..0]) & data_wire[200..200]; - l1_w8_n4_mux_dataout = sel_wire[0..0] & data_wire[296..296] # !(sel_wire[0..0]) & data_wire[264..264]; - l1_w8_n5_mux_dataout = sel_wire[0..0] & data_wire[360..360] # !(sel_wire[0..0]) & data_wire[328..328]; - l1_w8_n6_mux_dataout = sel_wire[0..0] & data_wire[424..424] # !(sel_wire[0..0]) & data_wire[392..392]; - l1_w8_n7_mux_dataout = sel_wire[0..0] & data_wire[488..488] # !(sel_wire[0..0]) & data_wire[456..456]; - l1_w8_n8_mux_dataout = sel_wire[0..0] & data_wire[552..552] # !(sel_wire[0..0]) & data_wire[520..520]; - l1_w8_n9_mux_dataout = sel_wire[0..0] & data_wire[616..616] # !(sel_wire[0..0]) & data_wire[584..584]; - l1_w9_n0_mux_dataout = sel_wire[0..0] & data_wire[41..41] # !(sel_wire[0..0]) & data_wire[9..9]; - l1_w9_n10_mux_dataout = sel_wire[0..0] & data_wire[681..681] # !(sel_wire[0..0]) & data_wire[649..649]; - l1_w9_n11_mux_dataout = sel_wire[0..0] & data_wire[745..745] # !(sel_wire[0..0]) & data_wire[713..713]; - l1_w9_n12_mux_dataout = sel_wire[0..0] & data_wire[809..809] # !(sel_wire[0..0]) & data_wire[777..777]; - l1_w9_n13_mux_dataout = sel_wire[0..0] & data_wire[873..873] # !(sel_wire[0..0]) & data_wire[841..841]; - l1_w9_n14_mux_dataout = sel_wire[0..0] & data_wire[937..937] # !(sel_wire[0..0]) & data_wire[905..905]; - l1_w9_n15_mux_dataout = sel_wire[0..0] & data_wire[1001..1001] # !(sel_wire[0..0]) & data_wire[969..969]; - l1_w9_n1_mux_dataout = sel_wire[0..0] & data_wire[105..105] # !(sel_wire[0..0]) & data_wire[73..73]; - l1_w9_n2_mux_dataout = sel_wire[0..0] & data_wire[169..169] # !(sel_wire[0..0]) & data_wire[137..137]; - l1_w9_n3_mux_dataout = sel_wire[0..0] & data_wire[233..233] # !(sel_wire[0..0]) & data_wire[201..201]; - l1_w9_n4_mux_dataout = sel_wire[0..0] & data_wire[297..297] # !(sel_wire[0..0]) & data_wire[265..265]; - l1_w9_n5_mux_dataout = sel_wire[0..0] & data_wire[361..361] # !(sel_wire[0..0]) & data_wire[329..329]; - l1_w9_n6_mux_dataout = sel_wire[0..0] & data_wire[425..425] # !(sel_wire[0..0]) & data_wire[393..393]; - l1_w9_n7_mux_dataout = sel_wire[0..0] & data_wire[489..489] # !(sel_wire[0..0]) & data_wire[457..457]; - l1_w9_n8_mux_dataout = sel_wire[0..0] & data_wire[553..553] # !(sel_wire[0..0]) & data_wire[521..521]; - l1_w9_n9_mux_dataout = sel_wire[0..0] & data_wire[617..617] # !(sel_wire[0..0]) & data_wire[585..585]; - l2_w0_n0_mux_dataout = sel_wire[6..6] & data_wire[1025..1025] # !(sel_wire[6..6]) & data_wire[1024..1024]; - l2_w0_n1_mux_dataout = sel_wire[6..6] & data_wire[1027..1027] # !(sel_wire[6..6]) & data_wire[1026..1026]; - l2_w0_n2_mux_dataout = sel_wire[6..6] & data_wire[1029..1029] # !(sel_wire[6..6]) & data_wire[1028..1028]; - l2_w0_n3_mux_dataout = sel_wire[6..6] & data_wire[1031..1031] # !(sel_wire[6..6]) & data_wire[1030..1030]; - l2_w0_n4_mux_dataout = sel_wire[6..6] & data_wire[1033..1033] # !(sel_wire[6..6]) & data_wire[1032..1032]; - l2_w0_n5_mux_dataout = sel_wire[6..6] & data_wire[1035..1035] # !(sel_wire[6..6]) & data_wire[1034..1034]; - l2_w0_n6_mux_dataout = sel_wire[6..6] & data_wire[1037..1037] # !(sel_wire[6..6]) & data_wire[1036..1036]; - l2_w0_n7_mux_dataout = sel_wire[6..6] & data_wire[1039..1039] # !(sel_wire[6..6]) & data_wire[1038..1038]; - l2_w10_n0_mux_dataout = sel_wire[6..6] & data_wire[1185..1185] # !(sel_wire[6..6]) & data_wire[1184..1184]; - l2_w10_n1_mux_dataout = sel_wire[6..6] & data_wire[1187..1187] # !(sel_wire[6..6]) & data_wire[1186..1186]; - l2_w10_n2_mux_dataout = sel_wire[6..6] & data_wire[1189..1189] # !(sel_wire[6..6]) & data_wire[1188..1188]; - l2_w10_n3_mux_dataout = sel_wire[6..6] & data_wire[1191..1191] # !(sel_wire[6..6]) & data_wire[1190..1190]; - l2_w10_n4_mux_dataout = sel_wire[6..6] & data_wire[1193..1193] # !(sel_wire[6..6]) & data_wire[1192..1192]; - l2_w10_n5_mux_dataout = sel_wire[6..6] & data_wire[1195..1195] # !(sel_wire[6..6]) & data_wire[1194..1194]; - l2_w10_n6_mux_dataout = sel_wire[6..6] & data_wire[1197..1197] # !(sel_wire[6..6]) & data_wire[1196..1196]; - l2_w10_n7_mux_dataout = sel_wire[6..6] & data_wire[1199..1199] # !(sel_wire[6..6]) & data_wire[1198..1198]; - l2_w11_n0_mux_dataout = sel_wire[6..6] & data_wire[1201..1201] # !(sel_wire[6..6]) & data_wire[1200..1200]; - l2_w11_n1_mux_dataout = sel_wire[6..6] & data_wire[1203..1203] # !(sel_wire[6..6]) & data_wire[1202..1202]; - l2_w11_n2_mux_dataout = sel_wire[6..6] & data_wire[1205..1205] # !(sel_wire[6..6]) & data_wire[1204..1204]; - l2_w11_n3_mux_dataout = sel_wire[6..6] & data_wire[1207..1207] # !(sel_wire[6..6]) & data_wire[1206..1206]; - l2_w11_n4_mux_dataout = sel_wire[6..6] & data_wire[1209..1209] # !(sel_wire[6..6]) & data_wire[1208..1208]; - l2_w11_n5_mux_dataout = sel_wire[6..6] & data_wire[1211..1211] # !(sel_wire[6..6]) & data_wire[1210..1210]; - l2_w11_n6_mux_dataout = sel_wire[6..6] & data_wire[1213..1213] # !(sel_wire[6..6]) & data_wire[1212..1212]; - l2_w11_n7_mux_dataout = sel_wire[6..6] & data_wire[1215..1215] # !(sel_wire[6..6]) & data_wire[1214..1214]; - l2_w12_n0_mux_dataout = sel_wire[6..6] & data_wire[1217..1217] # !(sel_wire[6..6]) & data_wire[1216..1216]; - l2_w12_n1_mux_dataout = sel_wire[6..6] & data_wire[1219..1219] # !(sel_wire[6..6]) & data_wire[1218..1218]; - l2_w12_n2_mux_dataout = sel_wire[6..6] & data_wire[1221..1221] # !(sel_wire[6..6]) & data_wire[1220..1220]; - l2_w12_n3_mux_dataout = sel_wire[6..6] & data_wire[1223..1223] # !(sel_wire[6..6]) & data_wire[1222..1222]; - l2_w12_n4_mux_dataout = sel_wire[6..6] & data_wire[1225..1225] # !(sel_wire[6..6]) & data_wire[1224..1224]; - l2_w12_n5_mux_dataout = sel_wire[6..6] & data_wire[1227..1227] # !(sel_wire[6..6]) & data_wire[1226..1226]; - l2_w12_n6_mux_dataout = sel_wire[6..6] & data_wire[1229..1229] # !(sel_wire[6..6]) & data_wire[1228..1228]; - l2_w12_n7_mux_dataout = sel_wire[6..6] & data_wire[1231..1231] # !(sel_wire[6..6]) & data_wire[1230..1230]; - l2_w13_n0_mux_dataout = sel_wire[6..6] & data_wire[1233..1233] # !(sel_wire[6..6]) & data_wire[1232..1232]; - l2_w13_n1_mux_dataout = sel_wire[6..6] & data_wire[1235..1235] # !(sel_wire[6..6]) & data_wire[1234..1234]; - l2_w13_n2_mux_dataout = sel_wire[6..6] & data_wire[1237..1237] # !(sel_wire[6..6]) & data_wire[1236..1236]; - l2_w13_n3_mux_dataout = sel_wire[6..6] & data_wire[1239..1239] # !(sel_wire[6..6]) & data_wire[1238..1238]; - l2_w13_n4_mux_dataout = sel_wire[6..6] & data_wire[1241..1241] # !(sel_wire[6..6]) & data_wire[1240..1240]; - l2_w13_n5_mux_dataout = sel_wire[6..6] & data_wire[1243..1243] # !(sel_wire[6..6]) & data_wire[1242..1242]; - l2_w13_n6_mux_dataout = sel_wire[6..6] & data_wire[1245..1245] # !(sel_wire[6..6]) & data_wire[1244..1244]; - l2_w13_n7_mux_dataout = sel_wire[6..6] & data_wire[1247..1247] # !(sel_wire[6..6]) & data_wire[1246..1246]; - l2_w14_n0_mux_dataout = sel_wire[6..6] & data_wire[1249..1249] # !(sel_wire[6..6]) & data_wire[1248..1248]; - l2_w14_n1_mux_dataout = sel_wire[6..6] & data_wire[1251..1251] # !(sel_wire[6..6]) & data_wire[1250..1250]; - l2_w14_n2_mux_dataout = sel_wire[6..6] & data_wire[1253..1253] # !(sel_wire[6..6]) & data_wire[1252..1252]; - l2_w14_n3_mux_dataout = sel_wire[6..6] & data_wire[1255..1255] # !(sel_wire[6..6]) & data_wire[1254..1254]; - l2_w14_n4_mux_dataout = sel_wire[6..6] & data_wire[1257..1257] # !(sel_wire[6..6]) & data_wire[1256..1256]; - l2_w14_n5_mux_dataout = sel_wire[6..6] & data_wire[1259..1259] # !(sel_wire[6..6]) & data_wire[1258..1258]; - l2_w14_n6_mux_dataout = sel_wire[6..6] & data_wire[1261..1261] # !(sel_wire[6..6]) & data_wire[1260..1260]; - l2_w14_n7_mux_dataout = sel_wire[6..6] & data_wire[1263..1263] # !(sel_wire[6..6]) & data_wire[1262..1262]; - l2_w15_n0_mux_dataout = sel_wire[6..6] & data_wire[1265..1265] # !(sel_wire[6..6]) & data_wire[1264..1264]; - l2_w15_n1_mux_dataout = sel_wire[6..6] & data_wire[1267..1267] # !(sel_wire[6..6]) & data_wire[1266..1266]; - l2_w15_n2_mux_dataout = sel_wire[6..6] & data_wire[1269..1269] # !(sel_wire[6..6]) & data_wire[1268..1268]; - l2_w15_n3_mux_dataout = sel_wire[6..6] & data_wire[1271..1271] # !(sel_wire[6..6]) & data_wire[1270..1270]; - l2_w15_n4_mux_dataout = sel_wire[6..6] & data_wire[1273..1273] # !(sel_wire[6..6]) & data_wire[1272..1272]; - l2_w15_n5_mux_dataout = sel_wire[6..6] & data_wire[1275..1275] # !(sel_wire[6..6]) & data_wire[1274..1274]; - l2_w15_n6_mux_dataout = sel_wire[6..6] & data_wire[1277..1277] # !(sel_wire[6..6]) & data_wire[1276..1276]; - l2_w15_n7_mux_dataout = sel_wire[6..6] & data_wire[1279..1279] # !(sel_wire[6..6]) & data_wire[1278..1278]; - l2_w16_n0_mux_dataout = sel_wire[6..6] & data_wire[1281..1281] # !(sel_wire[6..6]) & data_wire[1280..1280]; - l2_w16_n1_mux_dataout = sel_wire[6..6] & data_wire[1283..1283] # !(sel_wire[6..6]) & data_wire[1282..1282]; - l2_w16_n2_mux_dataout = sel_wire[6..6] & data_wire[1285..1285] # !(sel_wire[6..6]) & data_wire[1284..1284]; - l2_w16_n3_mux_dataout = sel_wire[6..6] & data_wire[1287..1287] # !(sel_wire[6..6]) & data_wire[1286..1286]; - l2_w16_n4_mux_dataout = sel_wire[6..6] & data_wire[1289..1289] # !(sel_wire[6..6]) & data_wire[1288..1288]; - l2_w16_n5_mux_dataout = sel_wire[6..6] & data_wire[1291..1291] # !(sel_wire[6..6]) & data_wire[1290..1290]; - l2_w16_n6_mux_dataout = sel_wire[6..6] & data_wire[1293..1293] # !(sel_wire[6..6]) & data_wire[1292..1292]; - l2_w16_n7_mux_dataout = sel_wire[6..6] & data_wire[1295..1295] # !(sel_wire[6..6]) & data_wire[1294..1294]; - l2_w17_n0_mux_dataout = sel_wire[6..6] & data_wire[1297..1297] # !(sel_wire[6..6]) & data_wire[1296..1296]; - l2_w17_n1_mux_dataout = sel_wire[6..6] & data_wire[1299..1299] # !(sel_wire[6..6]) & data_wire[1298..1298]; - l2_w17_n2_mux_dataout = sel_wire[6..6] & data_wire[1301..1301] # !(sel_wire[6..6]) & data_wire[1300..1300]; - l2_w17_n3_mux_dataout = sel_wire[6..6] & data_wire[1303..1303] # !(sel_wire[6..6]) & data_wire[1302..1302]; - l2_w17_n4_mux_dataout = sel_wire[6..6] & data_wire[1305..1305] # !(sel_wire[6..6]) & data_wire[1304..1304]; - l2_w17_n5_mux_dataout = sel_wire[6..6] & data_wire[1307..1307] # !(sel_wire[6..6]) & data_wire[1306..1306]; - l2_w17_n6_mux_dataout = sel_wire[6..6] & data_wire[1309..1309] # !(sel_wire[6..6]) & data_wire[1308..1308]; - l2_w17_n7_mux_dataout = sel_wire[6..6] & data_wire[1311..1311] # !(sel_wire[6..6]) & data_wire[1310..1310]; - l2_w18_n0_mux_dataout = sel_wire[6..6] & data_wire[1313..1313] # !(sel_wire[6..6]) & data_wire[1312..1312]; - l2_w18_n1_mux_dataout = sel_wire[6..6] & data_wire[1315..1315] # !(sel_wire[6..6]) & data_wire[1314..1314]; - l2_w18_n2_mux_dataout = sel_wire[6..6] & data_wire[1317..1317] # !(sel_wire[6..6]) & data_wire[1316..1316]; - l2_w18_n3_mux_dataout = sel_wire[6..6] & data_wire[1319..1319] # !(sel_wire[6..6]) & data_wire[1318..1318]; - l2_w18_n4_mux_dataout = sel_wire[6..6] & data_wire[1321..1321] # !(sel_wire[6..6]) & data_wire[1320..1320]; - l2_w18_n5_mux_dataout = sel_wire[6..6] & data_wire[1323..1323] # !(sel_wire[6..6]) & data_wire[1322..1322]; - l2_w18_n6_mux_dataout = sel_wire[6..6] & data_wire[1325..1325] # !(sel_wire[6..6]) & data_wire[1324..1324]; - l2_w18_n7_mux_dataout = sel_wire[6..6] & data_wire[1327..1327] # !(sel_wire[6..6]) & data_wire[1326..1326]; - l2_w19_n0_mux_dataout = sel_wire[6..6] & data_wire[1329..1329] # !(sel_wire[6..6]) & data_wire[1328..1328]; - l2_w19_n1_mux_dataout = sel_wire[6..6] & data_wire[1331..1331] # !(sel_wire[6..6]) & data_wire[1330..1330]; - l2_w19_n2_mux_dataout = sel_wire[6..6] & data_wire[1333..1333] # !(sel_wire[6..6]) & data_wire[1332..1332]; - l2_w19_n3_mux_dataout = sel_wire[6..6] & data_wire[1335..1335] # !(sel_wire[6..6]) & data_wire[1334..1334]; - l2_w19_n4_mux_dataout = sel_wire[6..6] & data_wire[1337..1337] # !(sel_wire[6..6]) & data_wire[1336..1336]; - l2_w19_n5_mux_dataout = sel_wire[6..6] & data_wire[1339..1339] # !(sel_wire[6..6]) & data_wire[1338..1338]; - l2_w19_n6_mux_dataout = sel_wire[6..6] & data_wire[1341..1341] # !(sel_wire[6..6]) & data_wire[1340..1340]; - l2_w19_n7_mux_dataout = sel_wire[6..6] & data_wire[1343..1343] # !(sel_wire[6..6]) & data_wire[1342..1342]; - l2_w1_n0_mux_dataout = sel_wire[6..6] & data_wire[1041..1041] # !(sel_wire[6..6]) & data_wire[1040..1040]; - l2_w1_n1_mux_dataout = sel_wire[6..6] & data_wire[1043..1043] # !(sel_wire[6..6]) & data_wire[1042..1042]; - l2_w1_n2_mux_dataout = sel_wire[6..6] & data_wire[1045..1045] # !(sel_wire[6..6]) & data_wire[1044..1044]; - l2_w1_n3_mux_dataout = sel_wire[6..6] & data_wire[1047..1047] # !(sel_wire[6..6]) & data_wire[1046..1046]; - l2_w1_n4_mux_dataout = sel_wire[6..6] & data_wire[1049..1049] # !(sel_wire[6..6]) & data_wire[1048..1048]; - l2_w1_n5_mux_dataout = sel_wire[6..6] & data_wire[1051..1051] # !(sel_wire[6..6]) & data_wire[1050..1050]; - l2_w1_n6_mux_dataout = sel_wire[6..6] & data_wire[1053..1053] # !(sel_wire[6..6]) & data_wire[1052..1052]; - l2_w1_n7_mux_dataout = sel_wire[6..6] & data_wire[1055..1055] # !(sel_wire[6..6]) & data_wire[1054..1054]; - l2_w20_n0_mux_dataout = sel_wire[6..6] & data_wire[1345..1345] # !(sel_wire[6..6]) & data_wire[1344..1344]; - l2_w20_n1_mux_dataout = sel_wire[6..6] & data_wire[1347..1347] # !(sel_wire[6..6]) & data_wire[1346..1346]; - l2_w20_n2_mux_dataout = sel_wire[6..6] & data_wire[1349..1349] # !(sel_wire[6..6]) & data_wire[1348..1348]; - l2_w20_n3_mux_dataout = sel_wire[6..6] & data_wire[1351..1351] # !(sel_wire[6..6]) & data_wire[1350..1350]; - l2_w20_n4_mux_dataout = sel_wire[6..6] & data_wire[1353..1353] # !(sel_wire[6..6]) & data_wire[1352..1352]; - l2_w20_n5_mux_dataout = sel_wire[6..6] & data_wire[1355..1355] # !(sel_wire[6..6]) & data_wire[1354..1354]; - l2_w20_n6_mux_dataout = sel_wire[6..6] & data_wire[1357..1357] # !(sel_wire[6..6]) & data_wire[1356..1356]; - l2_w20_n7_mux_dataout = sel_wire[6..6] & data_wire[1359..1359] # !(sel_wire[6..6]) & data_wire[1358..1358]; - l2_w21_n0_mux_dataout = sel_wire[6..6] & data_wire[1361..1361] # !(sel_wire[6..6]) & data_wire[1360..1360]; - l2_w21_n1_mux_dataout = sel_wire[6..6] & data_wire[1363..1363] # !(sel_wire[6..6]) & data_wire[1362..1362]; - l2_w21_n2_mux_dataout = sel_wire[6..6] & data_wire[1365..1365] # !(sel_wire[6..6]) & data_wire[1364..1364]; - l2_w21_n3_mux_dataout = sel_wire[6..6] & data_wire[1367..1367] # !(sel_wire[6..6]) & data_wire[1366..1366]; - l2_w21_n4_mux_dataout = sel_wire[6..6] & data_wire[1369..1369] # !(sel_wire[6..6]) & data_wire[1368..1368]; - l2_w21_n5_mux_dataout = sel_wire[6..6] & data_wire[1371..1371] # !(sel_wire[6..6]) & data_wire[1370..1370]; - l2_w21_n6_mux_dataout = sel_wire[6..6] & data_wire[1373..1373] # !(sel_wire[6..6]) & data_wire[1372..1372]; - l2_w21_n7_mux_dataout = sel_wire[6..6] & data_wire[1375..1375] # !(sel_wire[6..6]) & data_wire[1374..1374]; - l2_w22_n0_mux_dataout = sel_wire[6..6] & data_wire[1377..1377] # !(sel_wire[6..6]) & data_wire[1376..1376]; - l2_w22_n1_mux_dataout = sel_wire[6..6] & data_wire[1379..1379] # !(sel_wire[6..6]) & data_wire[1378..1378]; - l2_w22_n2_mux_dataout = sel_wire[6..6] & data_wire[1381..1381] # !(sel_wire[6..6]) & data_wire[1380..1380]; - l2_w22_n3_mux_dataout = sel_wire[6..6] & data_wire[1383..1383] # !(sel_wire[6..6]) & data_wire[1382..1382]; - l2_w22_n4_mux_dataout = sel_wire[6..6] & data_wire[1385..1385] # !(sel_wire[6..6]) & data_wire[1384..1384]; - l2_w22_n5_mux_dataout = sel_wire[6..6] & data_wire[1387..1387] # !(sel_wire[6..6]) & data_wire[1386..1386]; - l2_w22_n6_mux_dataout = sel_wire[6..6] & data_wire[1389..1389] # !(sel_wire[6..6]) & data_wire[1388..1388]; - l2_w22_n7_mux_dataout = sel_wire[6..6] & data_wire[1391..1391] # !(sel_wire[6..6]) & data_wire[1390..1390]; - l2_w23_n0_mux_dataout = sel_wire[6..6] & data_wire[1393..1393] # !(sel_wire[6..6]) & data_wire[1392..1392]; - l2_w23_n1_mux_dataout = sel_wire[6..6] & data_wire[1395..1395] # !(sel_wire[6..6]) & data_wire[1394..1394]; - l2_w23_n2_mux_dataout = sel_wire[6..6] & data_wire[1397..1397] # !(sel_wire[6..6]) & data_wire[1396..1396]; - l2_w23_n3_mux_dataout = sel_wire[6..6] & data_wire[1399..1399] # !(sel_wire[6..6]) & data_wire[1398..1398]; - l2_w23_n4_mux_dataout = sel_wire[6..6] & data_wire[1401..1401] # !(sel_wire[6..6]) & data_wire[1400..1400]; - l2_w23_n5_mux_dataout = sel_wire[6..6] & data_wire[1403..1403] # !(sel_wire[6..6]) & data_wire[1402..1402]; - l2_w23_n6_mux_dataout = sel_wire[6..6] & data_wire[1405..1405] # !(sel_wire[6..6]) & data_wire[1404..1404]; - l2_w23_n7_mux_dataout = sel_wire[6..6] & data_wire[1407..1407] # !(sel_wire[6..6]) & data_wire[1406..1406]; - l2_w24_n0_mux_dataout = sel_wire[6..6] & data_wire[1409..1409] # !(sel_wire[6..6]) & data_wire[1408..1408]; - l2_w24_n1_mux_dataout = sel_wire[6..6] & data_wire[1411..1411] # !(sel_wire[6..6]) & data_wire[1410..1410]; - l2_w24_n2_mux_dataout = sel_wire[6..6] & data_wire[1413..1413] # !(sel_wire[6..6]) & data_wire[1412..1412]; - l2_w24_n3_mux_dataout = sel_wire[6..6] & data_wire[1415..1415] # !(sel_wire[6..6]) & data_wire[1414..1414]; - l2_w24_n4_mux_dataout = sel_wire[6..6] & data_wire[1417..1417] # !(sel_wire[6..6]) & data_wire[1416..1416]; - l2_w24_n5_mux_dataout = sel_wire[6..6] & data_wire[1419..1419] # !(sel_wire[6..6]) & data_wire[1418..1418]; - l2_w24_n6_mux_dataout = sel_wire[6..6] & data_wire[1421..1421] # !(sel_wire[6..6]) & data_wire[1420..1420]; - l2_w24_n7_mux_dataout = sel_wire[6..6] & data_wire[1423..1423] # !(sel_wire[6..6]) & data_wire[1422..1422]; - l2_w25_n0_mux_dataout = sel_wire[6..6] & data_wire[1425..1425] # !(sel_wire[6..6]) & data_wire[1424..1424]; - l2_w25_n1_mux_dataout = sel_wire[6..6] & data_wire[1427..1427] # !(sel_wire[6..6]) & data_wire[1426..1426]; - l2_w25_n2_mux_dataout = sel_wire[6..6] & data_wire[1429..1429] # !(sel_wire[6..6]) & data_wire[1428..1428]; - l2_w25_n3_mux_dataout = sel_wire[6..6] & data_wire[1431..1431] # !(sel_wire[6..6]) & data_wire[1430..1430]; - l2_w25_n4_mux_dataout = sel_wire[6..6] & data_wire[1433..1433] # !(sel_wire[6..6]) & data_wire[1432..1432]; - l2_w25_n5_mux_dataout = sel_wire[6..6] & data_wire[1435..1435] # !(sel_wire[6..6]) & data_wire[1434..1434]; - l2_w25_n6_mux_dataout = sel_wire[6..6] & data_wire[1437..1437] # !(sel_wire[6..6]) & data_wire[1436..1436]; - l2_w25_n7_mux_dataout = sel_wire[6..6] & data_wire[1439..1439] # !(sel_wire[6..6]) & data_wire[1438..1438]; - l2_w26_n0_mux_dataout = sel_wire[6..6] & data_wire[1441..1441] # !(sel_wire[6..6]) & data_wire[1440..1440]; - l2_w26_n1_mux_dataout = sel_wire[6..6] & data_wire[1443..1443] # !(sel_wire[6..6]) & data_wire[1442..1442]; - l2_w26_n2_mux_dataout = sel_wire[6..6] & data_wire[1445..1445] # !(sel_wire[6..6]) & data_wire[1444..1444]; - l2_w26_n3_mux_dataout = sel_wire[6..6] & data_wire[1447..1447] # !(sel_wire[6..6]) & data_wire[1446..1446]; - l2_w26_n4_mux_dataout = sel_wire[6..6] & data_wire[1449..1449] # !(sel_wire[6..6]) & data_wire[1448..1448]; - l2_w26_n5_mux_dataout = sel_wire[6..6] & data_wire[1451..1451] # !(sel_wire[6..6]) & data_wire[1450..1450]; - l2_w26_n6_mux_dataout = sel_wire[6..6] & data_wire[1453..1453] # !(sel_wire[6..6]) & data_wire[1452..1452]; - l2_w26_n7_mux_dataout = sel_wire[6..6] & data_wire[1455..1455] # !(sel_wire[6..6]) & data_wire[1454..1454]; - l2_w27_n0_mux_dataout = sel_wire[6..6] & data_wire[1457..1457] # !(sel_wire[6..6]) & data_wire[1456..1456]; - l2_w27_n1_mux_dataout = sel_wire[6..6] & data_wire[1459..1459] # !(sel_wire[6..6]) & data_wire[1458..1458]; - l2_w27_n2_mux_dataout = sel_wire[6..6] & data_wire[1461..1461] # !(sel_wire[6..6]) & data_wire[1460..1460]; - l2_w27_n3_mux_dataout = sel_wire[6..6] & data_wire[1463..1463] # !(sel_wire[6..6]) & data_wire[1462..1462]; - l2_w27_n4_mux_dataout = sel_wire[6..6] & data_wire[1465..1465] # !(sel_wire[6..6]) & data_wire[1464..1464]; - l2_w27_n5_mux_dataout = sel_wire[6..6] & data_wire[1467..1467] # !(sel_wire[6..6]) & data_wire[1466..1466]; - l2_w27_n6_mux_dataout = sel_wire[6..6] & data_wire[1469..1469] # !(sel_wire[6..6]) & data_wire[1468..1468]; - l2_w27_n7_mux_dataout = sel_wire[6..6] & data_wire[1471..1471] # !(sel_wire[6..6]) & data_wire[1470..1470]; - l2_w28_n0_mux_dataout = sel_wire[6..6] & data_wire[1473..1473] # !(sel_wire[6..6]) & data_wire[1472..1472]; - l2_w28_n1_mux_dataout = sel_wire[6..6] & data_wire[1475..1475] # !(sel_wire[6..6]) & data_wire[1474..1474]; - l2_w28_n2_mux_dataout = sel_wire[6..6] & data_wire[1477..1477] # !(sel_wire[6..6]) & data_wire[1476..1476]; - l2_w28_n3_mux_dataout = sel_wire[6..6] & data_wire[1479..1479] # !(sel_wire[6..6]) & data_wire[1478..1478]; - l2_w28_n4_mux_dataout = sel_wire[6..6] & data_wire[1481..1481] # !(sel_wire[6..6]) & data_wire[1480..1480]; - l2_w28_n5_mux_dataout = sel_wire[6..6] & data_wire[1483..1483] # !(sel_wire[6..6]) & data_wire[1482..1482]; - l2_w28_n6_mux_dataout = sel_wire[6..6] & data_wire[1485..1485] # !(sel_wire[6..6]) & data_wire[1484..1484]; - l2_w28_n7_mux_dataout = sel_wire[6..6] & data_wire[1487..1487] # !(sel_wire[6..6]) & data_wire[1486..1486]; - l2_w29_n0_mux_dataout = sel_wire[6..6] & data_wire[1489..1489] # !(sel_wire[6..6]) & data_wire[1488..1488]; - l2_w29_n1_mux_dataout = sel_wire[6..6] & data_wire[1491..1491] # !(sel_wire[6..6]) & data_wire[1490..1490]; - l2_w29_n2_mux_dataout = sel_wire[6..6] & data_wire[1493..1493] # !(sel_wire[6..6]) & data_wire[1492..1492]; - l2_w29_n3_mux_dataout = sel_wire[6..6] & data_wire[1495..1495] # !(sel_wire[6..6]) & data_wire[1494..1494]; - l2_w29_n4_mux_dataout = sel_wire[6..6] & data_wire[1497..1497] # !(sel_wire[6..6]) & data_wire[1496..1496]; - l2_w29_n5_mux_dataout = sel_wire[6..6] & data_wire[1499..1499] # !(sel_wire[6..6]) & data_wire[1498..1498]; - l2_w29_n6_mux_dataout = sel_wire[6..6] & data_wire[1501..1501] # !(sel_wire[6..6]) & data_wire[1500..1500]; - l2_w29_n7_mux_dataout = sel_wire[6..6] & data_wire[1503..1503] # !(sel_wire[6..6]) & data_wire[1502..1502]; - l2_w2_n0_mux_dataout = sel_wire[6..6] & data_wire[1057..1057] # !(sel_wire[6..6]) & data_wire[1056..1056]; - l2_w2_n1_mux_dataout = sel_wire[6..6] & data_wire[1059..1059] # !(sel_wire[6..6]) & data_wire[1058..1058]; - l2_w2_n2_mux_dataout = sel_wire[6..6] & data_wire[1061..1061] # !(sel_wire[6..6]) & data_wire[1060..1060]; - l2_w2_n3_mux_dataout = sel_wire[6..6] & data_wire[1063..1063] # !(sel_wire[6..6]) & data_wire[1062..1062]; - l2_w2_n4_mux_dataout = sel_wire[6..6] & data_wire[1065..1065] # !(sel_wire[6..6]) & data_wire[1064..1064]; - l2_w2_n5_mux_dataout = sel_wire[6..6] & data_wire[1067..1067] # !(sel_wire[6..6]) & data_wire[1066..1066]; - l2_w2_n6_mux_dataout = sel_wire[6..6] & data_wire[1069..1069] # !(sel_wire[6..6]) & data_wire[1068..1068]; - l2_w2_n7_mux_dataout = sel_wire[6..6] & data_wire[1071..1071] # !(sel_wire[6..6]) & data_wire[1070..1070]; - l2_w30_n0_mux_dataout = sel_wire[6..6] & data_wire[1505..1505] # !(sel_wire[6..6]) & data_wire[1504..1504]; - l2_w30_n1_mux_dataout = sel_wire[6..6] & data_wire[1507..1507] # !(sel_wire[6..6]) & data_wire[1506..1506]; - l2_w30_n2_mux_dataout = sel_wire[6..6] & data_wire[1509..1509] # !(sel_wire[6..6]) & data_wire[1508..1508]; - l2_w30_n3_mux_dataout = sel_wire[6..6] & data_wire[1511..1511] # !(sel_wire[6..6]) & data_wire[1510..1510]; - l2_w30_n4_mux_dataout = sel_wire[6..6] & data_wire[1513..1513] # !(sel_wire[6..6]) & data_wire[1512..1512]; - l2_w30_n5_mux_dataout = sel_wire[6..6] & data_wire[1515..1515] # !(sel_wire[6..6]) & data_wire[1514..1514]; - l2_w30_n6_mux_dataout = sel_wire[6..6] & data_wire[1517..1517] # !(sel_wire[6..6]) & data_wire[1516..1516]; - l2_w30_n7_mux_dataout = sel_wire[6..6] & data_wire[1519..1519] # !(sel_wire[6..6]) & data_wire[1518..1518]; - l2_w31_n0_mux_dataout = sel_wire[6..6] & data_wire[1521..1521] # !(sel_wire[6..6]) & data_wire[1520..1520]; - l2_w31_n1_mux_dataout = sel_wire[6..6] & data_wire[1523..1523] # !(sel_wire[6..6]) & data_wire[1522..1522]; - l2_w31_n2_mux_dataout = sel_wire[6..6] & data_wire[1525..1525] # !(sel_wire[6..6]) & data_wire[1524..1524]; - l2_w31_n3_mux_dataout = sel_wire[6..6] & data_wire[1527..1527] # !(sel_wire[6..6]) & data_wire[1526..1526]; - l2_w31_n4_mux_dataout = sel_wire[6..6] & data_wire[1529..1529] # !(sel_wire[6..6]) & data_wire[1528..1528]; - l2_w31_n5_mux_dataout = sel_wire[6..6] & data_wire[1531..1531] # !(sel_wire[6..6]) & data_wire[1530..1530]; - l2_w31_n6_mux_dataout = sel_wire[6..6] & data_wire[1533..1533] # !(sel_wire[6..6]) & data_wire[1532..1532]; - l2_w31_n7_mux_dataout = sel_wire[6..6] & data_wire[1535..1535] # !(sel_wire[6..6]) & data_wire[1534..1534]; - l2_w3_n0_mux_dataout = sel_wire[6..6] & data_wire[1073..1073] # !(sel_wire[6..6]) & data_wire[1072..1072]; - l2_w3_n1_mux_dataout = sel_wire[6..6] & data_wire[1075..1075] # !(sel_wire[6..6]) & data_wire[1074..1074]; - l2_w3_n2_mux_dataout = sel_wire[6..6] & data_wire[1077..1077] # !(sel_wire[6..6]) & data_wire[1076..1076]; - l2_w3_n3_mux_dataout = sel_wire[6..6] & data_wire[1079..1079] # !(sel_wire[6..6]) & data_wire[1078..1078]; - l2_w3_n4_mux_dataout = sel_wire[6..6] & data_wire[1081..1081] # !(sel_wire[6..6]) & data_wire[1080..1080]; - l2_w3_n5_mux_dataout = sel_wire[6..6] & data_wire[1083..1083] # !(sel_wire[6..6]) & data_wire[1082..1082]; - l2_w3_n6_mux_dataout = sel_wire[6..6] & data_wire[1085..1085] # !(sel_wire[6..6]) & data_wire[1084..1084]; - l2_w3_n7_mux_dataout = sel_wire[6..6] & data_wire[1087..1087] # !(sel_wire[6..6]) & data_wire[1086..1086]; - l2_w4_n0_mux_dataout = sel_wire[6..6] & data_wire[1089..1089] # !(sel_wire[6..6]) & data_wire[1088..1088]; - l2_w4_n1_mux_dataout = sel_wire[6..6] & data_wire[1091..1091] # !(sel_wire[6..6]) & data_wire[1090..1090]; - l2_w4_n2_mux_dataout = sel_wire[6..6] & data_wire[1093..1093] # !(sel_wire[6..6]) & data_wire[1092..1092]; - l2_w4_n3_mux_dataout = sel_wire[6..6] & data_wire[1095..1095] # !(sel_wire[6..6]) & data_wire[1094..1094]; - l2_w4_n4_mux_dataout = sel_wire[6..6] & data_wire[1097..1097] # !(sel_wire[6..6]) & data_wire[1096..1096]; - l2_w4_n5_mux_dataout = sel_wire[6..6] & data_wire[1099..1099] # !(sel_wire[6..6]) & data_wire[1098..1098]; - l2_w4_n6_mux_dataout = sel_wire[6..6] & data_wire[1101..1101] # !(sel_wire[6..6]) & data_wire[1100..1100]; - l2_w4_n7_mux_dataout = sel_wire[6..6] & data_wire[1103..1103] # !(sel_wire[6..6]) & data_wire[1102..1102]; - l2_w5_n0_mux_dataout = sel_wire[6..6] & data_wire[1105..1105] # !(sel_wire[6..6]) & data_wire[1104..1104]; - l2_w5_n1_mux_dataout = sel_wire[6..6] & data_wire[1107..1107] # !(sel_wire[6..6]) & data_wire[1106..1106]; - l2_w5_n2_mux_dataout = sel_wire[6..6] & data_wire[1109..1109] # !(sel_wire[6..6]) & data_wire[1108..1108]; - l2_w5_n3_mux_dataout = sel_wire[6..6] & data_wire[1111..1111] # !(sel_wire[6..6]) & data_wire[1110..1110]; - l2_w5_n4_mux_dataout = sel_wire[6..6] & data_wire[1113..1113] # !(sel_wire[6..6]) & data_wire[1112..1112]; - l2_w5_n5_mux_dataout = sel_wire[6..6] & data_wire[1115..1115] # !(sel_wire[6..6]) & data_wire[1114..1114]; - l2_w5_n6_mux_dataout = sel_wire[6..6] & data_wire[1117..1117] # !(sel_wire[6..6]) & data_wire[1116..1116]; - l2_w5_n7_mux_dataout = sel_wire[6..6] & data_wire[1119..1119] # !(sel_wire[6..6]) & data_wire[1118..1118]; - l2_w6_n0_mux_dataout = sel_wire[6..6] & data_wire[1121..1121] # !(sel_wire[6..6]) & data_wire[1120..1120]; - l2_w6_n1_mux_dataout = sel_wire[6..6] & data_wire[1123..1123] # !(sel_wire[6..6]) & data_wire[1122..1122]; - l2_w6_n2_mux_dataout = sel_wire[6..6] & data_wire[1125..1125] # !(sel_wire[6..6]) & data_wire[1124..1124]; - l2_w6_n3_mux_dataout = sel_wire[6..6] & data_wire[1127..1127] # !(sel_wire[6..6]) & data_wire[1126..1126]; - l2_w6_n4_mux_dataout = sel_wire[6..6] & data_wire[1129..1129] # !(sel_wire[6..6]) & data_wire[1128..1128]; - l2_w6_n5_mux_dataout = sel_wire[6..6] & data_wire[1131..1131] # !(sel_wire[6..6]) & data_wire[1130..1130]; - l2_w6_n6_mux_dataout = sel_wire[6..6] & data_wire[1133..1133] # !(sel_wire[6..6]) & data_wire[1132..1132]; - l2_w6_n7_mux_dataout = sel_wire[6..6] & data_wire[1135..1135] # !(sel_wire[6..6]) & data_wire[1134..1134]; - l2_w7_n0_mux_dataout = sel_wire[6..6] & data_wire[1137..1137] # !(sel_wire[6..6]) & data_wire[1136..1136]; - l2_w7_n1_mux_dataout = sel_wire[6..6] & data_wire[1139..1139] # !(sel_wire[6..6]) & data_wire[1138..1138]; - l2_w7_n2_mux_dataout = sel_wire[6..6] & data_wire[1141..1141] # !(sel_wire[6..6]) & data_wire[1140..1140]; - l2_w7_n3_mux_dataout = sel_wire[6..6] & data_wire[1143..1143] # !(sel_wire[6..6]) & data_wire[1142..1142]; - l2_w7_n4_mux_dataout = sel_wire[6..6] & data_wire[1145..1145] # !(sel_wire[6..6]) & data_wire[1144..1144]; - l2_w7_n5_mux_dataout = sel_wire[6..6] & data_wire[1147..1147] # !(sel_wire[6..6]) & data_wire[1146..1146]; - l2_w7_n6_mux_dataout = sel_wire[6..6] & data_wire[1149..1149] # !(sel_wire[6..6]) & data_wire[1148..1148]; - l2_w7_n7_mux_dataout = sel_wire[6..6] & data_wire[1151..1151] # !(sel_wire[6..6]) & data_wire[1150..1150]; - l2_w8_n0_mux_dataout = sel_wire[6..6] & data_wire[1153..1153] # !(sel_wire[6..6]) & data_wire[1152..1152]; - l2_w8_n1_mux_dataout = sel_wire[6..6] & data_wire[1155..1155] # !(sel_wire[6..6]) & data_wire[1154..1154]; - l2_w8_n2_mux_dataout = sel_wire[6..6] & data_wire[1157..1157] # !(sel_wire[6..6]) & data_wire[1156..1156]; - l2_w8_n3_mux_dataout = sel_wire[6..6] & data_wire[1159..1159] # !(sel_wire[6..6]) & data_wire[1158..1158]; - l2_w8_n4_mux_dataout = sel_wire[6..6] & data_wire[1161..1161] # !(sel_wire[6..6]) & data_wire[1160..1160]; - l2_w8_n5_mux_dataout = sel_wire[6..6] & data_wire[1163..1163] # !(sel_wire[6..6]) & data_wire[1162..1162]; - l2_w8_n6_mux_dataout = sel_wire[6..6] & data_wire[1165..1165] # !(sel_wire[6..6]) & data_wire[1164..1164]; - l2_w8_n7_mux_dataout = sel_wire[6..6] & data_wire[1167..1167] # !(sel_wire[6..6]) & data_wire[1166..1166]; - l2_w9_n0_mux_dataout = sel_wire[6..6] & data_wire[1169..1169] # !(sel_wire[6..6]) & data_wire[1168..1168]; - l2_w9_n1_mux_dataout = sel_wire[6..6] & data_wire[1171..1171] # !(sel_wire[6..6]) & data_wire[1170..1170]; - l2_w9_n2_mux_dataout = sel_wire[6..6] & data_wire[1173..1173] # !(sel_wire[6..6]) & data_wire[1172..1172]; - l2_w9_n3_mux_dataout = sel_wire[6..6] & data_wire[1175..1175] # !(sel_wire[6..6]) & data_wire[1174..1174]; - l2_w9_n4_mux_dataout = sel_wire[6..6] & data_wire[1177..1177] # !(sel_wire[6..6]) & data_wire[1176..1176]; - l2_w9_n5_mux_dataout = sel_wire[6..6] & data_wire[1179..1179] # !(sel_wire[6..6]) & data_wire[1178..1178]; - l2_w9_n6_mux_dataout = sel_wire[6..6] & data_wire[1181..1181] # !(sel_wire[6..6]) & data_wire[1180..1180]; - l2_w9_n7_mux_dataout = sel_wire[6..6] & data_wire[1183..1183] # !(sel_wire[6..6]) & data_wire[1182..1182]; - l3_w0_n0_mux_dataout = sel_wire[12..12] & data_wire[1537..1537] # !(sel_wire[12..12]) & data_wire[1536..1536]; - l3_w0_n1_mux_dataout = sel_wire[12..12] & data_wire[1539..1539] # !(sel_wire[12..12]) & data_wire[1538..1538]; - l3_w0_n2_mux_dataout = sel_wire[12..12] & data_wire[1541..1541] # !(sel_wire[12..12]) & data_wire[1540..1540]; - l3_w0_n3_mux_dataout = sel_wire[12..12] & data_wire[1543..1543] # !(sel_wire[12..12]) & data_wire[1542..1542]; - l3_w10_n0_mux_dataout = sel_wire[12..12] & data_wire[1617..1617] # !(sel_wire[12..12]) & data_wire[1616..1616]; - l3_w10_n1_mux_dataout = sel_wire[12..12] & data_wire[1619..1619] # !(sel_wire[12..12]) & data_wire[1618..1618]; - l3_w10_n2_mux_dataout = sel_wire[12..12] & data_wire[1621..1621] # !(sel_wire[12..12]) & data_wire[1620..1620]; - l3_w10_n3_mux_dataout = sel_wire[12..12] & data_wire[1623..1623] # !(sel_wire[12..12]) & data_wire[1622..1622]; - l3_w11_n0_mux_dataout = sel_wire[12..12] & data_wire[1625..1625] # !(sel_wire[12..12]) & data_wire[1624..1624]; - l3_w11_n1_mux_dataout = sel_wire[12..12] & data_wire[1627..1627] # !(sel_wire[12..12]) & data_wire[1626..1626]; - l3_w11_n2_mux_dataout = sel_wire[12..12] & data_wire[1629..1629] # !(sel_wire[12..12]) & data_wire[1628..1628]; - l3_w11_n3_mux_dataout = sel_wire[12..12] & data_wire[1631..1631] # !(sel_wire[12..12]) & data_wire[1630..1630]; - l3_w12_n0_mux_dataout = sel_wire[12..12] & data_wire[1633..1633] # !(sel_wire[12..12]) & data_wire[1632..1632]; - l3_w12_n1_mux_dataout = sel_wire[12..12] & data_wire[1635..1635] # !(sel_wire[12..12]) & data_wire[1634..1634]; - l3_w12_n2_mux_dataout = sel_wire[12..12] & data_wire[1637..1637] # !(sel_wire[12..12]) & data_wire[1636..1636]; - l3_w12_n3_mux_dataout = sel_wire[12..12] & data_wire[1639..1639] # !(sel_wire[12..12]) & data_wire[1638..1638]; - l3_w13_n0_mux_dataout = sel_wire[12..12] & data_wire[1641..1641] # !(sel_wire[12..12]) & data_wire[1640..1640]; - l3_w13_n1_mux_dataout = sel_wire[12..12] & data_wire[1643..1643] # !(sel_wire[12..12]) & data_wire[1642..1642]; - l3_w13_n2_mux_dataout = sel_wire[12..12] & data_wire[1645..1645] # !(sel_wire[12..12]) & data_wire[1644..1644]; - l3_w13_n3_mux_dataout = sel_wire[12..12] & data_wire[1647..1647] # !(sel_wire[12..12]) & data_wire[1646..1646]; - l3_w14_n0_mux_dataout = sel_wire[12..12] & data_wire[1649..1649] # !(sel_wire[12..12]) & data_wire[1648..1648]; - l3_w14_n1_mux_dataout = sel_wire[12..12] & data_wire[1651..1651] # !(sel_wire[12..12]) & data_wire[1650..1650]; - l3_w14_n2_mux_dataout = sel_wire[12..12] & data_wire[1653..1653] # !(sel_wire[12..12]) & data_wire[1652..1652]; - l3_w14_n3_mux_dataout = sel_wire[12..12] & data_wire[1655..1655] # !(sel_wire[12..12]) & data_wire[1654..1654]; - l3_w15_n0_mux_dataout = sel_wire[12..12] & data_wire[1657..1657] # !(sel_wire[12..12]) & data_wire[1656..1656]; - l3_w15_n1_mux_dataout = sel_wire[12..12] & data_wire[1659..1659] # !(sel_wire[12..12]) & data_wire[1658..1658]; - l3_w15_n2_mux_dataout = sel_wire[12..12] & data_wire[1661..1661] # !(sel_wire[12..12]) & data_wire[1660..1660]; - l3_w15_n3_mux_dataout = sel_wire[12..12] & data_wire[1663..1663] # !(sel_wire[12..12]) & data_wire[1662..1662]; - l3_w16_n0_mux_dataout = sel_wire[12..12] & data_wire[1665..1665] # !(sel_wire[12..12]) & data_wire[1664..1664]; - l3_w16_n1_mux_dataout = sel_wire[12..12] & data_wire[1667..1667] # !(sel_wire[12..12]) & data_wire[1666..1666]; - l3_w16_n2_mux_dataout = sel_wire[12..12] & data_wire[1669..1669] # !(sel_wire[12..12]) & data_wire[1668..1668]; - l3_w16_n3_mux_dataout = sel_wire[12..12] & data_wire[1671..1671] # !(sel_wire[12..12]) & data_wire[1670..1670]; - l3_w17_n0_mux_dataout = sel_wire[12..12] & data_wire[1673..1673] # !(sel_wire[12..12]) & data_wire[1672..1672]; - l3_w17_n1_mux_dataout = sel_wire[12..12] & data_wire[1675..1675] # !(sel_wire[12..12]) & data_wire[1674..1674]; - l3_w17_n2_mux_dataout = sel_wire[12..12] & data_wire[1677..1677] # !(sel_wire[12..12]) & data_wire[1676..1676]; - l3_w17_n3_mux_dataout = sel_wire[12..12] & data_wire[1679..1679] # !(sel_wire[12..12]) & data_wire[1678..1678]; - l3_w18_n0_mux_dataout = sel_wire[12..12] & data_wire[1681..1681] # !(sel_wire[12..12]) & data_wire[1680..1680]; - l3_w18_n1_mux_dataout = sel_wire[12..12] & data_wire[1683..1683] # !(sel_wire[12..12]) & data_wire[1682..1682]; - l3_w18_n2_mux_dataout = sel_wire[12..12] & data_wire[1685..1685] # !(sel_wire[12..12]) & data_wire[1684..1684]; - l3_w18_n3_mux_dataout = sel_wire[12..12] & data_wire[1687..1687] # !(sel_wire[12..12]) & data_wire[1686..1686]; - l3_w19_n0_mux_dataout = sel_wire[12..12] & data_wire[1689..1689] # !(sel_wire[12..12]) & data_wire[1688..1688]; - l3_w19_n1_mux_dataout = sel_wire[12..12] & data_wire[1691..1691] # !(sel_wire[12..12]) & data_wire[1690..1690]; - l3_w19_n2_mux_dataout = sel_wire[12..12] & data_wire[1693..1693] # !(sel_wire[12..12]) & data_wire[1692..1692]; - l3_w19_n3_mux_dataout = sel_wire[12..12] & data_wire[1695..1695] # !(sel_wire[12..12]) & data_wire[1694..1694]; - l3_w1_n0_mux_dataout = sel_wire[12..12] & data_wire[1545..1545] # !(sel_wire[12..12]) & data_wire[1544..1544]; - l3_w1_n1_mux_dataout = sel_wire[12..12] & data_wire[1547..1547] # !(sel_wire[12..12]) & data_wire[1546..1546]; - l3_w1_n2_mux_dataout = sel_wire[12..12] & data_wire[1549..1549] # !(sel_wire[12..12]) & data_wire[1548..1548]; - l3_w1_n3_mux_dataout = sel_wire[12..12] & data_wire[1551..1551] # !(sel_wire[12..12]) & data_wire[1550..1550]; - l3_w20_n0_mux_dataout = sel_wire[12..12] & data_wire[1697..1697] # !(sel_wire[12..12]) & data_wire[1696..1696]; - l3_w20_n1_mux_dataout = sel_wire[12..12] & data_wire[1699..1699] # !(sel_wire[12..12]) & data_wire[1698..1698]; - l3_w20_n2_mux_dataout = sel_wire[12..12] & data_wire[1701..1701] # !(sel_wire[12..12]) & data_wire[1700..1700]; - l3_w20_n3_mux_dataout = sel_wire[12..12] & data_wire[1703..1703] # !(sel_wire[12..12]) & data_wire[1702..1702]; - l3_w21_n0_mux_dataout = sel_wire[12..12] & data_wire[1705..1705] # !(sel_wire[12..12]) & data_wire[1704..1704]; - l3_w21_n1_mux_dataout = sel_wire[12..12] & data_wire[1707..1707] # !(sel_wire[12..12]) & data_wire[1706..1706]; - l3_w21_n2_mux_dataout = sel_wire[12..12] & data_wire[1709..1709] # !(sel_wire[12..12]) & data_wire[1708..1708]; - l3_w21_n3_mux_dataout = sel_wire[12..12] & data_wire[1711..1711] # !(sel_wire[12..12]) & data_wire[1710..1710]; - l3_w22_n0_mux_dataout = sel_wire[12..12] & data_wire[1713..1713] # !(sel_wire[12..12]) & data_wire[1712..1712]; - l3_w22_n1_mux_dataout = sel_wire[12..12] & data_wire[1715..1715] # !(sel_wire[12..12]) & data_wire[1714..1714]; - l3_w22_n2_mux_dataout = sel_wire[12..12] & data_wire[1717..1717] # !(sel_wire[12..12]) & data_wire[1716..1716]; - l3_w22_n3_mux_dataout = sel_wire[12..12] & data_wire[1719..1719] # !(sel_wire[12..12]) & data_wire[1718..1718]; - l3_w23_n0_mux_dataout = sel_wire[12..12] & data_wire[1721..1721] # !(sel_wire[12..12]) & data_wire[1720..1720]; - l3_w23_n1_mux_dataout = sel_wire[12..12] & data_wire[1723..1723] # !(sel_wire[12..12]) & data_wire[1722..1722]; - l3_w23_n2_mux_dataout = sel_wire[12..12] & data_wire[1725..1725] # !(sel_wire[12..12]) & data_wire[1724..1724]; - l3_w23_n3_mux_dataout = sel_wire[12..12] & data_wire[1727..1727] # !(sel_wire[12..12]) & data_wire[1726..1726]; - l3_w24_n0_mux_dataout = sel_wire[12..12] & data_wire[1729..1729] # !(sel_wire[12..12]) & data_wire[1728..1728]; - l3_w24_n1_mux_dataout = sel_wire[12..12] & data_wire[1731..1731] # !(sel_wire[12..12]) & data_wire[1730..1730]; - l3_w24_n2_mux_dataout = sel_wire[12..12] & data_wire[1733..1733] # !(sel_wire[12..12]) & data_wire[1732..1732]; - l3_w24_n3_mux_dataout = sel_wire[12..12] & data_wire[1735..1735] # !(sel_wire[12..12]) & data_wire[1734..1734]; - l3_w25_n0_mux_dataout = sel_wire[12..12] & data_wire[1737..1737] # !(sel_wire[12..12]) & data_wire[1736..1736]; - l3_w25_n1_mux_dataout = sel_wire[12..12] & data_wire[1739..1739] # !(sel_wire[12..12]) & data_wire[1738..1738]; - l3_w25_n2_mux_dataout = sel_wire[12..12] & data_wire[1741..1741] # !(sel_wire[12..12]) & data_wire[1740..1740]; - l3_w25_n3_mux_dataout = sel_wire[12..12] & data_wire[1743..1743] # !(sel_wire[12..12]) & data_wire[1742..1742]; - l3_w26_n0_mux_dataout = sel_wire[12..12] & data_wire[1745..1745] # !(sel_wire[12..12]) & data_wire[1744..1744]; - l3_w26_n1_mux_dataout = sel_wire[12..12] & data_wire[1747..1747] # !(sel_wire[12..12]) & data_wire[1746..1746]; - l3_w26_n2_mux_dataout = sel_wire[12..12] & data_wire[1749..1749] # !(sel_wire[12..12]) & data_wire[1748..1748]; - l3_w26_n3_mux_dataout = sel_wire[12..12] & data_wire[1751..1751] # !(sel_wire[12..12]) & data_wire[1750..1750]; - l3_w27_n0_mux_dataout = sel_wire[12..12] & data_wire[1753..1753] # !(sel_wire[12..12]) & data_wire[1752..1752]; - l3_w27_n1_mux_dataout = sel_wire[12..12] & data_wire[1755..1755] # !(sel_wire[12..12]) & data_wire[1754..1754]; - l3_w27_n2_mux_dataout = sel_wire[12..12] & data_wire[1757..1757] # !(sel_wire[12..12]) & data_wire[1756..1756]; - l3_w27_n3_mux_dataout = sel_wire[12..12] & data_wire[1759..1759] # !(sel_wire[12..12]) & data_wire[1758..1758]; - l3_w28_n0_mux_dataout = sel_wire[12..12] & data_wire[1761..1761] # !(sel_wire[12..12]) & data_wire[1760..1760]; - l3_w28_n1_mux_dataout = sel_wire[12..12] & data_wire[1763..1763] # !(sel_wire[12..12]) & data_wire[1762..1762]; - l3_w28_n2_mux_dataout = sel_wire[12..12] & data_wire[1765..1765] # !(sel_wire[12..12]) & data_wire[1764..1764]; - l3_w28_n3_mux_dataout = sel_wire[12..12] & data_wire[1767..1767] # !(sel_wire[12..12]) & data_wire[1766..1766]; - l3_w29_n0_mux_dataout = sel_wire[12..12] & data_wire[1769..1769] # !(sel_wire[12..12]) & data_wire[1768..1768]; - l3_w29_n1_mux_dataout = sel_wire[12..12] & data_wire[1771..1771] # !(sel_wire[12..12]) & data_wire[1770..1770]; - l3_w29_n2_mux_dataout = sel_wire[12..12] & data_wire[1773..1773] # !(sel_wire[12..12]) & data_wire[1772..1772]; - l3_w29_n3_mux_dataout = sel_wire[12..12] & data_wire[1775..1775] # !(sel_wire[12..12]) & data_wire[1774..1774]; - l3_w2_n0_mux_dataout = sel_wire[12..12] & data_wire[1553..1553] # !(sel_wire[12..12]) & data_wire[1552..1552]; - l3_w2_n1_mux_dataout = sel_wire[12..12] & data_wire[1555..1555] # !(sel_wire[12..12]) & data_wire[1554..1554]; - l3_w2_n2_mux_dataout = sel_wire[12..12] & data_wire[1557..1557] # !(sel_wire[12..12]) & data_wire[1556..1556]; - l3_w2_n3_mux_dataout = sel_wire[12..12] & data_wire[1559..1559] # !(sel_wire[12..12]) & data_wire[1558..1558]; - l3_w30_n0_mux_dataout = sel_wire[12..12] & data_wire[1777..1777] # !(sel_wire[12..12]) & data_wire[1776..1776]; - l3_w30_n1_mux_dataout = sel_wire[12..12] & data_wire[1779..1779] # !(sel_wire[12..12]) & data_wire[1778..1778]; - l3_w30_n2_mux_dataout = sel_wire[12..12] & data_wire[1781..1781] # !(sel_wire[12..12]) & data_wire[1780..1780]; - l3_w30_n3_mux_dataout = sel_wire[12..12] & data_wire[1783..1783] # !(sel_wire[12..12]) & data_wire[1782..1782]; - l3_w31_n0_mux_dataout = sel_wire[12..12] & data_wire[1785..1785] # !(sel_wire[12..12]) & data_wire[1784..1784]; - l3_w31_n1_mux_dataout = sel_wire[12..12] & data_wire[1787..1787] # !(sel_wire[12..12]) & data_wire[1786..1786]; - l3_w31_n2_mux_dataout = sel_wire[12..12] & data_wire[1789..1789] # !(sel_wire[12..12]) & data_wire[1788..1788]; - l3_w31_n3_mux_dataout = sel_wire[12..12] & data_wire[1791..1791] # !(sel_wire[12..12]) & data_wire[1790..1790]; - l3_w3_n0_mux_dataout = sel_wire[12..12] & data_wire[1561..1561] # !(sel_wire[12..12]) & data_wire[1560..1560]; - l3_w3_n1_mux_dataout = sel_wire[12..12] & data_wire[1563..1563] # !(sel_wire[12..12]) & data_wire[1562..1562]; - l3_w3_n2_mux_dataout = sel_wire[12..12] & data_wire[1565..1565] # !(sel_wire[12..12]) & data_wire[1564..1564]; - l3_w3_n3_mux_dataout = sel_wire[12..12] & data_wire[1567..1567] # !(sel_wire[12..12]) & data_wire[1566..1566]; - l3_w4_n0_mux_dataout = sel_wire[12..12] & data_wire[1569..1569] # !(sel_wire[12..12]) & data_wire[1568..1568]; - l3_w4_n1_mux_dataout = sel_wire[12..12] & data_wire[1571..1571] # !(sel_wire[12..12]) & data_wire[1570..1570]; - l3_w4_n2_mux_dataout = sel_wire[12..12] & data_wire[1573..1573] # !(sel_wire[12..12]) & data_wire[1572..1572]; - l3_w4_n3_mux_dataout = sel_wire[12..12] & data_wire[1575..1575] # !(sel_wire[12..12]) & data_wire[1574..1574]; - l3_w5_n0_mux_dataout = sel_wire[12..12] & data_wire[1577..1577] # !(sel_wire[12..12]) & data_wire[1576..1576]; - l3_w5_n1_mux_dataout = sel_wire[12..12] & data_wire[1579..1579] # !(sel_wire[12..12]) & data_wire[1578..1578]; - l3_w5_n2_mux_dataout = sel_wire[12..12] & data_wire[1581..1581] # !(sel_wire[12..12]) & data_wire[1580..1580]; - l3_w5_n3_mux_dataout = sel_wire[12..12] & data_wire[1583..1583] # !(sel_wire[12..12]) & data_wire[1582..1582]; - l3_w6_n0_mux_dataout = sel_wire[12..12] & data_wire[1585..1585] # !(sel_wire[12..12]) & data_wire[1584..1584]; - l3_w6_n1_mux_dataout = sel_wire[12..12] & data_wire[1587..1587] # !(sel_wire[12..12]) & data_wire[1586..1586]; - l3_w6_n2_mux_dataout = sel_wire[12..12] & data_wire[1589..1589] # !(sel_wire[12..12]) & data_wire[1588..1588]; - l3_w6_n3_mux_dataout = sel_wire[12..12] & data_wire[1591..1591] # !(sel_wire[12..12]) & data_wire[1590..1590]; - l3_w7_n0_mux_dataout = sel_wire[12..12] & data_wire[1593..1593] # !(sel_wire[12..12]) & data_wire[1592..1592]; - l3_w7_n1_mux_dataout = sel_wire[12..12] & data_wire[1595..1595] # !(sel_wire[12..12]) & data_wire[1594..1594]; - l3_w7_n2_mux_dataout = sel_wire[12..12] & data_wire[1597..1597] # !(sel_wire[12..12]) & data_wire[1596..1596]; - l3_w7_n3_mux_dataout = sel_wire[12..12] & data_wire[1599..1599] # !(sel_wire[12..12]) & data_wire[1598..1598]; - l3_w8_n0_mux_dataout = sel_wire[12..12] & data_wire[1601..1601] # !(sel_wire[12..12]) & data_wire[1600..1600]; - l3_w8_n1_mux_dataout = sel_wire[12..12] & data_wire[1603..1603] # !(sel_wire[12..12]) & data_wire[1602..1602]; - l3_w8_n2_mux_dataout = sel_wire[12..12] & data_wire[1605..1605] # !(sel_wire[12..12]) & data_wire[1604..1604]; - l3_w8_n3_mux_dataout = sel_wire[12..12] & data_wire[1607..1607] # !(sel_wire[12..12]) & data_wire[1606..1606]; - l3_w9_n0_mux_dataout = sel_wire[12..12] & data_wire[1609..1609] # !(sel_wire[12..12]) & data_wire[1608..1608]; - l3_w9_n1_mux_dataout = sel_wire[12..12] & data_wire[1611..1611] # !(sel_wire[12..12]) & data_wire[1610..1610]; - l3_w9_n2_mux_dataout = sel_wire[12..12] & data_wire[1613..1613] # !(sel_wire[12..12]) & data_wire[1612..1612]; - l3_w9_n3_mux_dataout = sel_wire[12..12] & data_wire[1615..1615] # !(sel_wire[12..12]) & data_wire[1614..1614]; - l4_w0_n0_mux_dataout = sel_wire[18..18] & data_wire[1793..1793] # !(sel_wire[18..18]) & data_wire[1792..1792]; - l4_w0_n1_mux_dataout = sel_wire[18..18] & data_wire[1795..1795] # !(sel_wire[18..18]) & data_wire[1794..1794]; - l4_w10_n0_mux_dataout = sel_wire[18..18] & data_wire[1833..1833] # !(sel_wire[18..18]) & data_wire[1832..1832]; - l4_w10_n1_mux_dataout = sel_wire[18..18] & data_wire[1835..1835] # !(sel_wire[18..18]) & data_wire[1834..1834]; - l4_w11_n0_mux_dataout = sel_wire[18..18] & data_wire[1837..1837] # !(sel_wire[18..18]) & data_wire[1836..1836]; - l4_w11_n1_mux_dataout = sel_wire[18..18] & data_wire[1839..1839] # !(sel_wire[18..18]) & data_wire[1838..1838]; - l4_w12_n0_mux_dataout = sel_wire[18..18] & data_wire[1841..1841] # !(sel_wire[18..18]) & data_wire[1840..1840]; - l4_w12_n1_mux_dataout = sel_wire[18..18] & data_wire[1843..1843] # !(sel_wire[18..18]) & data_wire[1842..1842]; - l4_w13_n0_mux_dataout = sel_wire[18..18] & data_wire[1845..1845] # !(sel_wire[18..18]) & data_wire[1844..1844]; - l4_w13_n1_mux_dataout = sel_wire[18..18] & data_wire[1847..1847] # !(sel_wire[18..18]) & data_wire[1846..1846]; - l4_w14_n0_mux_dataout = sel_wire[18..18] & data_wire[1849..1849] # !(sel_wire[18..18]) & data_wire[1848..1848]; - l4_w14_n1_mux_dataout = sel_wire[18..18] & data_wire[1851..1851] # !(sel_wire[18..18]) & data_wire[1850..1850]; - l4_w15_n0_mux_dataout = sel_wire[18..18] & data_wire[1853..1853] # !(sel_wire[18..18]) & data_wire[1852..1852]; - l4_w15_n1_mux_dataout = sel_wire[18..18] & data_wire[1855..1855] # !(sel_wire[18..18]) & data_wire[1854..1854]; - l4_w16_n0_mux_dataout = sel_wire[18..18] & data_wire[1857..1857] # !(sel_wire[18..18]) & data_wire[1856..1856]; - l4_w16_n1_mux_dataout = sel_wire[18..18] & data_wire[1859..1859] # !(sel_wire[18..18]) & data_wire[1858..1858]; - l4_w17_n0_mux_dataout = sel_wire[18..18] & data_wire[1861..1861] # !(sel_wire[18..18]) & data_wire[1860..1860]; - l4_w17_n1_mux_dataout = sel_wire[18..18] & data_wire[1863..1863] # !(sel_wire[18..18]) & data_wire[1862..1862]; - l4_w18_n0_mux_dataout = sel_wire[18..18] & data_wire[1865..1865] # !(sel_wire[18..18]) & data_wire[1864..1864]; - l4_w18_n1_mux_dataout = sel_wire[18..18] & data_wire[1867..1867] # !(sel_wire[18..18]) & data_wire[1866..1866]; - l4_w19_n0_mux_dataout = sel_wire[18..18] & data_wire[1869..1869] # !(sel_wire[18..18]) & data_wire[1868..1868]; - l4_w19_n1_mux_dataout = sel_wire[18..18] & data_wire[1871..1871] # !(sel_wire[18..18]) & data_wire[1870..1870]; - l4_w1_n0_mux_dataout = sel_wire[18..18] & data_wire[1797..1797] # !(sel_wire[18..18]) & data_wire[1796..1796]; - l4_w1_n1_mux_dataout = sel_wire[18..18] & data_wire[1799..1799] # !(sel_wire[18..18]) & data_wire[1798..1798]; - l4_w20_n0_mux_dataout = sel_wire[18..18] & data_wire[1873..1873] # !(sel_wire[18..18]) & data_wire[1872..1872]; - l4_w20_n1_mux_dataout = sel_wire[18..18] & data_wire[1875..1875] # !(sel_wire[18..18]) & data_wire[1874..1874]; - l4_w21_n0_mux_dataout = sel_wire[18..18] & data_wire[1877..1877] # !(sel_wire[18..18]) & data_wire[1876..1876]; - l4_w21_n1_mux_dataout = sel_wire[18..18] & data_wire[1879..1879] # !(sel_wire[18..18]) & data_wire[1878..1878]; - l4_w22_n0_mux_dataout = sel_wire[18..18] & data_wire[1881..1881] # !(sel_wire[18..18]) & data_wire[1880..1880]; - l4_w22_n1_mux_dataout = sel_wire[18..18] & data_wire[1883..1883] # !(sel_wire[18..18]) & data_wire[1882..1882]; - l4_w23_n0_mux_dataout = sel_wire[18..18] & data_wire[1885..1885] # !(sel_wire[18..18]) & data_wire[1884..1884]; - l4_w23_n1_mux_dataout = sel_wire[18..18] & data_wire[1887..1887] # !(sel_wire[18..18]) & data_wire[1886..1886]; - l4_w24_n0_mux_dataout = sel_wire[18..18] & data_wire[1889..1889] # !(sel_wire[18..18]) & data_wire[1888..1888]; - l4_w24_n1_mux_dataout = sel_wire[18..18] & data_wire[1891..1891] # !(sel_wire[18..18]) & data_wire[1890..1890]; - l4_w25_n0_mux_dataout = sel_wire[18..18] & data_wire[1893..1893] # !(sel_wire[18..18]) & data_wire[1892..1892]; - l4_w25_n1_mux_dataout = sel_wire[18..18] & data_wire[1895..1895] # !(sel_wire[18..18]) & data_wire[1894..1894]; - l4_w26_n0_mux_dataout = sel_wire[18..18] & data_wire[1897..1897] # !(sel_wire[18..18]) & data_wire[1896..1896]; - l4_w26_n1_mux_dataout = sel_wire[18..18] & data_wire[1899..1899] # !(sel_wire[18..18]) & data_wire[1898..1898]; - l4_w27_n0_mux_dataout = sel_wire[18..18] & data_wire[1901..1901] # !(sel_wire[18..18]) & data_wire[1900..1900]; - l4_w27_n1_mux_dataout = sel_wire[18..18] & data_wire[1903..1903] # !(sel_wire[18..18]) & data_wire[1902..1902]; - l4_w28_n0_mux_dataout = sel_wire[18..18] & data_wire[1905..1905] # !(sel_wire[18..18]) & data_wire[1904..1904]; - l4_w28_n1_mux_dataout = sel_wire[18..18] & data_wire[1907..1907] # !(sel_wire[18..18]) & data_wire[1906..1906]; - l4_w29_n0_mux_dataout = sel_wire[18..18] & data_wire[1909..1909] # !(sel_wire[18..18]) & data_wire[1908..1908]; - l4_w29_n1_mux_dataout = sel_wire[18..18] & data_wire[1911..1911] # !(sel_wire[18..18]) & data_wire[1910..1910]; - l4_w2_n0_mux_dataout = sel_wire[18..18] & data_wire[1801..1801] # !(sel_wire[18..18]) & data_wire[1800..1800]; - l4_w2_n1_mux_dataout = sel_wire[18..18] & data_wire[1803..1803] # !(sel_wire[18..18]) & data_wire[1802..1802]; - l4_w30_n0_mux_dataout = sel_wire[18..18] & data_wire[1913..1913] # !(sel_wire[18..18]) & data_wire[1912..1912]; - l4_w30_n1_mux_dataout = sel_wire[18..18] & data_wire[1915..1915] # !(sel_wire[18..18]) & data_wire[1914..1914]; - l4_w31_n0_mux_dataout = sel_wire[18..18] & data_wire[1917..1917] # !(sel_wire[18..18]) & data_wire[1916..1916]; - l4_w31_n1_mux_dataout = sel_wire[18..18] & data_wire[1919..1919] # !(sel_wire[18..18]) & data_wire[1918..1918]; - l4_w3_n0_mux_dataout = sel_wire[18..18] & data_wire[1805..1805] # !(sel_wire[18..18]) & data_wire[1804..1804]; - l4_w3_n1_mux_dataout = sel_wire[18..18] & data_wire[1807..1807] # !(sel_wire[18..18]) & data_wire[1806..1806]; - l4_w4_n0_mux_dataout = sel_wire[18..18] & data_wire[1809..1809] # !(sel_wire[18..18]) & data_wire[1808..1808]; - l4_w4_n1_mux_dataout = sel_wire[18..18] & data_wire[1811..1811] # !(sel_wire[18..18]) & data_wire[1810..1810]; - l4_w5_n0_mux_dataout = sel_wire[18..18] & data_wire[1813..1813] # !(sel_wire[18..18]) & data_wire[1812..1812]; - l4_w5_n1_mux_dataout = sel_wire[18..18] & data_wire[1815..1815] # !(sel_wire[18..18]) & data_wire[1814..1814]; - l4_w6_n0_mux_dataout = sel_wire[18..18] & data_wire[1817..1817] # !(sel_wire[18..18]) & data_wire[1816..1816]; - l4_w6_n1_mux_dataout = sel_wire[18..18] & data_wire[1819..1819] # !(sel_wire[18..18]) & data_wire[1818..1818]; - l4_w7_n0_mux_dataout = sel_wire[18..18] & data_wire[1821..1821] # !(sel_wire[18..18]) & data_wire[1820..1820]; - l4_w7_n1_mux_dataout = sel_wire[18..18] & data_wire[1823..1823] # !(sel_wire[18..18]) & data_wire[1822..1822]; - l4_w8_n0_mux_dataout = sel_wire[18..18] & data_wire[1825..1825] # !(sel_wire[18..18]) & data_wire[1824..1824]; - l4_w8_n1_mux_dataout = sel_wire[18..18] & data_wire[1827..1827] # !(sel_wire[18..18]) & data_wire[1826..1826]; - l4_w9_n0_mux_dataout = sel_wire[18..18] & data_wire[1829..1829] # !(sel_wire[18..18]) & data_wire[1828..1828]; - l4_w9_n1_mux_dataout = sel_wire[18..18] & data_wire[1831..1831] # !(sel_wire[18..18]) & data_wire[1830..1830]; - l5_w0_n0_mux_dataout = sel_wire[24..24] & data_wire[1921..1921] # !(sel_wire[24..24]) & data_wire[1920..1920]; - l5_w10_n0_mux_dataout = sel_wire[24..24] & data_wire[1941..1941] # !(sel_wire[24..24]) & data_wire[1940..1940]; - l5_w11_n0_mux_dataout = sel_wire[24..24] & data_wire[1943..1943] # !(sel_wire[24..24]) & data_wire[1942..1942]; - l5_w12_n0_mux_dataout = sel_wire[24..24] & data_wire[1945..1945] # !(sel_wire[24..24]) & data_wire[1944..1944]; - l5_w13_n0_mux_dataout = sel_wire[24..24] & data_wire[1947..1947] # !(sel_wire[24..24]) & data_wire[1946..1946]; - l5_w14_n0_mux_dataout = sel_wire[24..24] & data_wire[1949..1949] # !(sel_wire[24..24]) & data_wire[1948..1948]; - l5_w15_n0_mux_dataout = sel_wire[24..24] & data_wire[1951..1951] # !(sel_wire[24..24]) & data_wire[1950..1950]; - l5_w16_n0_mux_dataout = sel_wire[24..24] & data_wire[1953..1953] # !(sel_wire[24..24]) & data_wire[1952..1952]; - l5_w17_n0_mux_dataout = sel_wire[24..24] & data_wire[1955..1955] # !(sel_wire[24..24]) & data_wire[1954..1954]; - l5_w18_n0_mux_dataout = sel_wire[24..24] & data_wire[1957..1957] # !(sel_wire[24..24]) & data_wire[1956..1956]; - l5_w19_n0_mux_dataout = sel_wire[24..24] & data_wire[1959..1959] # !(sel_wire[24..24]) & data_wire[1958..1958]; - l5_w1_n0_mux_dataout = sel_wire[24..24] & data_wire[1923..1923] # !(sel_wire[24..24]) & data_wire[1922..1922]; - l5_w20_n0_mux_dataout = sel_wire[24..24] & data_wire[1961..1961] # !(sel_wire[24..24]) & data_wire[1960..1960]; - l5_w21_n0_mux_dataout = sel_wire[24..24] & data_wire[1963..1963] # !(sel_wire[24..24]) & data_wire[1962..1962]; - l5_w22_n0_mux_dataout = sel_wire[24..24] & data_wire[1965..1965] # !(sel_wire[24..24]) & data_wire[1964..1964]; - l5_w23_n0_mux_dataout = sel_wire[24..24] & data_wire[1967..1967] # !(sel_wire[24..24]) & data_wire[1966..1966]; - l5_w24_n0_mux_dataout = sel_wire[24..24] & data_wire[1969..1969] # !(sel_wire[24..24]) & data_wire[1968..1968]; - l5_w25_n0_mux_dataout = sel_wire[24..24] & data_wire[1971..1971] # !(sel_wire[24..24]) & data_wire[1970..1970]; - l5_w26_n0_mux_dataout = sel_wire[24..24] & data_wire[1973..1973] # !(sel_wire[24..24]) & data_wire[1972..1972]; - l5_w27_n0_mux_dataout = sel_wire[24..24] & data_wire[1975..1975] # !(sel_wire[24..24]) & data_wire[1974..1974]; - l5_w28_n0_mux_dataout = sel_wire[24..24] & data_wire[1977..1977] # !(sel_wire[24..24]) & data_wire[1976..1976]; - l5_w29_n0_mux_dataout = sel_wire[24..24] & data_wire[1979..1979] # !(sel_wire[24..24]) & data_wire[1978..1978]; - l5_w2_n0_mux_dataout = sel_wire[24..24] & data_wire[1925..1925] # !(sel_wire[24..24]) & data_wire[1924..1924]; - l5_w30_n0_mux_dataout = sel_wire[24..24] & data_wire[1981..1981] # !(sel_wire[24..24]) & data_wire[1980..1980]; - l5_w31_n0_mux_dataout = sel_wire[24..24] & data_wire[1983..1983] # !(sel_wire[24..24]) & data_wire[1982..1982]; - l5_w3_n0_mux_dataout = sel_wire[24..24] & data_wire[1927..1927] # !(sel_wire[24..24]) & data_wire[1926..1926]; - l5_w4_n0_mux_dataout = sel_wire[24..24] & data_wire[1929..1929] # !(sel_wire[24..24]) & data_wire[1928..1928]; - l5_w5_n0_mux_dataout = sel_wire[24..24] & data_wire[1931..1931] # !(sel_wire[24..24]) & data_wire[1930..1930]; - l5_w6_n0_mux_dataout = sel_wire[24..24] & data_wire[1933..1933] # !(sel_wire[24..24]) & data_wire[1932..1932]; - l5_w7_n0_mux_dataout = sel_wire[24..24] & data_wire[1935..1935] # !(sel_wire[24..24]) & data_wire[1934..1934]; - l5_w8_n0_mux_dataout = sel_wire[24..24] & data_wire[1937..1937] # !(sel_wire[24..24]) & data_wire[1936..1936]; - l5_w9_n0_mux_dataout = sel_wire[24..24] & data_wire[1939..1939] # !(sel_wire[24..24]) & data_wire[1938..1938]; - data_wire[] = ( l4_w31_n1_mux_dataout, l4_w31_n0_mux_dataout, l4_w30_n1_mux_dataout, l4_w30_n0_mux_dataout, l4_w29_n1_mux_dataout, l4_w29_n0_mux_dataout, l4_w28_n1_mux_dataout, l4_w28_n0_mux_dataout, l4_w27_n1_mux_dataout, l4_w27_n0_mux_dataout, l4_w26_n1_mux_dataout, l4_w26_n0_mux_dataout, l4_w25_n1_mux_dataout, l4_w25_n0_mux_dataout, l4_w24_n1_mux_dataout, l4_w24_n0_mux_dataout, l4_w23_n1_mux_dataout, l4_w23_n0_mux_dataout, l4_w22_n1_mux_dataout, l4_w22_n0_mux_dataout, l4_w21_n1_mux_dataout, l4_w21_n0_mux_dataout, l4_w20_n1_mux_dataout, l4_w20_n0_mux_dataout, l4_w19_n1_mux_dataout, l4_w19_n0_mux_dataout, l4_w18_n1_mux_dataout, l4_w18_n0_mux_dataout, l4_w17_n1_mux_dataout, l4_w17_n0_mux_dataout, l4_w16_n1_mux_dataout, l4_w16_n0_mux_dataout, l4_w15_n1_mux_dataout, l4_w15_n0_mux_dataout, l4_w14_n1_mux_dataout, l4_w14_n0_mux_dataout, l4_w13_n1_mux_dataout, l4_w13_n0_mux_dataout, l4_w12_n1_mux_dataout, l4_w12_n0_mux_dataout, l4_w11_n1_mux_dataout, l4_w11_n0_mux_dataout, l4_w10_n1_mux_dataout, l4_w10_n0_mux_dataout, l4_w9_n1_mux_dataout, l4_w9_n0_mux_dataout, l4_w8_n1_mux_dataout, l4_w8_n0_mux_dataout, l4_w7_n1_mux_dataout, l4_w7_n0_mux_dataout, l4_w6_n1_mux_dataout, l4_w6_n0_mux_dataout, l4_w5_n1_mux_dataout, l4_w5_n0_mux_dataout, l4_w4_n1_mux_dataout, l4_w4_n0_mux_dataout, l4_w3_n1_mux_dataout, l4_w3_n0_mux_dataout, l4_w2_n1_mux_dataout, l4_w2_n0_mux_dataout, l4_w1_n1_mux_dataout, l4_w1_n0_mux_dataout, l4_w0_n1_mux_dataout, l4_w0_n0_mux_dataout, l3_w31_n3_mux_dataout, l3_w31_n2_mux_dataout, l3_w31_n1_mux_dataout, l3_w31_n0_mux_dataout, l3_w30_n3_mux_dataout, l3_w30_n2_mux_dataout, l3_w30_n1_mux_dataout, l3_w30_n0_mux_dataout, l3_w29_n3_mux_dataout, l3_w29_n2_mux_dataout, l3_w29_n1_mux_dataout, l3_w29_n0_mux_dataout, l3_w28_n3_mux_dataout, l3_w28_n2_mux_dataout, l3_w28_n1_mux_dataout, l3_w28_n0_mux_dataout, l3_w27_n3_mux_dataout, l3_w27_n2_mux_dataout, l3_w27_n1_mux_dataout, l3_w27_n0_mux_dataout, l3_w26_n3_mux_dataout, l3_w26_n2_mux_dataout, l3_w26_n1_mux_dataout, l3_w26_n0_mux_dataout, l3_w25_n3_mux_dataout, l3_w25_n2_mux_dataout, l3_w25_n1_mux_dataout, l3_w25_n0_mux_dataout, l3_w24_n3_mux_dataout, l3_w24_n2_mux_dataout, l3_w24_n1_mux_dataout, l3_w24_n0_mux_dataout, l3_w23_n3_mux_dataout, l3_w23_n2_mux_dataout, l3_w23_n1_mux_dataout, l3_w23_n0_mux_dataout, l3_w22_n3_mux_dataout, l3_w22_n2_mux_dataout, l3_w22_n1_mux_dataout, l3_w22_n0_mux_dataout, l3_w21_n3_mux_dataout, l3_w21_n2_mux_dataout, l3_w21_n1_mux_dataout, l3_w21_n0_mux_dataout, l3_w20_n3_mux_dataout, l3_w20_n2_mux_dataout, l3_w20_n1_mux_dataout, l3_w20_n0_mux_dataout, l3_w19_n3_mux_dataout, l3_w19_n2_mux_dataout, l3_w19_n1_mux_dataout, l3_w19_n0_mux_dataout, l3_w18_n3_mux_dataout, l3_w18_n2_mux_dataout, l3_w18_n1_mux_dataout, l3_w18_n0_mux_dataout, l3_w17_n3_mux_dataout, l3_w17_n2_mux_dataout, l3_w17_n1_mux_dataout, l3_w17_n0_mux_dataout, l3_w16_n3_mux_dataout, l3_w16_n2_mux_dataout, l3_w16_n1_mux_dataout, l3_w16_n0_mux_dataout, l3_w15_n3_mux_dataout, l3_w15_n2_mux_dataout, l3_w15_n1_mux_dataout, l3_w15_n0_mux_dataout, l3_w14_n3_mux_dataout, l3_w14_n2_mux_dataout, l3_w14_n1_mux_dataout, l3_w14_n0_mux_dataout, l3_w13_n3_mux_dataout, l3_w13_n2_mux_dataout, l3_w13_n1_mux_dataout, l3_w13_n0_mux_dataout, l3_w12_n3_mux_dataout, l3_w12_n2_mux_dataout, l3_w12_n1_mux_dataout, l3_w12_n0_mux_dataout, l3_w11_n3_mux_dataout, l3_w11_n2_mux_dataout, l3_w11_n1_mux_dataout, l3_w11_n0_mux_dataout, l3_w10_n3_mux_dataout, l3_w10_n2_mux_dataout, l3_w10_n1_mux_dataout, l3_w10_n0_mux_dataout, l3_w9_n3_mux_dataout, l3_w9_n2_mux_dataout, l3_w9_n1_mux_dataout, l3_w9_n0_mux_dataout, l3_w8_n3_mux_dataout, l3_w8_n2_mux_dataout, l3_w8_n1_mux_dataout, l3_w8_n0_mux_dataout, l3_w7_n3_mux_dataout, l3_w7_n2_mux_dataout, l3_w7_n1_mux_dataout, l3_w7_n0_mux_dataout, l3_w6_n3_mux_dataout, l3_w6_n2_mux_dataout, l3_w6_n1_mux_dataout, l3_w6_n0_mux_dataout, l3_w5_n3_mux_dataout, l3_w5_n2_mux_dataout, l3_w5_n1_mux_dataout, l3_w5_n0_mux_dataout, l3_w4_n3_mux_dataout, l3_w4_n2_mux_dataout, l3_w4_n1_mux_dataout, l3_w4_n0_mux_dataout, l3_w3_n3_mux_dataout, l3_w3_n2_mux_dataout, l3_w3_n1_mux_dataout, l3_w3_n0_mux_dataout, l3_w2_n3_mux_dataout, l3_w2_n2_mux_dataout, l3_w2_n1_mux_dataout, l3_w2_n0_mux_dataout, l3_w1_n3_mux_dataout, l3_w1_n2_mux_dataout, l3_w1_n1_mux_dataout, l3_w1_n0_mux_dataout, l3_w0_n3_mux_dataout, l3_w0_n2_mux_dataout, l3_w0_n1_mux_dataout, l3_w0_n0_mux_dataout, l2_w31_n7_mux_dataout, l2_w31_n6_mux_dataout, l2_w31_n5_mux_dataout, l2_w31_n4_mux_dataout, l2_w31_n3_mux_dataout, l2_w31_n2_mux_dataout, l2_w31_n1_mux_dataout, l2_w31_n0_mux_dataout, l2_w30_n7_mux_dataout, l2_w30_n6_mux_dataout, l2_w30_n5_mux_dataout, l2_w30_n4_mux_dataout, l2_w30_n3_mux_dataout, l2_w30_n2_mux_dataout, l2_w30_n1_mux_dataout, l2_w30_n0_mux_dataout, l2_w29_n7_mux_dataout, l2_w29_n6_mux_dataout, l2_w29_n5_mux_dataout, l2_w29_n4_mux_dataout, l2_w29_n3_mux_dataout, l2_w29_n2_mux_dataout, l2_w29_n1_mux_dataout, l2_w29_n0_mux_dataout, l2_w28_n7_mux_dataout, l2_w28_n6_mux_dataout, l2_w28_n5_mux_dataout, l2_w28_n4_mux_dataout, l2_w28_n3_mux_dataout, l2_w28_n2_mux_dataout, l2_w28_n1_mux_dataout, l2_w28_n0_mux_dataout, l2_w27_n7_mux_dataout, l2_w27_n6_mux_dataout, l2_w27_n5_mux_dataout, l2_w27_n4_mux_dataout, l2_w27_n3_mux_dataout, l2_w27_n2_mux_dataout, l2_w27_n1_mux_dataout, l2_w27_n0_mux_dataout, l2_w26_n7_mux_dataout, l2_w26_n6_mux_dataout, l2_w26_n5_mux_dataout, l2_w26_n4_mux_dataout, l2_w26_n3_mux_dataout, l2_w26_n2_mux_dataout, l2_w26_n1_mux_dataout, l2_w26_n0_mux_dataout, l2_w25_n7_mux_dataout, l2_w25_n6_mux_dataout, l2_w25_n5_mux_dataout, l2_w25_n4_mux_dataout, l2_w25_n3_mux_dataout, l2_w25_n2_mux_dataout, l2_w25_n1_mux_dataout, l2_w25_n0_mux_dataout, l2_w24_n7_mux_dataout, l2_w24_n6_mux_dataout, l2_w24_n5_mux_dataout, l2_w24_n4_mux_dataout, l2_w24_n3_mux_dataout, l2_w24_n2_mux_dataout, l2_w24_n1_mux_dataout, l2_w24_n0_mux_dataout, l2_w23_n7_mux_dataout, l2_w23_n6_mux_dataout, l2_w23_n5_mux_dataout, l2_w23_n4_mux_dataout, l2_w23_n3_mux_dataout, l2_w23_n2_mux_dataout, l2_w23_n1_mux_dataout, l2_w23_n0_mux_dataout, l2_w22_n7_mux_dataout, l2_w22_n6_mux_dataout, l2_w22_n5_mux_dataout, l2_w22_n4_mux_dataout, l2_w22_n3_mux_dataout, l2_w22_n2_mux_dataout, l2_w22_n1_mux_dataout, l2_w22_n0_mux_dataout, l2_w21_n7_mux_dataout, l2_w21_n6_mux_dataout, l2_w21_n5_mux_dataout, l2_w21_n4_mux_dataout, l2_w21_n3_mux_dataout, l2_w21_n2_mux_dataout, l2_w21_n1_mux_dataout, l2_w21_n0_mux_dataout, l2_w20_n7_mux_dataout, l2_w20_n6_mux_dataout, l2_w20_n5_mux_dataout, l2_w20_n4_mux_dataout, l2_w20_n3_mux_dataout, l2_w20_n2_mux_dataout, l2_w20_n1_mux_dataout, l2_w20_n0_mux_dataout, l2_w19_n7_mux_dataout, l2_w19_n6_mux_dataout, l2_w19_n5_mux_dataout, l2_w19_n4_mux_dataout, l2_w19_n3_mux_dataout, l2_w19_n2_mux_dataout, l2_w19_n1_mux_dataout, l2_w19_n0_mux_dataout, l2_w18_n7_mux_dataout, l2_w18_n6_mux_dataout, l2_w18_n5_mux_dataout, l2_w18_n4_mux_dataout, l2_w18_n3_mux_dataout, l2_w18_n2_mux_dataout, l2_w18_n1_mux_dataout, l2_w18_n0_mux_dataout, l2_w17_n7_mux_dataout, l2_w17_n6_mux_dataout, l2_w17_n5_mux_dataout, l2_w17_n4_mux_dataout, l2_w17_n3_mux_dataout, l2_w17_n2_mux_dataout, l2_w17_n1_mux_dataout, l2_w17_n0_mux_dataout, l2_w16_n7_mux_dataout, l2_w16_n6_mux_dataout, l2_w16_n5_mux_dataout, l2_w16_n4_mux_dataout, l2_w16_n3_mux_dataout, l2_w16_n2_mux_dataout, l2_w16_n1_mux_dataout, l2_w16_n0_mux_dataout, l2_w15_n7_mux_dataout, l2_w15_n6_mux_dataout, l2_w15_n5_mux_dataout, l2_w15_n4_mux_dataout, l2_w15_n3_mux_dataout, l2_w15_n2_mux_dataout, l2_w15_n1_mux_dataout, l2_w15_n0_mux_dataout, l2_w14_n7_mux_dataout, l2_w14_n6_mux_dataout, l2_w14_n5_mux_dataout, l2_w14_n4_mux_dataout, l2_w14_n3_mux_dataout, l2_w14_n2_mux_dataout, l2_w14_n1_mux_dataout, l2_w14_n0_mux_dataout, l2_w13_n7_mux_dataout, l2_w13_n6_mux_dataout, l2_w13_n5_mux_dataout, l2_w13_n4_mux_dataout, l2_w13_n3_mux_dataout, l2_w13_n2_mux_dataout, l2_w13_n1_mux_dataout, l2_w13_n0_mux_dataout, l2_w12_n7_mux_dataout, l2_w12_n6_mux_dataout, l2_w12_n5_mux_dataout, l2_w12_n4_mux_dataout, l2_w12_n3_mux_dataout, l2_w12_n2_mux_dataout, l2_w12_n1_mux_dataout, l2_w12_n0_mux_dataout, l2_w11_n7_mux_dataout, l2_w11_n6_mux_dataout, l2_w11_n5_mux_dataout, l2_w11_n4_mux_dataout, l2_w11_n3_mux_dataout, l2_w11_n2_mux_dataout, l2_w11_n1_mux_dataout, l2_w11_n0_mux_dataout, l2_w10_n7_mux_dataout, l2_w10_n6_mux_dataout, l2_w10_n5_mux_dataout, l2_w10_n4_mux_dataout, l2_w10_n3_mux_dataout, l2_w10_n2_mux_dataout, l2_w10_n1_mux_dataout, l2_w10_n0_mux_dataout, l2_w9_n7_mux_dataout, l2_w9_n6_mux_dataout, l2_w9_n5_mux_dataout, l2_w9_n4_mux_dataout, l2_w9_n3_mux_dataout, l2_w9_n2_mux_dataout, l2_w9_n1_mux_dataout, l2_w9_n0_mux_dataout, l2_w8_n7_mux_dataout, l2_w8_n6_mux_dataout, l2_w8_n5_mux_dataout, l2_w8_n4_mux_dataout, l2_w8_n3_mux_dataout, l2_w8_n2_mux_dataout, l2_w8_n1_mux_dataout, l2_w8_n0_mux_dataout, l2_w7_n7_mux_dataout, l2_w7_n6_mux_dataout, l2_w7_n5_mux_dataout, l2_w7_n4_mux_dataout, l2_w7_n3_mux_dataout, l2_w7_n2_mux_dataout, l2_w7_n1_mux_dataout, l2_w7_n0_mux_dataout, l2_w6_n7_mux_dataout, l2_w6_n6_mux_dataout, l2_w6_n5_mux_dataout, l2_w6_n4_mux_dataout, l2_w6_n3_mux_dataout, l2_w6_n2_mux_dataout, l2_w6_n1_mux_dataout, l2_w6_n0_mux_dataout, l2_w5_n7_mux_dataout, l2_w5_n6_mux_dataout, l2_w5_n5_mux_dataout, l2_w5_n4_mux_dataout, l2_w5_n3_mux_dataout, l2_w5_n2_mux_dataout, l2_w5_n1_mux_dataout, l2_w5_n0_mux_dataout, l2_w4_n7_mux_dataout, l2_w4_n6_mux_dataout, l2_w4_n5_mux_dataout, l2_w4_n4_mux_dataout, l2_w4_n3_mux_dataout, l2_w4_n2_mux_dataout, l2_w4_n1_mux_dataout, l2_w4_n0_mux_dataout, l2_w3_n7_mux_dataout, l2_w3_n6_mux_dataout, l2_w3_n5_mux_dataout, l2_w3_n4_mux_dataout, l2_w3_n3_mux_dataout, l2_w3_n2_mux_dataout, l2_w3_n1_mux_dataout, l2_w3_n0_mux_dataout, l2_w2_n7_mux_dataout, l2_w2_n6_mux_dataout, l2_w2_n5_mux_dataout, l2_w2_n4_mux_dataout, l2_w2_n3_mux_dataout, l2_w2_n2_mux_dataout, l2_w2_n1_mux_dataout, l2_w2_n0_mux_dataout, l2_w1_n7_mux_dataout, l2_w1_n6_mux_dataout, l2_w1_n5_mux_dataout, l2_w1_n4_mux_dataout, l2_w1_n3_mux_dataout, l2_w1_n2_mux_dataout, l2_w1_n1_mux_dataout, l2_w1_n0_mux_dataout, l2_w0_n7_mux_dataout, l2_w0_n6_mux_dataout, l2_w0_n5_mux_dataout, l2_w0_n4_mux_dataout, l2_w0_n3_mux_dataout, l2_w0_n2_mux_dataout, l2_w0_n1_mux_dataout, l2_w0_n0_mux_dataout, l1_w31_n15_mux_dataout, l1_w31_n14_mux_dataout, l1_w31_n13_mux_dataout, l1_w31_n12_mux_dataout, l1_w31_n11_mux_dataout, l1_w31_n10_mux_dataout, l1_w31_n9_mux_dataout, l1_w31_n8_mux_dataout, l1_w31_n7_mux_dataout, l1_w31_n6_mux_dataout, l1_w31_n5_mux_dataout, l1_w31_n4_mux_dataout, l1_w31_n3_mux_dataout, l1_w31_n2_mux_dataout, l1_w31_n1_mux_dataout, l1_w31_n0_mux_dataout, l1_w30_n15_mux_dataout, l1_w30_n14_mux_dataout, l1_w30_n13_mux_dataout, l1_w30_n12_mux_dataout, l1_w30_n11_mux_dataout, l1_w30_n10_mux_dataout, l1_w30_n9_mux_dataout, l1_w30_n8_mux_dataout, l1_w30_n7_mux_dataout, l1_w30_n6_mux_dataout, l1_w30_n5_mux_dataout, l1_w30_n4_mux_dataout, l1_w30_n3_mux_dataout, l1_w30_n2_mux_dataout, l1_w30_n1_mux_dataout, l1_w30_n0_mux_dataout, l1_w29_n15_mux_dataout, l1_w29_n14_mux_dataout, l1_w29_n13_mux_dataout, l1_w29_n12_mux_dataout, l1_w29_n11_mux_dataout, l1_w29_n10_mux_dataout, l1_w29_n9_mux_dataout, l1_w29_n8_mux_dataout, l1_w29_n7_mux_dataout, l1_w29_n6_mux_dataout, l1_w29_n5_mux_dataout, l1_w29_n4_mux_dataout, l1_w29_n3_mux_dataout, l1_w29_n2_mux_dataout, l1_w29_n1_mux_dataout, l1_w29_n0_mux_dataout, l1_w28_n15_mux_dataout, l1_w28_n14_mux_dataout, l1_w28_n13_mux_dataout, l1_w28_n12_mux_dataout, l1_w28_n11_mux_dataout, l1_w28_n10_mux_dataout, l1_w28_n9_mux_dataout, l1_w28_n8_mux_dataout, l1_w28_n7_mux_dataout, l1_w28_n6_mux_dataout, l1_w28_n5_mux_dataout, l1_w28_n4_mux_dataout, l1_w28_n3_mux_dataout, l1_w28_n2_mux_dataout, l1_w28_n1_mux_dataout, l1_w28_n0_mux_dataout, l1_w27_n15_mux_dataout, l1_w27_n14_mux_dataout, l1_w27_n13_mux_dataout, l1_w27_n12_mux_dataout, l1_w27_n11_mux_dataout, l1_w27_n10_mux_dataout, l1_w27_n9_mux_dataout, l1_w27_n8_mux_dataout, l1_w27_n7_mux_dataout, l1_w27_n6_mux_dataout, l1_w27_n5_mux_dataout, l1_w27_n4_mux_dataout, l1_w27_n3_mux_dataout, l1_w27_n2_mux_dataout, l1_w27_n1_mux_dataout, l1_w27_n0_mux_dataout, l1_w26_n15_mux_dataout, l1_w26_n14_mux_dataout, l1_w26_n13_mux_dataout, l1_w26_n12_mux_dataout, l1_w26_n11_mux_dataout, l1_w26_n10_mux_dataout, l1_w26_n9_mux_dataout, l1_w26_n8_mux_dataout, l1_w26_n7_mux_dataout, l1_w26_n6_mux_dataout, l1_w26_n5_mux_dataout, l1_w26_n4_mux_dataout, l1_w26_n3_mux_dataout, l1_w26_n2_mux_dataout, l1_w26_n1_mux_dataout, l1_w26_n0_mux_dataout, l1_w25_n15_mux_dataout, l1_w25_n14_mux_dataout, l1_w25_n13_mux_dataout, l1_w25_n12_mux_dataout, l1_w25_n11_mux_dataout, l1_w25_n10_mux_dataout, l1_w25_n9_mux_dataout, l1_w25_n8_mux_dataout, l1_w25_n7_mux_dataout, l1_w25_n6_mux_dataout, l1_w25_n5_mux_dataout, l1_w25_n4_mux_dataout, l1_w25_n3_mux_dataout, l1_w25_n2_mux_dataout, l1_w25_n1_mux_dataout, l1_w25_n0_mux_dataout, l1_w24_n15_mux_dataout, l1_w24_n14_mux_dataout, l1_w24_n13_mux_dataout, l1_w24_n12_mux_dataout, l1_w24_n11_mux_dataout, l1_w24_n10_mux_dataout, l1_w24_n9_mux_dataout, l1_w24_n8_mux_dataout, l1_w24_n7_mux_dataout, l1_w24_n6_mux_dataout, l1_w24_n5_mux_dataout, l1_w24_n4_mux_dataout, l1_w24_n3_mux_dataout, l1_w24_n2_mux_dataout, l1_w24_n1_mux_dataout, l1_w24_n0_mux_dataout, l1_w23_n15_mux_dataout, l1_w23_n14_mux_dataout, l1_w23_n13_mux_dataout, l1_w23_n12_mux_dataout, l1_w23_n11_mux_dataout, l1_w23_n10_mux_dataout, l1_w23_n9_mux_dataout, l1_w23_n8_mux_dataout, l1_w23_n7_mux_dataout, l1_w23_n6_mux_dataout, l1_w23_n5_mux_dataout, l1_w23_n4_mux_dataout, l1_w23_n3_mux_dataout, l1_w23_n2_mux_dataout, l1_w23_n1_mux_dataout, l1_w23_n0_mux_dataout, l1_w22_n15_mux_dataout, l1_w22_n14_mux_dataout, l1_w22_n13_mux_dataout, l1_w22_n12_mux_dataout, l1_w22_n11_mux_dataout, l1_w22_n10_mux_dataout, l1_w22_n9_mux_dataout, l1_w22_n8_mux_dataout, l1_w22_n7_mux_dataout, l1_w22_n6_mux_dataout, l1_w22_n5_mux_dataout, l1_w22_n4_mux_dataout, l1_w22_n3_mux_dataout, l1_w22_n2_mux_dataout, l1_w22_n1_mux_dataout, l1_w22_n0_mux_dataout, l1_w21_n15_mux_dataout, l1_w21_n14_mux_dataout, l1_w21_n13_mux_dataout, l1_w21_n12_mux_dataout, l1_w21_n11_mux_dataout, l1_w21_n10_mux_dataout, l1_w21_n9_mux_dataout, l1_w21_n8_mux_dataout, l1_w21_n7_mux_dataout, l1_w21_n6_mux_dataout, l1_w21_n5_mux_dataout, l1_w21_n4_mux_dataout, l1_w21_n3_mux_dataout, l1_w21_n2_mux_dataout, l1_w21_n1_mux_dataout, l1_w21_n0_mux_dataout, l1_w20_n15_mux_dataout, l1_w20_n14_mux_dataout, l1_w20_n13_mux_dataout, l1_w20_n12_mux_dataout, l1_w20_n11_mux_dataout, l1_w20_n10_mux_dataout, l1_w20_n9_mux_dataout, l1_w20_n8_mux_dataout, l1_w20_n7_mux_dataout, l1_w20_n6_mux_dataout, l1_w20_n5_mux_dataout, l1_w20_n4_mux_dataout, l1_w20_n3_mux_dataout, l1_w20_n2_mux_dataout, l1_w20_n1_mux_dataout, l1_w20_n0_mux_dataout, l1_w19_n15_mux_dataout, l1_w19_n14_mux_dataout, l1_w19_n13_mux_dataout, l1_w19_n12_mux_dataout, l1_w19_n11_mux_dataout, l1_w19_n10_mux_dataout, l1_w19_n9_mux_dataout, l1_w19_n8_mux_dataout, l1_w19_n7_mux_dataout, l1_w19_n6_mux_dataout, l1_w19_n5_mux_dataout, l1_w19_n4_mux_dataout, l1_w19_n3_mux_dataout, l1_w19_n2_mux_dataout, l1_w19_n1_mux_dataout, l1_w19_n0_mux_dataout, l1_w18_n15_mux_dataout, l1_w18_n14_mux_dataout, l1_w18_n13_mux_dataout, l1_w18_n12_mux_dataout, l1_w18_n11_mux_dataout, l1_w18_n10_mux_dataout, l1_w18_n9_mux_dataout, l1_w18_n8_mux_dataout, l1_w18_n7_mux_dataout, l1_w18_n6_mux_dataout, l1_w18_n5_mux_dataout, l1_w18_n4_mux_dataout, l1_w18_n3_mux_dataout, l1_w18_n2_mux_dataout, l1_w18_n1_mux_dataout, l1_w18_n0_mux_dataout, l1_w17_n15_mux_dataout, l1_w17_n14_mux_dataout, l1_w17_n13_mux_dataout, l1_w17_n12_mux_dataout, l1_w17_n11_mux_dataout, l1_w17_n10_mux_dataout, l1_w17_n9_mux_dataout, l1_w17_n8_mux_dataout, l1_w17_n7_mux_dataout, l1_w17_n6_mux_dataout, l1_w17_n5_mux_dataout, l1_w17_n4_mux_dataout, l1_w17_n3_mux_dataout, l1_w17_n2_mux_dataout, l1_w17_n1_mux_dataout, l1_w17_n0_mux_dataout, l1_w16_n15_mux_dataout, l1_w16_n14_mux_dataout, l1_w16_n13_mux_dataout, l1_w16_n12_mux_dataout, l1_w16_n11_mux_dataout, l1_w16_n10_mux_dataout, l1_w16_n9_mux_dataout, l1_w16_n8_mux_dataout, l1_w16_n7_mux_dataout, l1_w16_n6_mux_dataout, l1_w16_n5_mux_dataout, l1_w16_n4_mux_dataout, l1_w16_n3_mux_dataout, l1_w16_n2_mux_dataout, l1_w16_n1_mux_dataout, l1_w16_n0_mux_dataout, l1_w15_n15_mux_dataout, l1_w15_n14_mux_dataout, l1_w15_n13_mux_dataout, l1_w15_n12_mux_dataout, l1_w15_n11_mux_dataout, l1_w15_n10_mux_dataout, l1_w15_n9_mux_dataout, l1_w15_n8_mux_dataout, l1_w15_n7_mux_dataout, l1_w15_n6_mux_dataout, l1_w15_n5_mux_dataout, l1_w15_n4_mux_dataout, l1_w15_n3_mux_dataout, l1_w15_n2_mux_dataout, l1_w15_n1_mux_dataout, l1_w15_n0_mux_dataout, l1_w14_n15_mux_dataout, l1_w14_n14_mux_dataout, l1_w14_n13_mux_dataout, l1_w14_n12_mux_dataout, l1_w14_n11_mux_dataout, l1_w14_n10_mux_dataout, l1_w14_n9_mux_dataout, l1_w14_n8_mux_dataout, l1_w14_n7_mux_dataout, l1_w14_n6_mux_dataout, l1_w14_n5_mux_dataout, l1_w14_n4_mux_dataout, l1_w14_n3_mux_dataout, l1_w14_n2_mux_dataout, l1_w14_n1_mux_dataout, l1_w14_n0_mux_dataout, l1_w13_n15_mux_dataout, l1_w13_n14_mux_dataout, l1_w13_n13_mux_dataout, l1_w13_n12_mux_dataout, l1_w13_n11_mux_dataout, l1_w13_n10_mux_dataout, l1_w13_n9_mux_dataout, l1_w13_n8_mux_dataout, l1_w13_n7_mux_dataout, l1_w13_n6_mux_dataout, l1_w13_n5_mux_dataout, l1_w13_n4_mux_dataout, l1_w13_n3_mux_dataout, l1_w13_n2_mux_dataout, l1_w13_n1_mux_dataout, l1_w13_n0_mux_dataout, l1_w12_n15_mux_dataout, l1_w12_n14_mux_dataout, l1_w12_n13_mux_dataout, l1_w12_n12_mux_dataout, l1_w12_n11_mux_dataout, l1_w12_n10_mux_dataout, l1_w12_n9_mux_dataout, l1_w12_n8_mux_dataout, l1_w12_n7_mux_dataout, l1_w12_n6_mux_dataout, l1_w12_n5_mux_dataout, l1_w12_n4_mux_dataout, l1_w12_n3_mux_dataout, l1_w12_n2_mux_dataout, l1_w12_n1_mux_dataout, l1_w12_n0_mux_dataout, l1_w11_n15_mux_dataout, l1_w11_n14_mux_dataout, l1_w11_n13_mux_dataout, l1_w11_n12_mux_dataout, l1_w11_n11_mux_dataout, l1_w11_n10_mux_dataout, l1_w11_n9_mux_dataout, l1_w11_n8_mux_dataout, l1_w11_n7_mux_dataout, l1_w11_n6_mux_dataout, l1_w11_n5_mux_dataout, l1_w11_n4_mux_dataout, l1_w11_n3_mux_dataout, l1_w11_n2_mux_dataout, l1_w11_n1_mux_dataout, l1_w11_n0_mux_dataout, l1_w10_n15_mux_dataout, l1_w10_n14_mux_dataout, l1_w10_n13_mux_dataout, l1_w10_n12_mux_dataout, l1_w10_n11_mux_dataout, l1_w10_n10_mux_dataout, l1_w10_n9_mux_dataout, l1_w10_n8_mux_dataout, l1_w10_n7_mux_dataout, l1_w10_n6_mux_dataout, l1_w10_n5_mux_dataout, l1_w10_n4_mux_dataout, l1_w10_n3_mux_dataout, l1_w10_n2_mux_dataout, l1_w10_n1_mux_dataout, l1_w10_n0_mux_dataout, l1_w9_n15_mux_dataout, l1_w9_n14_mux_dataout, l1_w9_n13_mux_dataout, l1_w9_n12_mux_dataout, l1_w9_n11_mux_dataout, l1_w9_n10_mux_dataout, l1_w9_n9_mux_dataout, l1_w9_n8_mux_dataout, l1_w9_n7_mux_dataout, l1_w9_n6_mux_dataout, l1_w9_n5_mux_dataout, l1_w9_n4_mux_dataout, l1_w9_n3_mux_dataout, l1_w9_n2_mux_dataout, l1_w9_n1_mux_dataout, l1_w9_n0_mux_dataout, l1_w8_n15_mux_dataout, l1_w8_n14_mux_dataout, l1_w8_n13_mux_dataout, l1_w8_n12_mux_dataout, l1_w8_n11_mux_dataout, l1_w8_n10_mux_dataout, l1_w8_n9_mux_dataout, l1_w8_n8_mux_dataout, l1_w8_n7_mux_dataout, l1_w8_n6_mux_dataout, l1_w8_n5_mux_dataout, l1_w8_n4_mux_dataout, l1_w8_n3_mux_dataout, l1_w8_n2_mux_dataout, l1_w8_n1_mux_dataout, l1_w8_n0_mux_dataout, l1_w7_n15_mux_dataout, l1_w7_n14_mux_dataout, l1_w7_n13_mux_dataout, l1_w7_n12_mux_dataout, l1_w7_n11_mux_dataout, l1_w7_n10_mux_dataout, l1_w7_n9_mux_dataout, l1_w7_n8_mux_dataout, l1_w7_n7_mux_dataout, l1_w7_n6_mux_dataout, l1_w7_n5_mux_dataout, l1_w7_n4_mux_dataout, l1_w7_n3_mux_dataout, l1_w7_n2_mux_dataout, l1_w7_n1_mux_dataout, l1_w7_n0_mux_dataout, l1_w6_n15_mux_dataout, l1_w6_n14_mux_dataout, l1_w6_n13_mux_dataout, l1_w6_n12_mux_dataout, l1_w6_n11_mux_dataout, l1_w6_n10_mux_dataout, l1_w6_n9_mux_dataout, l1_w6_n8_mux_dataout, l1_w6_n7_mux_dataout, l1_w6_n6_mux_dataout, l1_w6_n5_mux_dataout, l1_w6_n4_mux_dataout, l1_w6_n3_mux_dataout, l1_w6_n2_mux_dataout, l1_w6_n1_mux_dataout, l1_w6_n0_mux_dataout, l1_w5_n15_mux_dataout, l1_w5_n14_mux_dataout, l1_w5_n13_mux_dataout, l1_w5_n12_mux_dataout, l1_w5_n11_mux_dataout, l1_w5_n10_mux_dataout, l1_w5_n9_mux_dataout, l1_w5_n8_mux_dataout, l1_w5_n7_mux_dataout, l1_w5_n6_mux_dataout, l1_w5_n5_mux_dataout, l1_w5_n4_mux_dataout, l1_w5_n3_mux_dataout, l1_w5_n2_mux_dataout, l1_w5_n1_mux_dataout, l1_w5_n0_mux_dataout, l1_w4_n15_mux_dataout, l1_w4_n14_mux_dataout, l1_w4_n13_mux_dataout, l1_w4_n12_mux_dataout, l1_w4_n11_mux_dataout, l1_w4_n10_mux_dataout, l1_w4_n9_mux_dataout, l1_w4_n8_mux_dataout, l1_w4_n7_mux_dataout, l1_w4_n6_mux_dataout, l1_w4_n5_mux_dataout, l1_w4_n4_mux_dataout, l1_w4_n3_mux_dataout, l1_w4_n2_mux_dataout, l1_w4_n1_mux_dataout, l1_w4_n0_mux_dataout, l1_w3_n15_mux_dataout, l1_w3_n14_mux_dataout, l1_w3_n13_mux_dataout, l1_w3_n12_mux_dataout, l1_w3_n11_mux_dataout, l1_w3_n10_mux_dataout, l1_w3_n9_mux_dataout, l1_w3_n8_mux_dataout, l1_w3_n7_mux_dataout, l1_w3_n6_mux_dataout, l1_w3_n5_mux_dataout, l1_w3_n4_mux_dataout, l1_w3_n3_mux_dataout, l1_w3_n2_mux_dataout, l1_w3_n1_mux_dataout, l1_w3_n0_mux_dataout, l1_w2_n15_mux_dataout, l1_w2_n14_mux_dataout, l1_w2_n13_mux_dataout, l1_w2_n12_mux_dataout, l1_w2_n11_mux_dataout, l1_w2_n10_mux_dataout, l1_w2_n9_mux_dataout, l1_w2_n8_mux_dataout, l1_w2_n7_mux_dataout, l1_w2_n6_mux_dataout, l1_w2_n5_mux_dataout, l1_w2_n4_mux_dataout, l1_w2_n3_mux_dataout, l1_w2_n2_mux_dataout, l1_w2_n1_mux_dataout, l1_w2_n0_mux_dataout, l1_w1_n15_mux_dataout, l1_w1_n14_mux_dataout, l1_w1_n13_mux_dataout, l1_w1_n12_mux_dataout, l1_w1_n11_mux_dataout, l1_w1_n10_mux_dataout, l1_w1_n9_mux_dataout, l1_w1_n8_mux_dataout, l1_w1_n7_mux_dataout, l1_w1_n6_mux_dataout, l1_w1_n5_mux_dataout, l1_w1_n4_mux_dataout, l1_w1_n3_mux_dataout, l1_w1_n2_mux_dataout, l1_w1_n1_mux_dataout, l1_w1_n0_mux_dataout, l1_w0_n15_mux_dataout, l1_w0_n14_mux_dataout, l1_w0_n13_mux_dataout, l1_w0_n12_mux_dataout, l1_w0_n11_mux_dataout, l1_w0_n10_mux_dataout, l1_w0_n9_mux_dataout, l1_w0_n8_mux_dataout, l1_w0_n7_mux_dataout, l1_w0_n6_mux_dataout, l1_w0_n5_mux_dataout, l1_w0_n4_mux_dataout, l1_w0_n3_mux_dataout, l1_w0_n2_mux_dataout, l1_w0_n1_mux_dataout, l1_w0_n0_mux_dataout, data[]); - result[] = result_wire_ext[]; - result_wire_ext[] = ( l5_w31_n0_mux_dataout, l5_w30_n0_mux_dataout, l5_w29_n0_mux_dataout, l5_w28_n0_mux_dataout, l5_w27_n0_mux_dataout, l5_w26_n0_mux_dataout, l5_w25_n0_mux_dataout, l5_w24_n0_mux_dataout, l5_w23_n0_mux_dataout, l5_w22_n0_mux_dataout, l5_w21_n0_mux_dataout, l5_w20_n0_mux_dataout, l5_w19_n0_mux_dataout, l5_w18_n0_mux_dataout, l5_w17_n0_mux_dataout, l5_w16_n0_mux_dataout, l5_w15_n0_mux_dataout, l5_w14_n0_mux_dataout, l5_w13_n0_mux_dataout, l5_w12_n0_mux_dataout, l5_w11_n0_mux_dataout, l5_w10_n0_mux_dataout, l5_w9_n0_mux_dataout, l5_w8_n0_mux_dataout, l5_w7_n0_mux_dataout, l5_w6_n0_mux_dataout, l5_w5_n0_mux_dataout, l5_w4_n0_mux_dataout, l5_w3_n0_mux_dataout, l5_w2_n0_mux_dataout, l5_w1_n0_mux_dataout, l5_w0_n0_mux_dataout); - sel_wire[] = ( sel[4..4], B"00000", sel[3..3], B"00000", sel[2..2], B"00000", sel[1..1], B"00000", sel[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_lrsc1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_lrsc1.tdf deleted file mode 100644 index 3dccba9..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/mux_lrsc1.tdf +++ /dev/null @@ -1,1000 +0,0 @@ ---lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" LPM_SIZE=16 LPM_WIDTH=32 LPM_WIDTHS=4 data result sel ---VERSION_BEGIN 26.1 cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - - ---synthesis_resources = lut 160 -SUBDESIGN mux_lrsc1 -( - data[511..0] : input; - result[31..0] : output; - sel[3..0] : input; -) -VARIABLE - l1_w0_n0_mux_dataout : WIRE; - l1_w0_n1_mux_dataout : WIRE; - l1_w0_n2_mux_dataout : WIRE; - l1_w0_n3_mux_dataout : WIRE; - l1_w0_n4_mux_dataout : WIRE; - l1_w0_n5_mux_dataout : WIRE; - l1_w0_n6_mux_dataout : WIRE; - l1_w0_n7_mux_dataout : WIRE; - l1_w10_n0_mux_dataout : WIRE; - l1_w10_n1_mux_dataout : WIRE; - l1_w10_n2_mux_dataout : WIRE; - l1_w10_n3_mux_dataout : WIRE; - l1_w10_n4_mux_dataout : WIRE; - l1_w10_n5_mux_dataout : WIRE; - l1_w10_n6_mux_dataout : WIRE; - l1_w10_n7_mux_dataout : WIRE; - l1_w11_n0_mux_dataout : WIRE; - l1_w11_n1_mux_dataout : WIRE; - l1_w11_n2_mux_dataout : WIRE; - l1_w11_n3_mux_dataout : WIRE; - l1_w11_n4_mux_dataout : WIRE; - l1_w11_n5_mux_dataout : WIRE; - l1_w11_n6_mux_dataout : WIRE; - l1_w11_n7_mux_dataout : WIRE; - l1_w12_n0_mux_dataout : WIRE; - l1_w12_n1_mux_dataout : WIRE; - l1_w12_n2_mux_dataout : WIRE; - l1_w12_n3_mux_dataout : WIRE; - l1_w12_n4_mux_dataout : WIRE; - l1_w12_n5_mux_dataout : WIRE; - l1_w12_n6_mux_dataout : WIRE; - l1_w12_n7_mux_dataout : WIRE; - l1_w13_n0_mux_dataout : WIRE; - l1_w13_n1_mux_dataout : WIRE; - l1_w13_n2_mux_dataout : WIRE; - l1_w13_n3_mux_dataout : WIRE; - l1_w13_n4_mux_dataout : WIRE; - l1_w13_n5_mux_dataout : WIRE; - l1_w13_n6_mux_dataout : WIRE; - l1_w13_n7_mux_dataout : WIRE; - l1_w14_n0_mux_dataout : WIRE; - l1_w14_n1_mux_dataout : WIRE; - l1_w14_n2_mux_dataout : WIRE; - l1_w14_n3_mux_dataout : WIRE; - l1_w14_n4_mux_dataout : WIRE; - l1_w14_n5_mux_dataout : WIRE; - l1_w14_n6_mux_dataout : WIRE; - l1_w14_n7_mux_dataout : WIRE; - l1_w15_n0_mux_dataout : WIRE; - l1_w15_n1_mux_dataout : WIRE; - l1_w15_n2_mux_dataout : WIRE; - l1_w15_n3_mux_dataout : WIRE; - l1_w15_n4_mux_dataout : WIRE; - l1_w15_n5_mux_dataout : WIRE; - l1_w15_n6_mux_dataout : WIRE; - l1_w15_n7_mux_dataout : WIRE; - l1_w16_n0_mux_dataout : WIRE; - l1_w16_n1_mux_dataout : WIRE; - l1_w16_n2_mux_dataout : WIRE; - l1_w16_n3_mux_dataout : WIRE; - l1_w16_n4_mux_dataout : WIRE; - l1_w16_n5_mux_dataout : WIRE; - l1_w16_n6_mux_dataout : WIRE; - l1_w16_n7_mux_dataout : WIRE; - l1_w17_n0_mux_dataout : WIRE; - l1_w17_n1_mux_dataout : WIRE; - l1_w17_n2_mux_dataout : WIRE; - l1_w17_n3_mux_dataout : WIRE; - l1_w17_n4_mux_dataout : WIRE; - l1_w17_n5_mux_dataout : WIRE; - l1_w17_n6_mux_dataout : WIRE; - l1_w17_n7_mux_dataout : WIRE; - l1_w18_n0_mux_dataout : WIRE; - l1_w18_n1_mux_dataout : WIRE; - l1_w18_n2_mux_dataout : WIRE; - l1_w18_n3_mux_dataout : WIRE; - l1_w18_n4_mux_dataout : WIRE; - l1_w18_n5_mux_dataout : WIRE; - l1_w18_n6_mux_dataout : WIRE; - l1_w18_n7_mux_dataout : WIRE; - l1_w19_n0_mux_dataout : WIRE; - l1_w19_n1_mux_dataout : WIRE; - l1_w19_n2_mux_dataout : WIRE; - l1_w19_n3_mux_dataout : WIRE; - l1_w19_n4_mux_dataout : WIRE; - l1_w19_n5_mux_dataout : WIRE; - l1_w19_n6_mux_dataout : WIRE; - l1_w19_n7_mux_dataout : WIRE; - l1_w1_n0_mux_dataout : WIRE; - l1_w1_n1_mux_dataout : WIRE; - l1_w1_n2_mux_dataout : WIRE; - l1_w1_n3_mux_dataout : WIRE; - l1_w1_n4_mux_dataout : WIRE; - l1_w1_n5_mux_dataout : WIRE; - l1_w1_n6_mux_dataout : WIRE; - l1_w1_n7_mux_dataout : WIRE; - l1_w20_n0_mux_dataout : WIRE; - l1_w20_n1_mux_dataout : WIRE; - l1_w20_n2_mux_dataout : WIRE; - l1_w20_n3_mux_dataout : WIRE; - l1_w20_n4_mux_dataout : WIRE; - l1_w20_n5_mux_dataout : WIRE; - l1_w20_n6_mux_dataout : WIRE; - l1_w20_n7_mux_dataout : WIRE; - l1_w21_n0_mux_dataout : WIRE; - l1_w21_n1_mux_dataout : WIRE; - l1_w21_n2_mux_dataout : WIRE; - l1_w21_n3_mux_dataout : WIRE; - l1_w21_n4_mux_dataout : WIRE; - l1_w21_n5_mux_dataout : WIRE; - l1_w21_n6_mux_dataout : WIRE; - l1_w21_n7_mux_dataout : WIRE; - l1_w22_n0_mux_dataout : WIRE; - l1_w22_n1_mux_dataout : WIRE; - l1_w22_n2_mux_dataout : WIRE; - l1_w22_n3_mux_dataout : WIRE; - l1_w22_n4_mux_dataout : WIRE; - l1_w22_n5_mux_dataout : WIRE; - l1_w22_n6_mux_dataout : WIRE; - l1_w22_n7_mux_dataout : WIRE; - l1_w23_n0_mux_dataout : WIRE; - l1_w23_n1_mux_dataout : WIRE; - l1_w23_n2_mux_dataout : WIRE; - l1_w23_n3_mux_dataout : WIRE; - l1_w23_n4_mux_dataout : WIRE; - l1_w23_n5_mux_dataout : WIRE; - l1_w23_n6_mux_dataout : WIRE; - l1_w23_n7_mux_dataout : WIRE; - l1_w24_n0_mux_dataout : WIRE; - l1_w24_n1_mux_dataout : WIRE; - l1_w24_n2_mux_dataout : WIRE; - l1_w24_n3_mux_dataout : WIRE; - l1_w24_n4_mux_dataout : WIRE; - l1_w24_n5_mux_dataout : WIRE; - l1_w24_n6_mux_dataout : WIRE; - l1_w24_n7_mux_dataout : WIRE; - l1_w25_n0_mux_dataout : WIRE; - l1_w25_n1_mux_dataout : WIRE; - l1_w25_n2_mux_dataout : WIRE; - l1_w25_n3_mux_dataout : WIRE; - l1_w25_n4_mux_dataout : WIRE; - l1_w25_n5_mux_dataout : WIRE; - l1_w25_n6_mux_dataout : WIRE; - l1_w25_n7_mux_dataout : WIRE; - l1_w26_n0_mux_dataout : WIRE; - l1_w26_n1_mux_dataout : WIRE; - l1_w26_n2_mux_dataout : WIRE; - l1_w26_n3_mux_dataout : WIRE; - l1_w26_n4_mux_dataout : WIRE; - l1_w26_n5_mux_dataout : WIRE; - l1_w26_n6_mux_dataout : WIRE; - l1_w26_n7_mux_dataout : WIRE; - l1_w27_n0_mux_dataout : WIRE; - l1_w27_n1_mux_dataout : WIRE; - l1_w27_n2_mux_dataout : WIRE; - l1_w27_n3_mux_dataout : WIRE; - l1_w27_n4_mux_dataout : WIRE; - l1_w27_n5_mux_dataout : WIRE; - l1_w27_n6_mux_dataout : WIRE; - l1_w27_n7_mux_dataout : WIRE; - l1_w28_n0_mux_dataout : WIRE; - l1_w28_n1_mux_dataout : WIRE; - l1_w28_n2_mux_dataout : WIRE; - l1_w28_n3_mux_dataout : WIRE; - l1_w28_n4_mux_dataout : WIRE; - l1_w28_n5_mux_dataout : WIRE; - l1_w28_n6_mux_dataout : WIRE; - l1_w28_n7_mux_dataout : WIRE; - l1_w29_n0_mux_dataout : WIRE; - l1_w29_n1_mux_dataout : WIRE; - l1_w29_n2_mux_dataout : WIRE; - l1_w29_n3_mux_dataout : WIRE; - l1_w29_n4_mux_dataout : WIRE; - l1_w29_n5_mux_dataout : WIRE; - l1_w29_n6_mux_dataout : WIRE; - l1_w29_n7_mux_dataout : WIRE; - l1_w2_n0_mux_dataout : WIRE; - l1_w2_n1_mux_dataout : WIRE; - l1_w2_n2_mux_dataout : WIRE; - l1_w2_n3_mux_dataout : WIRE; - l1_w2_n4_mux_dataout : WIRE; - l1_w2_n5_mux_dataout : WIRE; - l1_w2_n6_mux_dataout : WIRE; - l1_w2_n7_mux_dataout : WIRE; - l1_w30_n0_mux_dataout : WIRE; - l1_w30_n1_mux_dataout : WIRE; - l1_w30_n2_mux_dataout : WIRE; - l1_w30_n3_mux_dataout : WIRE; - l1_w30_n4_mux_dataout : WIRE; - l1_w30_n5_mux_dataout : WIRE; - l1_w30_n6_mux_dataout : WIRE; - l1_w30_n7_mux_dataout : WIRE; - l1_w31_n0_mux_dataout : WIRE; - l1_w31_n1_mux_dataout : WIRE; - l1_w31_n2_mux_dataout : WIRE; - l1_w31_n3_mux_dataout : WIRE; - l1_w31_n4_mux_dataout : WIRE; - l1_w31_n5_mux_dataout : WIRE; - l1_w31_n6_mux_dataout : WIRE; - l1_w31_n7_mux_dataout : WIRE; - l1_w3_n0_mux_dataout : WIRE; - l1_w3_n1_mux_dataout : WIRE; - l1_w3_n2_mux_dataout : WIRE; - l1_w3_n3_mux_dataout : WIRE; - l1_w3_n4_mux_dataout : WIRE; - l1_w3_n5_mux_dataout : WIRE; - l1_w3_n6_mux_dataout : WIRE; - l1_w3_n7_mux_dataout : WIRE; - l1_w4_n0_mux_dataout : WIRE; - l1_w4_n1_mux_dataout : WIRE; - l1_w4_n2_mux_dataout : WIRE; - l1_w4_n3_mux_dataout : WIRE; - l1_w4_n4_mux_dataout : WIRE; - l1_w4_n5_mux_dataout : WIRE; - l1_w4_n6_mux_dataout : WIRE; - l1_w4_n7_mux_dataout : WIRE; - l1_w5_n0_mux_dataout : WIRE; - l1_w5_n1_mux_dataout : WIRE; - l1_w5_n2_mux_dataout : WIRE; - l1_w5_n3_mux_dataout : WIRE; - l1_w5_n4_mux_dataout : WIRE; - l1_w5_n5_mux_dataout : WIRE; - l1_w5_n6_mux_dataout : WIRE; - l1_w5_n7_mux_dataout : WIRE; - l1_w6_n0_mux_dataout : WIRE; - l1_w6_n1_mux_dataout : WIRE; - l1_w6_n2_mux_dataout : WIRE; - l1_w6_n3_mux_dataout : WIRE; - l1_w6_n4_mux_dataout : WIRE; - l1_w6_n5_mux_dataout : WIRE; - l1_w6_n6_mux_dataout : WIRE; - l1_w6_n7_mux_dataout : WIRE; - l1_w7_n0_mux_dataout : WIRE; - l1_w7_n1_mux_dataout : WIRE; - l1_w7_n2_mux_dataout : WIRE; - l1_w7_n3_mux_dataout : WIRE; - l1_w7_n4_mux_dataout : WIRE; - l1_w7_n5_mux_dataout : WIRE; - l1_w7_n6_mux_dataout : WIRE; - l1_w7_n7_mux_dataout : WIRE; - l1_w8_n0_mux_dataout : WIRE; - l1_w8_n1_mux_dataout : WIRE; - l1_w8_n2_mux_dataout : WIRE; - l1_w8_n3_mux_dataout : WIRE; - l1_w8_n4_mux_dataout : WIRE; - l1_w8_n5_mux_dataout : WIRE; - l1_w8_n6_mux_dataout : WIRE; - l1_w8_n7_mux_dataout : WIRE; - l1_w9_n0_mux_dataout : WIRE; - l1_w9_n1_mux_dataout : WIRE; - l1_w9_n2_mux_dataout : WIRE; - l1_w9_n3_mux_dataout : WIRE; - l1_w9_n4_mux_dataout : WIRE; - l1_w9_n5_mux_dataout : WIRE; - l1_w9_n6_mux_dataout : WIRE; - l1_w9_n7_mux_dataout : WIRE; - l2_w0_n0_mux_dataout : WIRE; - l2_w0_n1_mux_dataout : WIRE; - l2_w0_n2_mux_dataout : WIRE; - l2_w0_n3_mux_dataout : WIRE; - l2_w10_n0_mux_dataout : WIRE; - l2_w10_n1_mux_dataout : WIRE; - l2_w10_n2_mux_dataout : WIRE; - l2_w10_n3_mux_dataout : WIRE; - l2_w11_n0_mux_dataout : WIRE; - l2_w11_n1_mux_dataout : WIRE; - l2_w11_n2_mux_dataout : WIRE; - l2_w11_n3_mux_dataout : WIRE; - l2_w12_n0_mux_dataout : WIRE; - l2_w12_n1_mux_dataout : WIRE; - l2_w12_n2_mux_dataout : WIRE; - l2_w12_n3_mux_dataout : WIRE; - l2_w13_n0_mux_dataout : WIRE; - l2_w13_n1_mux_dataout : WIRE; - l2_w13_n2_mux_dataout : WIRE; - l2_w13_n3_mux_dataout : WIRE; - l2_w14_n0_mux_dataout : WIRE; - l2_w14_n1_mux_dataout : WIRE; - l2_w14_n2_mux_dataout : WIRE; - l2_w14_n3_mux_dataout : WIRE; - l2_w15_n0_mux_dataout : WIRE; - l2_w15_n1_mux_dataout : WIRE; - l2_w15_n2_mux_dataout : WIRE; - l2_w15_n3_mux_dataout : WIRE; - l2_w16_n0_mux_dataout : WIRE; - l2_w16_n1_mux_dataout : WIRE; - l2_w16_n2_mux_dataout : WIRE; - l2_w16_n3_mux_dataout : WIRE; - l2_w17_n0_mux_dataout : WIRE; - l2_w17_n1_mux_dataout : WIRE; - l2_w17_n2_mux_dataout : WIRE; - l2_w17_n3_mux_dataout : WIRE; - l2_w18_n0_mux_dataout : WIRE; - l2_w18_n1_mux_dataout : WIRE; - l2_w18_n2_mux_dataout : WIRE; - l2_w18_n3_mux_dataout : WIRE; - l2_w19_n0_mux_dataout : WIRE; - l2_w19_n1_mux_dataout : WIRE; - l2_w19_n2_mux_dataout : WIRE; - l2_w19_n3_mux_dataout : WIRE; - l2_w1_n0_mux_dataout : WIRE; - l2_w1_n1_mux_dataout : WIRE; - l2_w1_n2_mux_dataout : WIRE; - l2_w1_n3_mux_dataout : WIRE; - l2_w20_n0_mux_dataout : WIRE; - l2_w20_n1_mux_dataout : WIRE; - l2_w20_n2_mux_dataout : WIRE; - l2_w20_n3_mux_dataout : WIRE; - l2_w21_n0_mux_dataout : WIRE; - l2_w21_n1_mux_dataout : WIRE; - l2_w21_n2_mux_dataout : WIRE; - l2_w21_n3_mux_dataout : WIRE; - l2_w22_n0_mux_dataout : WIRE; - l2_w22_n1_mux_dataout : WIRE; - l2_w22_n2_mux_dataout : WIRE; - l2_w22_n3_mux_dataout : WIRE; - l2_w23_n0_mux_dataout : WIRE; - l2_w23_n1_mux_dataout : WIRE; - l2_w23_n2_mux_dataout : WIRE; - l2_w23_n3_mux_dataout : WIRE; - l2_w24_n0_mux_dataout : WIRE; - l2_w24_n1_mux_dataout : WIRE; - l2_w24_n2_mux_dataout : WIRE; - l2_w24_n3_mux_dataout : WIRE; - l2_w25_n0_mux_dataout : WIRE; - l2_w25_n1_mux_dataout : WIRE; - l2_w25_n2_mux_dataout : WIRE; - l2_w25_n3_mux_dataout : WIRE; - l2_w26_n0_mux_dataout : WIRE; - l2_w26_n1_mux_dataout : WIRE; - l2_w26_n2_mux_dataout : WIRE; - l2_w26_n3_mux_dataout : WIRE; - l2_w27_n0_mux_dataout : WIRE; - l2_w27_n1_mux_dataout : WIRE; - l2_w27_n2_mux_dataout : WIRE; - l2_w27_n3_mux_dataout : WIRE; - l2_w28_n0_mux_dataout : WIRE; - l2_w28_n1_mux_dataout : WIRE; - l2_w28_n2_mux_dataout : WIRE; - l2_w28_n3_mux_dataout : WIRE; - l2_w29_n0_mux_dataout : WIRE; - l2_w29_n1_mux_dataout : WIRE; - l2_w29_n2_mux_dataout : WIRE; - l2_w29_n3_mux_dataout : WIRE; - l2_w2_n0_mux_dataout : WIRE; - l2_w2_n1_mux_dataout : WIRE; - l2_w2_n2_mux_dataout : WIRE; - l2_w2_n3_mux_dataout : WIRE; - l2_w30_n0_mux_dataout : WIRE; - l2_w30_n1_mux_dataout : WIRE; - l2_w30_n2_mux_dataout : WIRE; - l2_w30_n3_mux_dataout : WIRE; - l2_w31_n0_mux_dataout : WIRE; - l2_w31_n1_mux_dataout : WIRE; - l2_w31_n2_mux_dataout : WIRE; - l2_w31_n3_mux_dataout : WIRE; - l2_w3_n0_mux_dataout : WIRE; - l2_w3_n1_mux_dataout : WIRE; - l2_w3_n2_mux_dataout : WIRE; - l2_w3_n3_mux_dataout : WIRE; - l2_w4_n0_mux_dataout : WIRE; - l2_w4_n1_mux_dataout : WIRE; - l2_w4_n2_mux_dataout : WIRE; - l2_w4_n3_mux_dataout : WIRE; - l2_w5_n0_mux_dataout : WIRE; - l2_w5_n1_mux_dataout : WIRE; - l2_w5_n2_mux_dataout : WIRE; - l2_w5_n3_mux_dataout : WIRE; - l2_w6_n0_mux_dataout : WIRE; - l2_w6_n1_mux_dataout : WIRE; - l2_w6_n2_mux_dataout : WIRE; - l2_w6_n3_mux_dataout : WIRE; - l2_w7_n0_mux_dataout : WIRE; - l2_w7_n1_mux_dataout : WIRE; - l2_w7_n2_mux_dataout : WIRE; - l2_w7_n3_mux_dataout : WIRE; - l2_w8_n0_mux_dataout : WIRE; - l2_w8_n1_mux_dataout : WIRE; - l2_w8_n2_mux_dataout : WIRE; - l2_w8_n3_mux_dataout : WIRE; - l2_w9_n0_mux_dataout : WIRE; - l2_w9_n1_mux_dataout : WIRE; - l2_w9_n2_mux_dataout : WIRE; - l2_w9_n3_mux_dataout : WIRE; - l3_w0_n0_mux_dataout : WIRE; - l3_w0_n1_mux_dataout : WIRE; - l3_w10_n0_mux_dataout : WIRE; - l3_w10_n1_mux_dataout : WIRE; - l3_w11_n0_mux_dataout : WIRE; - l3_w11_n1_mux_dataout : WIRE; - l3_w12_n0_mux_dataout : WIRE; - l3_w12_n1_mux_dataout : WIRE; - l3_w13_n0_mux_dataout : WIRE; - l3_w13_n1_mux_dataout : WIRE; - l3_w14_n0_mux_dataout : WIRE; - l3_w14_n1_mux_dataout : WIRE; - l3_w15_n0_mux_dataout : WIRE; - l3_w15_n1_mux_dataout : WIRE; - l3_w16_n0_mux_dataout : WIRE; - l3_w16_n1_mux_dataout : WIRE; - l3_w17_n0_mux_dataout : WIRE; - l3_w17_n1_mux_dataout : WIRE; - l3_w18_n0_mux_dataout : WIRE; - l3_w18_n1_mux_dataout : WIRE; - l3_w19_n0_mux_dataout : WIRE; - l3_w19_n1_mux_dataout : WIRE; - l3_w1_n0_mux_dataout : WIRE; - l3_w1_n1_mux_dataout : WIRE; - l3_w20_n0_mux_dataout : WIRE; - l3_w20_n1_mux_dataout : WIRE; - l3_w21_n0_mux_dataout : WIRE; - l3_w21_n1_mux_dataout : WIRE; - l3_w22_n0_mux_dataout : WIRE; - l3_w22_n1_mux_dataout : WIRE; - l3_w23_n0_mux_dataout : WIRE; - l3_w23_n1_mux_dataout : WIRE; - l3_w24_n0_mux_dataout : WIRE; - l3_w24_n1_mux_dataout : WIRE; - l3_w25_n0_mux_dataout : WIRE; - l3_w25_n1_mux_dataout : WIRE; - l3_w26_n0_mux_dataout : WIRE; - l3_w26_n1_mux_dataout : WIRE; - l3_w27_n0_mux_dataout : WIRE; - l3_w27_n1_mux_dataout : WIRE; - l3_w28_n0_mux_dataout : WIRE; - l3_w28_n1_mux_dataout : WIRE; - l3_w29_n0_mux_dataout : WIRE; - l3_w29_n1_mux_dataout : WIRE; - l3_w2_n0_mux_dataout : WIRE; - l3_w2_n1_mux_dataout : WIRE; - l3_w30_n0_mux_dataout : WIRE; - l3_w30_n1_mux_dataout : WIRE; - l3_w31_n0_mux_dataout : WIRE; - l3_w31_n1_mux_dataout : WIRE; - l3_w3_n0_mux_dataout : WIRE; - l3_w3_n1_mux_dataout : WIRE; - l3_w4_n0_mux_dataout : WIRE; - l3_w4_n1_mux_dataout : WIRE; - l3_w5_n0_mux_dataout : WIRE; - l3_w5_n1_mux_dataout : WIRE; - l3_w6_n0_mux_dataout : WIRE; - l3_w6_n1_mux_dataout : WIRE; - l3_w7_n0_mux_dataout : WIRE; - l3_w7_n1_mux_dataout : WIRE; - l3_w8_n0_mux_dataout : WIRE; - l3_w8_n1_mux_dataout : WIRE; - l3_w9_n0_mux_dataout : WIRE; - l3_w9_n1_mux_dataout : WIRE; - l4_w0_n0_mux_dataout : WIRE; - l4_w10_n0_mux_dataout : WIRE; - l4_w11_n0_mux_dataout : WIRE; - l4_w12_n0_mux_dataout : WIRE; - l4_w13_n0_mux_dataout : WIRE; - l4_w14_n0_mux_dataout : WIRE; - l4_w15_n0_mux_dataout : WIRE; - l4_w16_n0_mux_dataout : WIRE; - l4_w17_n0_mux_dataout : WIRE; - l4_w18_n0_mux_dataout : WIRE; - l4_w19_n0_mux_dataout : WIRE; - l4_w1_n0_mux_dataout : WIRE; - l4_w20_n0_mux_dataout : WIRE; - l4_w21_n0_mux_dataout : WIRE; - l4_w22_n0_mux_dataout : WIRE; - l4_w23_n0_mux_dataout : WIRE; - l4_w24_n0_mux_dataout : WIRE; - l4_w25_n0_mux_dataout : WIRE; - l4_w26_n0_mux_dataout : WIRE; - l4_w27_n0_mux_dataout : WIRE; - l4_w28_n0_mux_dataout : WIRE; - l4_w29_n0_mux_dataout : WIRE; - l4_w2_n0_mux_dataout : WIRE; - l4_w30_n0_mux_dataout : WIRE; - l4_w31_n0_mux_dataout : WIRE; - l4_w3_n0_mux_dataout : WIRE; - l4_w4_n0_mux_dataout : WIRE; - l4_w5_n0_mux_dataout : WIRE; - l4_w6_n0_mux_dataout : WIRE; - l4_w7_n0_mux_dataout : WIRE; - l4_w8_n0_mux_dataout : WIRE; - l4_w9_n0_mux_dataout : WIRE; - data_wire[959..0] : WIRE; - result_wire_ext[31..0] : WIRE; - sel_wire[15..0] : WIRE; - -BEGIN - l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[32..32] # !(sel_wire[0..0]) & data_wire[0..0]; - l1_w0_n1_mux_dataout = sel_wire[0..0] & data_wire[96..96] # !(sel_wire[0..0]) & data_wire[64..64]; - l1_w0_n2_mux_dataout = sel_wire[0..0] & data_wire[160..160] # !(sel_wire[0..0]) & data_wire[128..128]; - l1_w0_n3_mux_dataout = sel_wire[0..0] & data_wire[224..224] # !(sel_wire[0..0]) & data_wire[192..192]; - l1_w0_n4_mux_dataout = sel_wire[0..0] & data_wire[288..288] # !(sel_wire[0..0]) & data_wire[256..256]; - l1_w0_n5_mux_dataout = sel_wire[0..0] & data_wire[352..352] # !(sel_wire[0..0]) & data_wire[320..320]; - l1_w0_n6_mux_dataout = sel_wire[0..0] & data_wire[416..416] # !(sel_wire[0..0]) & data_wire[384..384]; - l1_w0_n7_mux_dataout = sel_wire[0..0] & data_wire[480..480] # !(sel_wire[0..0]) & data_wire[448..448]; - l1_w10_n0_mux_dataout = sel_wire[0..0] & data_wire[42..42] # !(sel_wire[0..0]) & data_wire[10..10]; - l1_w10_n1_mux_dataout = sel_wire[0..0] & data_wire[106..106] # !(sel_wire[0..0]) & data_wire[74..74]; - l1_w10_n2_mux_dataout = sel_wire[0..0] & data_wire[170..170] # !(sel_wire[0..0]) & data_wire[138..138]; - l1_w10_n3_mux_dataout = sel_wire[0..0] & data_wire[234..234] # !(sel_wire[0..0]) & data_wire[202..202]; - l1_w10_n4_mux_dataout = sel_wire[0..0] & data_wire[298..298] # !(sel_wire[0..0]) & data_wire[266..266]; - l1_w10_n5_mux_dataout = sel_wire[0..0] & data_wire[362..362] # !(sel_wire[0..0]) & data_wire[330..330]; - l1_w10_n6_mux_dataout = sel_wire[0..0] & data_wire[426..426] # !(sel_wire[0..0]) & data_wire[394..394]; - l1_w10_n7_mux_dataout = sel_wire[0..0] & data_wire[490..490] # !(sel_wire[0..0]) & data_wire[458..458]; - l1_w11_n0_mux_dataout = sel_wire[0..0] & data_wire[43..43] # !(sel_wire[0..0]) & data_wire[11..11]; - l1_w11_n1_mux_dataout = sel_wire[0..0] & data_wire[107..107] # !(sel_wire[0..0]) & data_wire[75..75]; - l1_w11_n2_mux_dataout = sel_wire[0..0] & data_wire[171..171] # !(sel_wire[0..0]) & data_wire[139..139]; - l1_w11_n3_mux_dataout = sel_wire[0..0] & data_wire[235..235] # !(sel_wire[0..0]) & data_wire[203..203]; - l1_w11_n4_mux_dataout = sel_wire[0..0] & data_wire[299..299] # !(sel_wire[0..0]) & data_wire[267..267]; - l1_w11_n5_mux_dataout = sel_wire[0..0] & data_wire[363..363] # !(sel_wire[0..0]) & data_wire[331..331]; - l1_w11_n6_mux_dataout = sel_wire[0..0] & data_wire[427..427] # !(sel_wire[0..0]) & data_wire[395..395]; - l1_w11_n7_mux_dataout = sel_wire[0..0] & data_wire[491..491] # !(sel_wire[0..0]) & data_wire[459..459]; - l1_w12_n0_mux_dataout = sel_wire[0..0] & data_wire[44..44] # !(sel_wire[0..0]) & data_wire[12..12]; - l1_w12_n1_mux_dataout = sel_wire[0..0] & data_wire[108..108] # !(sel_wire[0..0]) & data_wire[76..76]; - l1_w12_n2_mux_dataout = sel_wire[0..0] & data_wire[172..172] # !(sel_wire[0..0]) & data_wire[140..140]; - l1_w12_n3_mux_dataout = sel_wire[0..0] & data_wire[236..236] # !(sel_wire[0..0]) & data_wire[204..204]; - l1_w12_n4_mux_dataout = sel_wire[0..0] & data_wire[300..300] # !(sel_wire[0..0]) & data_wire[268..268]; - l1_w12_n5_mux_dataout = sel_wire[0..0] & data_wire[364..364] # !(sel_wire[0..0]) & data_wire[332..332]; - l1_w12_n6_mux_dataout = sel_wire[0..0] & data_wire[428..428] # !(sel_wire[0..0]) & data_wire[396..396]; - l1_w12_n7_mux_dataout = sel_wire[0..0] & data_wire[492..492] # !(sel_wire[0..0]) & data_wire[460..460]; - l1_w13_n0_mux_dataout = sel_wire[0..0] & data_wire[45..45] # !(sel_wire[0..0]) & data_wire[13..13]; - l1_w13_n1_mux_dataout = sel_wire[0..0] & data_wire[109..109] # !(sel_wire[0..0]) & data_wire[77..77]; - l1_w13_n2_mux_dataout = sel_wire[0..0] & data_wire[173..173] # !(sel_wire[0..0]) & data_wire[141..141]; - l1_w13_n3_mux_dataout = sel_wire[0..0] & data_wire[237..237] # !(sel_wire[0..0]) & data_wire[205..205]; - l1_w13_n4_mux_dataout = sel_wire[0..0] & data_wire[301..301] # !(sel_wire[0..0]) & data_wire[269..269]; - l1_w13_n5_mux_dataout = sel_wire[0..0] & data_wire[365..365] # !(sel_wire[0..0]) & data_wire[333..333]; - l1_w13_n6_mux_dataout = sel_wire[0..0] & data_wire[429..429] # !(sel_wire[0..0]) & data_wire[397..397]; - l1_w13_n7_mux_dataout = sel_wire[0..0] & data_wire[493..493] # !(sel_wire[0..0]) & data_wire[461..461]; - l1_w14_n0_mux_dataout = sel_wire[0..0] & data_wire[46..46] # !(sel_wire[0..0]) & data_wire[14..14]; - l1_w14_n1_mux_dataout = sel_wire[0..0] & data_wire[110..110] # !(sel_wire[0..0]) & data_wire[78..78]; - l1_w14_n2_mux_dataout = sel_wire[0..0] & data_wire[174..174] # !(sel_wire[0..0]) & data_wire[142..142]; - l1_w14_n3_mux_dataout = sel_wire[0..0] & data_wire[238..238] # !(sel_wire[0..0]) & data_wire[206..206]; - l1_w14_n4_mux_dataout = sel_wire[0..0] & data_wire[302..302] # !(sel_wire[0..0]) & data_wire[270..270]; - l1_w14_n5_mux_dataout = sel_wire[0..0] & data_wire[366..366] # !(sel_wire[0..0]) & data_wire[334..334]; - l1_w14_n6_mux_dataout = sel_wire[0..0] & data_wire[430..430] # !(sel_wire[0..0]) & data_wire[398..398]; - l1_w14_n7_mux_dataout = sel_wire[0..0] & data_wire[494..494] # !(sel_wire[0..0]) & data_wire[462..462]; - l1_w15_n0_mux_dataout = sel_wire[0..0] & data_wire[47..47] # !(sel_wire[0..0]) & data_wire[15..15]; - l1_w15_n1_mux_dataout = sel_wire[0..0] & data_wire[111..111] # !(sel_wire[0..0]) & data_wire[79..79]; - l1_w15_n2_mux_dataout = sel_wire[0..0] & data_wire[175..175] # !(sel_wire[0..0]) & data_wire[143..143]; - l1_w15_n3_mux_dataout = sel_wire[0..0] & data_wire[239..239] # !(sel_wire[0..0]) & data_wire[207..207]; - l1_w15_n4_mux_dataout = sel_wire[0..0] & data_wire[303..303] # !(sel_wire[0..0]) & data_wire[271..271]; - l1_w15_n5_mux_dataout = sel_wire[0..0] & data_wire[367..367] # !(sel_wire[0..0]) & data_wire[335..335]; - l1_w15_n6_mux_dataout = sel_wire[0..0] & data_wire[431..431] # !(sel_wire[0..0]) & data_wire[399..399]; - l1_w15_n7_mux_dataout = sel_wire[0..0] & data_wire[495..495] # !(sel_wire[0..0]) & data_wire[463..463]; - l1_w16_n0_mux_dataout = sel_wire[0..0] & data_wire[48..48] # !(sel_wire[0..0]) & data_wire[16..16]; - l1_w16_n1_mux_dataout = sel_wire[0..0] & data_wire[112..112] # !(sel_wire[0..0]) & data_wire[80..80]; - l1_w16_n2_mux_dataout = sel_wire[0..0] & data_wire[176..176] # !(sel_wire[0..0]) & data_wire[144..144]; - l1_w16_n3_mux_dataout = sel_wire[0..0] & data_wire[240..240] # !(sel_wire[0..0]) & data_wire[208..208]; - l1_w16_n4_mux_dataout = sel_wire[0..0] & data_wire[304..304] # !(sel_wire[0..0]) & data_wire[272..272]; - l1_w16_n5_mux_dataout = sel_wire[0..0] & data_wire[368..368] # !(sel_wire[0..0]) & data_wire[336..336]; - l1_w16_n6_mux_dataout = sel_wire[0..0] & data_wire[432..432] # !(sel_wire[0..0]) & data_wire[400..400]; - l1_w16_n7_mux_dataout = sel_wire[0..0] & data_wire[496..496] # !(sel_wire[0..0]) & data_wire[464..464]; - l1_w17_n0_mux_dataout = sel_wire[0..0] & data_wire[49..49] # !(sel_wire[0..0]) & data_wire[17..17]; - l1_w17_n1_mux_dataout = sel_wire[0..0] & data_wire[113..113] # !(sel_wire[0..0]) & data_wire[81..81]; - l1_w17_n2_mux_dataout = sel_wire[0..0] & data_wire[177..177] # !(sel_wire[0..0]) & data_wire[145..145]; - l1_w17_n3_mux_dataout = sel_wire[0..0] & data_wire[241..241] # !(sel_wire[0..0]) & data_wire[209..209]; - l1_w17_n4_mux_dataout = sel_wire[0..0] & data_wire[305..305] # !(sel_wire[0..0]) & data_wire[273..273]; - l1_w17_n5_mux_dataout = sel_wire[0..0] & data_wire[369..369] # !(sel_wire[0..0]) & data_wire[337..337]; - l1_w17_n6_mux_dataout = sel_wire[0..0] & data_wire[433..433] # !(sel_wire[0..0]) & data_wire[401..401]; - l1_w17_n7_mux_dataout = sel_wire[0..0] & data_wire[497..497] # !(sel_wire[0..0]) & data_wire[465..465]; - l1_w18_n0_mux_dataout = sel_wire[0..0] & data_wire[50..50] # !(sel_wire[0..0]) & data_wire[18..18]; - l1_w18_n1_mux_dataout = sel_wire[0..0] & data_wire[114..114] # !(sel_wire[0..0]) & data_wire[82..82]; - l1_w18_n2_mux_dataout = sel_wire[0..0] & data_wire[178..178] # !(sel_wire[0..0]) & data_wire[146..146]; - l1_w18_n3_mux_dataout = sel_wire[0..0] & data_wire[242..242] # !(sel_wire[0..0]) & data_wire[210..210]; - l1_w18_n4_mux_dataout = sel_wire[0..0] & data_wire[306..306] # !(sel_wire[0..0]) & data_wire[274..274]; - l1_w18_n5_mux_dataout = sel_wire[0..0] & data_wire[370..370] # !(sel_wire[0..0]) & data_wire[338..338]; - l1_w18_n6_mux_dataout = sel_wire[0..0] & data_wire[434..434] # !(sel_wire[0..0]) & data_wire[402..402]; - l1_w18_n7_mux_dataout = sel_wire[0..0] & data_wire[498..498] # !(sel_wire[0..0]) & data_wire[466..466]; - l1_w19_n0_mux_dataout = sel_wire[0..0] & data_wire[51..51] # !(sel_wire[0..0]) & data_wire[19..19]; - l1_w19_n1_mux_dataout = sel_wire[0..0] & data_wire[115..115] # !(sel_wire[0..0]) & data_wire[83..83]; - l1_w19_n2_mux_dataout = sel_wire[0..0] & data_wire[179..179] # !(sel_wire[0..0]) & data_wire[147..147]; - l1_w19_n3_mux_dataout = sel_wire[0..0] & data_wire[243..243] # !(sel_wire[0..0]) & data_wire[211..211]; - l1_w19_n4_mux_dataout = sel_wire[0..0] & data_wire[307..307] # !(sel_wire[0..0]) & data_wire[275..275]; - l1_w19_n5_mux_dataout = sel_wire[0..0] & data_wire[371..371] # !(sel_wire[0..0]) & data_wire[339..339]; - l1_w19_n6_mux_dataout = sel_wire[0..0] & data_wire[435..435] # !(sel_wire[0..0]) & data_wire[403..403]; - l1_w19_n7_mux_dataout = sel_wire[0..0] & data_wire[499..499] # !(sel_wire[0..0]) & data_wire[467..467]; - l1_w1_n0_mux_dataout = sel_wire[0..0] & data_wire[33..33] # !(sel_wire[0..0]) & data_wire[1..1]; - l1_w1_n1_mux_dataout = sel_wire[0..0] & data_wire[97..97] # !(sel_wire[0..0]) & data_wire[65..65]; - l1_w1_n2_mux_dataout = sel_wire[0..0] & data_wire[161..161] # !(sel_wire[0..0]) & data_wire[129..129]; - l1_w1_n3_mux_dataout = sel_wire[0..0] & data_wire[225..225] # !(sel_wire[0..0]) & data_wire[193..193]; - l1_w1_n4_mux_dataout = sel_wire[0..0] & data_wire[289..289] # !(sel_wire[0..0]) & data_wire[257..257]; - l1_w1_n5_mux_dataout = sel_wire[0..0] & data_wire[353..353] # !(sel_wire[0..0]) & data_wire[321..321]; - l1_w1_n6_mux_dataout = sel_wire[0..0] & data_wire[417..417] # !(sel_wire[0..0]) & data_wire[385..385]; - l1_w1_n7_mux_dataout = sel_wire[0..0] & data_wire[481..481] # !(sel_wire[0..0]) & data_wire[449..449]; - l1_w20_n0_mux_dataout = sel_wire[0..0] & data_wire[52..52] # !(sel_wire[0..0]) & data_wire[20..20]; - l1_w20_n1_mux_dataout = sel_wire[0..0] & data_wire[116..116] # !(sel_wire[0..0]) & data_wire[84..84]; - l1_w20_n2_mux_dataout = sel_wire[0..0] & data_wire[180..180] # !(sel_wire[0..0]) & data_wire[148..148]; - l1_w20_n3_mux_dataout = sel_wire[0..0] & data_wire[244..244] # !(sel_wire[0..0]) & data_wire[212..212]; - l1_w20_n4_mux_dataout = sel_wire[0..0] & data_wire[308..308] # !(sel_wire[0..0]) & data_wire[276..276]; - l1_w20_n5_mux_dataout = sel_wire[0..0] & data_wire[372..372] # !(sel_wire[0..0]) & data_wire[340..340]; - l1_w20_n6_mux_dataout = sel_wire[0..0] & data_wire[436..436] # !(sel_wire[0..0]) & data_wire[404..404]; - l1_w20_n7_mux_dataout = sel_wire[0..0] & data_wire[500..500] # !(sel_wire[0..0]) & data_wire[468..468]; - l1_w21_n0_mux_dataout = sel_wire[0..0] & data_wire[53..53] # !(sel_wire[0..0]) & data_wire[21..21]; - l1_w21_n1_mux_dataout = sel_wire[0..0] & data_wire[117..117] # !(sel_wire[0..0]) & data_wire[85..85]; - l1_w21_n2_mux_dataout = sel_wire[0..0] & data_wire[181..181] # !(sel_wire[0..0]) & data_wire[149..149]; - l1_w21_n3_mux_dataout = sel_wire[0..0] & data_wire[245..245] # !(sel_wire[0..0]) & data_wire[213..213]; - l1_w21_n4_mux_dataout = sel_wire[0..0] & data_wire[309..309] # !(sel_wire[0..0]) & data_wire[277..277]; - l1_w21_n5_mux_dataout = sel_wire[0..0] & data_wire[373..373] # !(sel_wire[0..0]) & data_wire[341..341]; - l1_w21_n6_mux_dataout = sel_wire[0..0] & data_wire[437..437] # !(sel_wire[0..0]) & data_wire[405..405]; - l1_w21_n7_mux_dataout = sel_wire[0..0] & data_wire[501..501] # !(sel_wire[0..0]) & data_wire[469..469]; - l1_w22_n0_mux_dataout = sel_wire[0..0] & data_wire[54..54] # !(sel_wire[0..0]) & data_wire[22..22]; - l1_w22_n1_mux_dataout = sel_wire[0..0] & data_wire[118..118] # !(sel_wire[0..0]) & data_wire[86..86]; - l1_w22_n2_mux_dataout = sel_wire[0..0] & data_wire[182..182] # !(sel_wire[0..0]) & data_wire[150..150]; - l1_w22_n3_mux_dataout = sel_wire[0..0] & data_wire[246..246] # !(sel_wire[0..0]) & data_wire[214..214]; - l1_w22_n4_mux_dataout = sel_wire[0..0] & data_wire[310..310] # !(sel_wire[0..0]) & data_wire[278..278]; - l1_w22_n5_mux_dataout = sel_wire[0..0] & data_wire[374..374] # !(sel_wire[0..0]) & data_wire[342..342]; - l1_w22_n6_mux_dataout = sel_wire[0..0] & data_wire[438..438] # !(sel_wire[0..0]) & data_wire[406..406]; - l1_w22_n7_mux_dataout = sel_wire[0..0] & data_wire[502..502] # !(sel_wire[0..0]) & data_wire[470..470]; - l1_w23_n0_mux_dataout = sel_wire[0..0] & data_wire[55..55] # !(sel_wire[0..0]) & data_wire[23..23]; - l1_w23_n1_mux_dataout = sel_wire[0..0] & data_wire[119..119] # !(sel_wire[0..0]) & data_wire[87..87]; - l1_w23_n2_mux_dataout = sel_wire[0..0] & data_wire[183..183] # !(sel_wire[0..0]) & data_wire[151..151]; - l1_w23_n3_mux_dataout = sel_wire[0..0] & data_wire[247..247] # !(sel_wire[0..0]) & data_wire[215..215]; - l1_w23_n4_mux_dataout = sel_wire[0..0] & data_wire[311..311] # !(sel_wire[0..0]) & data_wire[279..279]; - l1_w23_n5_mux_dataout = sel_wire[0..0] & data_wire[375..375] # !(sel_wire[0..0]) & data_wire[343..343]; - l1_w23_n6_mux_dataout = sel_wire[0..0] & data_wire[439..439] # !(sel_wire[0..0]) & data_wire[407..407]; - l1_w23_n7_mux_dataout = sel_wire[0..0] & data_wire[503..503] # !(sel_wire[0..0]) & data_wire[471..471]; - l1_w24_n0_mux_dataout = sel_wire[0..0] & data_wire[56..56] # !(sel_wire[0..0]) & data_wire[24..24]; - l1_w24_n1_mux_dataout = sel_wire[0..0] & data_wire[120..120] # !(sel_wire[0..0]) & data_wire[88..88]; - l1_w24_n2_mux_dataout = sel_wire[0..0] & data_wire[184..184] # !(sel_wire[0..0]) & data_wire[152..152]; - l1_w24_n3_mux_dataout = sel_wire[0..0] & data_wire[248..248] # !(sel_wire[0..0]) & data_wire[216..216]; - l1_w24_n4_mux_dataout = sel_wire[0..0] & data_wire[312..312] # !(sel_wire[0..0]) & data_wire[280..280]; - l1_w24_n5_mux_dataout = sel_wire[0..0] & data_wire[376..376] # !(sel_wire[0..0]) & data_wire[344..344]; - l1_w24_n6_mux_dataout = sel_wire[0..0] & data_wire[440..440] # !(sel_wire[0..0]) & data_wire[408..408]; - l1_w24_n7_mux_dataout = sel_wire[0..0] & data_wire[504..504] # !(sel_wire[0..0]) & data_wire[472..472]; - l1_w25_n0_mux_dataout = sel_wire[0..0] & data_wire[57..57] # !(sel_wire[0..0]) & data_wire[25..25]; - l1_w25_n1_mux_dataout = sel_wire[0..0] & data_wire[121..121] # !(sel_wire[0..0]) & data_wire[89..89]; - l1_w25_n2_mux_dataout = sel_wire[0..0] & data_wire[185..185] # !(sel_wire[0..0]) & data_wire[153..153]; - l1_w25_n3_mux_dataout = sel_wire[0..0] & data_wire[249..249] # !(sel_wire[0..0]) & data_wire[217..217]; - l1_w25_n4_mux_dataout = sel_wire[0..0] & data_wire[313..313] # !(sel_wire[0..0]) & data_wire[281..281]; - l1_w25_n5_mux_dataout = sel_wire[0..0] & data_wire[377..377] # !(sel_wire[0..0]) & data_wire[345..345]; - l1_w25_n6_mux_dataout = sel_wire[0..0] & data_wire[441..441] # !(sel_wire[0..0]) & data_wire[409..409]; - l1_w25_n7_mux_dataout = sel_wire[0..0] & data_wire[505..505] # !(sel_wire[0..0]) & data_wire[473..473]; - l1_w26_n0_mux_dataout = sel_wire[0..0] & data_wire[58..58] # !(sel_wire[0..0]) & data_wire[26..26]; - l1_w26_n1_mux_dataout = sel_wire[0..0] & data_wire[122..122] # !(sel_wire[0..0]) & data_wire[90..90]; - l1_w26_n2_mux_dataout = sel_wire[0..0] & data_wire[186..186] # !(sel_wire[0..0]) & data_wire[154..154]; - l1_w26_n3_mux_dataout = sel_wire[0..0] & data_wire[250..250] # !(sel_wire[0..0]) & data_wire[218..218]; - l1_w26_n4_mux_dataout = sel_wire[0..0] & data_wire[314..314] # !(sel_wire[0..0]) & data_wire[282..282]; - l1_w26_n5_mux_dataout = sel_wire[0..0] & data_wire[378..378] # !(sel_wire[0..0]) & data_wire[346..346]; - l1_w26_n6_mux_dataout = sel_wire[0..0] & data_wire[442..442] # !(sel_wire[0..0]) & data_wire[410..410]; - l1_w26_n7_mux_dataout = sel_wire[0..0] & data_wire[506..506] # !(sel_wire[0..0]) & data_wire[474..474]; - l1_w27_n0_mux_dataout = sel_wire[0..0] & data_wire[59..59] # !(sel_wire[0..0]) & data_wire[27..27]; - l1_w27_n1_mux_dataout = sel_wire[0..0] & data_wire[123..123] # !(sel_wire[0..0]) & data_wire[91..91]; - l1_w27_n2_mux_dataout = sel_wire[0..0] & data_wire[187..187] # !(sel_wire[0..0]) & data_wire[155..155]; - l1_w27_n3_mux_dataout = sel_wire[0..0] & data_wire[251..251] # !(sel_wire[0..0]) & data_wire[219..219]; - l1_w27_n4_mux_dataout = sel_wire[0..0] & data_wire[315..315] # !(sel_wire[0..0]) & data_wire[283..283]; - l1_w27_n5_mux_dataout = sel_wire[0..0] & data_wire[379..379] # !(sel_wire[0..0]) & data_wire[347..347]; - l1_w27_n6_mux_dataout = sel_wire[0..0] & data_wire[443..443] # !(sel_wire[0..0]) & data_wire[411..411]; - l1_w27_n7_mux_dataout = sel_wire[0..0] & data_wire[507..507] # !(sel_wire[0..0]) & data_wire[475..475]; - l1_w28_n0_mux_dataout = sel_wire[0..0] & data_wire[60..60] # !(sel_wire[0..0]) & data_wire[28..28]; - l1_w28_n1_mux_dataout = sel_wire[0..0] & data_wire[124..124] # !(sel_wire[0..0]) & data_wire[92..92]; - l1_w28_n2_mux_dataout = sel_wire[0..0] & data_wire[188..188] # !(sel_wire[0..0]) & data_wire[156..156]; - l1_w28_n3_mux_dataout = sel_wire[0..0] & data_wire[252..252] # !(sel_wire[0..0]) & data_wire[220..220]; - l1_w28_n4_mux_dataout = sel_wire[0..0] & data_wire[316..316] # !(sel_wire[0..0]) & data_wire[284..284]; - l1_w28_n5_mux_dataout = sel_wire[0..0] & data_wire[380..380] # !(sel_wire[0..0]) & data_wire[348..348]; - l1_w28_n6_mux_dataout = sel_wire[0..0] & data_wire[444..444] # !(sel_wire[0..0]) & data_wire[412..412]; - l1_w28_n7_mux_dataout = sel_wire[0..0] & data_wire[508..508] # !(sel_wire[0..0]) & data_wire[476..476]; - l1_w29_n0_mux_dataout = sel_wire[0..0] & data_wire[61..61] # !(sel_wire[0..0]) & data_wire[29..29]; - l1_w29_n1_mux_dataout = sel_wire[0..0] & data_wire[125..125] # !(sel_wire[0..0]) & data_wire[93..93]; - l1_w29_n2_mux_dataout = sel_wire[0..0] & data_wire[189..189] # !(sel_wire[0..0]) & data_wire[157..157]; - l1_w29_n3_mux_dataout = sel_wire[0..0] & data_wire[253..253] # !(sel_wire[0..0]) & data_wire[221..221]; - l1_w29_n4_mux_dataout = sel_wire[0..0] & data_wire[317..317] # !(sel_wire[0..0]) & data_wire[285..285]; - l1_w29_n5_mux_dataout = sel_wire[0..0] & data_wire[381..381] # !(sel_wire[0..0]) & data_wire[349..349]; - l1_w29_n6_mux_dataout = sel_wire[0..0] & data_wire[445..445] # !(sel_wire[0..0]) & data_wire[413..413]; - l1_w29_n7_mux_dataout = sel_wire[0..0] & data_wire[509..509] # !(sel_wire[0..0]) & data_wire[477..477]; - l1_w2_n0_mux_dataout = sel_wire[0..0] & data_wire[34..34] # !(sel_wire[0..0]) & data_wire[2..2]; - l1_w2_n1_mux_dataout = sel_wire[0..0] & data_wire[98..98] # !(sel_wire[0..0]) & data_wire[66..66]; - l1_w2_n2_mux_dataout = sel_wire[0..0] & data_wire[162..162] # !(sel_wire[0..0]) & data_wire[130..130]; - l1_w2_n3_mux_dataout = sel_wire[0..0] & data_wire[226..226] # !(sel_wire[0..0]) & data_wire[194..194]; - l1_w2_n4_mux_dataout = sel_wire[0..0] & data_wire[290..290] # !(sel_wire[0..0]) & data_wire[258..258]; - l1_w2_n5_mux_dataout = sel_wire[0..0] & data_wire[354..354] # !(sel_wire[0..0]) & data_wire[322..322]; - l1_w2_n6_mux_dataout = sel_wire[0..0] & data_wire[418..418] # !(sel_wire[0..0]) & data_wire[386..386]; - l1_w2_n7_mux_dataout = sel_wire[0..0] & data_wire[482..482] # !(sel_wire[0..0]) & data_wire[450..450]; - l1_w30_n0_mux_dataout = sel_wire[0..0] & data_wire[62..62] # !(sel_wire[0..0]) & data_wire[30..30]; - l1_w30_n1_mux_dataout = sel_wire[0..0] & data_wire[126..126] # !(sel_wire[0..0]) & data_wire[94..94]; - l1_w30_n2_mux_dataout = sel_wire[0..0] & data_wire[190..190] # !(sel_wire[0..0]) & data_wire[158..158]; - l1_w30_n3_mux_dataout = sel_wire[0..0] & data_wire[254..254] # !(sel_wire[0..0]) & data_wire[222..222]; - l1_w30_n4_mux_dataout = sel_wire[0..0] & data_wire[318..318] # !(sel_wire[0..0]) & data_wire[286..286]; - l1_w30_n5_mux_dataout = sel_wire[0..0] & data_wire[382..382] # !(sel_wire[0..0]) & data_wire[350..350]; - l1_w30_n6_mux_dataout = sel_wire[0..0] & data_wire[446..446] # !(sel_wire[0..0]) & data_wire[414..414]; - l1_w30_n7_mux_dataout = sel_wire[0..0] & data_wire[510..510] # !(sel_wire[0..0]) & data_wire[478..478]; - l1_w31_n0_mux_dataout = sel_wire[0..0] & data_wire[63..63] # !(sel_wire[0..0]) & data_wire[31..31]; - l1_w31_n1_mux_dataout = sel_wire[0..0] & data_wire[127..127] # !(sel_wire[0..0]) & data_wire[95..95]; - l1_w31_n2_mux_dataout = sel_wire[0..0] & data_wire[191..191] # !(sel_wire[0..0]) & data_wire[159..159]; - l1_w31_n3_mux_dataout = sel_wire[0..0] & data_wire[255..255] # !(sel_wire[0..0]) & data_wire[223..223]; - l1_w31_n4_mux_dataout = sel_wire[0..0] & data_wire[319..319] # !(sel_wire[0..0]) & data_wire[287..287]; - l1_w31_n5_mux_dataout = sel_wire[0..0] & data_wire[383..383] # !(sel_wire[0..0]) & data_wire[351..351]; - l1_w31_n6_mux_dataout = sel_wire[0..0] & data_wire[447..447] # !(sel_wire[0..0]) & data_wire[415..415]; - l1_w31_n7_mux_dataout = sel_wire[0..0] & data_wire[511..511] # !(sel_wire[0..0]) & data_wire[479..479]; - l1_w3_n0_mux_dataout = sel_wire[0..0] & data_wire[35..35] # !(sel_wire[0..0]) & data_wire[3..3]; - l1_w3_n1_mux_dataout = sel_wire[0..0] & data_wire[99..99] # !(sel_wire[0..0]) & data_wire[67..67]; - l1_w3_n2_mux_dataout = sel_wire[0..0] & data_wire[163..163] # !(sel_wire[0..0]) & data_wire[131..131]; - l1_w3_n3_mux_dataout = sel_wire[0..0] & data_wire[227..227] # !(sel_wire[0..0]) & data_wire[195..195]; - l1_w3_n4_mux_dataout = sel_wire[0..0] & data_wire[291..291] # !(sel_wire[0..0]) & data_wire[259..259]; - l1_w3_n5_mux_dataout = sel_wire[0..0] & data_wire[355..355] # !(sel_wire[0..0]) & data_wire[323..323]; - l1_w3_n6_mux_dataout = sel_wire[0..0] & data_wire[419..419] # !(sel_wire[0..0]) & data_wire[387..387]; - l1_w3_n7_mux_dataout = sel_wire[0..0] & data_wire[483..483] # !(sel_wire[0..0]) & data_wire[451..451]; - l1_w4_n0_mux_dataout = sel_wire[0..0] & data_wire[36..36] # !(sel_wire[0..0]) & data_wire[4..4]; - l1_w4_n1_mux_dataout = sel_wire[0..0] & data_wire[100..100] # !(sel_wire[0..0]) & data_wire[68..68]; - l1_w4_n2_mux_dataout = sel_wire[0..0] & data_wire[164..164] # !(sel_wire[0..0]) & data_wire[132..132]; - l1_w4_n3_mux_dataout = sel_wire[0..0] & data_wire[228..228] # !(sel_wire[0..0]) & data_wire[196..196]; - l1_w4_n4_mux_dataout = sel_wire[0..0] & data_wire[292..292] # !(sel_wire[0..0]) & data_wire[260..260]; - l1_w4_n5_mux_dataout = sel_wire[0..0] & data_wire[356..356] # !(sel_wire[0..0]) & data_wire[324..324]; - l1_w4_n6_mux_dataout = sel_wire[0..0] & data_wire[420..420] # !(sel_wire[0..0]) & data_wire[388..388]; - l1_w4_n7_mux_dataout = sel_wire[0..0] & data_wire[484..484] # !(sel_wire[0..0]) & data_wire[452..452]; - l1_w5_n0_mux_dataout = sel_wire[0..0] & data_wire[37..37] # !(sel_wire[0..0]) & data_wire[5..5]; - l1_w5_n1_mux_dataout = sel_wire[0..0] & data_wire[101..101] # !(sel_wire[0..0]) & data_wire[69..69]; - l1_w5_n2_mux_dataout = sel_wire[0..0] & data_wire[165..165] # !(sel_wire[0..0]) & data_wire[133..133]; - l1_w5_n3_mux_dataout = sel_wire[0..0] & data_wire[229..229] # !(sel_wire[0..0]) & data_wire[197..197]; - l1_w5_n4_mux_dataout = sel_wire[0..0] & data_wire[293..293] # !(sel_wire[0..0]) & data_wire[261..261]; - l1_w5_n5_mux_dataout = sel_wire[0..0] & data_wire[357..357] # !(sel_wire[0..0]) & data_wire[325..325]; - l1_w5_n6_mux_dataout = sel_wire[0..0] & data_wire[421..421] # !(sel_wire[0..0]) & data_wire[389..389]; - l1_w5_n7_mux_dataout = sel_wire[0..0] & data_wire[485..485] # !(sel_wire[0..0]) & data_wire[453..453]; - l1_w6_n0_mux_dataout = sel_wire[0..0] & data_wire[38..38] # !(sel_wire[0..0]) & data_wire[6..6]; - l1_w6_n1_mux_dataout = sel_wire[0..0] & data_wire[102..102] # !(sel_wire[0..0]) & data_wire[70..70]; - l1_w6_n2_mux_dataout = sel_wire[0..0] & data_wire[166..166] # !(sel_wire[0..0]) & data_wire[134..134]; - l1_w6_n3_mux_dataout = sel_wire[0..0] & data_wire[230..230] # !(sel_wire[0..0]) & data_wire[198..198]; - l1_w6_n4_mux_dataout = sel_wire[0..0] & data_wire[294..294] # !(sel_wire[0..0]) & data_wire[262..262]; - l1_w6_n5_mux_dataout = sel_wire[0..0] & data_wire[358..358] # !(sel_wire[0..0]) & data_wire[326..326]; - l1_w6_n6_mux_dataout = sel_wire[0..0] & data_wire[422..422] # !(sel_wire[0..0]) & data_wire[390..390]; - l1_w6_n7_mux_dataout = sel_wire[0..0] & data_wire[486..486] # !(sel_wire[0..0]) & data_wire[454..454]; - l1_w7_n0_mux_dataout = sel_wire[0..0] & data_wire[39..39] # !(sel_wire[0..0]) & data_wire[7..7]; - l1_w7_n1_mux_dataout = sel_wire[0..0] & data_wire[103..103] # !(sel_wire[0..0]) & data_wire[71..71]; - l1_w7_n2_mux_dataout = sel_wire[0..0] & data_wire[167..167] # !(sel_wire[0..0]) & data_wire[135..135]; - l1_w7_n3_mux_dataout = sel_wire[0..0] & data_wire[231..231] # !(sel_wire[0..0]) & data_wire[199..199]; - l1_w7_n4_mux_dataout = sel_wire[0..0] & data_wire[295..295] # !(sel_wire[0..0]) & data_wire[263..263]; - l1_w7_n5_mux_dataout = sel_wire[0..0] & data_wire[359..359] # !(sel_wire[0..0]) & data_wire[327..327]; - l1_w7_n6_mux_dataout = sel_wire[0..0] & data_wire[423..423] # !(sel_wire[0..0]) & data_wire[391..391]; - l1_w7_n7_mux_dataout = sel_wire[0..0] & data_wire[487..487] # !(sel_wire[0..0]) & data_wire[455..455]; - l1_w8_n0_mux_dataout = sel_wire[0..0] & data_wire[40..40] # !(sel_wire[0..0]) & data_wire[8..8]; - l1_w8_n1_mux_dataout = sel_wire[0..0] & data_wire[104..104] # !(sel_wire[0..0]) & data_wire[72..72]; - l1_w8_n2_mux_dataout = sel_wire[0..0] & data_wire[168..168] # !(sel_wire[0..0]) & data_wire[136..136]; - l1_w8_n3_mux_dataout = sel_wire[0..0] & data_wire[232..232] # !(sel_wire[0..0]) & data_wire[200..200]; - l1_w8_n4_mux_dataout = sel_wire[0..0] & data_wire[296..296] # !(sel_wire[0..0]) & data_wire[264..264]; - l1_w8_n5_mux_dataout = sel_wire[0..0] & data_wire[360..360] # !(sel_wire[0..0]) & data_wire[328..328]; - l1_w8_n6_mux_dataout = sel_wire[0..0] & data_wire[424..424] # !(sel_wire[0..0]) & data_wire[392..392]; - l1_w8_n7_mux_dataout = sel_wire[0..0] & data_wire[488..488] # !(sel_wire[0..0]) & data_wire[456..456]; - l1_w9_n0_mux_dataout = sel_wire[0..0] & data_wire[41..41] # !(sel_wire[0..0]) & data_wire[9..9]; - l1_w9_n1_mux_dataout = sel_wire[0..0] & data_wire[105..105] # !(sel_wire[0..0]) & data_wire[73..73]; - l1_w9_n2_mux_dataout = sel_wire[0..0] & data_wire[169..169] # !(sel_wire[0..0]) & data_wire[137..137]; - l1_w9_n3_mux_dataout = sel_wire[0..0] & data_wire[233..233] # !(sel_wire[0..0]) & data_wire[201..201]; - l1_w9_n4_mux_dataout = sel_wire[0..0] & data_wire[297..297] # !(sel_wire[0..0]) & data_wire[265..265]; - l1_w9_n5_mux_dataout = sel_wire[0..0] & data_wire[361..361] # !(sel_wire[0..0]) & data_wire[329..329]; - l1_w9_n6_mux_dataout = sel_wire[0..0] & data_wire[425..425] # !(sel_wire[0..0]) & data_wire[393..393]; - l1_w9_n7_mux_dataout = sel_wire[0..0] & data_wire[489..489] # !(sel_wire[0..0]) & data_wire[457..457]; - l2_w0_n0_mux_dataout = sel_wire[5..5] & data_wire[513..513] # !(sel_wire[5..5]) & data_wire[512..512]; - l2_w0_n1_mux_dataout = sel_wire[5..5] & data_wire[515..515] # !(sel_wire[5..5]) & data_wire[514..514]; - l2_w0_n2_mux_dataout = sel_wire[5..5] & data_wire[517..517] # !(sel_wire[5..5]) & data_wire[516..516]; - l2_w0_n3_mux_dataout = sel_wire[5..5] & data_wire[519..519] # !(sel_wire[5..5]) & data_wire[518..518]; - l2_w10_n0_mux_dataout = sel_wire[5..5] & data_wire[593..593] # !(sel_wire[5..5]) & data_wire[592..592]; - l2_w10_n1_mux_dataout = sel_wire[5..5] & data_wire[595..595] # !(sel_wire[5..5]) & data_wire[594..594]; - l2_w10_n2_mux_dataout = sel_wire[5..5] & data_wire[597..597] # !(sel_wire[5..5]) & data_wire[596..596]; - l2_w10_n3_mux_dataout = sel_wire[5..5] & data_wire[599..599] # !(sel_wire[5..5]) & data_wire[598..598]; - l2_w11_n0_mux_dataout = sel_wire[5..5] & data_wire[601..601] # !(sel_wire[5..5]) & data_wire[600..600]; - l2_w11_n1_mux_dataout = sel_wire[5..5] & data_wire[603..603] # !(sel_wire[5..5]) & data_wire[602..602]; - l2_w11_n2_mux_dataout = sel_wire[5..5] & data_wire[605..605] # !(sel_wire[5..5]) & data_wire[604..604]; - l2_w11_n3_mux_dataout = sel_wire[5..5] & data_wire[607..607] # !(sel_wire[5..5]) & data_wire[606..606]; - l2_w12_n0_mux_dataout = sel_wire[5..5] & data_wire[609..609] # !(sel_wire[5..5]) & data_wire[608..608]; - l2_w12_n1_mux_dataout = sel_wire[5..5] & data_wire[611..611] # !(sel_wire[5..5]) & data_wire[610..610]; - l2_w12_n2_mux_dataout = sel_wire[5..5] & data_wire[613..613] # !(sel_wire[5..5]) & data_wire[612..612]; - l2_w12_n3_mux_dataout = sel_wire[5..5] & data_wire[615..615] # !(sel_wire[5..5]) & data_wire[614..614]; - l2_w13_n0_mux_dataout = sel_wire[5..5] & data_wire[617..617] # !(sel_wire[5..5]) & data_wire[616..616]; - l2_w13_n1_mux_dataout = sel_wire[5..5] & data_wire[619..619] # !(sel_wire[5..5]) & data_wire[618..618]; - l2_w13_n2_mux_dataout = sel_wire[5..5] & data_wire[621..621] # !(sel_wire[5..5]) & data_wire[620..620]; - l2_w13_n3_mux_dataout = sel_wire[5..5] & data_wire[623..623] # !(sel_wire[5..5]) & data_wire[622..622]; - l2_w14_n0_mux_dataout = sel_wire[5..5] & data_wire[625..625] # !(sel_wire[5..5]) & data_wire[624..624]; - l2_w14_n1_mux_dataout = sel_wire[5..5] & data_wire[627..627] # !(sel_wire[5..5]) & data_wire[626..626]; - l2_w14_n2_mux_dataout = sel_wire[5..5] & data_wire[629..629] # !(sel_wire[5..5]) & data_wire[628..628]; - l2_w14_n3_mux_dataout = sel_wire[5..5] & data_wire[631..631] # !(sel_wire[5..5]) & data_wire[630..630]; - l2_w15_n0_mux_dataout = sel_wire[5..5] & data_wire[633..633] # !(sel_wire[5..5]) & data_wire[632..632]; - l2_w15_n1_mux_dataout = sel_wire[5..5] & data_wire[635..635] # !(sel_wire[5..5]) & data_wire[634..634]; - l2_w15_n2_mux_dataout = sel_wire[5..5] & data_wire[637..637] # !(sel_wire[5..5]) & data_wire[636..636]; - l2_w15_n3_mux_dataout = sel_wire[5..5] & data_wire[639..639] # !(sel_wire[5..5]) & data_wire[638..638]; - l2_w16_n0_mux_dataout = sel_wire[5..5] & data_wire[641..641] # !(sel_wire[5..5]) & data_wire[640..640]; - l2_w16_n1_mux_dataout = sel_wire[5..5] & data_wire[643..643] # !(sel_wire[5..5]) & data_wire[642..642]; - l2_w16_n2_mux_dataout = sel_wire[5..5] & data_wire[645..645] # !(sel_wire[5..5]) & data_wire[644..644]; - l2_w16_n3_mux_dataout = sel_wire[5..5] & data_wire[647..647] # !(sel_wire[5..5]) & data_wire[646..646]; - l2_w17_n0_mux_dataout = sel_wire[5..5] & data_wire[649..649] # !(sel_wire[5..5]) & data_wire[648..648]; - l2_w17_n1_mux_dataout = sel_wire[5..5] & data_wire[651..651] # !(sel_wire[5..5]) & data_wire[650..650]; - l2_w17_n2_mux_dataout = sel_wire[5..5] & data_wire[653..653] # !(sel_wire[5..5]) & data_wire[652..652]; - l2_w17_n3_mux_dataout = sel_wire[5..5] & data_wire[655..655] # !(sel_wire[5..5]) & data_wire[654..654]; - l2_w18_n0_mux_dataout = sel_wire[5..5] & data_wire[657..657] # !(sel_wire[5..5]) & data_wire[656..656]; - l2_w18_n1_mux_dataout = sel_wire[5..5] & data_wire[659..659] # !(sel_wire[5..5]) & data_wire[658..658]; - l2_w18_n2_mux_dataout = sel_wire[5..5] & data_wire[661..661] # !(sel_wire[5..5]) & data_wire[660..660]; - l2_w18_n3_mux_dataout = sel_wire[5..5] & data_wire[663..663] # !(sel_wire[5..5]) & data_wire[662..662]; - l2_w19_n0_mux_dataout = sel_wire[5..5] & data_wire[665..665] # !(sel_wire[5..5]) & data_wire[664..664]; - l2_w19_n1_mux_dataout = sel_wire[5..5] & data_wire[667..667] # !(sel_wire[5..5]) & data_wire[666..666]; - l2_w19_n2_mux_dataout = sel_wire[5..5] & data_wire[669..669] # !(sel_wire[5..5]) & data_wire[668..668]; - l2_w19_n3_mux_dataout = sel_wire[5..5] & data_wire[671..671] # !(sel_wire[5..5]) & data_wire[670..670]; - l2_w1_n0_mux_dataout = sel_wire[5..5] & data_wire[521..521] # !(sel_wire[5..5]) & data_wire[520..520]; - l2_w1_n1_mux_dataout = sel_wire[5..5] & data_wire[523..523] # !(sel_wire[5..5]) & data_wire[522..522]; - l2_w1_n2_mux_dataout = sel_wire[5..5] & data_wire[525..525] # !(sel_wire[5..5]) & data_wire[524..524]; - l2_w1_n3_mux_dataout = sel_wire[5..5] & data_wire[527..527] # !(sel_wire[5..5]) & data_wire[526..526]; - l2_w20_n0_mux_dataout = sel_wire[5..5] & data_wire[673..673] # !(sel_wire[5..5]) & data_wire[672..672]; - l2_w20_n1_mux_dataout = sel_wire[5..5] & data_wire[675..675] # !(sel_wire[5..5]) & data_wire[674..674]; - l2_w20_n2_mux_dataout = sel_wire[5..5] & data_wire[677..677] # !(sel_wire[5..5]) & data_wire[676..676]; - l2_w20_n3_mux_dataout = sel_wire[5..5] & data_wire[679..679] # !(sel_wire[5..5]) & data_wire[678..678]; - l2_w21_n0_mux_dataout = sel_wire[5..5] & data_wire[681..681] # !(sel_wire[5..5]) & data_wire[680..680]; - l2_w21_n1_mux_dataout = sel_wire[5..5] & data_wire[683..683] # !(sel_wire[5..5]) & data_wire[682..682]; - l2_w21_n2_mux_dataout = sel_wire[5..5] & data_wire[685..685] # !(sel_wire[5..5]) & data_wire[684..684]; - l2_w21_n3_mux_dataout = sel_wire[5..5] & data_wire[687..687] # !(sel_wire[5..5]) & data_wire[686..686]; - l2_w22_n0_mux_dataout = sel_wire[5..5] & data_wire[689..689] # !(sel_wire[5..5]) & data_wire[688..688]; - l2_w22_n1_mux_dataout = sel_wire[5..5] & data_wire[691..691] # !(sel_wire[5..5]) & data_wire[690..690]; - l2_w22_n2_mux_dataout = sel_wire[5..5] & data_wire[693..693] # !(sel_wire[5..5]) & data_wire[692..692]; - l2_w22_n3_mux_dataout = sel_wire[5..5] & data_wire[695..695] # !(sel_wire[5..5]) & data_wire[694..694]; - l2_w23_n0_mux_dataout = sel_wire[5..5] & data_wire[697..697] # !(sel_wire[5..5]) & data_wire[696..696]; - l2_w23_n1_mux_dataout = sel_wire[5..5] & data_wire[699..699] # !(sel_wire[5..5]) & data_wire[698..698]; - l2_w23_n2_mux_dataout = sel_wire[5..5] & data_wire[701..701] # !(sel_wire[5..5]) & data_wire[700..700]; - l2_w23_n3_mux_dataout = sel_wire[5..5] & data_wire[703..703] # !(sel_wire[5..5]) & data_wire[702..702]; - l2_w24_n0_mux_dataout = sel_wire[5..5] & data_wire[705..705] # !(sel_wire[5..5]) & data_wire[704..704]; - l2_w24_n1_mux_dataout = sel_wire[5..5] & data_wire[707..707] # !(sel_wire[5..5]) & data_wire[706..706]; - l2_w24_n2_mux_dataout = sel_wire[5..5] & data_wire[709..709] # !(sel_wire[5..5]) & data_wire[708..708]; - l2_w24_n3_mux_dataout = sel_wire[5..5] & data_wire[711..711] # !(sel_wire[5..5]) & data_wire[710..710]; - l2_w25_n0_mux_dataout = sel_wire[5..5] & data_wire[713..713] # !(sel_wire[5..5]) & data_wire[712..712]; - l2_w25_n1_mux_dataout = sel_wire[5..5] & data_wire[715..715] # !(sel_wire[5..5]) & data_wire[714..714]; - l2_w25_n2_mux_dataout = sel_wire[5..5] & data_wire[717..717] # !(sel_wire[5..5]) & data_wire[716..716]; - l2_w25_n3_mux_dataout = sel_wire[5..5] & data_wire[719..719] # !(sel_wire[5..5]) & data_wire[718..718]; - l2_w26_n0_mux_dataout = sel_wire[5..5] & data_wire[721..721] # !(sel_wire[5..5]) & data_wire[720..720]; - l2_w26_n1_mux_dataout = sel_wire[5..5] & data_wire[723..723] # !(sel_wire[5..5]) & data_wire[722..722]; - l2_w26_n2_mux_dataout = sel_wire[5..5] & data_wire[725..725] # !(sel_wire[5..5]) & data_wire[724..724]; - l2_w26_n3_mux_dataout = sel_wire[5..5] & data_wire[727..727] # !(sel_wire[5..5]) & data_wire[726..726]; - l2_w27_n0_mux_dataout = sel_wire[5..5] & data_wire[729..729] # !(sel_wire[5..5]) & data_wire[728..728]; - l2_w27_n1_mux_dataout = sel_wire[5..5] & data_wire[731..731] # !(sel_wire[5..5]) & data_wire[730..730]; - l2_w27_n2_mux_dataout = sel_wire[5..5] & data_wire[733..733] # !(sel_wire[5..5]) & data_wire[732..732]; - l2_w27_n3_mux_dataout = sel_wire[5..5] & data_wire[735..735] # !(sel_wire[5..5]) & data_wire[734..734]; - l2_w28_n0_mux_dataout = sel_wire[5..5] & data_wire[737..737] # !(sel_wire[5..5]) & data_wire[736..736]; - l2_w28_n1_mux_dataout = sel_wire[5..5] & data_wire[739..739] # !(sel_wire[5..5]) & data_wire[738..738]; - l2_w28_n2_mux_dataout = sel_wire[5..5] & data_wire[741..741] # !(sel_wire[5..5]) & data_wire[740..740]; - l2_w28_n3_mux_dataout = sel_wire[5..5] & data_wire[743..743] # !(sel_wire[5..5]) & data_wire[742..742]; - l2_w29_n0_mux_dataout = sel_wire[5..5] & data_wire[745..745] # !(sel_wire[5..5]) & data_wire[744..744]; - l2_w29_n1_mux_dataout = sel_wire[5..5] & data_wire[747..747] # !(sel_wire[5..5]) & data_wire[746..746]; - l2_w29_n2_mux_dataout = sel_wire[5..5] & data_wire[749..749] # !(sel_wire[5..5]) & data_wire[748..748]; - l2_w29_n3_mux_dataout = sel_wire[5..5] & data_wire[751..751] # !(sel_wire[5..5]) & data_wire[750..750]; - l2_w2_n0_mux_dataout = sel_wire[5..5] & data_wire[529..529] # !(sel_wire[5..5]) & data_wire[528..528]; - l2_w2_n1_mux_dataout = sel_wire[5..5] & data_wire[531..531] # !(sel_wire[5..5]) & data_wire[530..530]; - l2_w2_n2_mux_dataout = sel_wire[5..5] & data_wire[533..533] # !(sel_wire[5..5]) & data_wire[532..532]; - l2_w2_n3_mux_dataout = sel_wire[5..5] & data_wire[535..535] # !(sel_wire[5..5]) & data_wire[534..534]; - l2_w30_n0_mux_dataout = sel_wire[5..5] & data_wire[753..753] # !(sel_wire[5..5]) & data_wire[752..752]; - l2_w30_n1_mux_dataout = sel_wire[5..5] & data_wire[755..755] # !(sel_wire[5..5]) & data_wire[754..754]; - l2_w30_n2_mux_dataout = sel_wire[5..5] & data_wire[757..757] # !(sel_wire[5..5]) & data_wire[756..756]; - l2_w30_n3_mux_dataout = sel_wire[5..5] & data_wire[759..759] # !(sel_wire[5..5]) & data_wire[758..758]; - l2_w31_n0_mux_dataout = sel_wire[5..5] & data_wire[761..761] # !(sel_wire[5..5]) & data_wire[760..760]; - l2_w31_n1_mux_dataout = sel_wire[5..5] & data_wire[763..763] # !(sel_wire[5..5]) & data_wire[762..762]; - l2_w31_n2_mux_dataout = sel_wire[5..5] & data_wire[765..765] # !(sel_wire[5..5]) & data_wire[764..764]; - l2_w31_n3_mux_dataout = sel_wire[5..5] & data_wire[767..767] # !(sel_wire[5..5]) & data_wire[766..766]; - l2_w3_n0_mux_dataout = sel_wire[5..5] & data_wire[537..537] # !(sel_wire[5..5]) & data_wire[536..536]; - l2_w3_n1_mux_dataout = sel_wire[5..5] & data_wire[539..539] # !(sel_wire[5..5]) & data_wire[538..538]; - l2_w3_n2_mux_dataout = sel_wire[5..5] & data_wire[541..541] # !(sel_wire[5..5]) & data_wire[540..540]; - l2_w3_n3_mux_dataout = sel_wire[5..5] & data_wire[543..543] # !(sel_wire[5..5]) & data_wire[542..542]; - l2_w4_n0_mux_dataout = sel_wire[5..5] & data_wire[545..545] # !(sel_wire[5..5]) & data_wire[544..544]; - l2_w4_n1_mux_dataout = sel_wire[5..5] & data_wire[547..547] # !(sel_wire[5..5]) & data_wire[546..546]; - l2_w4_n2_mux_dataout = sel_wire[5..5] & data_wire[549..549] # !(sel_wire[5..5]) & data_wire[548..548]; - l2_w4_n3_mux_dataout = sel_wire[5..5] & data_wire[551..551] # !(sel_wire[5..5]) & data_wire[550..550]; - l2_w5_n0_mux_dataout = sel_wire[5..5] & data_wire[553..553] # !(sel_wire[5..5]) & data_wire[552..552]; - l2_w5_n1_mux_dataout = sel_wire[5..5] & data_wire[555..555] # !(sel_wire[5..5]) & data_wire[554..554]; - l2_w5_n2_mux_dataout = sel_wire[5..5] & data_wire[557..557] # !(sel_wire[5..5]) & data_wire[556..556]; - l2_w5_n3_mux_dataout = sel_wire[5..5] & data_wire[559..559] # !(sel_wire[5..5]) & data_wire[558..558]; - l2_w6_n0_mux_dataout = sel_wire[5..5] & data_wire[561..561] # !(sel_wire[5..5]) & data_wire[560..560]; - l2_w6_n1_mux_dataout = sel_wire[5..5] & data_wire[563..563] # !(sel_wire[5..5]) & data_wire[562..562]; - l2_w6_n2_mux_dataout = sel_wire[5..5] & data_wire[565..565] # !(sel_wire[5..5]) & data_wire[564..564]; - l2_w6_n3_mux_dataout = sel_wire[5..5] & data_wire[567..567] # !(sel_wire[5..5]) & data_wire[566..566]; - l2_w7_n0_mux_dataout = sel_wire[5..5] & data_wire[569..569] # !(sel_wire[5..5]) & data_wire[568..568]; - l2_w7_n1_mux_dataout = sel_wire[5..5] & data_wire[571..571] # !(sel_wire[5..5]) & data_wire[570..570]; - l2_w7_n2_mux_dataout = sel_wire[5..5] & data_wire[573..573] # !(sel_wire[5..5]) & data_wire[572..572]; - l2_w7_n3_mux_dataout = sel_wire[5..5] & data_wire[575..575] # !(sel_wire[5..5]) & data_wire[574..574]; - l2_w8_n0_mux_dataout = sel_wire[5..5] & data_wire[577..577] # !(sel_wire[5..5]) & data_wire[576..576]; - l2_w8_n1_mux_dataout = sel_wire[5..5] & data_wire[579..579] # !(sel_wire[5..5]) & data_wire[578..578]; - l2_w8_n2_mux_dataout = sel_wire[5..5] & data_wire[581..581] # !(sel_wire[5..5]) & data_wire[580..580]; - l2_w8_n3_mux_dataout = sel_wire[5..5] & data_wire[583..583] # !(sel_wire[5..5]) & data_wire[582..582]; - l2_w9_n0_mux_dataout = sel_wire[5..5] & data_wire[585..585] # !(sel_wire[5..5]) & data_wire[584..584]; - l2_w9_n1_mux_dataout = sel_wire[5..5] & data_wire[587..587] # !(sel_wire[5..5]) & data_wire[586..586]; - l2_w9_n2_mux_dataout = sel_wire[5..5] & data_wire[589..589] # !(sel_wire[5..5]) & data_wire[588..588]; - l2_w9_n3_mux_dataout = sel_wire[5..5] & data_wire[591..591] # !(sel_wire[5..5]) & data_wire[590..590]; - l3_w0_n0_mux_dataout = sel_wire[10..10] & data_wire[769..769] # !(sel_wire[10..10]) & data_wire[768..768]; - l3_w0_n1_mux_dataout = sel_wire[10..10] & data_wire[771..771] # !(sel_wire[10..10]) & data_wire[770..770]; - l3_w10_n0_mux_dataout = sel_wire[10..10] & data_wire[809..809] # !(sel_wire[10..10]) & data_wire[808..808]; - l3_w10_n1_mux_dataout = sel_wire[10..10] & data_wire[811..811] # !(sel_wire[10..10]) & data_wire[810..810]; - l3_w11_n0_mux_dataout = sel_wire[10..10] & data_wire[813..813] # !(sel_wire[10..10]) & data_wire[812..812]; - l3_w11_n1_mux_dataout = sel_wire[10..10] & data_wire[815..815] # !(sel_wire[10..10]) & data_wire[814..814]; - l3_w12_n0_mux_dataout = sel_wire[10..10] & data_wire[817..817] # !(sel_wire[10..10]) & data_wire[816..816]; - l3_w12_n1_mux_dataout = sel_wire[10..10] & data_wire[819..819] # !(sel_wire[10..10]) & data_wire[818..818]; - l3_w13_n0_mux_dataout = sel_wire[10..10] & data_wire[821..821] # !(sel_wire[10..10]) & data_wire[820..820]; - l3_w13_n1_mux_dataout = sel_wire[10..10] & data_wire[823..823] # !(sel_wire[10..10]) & data_wire[822..822]; - l3_w14_n0_mux_dataout = sel_wire[10..10] & data_wire[825..825] # !(sel_wire[10..10]) & data_wire[824..824]; - l3_w14_n1_mux_dataout = sel_wire[10..10] & data_wire[827..827] # !(sel_wire[10..10]) & data_wire[826..826]; - l3_w15_n0_mux_dataout = sel_wire[10..10] & data_wire[829..829] # !(sel_wire[10..10]) & data_wire[828..828]; - l3_w15_n1_mux_dataout = sel_wire[10..10] & data_wire[831..831] # !(sel_wire[10..10]) & data_wire[830..830]; - l3_w16_n0_mux_dataout = sel_wire[10..10] & data_wire[833..833] # !(sel_wire[10..10]) & data_wire[832..832]; - l3_w16_n1_mux_dataout = sel_wire[10..10] & data_wire[835..835] # !(sel_wire[10..10]) & data_wire[834..834]; - l3_w17_n0_mux_dataout = sel_wire[10..10] & data_wire[837..837] # !(sel_wire[10..10]) & data_wire[836..836]; - l3_w17_n1_mux_dataout = sel_wire[10..10] & data_wire[839..839] # !(sel_wire[10..10]) & data_wire[838..838]; - l3_w18_n0_mux_dataout = sel_wire[10..10] & data_wire[841..841] # !(sel_wire[10..10]) & data_wire[840..840]; - l3_w18_n1_mux_dataout = sel_wire[10..10] & data_wire[843..843] # !(sel_wire[10..10]) & data_wire[842..842]; - l3_w19_n0_mux_dataout = sel_wire[10..10] & data_wire[845..845] # !(sel_wire[10..10]) & data_wire[844..844]; - l3_w19_n1_mux_dataout = sel_wire[10..10] & data_wire[847..847] # !(sel_wire[10..10]) & data_wire[846..846]; - l3_w1_n0_mux_dataout = sel_wire[10..10] & data_wire[773..773] # !(sel_wire[10..10]) & data_wire[772..772]; - l3_w1_n1_mux_dataout = sel_wire[10..10] & data_wire[775..775] # !(sel_wire[10..10]) & data_wire[774..774]; - l3_w20_n0_mux_dataout = sel_wire[10..10] & data_wire[849..849] # !(sel_wire[10..10]) & data_wire[848..848]; - l3_w20_n1_mux_dataout = sel_wire[10..10] & data_wire[851..851] # !(sel_wire[10..10]) & data_wire[850..850]; - l3_w21_n0_mux_dataout = sel_wire[10..10] & data_wire[853..853] # !(sel_wire[10..10]) & data_wire[852..852]; - l3_w21_n1_mux_dataout = sel_wire[10..10] & data_wire[855..855] # !(sel_wire[10..10]) & data_wire[854..854]; - l3_w22_n0_mux_dataout = sel_wire[10..10] & data_wire[857..857] # !(sel_wire[10..10]) & data_wire[856..856]; - l3_w22_n1_mux_dataout = sel_wire[10..10] & data_wire[859..859] # !(sel_wire[10..10]) & data_wire[858..858]; - l3_w23_n0_mux_dataout = sel_wire[10..10] & data_wire[861..861] # !(sel_wire[10..10]) & data_wire[860..860]; - l3_w23_n1_mux_dataout = sel_wire[10..10] & data_wire[863..863] # !(sel_wire[10..10]) & data_wire[862..862]; - l3_w24_n0_mux_dataout = sel_wire[10..10] & data_wire[865..865] # !(sel_wire[10..10]) & data_wire[864..864]; - l3_w24_n1_mux_dataout = sel_wire[10..10] & data_wire[867..867] # !(sel_wire[10..10]) & data_wire[866..866]; - l3_w25_n0_mux_dataout = sel_wire[10..10] & data_wire[869..869] # !(sel_wire[10..10]) & data_wire[868..868]; - l3_w25_n1_mux_dataout = sel_wire[10..10] & data_wire[871..871] # !(sel_wire[10..10]) & data_wire[870..870]; - l3_w26_n0_mux_dataout = sel_wire[10..10] & data_wire[873..873] # !(sel_wire[10..10]) & data_wire[872..872]; - l3_w26_n1_mux_dataout = sel_wire[10..10] & data_wire[875..875] # !(sel_wire[10..10]) & data_wire[874..874]; - l3_w27_n0_mux_dataout = sel_wire[10..10] & data_wire[877..877] # !(sel_wire[10..10]) & data_wire[876..876]; - l3_w27_n1_mux_dataout = sel_wire[10..10] & data_wire[879..879] # !(sel_wire[10..10]) & data_wire[878..878]; - l3_w28_n0_mux_dataout = sel_wire[10..10] & data_wire[881..881] # !(sel_wire[10..10]) & data_wire[880..880]; - l3_w28_n1_mux_dataout = sel_wire[10..10] & data_wire[883..883] # !(sel_wire[10..10]) & data_wire[882..882]; - l3_w29_n0_mux_dataout = sel_wire[10..10] & data_wire[885..885] # !(sel_wire[10..10]) & data_wire[884..884]; - l3_w29_n1_mux_dataout = sel_wire[10..10] & data_wire[887..887] # !(sel_wire[10..10]) & data_wire[886..886]; - l3_w2_n0_mux_dataout = sel_wire[10..10] & data_wire[777..777] # !(sel_wire[10..10]) & data_wire[776..776]; - l3_w2_n1_mux_dataout = sel_wire[10..10] & data_wire[779..779] # !(sel_wire[10..10]) & data_wire[778..778]; - l3_w30_n0_mux_dataout = sel_wire[10..10] & data_wire[889..889] # !(sel_wire[10..10]) & data_wire[888..888]; - l3_w30_n1_mux_dataout = sel_wire[10..10] & data_wire[891..891] # !(sel_wire[10..10]) & data_wire[890..890]; - l3_w31_n0_mux_dataout = sel_wire[10..10] & data_wire[893..893] # !(sel_wire[10..10]) & data_wire[892..892]; - l3_w31_n1_mux_dataout = sel_wire[10..10] & data_wire[895..895] # !(sel_wire[10..10]) & data_wire[894..894]; - l3_w3_n0_mux_dataout = sel_wire[10..10] & data_wire[781..781] # !(sel_wire[10..10]) & data_wire[780..780]; - l3_w3_n1_mux_dataout = sel_wire[10..10] & data_wire[783..783] # !(sel_wire[10..10]) & data_wire[782..782]; - l3_w4_n0_mux_dataout = sel_wire[10..10] & data_wire[785..785] # !(sel_wire[10..10]) & data_wire[784..784]; - l3_w4_n1_mux_dataout = sel_wire[10..10] & data_wire[787..787] # !(sel_wire[10..10]) & data_wire[786..786]; - l3_w5_n0_mux_dataout = sel_wire[10..10] & data_wire[789..789] # !(sel_wire[10..10]) & data_wire[788..788]; - l3_w5_n1_mux_dataout = sel_wire[10..10] & data_wire[791..791] # !(sel_wire[10..10]) & data_wire[790..790]; - l3_w6_n0_mux_dataout = sel_wire[10..10] & data_wire[793..793] # !(sel_wire[10..10]) & data_wire[792..792]; - l3_w6_n1_mux_dataout = sel_wire[10..10] & data_wire[795..795] # !(sel_wire[10..10]) & data_wire[794..794]; - l3_w7_n0_mux_dataout = sel_wire[10..10] & data_wire[797..797] # !(sel_wire[10..10]) & data_wire[796..796]; - l3_w7_n1_mux_dataout = sel_wire[10..10] & data_wire[799..799] # !(sel_wire[10..10]) & data_wire[798..798]; - l3_w8_n0_mux_dataout = sel_wire[10..10] & data_wire[801..801] # !(sel_wire[10..10]) & data_wire[800..800]; - l3_w8_n1_mux_dataout = sel_wire[10..10] & data_wire[803..803] # !(sel_wire[10..10]) & data_wire[802..802]; - l3_w9_n0_mux_dataout = sel_wire[10..10] & data_wire[805..805] # !(sel_wire[10..10]) & data_wire[804..804]; - l3_w9_n1_mux_dataout = sel_wire[10..10] & data_wire[807..807] # !(sel_wire[10..10]) & data_wire[806..806]; - l4_w0_n0_mux_dataout = sel_wire[15..15] & data_wire[897..897] # !(sel_wire[15..15]) & data_wire[896..896]; - l4_w10_n0_mux_dataout = sel_wire[15..15] & data_wire[917..917] # !(sel_wire[15..15]) & data_wire[916..916]; - l4_w11_n0_mux_dataout = sel_wire[15..15] & data_wire[919..919] # !(sel_wire[15..15]) & data_wire[918..918]; - l4_w12_n0_mux_dataout = sel_wire[15..15] & data_wire[921..921] # !(sel_wire[15..15]) & data_wire[920..920]; - l4_w13_n0_mux_dataout = sel_wire[15..15] & data_wire[923..923] # !(sel_wire[15..15]) & data_wire[922..922]; - l4_w14_n0_mux_dataout = sel_wire[15..15] & data_wire[925..925] # !(sel_wire[15..15]) & data_wire[924..924]; - l4_w15_n0_mux_dataout = sel_wire[15..15] & data_wire[927..927] # !(sel_wire[15..15]) & data_wire[926..926]; - l4_w16_n0_mux_dataout = sel_wire[15..15] & data_wire[929..929] # !(sel_wire[15..15]) & data_wire[928..928]; - l4_w17_n0_mux_dataout = sel_wire[15..15] & data_wire[931..931] # !(sel_wire[15..15]) & data_wire[930..930]; - l4_w18_n0_mux_dataout = sel_wire[15..15] & data_wire[933..933] # !(sel_wire[15..15]) & data_wire[932..932]; - l4_w19_n0_mux_dataout = sel_wire[15..15] & data_wire[935..935] # !(sel_wire[15..15]) & data_wire[934..934]; - l4_w1_n0_mux_dataout = sel_wire[15..15] & data_wire[899..899] # !(sel_wire[15..15]) & data_wire[898..898]; - l4_w20_n0_mux_dataout = sel_wire[15..15] & data_wire[937..937] # !(sel_wire[15..15]) & data_wire[936..936]; - l4_w21_n0_mux_dataout = sel_wire[15..15] & data_wire[939..939] # !(sel_wire[15..15]) & data_wire[938..938]; - l4_w22_n0_mux_dataout = sel_wire[15..15] & data_wire[941..941] # !(sel_wire[15..15]) & data_wire[940..940]; - l4_w23_n0_mux_dataout = sel_wire[15..15] & data_wire[943..943] # !(sel_wire[15..15]) & data_wire[942..942]; - l4_w24_n0_mux_dataout = sel_wire[15..15] & data_wire[945..945] # !(sel_wire[15..15]) & data_wire[944..944]; - l4_w25_n0_mux_dataout = sel_wire[15..15] & data_wire[947..947] # !(sel_wire[15..15]) & data_wire[946..946]; - l4_w26_n0_mux_dataout = sel_wire[15..15] & data_wire[949..949] # !(sel_wire[15..15]) & data_wire[948..948]; - l4_w27_n0_mux_dataout = sel_wire[15..15] & data_wire[951..951] # !(sel_wire[15..15]) & data_wire[950..950]; - l4_w28_n0_mux_dataout = sel_wire[15..15] & data_wire[953..953] # !(sel_wire[15..15]) & data_wire[952..952]; - l4_w29_n0_mux_dataout = sel_wire[15..15] & data_wire[955..955] # !(sel_wire[15..15]) & data_wire[954..954]; - l4_w2_n0_mux_dataout = sel_wire[15..15] & data_wire[901..901] # !(sel_wire[15..15]) & data_wire[900..900]; - l4_w30_n0_mux_dataout = sel_wire[15..15] & data_wire[957..957] # !(sel_wire[15..15]) & data_wire[956..956]; - l4_w31_n0_mux_dataout = sel_wire[15..15] & data_wire[959..959] # !(sel_wire[15..15]) & data_wire[958..958]; - l4_w3_n0_mux_dataout = sel_wire[15..15] & data_wire[903..903] # !(sel_wire[15..15]) & data_wire[902..902]; - l4_w4_n0_mux_dataout = sel_wire[15..15] & data_wire[905..905] # !(sel_wire[15..15]) & data_wire[904..904]; - l4_w5_n0_mux_dataout = sel_wire[15..15] & data_wire[907..907] # !(sel_wire[15..15]) & data_wire[906..906]; - l4_w6_n0_mux_dataout = sel_wire[15..15] & data_wire[909..909] # !(sel_wire[15..15]) & data_wire[908..908]; - l4_w7_n0_mux_dataout = sel_wire[15..15] & data_wire[911..911] # !(sel_wire[15..15]) & data_wire[910..910]; - l4_w8_n0_mux_dataout = sel_wire[15..15] & data_wire[913..913] # !(sel_wire[15..15]) & data_wire[912..912]; - l4_w9_n0_mux_dataout = sel_wire[15..15] & data_wire[915..915] # !(sel_wire[15..15]) & data_wire[914..914]; - data_wire[] = ( l3_w31_n1_mux_dataout, l3_w31_n0_mux_dataout, l3_w30_n1_mux_dataout, l3_w30_n0_mux_dataout, l3_w29_n1_mux_dataout, l3_w29_n0_mux_dataout, l3_w28_n1_mux_dataout, l3_w28_n0_mux_dataout, l3_w27_n1_mux_dataout, l3_w27_n0_mux_dataout, l3_w26_n1_mux_dataout, l3_w26_n0_mux_dataout, l3_w25_n1_mux_dataout, l3_w25_n0_mux_dataout, l3_w24_n1_mux_dataout, l3_w24_n0_mux_dataout, l3_w23_n1_mux_dataout, l3_w23_n0_mux_dataout, l3_w22_n1_mux_dataout, l3_w22_n0_mux_dataout, l3_w21_n1_mux_dataout, l3_w21_n0_mux_dataout, l3_w20_n1_mux_dataout, l3_w20_n0_mux_dataout, l3_w19_n1_mux_dataout, l3_w19_n0_mux_dataout, l3_w18_n1_mux_dataout, l3_w18_n0_mux_dataout, l3_w17_n1_mux_dataout, l3_w17_n0_mux_dataout, l3_w16_n1_mux_dataout, l3_w16_n0_mux_dataout, l3_w15_n1_mux_dataout, l3_w15_n0_mux_dataout, l3_w14_n1_mux_dataout, l3_w14_n0_mux_dataout, l3_w13_n1_mux_dataout, l3_w13_n0_mux_dataout, l3_w12_n1_mux_dataout, l3_w12_n0_mux_dataout, l3_w11_n1_mux_dataout, l3_w11_n0_mux_dataout, l3_w10_n1_mux_dataout, l3_w10_n0_mux_dataout, l3_w9_n1_mux_dataout, l3_w9_n0_mux_dataout, l3_w8_n1_mux_dataout, l3_w8_n0_mux_dataout, l3_w7_n1_mux_dataout, l3_w7_n0_mux_dataout, l3_w6_n1_mux_dataout, l3_w6_n0_mux_dataout, l3_w5_n1_mux_dataout, l3_w5_n0_mux_dataout, l3_w4_n1_mux_dataout, l3_w4_n0_mux_dataout, l3_w3_n1_mux_dataout, l3_w3_n0_mux_dataout, l3_w2_n1_mux_dataout, l3_w2_n0_mux_dataout, l3_w1_n1_mux_dataout, l3_w1_n0_mux_dataout, l3_w0_n1_mux_dataout, l3_w0_n0_mux_dataout, l2_w31_n3_mux_dataout, l2_w31_n2_mux_dataout, l2_w31_n1_mux_dataout, l2_w31_n0_mux_dataout, l2_w30_n3_mux_dataout, l2_w30_n2_mux_dataout, l2_w30_n1_mux_dataout, l2_w30_n0_mux_dataout, l2_w29_n3_mux_dataout, l2_w29_n2_mux_dataout, l2_w29_n1_mux_dataout, l2_w29_n0_mux_dataout, l2_w28_n3_mux_dataout, l2_w28_n2_mux_dataout, l2_w28_n1_mux_dataout, l2_w28_n0_mux_dataout, l2_w27_n3_mux_dataout, l2_w27_n2_mux_dataout, l2_w27_n1_mux_dataout, l2_w27_n0_mux_dataout, l2_w26_n3_mux_dataout, l2_w26_n2_mux_dataout, l2_w26_n1_mux_dataout, l2_w26_n0_mux_dataout, l2_w25_n3_mux_dataout, l2_w25_n2_mux_dataout, l2_w25_n1_mux_dataout, l2_w25_n0_mux_dataout, l2_w24_n3_mux_dataout, l2_w24_n2_mux_dataout, l2_w24_n1_mux_dataout, l2_w24_n0_mux_dataout, l2_w23_n3_mux_dataout, l2_w23_n2_mux_dataout, l2_w23_n1_mux_dataout, l2_w23_n0_mux_dataout, l2_w22_n3_mux_dataout, l2_w22_n2_mux_dataout, l2_w22_n1_mux_dataout, l2_w22_n0_mux_dataout, l2_w21_n3_mux_dataout, l2_w21_n2_mux_dataout, l2_w21_n1_mux_dataout, l2_w21_n0_mux_dataout, l2_w20_n3_mux_dataout, l2_w20_n2_mux_dataout, l2_w20_n1_mux_dataout, l2_w20_n0_mux_dataout, l2_w19_n3_mux_dataout, l2_w19_n2_mux_dataout, l2_w19_n1_mux_dataout, l2_w19_n0_mux_dataout, l2_w18_n3_mux_dataout, l2_w18_n2_mux_dataout, l2_w18_n1_mux_dataout, l2_w18_n0_mux_dataout, l2_w17_n3_mux_dataout, l2_w17_n2_mux_dataout, l2_w17_n1_mux_dataout, l2_w17_n0_mux_dataout, l2_w16_n3_mux_dataout, l2_w16_n2_mux_dataout, l2_w16_n1_mux_dataout, l2_w16_n0_mux_dataout, l2_w15_n3_mux_dataout, l2_w15_n2_mux_dataout, l2_w15_n1_mux_dataout, l2_w15_n0_mux_dataout, l2_w14_n3_mux_dataout, l2_w14_n2_mux_dataout, l2_w14_n1_mux_dataout, l2_w14_n0_mux_dataout, l2_w13_n3_mux_dataout, l2_w13_n2_mux_dataout, l2_w13_n1_mux_dataout, l2_w13_n0_mux_dataout, l2_w12_n3_mux_dataout, l2_w12_n2_mux_dataout, l2_w12_n1_mux_dataout, l2_w12_n0_mux_dataout, l2_w11_n3_mux_dataout, l2_w11_n2_mux_dataout, l2_w11_n1_mux_dataout, l2_w11_n0_mux_dataout, l2_w10_n3_mux_dataout, l2_w10_n2_mux_dataout, l2_w10_n1_mux_dataout, l2_w10_n0_mux_dataout, l2_w9_n3_mux_dataout, l2_w9_n2_mux_dataout, l2_w9_n1_mux_dataout, l2_w9_n0_mux_dataout, l2_w8_n3_mux_dataout, l2_w8_n2_mux_dataout, l2_w8_n1_mux_dataout, l2_w8_n0_mux_dataout, l2_w7_n3_mux_dataout, l2_w7_n2_mux_dataout, l2_w7_n1_mux_dataout, l2_w7_n0_mux_dataout, l2_w6_n3_mux_dataout, l2_w6_n2_mux_dataout, l2_w6_n1_mux_dataout, l2_w6_n0_mux_dataout, l2_w5_n3_mux_dataout, l2_w5_n2_mux_dataout, l2_w5_n1_mux_dataout, l2_w5_n0_mux_dataout, l2_w4_n3_mux_dataout, l2_w4_n2_mux_dataout, l2_w4_n1_mux_dataout, l2_w4_n0_mux_dataout, l2_w3_n3_mux_dataout, l2_w3_n2_mux_dataout, l2_w3_n1_mux_dataout, l2_w3_n0_mux_dataout, l2_w2_n3_mux_dataout, l2_w2_n2_mux_dataout, l2_w2_n1_mux_dataout, l2_w2_n0_mux_dataout, l2_w1_n3_mux_dataout, l2_w1_n2_mux_dataout, l2_w1_n1_mux_dataout, l2_w1_n0_mux_dataout, l2_w0_n3_mux_dataout, l2_w0_n2_mux_dataout, l2_w0_n1_mux_dataout, l2_w0_n0_mux_dataout, l1_w31_n7_mux_dataout, l1_w31_n6_mux_dataout, l1_w31_n5_mux_dataout, l1_w31_n4_mux_dataout, l1_w31_n3_mux_dataout, l1_w31_n2_mux_dataout, l1_w31_n1_mux_dataout, l1_w31_n0_mux_dataout, l1_w30_n7_mux_dataout, l1_w30_n6_mux_dataout, l1_w30_n5_mux_dataout, l1_w30_n4_mux_dataout, l1_w30_n3_mux_dataout, l1_w30_n2_mux_dataout, l1_w30_n1_mux_dataout, l1_w30_n0_mux_dataout, l1_w29_n7_mux_dataout, l1_w29_n6_mux_dataout, l1_w29_n5_mux_dataout, l1_w29_n4_mux_dataout, l1_w29_n3_mux_dataout, l1_w29_n2_mux_dataout, l1_w29_n1_mux_dataout, l1_w29_n0_mux_dataout, l1_w28_n7_mux_dataout, l1_w28_n6_mux_dataout, l1_w28_n5_mux_dataout, l1_w28_n4_mux_dataout, l1_w28_n3_mux_dataout, l1_w28_n2_mux_dataout, l1_w28_n1_mux_dataout, l1_w28_n0_mux_dataout, l1_w27_n7_mux_dataout, l1_w27_n6_mux_dataout, l1_w27_n5_mux_dataout, l1_w27_n4_mux_dataout, l1_w27_n3_mux_dataout, l1_w27_n2_mux_dataout, l1_w27_n1_mux_dataout, l1_w27_n0_mux_dataout, l1_w26_n7_mux_dataout, l1_w26_n6_mux_dataout, l1_w26_n5_mux_dataout, l1_w26_n4_mux_dataout, l1_w26_n3_mux_dataout, l1_w26_n2_mux_dataout, l1_w26_n1_mux_dataout, l1_w26_n0_mux_dataout, l1_w25_n7_mux_dataout, l1_w25_n6_mux_dataout, l1_w25_n5_mux_dataout, l1_w25_n4_mux_dataout, l1_w25_n3_mux_dataout, l1_w25_n2_mux_dataout, l1_w25_n1_mux_dataout, l1_w25_n0_mux_dataout, l1_w24_n7_mux_dataout, l1_w24_n6_mux_dataout, l1_w24_n5_mux_dataout, l1_w24_n4_mux_dataout, l1_w24_n3_mux_dataout, l1_w24_n2_mux_dataout, l1_w24_n1_mux_dataout, l1_w24_n0_mux_dataout, l1_w23_n7_mux_dataout, l1_w23_n6_mux_dataout, l1_w23_n5_mux_dataout, l1_w23_n4_mux_dataout, l1_w23_n3_mux_dataout, l1_w23_n2_mux_dataout, l1_w23_n1_mux_dataout, l1_w23_n0_mux_dataout, l1_w22_n7_mux_dataout, l1_w22_n6_mux_dataout, l1_w22_n5_mux_dataout, l1_w22_n4_mux_dataout, l1_w22_n3_mux_dataout, l1_w22_n2_mux_dataout, l1_w22_n1_mux_dataout, l1_w22_n0_mux_dataout, l1_w21_n7_mux_dataout, l1_w21_n6_mux_dataout, l1_w21_n5_mux_dataout, l1_w21_n4_mux_dataout, l1_w21_n3_mux_dataout, l1_w21_n2_mux_dataout, l1_w21_n1_mux_dataout, l1_w21_n0_mux_dataout, l1_w20_n7_mux_dataout, l1_w20_n6_mux_dataout, l1_w20_n5_mux_dataout, l1_w20_n4_mux_dataout, l1_w20_n3_mux_dataout, l1_w20_n2_mux_dataout, l1_w20_n1_mux_dataout, l1_w20_n0_mux_dataout, l1_w19_n7_mux_dataout, l1_w19_n6_mux_dataout, l1_w19_n5_mux_dataout, l1_w19_n4_mux_dataout, l1_w19_n3_mux_dataout, l1_w19_n2_mux_dataout, l1_w19_n1_mux_dataout, l1_w19_n0_mux_dataout, l1_w18_n7_mux_dataout, l1_w18_n6_mux_dataout, l1_w18_n5_mux_dataout, l1_w18_n4_mux_dataout, l1_w18_n3_mux_dataout, l1_w18_n2_mux_dataout, l1_w18_n1_mux_dataout, l1_w18_n0_mux_dataout, l1_w17_n7_mux_dataout, l1_w17_n6_mux_dataout, l1_w17_n5_mux_dataout, l1_w17_n4_mux_dataout, l1_w17_n3_mux_dataout, l1_w17_n2_mux_dataout, l1_w17_n1_mux_dataout, l1_w17_n0_mux_dataout, l1_w16_n7_mux_dataout, l1_w16_n6_mux_dataout, l1_w16_n5_mux_dataout, l1_w16_n4_mux_dataout, l1_w16_n3_mux_dataout, l1_w16_n2_mux_dataout, l1_w16_n1_mux_dataout, l1_w16_n0_mux_dataout, l1_w15_n7_mux_dataout, l1_w15_n6_mux_dataout, l1_w15_n5_mux_dataout, l1_w15_n4_mux_dataout, l1_w15_n3_mux_dataout, l1_w15_n2_mux_dataout, l1_w15_n1_mux_dataout, l1_w15_n0_mux_dataout, l1_w14_n7_mux_dataout, l1_w14_n6_mux_dataout, l1_w14_n5_mux_dataout, l1_w14_n4_mux_dataout, l1_w14_n3_mux_dataout, l1_w14_n2_mux_dataout, l1_w14_n1_mux_dataout, l1_w14_n0_mux_dataout, l1_w13_n7_mux_dataout, l1_w13_n6_mux_dataout, l1_w13_n5_mux_dataout, l1_w13_n4_mux_dataout, l1_w13_n3_mux_dataout, l1_w13_n2_mux_dataout, l1_w13_n1_mux_dataout, l1_w13_n0_mux_dataout, l1_w12_n7_mux_dataout, l1_w12_n6_mux_dataout, l1_w12_n5_mux_dataout, l1_w12_n4_mux_dataout, l1_w12_n3_mux_dataout, l1_w12_n2_mux_dataout, l1_w12_n1_mux_dataout, l1_w12_n0_mux_dataout, l1_w11_n7_mux_dataout, l1_w11_n6_mux_dataout, l1_w11_n5_mux_dataout, l1_w11_n4_mux_dataout, l1_w11_n3_mux_dataout, l1_w11_n2_mux_dataout, l1_w11_n1_mux_dataout, l1_w11_n0_mux_dataout, l1_w10_n7_mux_dataout, l1_w10_n6_mux_dataout, l1_w10_n5_mux_dataout, l1_w10_n4_mux_dataout, l1_w10_n3_mux_dataout, l1_w10_n2_mux_dataout, l1_w10_n1_mux_dataout, l1_w10_n0_mux_dataout, l1_w9_n7_mux_dataout, l1_w9_n6_mux_dataout, l1_w9_n5_mux_dataout, l1_w9_n4_mux_dataout, l1_w9_n3_mux_dataout, l1_w9_n2_mux_dataout, l1_w9_n1_mux_dataout, l1_w9_n0_mux_dataout, l1_w8_n7_mux_dataout, l1_w8_n6_mux_dataout, l1_w8_n5_mux_dataout, l1_w8_n4_mux_dataout, l1_w8_n3_mux_dataout, l1_w8_n2_mux_dataout, l1_w8_n1_mux_dataout, l1_w8_n0_mux_dataout, l1_w7_n7_mux_dataout, l1_w7_n6_mux_dataout, l1_w7_n5_mux_dataout, l1_w7_n4_mux_dataout, l1_w7_n3_mux_dataout, l1_w7_n2_mux_dataout, l1_w7_n1_mux_dataout, l1_w7_n0_mux_dataout, l1_w6_n7_mux_dataout, l1_w6_n6_mux_dataout, l1_w6_n5_mux_dataout, l1_w6_n4_mux_dataout, l1_w6_n3_mux_dataout, l1_w6_n2_mux_dataout, l1_w6_n1_mux_dataout, l1_w6_n0_mux_dataout, l1_w5_n7_mux_dataout, l1_w5_n6_mux_dataout, l1_w5_n5_mux_dataout, l1_w5_n4_mux_dataout, l1_w5_n3_mux_dataout, l1_w5_n2_mux_dataout, l1_w5_n1_mux_dataout, l1_w5_n0_mux_dataout, l1_w4_n7_mux_dataout, l1_w4_n6_mux_dataout, l1_w4_n5_mux_dataout, l1_w4_n4_mux_dataout, l1_w4_n3_mux_dataout, l1_w4_n2_mux_dataout, l1_w4_n1_mux_dataout, l1_w4_n0_mux_dataout, l1_w3_n7_mux_dataout, l1_w3_n6_mux_dataout, l1_w3_n5_mux_dataout, l1_w3_n4_mux_dataout, l1_w3_n3_mux_dataout, l1_w3_n2_mux_dataout, l1_w3_n1_mux_dataout, l1_w3_n0_mux_dataout, l1_w2_n7_mux_dataout, l1_w2_n6_mux_dataout, l1_w2_n5_mux_dataout, l1_w2_n4_mux_dataout, l1_w2_n3_mux_dataout, l1_w2_n2_mux_dataout, l1_w2_n1_mux_dataout, l1_w2_n0_mux_dataout, l1_w1_n7_mux_dataout, l1_w1_n6_mux_dataout, l1_w1_n5_mux_dataout, l1_w1_n4_mux_dataout, l1_w1_n3_mux_dataout, l1_w1_n2_mux_dataout, l1_w1_n1_mux_dataout, l1_w1_n0_mux_dataout, l1_w0_n7_mux_dataout, l1_w0_n6_mux_dataout, l1_w0_n5_mux_dataout, l1_w0_n4_mux_dataout, l1_w0_n3_mux_dataout, l1_w0_n2_mux_dataout, l1_w0_n1_mux_dataout, l1_w0_n0_mux_dataout, data[]); - result[] = result_wire_ext[]; - result_wire_ext[] = ( l4_w31_n0_mux_dataout, l4_w30_n0_mux_dataout, l4_w29_n0_mux_dataout, l4_w28_n0_mux_dataout, l4_w27_n0_mux_dataout, l4_w26_n0_mux_dataout, l4_w25_n0_mux_dataout, l4_w24_n0_mux_dataout, l4_w23_n0_mux_dataout, l4_w22_n0_mux_dataout, l4_w21_n0_mux_dataout, l4_w20_n0_mux_dataout, l4_w19_n0_mux_dataout, l4_w18_n0_mux_dataout, l4_w17_n0_mux_dataout, l4_w16_n0_mux_dataout, l4_w15_n0_mux_dataout, l4_w14_n0_mux_dataout, l4_w13_n0_mux_dataout, l4_w12_n0_mux_dataout, l4_w11_n0_mux_dataout, l4_w10_n0_mux_dataout, l4_w9_n0_mux_dataout, l4_w8_n0_mux_dataout, l4_w7_n0_mux_dataout, l4_w6_n0_mux_dataout, l4_w5_n0_mux_dataout, l4_w4_n0_mux_dataout, l4_w3_n0_mux_dataout, l4_w2_n0_mux_dataout, l4_w1_n0_mux_dataout, l4_w0_n0_mux_dataout); - sel_wire[] = ( sel[3..3], B"0000", sel[2..2], B"0000", sel[1..1], B"0000", sel[0..0]); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_lale.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_lale.tdf deleted file mode 100644 index cc7e370..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_lale.tdf +++ /dev/null @@ -1,112 +0,0 @@ ---scfifo ADD_RAM_OUTPUT_REGISTER="ON" ALLOW_RWCYCLE_WHEN_FULL="OFF" ALMOST_EMPTY_VALUE=2 ALMOST_FULL_VALUE=26 CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LPM_NUMWORDS=32 LPM_SHOWAHEAD="ON" LPM_WIDTH=9 LPM_WIDTHU=5 OPTIMIZE_FOR_SPEED=5 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" USE_EAB="ON" aclr(gnd) almost_empty almost_full clock data empty full q rdreq sclr usedw wrreq ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" INTENDED_DEVICE_FAMILY="Agilex" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_counter 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_fifo_common 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_counter 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_scfifo 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION a_dpfifo_pa9f (clock, data[8..0], rreq, sclr, wreq) -RETURNS ( empty, full, q[8..0], usedw[4..0]); - ---synthesis_resources = altera_counter 3 ram_bits (AUTO) 288 reg 15 -SUBDESIGN scfifo_lale -( - aclr : input; - almost_empty : output; - almost_full : output; - clock : input; - data[8..0] : input; - empty : output; - full : output; - q[8..0] : output; - rdreq : input; - sclr : input; - usedw[4..0] : output; - wrreq : input; -) -VARIABLE - dpfifo : a_dpfifo_pa9f; - dffe_af : dffe; - dffe_nae : dffe; - const_node_aclr : NODE; - comparison_ae0 : WIRE; - comparison_ae1 : WIRE; - comparison_ae2 : WIRE; - comparison_ae3 : WIRE; - comparison_ae4 : WIRE; - comparison_af0 : WIRE; - comparison_af1 : WIRE; - comparison_af2 : WIRE; - comparison_af3 : WIRE; - comparison_af4 : WIRE; - comparison_pre_ae0 : WIRE; - comparison_pre_ae1 : WIRE; - comparison_pre_ae2 : WIRE; - comparison_pre_ae3 : WIRE; - comparison_pre_ae4 : WIRE; - comparison_pre_af0 : WIRE; - comparison_pre_af1 : WIRE; - comparison_pre_af2 : WIRE; - comparison_pre_af3 : WIRE; - comparison_pre_af4 : WIRE; - wire_ae[4..0] : WIRE; - wire_af[4..0] : WIRE; - wire_pre_ae[4..0] : WIRE; - wire_pre_af[4..0] : WIRE; - -BEGIN - dpfifo.clock = clock; - dpfifo.data[] = data[]; - dpfifo.rreq = rdreq; - dpfifo.sclr = sclr; - dpfifo.wreq = wrreq; - dffe_af.clk = clock; - dffe_af.d = ((dffe_af.q & (dffe_af.q $ (sclr # ((comparison_af4 & (! wrreq)) & rdreq)))) # ((! dffe_af.q) & ((((! sclr) & comparison_pre_af4) & wrreq) & (! rdreq)))); - dffe_nae.clk = clock; - dffe_nae.d = ((dffe_nae.q & (dffe_nae.q $ (sclr # ((comparison_ae4 & (! wrreq)) & (rdreq & (! dpfifo.empty)))))) # ((! dffe_nae.q) & ((((! sclr) & comparison_pre_ae4) & wrreq) & (! (rdreq & (! dpfifo.empty)))))); - const_node_aclr = aclr; - almost_empty = (! dffe_nae.q); - almost_full = dffe_af.q; - comparison_ae0 = (dpfifo.usedw[0..0] $ wire_ae[0..0]); - comparison_ae1 = ((dpfifo.usedw[1..1] $ wire_ae[1..1]) & comparison_ae0); - comparison_ae2 = ((dpfifo.usedw[2..2] $ wire_ae[2..2]) & comparison_ae1); - comparison_ae3 = ((dpfifo.usedw[3..3] $ wire_ae[3..3]) & comparison_ae2); - comparison_ae4 = ((dpfifo.usedw[4..4] $ wire_ae[4..4]) & comparison_ae3); - comparison_af0 = (dpfifo.usedw[0..0] $ wire_af[0..0]); - comparison_af1 = ((dpfifo.usedw[1..1] $ wire_af[1..1]) & comparison_af0); - comparison_af2 = ((dpfifo.usedw[2..2] $ wire_af[2..2]) & comparison_af1); - comparison_af3 = ((dpfifo.usedw[3..3] $ wire_af[3..3]) & comparison_af2); - comparison_af4 = ((dpfifo.usedw[4..4] $ wire_af[4..4]) & comparison_af3); - comparison_pre_ae0 = (dpfifo.usedw[0..0] $ wire_pre_ae[0..0]); - comparison_pre_ae1 = ((dpfifo.usedw[1..1] $ wire_pre_ae[1..1]) & comparison_pre_ae0); - comparison_pre_ae2 = ((dpfifo.usedw[2..2] $ wire_pre_ae[2..2]) & comparison_pre_ae1); - comparison_pre_ae3 = ((dpfifo.usedw[3..3] $ wire_pre_ae[3..3]) & comparison_pre_ae2); - comparison_pre_ae4 = ((dpfifo.usedw[4..4] $ wire_pre_ae[4..4]) & comparison_pre_ae3); - comparison_pre_af0 = (dpfifo.usedw[0..0] $ wire_pre_af[0..0]); - comparison_pre_af1 = ((dpfifo.usedw[1..1] $ wire_pre_af[1..1]) & comparison_pre_af0); - comparison_pre_af2 = ((dpfifo.usedw[2..2] $ wire_pre_af[2..2]) & comparison_pre_af1); - comparison_pre_af3 = ((dpfifo.usedw[3..3] $ wire_pre_af[3..3]) & comparison_pre_af2); - comparison_pre_af4 = ((dpfifo.usedw[4..4] $ wire_pre_af[4..4]) & comparison_pre_af3); - empty = dpfifo.empty; - full = dpfifo.full; - q[] = dpfifo.q[]; - usedw[] = dpfifo.usedw[]; - wire_ae[] = ( B"1", B"1", B"1", B"0", B"1"); - wire_af[] = ( B"0", B"0", B"1", B"0", B"1"); - wire_pre_ae[] = ( B"1", B"1", B"1", B"1", B"0"); - wire_pre_af[] = ( B"0", B"0", B"1", B"1", B"0"); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_n8hs.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_n8hs.tdf deleted file mode 100644 index 2c493f1..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/scfifo_n8hs.tdf +++ /dev/null @@ -1,112 +0,0 @@ ---scfifo ADD_RAM_OUTPUT_REGISTER="ON" ALLOW_RWCYCLE_WHEN_FULL="OFF" ALMOST_EMPTY_VALUE=2 ALMOST_FULL_VALUE=26 CBX_SINGLE_OUTPUT_FILE="OFF" DEVICE_FAMILY="Agilex 5" ENABLE_ECC="FALSE" LPM_NUMWORDS=32 LPM_SHOWAHEAD="ON" LPM_WIDTH=266 LPM_WIDTHU=5 OPTIMIZE_FOR_SPEED=5 OVERFLOW_CHECKING="OFF" UNDERFLOW_CHECKING="OFF" USE_EAB="ON" aclr(gnd) almost_empty almost_full clock data empty full q rdreq sclr usedw wrreq ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CARRY_CHAIN="MANUAL" CYCLONEII_M4K_COMPATIBILITY="ON" INTENDED_DEVICE_FAMILY="Agilex" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 ---VERSION_BEGIN 26.1 cbx_altdpram 2026:03:19:21:42:37:SC cbx_altera_counter 2026:03:19:21:42:37:SC cbx_altera_syncram 2026:03:19:21:42:37:SC cbx_altera_syncram_ltm 2026:03:19:21:42:37:SC cbx_altera_syncram_nd_impl 2026:03:19:21:42:37:SC cbx_altsyncram 2026:03:19:21:42:37:SC cbx_fifo_common 2026:03:19:21:42:37:SC cbx_libertymesa 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_compare 2026:03:19:21:42:37:SC cbx_lpm_counter 2026:03:19:21:42:37:SC cbx_lpm_decode 2026:03:19:21:42:37:SC cbx_lpm_mux 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_scfifo 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_stratixiii 2026:03:19:21:42:37:SC cbx_stratixv 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION a_dpfifo_rntb1 (clock, data[265..0], rreq, sclr, wreq) -RETURNS ( empty, full, q[265..0], usedw[4..0]); - ---synthesis_resources = altera_counter 3 ram_bits (AUTO) 8512 reg 15 -SUBDESIGN scfifo_n8hs -( - aclr : input; - almost_empty : output; - almost_full : output; - clock : input; - data[265..0] : input; - empty : output; - full : output; - q[265..0] : output; - rdreq : input; - sclr : input; - usedw[4..0] : output; - wrreq : input; -) -VARIABLE - dpfifo : a_dpfifo_rntb1; - dffe_af : dffe; - dffe_nae : dffe; - const_node_aclr : NODE; - comparison_ae0 : WIRE; - comparison_ae1 : WIRE; - comparison_ae2 : WIRE; - comparison_ae3 : WIRE; - comparison_ae4 : WIRE; - comparison_af0 : WIRE; - comparison_af1 : WIRE; - comparison_af2 : WIRE; - comparison_af3 : WIRE; - comparison_af4 : WIRE; - comparison_pre_ae0 : WIRE; - comparison_pre_ae1 : WIRE; - comparison_pre_ae2 : WIRE; - comparison_pre_ae3 : WIRE; - comparison_pre_ae4 : WIRE; - comparison_pre_af0 : WIRE; - comparison_pre_af1 : WIRE; - comparison_pre_af2 : WIRE; - comparison_pre_af3 : WIRE; - comparison_pre_af4 : WIRE; - wire_ae[4..0] : WIRE; - wire_af[4..0] : WIRE; - wire_pre_ae[4..0] : WIRE; - wire_pre_af[4..0] : WIRE; - -BEGIN - dpfifo.clock = clock; - dpfifo.data[] = data[]; - dpfifo.rreq = rdreq; - dpfifo.sclr = sclr; - dpfifo.wreq = wrreq; - dffe_af.clk = clock; - dffe_af.d = ((dffe_af.q & (dffe_af.q $ (sclr # ((comparison_af4 & (! wrreq)) & rdreq)))) # ((! dffe_af.q) & ((((! sclr) & comparison_pre_af4) & wrreq) & (! rdreq)))); - dffe_nae.clk = clock; - dffe_nae.d = ((dffe_nae.q & (dffe_nae.q $ (sclr # ((comparison_ae4 & (! wrreq)) & (rdreq & (! dpfifo.empty)))))) # ((! dffe_nae.q) & ((((! sclr) & comparison_pre_ae4) & wrreq) & (! (rdreq & (! dpfifo.empty)))))); - const_node_aclr = aclr; - almost_empty = (! dffe_nae.q); - almost_full = dffe_af.q; - comparison_ae0 = (dpfifo.usedw[0..0] $ wire_ae[0..0]); - comparison_ae1 = ((dpfifo.usedw[1..1] $ wire_ae[1..1]) & comparison_ae0); - comparison_ae2 = ((dpfifo.usedw[2..2] $ wire_ae[2..2]) & comparison_ae1); - comparison_ae3 = ((dpfifo.usedw[3..3] $ wire_ae[3..3]) & comparison_ae2); - comparison_ae4 = ((dpfifo.usedw[4..4] $ wire_ae[4..4]) & comparison_ae3); - comparison_af0 = (dpfifo.usedw[0..0] $ wire_af[0..0]); - comparison_af1 = ((dpfifo.usedw[1..1] $ wire_af[1..1]) & comparison_af0); - comparison_af2 = ((dpfifo.usedw[2..2] $ wire_af[2..2]) & comparison_af1); - comparison_af3 = ((dpfifo.usedw[3..3] $ wire_af[3..3]) & comparison_af2); - comparison_af4 = ((dpfifo.usedw[4..4] $ wire_af[4..4]) & comparison_af3); - comparison_pre_ae0 = (dpfifo.usedw[0..0] $ wire_pre_ae[0..0]); - comparison_pre_ae1 = ((dpfifo.usedw[1..1] $ wire_pre_ae[1..1]) & comparison_pre_ae0); - comparison_pre_ae2 = ((dpfifo.usedw[2..2] $ wire_pre_ae[2..2]) & comparison_pre_ae1); - comparison_pre_ae3 = ((dpfifo.usedw[3..3] $ wire_pre_ae[3..3]) & comparison_pre_ae2); - comparison_pre_ae4 = ((dpfifo.usedw[4..4] $ wire_pre_ae[4..4]) & comparison_pre_ae3); - comparison_pre_af0 = (dpfifo.usedw[0..0] $ wire_pre_af[0..0]); - comparison_pre_af1 = ((dpfifo.usedw[1..1] $ wire_pre_af[1..1]) & comparison_pre_af0); - comparison_pre_af2 = ((dpfifo.usedw[2..2] $ wire_pre_af[2..2]) & comparison_pre_af1); - comparison_pre_af3 = ((dpfifo.usedw[3..3] $ wire_pre_af[3..3]) & comparison_pre_af2); - comparison_pre_af4 = ((dpfifo.usedw[4..4] $ wire_pre_af[4..4]) & comparison_pre_af3); - empty = dpfifo.empty; - full = dpfifo.full; - q[] = dpfifo.q[]; - usedw[] = dpfifo.usedw[]; - wire_ae[] = ( B"1", B"1", B"1", B"0", B"1"); - wire_af[] = ( B"0", B"0", B"1", B"0", B"1"); - wire_pre_ae[] = ( B"1", B"1", B"1", B"1", B"0"); - wire_pre_af[] = ( B"0", B"0", B"1", B"1", B"0"); -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/sign_div_unsign_1bss1.tdf b/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/sign_div_unsign_1bss1.tdf deleted file mode 100644 index 2dd8159..0000000 --- a/synth/de25_nano/top_psmct32_raster_demo/tmp-clearbox/de25_nano_psmct32_raster_demo_top/2231719/sign_div_unsign_1bss1.tdf +++ /dev/null @@ -1,47 +0,0 @@ ---sign_div_unsign CBX_SINGLE_OUTPUT_FILE="OFF" DEN_REPRESENTATION="UNSIGNED" DEN_WIDTH=2 LPM_PIPELINE=0 MAXIMIZE_SPEED=5 NUM_REPRESENTATION="UNSIGNED" NUM_WIDTH=4 SKIP_BITS=0 denominator numerator quotient remainder ---VERSION_BEGIN 26.1 cbx_lpm_abs 2026:03:19:21:42:37:SC cbx_lpm_add_sub 2026:03:19:21:42:37:SC cbx_lpm_divide 2026:03:19:21:42:37:SC cbx_mgl 2026:03:19:21:42:40:SC cbx_nadder 2026:03:19:21:42:37:SC cbx_stratix 2026:03:19:21:42:37:SC cbx_stratixii 2026:03:19:21:42:37:SC cbx_util_mgl 2026:03:19:21:42:37:SC VERSION_END - - --- Copyright (C) 2026 Altera Corporation. All rights reserved. --- Your use of Altera Corporation's design tools, logic functions --- and other software and tools, and any partner logic --- functions, and any output files from any of the foregoing --- (including device programming or simulation files), and any --- associated documentation or information are expressly subject --- to the terms and conditions of the Altera Program License --- Subscription Agreement, the Altera Quartus Prime License Agreement, --- the Altera IP License Agreement, or other applicable license --- agreement, including, without limitation, that your use is for --- the sole purpose of programming logic devices manufactured by --- Altera and sold by Altera or its authorized distributors. Please --- refer to the Altera Software License Subscription Agreements --- on the Quartus Prime software download page. - - -FUNCTION alt_u_div_8oak (denominator[1..0], numerator[3..0]) -RETURNS ( quotient[3..0], remainder[1..0]); - ---synthesis_resources = lut 13 -SUBDESIGN sign_div_unsign_1bss1 -( - denominator[1..0] : input; - numerator[3..0] : input; - quotient[3..0] : output; - remainder[1..0] : output; -) -VARIABLE - divider : alt_u_div_8oak; - norm_num[3..0] : WIRE; - protect_quotient[3..0] : WIRE; - protect_remainder[1..0] : WIRE; - -BEGIN - divider.denominator[] = denominator[]; - divider.numerator[] = norm_num[]; - norm_num[] = numerator[]; - protect_quotient[] = divider.quotient[]; - protect_remainder[] = divider.remainder[]; - quotient[] = protect_quotient[]; - remainder[] = protect_remainder[]; -END; ---VALID FILE diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qpf b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qpf new file mode 100644 index 0000000..b053e3d --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qpf @@ -0,0 +1,31 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2025 Altera Corporation. All rights reserved. +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and any partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, the Altera Quartus Prime License Agreement, +# the Altera IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Altera and sold by Altera or its authorized distributors. Please +# refer to the Altera Software License Subscription Agreements +# on the Quartus Prime software download page. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 25.3.1 Build 100 12/19/2025 Patches 1.02 SC Pro Edition +# Date created = 19:21:51 July 15, 2026 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "25.3" +DATE = "19:21:51 July 15, 2026" + +# Revisions + +PROJECT_REVISION = "de25_nano_psmct32_raster_demo_top" diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qsf b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qsf new file mode 120000 index 0000000..bdd1820 --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.qsf @@ -0,0 +1 @@ +/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.qsf \ No newline at end of file diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.sdc b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.sdc new file mode 120000 index 0000000..8986d9b --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/de25_nano_psmct32_raster_demo_top.sdc @@ -0,0 +1 @@ +/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/de25_nano_psmct32_raster_demo_top.sdc \ No newline at end of file diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/ip b/synth/de25_nano/top_psmct32_raster_demo/work/ip new file mode 120000 index 0000000..adb34b7 --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/ip @@ -0,0 +1 @@ +/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/ip \ No newline at end of file diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/rtl b/synth/de25_nano/top_psmct32_raster_demo/work/rtl new file mode 120000 index 0000000..8d14b97 --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/rtl @@ -0,0 +1 @@ +/home/ubuntu/FPGA_Projects/retroDE_ps2/rtl \ No newline at end of file diff --git a/synth/de25_nano/top_psmct32_raster_demo/work/sim b/synth/de25_nano/top_psmct32_raster_demo/work/sim new file mode 120000 index 0000000..b08e36d --- /dev/null +++ b/synth/de25_nano/top_psmct32_raster_demo/work/sim @@ -0,0 +1 @@ +/home/ubuntu/FPGA_Projects/retroDE_ps2/sim \ No newline at end of file diff --git a/tools/analyze_zsched_fb.py b/tools/analyze_zsched_fb.py new file mode 100644 index 0000000..c7459fc --- /dev/null +++ b/tools/analyze_zsched_fb.py @@ -0,0 +1,395 @@ +#!/usr/bin/env python3 +"""Score a Ch357 ZSCHED framebuffer dump. + +The z/paint/replay owner modes compare against the dump-derived texture oracle. +The replay-color mode is the hard board/RTL content check: it replays the emitted +fragment trace colors through the same clamp16 GEQUAL persistent-Z rule and +compares the framebuffer colors directly. + +Usage: + tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem + tools/analyze_zsched_fb.py --owner paint + tools/analyze_zsched_fb.py --owner replay --frags sim/traces/rtl/zsched_frags.txt + tools/analyze_zsched_fb.py --owner replay-color --frags sim/traces/rtl/zsched_frags.txt + tools/analyze_zsched_fb.py --owner replay --radius 8 + tools/analyze_zsched_fb.py --maps +""" +import os +import re +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") + + +def load_mem(path): + vals = [] + with open(path) as f: + for ln in f: + s = ln.strip() + if not s or s.startswith("//"): + continue + vals.append(int(s, 16) & 0xFFFFFFFF) + return vals + + +def parse_params(tag): + path = os.path.join(DATA, f"sh3_{tag}_params.vh") + txt = open(path).read() + out = {} + for key in ("FBPXW", "FBH", "TW", "TH", "N_EPOCHS"): + m = re.search(rf"localparam\s+int\s+{key}\s*=\s*([0-9]+)\s*;", txt) + if not m: + raise SystemExit(f"[analyze] missing {key} in {path}") + out[key] = int(m.group(1)) + return out + + +def cell(idx, pal, tw, u, v): + lin = v * tw + u + w = idx[lin // 4] + ix = (w >> (8 * (lin % 4))) & 0xFF + return pal[ix] & 0xFFFFFF + + +def match_radius(fbc, idx, pal, tw, th, tu, tv, max_radius): + for rad in range(max_radius + 1): + for du in range(-rad, rad + 1): + for dv in range(-rad, rad + 1): + if max(abs(du), abs(dv)) != rad: + continue + uu = tu + du + vv = tv + dv + if 0 <= uu < tw and 0 <= vv < th and fbc == cell(idx, pal, tw, uu, vv): + return rad + return None + + +def write_maps(prefix, w, h, fb, status): + try: + from PIL import Image + except Exception: + print("[analyze] PIL not available; skipping maps") + return + + colors = { + 0: (0, 0, 0), # uncovered + 1: (0, 180, 0), # owner exact + 2: (170, 170, 0), # owner <=1 texel + 3: (0, 80, 220), # wrong owner/other covering epoch + 4: (220, 0, 0), # no covering epoch match + 5: (255, 0, 255), # no palette + } + img = Image.new("RGB", (w, h)) + for o, st in enumerate(status): + img.putpixel((o % w, o // w), colors.get(st, (255, 255, 255))) + out = f"{prefix}_class.png" + img.resize((w * 3, h * 3), Image.NEAREST).save(out) + print(f"[analyze] wrote {out}") + + diff = Image.new("RGB", (w, h)) + for o, px in enumerate(fb[:w * h]): + if status[o] in (4, 5): + diff.putpixel((o % w, o // w), (255, 0, 0)) + else: + diff.putpixel((o % w, o // w), (px & 0xFF, (px >> 8) & 0xFF, (px >> 16) & 0xFF)) + out = f"{prefix}_bad_overlay.png" + diff.resize((w * 3, h * 3), Image.NEAREST).save(out) + print(f"[analyze] wrote {out}") + + +def replay_owner(frags, npx, w): + zbuf = [-1] * npx + z_owner = [-1] * npx + paint_owner = [-1] * npx + cov = [0] * npx + with open(frags) as f: + for ln in f: + p = ln.split() + if len(p) < 5: + continue + ep = int(p[0]) + x = int(p[1]) + y = int(p[2]) + z = int(p[3]) + o = y * w + x + if o < 0 or o >= npx: + continue + zq = 0xFFFF if z > 0xFFFF else (0 if z < 0 else z) + cov[o] = 1 + paint_owner[o] = ep + if zq >= zbuf[o]: + zbuf[o] = zq + z_owner[o] = ep + return cov, z_owner, paint_owner, zbuf + + +def replay_color(frags, npx, w): + zbuf = [-1] * npx + cov = [0] * npx + col = [0] * npx + frag_count = 0 + pass_count = 0 + with open(frags) as f: + for ln in f: + p = ln.split() + if len(p) < 5: + continue + x = int(p[1]) + y = int(p[2]) + z = int(p[3]) + c = int(p[4], 16) & 0xFFFFFF + o = y * w + x + if o < 0 or o >= npx: + continue + frag_count += 1 + zq = 0xFFFF if z > 0xFFFF else (0 if z < 0 else z) + if zq >= zbuf[o]: + zbuf[o] = zq + cov[o] = 1 + col[o] = c + pass_count += 1 + return cov, col, frag_count, pass_count + + +def replay_color_check(fb_path, fb, frags, w, h): + npx = w * h + cov, exp, frag_count, pass_count = replay_color(frags, npx, w) + covered = sum(cov) + mismatches = [] + stray = 0 + for o in range(npx): + got = fb[o] & 0xFFFFFF + want = exp[o] & 0xFFFFFF + if cov[o]: + if got != want: + if len(mismatches) < 12: + mismatches.append((o, got, want, "covered")) + elif got != 0: + stray += 1 + if len(mismatches) < 12: + mismatches.append((o, got, want, "uncovered")) + + mismatch_count = 0 + for o in range(npx): + got = fb[o] & 0xFFFFFF + want = exp[o] & 0xFFFFFF + if (cov[o] and got != want) or ((not cov[o]) and got != 0): + mismatch_count += 1 + + print(f"[analyze] fb={fb_path}") + print(f"[analyze] owner=replay-color FB={w}x{h}") + print(f"[analyze] replay_frags={frags}") + print(f"[analyze] replay fragments={frag_count} zpass_updates={pass_count} covered={covered} stray_uncovered={stray}") + print(f"[analyze] replay-color exact {npx - mismatch_count}/{npx} ({100.0 * (npx - mismatch_count) / npx:.2f}%) mismatches={mismatch_count}") + for o, got, want, kind in mismatches: + print(f"[analyze] bad {kind}: px={o} x={o % w} y={o // w} got={got:06x} exp={want:06x}") + return 0 if mismatch_count == 0 else 1 + + +def main(argv): + args = argv[1:] + fb_path = args[0] if args and not args[0].startswith("--") else os.path.join(DATA, "sh3_zsched_board_fb.mem") + tag = args[args.index("--tag") + 1] if "--tag" in args else "zsched" + owner_mode = args[args.index("--owner") + 1] if "--owner" in args else "z" + frags = args[args.index("--frags") + 1] if "--frags" in args else os.path.join(ROOT, "sim", "traces", "rtl", "zsched_frags.txt") + max_radius = int(args[args.index("--radius") + 1]) if "--radius" in args else 1 + emit_maps = "--maps" in args + if owner_mode not in ("z", "paint", "replay", "replay-color"): + raise SystemExit("[analyze] --owner must be z, paint, replay, or replay-color") + + p = parse_params(tag) + w, h, tw, th, ne = p["FBPXW"], p["FBH"], p["TW"], p["TH"], p["N_EPOCHS"] + npx = w * h + + fb = load_mem(fb_path) + if len(fb) != npx: + raise SystemExit(f"[analyze] {fb_path}: {len(fb)} words != expected {npx}") + + if owner_mode == "replay-color": + return replay_color_check(fb_path, fb, frags, w, h) + + idx = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_idx.mem")) for e in range(ne)] + pal = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_pal.mem")) for e in range(ne)] + ref = load_mem(os.path.join(DATA, f"sh3_{tag}_refmap.mem")) + rep = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_refmap.mem")) for e in range(ne)] + zowner_path = os.path.join(DATA, f"sh3_{tag}_zowner.mem") + zowner = load_mem(zowner_path) if os.path.exists(zowner_path) else None + if owner_mode == "z" and zowner is None: + raise SystemExit(f"[analyze] missing {zowner_path}; use --owner paint or regenerate z oracle") + replay = replay_owner(frags, npx, w) if owner_mode == "replay" else None + + palette_set = set() + for e in range(ne): + palette_set.update(x & 0xFFFFFF for x in pal[e]) + + totals = { + "covered": 0, "interior": 0, "multi": 0, "reject": 0, + "owner_r0": 0, "owner_r1": 0, "any_r1": 0, + "interior_owner_r1": 0, "multi_owner_r1": 0, "reject_owner_r1": 0, + "palette_bad": 0, "owner_missing_ref": 0, + } + status = [0] * npx + owner_counts = [0] * ne + by_owner = [{"cov": 0, "r0": 0, "r1": 0, "multi": 0, "multi_r1": 0, "reject": 0, "reject_r1": 0} for _ in range(ne)] + radius_hist = [0] * (max_radius + 1) + bad_examples = [] + + for o in range(npx): + if owner_mode == "z": + zw = zowner[o] + cov = (zw >> 31) & 1 + if not cov: + continue + owner = ((zw >> 24) & 0xF) - 1 + paint_owner = (zw & 0xF) - 1 + reject = owner != paint_owner + multi = (ref[o] >> 28) & 1 + interior = (rep[owner][o] >> 30) & 1 if 0 <= owner < ne else 0 + elif owner_mode == "replay": + covs, owners, paint_owners, _zq = replay + if not covs[o]: + continue + owner = owners[o] + paint_owner = paint_owners[o] + reject = owner != paint_owner + multi = (ref[o] >> 28) & 1 + interior = (rep[owner][o] >> 30) & 1 if 0 <= owner < ne else 0 + else: + rw = ref[o] + cov = (rw >> 31) & 1 + if not cov: + continue + owner = (rw >> 24) & 0x7 + reject = False + multi = (rw >> 28) & 1 + interior = (rw >> 30) & 1 + + totals["covered"] += 1 + totals["interior"] += int(interior) + totals["multi"] += int(multi) + totals["reject"] += int(reject) + if 0 <= owner < ne: + owner_counts[owner] += 1 + by_owner[owner]["cov"] += 1 + by_owner[owner]["multi"] += int(multi) + by_owner[owner]["reject"] += int(reject) + + fbc = fb[o] & 0xFFFFFF + if fbc not in palette_set: + totals["palette_bad"] += 1 + status[o] = 5 + if len(bad_examples) < 12: + bad_examples.append((o, owner, fbc, "palette")) + continue + + owner_rad = None + if 0 <= owner < ne and (rep[owner][o] >> 31): + rm = rep[owner][o] + tu = (rm >> 9) & 0x1FF + tv = rm & 0x1FF + owner_rad = match_radius(fbc, idx[owner], pal[owner], tw, th, tu, tv, max_radius) + else: + totals["owner_missing_ref"] += 1 + + if owner_rad == 0: + radius_hist[0] += 1 + totals["owner_r0"] += 1 + totals["owner_r1"] += 1 + totals["interior_owner_r1"] += int(interior) + totals["multi_owner_r1"] += int(multi) + totals["reject_owner_r1"] += int(reject) + if 0 <= owner < ne: + by_owner[owner]["r0"] += 1 + by_owner[owner]["r1"] += 1 + by_owner[owner]["multi_r1"] += int(multi) + by_owner[owner]["reject_r1"] += int(reject) + status[o] = 1 + continue + if owner_rad == 1: + radius_hist[1] += 1 + totals["owner_r1"] += 1 + totals["interior_owner_r1"] += int(interior) + totals["multi_owner_r1"] += int(multi) + totals["reject_owner_r1"] += int(reject) + if 0 <= owner < ne: + by_owner[owner]["r1"] += 1 + by_owner[owner]["multi_r1"] += int(multi) + by_owner[owner]["reject_r1"] += int(reject) + status[o] = 2 + continue + + if owner_rad is not None: + radius_hist[owner_rad] += 1 + totals["owner_r1"] += 1 + totals["interior_owner_r1"] += int(interior) + totals["multi_owner_r1"] += int(multi) + totals["reject_owner_r1"] += int(reject) + if 0 <= owner < ne: + by_owner[owner]["r1"] += 1 + by_owner[owner]["multi_r1"] += int(multi) + by_owner[owner]["reject_r1"] += int(reject) + status[o] = 2 + continue + + any_ok = False + for e in range(ne): + if not (rep[e][o] >> 31): + continue + rm = rep[e][o] + tu = (rm >> 9) & 0x1FF + tv = rm & 0x1FF + if match_radius(fbc, idx[e], pal[e], tw, th, tu, tv, max_radius) is not None: + any_ok = True + break + if any_ok: + totals["any_r1"] += 1 + status[o] = 3 + else: + status[o] = 4 + if len(bad_examples) < 12: + bad_examples.append((o, owner, fbc, "nomatch")) + + def pct(num, den): + return 100.0 * num / den if den else 0.0 + + print(f"[analyze] fb={fb_path}") + print(f"[analyze] tag={tag} owner={owner_mode} FB={w}x{h} epochs={ne} radius={max_radius}") + if owner_mode == "replay": + print(f"[analyze] replay_frags={frags}") + print(f"[analyze] oracle covered={totals['covered']} interior={totals['interior']} multi={totals['multi']} reject={totals['reject']}") + print("[analyze] owner counts: " + " ".join(f"e{e}={owner_counts[e]}" for e in range(ne))) + for e in range(ne): + b = by_owner[e] + rlbl = "<=1" if max_radius == 1 else f"<=R{max_radius}" + print(f"[analyze] e{e}: {rlbl} {b['r1']}/{b['cov']} ({pct(b['r1'], b['cov']):.2f}%) " + f"multi{rlbl} {b['multi_r1']}/{b['multi']} ({pct(b['multi_r1'], b['multi']):.2f}%) " + f"reject{rlbl} {b['reject_r1']}/{b['reject']} ({pct(b['reject_r1'], b['reject']):.2f}%)") + print(f"[analyze] owner exact {totals['owner_r0']}/{totals['covered']} ({pct(totals['owner_r0'], totals['covered']):.2f}%)") + if max_radius == 1: + print(f"[analyze] owner <=1 texel {totals['owner_r1']}/{totals['covered']} ({pct(totals['owner_r1'], totals['covered']):.2f}%)") + print(f"[analyze] interior <=1 {totals['interior_owner_r1']}/{totals['interior']} ({pct(totals['interior_owner_r1'], totals['interior']):.2f}%)") + print(f"[analyze] multi <=1 {totals['multi_owner_r1']}/{totals['multi']} ({pct(totals['multi_owner_r1'], totals['multi']):.2f}%)") + else: + print(f"[analyze] owner <=R texel {totals['owner_r1']}/{totals['covered']} ({pct(totals['owner_r1'], totals['covered']):.2f}%)") + print(f"[analyze] interior <=R {totals['interior_owner_r1']}/{totals['interior']} ({pct(totals['interior_owner_r1'], totals['interior']):.2f}%)") + print(f"[analyze] multi <=R {totals['multi_owner_r1']}/{totals['multi']} ({pct(totals['multi_owner_r1'], totals['multi']):.2f}%)") + print("[analyze] owner radius hist: " + " ".join(f"r{r}={radius_hist[r]}" for r in range(max_radius + 1))) + if owner_mode == "z": + print(f"[analyze] reject <=1 {totals['reject_owner_r1']}/{totals['reject']} ({pct(totals['reject_owner_r1'], totals['reject']):.2f}%)") + print(f"[analyze] wrong-owner <=1 {totals['any_r1']}/{totals['covered']} ({pct(totals['any_r1'], totals['covered']):.2f}%)") + print(f"[analyze] palette_bad={totals['palette_bad']} owner_missing_ref={totals['owner_missing_ref']}") + if bad_examples: + for o, owner, fbc, kind in bad_examples: + print(f"[analyze] bad {kind}: px={o} x={o % w} y={o // w} owner=e{owner} fb={fbc:06x}") + + if emit_maps: + prefix = os.path.splitext(fb_path)[0] + f"_{owner_mode}oracle" + write_maps(prefix, w, h, fb, status) + + return 0 if totals["palette_bad"] == 0 else 1 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/compose_sched.py b/tools/compose_sched.py new file mode 100644 index 0000000..b83d3c2 --- /dev/null +++ b/tools/compose_sched.py @@ -0,0 +1,62 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch356: composition == isolated RTL bit-for-bit check. + +Renders each epoch ALONE (tb +ONLY= +FBDUMP) over a precleared-black FB, then composites the N isolation dumps in +paint order (epoch 0, 1, ..., N-1; DECAL/overwrite) and asserts the result equals the joint ALL-mode render BIT-FOR-BIT. +This is Codex's Ch356 accumulation-correctness proof: the scheduler drawing the epochs together must produce exactly the +same framebuffer as compositing the individually-rendered epochs (no cache bleed, no stale pixels, correct rebind). + +Composition operator (matches the RTL: precleared black bg, each epoch overwrites where it draws): + compose[px] = the LAST epoch (highest k) that DREW px (isolation dump non-zero); else black. +Note: an epoch is DECAL/opaque, so its written value replaces whatever is underneath. A genuine opaque-BLACK texel +(dump==0 where the epoch drew) is indistinguishable from unwritten — but the joint ALL render is likewise black there +(black-over-anything = black in this content), so nonzero-wins composition still matches ALL bit-for-bit. Do NOT use +reference coverage to pick the owner: the RTL edge coverage differs slightly from the float reference, and a +reference-covered-but-RTL-unwritten pixel must fall through to the epoch that ACTUALLY drew it. + +Usage: compose_sched.py ... +Each *.hex file = W*H lines of 8-hex-digit PSMCT32 words (row-major), as emitted by +FBDUMP. +""" +import sys, os + +def load(fn): + out=[] + with open(fn) as f: + for ln in f: + s=ln.strip() + if not s or s.startswith("//"): continue + out.append(int(s,16)&0xFFFFFFFF) + return out + +def main(argv): + a=argv[1:] + W=384 + if "--width" in a: i=a.index("--width"); W=int(a[i+1]); del a[i:i+2] + if len(a)<3: sys.exit("usage: compose_sched.py ...") + all_fb=load(a[0]); eps=[load(x) for x in a[1:]]; N=len(eps) + npx=len(all_fb) + for k,e in enumerate(eps): + if len(e)!=npx: sys.exit(f"[compose] epoch {k} dump {len(e)} px != ALL {npx}") + + comp=[0]*npx + for px in range(npx): + for k in range(N-1,-1,-1): + if eps[k][px]!=0: comp[px]=eps[k][px]; break # last epoch that actually DREW (DECAL nonzero-wins) + + mism=[px for px in range(npx) if comp[px]!=all_fb[px]] + black_all=sum(1 for px in mism if all_fb[px]==0) + black_cmp=sum(1 for px in mism if comp[px]==0) + print(f"[compose] {N} epochs, {npx} px. composition vs ALL: {npx-len(mism)} exact, {len(mism)} mismatch " + f"({100.0*(npx-len(mism))/npx:.4f}% exact)") + if mism: + print(f"[compose] of the {len(mism)} mismatches: ALL==black:{black_all} compose==black:{black_cmp}") + for px in mism[:12]: + print(f"[compose] px {px} (x={px%W},y={px//W}): compose={comp[px]:08x} ALL={all_fb[px]:08x}") + if not mism: + print("[compose] PASS: joint ALL render == composited isolation dumps BIT-FOR-BIT (accumulation exact)") + return 0 + print("[compose] FAIL: composition differs from ALL") + return 1 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/diagnose_zsched_frag_z.py b/tools/diagnose_zsched_frag_z.py new file mode 100644 index 0000000..239a454 --- /dev/null +++ b/tools/diagnose_zsched_frag_z.py @@ -0,0 +1,205 @@ +#!/usr/bin/env python3 +"""Compare captured RTL Z fragments against the fixture's software Z planes. + +This is intentionally per-fragment, not per-final-frame. It reconstructs the +same clipped triangles used by the ZSCHED feeder fixture, then asks whether each +captured RTL fragment's Z is close to the expected screen-linear interpolated Z +at that pixel. + +Usage: + tools/diagnose_zsched_frag_z.py [sim/traces/rtl/zsched_frags.txt] +""" +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) + +import gs_make_sh3_multidraw_fixture as MD + + +def load_epochs(tag="zsched"): + path = os.path.join(DATA, f"sh3_{tag}_epochs.txt") + out = [] + with open(path) as f: + for ln in f: + s = ln.strip() + if not s or s.startswith("#") or s.startswith("META"): + continue + p = s.split() + out.append(int(p[1])) + return out + + +def find_dump(): + import glob + c = glob.glob(os.path.join(ROOT, "captures", "gs", "silenthill3", "*224139*.gs.zst")) + if not c: + raise SystemExit("[fragz] no SH3 224139 dump found") + return c[0] + + +def edge(ax, ay, bx, by, px, py): + return (px - ax) * (by - ay) - (py - ay) * (bx - ax) + + +def clip_rect_z(tri, w, h): + def lerp(p1, p2, al): + return {k: (p1[k] + al * (p2[k] - p1[k])) for k in ("x", "y", "z", "s", "t", "q")} + + def clip_edge(poly, inside, isect): + out = [] + n = len(poly) + for i in range(n): + a = poly[i] + b = poly[(i + 1) % n] + ina = inside(a) + inb = inside(b) + if ina: + out.append(a) + if ina != inb: + out.append(isect(a, b)) + return out + + poly = [dict(x=v["x"], y=v["y"], z=v.get("z", 0.0), s=v["s"], t=v["t"], q=v["q"]) for v in tri] + poly = clip_edge(poly, lambda p: p["x"] >= 0.0, lambda a, b: lerp(a, b, (0.0 - a["x"]) / (b["x"] - a["x"]))) + if not poly: + return [] + poly = clip_edge(poly, lambda p: p["x"] <= w, lambda a, b: lerp(a, b, (w - a["x"]) / (b["x"] - a["x"]))) + if not poly: + return [] + poly = clip_edge(poly, lambda p: p["y"] >= 0.0, lambda a, b: lerp(a, b, (0.0 - a["y"]) / (b["y"] - a["y"]))) + if not poly: + return [] + poly = clip_edge(poly, lambda p: p["y"] <= h, lambda a, b: lerp(a, b, (h - a["y"]) / (b["y"] - a["y"]))) + if len(poly) < 3: + return [] + return [(poly[0], poly[k], poly[k + 1]) for k in range(1, len(poly) - 1)] + + +def tri_z_at(tri, x, y): + v0, v1, v2 = tri + ar = edge(v0["x"], v0["y"], v1["x"], v1["y"], v2["x"], v2["y"]) + if abs(ar) < 1e-9: + return None + inv = 1.0 / ar + w0 = edge(v1["x"], v1["y"], v2["x"], v2["y"], x, y) * inv + w1 = edge(v2["x"], v2["y"], v0["x"], v0["y"], x, y) * inv + w2 = 1.0 - w0 - w1 + if w0 < -0.001 or w1 < -0.001 or w2 < -0.001: + return None + return w0 * v0["z"] + w1 * v1["z"] + w2 * v2["z"] + + +def build_epoch_tris(draw_idxs, fbw, fbh): + got, _ = MD.load_draws(find_dump(), draw_idxs) + eps = [got[i] for i in draw_idxs] + ox = int(min(min(v["x"] for v in e["verts"]) for e in eps)) + oy = int(min(min(v["y"] for v in e["verts"]) for e in eps)) + out = [] + for e in eps: + fv = [dict(x=v["x"] - ox, y=v["y"] - oy, z=v["z"], s=v["s"], t=v["t"], q=v["q"]) for v in e["verts"]] + raw = [(fv[i - 2], fv[i - 1], fv[i]) for i in range(2, len(fv))] + tris = [] + for tri in raw: + tris.extend(clip_rect_z(tri, fbw, fbh)) + out.append(tris) + return out + + +def best_expected(tris, x, y, sample_center): + sx = x + 0.5 if sample_center else float(x) + sy = y + 0.5 if sample_center else float(y) + vals = [] + for tri in tris: + z = tri_z_at(tri, sx, sy) + if z is not None: + vals.append(z) + return vals + + +def main(argv): + frags = argv[1] if len(argv) > 1 else os.path.join(ROOT, "sim", "traces", "rtl", "zsched_frags.txt") + draw_idxs = load_epochs("zsched") + fbw, fbh = 256, 210 + tris_by_ep = build_epoch_tris(draw_idxs, fbw, fbh) + + stats = { + "n": 0, "nocov_center": 0, "nocov_corner": 0, + "center_le0": 0, "center_le1": 0, "center_le16": 0, "center_le256": 0, + "corner_le0": 0, "corner_le1": 0, "corner_le16": 0, "corner_le256": 0, + } + abs_sum_center = 0.0 + abs_sum_corner = 0.0 + ratios = [] + examples = [] + + with open(frags) as f: + for ln in f: + p = ln.split() + if len(p) < 5: + continue + ep, x, y, rz = int(p[0]), int(p[1]), int(p[2]), int(p[3]) + stats["n"] += 1 + cvals = best_expected(tris_by_ep[ep], x, y, True) + kvals = best_expected(tris_by_ep[ep], x, y, False) + if not cvals: + stats["nocov_center"] += 1 + cdiff = None + else: + cz = min(cvals, key=lambda z: abs(rz - z)) + cdiff = abs(rz - cz) + abs_sum_center += cdiff + if cz: + ratios.append(rz / cz) + if cdiff <= 0.5: + stats["center_le0"] += 1 + if cdiff <= 1: + stats["center_le1"] += 1 + if cdiff <= 16: + stats["center_le16"] += 1 + if cdiff <= 256: + stats["center_le256"] += 1 + if not kvals: + stats["nocov_corner"] += 1 + kdiff = None + else: + kz = min(kvals, key=lambda z: abs(rz - z)) + kdiff = abs(rz - kz) + abs_sum_corner += kdiff + if kdiff <= 0.5: + stats["corner_le0"] += 1 + if kdiff <= 1: + stats["corner_le1"] += 1 + if kdiff <= 16: + stats["corner_le16"] += 1 + if kdiff <= 256: + stats["corner_le256"] += 1 + if len(examples) < 16 and ((cdiff is None or cdiff > 256) and (kdiff is None or kdiff > 256)): + examples.append((ep, x, y, rz, cdiff, kdiff, cvals[:3], kvals[:3])) + + n = stats["n"] + def pct(k): + return 100.0 * stats[k] / n if n else 0.0 + + print(f"[fragz] fragments={n} draw_idxs={draw_idxs}") + print(f"[fragz] center coverage misses={stats['nocov_center']} corner coverage misses={stats['nocov_corner']}") + print(f"[fragz] center absdiff: <=0.5 {stats['center_le0']} ({pct('center_le0'):.2f}%) <=1 {stats['center_le1']} ({pct('center_le1'):.2f}%) <=16 {stats['center_le16']} ({pct('center_le16'):.2f}%) <=256 {stats['center_le256']} ({pct('center_le256'):.2f}%)") + print(f"[fragz] corner absdiff: <=0.5 {stats['corner_le0']} ({pct('corner_le0'):.2f}%) <=1 {stats['corner_le1']} ({pct('corner_le1'):.2f}%) <=16 {stats['corner_le16']} ({pct('corner_le16'):.2f}%) <=256 {stats['corner_le256']} ({pct('corner_le256'):.2f}%)") + if n - stats["nocov_center"] > 0: + print(f"[fragz] mean center absdiff={abs_sum_center / (n - stats['nocov_center']):.2f}") + if n - stats["nocov_corner"] > 0: + print(f"[fragz] mean corner absdiff={abs_sum_corner / (n - stats['nocov_corner']):.2f}") + if ratios: + ratios.sort() + mid = ratios[len(ratios) // 2] + print(f"[fragz] raw/expected center ratio: p10={ratios[len(ratios)//10]:.4f} median={mid:.4f} p90={ratios[(len(ratios)*9)//10]:.4f}") + for ep, x, y, rz, cdiff, kdiff, cvals, kvals in examples: + print(f"[fragz] bad ep{ep} ({x},{y}) rtl_z={rz} center_diff={cdiff} corner_diff={kdiff} center_z={[round(v,1) for v in cvals]} corner_z={[round(v,1) for v in kvals]}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/diagnose_zsched_persp.py b/tools/diagnose_zsched_persp.py new file mode 100644 index 0000000..d2f03f7 --- /dev/null +++ b/tools/diagnose_zsched_persp.py @@ -0,0 +1,522 @@ +#!/usr/bin/env python3 +"""Render the SH3 ZSCHED fixture with the RTL's fixed-point perspective path. + +The existing dump-derived reference is intentionally float-ish: it uses clipped +float vertices and computes S/Q at a reference sample point. This tool answers a +different question: if we mirror the RTL's rounded XYZ2 vertices, Q16.16 +gradient setup, top-left edge rule, gs_persp_uv reciprocal, and GEQUAL Z RMW, +does the framebuffer line up with the board/zint dump? +""" +import os +import sys +import glob + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) + +import gs_make_sh3_multidraw_fixture as MD + +FBW = 256 +FBH = 210 +TW = 512 +TH = 512 +PERSP_FRAC = 12 +PSCALE = 4096 +S24_MAX = (1 << 23) - 1 + + +def load_mem(path): + out = [] + with open(path) as f: + for ln in f: + s = ln.strip() + if s and not s.startswith("//"): + out.append(int(s, 16) & 0xFFFFFFFF) + return out + + +def load_mem64(path): + out = [] + with open(path) as f: + for ln in f: + s = ln.strip() + if s and not s.startswith("//"): + out.append(int(s, 16) & 0xFFFFFFFFFFFFFFFF) + return out + + +def load_epochs(tag="zsched"): + out = [] + with open(os.path.join(DATA, f"sh3_{tag}_epochs.txt")) as f: + for ln in f: + s = ln.strip() + if s and not s.startswith("#") and not s.startswith("META"): + out.append(int(s.split()[1])) + return out + + +def find_dump(): + c = glob.glob(os.path.join(ROOT, "captures", "gs", "silenthill3", "*224139*.gs.zst")) + if not c: + raise SystemExit("[persp] no SH3 224139 dump found") + return c[0] + + +def clip_rect_z(tri, w, h): + def lerp(a, b, t): + return {k: (a[k] + t * (b[k] - a[k])) for k in ("x", "y", "z", "s", "t", "q")} + + def clip(poly, inside, cross): + out = [] + for i, a in enumerate(poly): + b = poly[(i + 1) % len(poly)] + ina, inb = inside(a), inside(b) + if ina: + out.append(a) + if ina != inb: + out.append(cross(a, b)) + return out + + poly = [dict(x=v["x"], y=v["y"], z=v["z"], s=v["s"], t=v["t"], q=v["q"]) for v in tri] + poly = clip(poly, lambda p: p["x"] >= 0.0, lambda a, b: lerp(a, b, (0.0 - a["x"]) / (b["x"] - a["x"]))) + if not poly: + return [] + poly = clip(poly, lambda p: p["x"] <= w, lambda a, b: lerp(a, b, (w - a["x"]) / (b["x"] - a["x"]))) + if not poly: + return [] + poly = clip(poly, lambda p: p["y"] >= 0.0, lambda a, b: lerp(a, b, (0.0 - a["y"]) / (b["y"] - a["y"]))) + if not poly: + return [] + poly = clip(poly, lambda p: p["y"] <= h, lambda a, b: lerp(a, b, (h - a["y"]) / (b["y"] - a["y"]))) + if len(poly) < 3: + return [] + return [(poly[0], poly[i], poly[i + 1]) for i in range(1, len(poly) - 1)] + + +def pack_vertex(v): + s = round(v["s"] * TW * (1 << PERSP_FRAC) * PSCALE) + t = round(v["t"] * TH * (1 << PERSP_FRAC) * PSCALE) + q = round(v["q"] * (1 << PERSP_FRAC) * PSCALE) + if abs(s) > S24_MAX or abs(t) > S24_MAX: + raise SystemExit(f"[persp] ST overflow s={s} t={t}") + if q < 0 or q > 0xFFFFFF: + raise SystemExit(f"[persp] Q out of RTL 24-bit range q={q}") + return { + "x": max(0, min(FBW - 1, int(round(v["x"])))), + "y": max(0, min(FBH - 1, int(round(v["y"])))), + "z": max(0, min(0xFFFFFF, int(round(v["z"])))), + "s": s & 0xFFFFFF, + "t": t & 0xFFFFFF, + "q": q & 0xFFFFFF, + } + + +def edge(px, py, ax, ay, bx, by): + return (px - ax) * (by - ay) - (py - ay) * (bx - ax) + + +def top_or_left(ax, ay, bx, by): + dx = bx - ax + dy = by - ay + return (dy > 0) or (dy == 0 and dx > 0) + + +def trunc_div(num, den): + if den == 0: + return 0 + sign = -1 if (num < 0) ^ (den < 0) else 1 + return sign * (abs(num) // abs(den)) + + +def grad_num_dadx(a0, a1, a2, x0, y0, x1, y1, x2, y2): + return ((a1 - a0) * (y2 - y0) - (a2 - a0) * (y1 - y0)) << 16 + + +def grad_num_dady(a0, a1, a2, x0, y0, x1, y1, x2, y2): + return ((a2 - a0) * (x1 - x0) - (a1 - a0) * (x2 - x0)) << 16 + + +def interp_wide(base, dadx, dady, x, y, x0, y0): + step = dadx * (x - x0) + dady * (y - y0) + return (base + (step >> 16)) & 0xFFFFFF + + +def interp_z(base, dadx, dady, x, y, x0, y0): + step = dadx * (x - x0) + dady * (y - y0) + return max(0, min(0xFFFFFFFF, base + (step >> 16))) + + +def recip_lut(q, idx_bits=11, scale=24): + out_max = (1 << (scale + 1)) - 1 + if q <= 0: + return out_max + top = idx_bits - 1 + e = q.bit_length() - 1 + m = (q >> (e - top)) if e >= top else (q << (top - e)) + m &= (1 << idx_bits) - 1 + if m == 0: + return out_max + r = ((1 << (scale + top)) // m) >> e + return min(r, out_max) + + +def persp_uv(s, t, q): + r = recip_lut(q) + u = (s * r) >> 24 + v = (t * r) >> 24 + if u > 2047: + u = 2047 + if v > 2047: + v = 2047 + return u, v + + +def texel(idx_words, pal, u, v): + lin = v * TW + u + if lin < 0 or lin >= len(idx_words) * 4: + return 0 + ci = (idx_words[lin // 4] >> (8 * (lin % 4))) & 0xFF + return pal[ci] & 0xFFFFFF + + +def prep_tri(tri): + verts = [pack_vertex(v) for v in tri] + x0, y0 = verts[0]["x"], verts[0]["y"] + x1, y1 = verts[1]["x"], verts[1]["y"] + x2, y2 = verts[2]["x"], verts[2]["y"] + det = (x1 - x0) * (y2 - y0) - (x2 - x0) * (y1 - y0) + if det == 0: + return None + if det < 0: + verts = [verts[0], verts[2], verts[1]] + det = -det + v0, v1, v2 = verts + x0, y0 = v0["x"], v0["y"] + x1, y1 = v1["x"], v1["y"] + x2, y2 = v2["x"], v2["y"] + bias = [ + 0 if top_or_left(x0, y0, x1, y1) else 1, + 0 if top_or_left(x1, y1, x2, y2) else 1, + 0 if top_or_left(x2, y2, x0, y0) else 1, + ] + + def grad(attr): + a0, a1, a2 = v0[attr], v1[attr], v2[attr] + return ( + trunc_div(grad_num_dadx(a0, a1, a2, x0, y0, x1, y1, x2, y2), det), + trunc_div(grad_num_dady(a0, a1, a2, x0, y0, x1, y1, x2, y2), det), + ) + + return { + "v": verts, + "det": det, + "bias": bias, + "ds": grad("s"), + "dt": grad("t"), + "dq": grad("q"), + "dz": grad("z"), + } + + +def prep_tri_packed(verts): + verts = [dict(v) for v in verts] + x0, y0 = verts[0]["x"], verts[0]["y"] + x1, y1 = verts[1]["x"], verts[1]["y"] + x2, y2 = verts[2]["x"], verts[2]["y"] + det = (x1 - x0) * (y2 - y0) - (x2 - x0) * (y1 - y0) + if det == 0: + return None + if det < 0: + verts = [verts[0], verts[2], verts[1]] + det = -det + v0, v1, v2 = verts + x0, y0 = v0["x"], v0["y"] + x1, y1 = v1["x"], v1["y"] + x2, y2 = v2["x"], v2["y"] + bias = [ + 0 if top_or_left(x0, y0, x1, y1) else 1, + 0 if top_or_left(x1, y1, x2, y2) else 1, + 0 if top_or_left(x2, y2, x0, y0) else 1, + ] + + def grad(attr): + a0, a1, a2 = v0[attr], v1[attr], v2[attr] + return ( + trunc_div(grad_num_dadx(a0, a1, a2, x0, y0, x1, y1, x2, y2), det), + trunc_div(grad_num_dady(a0, a1, a2, x0, y0, x1, y1, x2, y2), det), + ) + + return { + "v": verts, + "det": det, + "bias": bias, + "ds": grad("s"), + "dt": grad("t"), + "dq": grad("q"), + "dz": grad("z"), + } + + +def build_tris(draw_idxs): + got, _ = MD.load_draws(find_dump(), draw_idxs) + eps = [got[i] for i in draw_idxs] + ox = int(min(min(v["x"] for v in e["verts"]) for e in eps)) + oy = int(min(min(v["y"] for v in e["verts"]) for e in eps)) + out = [] + for e in eps: + rawv = [dict(x=v["x"] - ox, y=v["y"] - oy, z=v["z"], s=v["s"], t=v["t"], q=v["q"]) for v in e["verts"]] + raw = [(rawv[i - 2], rawv[i - 1], rawv[i]) for i in range(2, len(rawv))] + tris = [] + for tri in raw: + for ct in clip_rect_z(tri, FBW, FBH): + qs = [v["q"] for v in ct] + if all(q < 0 for q in qs): + ct = tuple(dict(x=v["x"], y=v["y"], z=v["z"], s=-v["s"], t=-v["t"], q=-v["q"]) for v in ct) + elif not all(q > 0 for q in qs): + raise SystemExit(f"[persp] mixed/zero Q in idx{e['first_idx']}: {qs}") + pt = prep_tri(ct) + if pt is not None: + tris.append(pt) + out.append(tris) + return out + + +def build_tris_from_feeder(tag="zsched"): + out = [] + ep = 0 + while True: + path = os.path.join(DATA, f"feeder_sh3_{tag}{ep}.mem") + if not os.path.exists(path): + break + words = load_mem64(path) + ntris = words[0] & 0xFFFF + tris = [] + off = 7 + for _ in range(ntris): + verts = [] + for _v in range(3): + rgbaq = words[off] + st = words[off + 1] + xyz = words[off + 2] + verts.append({ + "x": (xyz >> 4) & 0xFFF, + "y": (xyz >> 20) & 0xFFF, + "z": (xyz >> 32) & 0xFFFFFFFF, + "s": st & 0xFFFFFF, + "t": (st >> 32) & 0xFFFFFF, + "q": (rgbaq >> 32) & 0xFFFFFF, + }) + off += 3 + pt = prep_tri_packed(verts) + if pt is not None: + tris.append(pt) + out.append(tris) + ep += 1 + return out + + +def render(tag="zsched"): + draw_idxs = load_epochs(tag) + idx = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_idx.mem")) for e in range(len(draw_idxs))] + pal = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_pal.mem")) for e in range(len(draw_idxs))] + tris_by_ep = build_tris_from_feeder(tag) + if len(tris_by_ep) != len(draw_idxs): + tris_by_ep = build_tris(draw_idxs) + + fb = [0] * (FBW * FBH) + zbuf = [-1] * (FBW * FBH) + owner = [-1] * (FBW * FBH) + emitted = [0] * len(draw_idxs) + accepted = [0] * len(draw_idxs) + frags = [] + for ep, tris in enumerate(tris_by_ep): + for tri in tris: + v0, v1, v2 = tri["v"] + minx = max(0, min(v0["x"], v1["x"], v2["x"])) + maxx = min(FBW - 1, max(v0["x"], v1["x"], v2["x"])) + miny = max(0, min(v0["y"], v1["y"], v2["y"])) + maxy = min(FBH - 1, max(v0["y"], v1["y"], v2["y"])) + for y in range(miny, maxy + 1): + for x in range(minx, maxx + 1): + e0 = edge(x, y, v0["x"], v0["y"], v1["x"], v1["y"]) + tri["bias"][0] + e1 = edge(x, y, v1["x"], v1["y"], v2["x"], v2["y"]) + tri["bias"][1] + e2 = edge(x, y, v2["x"], v2["y"], v0["x"], v0["y"]) + tri["bias"][2] + if e0 > 0 or e1 > 0 or e2 > 0: + continue + s = interp_wide(v0["s"], tri["ds"][0], tri["ds"][1], x, y, v0["x"], v0["y"]) + t = interp_wide(v0["t"], tri["dt"][0], tri["dt"][1], x, y, v0["x"], v0["y"]) + q = interp_wide(v0["q"], tri["dq"][0], tri["dq"][1], x, y, v0["x"], v0["y"]) + z = interp_z(v0["z"], tri["dz"][0], tri["dz"][1], x, y, v0["x"], v0["y"]) + u, v = persp_uv(s, t, q) + col = texel(idx[ep], pal[ep], u, v) + o = y * FBW + x + emitted[ep] += 1 + frags.append((ep, x, y, z, col, u, v, s, t, q)) + zq = min(z, 0xFFFF) + if zq >= zbuf[o]: + zbuf[o] = zq + fb[o] = col + owner[o] = ep + accepted[ep] += 1 + return draw_idxs, tris_by_ep, fb, owner, emitted, accepted, frags + + +def nearest_color(idx_words, pal, u, v, color, max_radius=64): + for rad in range(max_radius + 1): + for dv in range(-rad, rad + 1): + for du in range(-rad, rad + 1): + if max(abs(du), abs(dv)) != rad: + continue + uu = u + du + vv = v + dv + if 0 <= uu < TW and 0 <= vv < TH and texel(idx_words, pal, uu, vv) == color: + return rad, du, dv + return None + + +def compare_trace(frags, path, idx, pal): + if not os.path.exists(path): + return + got = [] + with open(path) as f: + for ln in f: + p = ln.split() + if len(p) >= 5: + got.append((int(p[0]), int(p[1]), int(p[2]), int(p[3]), int(p[4], 16) & 0xFFFFFF)) + n = min(len(frags), len(got)) + coord_miss = color_miss = z_miss256 = 0 + near_bins = {"r1": 0, "r8": 0, "r32": 0, "r64": 0, "miss": 0} + by_ep = {} + examples = [] + for i in range(n): + me = frags[i] + hw = got[i] + ep = hw[0] + st = by_ep.setdefault(ep, {"n": 0, "coord": 0, "color": 0, "z256": 0}) + st["n"] += 1 + if me[:3] != hw[:3]: + coord_miss += 1 + st["coord"] += 1 + if (me[4] & 0xFFFFFF) != hw[4]: + color_miss += 1 + st["color"] += 1 + near = nearest_color(idx[ep], pal[ep], me[5], me[6], hw[4]) + if near is None: + near_bins["miss"] += 1 + else: + rad, _du, _dv = near + if rad <= 1: + near_bins["r1"] += 1 + if rad <= 8: + near_bins["r8"] += 1 + if rad <= 32: + near_bins["r32"] += 1 + if rad <= 64: + near_bins["r64"] += 1 + if abs(me[3] - hw[3]) > 256: + z_miss256 += 1 + st["z256"] += 1 + if len(examples) < 12 and (me[:3] != hw[:3] or (me[4] & 0xFFFFFF) != hw[4] or abs(me[3] - hw[3]) > 256): + near = nearest_color(idx[ep], pal[ep], me[5], me[6], hw[4]) if (me[4] & 0xFFFFFF) != hw[4] else None + examples.append((i, me, hw, near)) + print(f"[persp] trace={path} model_frags={len(frags)} trace_frags={len(got)} compared={n}") + print(f"[persp] trace_miss coord={coord_miss} color={color_miss} z_gt256={z_miss256}") + print(f"[persp] trace color-near model_uv: <=1 {near_bins['r1']} <=8 {near_bins['r8']} <=32 {near_bins['r32']} <=64 {near_bins['r64']} >64/notfound {near_bins['miss']}") + for ep in sorted(by_ep): + st = by_ep[ep] + print(f"[persp] trace e{ep}: n={st['n']} coord={st['coord']} color={st['color']} z_gt256={st['z256']}") + for i, me, hw, near in examples: + ns = "near=none" if near is None else f"near r={near[0]} du={near[1]} dv={near[2]}" + print(f"[persp] trace miss#{i}: model ep{me[0]} ({me[1]},{me[2]}) z={me[3]} uv=({me[5]},{me[6]}) col={me[4]&0xFFFFFF:06x} " + f"trace ep{hw[0]} ({hw[1]},{hw[2]}) z={hw[3]} col={hw[4]:06x} {ns}") + + +def compare_issue(frags, path): + if not os.path.exists(path): + return + got = [] + with open(path) as f: + for ln in f: + p = ln.split() + if len(p) >= 7: + got.append((int(p[0]), int(p[1]), int(p[2]), int(p[3]), int(p[4]), int(p[5]), int(p[6]))) + n = min(len(frags), len(got)) + by_ep = {} + s_miss = t_miss = u_miss = v_miss = recip_miss = 0 + examples = [] + for i in range(n): + me = frags[i] + hw = got[i] + ep = hw[0] + st = by_ep.setdefault(ep, {"n": 0, "s": 0, "t": 0, "u": 0, "v": 0, "recip": 0}) + st["n"] += 1 + mr = recip_lut(me[9]) + if me[7] != hw[1]: + s_miss += 1 + st["s"] += 1 + if me[8] != hw[2]: + t_miss += 1 + st["t"] += 1 + if mr != hw[3]: + recip_miss += 1 + st["recip"] += 1 + if me[5] != hw[4]: + u_miss += 1 + st["u"] += 1 + if me[6] != hw[5]: + v_miss += 1 + st["v"] += 1 + if len(examples) < 12 and (me[7] != hw[1] or me[8] != hw[2] or mr != hw[3] or me[5] != hw[4] or me[6] != hw[5]): + examples.append((i, me, hw, mr)) + print(f"[persp] issue={path} model_frags={len(frags)} issue_rows={len(got)} compared={n}") + print(f"[persp] issue_miss s={s_miss} t={t_miss} recip={recip_miss} u={u_miss} v={v_miss}") + for ep in sorted(by_ep): + st = by_ep[ep] + print(f"[persp] issue e{ep}: n={st['n']} s={st['s']} t={st['t']} recip={st['recip']} u={st['u']} v={st['v']}") + for i, me, hw, mr in examples: + print(f"[persp] issue miss#{i}: model ep{me[0]} ({me[1]},{me[2]}) s={me[7]} t={me[8]} q={me[9]} recip={mr} uv=({me[5]},{me[6]}) " + f"rtl ep{hw[0]} s={hw[1]} t={hw[2]} recip={hw[3]} uv=({hw[4]},{hw[5]}) valid={hw[6]}") + + +def main(argv): + args = argv[1:] + fb_path = args[0] if args and not args[0].startswith("--") else os.path.join(DATA, "sh3_zsched_board_fb.mem") + board = load_mem(fb_path) + trace_path = args[args.index("--trace") + 1] if "--trace" in args else os.path.join(ROOT, "sim", "traces", "rtl", "zsched_frags.txt") + draw_idxs, tris_by_ep, fb, owner, emitted, accepted, frags = render() + if len(board) != len(fb): + raise SystemExit(f"[persp] {fb_path}: {len(board)} words != expected {len(fb)}") + mism = [] + cov = sum(1 for x in owner if x >= 0) + for i, (a, b) in enumerate(zip(board, fb)): + if (a & 0xFFFFFF) != (b & 0xFFFFFF): + mism.append(i) + by_owner = [0] * len(draw_idxs) + by_miss = [0] * len(draw_idxs) + for o in range(len(fb)): + ep = owner[o] + if ep >= 0: + by_owner[ep] += 1 + miss_set = set(mism) + for o in miss_set: + ep = owner[o] + if ep >= 0: + by_miss[ep] += 1 + + print(f"[persp] fb={fb_path}") + print(f"[persp] draw_idxs={draw_idxs} FB={FBW}x{FBH} covered={cov} mismatches={len(mism)}/{len(fb)}") + for ep, idx in enumerate(draw_idxs): + print(f"[persp] e{ep} idx{idx}: tris={len(tris_by_ep[ep])} emitted={emitted[ep]} accepted={accepted[ep]} final_owner={by_owner[ep]} miss={by_miss[ep]}") + for o in mism[:12]: + print(f"[persp] miss x={o % FBW} y={o // FBW} owner=e{owner[o]} model={fb[o] & 0xFFFFFF:06x} board={board[o] & 0xFFFFFF:06x}") + trace_idxs = [load_mem(os.path.join(DATA, f"sh3_zsched{e}_idx.mem")) for e in range(len(draw_idxs))] + trace_pals = [load_mem(os.path.join(DATA, f"sh3_zsched{e}_pal.mem")) for e in range(len(draw_idxs))] + compare_trace(frags, trace_path, trace_idxs, trace_pals) + compare_issue(frags, os.path.join(ROOT, "sim", "traces", "rtl", "zsched_issue.txt")) + return 0 if not mism else 1 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_fb_to_png.py b/tools/gs_fb_to_png.py new file mode 100644 index 0000000..e409a68 --- /dev/null +++ b/tools/gs_fb_to_png.py @@ -0,0 +1,35 @@ +#!/usr/bin/env python3 +# Convert a linear PSMCT32 framebuffer dump ($fwrite "%08x") to a PNG for visual triage. +# Word layout = PS2 PSMCT32 0xAABBGGRR (low byte R). Usage: +# gs_fb_to_png.py [width] [height] [scale] +# Defaults to the SH3 real-draw FB (256x120). No-op (exit 0) if input missing or PIL absent, +# so it can be chained after a sim without ever breaking the build. +import sys +def main(): + a = sys.argv + src = a[1] if len(a) > 1 else "sim/data/top_psmct32_raster_demo/sh3_real_fb_out.mem" + dst = a[2] if len(a) > 2 else "sim/data/top_psmct32_raster_demo/sh3_real_fb_rtl.png" + W = int(a[3]) if len(a) > 3 else 256 + H = int(a[4]) if len(a) > 4 else 120 + SC = int(a[5]) if len(a) > 5 else 3 + try: + from PIL import Image + except Exception: + print("[fb_to_png] PIL not available; skipping PNG"); return 0 + try: + words = [] + with open(src) as f: + for ln in f: + s = ln.strip() + if not s or s.startswith("/"): continue + words.append(int(s, 16) & 0xFFFFFFFF) + except FileNotFoundError: + print(f"[fb_to_png] {src} not found; skipping"); return 0 + img = Image.new("RGB", (W, H)) + for i, w in enumerate(words[:W*H]): + img.putpixel((i % W, i // W), (w & 0xFF, (w >> 8) & 0xFF, (w >> 16) & 0xFF)) + img.resize((W*SC, H*SC), Image.NEAREST).save(dst) + print(f"[fb_to_png] wrote {dst} ({W}x{H} x{SC})") + return 0 +if __name__ == "__main__": + sys.exit(main()) diff --git a/tools/gs_frame_metric.py b/tools/gs_frame_metric.py new file mode 100644 index 0000000..645f3a1 --- /dev/null +++ b/tools/gs_frame_metric.py @@ -0,0 +1,123 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — quantitative fidelity metric: our rendered frame vs the real PCSX2 frame (reference C). + +Turns "does it look like SH3?" into numbers. Consumes any 640x480 RGB(A) PNG we produce (software composite B +from gs_sh3_frame_ref.py, or a framebuffer dumped from an RTL sim) and a PCSX2 screenshot (C), and reports: + - GLOBAL: MSE, PSNR, mean-abs-error, %pixels within a per-channel tolerance. + - PER-REGION: a GxH tile grid of per-tile MSE, the worst-N tiles ranked, and a diff heatmap PNG so the + deficit is ATTRIBUTED (which part of the screen, how badly) instead of eyeballed. + - Optionally restricted to PAINTED pixels only (alpha>0 in ours) so background fill doesn't dilute the score. + +Reference C is the display output of the real GS; our composite is opaque-textures-only (no GS blend/fog/light), +so a perfect score is NOT expected. The value is the ATTRIBUTION: a high-error tile localized to, say, the +alpha-blended fog band tells us blending is the next rung; uniformly high error would implicate reciprocal/UV. + +Alignment: C is resized to 640x480. PCSX2 NTSC output may be cropped/offset a few px vs GS screen space; use +--search P to brute-force the best integer (dx,dy) shift in [-P..P] (minimising global MSE) before scoring. + +Usage: + gs_frame_metric.py --ours frameN_composite.png --ref pcsx2_ref.png [--grid 16x12] [--worst 12] + [--tol 16] [--painted-only] [--search 4] [--out DIR] +""" +import sys, os + +def load_rgb(path, resize=None): + from PIL import Image + img = Image.open(path).convert("RGBA") + if resize and img.size != resize: + img = img.resize(resize, Image.BILINEAR) + return img + +def main(argv): + if len(argv) < 2 or "--ours" not in argv or "--ref" not in argv: + print(__doc__); return 2 + def opt(n, dv=None): return argv[argv.index(n)+1] if n in argv else dv + ours_p = opt("--ours"); ref_p = opt("--ref") + gx, gy = (int(v) for v in opt("--grid", "16x12").lower().split("x")) + worst_n = int(opt("--worst", "12")); tol = int(opt("--tol", "16")) + search = int(opt("--search", "0")); painted_only = ("--painted-only" in argv) + outdir = opt("--out", os.path.dirname(os.path.abspath(ours_p))) + os.makedirs(outdir, exist_ok=True) + + from PIL import Image + ours = load_rgb(ours_p) + W, H = ours.size + ref = load_rgb(ref_p, resize=(W, H)) + op = ours.load(); rp = ref.load() + + def scored_pixels(dx, dy): + """Yield (x,y,(or,og,ob),(rr,rg,rb)) for pixels compared at shift (dx,dy).""" + for y in range(H): + ry = y + dy + if ry < 0 or ry >= H: continue + for x in range(W): + rx = x + dx + if rx < 0 or rx >= W: continue + o = op[x, y] + if painted_only and o[3] == 0: continue + yield x, y, o[:3], rp[rx, ry][:3] + + def mse_at(dx, dy): + s = n = 0 + for _, _, o, r in scored_pixels(dx, dy): + s += (o[0]-r[0])**2 + (o[1]-r[1])**2 + (o[2]-r[2])**2; n += 1 + return (s/(3*n) if n else float("inf")), n + + # optional integer-shift alignment + bdx = bdy = 0 + if search > 0: + best = None + for dy in range(-search, search+1): + for dx in range(-search, search+1): + m, n = mse_at(dx, dy) + if best is None or m < best[0]: best = (m, dx, dy) + _, bdx, bdy = best + print(f"[metric] best alignment shift dx={bdx} dy={bdy} (searched +/-{search})") + + # global stats + per-tile accumulation at the chosen shift + tiles_se = [[0]*gx for _ in range(gy)] + tiles_n = [[0]*gx for _ in range(gy)] + tw, th = W/gx, H/gy + S = Nabs = 0; N = 0; within = 0 + diff = Image.new("RGB", (W, H)) + dp = diff.load() + for x, y, o, r in scored_pixels(bdx, bdy): + e = [abs(o[i]-r[i]) for i in range(3)] + se = e[0]**2 + e[1]**2 + e[2]**2 + S += se; Nabs += e[0]+e[1]+e[2]; N += 1 + if max(e) <= tol: within += 1 + gxi = min(gx-1, int(x/tw)); gyi = min(gy-1, int(y/th)) + tiles_se[gyi][gxi] += se; tiles_n[gyi][gxi] += 1 + # heatmap: brighter red = larger per-pixel error (scaled so 0..441 -> 0..255) + mag = min(255, int((se**0.5))) + dp[x, y] = (mag, 0, 128-min(128, mag//2)) + + if N == 0: + print("[metric] no comparable pixels (painted-only with empty frame?)"); return 1 + mse = S/(3*N); import math + psnr = 10*math.log10((255.0**2)/mse) if mse > 0 else float("inf") + print(f"[metric] compared {N} px ({'painted-only' if painted_only else 'all'}), grid {gx}x{gy}, tol +/-{tol}/ch") + print(f"[metric] MSE={mse:.2f} PSNR={psnr:.2f} dB MAE={Nabs/(3*N):.2f}/ch within-tol={100*within/N:.1f}%") + + tile_mse = [] + for gyi in range(gy): + for gxi in range(gx): + n = tiles_n[gyi][gxi] + if n: tile_mse.append((tiles_se[gyi][gxi]/(3*n), gxi, gyi, n)) + tile_mse.sort(reverse=True) + print(f"[metric] worst {min(worst_n,len(tile_mse))} tiles (col,row of {gx}x{gy} grid) by MSE:") + for m, gxi, gyi, n in tile_mse[:worst_n]: + px0, py0 = int(gxi*tw), int(gyi*th) + print(f" tile(c{gxi:2d},r{gyi:2d}) screen x[{px0}..{px0+int(tw)}] y[{py0}..{py0+int(th)}] MSE={m:.1f} n={n}") + + base = os.path.splitext(os.path.basename(ours_p))[0] + hm = os.path.join(outdir, f"{base}_vs_ref_heatmap.png"); diff.save(hm) + # triptych: ours | ref | heatmap + trip = Image.new("RGB", (W*3+16, H), (30, 30, 30)) + trip.paste(ours.convert("RGB"), (0, 0)); trip.paste(ref, (W+8, 0)); trip.paste(diff, (W*2+16, 0)) + tp = os.path.join(outdir, f"{base}_vs_ref_triptych.png"); trip.save(tp) + print(f"[metric] wrote {hm}\n[metric] wrote {tp} (ours | C | error-heatmap)") + return 0 + +if __name__ == "__main__": + sys.exit(main(sys.argv)) diff --git a/tools/gs_localmem.py b/tools/gs_localmem.py index ea7711d..f07977b 100644 --- a/tools/gs_localmem.py +++ b/tools/gs_localmem.py @@ -13,6 +13,9 @@ Address convention matches the codebase: VRAM byte base = PTR*256 (TBP0/DBP/CBP and PTRs are page-aligned (multiple of 32) so page_index*8192 composes correctly off that base. """ +import os +import re + # block grid is shared by PSMCT32 and PSMT8 (4 rows x 8 cols), value = block index within page BLOCK = [ [ 0, 1, 4, 5,16,17,20,21], @@ -52,6 +55,40 @@ def psmt8_addr(tbp, fbw, x, y): block_idx = BLOCK[(y >> 4) & 3][(x >> 4) & 7] return tbp*256 + page_index*8192 + block_idx*256 + COL8[y & 15][x & 15] +_COL4 = None +_BLOCK4 = ( + (0,2,8,10), (1,3,9,11), (4,6,12,14), (5,7,13,15), + (16,18,24,26), (17,19,25,27), (20,22,28,30), (21,23,29,31), +) + +def _col4_table(): + """Load the canonical PSMT4 permutation from the RTL contract.""" + global _COL4 + if _COL4 is not None: + return _COL4 + rtl = os.path.join(os.path.dirname(os.path.dirname(os.path.abspath(__file__))), + "rtl", "gif_gs", "gs_swizzle_psmt4_stub.sv") + text = open(rtl, encoding="utf-8").read() + lo = text.index("function automatic logic [8:0] col_idx_psmt4") + hi = text.index("endfunction", lo) + tab = [None] * 512 + for key, value in re.findall(r"9'd(\d+)\s*:\s*return\s+9'd(\d+)", text[lo:hi]): + tab[int(key)] = int(value) + tab[511] = 511 # explicit default arm in the RTL function + if any(v is None for v in tab) or sorted(tab) != list(range(512)): + raise RuntimeError("PSMT4 RTL column table is incomplete or non-bijective") + _COL4 = tuple(tab) + return _COL4 + +def psmt4_addr(tbp, fbw, x, y): + """Return (byte address, high-nibble select) for a PSMT4 texel.""" + if fbw & 1: + raise ValueError(f"PSMT4 TBW must be even, got {fbw}") + page_index = (y >> 7) * (fbw >> 1) + (x >> 7) + block_idx = _BLOCK4[(y >> 4) & 7][(x >> 5) & 3] + nib = _col4_table()[((y & 15) << 5) | (x & 31)] + return tbp*256 + page_index*8192 + block_idx*256 + (nib >> 1), bool(nib & 1) + class LocalMem: """4 MiB GS VRAM. Seed from the dump's initial snapshot, then replay host->local uploads in order.""" SIZE = 0x400000 @@ -82,6 +119,17 @@ class LocalMem: out[r+x] = self.m[a] if 0 <= a < self.SIZE else 0 return out + def read_psmt4(self, tbp, fbw, tw, th): + """Return one unpacked 0..15 index byte per raster-order texel.""" + out = bytearray(tw*th) + for y in range(th): + r = y*tw + for x in range(tw): + a, hi = psmt4_addr(tbp, fbw, x, y) + b = self.m[a] if 0 <= a < self.SIZE else 0 + out[r+x] = ((b >> 4) & 0xF) if hi else (b & 0xF) + return out + def read_ct32_word(self, dbp, dbw, x, y): a = ct32_addr(dbp, dbw, x, y) return int.from_bytes(self.m[a:a+4], "little") if a+4 <= self.SIZE else 0 diff --git a/tools/gs_make_sh3_banded_diag.py b/tools/gs_make_sh3_banded_diag.py new file mode 100644 index 0000000..d0b1c16 --- /dev/null +++ b/tools/gs_make_sh3_banded_diag.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python3 +# Ch352 diagnostic (Codex's test): replace the SH3 texture indices with a LARGE, UNMISTAKABLE +# 16x16-cell pattern using strongly-contrasting indices from the REAL SH3 CSM1 palette, and emit it +# through the EXACT same linear LPDDR texture file the uploader streams. Geometry / CLUT / feeder are +# untouched. If the cells render as clean flat colors -> the board photo is authentic high-frequency +# SH3 texture, NOT timing corruption. If the flat cells speckle -> real corruption. +# +# LOCAL/gitignored (palette is dump-derived). Backs up the real texture to *.REAL.bak first. +import sys, os +sys.path.insert(0, os.path.dirname(os.path.abspath(__file__))) +from gs_localmem import ct32_addr # CT32 grid de-swizzle (CSM1 palette layout) + +DATA = os.path.join(os.path.dirname(__file__), "..", "sim", "data", "top_psmct32_raster_demo") +TEX = os.path.join(DATA, "sh3_real_tex_lpddr.mem") +CLUT = os.path.join(DATA, "sh3_real_clut.mem") +TW = TH = 512 +CELL = 16 +NCHOSEN = 8 + +def load_words(path): + out = [] + with open(path) as f: + for ln in f: + s = ln.strip() + if not s or s.startswith("/"): + continue + out.append(int(s, 16) & 0xFFFFFFFF) + return out + +# ---- 1) de-grid the CSM1 palette to index order, get each index's RGB ---- +clut_words = load_words(CLUT) +clut_bytes = bytearray() +for w in clut_words: + clut_bytes += (w & 0xFFFFFFFF).to_bytes(4, "little") +pal = [0]*256 +for i in range(256): + a = ct32_addr(0, 1, i & 15, i >> 4) # palette entry i sits at grid (i%16, i//16) + pal[i] = int.from_bytes(clut_bytes[a:a+4], "little") if a+4 <= len(clut_bytes) else 0 +rgb = [(p & 0xFF, (p >> 8) & 0xFF, (p >> 16) & 0xFF) for p in pal] # PSMCT32 low byte = R + +# ---- 2) greedy farthest-point pick of NCHOSEN maximally-contrasting indices ---- +def d2(a, b): return sum((a[k]-b[k])**2 for k in range(3)) +chosen = [max(range(256), key=lambda i: rgb[i][0]+rgb[i][1]+rgb[i][2])] # start brightest +while len(chosen) < NCHOSEN: + nxt = max(range(256), key=lambda i: min(d2(rgb[i], rgb[c]) for c in chosen)) + chosen.append(nxt) +print("[banded] chosen indices + RGB:", [(c, rgb[c]) for c in chosen]) + +# ---- 3) build the 16x16-cell pattern as LINEAR raster indices (PSMT8_SWIZZLE=0) ---- +idx = bytearray(TW*TH) +for y in range(TH): + cy = y // CELL + for x in range(TW): + cx = x // CELL + idx[y*TW + x] = chosen[(cx + cy) % NCHOSEN] # diagonal bands of contrasting flat cells + +# ---- 4) pack 4 indices / LE word, write through the exact uploader format ---- +if os.path.exists(TEX) and not os.path.exists(TEX + ".REAL.bak"): + os.rename(TEX, TEX + ".REAL.bak") + print("[banded] backed up real texture ->", os.path.basename(TEX) + ".REAL.bak") +nwords = (TW*TH)//4 +with open(TEX, "w") as f: + f.write("// Ch352 DIAGNOSTIC banded 16x16-cell texture (contrasting SH3 palette indices). " + "LINEAR de-swizzled, PSMT8_SWIZZLE=0. Restore from sh3_real_tex_lpddr.mem.REAL.bak. gitignored.\n") + sm = 0 + for w in range(nwords): + word = idx[4*w] | (idx[4*w+1] << 8) | (idx[4*w+2] << 16) | (idx[4*w+3] << 24) + sm = (sm + word) & 0xFFFFFFFF + f.write("%08x\n" % word) +print(f"[banded] wrote {nwords} words to {TEX} sum32=0x{sm:08x}") +print("[banded] upload as usual; on HDMI expect a perspective-warped grid of FLAT contrasting cells.") +print("[banded] CLEAN flat cells => authentic texture (not corruption). SPECKLED cells => real corruption.") diff --git a/tools/gs_make_sh3_ct32_darken_fixture.py b/tools/gs_make_sh3_ct32_darken_fixture.py new file mode 100644 index 0000000..b9b4e19 --- /dev/null +++ b/tools/gs_make_sh3_ct32_darken_fixture.py @@ -0,0 +1,154 @@ +#!/usr/bin/env python3 +"""Emit SH3's two authentic PSMCT32 full-frame darkening sprites. + +The source frame builds a 256x256 direct-color intermediate at TBP 11264, +then draws it over the 512-wide display as two ABE sprites (indices 196167 +and 196177). The production texture cache is exactly 256 KiB, so the +intermediate can be reconstructed from GS local memory, linearized, and +replayed without first implementing the two off-screen render targets. +""" +import glob +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) +sys.path.insert(0, DATA) +import gs_make_sh3_multidraw_fixture as MD +import gs_sh3_recon as RC +import bake + +DRAW_IDS = (196167, 196177) +W, H, FBW = 640, 480, 10 +TW = TH = 256 +NEW_TBP = 1024 +TEX_BYTES = TW * TH * 4 +N_BEATS = TEX_BYTES // 32 +STG_WORDS = 2048 +CAPACITY = 14500 +PERSP_FRAC = bake.PERSP_FRAC +PSCALE = 4 + + +def wmem(name, words, banner): + with open(os.path.join(DATA, name), "w") as f: + f.write(f"// {banner}\n") + for word in words: + f.write(f"{word & 0xffffffff:08x}\n") + + +def vertex_words(v): + s_fp = round(v["s"] * TW * (1 << PERSP_FRAC) * PSCALE) + t_fp = round(v["t"] * TH * (1 << PERSP_FRAC) * PSCALE) + q_fp = round(v["q"] * (1 << PERSP_FRAC) * PSCALE) + if not (-(1 << 23) <= s_fp < (1 << 23) and -(1 << 23) <= t_fp < (1 << 23)): + raise ValueError(f"S/T overflow: {s_fp},{t_fp}") + x = max(0, min(W - 1, round(v["x"]))) + y = max(0, min(H - 1, round(v["y"]))) + rgba = v["rgba"] + # Preserve the authentic RGBAQ alpha. bake.rgbaq_with_q() is a legacy + # opaque helper (A=0xff), but these MODULATE+TCC passes depend on the + # captured 0x50 vertex alpha: As = At*Av/128. + return [((q_fp & 0xffffffff) << 32) | (rgba & 0xffffffff), + bake.st_data(s_fp & 0xffffff, t_fp & 0xffffff), + bake.xyz2_dataz(x, y, v["z"])] + + +def sprite_bands(draw): + a, b = draw["verts"] + if not (a.get("kick", True) and b.get("kick", True)): + return [] + y0 = max(0.0, a["y"]) + y1 = min(float(H), b["y"]) + if y1 <= y0: + return [] + out = [] + for lo in range(int(y0), int(y1), 16): + hi = min(int(y1), lo + 16) + fa = (lo - a["y"]) / (b["y"] - a["y"]) + fb = (hi - a["y"]) / (b["y"] - a["y"]) + top = dict(a, y=float(lo), t=a["t"] + fa * (b["t"] - a["t"]), + q=a["q"] + fa * (b["q"] - a["q"])) + bot = dict(b, y=float(hi), t=a["t"] + fb * (b["t"] - a["t"]), + q=a["q"] + fb * (b["q"] - a["q"])) + tl = dict(top, x=a["x"], s=a["s"]) + tr = dict(top, x=b["x"], s=b["s"]) + bl = dict(bot, x=a["x"], s=a["s"]) + br = dict(bot, x=b["x"], s=b["s"]) + tris = ((tl, tr, bl), (tr, br, bl)) + coverage = max(0, round(b["x"]) - round(a["x"])) * (hi - lo) + out.append((tris, coverage)) + return out + + +def main(argv): + tag = argv[argv.index("--tag") + 1] if "--tag" in argv else "zsrt139f11d" + dump = next((x for x in argv[1:] if x.endswith(".gs.zst")), None) + if dump is None: + dump = next(iter(glob.glob(os.path.join(ROOT, "captures", "gs", "silenthill3", "*224139*.gs.zst"))), None) + if dump is None: + raise SystemExit("no 224139 dump found") + + got, _ = MD.load_draws(dump, DRAW_IDS) + if sorted(got) != list(DRAW_IDS): + raise SystemExit(f"missing draws: {sorted(set(DRAW_IDS) - set(got))}") + ref = got[DRAW_IDS[0]]["state"] + for idx in DRAW_IDS: + st = got[idx]["state"] + t0, pr = st["tex0"], st["prim"] + if (t0["tbp"], t0["tbw"], t0["psm"], t0["tw"], t0["th"], t0["tfx"]) != (11264, 4, 0, 256, 256, 0): + raise SystemExit(f"idx{idx}: unexpected TEX0 {t0}") + if (pr["type"], pr["tme"], pr["fst"], pr["abe"]) != (6, 1, 0, 1): + raise SystemExit(f"idx{idx}: unexpected PRIM {pr}") + for key in ("frame", "test", "zbuf", "alpha", "clamp"): + if st[key] != ref[key]: + raise SystemExit(f"idx{idx}: {key} differs") + + mem, *_ = RC.build_localmem_to(dump, DRAW_IDS[0]) + tex = [mem.read_ct32_word(11264, 4, x, y) for y in range(TH) for x in range(TW)] + crc = sum(tex) & 0xffffffff + wmem(f"sh3_{tag}0_tex_lpddr.mem", tex, + f"Ch414 authentic 256x256 PSMCT32 intermediate, linearized; crc=0x{crc:08x}") + + pieces = [] + for idx in DRAW_IDS: + pieces.extend(sprite_bands(got[idx])) + epochs, cur, cov = [], [], 0 + for tris, npx in pieces: + if cur and cov + npx > CAPACITY: + epochs.append((cur, cov)); cur, cov = [], 0 + cur.extend(tris); cov += npx + if cur: + epochs.append((cur, cov)) + + tex0 = bake.tex0_pack(NEW_TBP, 4, psm=0, tw=8, th=8, tfx=0) + prim = 3 | (1 << 4) | (1 << 6) # independent TRIANGLE records, TME, ABE + # Preserve authentic RGB-only FBMSK while changing only FBP/FBW. + frame = bake.frame_1_psmct32(FBW) | (ref["frame"] & 0xffffffff00000000) + for k, (tris, npx) in enumerate(epochs): + stg = [len(tris) | (1 << 32) | (1 << 34), frame, ref["alpha"], + ref["test"], ref["zbuf"], tex0, ref["clamp"], prim] + for tri in tris: + for v in tri: + stg.extend(vertex_words(v)) + if len(stg) > STG_WORDS: + raise SystemExit(f"epoch{k}: staging overflow {len(stg)}") + bake.write_feeder_stg_mem(f"feeder_sh3_{tag}{k}.mem", stg, + f"Ch414 authentic CT32 darken epoch{k}, {len(tris)} tris, coverage {npx}", total=STG_WORDS) + + with open(os.path.join(DATA, f"sh3_{tag}_epochs.txt"), "w") as f: + f.write("# Ch414 authentic PSMCT32 intermediate darkening sprites\n") + f.write("# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32\n") + f.write(f"META n_epochs {len(epochs)} fbpxw {W} fbh {H} fbwords {W*H} lpddr_tex 0x200000 tex_words {len(tex)} n_beats {N_BEATS}\n") + for k, (tris, _npx) in enumerate(epochs): + f.write(f"{k} {DRAW_IDS[0]} 11264 0 sh3_{tag}0_tex_lpddr.mem 0x200000 {TEX_BYTES} 0x{crc:08x} " + f"feeder_sh3_{tag}{k}.mem {8 + 9*len(tris)} {len(tris)} {0 if k == 0 else 1} - 0x00000000\n") + print(f"[Ch414] PASS: {len(DRAW_IDS)} CT32 sprites -> {len(pieces)} bands -> {len(epochs)} epochs; " + f"max coverage={max(x[1] for x in epochs)} crc=0x{crc:08x}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_make_sh3_multidraw_fixture.py b/tools/gs_make_sh3_multidraw_fixture.py new file mode 100644 index 0000000..0ac980c --- /dev/null +++ b/tools/gs_make_sh3_multidraw_fixture.py @@ -0,0 +1,395 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch354 Brick 1: MULTI-DRAW SH3 fixture. + +Composite N authentic SH3 draws that SHARE one texture+CLUT into ONE LPDDR framebuffer, proving the FB path is +scene-capable (a real draw LIST, not one selected draw). ONE new variable vs Ch353: multiple authentic draws +accumulating into one FB. Explicitly NOT in Brick 1 (Codex): multi-texture residency, full 640x480, large Z-buffer. + +Codex guardrails enforced (fail-CLOSED, before any integration sim): + #1 report each draw's clipped tri count + total staging words; FAIL if > FEEDER_STG_WORDS. + #2 prove ALL feeder-visible state matches: TEX0(all fields), FRAME, PRIM/FST/TME/ABE, TEST/Z, CLAMP, ALPHA, TEXA, + texture dims/format. + #3 texture/CLUT check is CONTENT-based (epoch-aware): a same-byte re-upload is fine; a changed payload FAILS. + #4 draws justified MECHANICALLY (same frame, contiguous run of the same texture key), not visually. + #5 (emit stage) the oracle is generated INDEPENDENTLY from reconstructed GS local memory, NOT from feeder records. + #6 (emit stage) preserve dump order; explicitly SCORE the overlap regions (where accumulation is actually proven). + +Usage: gs_make_sh3_multidraw_fixture.py [dump.gs.zst] --draw-list 89548,89761,89974 [--emit] +LOCAL/gitignored outputs (dump-derived). This tool NEVER touches the Ch353 single-draw fixture (byte-stable). +""" +import sys, os, glob +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") +import gs_sh3_draw_census as C +import gs_sh3_recon as RC +import gs_texture_residency as R +sys.path.insert(0, DATA); import bake + +# address map — identical to the Ch353 single-draw fixture (128 KiB VRAM / CBP=480 / texture in LPDDR, Codex option A) +CBP = 0x1E000//256 # 480 CLUT base (grid bytes) +NEW_TBP = 0x40000//256 # 1024 texture VRAM base (cache-intercepted) +TEX_BYTES = 512*512 # 262144 PSMT8 +STG_WORDS = 2048 # FEEDER_STG_WORDS for the multi-draw PROFILE (Codex-approved; crop/Ch353 keep 768). + # Fail-CLOSED gate: a combined list beyond this must raise the param again (board-BRAM), + # never silently truncate. 16-bit tri count + 12-bit staging addr cover 2047 words. +FBW_MAX = 10 # 640 px hard ceiling for Brick 1 (no full-frame work); union wider than this = fail + +def f32(bits): + import struct; return struct.unpack("=1 and cur["first_idx"] in want: + got[cur["first_idx"]]=cur + cur=None + def open_draw(idx): + nonlocal cur + cur=dict(first_idx=idx, frame=cur_frame, key=texkey(), state=snapshot_state(), nprim=0, verts=[]) + + for e in events: + if e.kind=="FRAME_BOUNDARY": cur_frame=e.frame+1; continue + if e.kind!="GSREG": continue + cur_frame=e.frame; r,v=e.reg,e.value + if r=="PRIM": close(); prim=dict(type=v&7, tme=(v>>4)&1, fge=(v>>5)&1, + fst=(v>>8)&1, abe=(v>>6)&1, ctxt=(v>>9)&1) + elif r in ("TEX0_1","TEX0_2"): st[r]=R.dec_tex0(v) + elif r=="XYOFFSET_1": ofx[1]=(v&0xFFFF)/16.0; ofy[1]=((v>>32)&0xFFFF)/16.0 + elif r=="XYOFFSET_2": ofx[2]=(v&0xFFFF)/16.0; ofy[2]=((v>>32)&0xFFFF)/16.0 + elif r in st: st[r]=v # FRAME/TEST/ZBUF/CLAMP/ALPHA/TEXA raw qwords (compared verbatim) + elif r=="RGBAQ": cur_rgba=v&0xFFFFFFFF + elif r=="ST": + s=f32(v&0xFFFFFFFF); t=f32((v>>32)&0xFFFFFFFF); q=f32(e.info.get("q_stq",0x3F800000)); cur_st=(s,t,q) + elif r=="UV": cur_uv=((v&0x3FFF)/16.0, ((v>>16)&0x3FFF)/16.0) + elif r in ("XYZF2","XYZ2","XYZF3","XYZ3"): + xf=v&0xFFFF; yf=(v>>16)&0xFFFF; c=ctx(); x=xf/16.0-ofx[c]; y=yf/16.0-ofy[c] + is_xyzf = r in ("XYZF2", "XYZF3") + z=(v>>32)&0xFFFFFF if is_xyzf else (v>>32)&0xFFFFFFFF + fog=(v>>56)&0xFF if is_xyzf else 0xFF + if (not prim["tme"] and not allow_untextured) or texkey() is None: continue + if cur is None or cur["key"]!=texkey(): close(); open_draw(e.idx) + t0=cur["state"]["tex0"] + # S/T/Q are architecturally ignored when TME=0. Canonicalize + # them so untextured fixture generation never depends on stale + # ST/UV registers or trips the perspective fixed-point gates. + stq=((0.0,0.0,1.0) if not prim["tme"] else + ((cur_uv[0]/t0["tw"],cur_uv[1]/t0["th"],1.0) if prim["fst"] else cur_st)) + # XYZ2/XYZF2 normally perform a drawing kick, but PACKED XYZ2/F2 + # carries ADC in bit 111. gs_parse exposes that as note="adc" + # while retaining the XYZ2/F2 register name. ADC and XYZ3/F3 + # both feed the primitive assembler without drawing the triangle + # completed by this vertex. Retain the vertex for strip + # continuity, but mark it as non-kicking. + cur["verts"].append(dict(x=x,y=y,z=z,fog=fog,s=stq[0],t=stq[1],q=stq[2],rgba=cur_rgba, + kick=(r in ("XYZF2","XYZ2") and e.info.get("note") != "adc"))) + cur["nprim"]+=1 + close() + return got, vram + +def clip_rect(tri, W, H): + def lerp(p1,p2,a): return {k:(p1[k]+a*(p2[k]-p1[k])) for k in ("x","y","s","t","q")} + def clip_edge(poly, inside, isect): + out=[]; n=len(poly) + for i in range(n): + a=poly[i]; b=poly[(i+1)%n]; ina=inside(a); inb=inside(b) + if ina: out.append(a) + if ina!=inb: out.append(isect(a,b)) + return out + poly=[dict(x=v["x"],y=v["y"],s=v["s"],t=v["t"],q=v["q"]) for v in tri] + poly=clip_edge(poly, lambda p:p["x"]>=0.0, lambda a,b:lerp(a,b,(0.0-a["x"])/(b["x"]-a["x"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["x"]<=W, lambda a,b:lerp(a,b,(W-a["x"])/(b["x"]-a["x"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["y"]>=0.0, lambda a,b:lerp(a,b,(0.0-a["y"])/(b["y"]-a["y"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["y"]<=H, lambda a,b:lerp(a,b,(H-a["y"])/(b["y"]-a["y"]))) + if len(poly)<3: return [] + return [(poly[0],poly[k],poly[k+1]) for k in range(1,len(poly)-1)] + +def main(argv): + a=argv[1:]; dump=a[0] if a and not a[0].startswith("--") else None + if "--draw-list" not in a: sys.exit("need --draw-list idx,idx,...") + idxs=[int(x) for x in a[a.index("--draw-list")+1].split(",")] + tag = a[a.index("--tag")+1] if "--tag" in a else "multi" # output-file suffix (diagnostic isolation runs) + only = int(a[a.index("--only")+1]) if "--only" in a else None # emit ONLY this draw's tris (keep full-set union) + if dump is None: + c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") + dump=c[0] + print(f"[Ch354] dump={os.path.basename(dump)} draw-list={idxs}") + + got, vram = load_draws(dump, idxs) + missing=[i for i in idxs if i not in got] + if missing: sys.exit(f"[Ch354] FAIL: draw idx {missing} not found as textured draws") + draws=[got[i] for i in idxs] # dump order = the order the user passed (verify below) + + # ---- Guardrail #4: MECHANICAL justification — same frame, contiguous run of ONE texture key ---- + frames={d["frame"] for d in draws} + keys={d["key"] for d in draws} + order_ok = idxs==sorted(idxs) + print(f"[Ch354] frames={sorted(frames)} texkeys={keys} dump-order(ascending idx)={order_ok}") + if len(frames)!=1: sys.exit(f"[Ch354] FAIL(#4): draws span multiple frames {sorted(frames)} — not one scene/run") + if len(keys)!=1: sys.exit(f"[Ch354] FAIL(#4): draws have different texture keys {keys} — not one shared texture") + if not order_ok: sys.exit(f"[Ch354] FAIL(#4): --draw-list not in ascending dump order {idxs}") + + # ---- Guardrail #2: ALL feeder-visible state must match across the selected draws ---- + ref=draws[0]["state"]; t0r=ref["tex0"] + for fld in ("tbp","tbw","psm","tw","th","tcc","tfx","cbp","cpsm","cld"): + vals={d["state"]["tex0"][fld] for d in draws} + if len(vals)!=1: sys.exit(f"[Ch354] FAIL(#2): TEX0.{fld} differs across draws: {vals}") + for fld in ("type","fst","tme","abe"): + vals={d["state"]["prim"][fld] for d in draws} + if len(vals)!=1: sys.exit(f"[Ch354] FAIL(#2): PRIM.{fld} differs: {vals}") + for reg in ("frame","test","zbuf","clamp","alpha","texa"): + vals={d["state"][reg] for d in draws} + if len(vals)!=1: sys.exit(f"[Ch354] FAIL(#2): {reg.upper()} state differs across draws: {vals}") + assert t0r["tw"]==512 and t0r["th"]==512 and t0r["psm"]==0x13, f"unexpected TEX0 {t0r}" + print(f"[Ch354] #2 OK: all feeder-visible state identical — TEX0 tbp={t0r['tbp']} cbp={t0r['cbp']} psm=0x{t0r['psm']:02x} " + f"{t0r['tw']}x{t0r['th']}; PRIM type={ref['prim']['type']} fst={ref['prim']['fst']} tme={ref['prim']['tme']} " + f"abe={ref['prim']['abe']}; TEST/ZBUF/CLAMP/ALPHA/TEXA match") + + # ---- Guardrail #3: CONTENT-based (epoch-aware) texture + CLUT check. Reconstruct local memory to EACH draw and + # compare the texture bytes @tbp + CLUT bytes @cbp. Same-byte re-upload -> identical -> OK; changed -> FAIL. ---- + tbp=t0r["tbp"]; cbp=t0r["cbp"]; texref=None; clutref=None + for d in draws: + mem, *_ = RC.build_localmem_to(dump, d["first_idx"]) + if mem is None: sys.exit(f"[Ch354] FAIL(#3): VRAM snapshot absent at idx{d['first_idx']}") + tb=bytes(mem.m[tbp*256 : tbp*256+TEX_BYTES]); cb=bytes(mem.m[cbp*256 : cbp*256+1024]) + if texref is None: texref=tb; clutref=cb; anchor=d["first_idx"] + else: + if tb!=texref: sys.exit(f"[Ch354] FAIL(#3): texture @tbp={tbp} CHANGED between idx{anchor} and idx{d['first_idx']} " + f"(payload differs — needs multi-texture residency, deferred past Brick 1)") + if cb!=clutref: sys.exit(f"[Ch354] FAIL(#3): CLUT @cbp={cbp} CHANGED between idx{anchor} and idx{d['first_idx']}") + print(f"[Ch354] #3 OK: texture @tbp={tbp} ({TEX_BYTES} B) + CLUT @cbp={cbp} (1024 B) byte-identical across all " + f"{len(draws)} draws (content-compared; same-byte re-uploads are fine)") + + # ---- Guardrail #3: deterministic UNION bbox -> FB origin/size/stride ---- + OX=int(min(min(v["x"] for v in d["verts"]) for d in draws)) + OY=int(min(min(v["y"] for v in d["verts"]) for d in draws)) + UXMAX=max(max(v["x"] for v in d["verts"]) for d in draws) + UYMAX=max(max(v["y"] for v in d["verts"]) for d in draws) + W=int(UXMAX)-OX+1; H=int(UYMAX)-OY+1 + FBW=(W+63)//64; FBPXW=FBW*64 + if FBW>FBW_MAX: sys.exit(f"[Ch354] FAIL: union width {W}px (FBW={FBW}) exceeds Brick-1 ceiling {FBW_MAX*64}px") + STRIDE=FBPXW*4 + print(f"[Ch354] #3 UNION bbox: origin=({OX},{OY}) size={W}x{H}px -> FB {FBPXW}x{H} (FBW={FBW}) stride={STRIDE}B " + f"= {FBPXW*H*4} B ({FBPXW*H*4//1024} KiB)") + + # ---- Guardrail #1: per-draw CLIPPED tri count + total staging words, fail-CLOSED on FEEDER_STG_WORDS ---- + HEADER_WORDS=7 # ntris|flag, FRAME, ALPHA, TEST, ZBUF, TEX0, PRIM + total_tris=0; per=[] + for d in draws: + fv=[dict(x=v["x"]-OX, y=v["y"]-OY, s=v["s"], t=v["t"], q=v["q"]) for v in d["verts"]] + raw=[(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv))] # TRI_STRIP -> triangles + clipped=[] + for tri in raw: clipped += clip_rect(tri, FBPXW, H) + per.append((d["first_idx"], len(fv), len(raw), len(clipped))); total_tris+=len(clipped) + words=HEADER_WORDS + total_tris*9 + print(f"[Ch354] #1 staging capacity (FEEDER_STG_WORDS={STG_WORDS}):") + for (idx,nv,nraw,ncl) in per: + print(f" idx{idx}: {nv} verts -> {nraw} strip-tris -> {ncl} clipped-tris") + print(f" TOTAL {total_tris} clipped tris -> {words} staging words " + f"({'OK' if words<=STG_WORDS else 'OVER by %d'%(words-STG_WORDS)})") + if words>STG_WORDS: + sys.exit(f"[Ch354] FAIL-CLOSED(#1): combined list {words} words > FEEDER_STG_WORDS={STG_WORDS}. " + f"Raise the PROFILE FEEDER_STG_WORDS (board-BRAM cost) to >= {words} (e.g. {1<<(words-1).bit_length()}) " + f"OR reduce the draw set. Do NOT discover this in integration sim.") + + print(f"[Ch354] all fail-closed gates PASS.") + if "--emit" not in a: + print("[Ch354] (validation only; pass --emit to generate the fixture)"); return 0 + + # ================= --emit: combined feeder list + INDEPENDENT oracle (guardrails #5, #6) ================= + STG_WORDS_MULTI=2048 # Codex-approved profile-only staging RAM (crop/Ch353 keep 768) + PERSP_FRAC=bake.PERSP_FRAC; PSCALE=4096; TW=512; TH=512; TW_LOG=TH_LOG=9; TBW_TEX=8 + NEW_TBP=0x40000//256; TEX_VRAM_BASE=NEW_TBP*256; LPDDR_TEX_BASE=0x00200000; VRAM_BYTES=0x20000 + S24_MAX=(1<<23)-1 + def tex0_real(tbp2,cbp2): + v=bake.tex0_pack(tbp2,TBW_TEX,psm=0x13,tw=TW_LOG,th=TH_LOG,tfx=1) + v|=(cbp2&0x3FFF)<<37; v|=(0&0xF)<<51; v|=(0&0x1)<<55; v|=(0&0x1F)<<56; v|=(1&0x7)<<61 + return v + def vert_words(v): + s_fp=round(v["s"]*TW*(1<S24_MAX or abs(t_fp)>S24_MAX: sys.exit(f"[Ch354] ST overflow {s_fp},{t_fp} (lower PSCALE)") + if abs(q_fp)>0x7FFFFFFF: sys.exit(f"[Ch354] Q overflow {q_fp}") + sx=max(0,min(FBPXW-1,int(round(v["x"])))); sy=max(0,min(H-1,int(round(v["y"])))) + return [bake.rgbaq_with_q(0,0,0,q_fp&0xFFFFFFFF), bake.st_data(s_fp&0xFFFFFF,t_fp&0xFFFFFF), + bake.xyz2_dataz(sx,sy,0x0000_5000)] + def draw_tris(d): + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,s=v["s"],t=v["t"],q=v["q"]) for v in d["verts"]] + raw=[(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv))] + out=[] + for tri in raw: out += clip_rect(tri, FBPXW, H) + return out + + # shared texture/CLUT (tbp=9216) reconstructed ONCE — feeds BOTH the LPDDR upload AND the independent oracle + mem0, *_ = RC.build_localmem_to(dump, draws[0]["first_idx"]) + idx = mem0.read_psmt8(tbp, t0r["tbw"], TW, TH) + pal = RC.read_clut32(mem0, cbp, order="grid") + clut_bytes = bytes(mem0.m[cbp*256 : cbp*256+1024]) + idx_words = [idx[i*4]|(idx[i*4+1]<<8)|(idx[i*4+2]<<16)|(idx[i*4+3]<<24) for i in range(TW*TH//4)] + + # render set: the FULL list, or a SINGLE draw (--only) for the isolation/composition diagnostic (same union frame) + render_set = [got[only]] if only is not None else draws + if only is not None and only not in got: sys.exit(f"[Ch354] --only {only} not in --draw-list") + print(f"[Ch354] tag='{tag}' render_set={[d['first_idx'] for d in render_set]} (union from full {idxs})") + # combined feeder list: ONE shared-state header + the render-set's clipped tris in DUMP ORDER (#6) + all_tris=[] + for d in render_set: all_tris += draw_tris(d) + ntris=len(all_tris) + stg=[ntris|(1<<32), bake.frame_1_psmct32(FBW), bake.alpha_pack(0,1,0,1), 0, bake.zbuf1_pack(0,zmsk=1), + tex0_real(NEW_TBP,CBP), 3|(1<<4)] + for (v0,v1,v2) in all_tris: + for v in (v0,v1,v2): stg += vert_words(v) + if len(stg)>STG_WORDS_MULTI: sys.exit(f"[Ch354] staging {len(stg)} > {STG_WORDS_MULTI}") + max_addr=len(stg)-1 + print(f"[Ch354] combined feeder list: {ntris} tris -> {len(stg)} words (max staging addr {max_addr} < {STG_WORDS_MULTI}); records_emitted should == {ntris}") + + # INDEPENDENT oracle (#5): rasterize the RECONSTRUCTED geometry+texture in DUMP ORDER (paint-order, DECAL/no-Z, + # matching the RTL flush order), per FB pixel — NOT parsed from feeder records. Track DISTINCT draw count per pixel + # -> OVERLAP regions (#6). refmap word: [31]covered [30]interior [28]overlap [17:9]tu [8:0]tv. + refmap=[0]*(FBPXW*H); refpix=[(0,0,0)]*(FBPXW*H); ndraw=[0]*(FBPXW*H); lastdraw=[-1]*(FBPXW*H) + for di,d in enumerate(render_set): + for (v0,v1,v2) in draw_tris(d): + x0,y0=v0["x"],v0["y"]; x1,y1=v1["x"],v1["y"]; x2,y2=v2["x"],v2["y"] + ar=edge(x0,y0,x1,y1,x2,y2) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(x0,x1,x2))); maxx=min(FBPXW-1,int(max(x0,x1,x2))+1) + miny=max(0,int(min(y0,y1,y2))); maxy=min(H-1,int(max(y0,y1,y2))+1) + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(x1,y1,x2,y2,cx,cy)*inv; w1=edge(x2,y2,x0,y0,cx,cy)*inv; w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + a0=edge(x1,y1,x2,y2,float(px),float(py))*inv; a1=edge(x2,y2,x0,y0,float(px),float(py))*inv; a2=1.0-a0-a1 + S=a0*v0["s"]+a1*v1["s"]+a2*v2["s"]; T=a0*v0["t"]+a1*v1["t"]+a2*v2["t"]; Q=a0*v0["q"]+a1*v1["q"]+a2*v2["q"] + if abs(Q)<1e-12: continue + tu=int((S/Q)*TW)%TW; tv=int((T/Q)*TH)%TH + if tu<0: tu+=TW + if tv<0: tv+=TH + o=py*FBPXW+px; mw=min(w0,w1,w2); interior=1 if mw>0.04 else 0 + if lastdraw[o]!=di: ndraw[o]+=1; lastdraw[o]=di # DISTINCT draws covering this pixel + refmap[o]=(1<<31)|(interior<<30)|((tu&0x1FF)<<9)|(tv&0x1FF) # later draw overwrites (paint-order) + p=pal[idx[tv*TW+tu]&0xFF]; refpix[o]=(p&0xFF,(p>>8)&0xFF,(p>>16)&0xFF) + overlap_px=0 + for o in range(FBPXW*H): + if ndraw[o]>1: refmap[o]|=(1<<28); overlap_px+=1 + covered=sum(1 for w in refmap if w>>31) + print(f"[Ch354] #5/#6 independent oracle: {covered} covered px, {overlap_px} OVERLAP px (>1 distinct draw) [refmap bit28]") + if only is None and overlap_px==0: + sys.exit("[Ch354] FAIL(#6): NO overlap pixels — the draws don't accumulate; multi-draw not proven") + + # OWNER map (Codex diagnostic): the FULL-set winning draw index per pixel, in DUMP ORDER (last covering draw wins). + # Used to compose the isolated single-draw RTL framebuffers and compare to the combined RTL render. + owner=[255]*(FBPXW*H) # 255 = uncovered + for di,d in enumerate(draws): # ALWAYS the full set (independent of --only) + for (v0,v1,v2) in draw_tris(d): + x0,y0=v0["x"],v0["y"]; x1,y1=v1["x"],v1["y"]; x2,y2=v2["x"],v2["y"] + ar=edge(x0,y0,x1,y1,x2,y2) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(x0,x1,x2))); maxx=min(FBPXW-1,int(max(x0,x1,x2))+1) + miny=max(0,int(min(y0,y1,y2))); maxy=min(H-1,int(max(y0,y1,y2))+1) + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(x1,y1,x2,y2,cx,cy)*inv; w1=edge(x2,y2,x0,y0,cx,cy)*inv; w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + owner[py*FBPXW+px]=di # later draw overwrites -> final owner (paint order) + + # ---- emit LOCAL fixtures (tag 'multi'; NEVER touch the Ch353 sh3_real_* single-draw fixture) ---- + def wmem(name, words, banner): + with open(os.path.join(DATA,name),"w") as f: + f.write(f"// {banner}\n") + for x in words: f.write(f"{x & 0xFFFFFFFF:08x}\n") + wmem(f"sh3_{tag}_idx.mem", idx_words, "Ch354 LOCAL shared SH3 512x512 de-swizzled indices (4/word). gitignored.") + wmem(f"sh3_{tag}_tex_lpddr.mem", idx_words, "Ch354 LOCAL shared SH3 512x512 LINEAR indices -> LPDDR (PSMT8_SWIZZLE=0). gitignored.") + wmem(f"sh3_{tag}_clut.mem", [int.from_bytes(clut_bytes[i*4:i*4+4],'little') for i in range(256)], + "Ch354 LOCAL shared SH3 CSM1 CLUT (grid bytes @cbp) -> BRAM. gitignored.") + wmem(f"sh3_{tag}_pal.mem", [p & 0xFFFFFFFF for p in pal], "Ch354 LOCAL de-gridded palette pal[i] for the TB. gitignored.") + wmem(f"sh3_{tag}_refmap.mem", refmap, "Ch354 LOCAL per-FB-pixel covered|interior|overlap|tu|tv oracle (render_set). gitignored.") + wmem(f"sh3_{tag}_owner.mem", owner, "Ch354 LOCAL per-FB-pixel FULL-set winning draw index (dump order; 255=uncovered). gitignored.") + bake.write_feeder_stg_mem(f"feeder_sh3_{tag}.mem", stg, + f"Ch354 LOCAL multi-draw SH3 (render {[d['first_idx'] for d in render_set]} of {idxs}) feeder staging: {ntris}-tri list + TEX0(PSMT8,CSM1,DECAL). gitignored.", + total=STG_WORDS_MULTI) # padded to 2048 (Codex) + + # setup bootlet: CSM1 CLUT 256x1 BITBLT -> CBP (identical pattern to Ch352; shared CLUT), DISPLAY1 = FBPXW x H + clut_words_b=[int.from_bytes(clut_bytes[i*4:i*4+4],"little") for i in range(256)] + RAM_QWORDS=512; pay=[] + pay.append(bake.giftag(1,0,0,4,int('E'*4,16))) + pay.append(bake.aplusd(bake.R_BITBLTBUF, bake.bitbltbuf_pack(CBP,1,0x00))) + pay.append(bake.aplusd(bake.R_TRXPOS, bake.trxpos_pack(0,0))) + pay.append(bake.aplusd(bake.R_TRXREG, bake.trxreg_pack(256,1))) + pay.append(bake.aplusd(bake.R_TRXDIR, bake.trxdir_pack(0))) + pay.append(bake.giftag(256//4,1,2,0,0)) + for q in range(256//4): + word=0 + for lane in range(4): word|=(clut_words_b[q*4+lane]&0xFFFFFFFF)<<(32*lane) + pay.append(word) + qwc=len(pay); disp_hi=((H-1)<<12)|(FBPXW-1) + with open(os.path.join(DATA,f"payload_sh3_{tag}.mem"),"w") as f: + f.write(f"// Ch354 LOCAL multi-draw setup payload (CSM1 CLUT -> CBP={CBP}). gitignored. QWC={qwc}.\n") + for _ in range(16): f.write(f"{0:032x}\n") + for x in pay: f.write(f"{x&((1<<128)-1):032x}\n") + for _ in range(RAM_QWORDS-16-qwc): f.write(f"{0:032x}\n") + bake.write_bios_mem(f"bios_sh3_{tag}.mem", bake.build_textured_demo_bootlet_disp(qwc, disp_hi, FBW), + f"Ch354 LOCAL multi-draw setup bootlet (QWC={qwc}, DISPLAY1={FBPXW}x{H}). gitignored.") + + with open(os.path.join(DATA,f"sh3_{tag}_params.vh"),"w") as f: + f.write("// Ch354 LOCAL generated params for the multi-draw integration TB. gitignored.\n") + f.write(f"localparam int FBW = {FBW};\n") + f.write(f"localparam int FBPXW = {FBPXW};\n") + f.write(f"localparam int FBH = {H};\n") + f.write(f"localparam int VRAM_BYTES_P = {VRAM_BYTES};\n") + f.write(f"localparam int CLUT_CBP = {CBP};\n") + f.write(f"localparam int NEW_TBP = {NEW_TBP};\n") + f.write(f"localparam int TEX_VRAM_BASE = {TEX_VRAM_BASE};\n") + f.write(f"localparam int TEX_BYTES = {TW*TH};\n") + f.write(f"localparam [29:0] LPDDR_TEX_BASE = 30'h{LPDDR_TEX_BASE:07x};\n") + f.write(f"localparam int N_BEATS = {TW*TH//32};\n") + f.write(f"localparam int STG_WORDS = {STG_WORDS_MULTI};\n") + f.write(f"localparam int TW = {TW};\n") + f.write(f"localparam int TH = {TH};\n") + f.write(f"localparam int NDRAWS = {len(draws)};\n") + f.write(f"localparam int NTRIS = {ntris};\n") + f.write(f"localparam int UNION_OX = {OX};\n") + f.write(f"localparam int UNION_OY = {OY};\n") + try: + from PIL import Image + im=Image.new("RGB",(FBPXW,H)); im.putdata(refpix) + im.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon",f"sh3_{tag}_ref.png")) + print(f"[Ch354] wrote sh3_{tag}_ref.png") + except Exception as ex: print("(PIL skipped:", ex, ")") + tex_sum=sum(idx_words)&0xFFFFFFFF; tex_xor=0 + for w in idx_words: tex_xor^=w + print(f"[Ch354] emitted multi-draw fixtures -> {DATA}. FB {FBPXW}x{H} stride {FBPXW*4}B; feeder {len(stg)}w (pad {STG_WORDS_MULTI}); " + f"tex sum32=0x{tex_sum:08x} xor32=0x{tex_xor:08x} @LPDDR 0x{LPDDR_TEX_BASE:07x}") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_make_sh3_multitex_fixture.py b/tools/gs_make_sh3_multitex_fixture.py new file mode 100644 index 0000000..5fbe265 --- /dev/null +++ b/tools/gs_make_sh3_multitex_fixture.py @@ -0,0 +1,259 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch355 Brick 1: MULTI-TEXTURE composition. + +Two authentic SH3 draw groups with DIFFERENT TEX0/CLUT accumulate into ONE LPDDR framebuffer via SCENE-LEVEL texture +rebind + staged-list retriggering (Codex). Dump order (authentic): A={19562} tbp=11264/cbp=14080 THEN B={89761} +tbp=9216/cbp=13952. NOT in Brick 1: per-primitive TEX0, multi-resident cache, 640x480, cross-draw Z. + +Preflight fail-CLOSED gates (this file, run first): + - both draws same frame; overlap on screen; DIFFERENT texture keys. + - each group's texture + CLUT independently RESIDENT at ITS draw-time epoch (per-draw local-memory reconstruction). + - the two textures are DIFFERENT content, and the two CLUTs are DIFFERENT content (real multi-texture, not aliasing). + - CLUTs RELOCATED to distinct, non-overlapping BRAM CBPs (CBP_A/CBP_B); reported for the TEX0-selects-CBP check. + +Usage: gs_make_sh3_multitex_fixture.py [dump.gs.zst] [--emit] (draws A/B fixed to the authentic pair) +LOCAL/gitignored. Reuses gs_make_sh3_multidraw_fixture.load_draws (same event-walk + full-state capture). +""" +import sys, os +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") +import gs_sh3_recon as RC +import gs_make_sh3_multidraw_fixture as MD # reuse load_draws + edge + clip_rect +sys.path.insert(0, DATA); import bake + +DRAW_A = 19562 # dump order: A first +DRAW_B = 89761 +TEX_BYTES = 512*512 +# relocated CLUT bases (distinct, non-overlapping). CLUT = 256 words = 1 KiB = 4 VRAM blocks (256 B each). +CBP_A = 0x1E000//256 # 480 (bytes 0x1E000..0x1E3FF) +CBP_B = 0x1E400//256 # 484 (bytes 0x1E400..0x1E7FF) — +1 KiB, no overlap with CBP_A + +def bbox(dr): + xs=[v["x"] for v in dr["verts"]]; ys=[v["y"] for v in dr["verts"]] + return (min(xs),min(ys),max(xs),max(ys)) + +def main(argv): + a=argv[1:]; dump=a[0] if a and not a[0].startswith("--") else None + if dump is None: + import glob; c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") + dump=c[0] + print(f"[Ch355] dump={os.path.basename(dump)} A=idx{DRAW_A} (first) -> B=idx{DRAW_B}") + + got, vram = MD.load_draws(dump, [DRAW_A, DRAW_B]) + for i in (DRAW_A, DRAW_B): + if i not in got: sys.exit(f"[Ch355] FAIL: draw idx{i} not found as a textured draw") + drA, drB = got[DRAW_A], got[DRAW_B] + tA, tB = drA["state"]["tex0"], drB["state"]["tex0"] + + # ---- gate: authentic dump order (A before B) ---- + if not (DRAW_A < DRAW_B): sys.exit(f"[Ch355] FAIL: A idx{DRAW_A} not before B idx{DRAW_B} (dump order)") + # ---- gate: same frame ---- + if drA["frame"]!=drB["frame"]: sys.exit(f"[Ch355] FAIL: A frame {drA['frame']} != B frame {drB['frame']}") + # ---- gate: DIFFERENT texture keys ---- + if drA["key"]==drB["key"]: sys.exit(f"[Ch355] FAIL: A and B share the same texture key {drA['key']} — not multi-texture") + print(f"[Ch355] A: TEX0 tbp={tA['tbp']} cbp={tA['cbp']} psm=0x{tA['psm']:02x} {tA['tw']}x{tA['th']} key={drA['key']}") + print(f"[Ch355] B: TEX0 tbp={tB['tbp']} cbp={tB['cbp']} psm=0x{tB['psm']:02x} {tB['tw']}x{tB['th']} key={drB['key']}") + # ---- gate: overlap on screen ---- + ax0,ay0,ax1,ay1=bbox(drA); bx0,by0,bx1,by1=bbox(drB) + ox0=max(ax0,bx0); oy0=max(ay0,by0); ox1=min(ax1,bx1); oy1=min(ay1,by1) + if not (ox1>ox0 and oy1>oy0): sys.exit(f"[Ch355] FAIL: A bbox {bbox(drA)} and B bbox {bbox(drB)} do not overlap on screen") + print(f"[Ch355] frame f{drA['frame']}; screen A[{ax0:.0f}..{ax1:.0f}]x[{ay0:.0f}..{ay1:.0f}] B[{bx0:.0f}..{bx1:.0f}]x[{by0:.0f}..{by1:.0f}] -> overlap [{ox0:.0f}..{ox1:.0f}]x[{oy0:.0f}..{oy1:.0f}]") + + # ---- gate: each group's texture + CLUT INDEPENDENTLY RESIDENT at its draw-time epoch; the two are DIFFERENT ---- + memA,*_ = RC.build_localmem_to(dump, DRAW_A) + memB,*_ = RC.build_localmem_to(dump, DRAW_B) + if memA is None or memB is None: sys.exit("[Ch355] FAIL: VRAM snapshot absent for a draw") + texA=bytes(memA.m[tA['tbp']*256:tA['tbp']*256+TEX_BYTES]); clutA=bytes(memA.m[tA['cbp']*256:tA['cbp']*256+1024]) + texB=bytes(memB.m[tB['tbp']*256:tB['tbp']*256+TEX_BYTES]); clutB=bytes(memB.m[tB['cbp']*256:tB['cbp']*256+1024]) + def nz(b): return any(x for x in b) + if not nz(texA): sys.exit(f"[Ch355] FAIL: texture A @tbp={tA['tbp']} not resident at idx{DRAW_A}") + if not nz(clutA): sys.exit(f"[Ch355] FAIL: CLUT A @cbp={tA['cbp']} not resident at idx{DRAW_A}") + if not nz(texB): sys.exit(f"[Ch355] FAIL: texture B @tbp={tB['tbp']} not resident at idx{DRAW_B}") + if not nz(clutB): sys.exit(f"[Ch355] FAIL: CLUT B @cbp={tB['cbp']} not resident at idx{DRAW_B}") + if texA==texB: sys.exit("[Ch355] FAIL: texture A == texture B (aliasing, not multi-texture)") + if clutA==clutB: sys.exit("[Ch355] FAIL: CLUT A == CLUT B (aliasing)") + crcA=sum(int.from_bytes(texA[i*4:i*4+4],'little') for i in range(TEX_BYTES//4))&0xFFFFFFFF + crcB=sum(int.from_bytes(texB[i*4:i*4+4],'little') for i in range(TEX_BYTES//4))&0xFFFFFFFF + print(f"[Ch355] texture A resident (sum32=0x{crcA:08x}) + CLUT A resident; texture B resident (sum32=0x{crcB:08x}) + CLUT B resident; A!=B (real multi-texture)") + + # ---- gate: CLUT relocation to distinct, non-overlapping BRAM CBPs ---- + if abs(CBP_A-CBP_B)<4: sys.exit(f"[Ch355] FAIL: relocated CBP_A={CBP_A} CBP_B={CBP_B} overlap (<4 blocks = 1 KiB)") + print(f"[Ch355] CLUT relocation: A -> CBP={CBP_A} (0x{CBP_A*256:x}), B -> CBP={CBP_B} (0x{CBP_B*256:x}); distinct, non-overlapping (each 1 KiB)") + + # ---- gate: relocated CLUT ranges within BRAM (VRAM 128 KiB = block 0..511; each CLUT = 4 blocks) ---- + VRAM_BLOCKS = (128*1024)//256 + for nm,cb in (("A",CBP_A),("B",CBP_B)): + if cb+4 > VRAM_BLOCKS: sys.exit(f"[Ch355] FAIL: relocated CLUT {nm} @CBP={cb} (+4 blocks) exceeds VRAM {VRAM_BLOCKS} blocks") + print(f"[Ch355] both relocated CLUTs within BRAM (VRAM {VRAM_BLOCKS} blocks; A@{CBP_A}+4, B@{CBP_B}+4)") + + print("[Ch355] PREFLIGHT PASS: authentic order, same frame, on-screen overlap, two independently-resident " + "textures+CLUTs (different content), relocatable to distinct in-BRAM CBPs.") + if "--emit" not in a: + print("[Ch355] (preflight only; --emit stage pending)"); return 0 + + # ================= --emit: two feeder lists + two textures/CLUTs + independent A->B reference ================= + NEW_TBP=0x40000//256; TEX_VRAM_BASE=NEW_TBP*256; LPDDR_TEX_BASE=0x00200000; VRAM_BYTES=0x20000 + PERSP_FRAC=bake.PERSP_FRAC; PSCALE=4096; TW=512; TH=512; TW_LOG=TH_LOG=9; TBW_TEX=8; S24_MAX=(1<<23)-1 + edge=MD.edge; clip_rect=MD.clip_rect + def tex0_word(cbp): + v=bake.tex0_pack(NEW_TBP,TBW_TEX,psm=0x13,tw=TW_LOG,th=TH_LOG,tfx=1) + v|=(cbp&0x3FFF)<<37; v|=(0&0xF)<<51; v|=(0&0x1)<<55; v|=(0&0x1F)<<56; v|=(1&0x7)<<61 + return v + # union bbox over BOTH groups (Codex: ~288x381 -> FBW=5/320x381) + allx=[v["x"] for d in (drA,drB) for v in d["verts"]]; ally=[v["y"] for d in (drA,drB) for v in d["verts"]] + OX=int(min(allx)); OY=int(min(ally)); W=int(max(allx))-OX+1; H=int(max(ally))-OY+1 + FBW=(W+63)//64; FBPXW=FBW*64; STRIDE=FBPXW*4 + print(f"[Ch355] UNION origin=({OX},{OY}) content={W}x{H} -> stored FB {FBPXW}x{H} (FBW={FBW}) stride={STRIDE}B " + f"size={FBPXW*H*4} (0x{FBPXW*H*4:x}) scanout={STRIDE//32*H} beats/frame; HDMI shows all {FBPXW} cols " + f"({FBPXW-W} right cols precleared-black beyond the {W}px content)") + + def vert_words(v): + s_fp=round(v["s"]*TW*(1<S24_MAX or abs(t_fp)>S24_MAX: sys.exit(f"[Ch355] ST overflow {s_fp},{t_fp}") + if abs(q_fp)>0x7FFFFFFF: sys.exit(f"[Ch355] Q overflow {q_fp}") + sx=max(0,min(FBPXW-1,int(round(v["x"])))); sy=max(0,min(H-1,int(round(v["y"])))) + return [bake.rgbaq_with_q(0,0,0,q_fp&0xFFFFFFFF), bake.st_data(s_fp&0xFFFFFF,t_fp&0xFFFFFF), bake.xyz2_dataz(sx,sy,0x0000_5000)] + def group_tris(dr): + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,s=v["s"],t=v["t"],q=v["q"]) for v in dr["verts"]] + raw=[(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv))] + out=[] + for tri in raw: out += clip_rect(tri, FBPXW, H) + return out + # Ch355 (Codex): the RTL perspective reciprocal is UNSIGNED — negative Q is unsupported. Canonicalize each triangle + # to positive Q BEFORE packing: all-Q-positive unchanged; all-Q-negative -> negate every vertex's S,T,Q (EXACT: + # (-s)/(-q)=s/q and the negation of a linear attribute interpolates identically); mixed-sign/zero Q -> FAIL CLOSED. + def canon_tri(v0,v1,v2): + qs=[v0["q"],v1["q"],v2["q"]] + if all(q>0 for q in qs): return (v0,v1,v2) + if all(q<0 for q in qs): + neg=lambda v: dict(x=v["x"],y=v["y"],s=-v["s"],t=-v["t"],q=-v["q"]) + return (neg(v0),neg(v1),neg(v2)) + sys.exit(f"[Ch355] FAIL-CLOSED: mixed-sign or zero Q in a triangle (qs={qs}) — signed-Q not supported (later platform extension)") + def feeder_list(dr, cbp): + tris=group_tris(dr); stg=[len(tris)|(1<<32), bake.frame_1_psmct32(FBW), bake.alpha_pack(0,1,0,1), 0, + bake.zbuf1_pack(0,zmsk=1), tex0_word(cbp), 3|(1<<4)] + for tri in tris: + cv0,cv1,cv2=canon_tri(*tri) + for v in (cv0,cv1,cv2): stg += vert_words(v) + return stg, len(tris) + # SYNTHETIC GATE (Codex): a positive-Q triangle and its ALL-NEGATED twin must canonicalize to BIT-IDENTICAL staging. + def _pack(tri): + c=canon_tri(*tri); out=[] + for v in c: out+=vert_words(v) + return out + _tp=[dict(x=10,y=20,s=0.00030,t=0.00040,q=0.0020), dict(x=30,y=25,s=0.00050,t=0.00010,q=0.0030), dict(x=15,y=40,s=0.00020,t=0.00060,q=0.0025)] + _tn=[dict(x=v["x"],y=v["y"],s=-v["s"],t=-v["t"],q=-v["q"]) for v in _tp] + if _pack(_tp)!=_pack(_tn): sys.exit("[Ch355] FAIL: canonicalization not bit-exact (positive-Q tri vs its all-negated twin differ)") + print("[Ch355] canonicalization self-test PASS: positive-Q triangle and its all-negated twin pack BIT-IDENTICALLY (exact ratio/interp preservation)") + + STG_WORDS=2048 + stgA,ntA = feeder_list(drA, CBP_A); stgB,ntB = feeder_list(drB, CBP_B) + for nm,stg in (("A",stgA),("B",stgB)): + if len(stg)>STG_WORDS: sys.exit(f"[Ch355] list {nm} {len(stg)} > STG_WORDS {STG_WORDS}") + if max(ntA,ntB)*3 >= (1<<12): sys.exit(f"[Ch355] staging addr exceeds 12-bit bridge range") + print(f"[Ch355] list A: {ntA} tris -> {len(stgA)} words (max addr {len(stgA)-1}); list B: {ntB} tris -> {len(stgB)} words (max addr {len(stgB)-1}); both < 12-bit {1<<12}") + + # per-group de-swizzled texture (LINEAR indices -> LPDDR) + CRC ; relocated CLUT bytes + de-gridded palette + idxA=memA.read_psmt8(tA['tbp'], tA['tbw'], TW, TH); idxB=memB.read_psmt8(tB['tbp'], tB['tbw'], TW, TH) + palA=RC.read_clut32(memA, tA['cbp'], order="grid"); palB=RC.read_clut32(memB, tB['cbp'], order="grid") + idxwA=[idxA[i*4]|(idxA[i*4+1]<<8)|(idxA[i*4+2]<<16)|(idxA[i*4+3]<<24) for i in range(TW*TH//4)] + idxwB=[idxB[i*4]|(idxB[i*4+1]<<8)|(idxB[i*4+2]<<16)|(idxB[i*4+3]<<24) for i in range(TW*TH//4)] + crcTA=sum(idxwA)&0xFFFFFFFF; crcTB=sum(idxwB)&0xFFFFFFFF + print(f"[Ch355] LPDDR texture A sum32=0x{crcTA:08x} ; texture B sum32=0x{crcTB:08x} (the two cache-fill CRCs)") + + # independent A->B composed reference (dump order, paint-order DECAL). refmap: [31]cov [30]int [28]overlap [17:9]tu [8:0]tv + # ALSO per-group refmaps (refmapA/refmapB) so the isolated single-group RTL renders can be scored independently. + refmap=[0]*(FBPXW*H); refpix=[(0,0,0)]*(FBPXW*H); ndraw=[0]*(FBPXW*H) + refmapA=[0]*(FBPXW*H); refmapB=[0]*(FBPXW*H) + for gi,(dr,idxg,palg) in enumerate([(drA,idxA,palA),(drB,idxB,palB)]): + for (v0,v1,v2) in group_tris(dr): + x0,y0=v0["x"],v0["y"]; x1,y1=v1["x"],v1["y"]; x2,y2=v2["x"],v2["y"]; ar=edge(x0,y0,x1,y1,x2,y2) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(x0,x1,x2))); maxx=min(FBPXW-1,int(max(x0,x1,x2))+1) + miny=max(0,int(min(y0,y1,y2))); maxy=min(H-1,int(max(y0,y1,y2))+1) + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(x1,y1,x2,y2,cx,cy)*inv; w1=edge(x2,y2,x0,y0,cx,cy)*inv; w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + a0=edge(x1,y1,x2,y2,float(px),float(py))*inv; a1=edge(x2,y2,x0,y0,float(px),float(py))*inv; a2=1.0-a0-a1 + S=a0*v0["s"]+a1*v1["s"]+a2*v2["s"]; T=a0*v0["t"]+a1*v1["t"]+a2*v2["t"]; Q=a0*v0["q"]+a1*v1["q"]+a2*v2["q"] + if abs(Q)<1e-12: continue + tu=int((S/Q)*TW)%TW; tv=int((T/Q)*TH)%TH + if tu<0: tu+=TW + if tv<0: tv+=TH + o=py*FBPXW+px; mw=min(w0,w1,w2); interior=1 if mw>0.04 else 0 + prev_cov = refmap[o]>>31 + rm=(1<<31)|(interior<<30)|((tu&0x1FF)<<9)|(tv&0x1FF) + if gi==0: refmapA[o]=rm + else: refmapB[o]=rm + refmap[o]=rm # later group (B) overwrites (paint order) + p=palg[idxg[tv*TW+tu]&0xFF]; refpix[o]=(p&0xFF,(p>>8)&0xFF,(p>>16)&0xFF) + if gi==1 and prev_cov: refmap[o]|=(1<<28); ndraw[o]=2 # B over A -> overlap + overlap_px=sum(1 for o in range(FBPXW*H) if refmap[o]&(1<<28)) + covered=sum(1 for w in refmap if w>>31) + print(f"[Ch355] independent A->B reference: {covered} covered px, {overlap_px} A&B overlap px [bit28]") + if overlap_px<500: sys.exit(f"[Ch355] FAIL: only {overlap_px} overlap px — multi-texture accumulation not exercised") + + # ---- emit ---- + def wmem(name, words, banner): + with open(os.path.join(DATA,name),"w") as f: + f.write(f"// {banner}\n") + for x in words: f.write(f"{x&0xFFFFFFFF:08x}\n") + wmem("sh3_mtA_tex_lpddr.mem", idxwA, "Ch355 LOCAL texture A (idx19562/tbp=11264) LINEAR -> LPDDR. gitignored.") + wmem("sh3_mtB_tex_lpddr.mem", idxwB, "Ch355 LOCAL texture B (idx89761/tbp=9216) LINEAR -> LPDDR. gitignored.") + wmem("sh3_mtA_idx.mem", idxwA, "Ch355 LOCAL idx A. gitignored."); wmem("sh3_mtB_idx.mem", idxwB, "Ch355 LOCAL idx B. gitignored.") + wmem("sh3_mtA_pal.mem", [p&0xFFFFFFFF for p in palA], "Ch355 LOCAL de-gridded palette A. gitignored.") + wmem("sh3_mtB_pal.mem", [p&0xFFFFFFFF for p in palB], "Ch355 LOCAL de-gridded palette B. gitignored.") + wmem("sh3_mt_refmap.mem", refmap, "Ch355 LOCAL A->B composed per-pixel covered|interior|overlap|tu|tv reference. gitignored.") + wmem("sh3_mtA_refmap.mem", refmapA, "Ch355 LOCAL A-only (idx19562) per-pixel covered|interior|tu|tv reference. gitignored.") + wmem("sh3_mtB_refmap.mem", refmapB, "Ch355 LOCAL B-only (idx89761) per-pixel covered|interior|tu|tv reference. gitignored.") + bake.write_feeder_stg_mem("feeder_sh3_mtA.mem", stgA, f"Ch355 LOCAL list A (idx{DRAW_A}, TEX0 CBP={CBP_A}) {ntA} tris. gitignored.", total=STG_WORDS) + bake.write_feeder_stg_mem("feeder_sh3_mtB.mem", stgB, f"Ch355 LOCAL list B (idx{DRAW_B}, TEX0 CBP={CBP_B}) {ntB} tris. gitignored.", total=STG_WORDS) + + # bootlet: upload BOTH relocated CLUTs (A@CBP_A, B@CBP_B) via two 256x1 BITBLTs; DISPLAY1 = FBPXW x H + clutwA=[int.from_bytes(clutA[i*4:i*4+4],'little') for i in range(256)] + clutwB=[int.from_bytes(clutB[i*4:i*4+4],'little') for i in range(256)] + RAM_QWORDS=512; pay=[] + for cbp,clutw in ((CBP_A,clutwA),(CBP_B,clutwB)): + pay.append(bake.giftag(1,0,0,4,int('E'*4,16))) + pay.append(bake.aplusd(bake.R_BITBLTBUF, bake.bitbltbuf_pack(cbp,1,0x00))) + pay.append(bake.aplusd(bake.R_TRXPOS, bake.trxpos_pack(0,0))) + pay.append(bake.aplusd(bake.R_TRXREG, bake.trxreg_pack(256,1))) + pay.append(bake.aplusd(bake.R_TRXDIR, bake.trxdir_pack(0))) + pay.append(bake.giftag(256//4,1,2,0,0)) + for q in range(256//4): + word=0 + for lane in range(4): word|=(clutw[q*4+lane]&0xFFFFFFFF)<<(32*lane) + pay.append(word) + qwc=len(pay); disp_hi=((H-1)<<12)|(FBPXW-1) + with open(os.path.join(DATA,"payload_sh3_mt.mem"),"w") as f: + f.write(f"// Ch355 LOCAL two-CLUT setup payload (A->CBP={CBP_A}, B->CBP={CBP_B}). gitignored. QWC={qwc}.\n") + for _ in range(16): f.write(f"{0:032x}\n") + for x in pay: f.write(f"{x&((1<<128)-1):032x}\n") + for _ in range(RAM_QWORDS-16-qwc): f.write(f"{0:032x}\n") + bake.write_bios_mem("bios_sh3_mt.mem", bake.build_textured_demo_bootlet_disp(qwc, disp_hi, FBW), + f"Ch355 LOCAL two-CLUT bootlet (QWC={qwc}, DISPLAY1={FBPXW}x{H}). gitignored.") + + with open(os.path.join(DATA,"sh3_mt_params.vh"),"w") as f: + f.write("// Ch355 LOCAL generated params for the multi-texture integration TB. gitignored.\n") + for k,v in (("FBW",FBW),("FBPXW",FBPXW),("FBH",H),("VRAM_BYTES_P",VRAM_BYTES),("CBP_A",CBP_A),("CBP_B",CBP_B), + ("NEW_TBP",NEW_TBP),("TEX_VRAM_BASE",TEX_VRAM_BASE),("TEX_BYTES",TW*TH),("N_BEATS",TW*TH//32), + ("STG_WORDS",STG_WORDS),("TW",TW),("TH",TH),("NTRIS_A",ntA),("NTRIS_B",ntB), + ("UNION_OX",OX),("UNION_OY",OY),("CONTENT_W",W)): + f.write(f"localparam int {k:<14}= {v};\n") + f.write(f"localparam [29:0] LPDDR_TEX_BASE = 30'h{LPDDR_TEX_BASE:07x};\n") + f.write(f"localparam [31:0] CRC_TEX_A = 32'h{crcTA:08x};\n") + f.write(f"localparam [31:0] CRC_TEX_B = 32'h{crcTB:08x};\n") + try: + from PIL import Image + im=Image.new("RGB",(FBPXW,H)); im.putdata(refpix); im.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon","sh3_mt_ref.png")) + print("[Ch355] wrote sh3_mt_ref.png") + except Exception as ex: print("(PIL skipped:", ex, ")") + print(f"[Ch355] emitted multi-texture fixtures -> {DATA}. FB {FBPXW}x{H} stride {STRIDE}; texA crc=0x{crcTA:08x} texB crc=0x{crcTB:08x}") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_make_sh3_psmt4_overlay_fixture.py b/tools/gs_make_sh3_psmt4_overlay_fixture.py new file mode 100644 index 0000000..dbd4986 --- /dev/null +++ b/tools/gs_make_sh3_psmt4_overlay_fixture.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python3 +"""Emit the authentic SH3 4x4 PSMT4 post-process tile pass as scheduler epochs. + +The dump expresses this pass as sixteen 128x128 FST SPRITEs. The runtime +feeder is triangle-record based, so each sprite is expanded to two textured +triangles and split into ordered 16-row bands. Consecutive bands are packed +under the proven 14,500-fragment request-FIFO safety bound. The PSMT4 asset +is de-swizzled to the texture cache's linear packed-nibble layout and padded +to its fixed 256 KiB residency window. +""" +import glob +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) +sys.path.insert(0, DATA) +import gs_make_sh3_multidraw_fixture as MD +import gs_sh3_recon as RC +import bake + +DRAW_IDS = [198945,198954,198963,198972,198981,198990,198999,199008, + 199017,199026,199035,199044,199053,199062,199071,199080] +FBW, W, H = 10, 640, 480 +NEW_TBP, CBP = 1024, 480 +TEX_CACHE_BYTES = 512*512 +STG_WORDS = 2048 +CAPACITY = 14500 +PERSP_FRAC = bake.PERSP_FRAC +PSCALE = 1/64 + + +def wmem(path, words, banner, width=8): + with open(os.path.join(DATA, path), "w") as f: + f.write(f"// {banner}\n") + for word in words: + f.write(f"{word & ((1 << (4*width))-1):0{width}x}\n") + + +def vwords(v): + s_fp = round(v["s"] * 128 * (1 << PERSP_FRAC) * PSCALE) + t_fp = round(v["t"] * 128 * (1 << PERSP_FRAC) * PSCALE) + q_fp = round((1 << PERSP_FRAC) * PSCALE) + x = max(0, min(W-1, round(v["x"]))) + y = max(0, min(H-1, round(v["y"]))) + return [bake.rgbaq_with_q(0x80, 0x80, 0x80, q_fp), + bake.st_data(s_fp, t_fp), bake.xyz2_dataz(x, y, 16)] + + +def main(argv): + tag = argv[argv.index("--tag")+1] if "--tag" in argv else "zsrt139e1" + dump = next((x for x in argv[1:] if x.endswith(".gs.zst")), None) + if dump is None: + found = glob.glob(os.path.join(ROOT, "captures", "gs", "silenthill3", "*224139*.gs.zst")) + if not found: + sys.exit("no dump 224139 found") + dump = found[0] + + got, _ = MD.load_draws(dump, DRAW_IDS) + if sorted(got) != DRAW_IDS: + sys.exit(f"missing overlay draws: {sorted(set(DRAW_IDS)-set(got))}") + states = [got[i]["state"] for i in DRAW_IDS] + ref = states[0] + for i, state in zip(DRAW_IDS, states): + t0, pr = state["tex0"], state["prim"] + if (t0["tbp"],t0["tbw"],t0["psm"],t0["tw"],t0["th"],t0["cbp"]) != (13376,2,0x14,128,128,14276): + sys.exit(f"idx{i}: unexpected TEX0 {t0}") + if (pr["type"],pr["tme"],pr["fst"],pr["abe"]) != (6,1,1,1): + sys.exit(f"idx{i}: unexpected PRIM {pr}") + for key in ("test","zbuf","clamp","scissor","alpha","texa"): + if state[key] != ref[key]: + sys.exit(f"idx{i}: {key} differs") + if ref["scissor"] != 0x01ff000001ff0000: + sys.exit(f"unexpected SCISSOR 0x{ref['scissor']:016x}") + + mem, *_ = RC.build_localmem_to(dump, DRAW_IDS[0]) + idx = mem.read_psmt4(13376, 2, 128, 128) + packed = bytearray(128*128//2) + for n in range(0, len(idx), 2): + packed[n//2] = (idx[n]&15) | ((idx[n+1]&15)<<4) + packed.extend(bytes(TEX_CACHE_BYTES-len(packed))) + tex_words = [int.from_bytes(packed[n:n+4], "little") for n in range(0,TEX_CACHE_BYTES,4)] + crc = sum(tex_words) & 0xFFFFFFFF + pal = RC.read_clut32(mem, 14276, order="grid") + + # Convert each authentic sprite to 16-row triangle bands. The sampled V + # coordinate is intentionally constant zero in the dump; U spans 0..128. + bands = [] + for draw_id in DRAW_IDS: + vv = got[draw_id]["verts"] + if len(vv) != 2: + sys.exit(f"idx{draw_id}: expected two sprite vertices, got {len(vv)}") + a,b = vv + x0,x1 = a["x"],b["x"] + y0,y1 = a["y"],min(b["y"],float(H)) + if y1 <= 0 or y0 >= H: + continue + for lo in range(max(0,int(round(y0))), int(round(y1)), 16): + hi = min(int(round(y1)), lo+16) + tl=dict(x=x0,y=lo,s=a["s"],t=a["t"]) + tr=dict(x=x1,y=lo,s=b["s"],t=a["t"]) + bl=dict(x=x0,y=hi,s=a["s"],t=b["t"]) + br=dict(x=x1,y=hi,s=b["s"],t=b["t"]) + cov=max(0,round(x1)-round(x0))*max(0,hi-lo) + bands.append((draw_id,[(tl,tr,bl),(tr,br,bl)],cov)) + + epochs=[]; cur=[]; cov=0 + for draw_id,tris,npx in bands: + if cur and cov+npx > CAPACITY: + epochs.append((cur,cov)); cur=[]; cov=0 + cur.extend(tris); cov += npx + if cur: + epochs.append((cur,cov)) + if max(x[1] for x in epochs) > CAPACITY: + sys.exit("capacity pack failure") + + tex0 = bake.tex0_pack(NEW_TBP,2,psm=0x14,tw=7,th=7,tfx=0) + tex0 |= (CBP&0x3FFF)<<37 # runtime CLUT: CLD=0 + prim = 3 | (1<<4) | (1<<6) # TRIANGLE, TME, ABE; FST converted to ST/Q + for k,(tris,npx) in enumerate(epochs): + stg=[len(tris)|(1<<32)|(1<<34), bake.frame_1_psmct32(FBW), ref["alpha"], + ref["test"], ref["zbuf"], tex0, ref["clamp"], prim] + for tri in tris: + for v in tri: + stg.extend(vwords(v)) + if len(stg)>STG_WORDS: + sys.exit(f"epoch{k}: staging overflow {len(stg)}") + bake.write_feeder_stg_mem(f"feeder_sh3_{tag}{k}.mem",stg, + f"Ch408 authentic PSMT4 overlay epoch{k}, {len(tris)} tris, capacity {npx}. gitignored.",total=STG_WORDS) + wmem(f"sh3_{tag}{k}_tex_lpddr.mem",tex_words, + f"Ch408 PSMT4 packed-linear texture padded to fixed 256 KiB cache; crc=0x{crc:08x}. gitignored.") + wmem(f"sh3_{tag}{k}_pal.mem",pal, + f"Ch408 authentic PSMT4 CSM1 palette, runtime staged. gitignored.") + + n=len(epochs) + with open(os.path.join(DATA,f"sh3_{tag}_epochs.txt"),"w") as f: + f.write("# Ch408 authentic PSMT4 post-process overlay scheduler fixture\n") + f.write("# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32\n") + f.write(f"META n_epochs {n} fbpxw {W} fbh {H} fbwords {W*H} lpddr_tex 0x200000 tex_words {TEX_CACHE_BYTES//4} n_beats {TEX_CACHE_BYTES//32}\n") + for k,(tris,npx) in enumerate(epochs): + words=8+9*len(tris) + f.write(f"{k} {DRAW_IDS[0]} 13376 {CBP} sh3_{tag}{k}_tex_lpddr.mem 0x200000 {TEX_CACHE_BYTES} 0x{crc:08x} " + f"feeder_sh3_{tag}{k}.mem {words} {len(tris)} {0 if k==0 else 1} sh3_{tag}{k}_pal.mem 0x{sum(pal)&0xFFFFFFFF:08x}\n") + with open(os.path.join(DATA,f"sh3_{tag}_params.vh"),"w") as f: + f.write("// Ch408 generated params. gitignored.\n") + for key,val in (("FBW",FBW),("FBPXW",W),("FBH",H),("VRAM_BYTES_P",128*1024),("NEW_TBP",NEW_TBP), + ("TEX_VRAM_BASE",NEW_TBP*256),("TEX_BYTES",TEX_CACHE_BYTES),("N_BEATS",TEX_CACHE_BYTES//32), + ("STG_WORDS",STG_WORDS),("TW",128),("TH",128),("N_EPOCHS",n),("UNION_OX",0),("UNION_OY",0)): + f.write(f"localparam int {key:<14}= {val};\n") + f.write("localparam [29:0] LPDDR_TEX_BASE = 30'h0200000;\n") + for k,(tris,npx) in enumerate(epochs): + f.write(f"localparam int EP{k}_NTRIS={len(tris)}; localparam int EP{k}_CBP={CBP}; " + f"localparam [31:0] EP{k}_CRC=32'h{crc:08x}; localparam bit EP{k}_REUSE=1'b{0 if k==0 else 1};\n") + with open(os.path.join(DATA,f"sh3_{tag}_epoch_table.vh"),"w") as f: + for k in range(n): + f.write(f"EP_CRC[{k}]=EP{k}_CRC; EP_REC[{k}]=EP{k}_NTRIS; EP_REUSE[{k}]=EP{k}_REUSE;\n") + # Runtime CLUT mode uses an empty boot payload. + qwc=0; disp=((H-1)<<12)|(W-1) + with open(os.path.join(DATA,f"payload_sh3_{tag}.mem"),"w") as f: + f.write(f"// Ch408 runtime-CLUT empty payload (CBPs [{CBP}]). gitignored. QWC={qwc}.\n") + for _ in range(512): f.write("00000000000000000000000000000000\n") + bake.write_bios_mem(f"bios_sh3_{tag}.mem",bake.build_textured_demo_bootlet_disp(qwc,disp,FBW), + f"Ch408 runtime PSMT4 overlay bootlet DISPLAY1={W}x{H}. gitignored.") + print(f"[Ch408] PASS: {len(DRAW_IDS)} sprites -> {len(bands)} bands -> {n} epochs; max coverage={max(x[1] for x in epochs)}") + print(f"[Ch408] PSMT4 indices={sorted(set(idx))}; texture cache crc=0x{crc:08x}; palette sum=0x{sum(pal)&0xFFFFFFFF:08x}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_make_sh3_real_draw_fixture.py b/tools/gs_make_sh3_real_draw_fixture.py index df92881..cb11bcf 100644 --- a/tools/gs_make_sh3_real_draw_fixture.py +++ b/tools/gs_make_sh3_real_draw_fixture.py @@ -80,10 +80,15 @@ def tex0_real(tbp, cbp): return v def main(argv): + global CH # Ch353 — full-frame mode reassigns the FB height dump = None; draw_idx = 89761 a = argv[1:] if a and not a[0].startswith("--"): dump = a[0] if "--draw-idx" in a: draw_idx = int(a[a.index("--draw-idx")+1]) + # Ch353 — --full-frame renders the WHOLE 256xfull_h draw bounding box (no crop) for the LPDDR framebuffer. + # Crop-dependent outputs are written with a `full` tag so the Ch352 cropped build (sh3_real_*) is untouched. + full_frame = "--full-frame" in a + tag = "full" if full_frame else "real" if dump is None: c = glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") @@ -132,6 +137,8 @@ def main(argv): s = sum(row_cov[cy0:cy0+CH]) if s > best_sum: best_sum, best_cy0 = s, cy0 CY0 = best_cy0; CX0 = 0 + if full_frame: + CH = full_h; CY0 = 0; CX0 = 0 # Ch353 full-frame: render the whole 256xfull_h bounding box (no crop) # apply the viewport crop: shift Y by -CY0 (ST/Q UNCHANGED — only the framebuffer window moves), then # CLIP each triangle to the crop rect [0,FBPXW]x[0,CH] (Sutherland-Hodgman, interpolating S/T/Q linearly in # screen space — correct since S,T,Q are already premultiplied by 1/w). This is the VIEWPORT scissor done at @@ -274,17 +281,17 @@ def main(argv): covered = sum(1 for w in refmap if w>>31) print(f"[Ch350] host reference: {covered} covered FB pixels") # emit the RTL-faithful refmap + PNG for the Ch351 oracle - with open(os.path.join(DATA,"sh3_real_refmap_recip.mem"),"w") as f: + with open(os.path.join(DATA,f"sh3_{tag}_refmap_recip.mem"),"w") as f: f.write("// Ch351 RTL-faithful (8-bit reciprocal) per-pixel texel map. gitignored.\n") for x in refmap_rec: f.write(f"{x & 0xFFFFFFFF:08x}\n") - with open(os.path.join(DATA,"sh3_real_refmap_affine.mem"),"w") as f: + with open(os.path.join(DATA,f"sh3_{tag}_refmap_affine.mem"),"w") as f: f.write("// Ch351 AFFINE (per-vertex texel, linear interp) per-pixel texel map. gitignored.\n") for x in refmap_aff: f.write(f"{x & 0xFFFFFFFF:08x}\n") try: from PIL import Image Image.new("RGB",(FBPXW,CH)).copy() # noop guard im2=Image.new("RGB",(FBPXW,CH)); im2.putdata(refpix_rec) - im2.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon","sh3_real_ref_recip.png")) + im2.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon",f"STALE_idx8_sh3_{tag}_ref_recip.png")) except Exception as e: print("(PIL skip recip png:", e, ")") @@ -308,12 +315,12 @@ def main(argv): pay.append(word) qwc=len(pay) disp_hi=((CH-1)<<12)|(FBPXW-1) - with open(os.path.join(DATA,"payload_sh3_real.mem"),"w") as f: + with open(os.path.join(DATA,f"payload_sh3_{tag}.mem"),"w") as f: f.write(f"// Ch352 LOCAL SH3 real-draw setup payload (CSM1 CLUT 256x1 -> CBP={CBP}, grid bytes verbatim). gitignored. QWC={qwc}.\n") for _ in range(16): f.write(f"{0:032x}\n") for x in pay: f.write(f"{x&((1<<128)-1):032x}\n") for _ in range(RAM_QWORDS-16-qwc): f.write(f"{0:032x}\n") - bake.write_bios_mem("bios_sh3_real.mem", + bake.write_bios_mem(f"bios_sh3_{tag}.mem", bake.build_textured_demo_bootlet_disp(qwc, disp_hi, FBW), f"Ch352 LOCAL SH3 real-draw setup bootlet (QWC={qwc}, DISPLAY1={FBPXW}x{CH}). gitignored.") print(f"[Ch352] setup bootlet: payload {qwc} qw (CSM1 CLUT 256x1 upload to CBP={CBP}).") @@ -345,12 +352,12 @@ def main(argv): # de-gridded palette pal[i] (what the HW CSM1 grid-read produces) -> TB reference expected colors wmem("sh3_real_pal.mem", [p & 0xFFFFFFFF for p in pal], 8, "Ch350 LOCAL SH3 de-gridded palette pal[i] (grid-read of the CBP bytes) for the TB reference. gitignored.") - bake.write_feeder_stg_mem("feeder_sh3_real.mem", stg, + bake.write_feeder_stg_mem(f"feeder_sh3_{tag}.mem", stg, "Ch350 LOCAL SH3 REAL draw (idx89761) feeder staging: triangle list + TEX0(PSMT8,CSM1,CLD=1,DECAL). gitignored.", total=STG_WORDS) - wmem("sh3_real_refmap.mem", refmap, 8, "Ch350 LOCAL per-FB-pixel covered|interior|tu|tv reference map. gitignored.") + wmem(f"sh3_{tag}_refmap.mem", refmap, 8, "Ch350 LOCAL per-FB-pixel covered|interior|tu|tv reference map. gitignored.") # params include for the TB - with open(os.path.join(DATA,"sh3_real_params.vh"),"w") as f: + with open(os.path.join(DATA,f"sh3_{tag}_params.vh"),"w") as f: f.write("// Ch350 LOCAL generated params for tb_top_psmct32_sh3_real_draw_demo. gitignored.\n") f.write(f"localparam int FBW = {FBW};\n") f.write(f"localparam int FBPXW = {FBPXW};\n") @@ -371,8 +378,8 @@ def main(argv): try: from PIL import Image im=Image.new("RGB",(FBPXW,CH)); im.putdata(refpix) - im.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon","sh3_real_ref.png")) - print("[Ch350] wrote sh3_real_ref.png") + im.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon",f"sh3_{tag}_ref.png")) + print(f"[Ch350] wrote sh3_{tag}_ref.png") except Exception as e: print("(PIL skipped:", e, ")") print(f"[Ch350] emitted fixtures -> {DATA} (LOCAL). TEX_VRAM_BASE=0x{TEX_VRAM_BASE:x} TBP={NEW_TBP} CBP={CBP} " diff --git a/tools/gs_make_sh3_scheduler_fixture.py b/tools/gs_make_sh3_scheduler_fixture.py new file mode 100644 index 0000000..0eb8963 --- /dev/null +++ b/tools/gs_make_sh3_scheduler_fixture.py @@ -0,0 +1,1221 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch356: N-TEXTURE SCHEDULER (data-driven epoch descriptors, >=3 distinct texture epochs). + +Generalizes Ch355's hard-coded two-group flow to a DATA-DRIVEN scheduler over ordered authentic draw groups. Each +epoch descriptor carries: dump-order index, texture source + LPDDR location + size + expected CRC, relocated CBP + +expected palette identity, staging image + word count + expected records, expected drain transition. The scheduler +operates over a PRELOADED CLUT table (the bootlet uploads all N CLUTs to distinct relocated CBPs) — runtime CLUT +UPLOAD is explicitly OUT of scope (Codex); the scheduler SELECTS among preloaded palettes per epoch. + +Default epochs (dump order, 3 DISTINCT textures, frame f1): E0=idx11671 (tbp=10240) E1=idx19562 (tbp=11264) +E2=idx89761 (tbp=9216). + +Preflight fail-CLOSED gates (Codex): >=3 epochs w/ >=3 distinct textures; same frame + authentic ascending order; +supported format/state; resident texture + CLUT per epoch; distinct palettes (no aliasing); non-overlapping relocated +CBPs within BRAM; per-triangle Q canonicalization (all-neg -> negate; mixed/zero -> FAIL CLOSED); each list fits +staging (2048); deterministic union framebuffer geometry. + +Usage: gs_make_sh3_scheduler_fixture.py [dump.gs.zst] [--draw-list i0,i1,i2,...] [--pscale N|auto] [--xy-quant round|floor|ceil|trunc] [--subpixel-xy] [--legacy-strip-kicks] [--cbp-base N] [--ref-sample integer|center] [--ref-xy-quant|--float-ref-xy] [--emit-clamp-header] [--normalize-full-region-clamp] [--clip-fb-guardband] [--auth-scissor-clip] [--capacity-epochs PIXELS] [--emit] +LOCAL/gitignored. Reuses gs_make_sh3_multidraw_fixture.load_draws / clip_rect / edge. +""" +import sys, os, math +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") +import gs_sh3_recon as RC +import gs_make_sh3_multidraw_fixture as MD +import gs_texture_residency as R +sys.path.insert(0, DATA); import bake + +DEFAULT_DRAWS=[11671, 19562, 89761] # dump order; textures tbp=10240, 11264, 9216 (all distinct) +TEX_BYTES=512*512 +CBP_BASE=0x1E000//256 # 480; each epoch relocated +4 blocks (1 KiB) -> non-overlapping +STG_WORDS=2048 +VRAM_BLOCKS=(128*1024)//256 # 512 + +def bbox(dr): + xs=[v["x"] for v in dr["verts"]]; ys=[v["y"] for v in dr["verts"]]; return (min(xs),min(ys),max(xs),max(ys)) + +def topology_tris(fv, prim_type, honor_kick=True): + """Expand one GS primitive run into independent triangle records. + + The hardware feeder restarts PRIM for every emitted triangle, so preserving + the captured topology here is mandatory: triangle lists are disjoint + triples, fans retain vertex zero, and sprites are opposing-corner pairs. + """ + if prim_type == 3: # TRIANGLE list + if len(fv)%3: + sys.exit(f"[Ch409] FAIL: TRIANGLE run has {len(fv)} vertices (not divisible by 3)") + return [(fv[i],fv[i+1],fv[i+2]) for i in range(0,len(fv),3) if fv[i+2].get("kick",True)] + if prim_type == 4: # TRI_STRIP + return [(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv)) if not honor_kick or fv[i].get("kick",True)] + if prim_type == 5: # TRI_FAN + return [(fv[0],fv[i-1],fv[i]) for i in range(2,len(fv)) if fv[i].get("kick",True)] + if prim_type == 6: # SPRITE: two opposing corners -> two triangles + if len(fv)%2: + sys.exit(f"[Ch409] FAIL: SPRITE run has {len(fv)} vertices (not divisible by 2)") + out=[] + for i in range(0,len(fv),2): + a,b=fv[i],fv[i+1] + if not b.get("kick",True): continue + # GS sprite depth/color come from the second vertex. Texture and + # XY coordinates are the Cartesian product of the corner pair. + def corner(x,y,s,t): + v=dict(b); v.update(x=x,y=y,s=s,t=t); return v + tl=corner(a["x"],a["y"],a["s"],a["t"]) + tr=corner(b["x"],a["y"],b["s"],a["t"]) + bl=corner(a["x"],b["y"],a["s"],b["t"]) + br=corner(b["x"],b["y"],b["s"],b["t"]) + out += [(tl,tr,bl),(tr,br,bl)] + return out + sys.exit(f"[Ch409] FAIL: unsupported textured primitive type {prim_type}") + +def coalesce_solid_sprite_grid(fv): + """Replace an exactly tiled solid-sprite grid with one rectangle. + + The GS sprite primitive owns a half-open rectangle. Expanding every + captured tile to two triangles independently exposes internal diagonal/ + edge exclusions in the triangle walker. This opt-in transform is legal + only when the captured rectangles tile their bounding box exactly and all + non-coordinate interpolants match. + """ + if len(fv)<2 or len(fv)%2: + sys.exit(f"[Ch434] cannot coalesce {len(fv)} sprite vertices") + rects=[] + sig=None + for i in range(0,len(fv),2): + a,b=fv[i],fv[i+1] + x0,x1=sorted((a['x'],b['x'])); y0,y1=sorted((a['y'],b['y'])) + if x0==x1 or y0==y1: + sys.exit("[Ch434] degenerate solid-sprite tile") + cur=(a.get('rgba'),b.get('rgba'),a.get('z'),b.get('z'),a.get('fog'),b.get('fog')) + if sig is None: sig=cur + elif cur!=sig: sys.exit("[Ch434] solid-sprite grid changes color/Z/fog") + rects.append((x0,y0,x1,y1)) + xs=sorted({x for r in rects for x in (r[0],r[2])}) + ys=sorted({y for r in rects for y in (r[1],r[3])}) + for ya,yb in zip(ys,ys[1:]): + for xa,xb in zip(xs,xs[1:]): + cx=(xa+xb)/2; cy=(ya+yb)/2 + n=sum(x0<=cx=len(a) or ":" not in a[ai+1]: + sys.exit("[Ch434] --override-ct32 requires DRAW_IDX:LINEAR_MEM") + oi,op=a[ai+1].split(":",1) + OVERRIDE_CT32[int(oi)]=op + EMIT_CLAMP_HEADER = "--emit-clamp-header" in a + NORMALIZE_FULL_REGION_CLAMP = "--normalize-full-region-clamp" in a + AUTH_COLOR_TFX = "--auth-color-tfx" in a + # Ch415 fixture-side implementation of the captured GS fog subset used by + # this SH3 frame. Every selected scene draw has PRIM.FGE=1 and FOGCOL=0, + # so fog is a multiply toward black. Folding each vertex RGB by F/256 + # before the existing Gouraud+MODULATE path is exact at vertices and a + # bounded approximation within triangles, without a blanket post-process + # pass that incorrectly erases the foreground character. + AUTH_FOG_BLACK_FOLD = "--auth-fog-black-fold" in a + # Real per-vertex GS fog: for draws whose captured PRIM has FGE=1, set + # PRIM.FGE (bit 5) in the emitted PRIM descriptor and pack the vertex commit + # word as XYZF2 (0x04) carrying the 8-bit fog coefficient F=[63:56] atop the + # SAME 24-bit Z. The feeder then tags the commit XYZF2 and gs_stub applies + # texel*F + FOGCOL*(255-F) at emit. This is the correct per-pixel path, + # distinct from --auth-fog-black-fold (an RGB fold that DECAL discards). + # Default ON; --no-auth-fog reverts to XYZ2 (fog dropped). FGE=0 draws are + # unaffected either way (they always emit XYZ2), preserving byte-identity. + AUTH_FOG = "--no-auth-fog" not in a + REF_BILINEAR = "--ref-bilinear" in a + # Preserve the capture's native GS 12.4 screen coordinates in XYZ2. + # The legacy/signoff path quantizes to integer pixels first; keeping this + # opt-in lets the subpixel RTL land without perturbing old fixtures. + SUBPIXEL_XY = "--subpixel-xy" in a + # Preserve the exact strip population used by the Ch415 signoff fixture + # for controlled A/B fidelity work. The newer parsed-kick interpretation + # otherwise removes broad layers and confounds an XY-only experiment. + LEGACY_STRIP_KICKS = "--legacy-strip-kicks" in a + TRI_EPOCHS = "--tri-epochs" in a + CLIP_FB_GUARDBAND = "--clip-fb-guardband" in a + AUTH_SCISSOR_CLIP = "--auth-scissor-clip" in a + COALESCE_SOLID_SPRITES = "--coalesce-solid-sprites" in a + HALF_OPEN_SPRITES = "--half-open-sprites" in a + FAST_FIT_SCALE = "--fast-fit-scale" in a + SKIP_MIXED_Q = "--skip-mixed-q-tris" in a + CAPACITY_EPOCH_PIXELS = int(a[a.index("--capacity-epochs")+1]) if "--capacity-epochs" in a else None + if CAPACITY_EPOCH_PIXELS is not None and CAPACITY_EPOCH_PIXELS <= 0: + sys.exit(f"[Ch407] FAIL: --capacity-epochs must be positive, got {CAPACITY_EPOCH_PIXELS}") + if CAPACITY_EPOCH_PIXELS is not None and TRI_EPOCHS: + sys.exit("[Ch407] FAIL: choose --tri-epochs or --capacity-epochs, not both") + if CBP_RELOC_BASE < 0 or CBP_RELOC_BASE >= VRAM_BLOCKS: + sys.exit(f"[Ch356] FAIL: --cbp-base {CBP_RELOC_BASE} outside BRAM block range 0..{VRAM_BLOCKS-1}") + # Ch359 packs a fixed number of consecutive draws into an epoch. Ch364 adds an explicit group partition so + # a real ordered scene can rebind textures and then retain one texture for several larger feeder lists. + if "--group-size" in a and "--group-sizes" in a: + sys.exit("[Ch359] FAIL: choose only one of --group-size or --group-sizes") + if "--group-sizes" in a: + GROUP_SIZES=[int(x) for x in a[a.index("--group-sizes")+1].split(",")] + if not GROUP_SIZES or any(x < 1 for x in GROUP_SIZES): + sys.exit(f"[Ch364] FAIL: --group-sizes must contain positive integers, got {GROUP_SIZES}") + if sum(GROUP_SIZES) != len(idxs): + sys.exit(f"[Ch364] FAIL: --group-sizes sums to {sum(GROUP_SIZES)}, need {len(idxs)} draws") + MIXED_GROUPS=True + else: + GROUP=int(a[a.index("--group-size")+1]) if "--group-size" in a else 1 + if GROUP < 1: sys.exit(f"[Ch359] FAIL: --group-size must be >=1, got {GROUP}") + if len(idxs) % GROUP != 0: sys.exit(f"[Ch359] FAIL: {len(idxs)} draws not divisible by --group-size {GROUP}") + GROUP_SIZES=[GROUP]*(len(idxs)//GROUP) + MIXED_GROUPS=False + # Explicit grouping also permits deliberately separate singleton groups; + # this is needed to interleave isolated draw families chronologically. + GROUPED=("--group-size" in a or "--group-sizes" in a) + N_EP=len(GROUP_SIZES) + REF_SAMPLE = a[a.index("--ref-sample")+1].lower() if "--ref-sample" in a else "integer" + if REF_SAMPLE not in ("integer", "center"): + sys.exit(f"[Ch356] FAIL: --ref-sample must be integer or center, got {REF_SAMPLE}") + if "--ref-xy-quant" in a and "--float-ref-xy" in a: + sys.exit("[Ch356] FAIL: choose only one of --ref-xy-quant or --float-ref-xy") + # ZSCHED signoff fixtures feed integer XYZ2 screen coordinates to the RTL, so the reference must use the same + # quantized geometry. --float-ref-xy is kept only as a report-only fidelity-debt diagnostic. + REF_XY_QUANT = ("--ref-xy-quant" in a) or (AUTHZ and TAG in ("zsched", "zs640", "zs640c6") and "--float-ref-xy" not in a) + XY_QUANT_RAW = a[a.index("--xy-quant")+1] if "--xy-quant" in a else "round" + XY_QUANT_LIST = [x.strip().lower() for x in XY_QUANT_RAW.split(",")] if "," in XY_QUANT_RAW else None + if XY_QUANT_LIST is not None and len(XY_QUANT_LIST) != N_EP: + sys.exit(f"[Ch356] FAIL: comma --xy-quant needs {N_EP} entries (one per EPOCH), got {len(XY_QUANT_LIST)}") + for q in (XY_QUANT_LIST if XY_QUANT_LIST is not None else [XY_QUANT_RAW.lower()]): + if q not in ("round", "floor", "ceil", "trunc"): + sys.exit(f"[Ch356] FAIL: --xy-quant must be round/floor/ceil/trunc, got {q}") + PSCALE_RAW = a[a.index("--pscale")+1] if "--pscale" in a else "4096" + PSCALE_LIST = [x.strip().lower() for x in PSCALE_RAW.split(",")] if "," in PSCALE_RAW else None + PSCALE_AUTO = PSCALE_RAW.lower() in ("auto", "pertri", "per-tri") or (PSCALE_LIST is not None and any(x in ("auto","pertri","per-tri") for x in PSCALE_LIST)) + PSCALE_ARG = None if (PSCALE_AUTO or PSCALE_LIST is not None) else int(PSCALE_RAW) + if PSCALE_LIST is not None and len(PSCALE_LIST) != N_EP: + sys.exit(f"[Ch356] FAIL: comma --pscale needs {N_EP} entries (one per EPOCH), got {len(PSCALE_LIST)}") + if (not PSCALE_AUTO) and PSCALE_LIST is None and PSCALE_ARG <= 0: + sys.exit(f"[Ch356] FAIL: --pscale must be positive, got {PSCALE_ARG}") + PFX = f"sh3_{TAG}" if TAG else ("sh3_s640" if FB640 else "sh3_sched") + CH = (a[a.index("--chapter")+1] if "--chapter" in a else + ("Ch364" if MIXED_GROUPS else ("Ch359" if GROUPED else ("Ch357" if (FB640 or AUTHZ) else "Ch356")))) + if dump is None: + import glob; c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") + dump=c[0] + print(f"[Ch356] dump={os.path.basename(dump)} epochs(dump order)={idxs}") + + # Parse the 15 MiB capture once. Full chronological fixtures can contain + # hundreds of draws; reparsing and replaying from frame zero per draw made + # generation scale quadratically. + collected=R.collect(dump,0) + got, vram = MD.load_draws(dump, idxs, collected=collected, + allow_untextured=ALLOW_UNTEXTURED) + if vram is None: sys.exit("[Ch409] FAIL: GS VRAM snapshot absent") + for i in idxs: + if i not in got: sys.exit(f"[Ch356] FAIL: idx{i} not found as a supported draw") + eps=[got[i] for i in idxs] + for e in eps: + if e['first_idx'] in OVERRIDE_CT32: + t0=e['state']['tex0'] + if t0['tw']!=256 or t0['th']!=256: + sys.exit(f"[Ch434] override idx{e['first_idx']} requires captured 256x256 TEX0, got {t0['tw']}x{t0['th']}") + # The staged source is already decoded to linear CT32. Retain + # the captured dimensions/function but describe the replacement + # with its real 256-pixel physical row stride. + t0.update(psm=0x00,tbw=4,tw=256,th=256) + + # ---- gate: enough draws, authentic ascending dump order, same frame ---- + if not GROUPED and len(eps)<3: sys.exit(f"[Ch356] FAIL: need >=3 epochs, got {len(eps)}") + # A single exact-state group is valid for a recovered local draw family; + # capacity scheduling may still split it into several bounded epochs. + if GROUPED and N_EP<1: sys.exit(f"[Ch359] FAIL: grouped mode needs >=1 epoch, got {N_EP}") + if idxs!=sorted(idxs): sys.exit(f"[Ch356] FAIL: --draw-list not ascending dump order {idxs}") + frames={e["frame"] for e in eps} + if len(frames)!=1: sys.exit(f"[Ch356] FAIL: epochs span multiple frames {sorted(frames)}") + # ---- gate: texture layout + supported format/state per draw ---- + tbps=[e["state"]["tex0"]["tbp"] for e in eps] + if not GROUPED: + if len(set(tbps))<3: sys.exit(f"[Ch356] FAIL: <3 distinct textures {tbps}") + for e in eps: + t0=e["state"]["tex0"]; pr=e["state"]["prim"] + # The LPDDR cache remains a 512x512 address window, but the authentic + # sampler descriptor may address a smaller PSMT8 tile within it. + indexed_shape_ok = ((t0["psm"]==0x00 + and t0["tw"]==64 and t0["th"]==64 + and t0["tbw"]==1) + or (e['first_idx'] in OVERRIDE_CT32 + and t0["psm"]==0x00 and t0["tw"]==256 + and t0["th"]==256 and t0["tbw"]==4) + or (t0["psm"]==0x13 + and t0["tw"] in (128,256,512) + and t0["th"] in (128,256,512)) + or (t0["psm"]==0x14 + and t0["tw"]==512 and t0["th"]==1024 + and t0["tbw"]==8)) + textured_ok = indexed_shape_ok and pr["tme"]==1 and pr["fst"]==0 + untextured_ok = ALLOW_UNTEXTURED and pr["tme"]==0 + if not (textured_ok or untextured_ok): + sys.exit(f"[Ch356] FAIL: idx{e['first_idx']} unsupported format/state (psm=0x{t0['psm']:02x} {t0['tw']}x{t0['th']} tme={pr['tme']} fst={pr['fst']})") + if pr["abe"] and not ALLOW_ABE: + sys.exit(f"[Ch356] FAIL: idx{e['first_idx']} is ABE=1; pass --allow-abe only for the LPDDR destination-blend path") + if ALLOW_ABE: + fbmask=(e['state']['frame']>>32)&0xFFFFFFFF + mask_bytes=[(fbmask>>(8*i))&0xFF for i in range(4)] + if any(x not in (0x00,0xFF) for x in mask_bytes): + sys.exit(f"[{CH}] FAIL: idx{e['first_idx']} FRAME.FBMSK 0x{fbmask:08x} is not byte-granular") + # Texture addressing state is irrelevant for TME=0. Do not reject + # an untextured draw because a stale TEX0/CLAMP register happens to + # use a mode unsupported by the sampler it bypasses. + if not pr["tme"]: + continue + clamp=e["state"]["clamp"] + wms=clamp&3; wmt=(clamp>>2)&3 + minu=(clamp>>4)&0x3FF; maxu=(clamp>>14)&0x3FF + minv=(clamp>>24)&0x3FF; maxv=(clamp>>34)&0x3FF + if wms>1 or wmt>1: + u_full=(wms==2 and minu==0 and maxu==t0["tw"]-1) + v_full=(wmt==2 and minv==0 and maxv==t0["th"]-1) + if (wms>1 and not u_full) or (wmt>1 and not v_full) or wms==3 or wmt==3: + sys.exit(f"[Ch356] FAIL: idx{e['first_idx']} uses unmodelled CLAMP WMS={wms} [{minu},{maxu}] WMT={wmt} [{minv},{maxv}]") + if not NORMALIZE_FULL_REGION_CLAMP: + sys.exit(f"[Ch356] FAIL: idx{e['first_idx']} uses full-texture region CLAMP; pass --normalize-full-region-clamp to prove and normalize it") + # GS region-clamp [0,size-1] is exactly ordinary clamp for this texture. + # Normalize only the mode bits; retaining the bounds makes the emitted + # state auditable while keeping the software reference on modes 0/1. + clamp=(clamp&~0xF) | ((1 if wms==2 else wms)<<0) | ((1 if wmt==2 else wmt)<<2) + e["state"]["clamp"]=clamp + print(f"[{CH}] idx{e['first_idx']} normalized full-region CLAMP WMS/WMT {wms}/{wmt} -> {clamp&3}/{(clamp>>2)&3}") + if not GROUPED: + print(f"[Ch356] frame f{eps[0]['frame']}; {len(eps)} epochs, textures tbp={tbps} (all distinct); PSMT8 512x512 perspective TME — supported") + + # ---- gate: resident texture + CLUT per epoch; collect CRC + palette; assign relocated CBP ---- + descs=[]; pals=[]; next_cbp=CBP_RELOC_BASE; group_no=0; group_acc=None + memseq=RC.iter_localmem_at(dump,idxs,collected=collected) + for k,(e,(mem_idx,mem)) in enumerate(zip(eps,memseq)): + if mem_idx != e["first_idx"]: sys.exit(f"[Ch409] internal localmem sequence mismatch {mem_idx} != {e['first_idx']}") + t0=e["state"]["tex0"] + is_textured=bool(e["state"]["prim"]["tme"]) + override_path=OVERRIDE_CT32.get(e['first_idx']) + tex=(bytes(mem.m[t0['tbp']*256:t0['tbp']*256+TEX_BYTES]) + if is_textured and override_path is None else bytes(TEX_BYTES)) + clut=((bytes(1024) if t0['psm']==0x00 else + bytes(mem.m[t0['cbp']*256:t0['cbp']*256+1024])) + if is_textured else bytes(1024)) + if is_textured and override_path is None and not any(tex): + sys.exit(f"[Ch356] FAIL: texture idx{e['first_idx']} @tbp={t0['tbp']} not resident") + if is_textured and t0['psm']!=0x00 and not any(clut): + sys.exit(f"[Ch356] FAIL: CLUT idx{e['first_idx']} @cbp={t0['cbp']} not resident") + # The cache is physically 512 texels wide. Place a captured 256x256 + # texture into that stride so TEX0 can retain logical TW/TH=8. Keep + # the historical 128/512 reconstruction byte-identical. + if override_path is not None: + vals=[] + with open(override_path) as of: + for ln in of: + s=ln.strip() + if s and not s.startswith(("//","#")): + vals.append(int(s,16)&0xFFFFFFFF) + if len(vals)==640*480: + idxw=[vals[y*640+x] for y in range(256) for x in range(256)] + elif len(vals)==256*256: + idxw=vals + else: + sys.exit(f"[Ch434] override idx{e['first_idx']} has {len(vals)} words; expected 65536 or 307200") + elif not is_textured: + idxw=[0]*(TEX_BYTES//4) + elif t0['psm']==0x00: + # Direct-color 64x64 sources are linearized into the upper-left + # of the fixed 512-wide, 256-KiB cache window. TEX0 is rebound + # with TBW=8 below, so each source row must use this wider stride. + idx=[0]*(512*128) + for yy in range(64): + for xx in range(64): + idx[yy*512+xx]=mem.read_ct32_word(t0['tbp'],t0['tbw'],xx,yy) + idxw=idx + elif t0['psm']==0x14: + # The recovered character texture is 512x1024 PSMT4: exactly + # 256 KiB when packed two texels per byte, matching the existing + # cache window without padding or an RTL geometry change. + src4=mem.read_psmt4(t0['tbp'],t0['tbw'],t0['tw'],t0['th']) + idx=bytearray((src4[n]&15)|((src4[n+1]&15)<<4) + for n in range(0,len(src4),2)) + if len(idx)!=TEX_BYTES: + sys.exit(f"[{CH}] FAIL: idx{e['first_idx']} packed PSMT4 cache is {len(idx)} bytes, expected {TEX_BYTES}") + elif t0['tw']==256 and t0['th']==256: + src=mem.read_psmt8(t0['tbp'], t0['tbw'], 256, 256) + idx=bytearray(512*512) + for yy in range(256): + idx[yy*512:yy*512+256]=src[yy*256:(yy+1)*256] + # Fail closed before the emitted cache image and RTL can agree on + # the same bad host-side remap. The logical tile must survive + # byte-exact at the start of every physical 512-texel row, and + # all padding (right half plus unused lower rows) must stay zero. + for yy in range(256): + row=idx[yy*512:(yy+1)*512] + if row[:256] != src[yy*256:(yy+1)*256] or any(row[256:]): + sys.exit(f"[{CH}] FAIL: idx{e['first_idx']} 256x256 logical texture cache row {yy} remap mismatch") + if any(idx[256*512:]): + sys.exit(f"[{CH}] FAIL: idx{e['first_idx']} 256x256 logical texture lower cache padding is nonzero") + else: + idx=mem.read_psmt8(t0['tbp'], t0['tbw'], 512, 512) + if t0['tw']==128 and t0['th']==128: + # The emitted cache descriptor intentionally widens TBW to + # eight, so verify that the logical source tile occupies the + # matching upper-left portion of the 512-wide cache image. + src=mem.read_psmt8(t0['tbp'],t0['tbw'],128,128) + for yy in range(128): + if idx[yy*512:yy*512+128] != src[yy*128:(yy+1)*128]: + sys.exit(f"[{CH}] FAIL: idx{e['first_idx']} 128x128 logical texture cache row {yy} remap mismatch") + if is_textured and t0['psm']!=0x00: + idxw=[idx[i*4]|(idx[i*4+1]<<8)|(idx[i*4+2]<<16)|(idx[i*4+3]<<24) for i in range(512*512//4)] + crc=sum(idxw)&0xFFFFFFFF + pal=(tuple([0]*256) if (not is_textured or t0['psm']==0x00) else + tuple(RC.read_clut32(mem,t0['cbp'],order="grid"))) + one=dict(k=k, idx=e["first_idx"], tbp=t0['tbp'], cbp_orig=t0['cbp'], cbp_reloc=None, + crc=crc, bbox=bbox(e), lpddr=0x200000, size=TEX_BYTES, e=e, + state=e["state"], idxw=idxw, pal=list(pal), clut=clut, + logical_tw=(t0['tw'] if is_textured else 512), + logical_th=(t0['th'] if is_textured else 512), + tex_psm=(t0['psm'] if is_textured else 0x13), + tex_tbw=(4 if override_path is not None else 8)) + if not GROUPED: + pals.append(pal); descs.append(one) + continue + + # Fold a declared group immediately so hundreds of full-frame draws + # do not retain hundreds of 256 KiB Python texture arrays at once. + if group_acc is None: + group_acc=dict(one); group_acc.update(k=group_no,idx_all=[],members=[]) + else: + s0=group_acc['state'] + for key in ("prim","tex0","test","zbuf","clamp","alpha","texa"): + if one['state'].get(key)!=s0.get(key): + sys.exit(f"[{CH}] FAIL: idx{one['idx']} state '{key}' differs from idx{group_acc['idx']} inside group {group_no}") + if one['idxw']!=group_acc['idxw'] or one['clut']!=group_acc['clut']: + sys.exit(f"[{CH}] FAIL: idx{one['idx']} texture/CLUT bytes differ from idx{group_acc['idx']} inside group {group_no}") + ba=group_acc['bbox']; bb=one['bbox'] + group_acc['bbox']=(min(ba[0],bb[0]),min(ba[1],bb[1]),max(ba[2],bb[2]),max(ba[3],bb[3])) + group_acc['idx_all'].append(one['idx']); group_acc['members'].append(e); group_acc['e']=None + if len(group_acc['members'])==GROUP_SIZES[group_no]: + s0=group_acc['state']; tst=s0['test']; zbf=s0['zbuf'] + zte=(tst>>16)&1; ztst=(tst>>17)&3; zpsm=(zbf>>24)&0xF; zmsk=(zbf>>32)&1 + untextured_group=all(not m['state']['prim']['tme'] for m in group_acc['members']) + override_group=all(m['first_idx'] in OVERRIDE_CT32 for m in group_acc['members']) + # Authentic light-buffer setup uses ZTEST=ALWAYS for its opaque + # gray clear and final bias-removal sprite, while the intervening + # volumes use GEQUAL against the scene Z and never write Z. + z_ok=(zte==1 and zpsm==0xA and + (ztst==2 or ((ALLOW_UNTEXTURED and untextured_group) or override_group) + and ztst==1 and zmsk==1)) + if not z_ok: + sys.exit(f"[{CH}] FAIL: group {group_no} idx{group_acc['idx']} lacks authentic ZTE=1/GEQUAL/PSMZ16S state") + reuse=bool(descs and group_acc['idxw']==descs[-1]['idxw'] and group_acc['clut']==descs[-1]['clut']) + if RUNTIME_CLUT: + group_acc['cbp_reloc']=CBP_RELOC_BASE + else: + group_acc['cbp_reloc']=descs[-1]['cbp_reloc'] if reuse else next_cbp + if not reuse: next_cbp+=4 + group_acc['reuse']=int(reuse); descs.append(group_acc) + group_no+=1; group_acc=None + if GROUPED and (group_acc is not None or group_no!=len(GROUP_SIZES)): + sys.exit(f"[{CH}] FAIL: group fold ended at {group_no}/{len(GROUP_SIZES)}") + if not GROUPED: + # Runtime-CLUT fixtures deliberately reuse one staging CBP: the host + # commits the epoch palette before GO. Keep each draw as its own + # chronological epoch while retaining an already resident identical + # texture/CLUT payload. The old preloaded-CLUT mode still requires a + # distinct relocated palette for every epoch. + if RUNTIME_CLUT: + for k,d in enumerate(descs): + d['cbp_reloc']=CBP_RELOC_BASE + d['reuse']=int(k>0 and d['idxw']==descs[k-1]['idxw'] and d['clut']==descs[k-1]['clut']) + else: + for k,d in enumerate(descs): + d['cbp_reloc']=CBP_RELOC_BASE+k*4 + # ---- gate: distinct palettes (real multi-texture, no aliasing) ---- + if not RUNTIME_CLUT: + for i in range(len(pals)): + for j in range(i+1,len(pals)): + if pals[i]==pals[j]: sys.exit(f"[Ch356] FAIL: epochs {idxs[i]},{idxs[j]} share a palette (aliasing)") + # ---- gate: non-overlapping relocated CBPs within BRAM ---- + for d in descs: + if d['cbp_reloc']+4 > VRAM_BLOCKS: sys.exit(f"[Ch356] FAIL: relocated CBP {d['cbp_reloc']} (+4) exceeds VRAM {VRAM_BLOCKS} blocks") + cbps=[d['cbp_reloc'] for d in descs] + if not RUNTIME_CLUT: + for i in range(len(cbps)): + for j in range(i+1,len(cbps)): + if abs(cbps[i]-cbps[j])<4: sys.exit(f"[Ch356] FAIL: relocated CBPs {cbps[i]},{cbps[j]} overlap") + print(f"[Ch356] all {len(eps)} textures + CLUTs resident; palettes pairwise-distinct; relocated CBPs {cbps} distinct + in BRAM (512 blocks)") + else: + print(f"[{CH}] all {len(eps)} textures + CLUTs resident; runtime palette staging CBP={CBP_RELOC_BASE}; reuse epochs={sum(d['reuse'] for d in descs)}") + else: + print(f"[{CH}] {len(eps)} draws -> {N_EP} validated epochs; " + f"groups {descs[0]['idx_all']} ... {descs[-1]['idx_all']}; reuse epochs={sum(d['reuse'] for d in descs)}") + + for d in descs: + if d['cbp_reloc']+4 > VRAM_BLOCKS: + sys.exit(f"[{CH}] FAIL: relocated CBP {d['cbp_reloc']} (+4) exceeds BRAM {VRAM_BLOCKS} blocks") + + # ---- framebuffer geometry ---- + UX=max(d['bbox'][2] for d in descs); UY=max(d['bbox'][3] for d in descs) + UMINX=int(min(d['bbox'][0] for d in descs)); UMINY=int(min(d['bbox'][1] for d in descs)) + LPDDR_TEX_BASE_P = 0x00200000 + if FB640: + # Ch357: NATIVE 640x480 — preserve authentic screen coordinates (NO union-origin translation). + OX=0; OY=0; FBPXW=640; H=480; FBW=10; STRIDE=2560; W=FBPXW + # Most fixtures must be wholly in bounds. Post-process fans may carry + # authentic GS guard-band vertices outside the display; accept those + # only with an explicit opt-in, then use the existing x/y/s/t/q/Z/RGBA + # polygon clip below before quantization and emission. + if UMINX<0 or UMINY<0 or UX>FBPXW-1 or UY>H-1: + if not CLIP_FB_GUARDBAND: + sys.exit(f"[Ch357] FAIL: authentic coords x[{UMINX}..{UX:.0f}] y[{UMINY}..{UY:.0f}] exceed 640x480; pass --clip-fb-guardband only for intentional GS guard-band geometry") + print(f"[{CH}] guard-band clip enabled: authentic coords x[{UMINX}..{UX:.0f}] y[{UMINY}..{UY:.0f}] -> 640x480") + FB_END = FBPXW*H*4 + if FBW!=10 or STRIDE!=2560 or FB_END!=0x12C000 or STRIDE//32!=80 or (STRIDE//32*H)!=38400: + sys.exit(f"[Ch357] FAIL: geometry mismatch (FBW={FBW} stride={STRIDE} size=0x{FB_END:x} beats/row={STRIDE//32} beats/frame={STRIDE//32*H})") + # gate: FB region [0,FB_END) disjoint from the texture region [0x200000, +TEX_BYTES). + if FB_END > LPDDR_TEX_BASE_P: + sys.exit(f"[Ch357] FAIL: FB end 0x{FB_END:x} overlaps texture base 0x{LPDDR_TEX_BASE_P:x}") + print(f"[Ch357] NATIVE 640x480 (FBW={FBW}) stride={STRIDE}B size=0x{FB_END:x} beats/row={STRIDE//32} " + f"scanout={STRIDE//32*H} beats/frame; authentic coords x[{UMINX}..{UX:.0f}] y[{UMINY}..{UY:.0f}] " + f"(no union translation); FB[0..0x{FB_END:x}) disjoint from tex[0x{LPDDR_TEX_BASE_P:x}..0x{LPDDR_TEX_BASE_P+TEX_BYTES:x})") + else: + # Ch356: union-cropped geometry. + OX=UMINX; OY=UMINY + W=int(UX)-OX+1; H=int(UY)-OY+1; FBW=(W+63)//64; FBPXW=FBW*64; STRIDE=FBPXW*4 + print(f"[Ch356] UNION origin=({OX},{OY}) content={W}x{H} -> stored FB {FBPXW}x{H} (FBW={FBW}) stride={STRIDE}B " + f"size=0x{FBPXW*H*4:x} scanout={STRIDE//32*H} beats/frame") + + # ---- gate: per-triangle Q canonicalization (all-neg -> negate; mixed/zero -> FAIL CLOSED) + list fits staging ---- + for d in descs: + tris=[] + # Ch359: merged epochs expand EACH member draw's strip separately (no phantom bridging triangles), dump order. + for e_m in (d['members'] if d.get('members') else [d['e']]): + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,z=v.get("z"),fog=v.get("fog"),rgba=v.get("rgba"), + s=v["s"],t=v["t"],q=v["q"],kick=v.get("kick",True)) for v in e_m["verts"]] + if (COALESCE_SOLID_SPRITES and e_m["state"]["prim"]["type"]==6 + and not e_m["state"]["prim"]["tme"]): + fv=coalesce_solid_sprite_grid(fv) + if HALF_OPEN_SPRITES and e_m["state"]["prim"]["type"]==6: + fv=half_open_sprite_rects(fv) + raw=topology_tris(fv,e_m["state"]["prim"]["type"], honor_kick=not LEGACY_STRIP_KICKS) + clip_w=FBPXW; clip_h=H + if AUTH_SCISSOR_CLIP: + sc=e_m["state"].get("scissor") + if sc is None: sys.exit(f"[{CH}] FAIL: idx{d['idx']} missing authentic SCISSOR state") + sx0=sc&0x7FF; sx1=(sc>>16)&0x7FF; sy0=(sc>>32)&0x7FF; sy1=(sc>>48)&0x7FF + if sx0!=0 or sy0!=0: sys.exit(f"[{CH}] FAIL: nonzero SCISSOR origin ({sx0},{sy0}) not yet modelled") + clip_w=min(clip_w,sx1+1); clip_h=min(clip_h,sy1+1) + for tri in raw: + for ct in MD.clip_rect(tri, clip_w, clip_h): + qs=[v["q"] for v in ct] + if SKIP_MIXED_Q and not (all(q>0 for q in qs) or all(q<0 for q in qs)): + d['mixed_q_skipped']=d.get('mixed_q_skipped',0)+1 + continue + tris.append(ct) + nneg=0 + for (v0,v1,v2) in tris: + qs=[v0["q"],v1["q"],v2["q"]] + if all(q>0 for q in qs): pass + elif all(q<0 for q in qs): nneg+=1 + else: sys.exit(f"[Ch356] FAIL-CLOSED: idx{d['idx']} mixed-sign/zero-Q triangle (qs={qs}) — signed-Q unsupported") + d['ntris']=len(tris); d['words']=(8 if EMIT_CLAMP_HEADER else 7)+len(tris)*9; d['nneg']=nneg + if d['words']>STG_WORDS and CAPACITY_EPOCH_PIXELS is None: + sys.exit(f"[Ch356] FAIL: idx{d['idx']} list {d['words']} words > staging {STG_WORDS}") + + print(f"[Ch356] PREFLIGHT PASS. epoch descriptors (dump order):") + print(f" {'idx':>7} {'tbp':>6} {'cbp_reloc':>9} {'tex_crc':>10} {'lpddr':>9} {'tris':>5} {'words':>6} {'neg-Q':>6} {'expect_records':>14}") + for d in descs: + print(f" {d['idx']:>7} {d['tbp']:>6} {d['cbp_reloc']:>9} 0x{d['crc']:08x} 0x{d['lpddr']:07x} {d['ntris']:>5} {d['words']:>6} {d['nneg']:>6} {d['ntris']:>14}") + if "--emit" not in a: + print("[Ch356] (preflight only; --emit stage pending)"); return 0 + + # ================= --emit: N feeder lists + N textures/CLUTs + bootlet (ALL CLUTs preloaded) + composed ref ================= + NEW_TBP=0x40000//256; TEX_VRAM_BASE=NEW_TBP*256; LPDDR_TEX_BASE=0x00200000; VRAM_BYTES=0x20000 + PERSP_FRAC=bake.PERSP_FRAC; PSCALE=PSCALE_ARG; TW=512; TH=512; TW_LOG=TH_LOG=9; TBW_TEX=8; S24_MAX=(1<<23)-1 + # The capture contains both tiny homogeneous STQ values (opaque scene + # geometry) and post-process/fan draws with normalized S/T~=1, Q=1. A + # common positive scale cancels in S/Q; include exact binary fractions so + # the latter fit the signed 24-bit S/T fields without sacrificing ratio. + AUTO_PSCALES=(1/4096,1/3072,1/2048,1/1536,1/1024,1/768,1/512,1/384,1/256,1/192,1/128,1/96,1/64,1/48,1/32,1/24, + 0.0625,0.09375,0.125,0.1875,0.25,0.375,0.5,0.75,1, + 2,4,8,16,32,64,128,256,384,512,768,1024,1536,2048,3072,4096,6144) + if PSCALE_LIST is not None: + print(f"[{CH}] perspective fixed-point scale PSCALE per-epoch spec={PSCALE_LIST}; auto candidates={AUTO_PSCALES}") + elif PSCALE_AUTO: + print(f"[{CH}] perspective fixed-point scale PSCALE=auto per-triangle candidates={AUTO_PSCALES}") + else: + print(f"[{CH}] perspective fixed-point scale PSCALE={PSCALE} (effective frac {PERSP_FRAC}+{PSCALE.bit_length()-1})") + print(f"[{CH}] XY mode={'native-12.4' if SUBPIXEL_XY else 'integer-quantized'}" + f" quantization per-epoch spec={XY_QUANT_LIST if XY_QUANT_LIST is not None else [XY_QUANT_RAW.lower()]*len(idxs)}") + edge=MD.edge; clip=MD.clip_rect + def tex0_word(cbp, tfx=1, logical_tw=TW, logical_th=TH, tex_psm=0x13, tex_tbw=TBW_TEX): + tw_log=logical_tw.bit_length()-1; th_log=logical_th.bit_length()-1 + v=bake.tex0_pack(NEW_TBP,tex_tbw,psm=tex_psm,tw=tw_log,th=th_log,tfx=tfx) + v|=(cbp&0x3FFF)<<37; v|=(0&0x1)<<55; v|=(0&0x1F)<<56; v|=((0 if RUNTIME_CLUT else 1)&0x7)<<61 + return v + def canon(v0,v1,v2): + qs=[v0["q"],v1["q"],v2["q"]] + if all(q>0 for q in qs): return (v0,v1,v2) + neg=lambda v: dict(v, s=-v["s"],t=-v["t"],q=-v["q"]) # negate S/T/Q only; Z/color unchanged + return (neg(v0),neg(v1),neg(v2)) + # z-aware triangle clip (screen-linear Z, like the GS): mirrors MD.clip_rect but interpolates Z too. + def clip_rect_z(tri, W, Hh): + def lerp(p1,p2,al): + out={k:(p1[k]+al*(p2[k]-p1[k])) for k in ("x","y","z","fog","s","t","q")} + c=[] + for sh in (0,8,16,24): + a=(p1["rgba"]>>sh)&0xFF; b=(p2["rgba"]>>sh)&0xFF + c.append(max(0,min(255,int(round(a+al*(b-a)))))) + out["rgba"]=c[0]|(c[1]<<8)|(c[2]<<16)|(c[3]<<24) + return out + def clip_edge(poly, inside, isect): + out=[]; n=len(poly) + for i in range(n): + A=poly[i]; B=poly[(i+1)%n]; ina=inside(A); inb=inside(B) + if ina: out.append(A) + if ina!=inb: out.append(isect(A,B)) + return out + poly=[dict(x=v["x"],y=v["y"],z=v.get("z",0.0),fog=v.get("fog",255.0), + s=v["s"],t=v["t"],q=v["q"],rgba=v.get("rgba",0xFFFFFFFF)) for v in tri] + poly=clip_edge(poly, lambda p:p["x"]>=0.0, lambda A,B:lerp(A,B,(0.0-A["x"])/(B["x"]-A["x"]))); poly=poly or [] + if not poly: return [] + poly=clip_edge(poly, lambda p:p["x"]<=W, lambda A,B:lerp(A,B,(W-A["x"])/(B["x"]-A["x"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["y"]>=0.0, lambda A,B:lerp(A,B,(0.0-A["y"])/(B["y"]-A["y"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["y"]<=Hh, lambda A,B:lerp(A,B,(Hh-A["y"])/(B["y"]-A["y"]))) + if len(poly)<3: return [] + return [(poly[0],poly[k],poly[k+1]) for k in range(1,len(poly)-1)] + def edge_i(px, py, ax, ay, bx, by): + return (px-ax)*(by-ay)-(py-ay)*(bx-ax) + def top_or_left(ax, ay, bx, by): + dx=bx-ax; dy=by-ay + return (dy>0) or (dy==0 and dx>0) + def trunc_div(num, den): + if den==0: return 0 + return (-1 if (num<0)^(den<0) else 1) * (abs(num)//abs(den)) + def grad_num_dadx(a0,a1,a2,x0,y0,x1,y1,x2,y2): + return ((a1-a0)*(y2-y0)-(a2-a0)*(y1-y0)) << 16 + def grad_num_dady(a0,a1,a2,x0,y0,x1,y1,x2,y2): + return ((a2-a0)*(x1-x0)-(a1-a0)*(x2-x0)) << 16 + def interp_wide(base, dadx, dady, x, y, x0, y0): + return (base + ((dadx*(x-x0) + dady*(y-y0)) >> 16)) & 0xFFFFFF + def recip_lut(q, idx_bits=11, scale=24): + out_max=(1<<(scale+1))-1 + if q<=0: return out_max + top=idx_bits-1; e=q.bit_length()-1 + m=(q>>(e-top)) if e>=top else (q<<(top-e)) + m &= (1<>e, out_max) + def persp_uv(s, t, q): + r=recip_lut(q); u=(s*r)>>24; v=(t*r)>>24 + return (min(u,2047), min(v,2047)) + def quant_xy(v, mode): + if mode=="floor": return math.floor(v) + if mode=="ceil": return math.ceil(v) + if mode=="trunc": return math.trunc(v) + return round(v) + def pack_v(v, pscale, xy_mode): + s_fp=round(v["s"]*TW*(1<S24_MAX or abs(t_fp)>S24_MAX: return None + if q_fp<=0 or q_fp>0xFFFFFF: return None + return dict(x=max(0,min(FBPXW-1,int(quant_xy(v["x"],xy_mode)))), + y=max(0,min(H-1,int(quant_xy(v["y"],xy_mode)))), + s=s_fp&0xFFFFFF, t=t_fp&0xFFFFFF, q=q_fp&0xFFFFFF) + def prep_packed(tri, pscale, xy_mode): + verts=[pack_v(v,pscale,xy_mode) for v in tri] + if any(v is None for v in verts): return None + x0,y0=verts[0]["x"],verts[0]["y"]; x1,y1=verts[1]["x"],verts[1]["y"]; x2,y2=verts[2]["x"],verts[2]["y"] + det=(x1-x0)*(y2-y0)-(x2-x0)*(y1-y0) + if det==0: return None + if det<0: + verts=[verts[0],verts[2],verts[1]]; det=-det + v0,v1,v2=verts; x0,y0=v0["x"],v0["y"]; x1,y1=v1["x"],v1["y"]; x2,y2=v2["x"],v2["y"] + bias=[0 if top_or_left(x0,y0,x1,y1) else 1, + 0 if top_or_left(x1,y1,x2,y2) else 1, + 0 if top_or_left(x2,y2,x0,y0) else 1] + def grad(attr): + a0,a1,a2=v0[attr],v1[attr],v2[attr] + return (trunc_div(grad_num_dadx(a0,a1,a2,x0,y0,x1,y1,x2,y2),det), + trunc_div(grad_num_dady(a0,a1,a2,x0,y0,x1,y1,x2,y2),det)) + return dict(v=verts,bias=bias,ds=grad("s"),dt=grad("t"),dq=grad("q")) + def tex_col(idxlin, palg, u, v, logical_tw=TW, logical_th=TH, tex_psm=0x13, tex_stride=TW): + if u<0 or u>=logical_tw or v<0 or v>=logical_th: return None + # The LPDDR cache has a fixed physical 512-texel row stride even when + # TEX0 advertises a smaller logical texture. + lin=v*tex_stride+u + if tex_psm==0x00: + return idxlin[lin]&0xFFFFFF + if tex_psm==0x14: + byte_off=lin//2 + packed=(idxlin[byte_off//4]>>(8*(byte_off%4)))&0xFF + ci=((packed>>4)&15) if (lin&1) else (packed&15) + else: + ci=(idxlin[lin//4]>>(8*(lin%4)))&0xFF + return palg[ci]&0xFFFFFF + def texel_coord(coord, size, mode): + if mode==0: + return coord % size + if mode==1: + return max(0,min(size-1,coord)) + raise AssertionError(f"unmodelled wrap mode {mode}") + def texel_uv(clamp, u, v, logical_tw=TW, logical_th=TH): + return (texel_coord(u,logical_tw,clamp&3), texel_coord(v,logical_th,(clamp>>2)&3)) + def ref_near_match(idxlin, palg, color, tu, tv): + for rad in range(0,2): + for du in range(-rad,rad+1): + for dv in range(-rad,rad+1): + if max(abs(du),abs(dv))!=rad: continue + if tex_col(idxlin,palg,tu+du,tv+dv)==color: + return True + return False + def scale_score(tri, pscale, idxlin, palg, xy_mode, clamp): + pt=prep_packed(tri,pscale,xy_mode) + if pt is None: return None + v0,v1,v2=pt["v"] + minx=max(0,min(v0["x"],v1["x"],v2["x"])); maxx=min(FBPXW-1,max(v0["x"],v1["x"],v2["x"])) + miny=max(0,min(v0["y"],v1["y"],v2["y"])); maxy=min(H-1,max(v0["y"],v1["y"],v2["y"])) + fx0,fy0=tri[0]["x"],tri[0]["y"]; fx1,fy1=tri[1]["x"],tri[1]["y"]; fx2,fy2=tri[2]["x"],tri[2]["y"] + far=edge(fx0,fy0,fx1,fy1,fx2,fy2) + if abs(far)<1e-12: return None + inv=1.0/far; ok=0; total=0; oob=0; errsum=0 + for y in range(miny,maxy+1): + for x in range(minx,maxx+1): + e0=edge_i(x,y,v0["x"],v0["y"],v1["x"],v1["y"])+pt["bias"][0] + e1=edge_i(x,y,v1["x"],v1["y"],v2["x"],v2["y"])+pt["bias"][1] + e2=edge_i(x,y,v2["x"],v2["y"],v0["x"],v0["y"])+pt["bias"][2] + if e0>0 or e1>0 or e2>0: continue + a0=edge(fx1,fy1,fx2,fy2,float(x),float(y))*inv + a1=edge(fx2,fy2,fx0,fy0,float(x),float(y))*inv + a2=1.0-a0-a1 + Q=a0*tri[0]["q"]+a1*tri[1]["q"]+a2*tri[2]["q"] + if abs(Q)<1e-12: continue + tu,tv=texel_uv(clamp, + int(((a0*tri[0]["s"]+a1*tri[1]["s"]+a2*tri[2]["s"])/Q)*TW), + int(((a0*tri[0]["t"]+a1*tri[1]["t"]+a2*tri[2]["t"])/Q)*TH)) + s=interp_wide(v0["s"],pt["ds"][0],pt["ds"][1],x,y,v0["x"],v0["y"]) + t=interp_wide(v0["t"],pt["dt"][0],pt["dt"][1],x,y,v0["x"],v0["y"]) + q=interp_wide(v0["q"],pt["dq"][0],pt["dq"][1],x,y,v0["x"],v0["y"]) + u,v=persp_uv(s,t,q) + total+=1 + col=tex_col(idxlin,palg,u,v) + if col is None: + oob+=1 + errsum+=2048 + continue + du=abs(u-tu); dv=abs(v-tv) + err=max(du,dv); errsum+=err + if ref_near_match(idxlin,palg,col,tu,tv): ok+=1 + return (ok,total,oob,errsum) + def parse_fixed_pscale(raw): + v=int(raw) + if v<=0: sys.exit(f"[Ch356] FAIL: --pscale must be positive, got {v}") + return v + def choose_pscale(tri, idxlin=None, palg=None, mode=None, xy_mode="round", clamp=0, + logical_tw=TW, logical_th=TH): + if mode is None: + mode="auto" if PSCALE_AUTO else str(PSCALE) + if mode not in ("auto","pertri","per-tri"): + return parse_fixed_pscale(mode) + if FAST_FIT_SCALE: + # A common positive scale cancels exactly in S/Q. Choose the + # largest candidate whose packed S,T,Q all fit, maximizing fixed- + # point precision without an expensive per-pixel texture search. + for pscale in reversed(AUTO_PSCALES): + good=True + for v in tri: + sf=round(v["s"]*logical_tw*(1<S24_MAX or abs(tf)>S24_MAX or qf<=0 or qf>0xFFFFFF: + good=False; break + if good: return pscale + sys.exit(f"[{CH}] FAIL: no representable common S/T/Q scale for triangle {tri}") + best=None + for pscale in AUTO_PSCALES: + sc=scale_score(tri,pscale,idxlin,palg,xy_mode,clamp) + if sc is None: continue + ok,total,oob,errsum=sc + # The authentic floating-point UV is known, so texel-coordinate + # error is the primary fidelity metric. Color-match count cannot + # lead here: large black/repeated palette regions let a badly + # displaced UV score as a "match" and previously selected scales + # that blacked out coherent scene geometry. + key=(-oob, -errsum, ok, total, pscale) + if best is None or key>best[0]: + best=(key,pscale) + if best is None: + return 1024 + return best[1] + def vwords(v, pscale, xy_mode, logical_tw=TW, logical_th=TH, fge=False): + s_fp=round(v["s"]*logical_tw*(1<S24_MAX or abs(t_fp)>S24_MAX: + sys.exit(f"[Ch356] ST overflow pscale={pscale} xy=({v['x']},{v['y']}) stq=({v['s']},{v['t']},{v['q']}) fp=({s_fp},{t_fp},{q_fp})") + if q_fp<=0 or q_fp>0xFFFFFF: + sys.exit(f"[Ch356] Q overflow pscale={pscale} xy=({v['x']},{v['y']}) stq=({v['s']},{v['t']},{v['q']}) fp=({s_fp},{t_fp},{q_fp})") + sx=max(0,min(FBPXW-1,int(quant_xy(v["x"],xy_mode)))); sy=max(0,min(H-1,int(quant_xy(v["y"],xy_mode)))) + sx12_4=max(0,min((FBPXW<<4)-1,int(round(v["x"]*16.0)))) + sy12_4=max(0,min((H<<4)-1,int(round(v["y"]*16.0)))) + zval = (max(0,min(0xFFFFFF,int(round(v.get("z",0.0))))) if AUTHZ else 0x0000_5000) # authentic 24-bit XYZ2 Z, else flat + rgba=v.get("rgba",0xFFFFFFFF) if AUTH_COLOR_TFX else 0 + # GS per-vertex FOG — when this draw is FGE (and --auth-fog on), pack the + # commit word as XYZF2: same X/Y/24-bit-Z, with F=[63:56] the clamped + # per-vertex fog byte. The feeder tags it reg 0x04 (see EDIT 1). zval is + # already masked to 24 bits, so [63:56] is free for F and Z is unchanged. + fog_this = AUTH_FOG and fge + F = max(0,min(255,int(round(v.get("fog",255.0))))) + xyz = ((sx12_4 & 0xFFFF) | ((sy12_4 & 0xFFFF) << 16) | ((zval & 0xFFFFFF) << 32)) \ + if SUBPIXEL_XY else bake.xyz2_dataz(sx,sy,zval) + if fog_this: + xyz = (xyz & 0x00FFFFFFFFFFFFFF) | ((F & 0xFF) << 56) + # rgbaq_with_q() is a legacy opaque helper and always writes A=0xff. + # Authentic MODULATE+TCC alpha passes depend on the captured vertex + # alpha, so pack the complete RGBA word when authentic color is + # enabled. Keep the legacy opaque-alpha contract for old fixtures. + rgbaq = (((q_fp & 0xFFFFFFFF) << 32) | (rgba & 0xFFFFFFFF)) \ + if AUTH_COLOR_TFX else bake.rgbaq_with_q(0,0,0,q_fp&0xFFFFFFFF) + return [rgbaq, + bake.st_data(s_fp&0xFFFFFF,t_fp&0xFFFFFF), xyz] + def tris_of(d): + if d.get("forced_tris") is not None: + return d["forced_tris"] + out=[] + # Expand each captured topology into independent triangle records. The + # feeder reissues PRIM for every record, so FAN records must carry the + # real anchor vertex explicitly; treating a FAN as a sliding STRIP + # silently changes every triangle after the first. + for e_m in (d['members'] if d.get('members') else [d['e']]): + def fog_fold_rgba(v): + rgba=v["rgba"] + if not (AUTH_FOG_BLACK_FOLD and e_m["state"]["prim"].get("fge",0)): + return rgba + if (e_m["state"].get("fogcol", 0) & 0xFFFFFF) != 0: + sys.exit(f"[{CH}] FAIL: --auth-fog-black-fold requires FOGCOL=0, idx{e_m['first_idx']} has 0x{e_m['state']['fogcol']&0xFFFFFF:06x}") + fog=max(0,min(255,int(round(v.get("fog",255.0))))) + rgb=[(((rgba>>sh)&0xFF)*fog)>>8 for sh in (0,8,16)] + return rgb[0] | (rgb[1]<<8) | (rgb[2]<<16) | (rgba&0xFF000000) + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,z=v["z"],fog=v.get("fog",255.0), + s=v["s"],t=v["t"],q=v["q"],rgba=fog_fold_rgba(v),kick=v.get("kick",True)) for v in e_m["verts"]] + prim_type=e_m["state"]["prim"]["type"] + if COALESCE_SOLID_SPRITES and prim_type==6 and not e_m["state"]["prim"]["tme"]: + fv=coalesce_solid_sprite_grid(fv) + if HALF_OPEN_SPRITES and prim_type==6: + fv=half_open_sprite_rects(fv) + raw=topology_tris(fv,prim_type, honor_kick=not LEGACY_STRIP_KICKS) + clip_w=FBPXW; clip_h=H + if AUTH_SCISSOR_CLIP: + sc=e_m["state"].get("scissor") + if sc is None: sys.exit(f"[{CH}] FAIL: idx{d['idx']} missing authentic SCISSOR state") + sx0=sc&0x7FF; sx1=(sc>>16)&0x7FF; sy0=(sc>>32)&0x7FF; sy1=(sc>>48)&0x7FF + if sx0!=0 or sy0!=0: sys.exit(f"[{CH}] FAIL: nonzero SCISSOR origin ({sx0},{sy0}) not yet modelled") + clip_w=min(clip_w,sx1+1); clip_h=min(clip_h,sy1+1) + for t in raw: + for ct in clip_rect_z(t, clip_w, clip_h): # z-aware clip carries authentic interpolants + qs=[v["q"] for v in ct] + if SKIP_MIXED_Q and not (all(q>0 for q in qs) or all(q<0 for q in qs)): + continue + out.append(ct) + return out + + # Clip an already framebuffer-clipped triangle into a horizontal strip. + # Strip boundaries are integral pixel coordinates, while coverage samples + # are at pixel centers, so adjacent strips cannot double-shade a sample. + # All interpolants (including authentic Z and vertex color) are carried at + # the new vertices exactly as in the framebuffer guard-band clip above. + def clip_y_band_z(tri, lo, hi): + def lerp(p1,p2,al): + out={k:(p1[k]+al*(p2[k]-p1[k])) for k in ("x","y","z","fog","s","t","q")} + c=[] + for sh in (0,8,16,24): + av=(p1["rgba"]>>sh)&0xFF; bv=(p2["rgba"]>>sh)&0xFF + c.append(max(0,min(255,int(round(av+al*(bv-av)))))) + out["rgba"]=c[0]|(c[1]<<8)|(c[2]<<16)|(c[3]<<24) + return out + def clip_edge(poly, inside, isect): + out=[]; n=len(poly) + for i in range(n): + A=poly[i]; B=poly[(i+1)%n]; ina=inside(A); inb=inside(B) + if ina: out.append(A) + if ina!=inb: out.append(isect(A,B)) + return out + poly=list(tri) + poly=clip_edge(poly, lambda p:p["y"]>=lo, + lambda A,B:lerp(A,B,(lo-A["y"])/(B["y"]-A["y"]))) + if not poly: return [] + poly=clip_edge(poly, lambda p:p["y"]<=hi, + lambda A,B:lerp(A,B,(hi-A["y"])/(B["y"]-A["y"]))) + if len(poly)<3: return [] + return [(poly[0],poly[k],poly[k+1]) for k in range(1,len(poly)-1)] + + def center_coverage(tri, xy_mode): + # Match pack_v exactly at the right/bottom framebuffer edges. The + # geometric clip uses the conventional exclusive W/H boundary, while + # XYZ2 stores the last addressable pixel (W-1/H-1). + if SUBPIXEL_XY: + # Capacity scheduling must use the same native 12.4 geometry as + # the enabled raster coverage path. Integer-quantizing here can + # collapse thin but visible triangles and silently discard them + # as zero-coverage pieces before they ever reach the RTL. + pts=[(max(0.0,min(FBPXW-(1.0/16.0),round(v["x"]*16.0)/16.0)), + max(0.0,min(H-(1.0/16.0),round(v["y"]*16.0)/16.0))) for v in tri] + else: + pts=[(max(0,min(FBPXW-1,int(quant_xy(v["x"],xy_mode)))), + max(0,min(H-1,int(quant_xy(v["y"],xy_mode))))) for v in tri] + (x0,y0),(x1,y1),(x2,y2)=pts; ar=edge(x0,y0,x1,y1,x2,y2) + if not ar: return 0 + inv=1.0/ar; count=0 + for py in range(max(0,int(math.floor(min(y0,y1,y2)))),min(H-1,int(math.ceil(max(y0,y1,y2))))+1): + for px in range(max(0,int(math.floor(min(x0,x1,x2)))),min(FBPXW-1,int(math.ceil(max(x0,x1,x2))))+1): + cx=px+0.5; cy=py+0.5 + w0=edge(x1,y1,x2,y2,cx,cy)*inv + w1=edge(x2,y2,x0,y0,cx,cy)*inv + if w0>=-0.001 and w1>=-0.001 and (1.0-w0-w1)>=-0.001: count+=1 + return count + + # Ch407: large guard-band fans can cover most of the framebuffer, while + # the production request FIFO holds 16K fragments. Split into 16-row bands + # and pack consecutive, non-overlapping pieces into ordered epochs whose + # measured center-sample coverage stays below the requested safety limit. + # This is a fixture scheduling transformation only; texture/state and GS + # primitive order remain unchanged. + if CAPACITY_EPOCH_PIXELS is not None: + split=[]; BAND_H=16; MAX_EPOCH_TRIS=(STG_WORDS-(8 if EMIT_CLAMP_HEADER else 7))//9 + for d in descs: + xy_mode = XY_QUANT_LIST[d['k']] if XY_QUANT_LIST is not None else XY_QUANT_RAW.lower() + pieces=[] + for tri in tris_of(d): + for lo in range(0,H,BAND_H): + band_hi=min(H,lo+BAND_H)-(1.0/16.0 if HALF_OPEN_SPRITES and SUBPIXEL_XY else 0.0) + for piece in clip_y_band_z(tri,lo,band_hi): + cov=center_coverage(piece,xy_mode) + if cov: + if cov>CAPACITY_EPOCH_PIXELS: + sys.exit(f"[Ch407] FAIL: band piece coverage {cov} exceeds epoch cap {CAPACITY_EPOCH_PIXELS}") + pieces.append((piece,cov)) + groups=[]; cur=[]; cur_cov=0 + for piece,cov in pieces: + if cur and (cur_cov+cov>CAPACITY_EPOCH_PIXELS or len(cur)>=MAX_EPOCH_TRIS): + groups.append((cur,cur_cov)); cur=[]; cur_cov=0 + cur.append(piece); cur_cov+=cov + if cur: groups.append((cur,cur_cov)) + for gi,(group,cov) in enumerate(groups): + nd=dict(d); nd["forced_tris"]=group; nd["k"]=len(split) + nd["reuse"]=d.get("reuse",0) if gi==0 else 1 + nd["ntris"]=len(group); nd["words"]=(8 if EMIT_CLAMP_HEADER else 7)+9*len(group) + nd["nneg"]=sum(1 for tri in group if all(v["q"]<0 for v in tri)) + nd["capacity_px"]=cov; split.append(nd) + descs=split + print(f"[{CH}] --capacity-epochs {CAPACITY_EPOCH_PIXELS}: 16-row band split/ordered pack -> {len(descs)} epochs; max scheduled coverage={max(d['capacity_px'] for d in descs)}") + + # Ch405 capacity contract: destination-alpha blending deliberately waits + # for each committed write so overlapping GS fragments observe exact + # destination order. Bound the unthrottled raster burst to one triangle + # per scene marker; a 16K request FIFO then covers the measured worst fan + # triangle (14,752 px) without hiding drops. Geometry/order are unchanged. + if TRI_EPOCHS: + split=[] + for d in descs: + for ti, tri in enumerate(tris_of(d)): + nd=dict(d) + nd["forced_tris"]=[tri] + nd["k"]=len(split) + nd["reuse"]=d.get("reuse",0) if ti==0 else 1 + nd["ntris"]=1 + nd["words"]=(8 if EMIT_CLAMP_HEADER else 7)+9 + nd["nneg"]=1 if all(v["q"]<0 for v in tri) else 0 + split.append(nd) + descs=split + print(f"[{CH}] --tri-epochs: split into {len(descs)} one-triangle bounded-burst epochs") + + # Splitting intentionally drops source groups with no covered pixels. + # Rebase both the dense epoch index and the texture-residency chain from + # the descriptors that will actually be emitted. Otherwise the first + # surviving descriptor can inherit reuse=1 from an empty predecessor and + # point at a texture payload that does not exist in the output table. + prev_asset=None + for k,d in enumerate(descs): + d['k']=k + d['reuse']=int(prev_asset is not None and + prev_asset['idxw']==d['idxw'] and + prev_asset['clut']==d['clut']) + prev_asset=d + + def wmem(name, words, banner): + with open(os.path.join(DATA,name),"w") as f: + f.write(f"// {banner}\n") + for x in words: f.write(f"{x&0xFFFFFFFF:08x}\n") + N=len(descs); FB_WORDS=FBPXW*H + + # Reuse epochs point at the most recent fresh texture payload; palettes + # are content-deduplicated too. This keeps a 3K-epoch fixture to tens of + # megabytes instead of duplicating gigabytes of identical local assets. + last_asset_k=None; pal_asset={} + for d in descs: + if not d.get('reuse',0): last_asset_k=d['k'] + if last_asset_k is None or descs[last_asset_k]['crc']!=d['crc']: + sys.exit(f"[{CH}] FAIL: epoch {d['k']} reuse chain has no matching fresh texture") + d['asset_k']=last_asset_k + pk=tuple(d['pal']) + if pk not in pal_asset: pal_asset[pk]=d['k'] + d['pal_k']=pal_asset[pk] + + # SYNTHETIC GATE (Codex, from Ch355): a positive-Q triangle and its ALL-NEGATED twin must canonicalize to + # BIT-IDENTICAL staging words (proves (-s)/(-q)=s/q exactness of the reciprocal canonicalization). + def _pack(tri): + out=[] + ctri=canon(*tri); pscale=1024 if (PSCALE_AUTO or PSCALE_LIST is not None) else choose_pscale(ctri) + for v in ctri: out+=vwords(v,pscale,"round") + return out + _tp=[dict(x=10,y=20,s=0.00030,t=0.00040,q=0.0020), dict(x=30,y=25,s=0.00050,t=0.00010,q=0.0030), dict(x=15,y=40,s=0.00020,t=0.00060,q=0.0025)] + _tn=[dict(x=v["x"],y=v["y"],s=-v["s"],t=-v["t"],q=-v["q"]) for v in _tp] + if _pack(_tp)!=_pack(_tn): sys.exit("[Ch356] FAIL: canonicalization not bit-exact (positive-Q tri vs its all-negated twin differ)") + print("[Ch356] canonicalization self-test PASS: positive-Q triangle and its all-negated twin pack BIT-IDENTICALLY") + + # per-epoch: feeder list (canonicalized) + de-swizzled texture -> LPDDR + relocated CLUT bytes + de-gridded palette + for d in descs: + tris=tris_of(d) + scale_hist={} + scale_mode = PSCALE_LIST[d['k']] if PSCALE_LIST is not None else ("auto" if PSCALE_AUTO else str(PSCALE)) + xy_mode = XY_QUANT_LIST[d['k']] if XY_QUANT_LIST is not None else XY_QUANT_RAW.lower() + # Preserve authentic PRIM state bits, but not its topology. tris_of() + # has already expanded every captured TRI_STRIP, TRI_FAN, and SPRITE + # into independent three-vertex records, and the feeder reissues PRIM + # before every such record. Advertising the captured topology here + # makes gs_stub assemble a 9-word triangle record as (for example) a + # two-vertex SPRITE plus a dangling vertex. The staged grammar is + # unconditionally TRIANGLE; TME/ABE/FST/CTXT remain authentic. + # Preserve authentic ALPHA_1, including ABE, for the LPDDR ROP. + # Opaque fixtures retain their historical source-over/tri defaults. + state=d['state']; p=state['prim'] + # GS per-vertex FOG — carry PRIM.FGE (bit 5) so the feeder tags the + # vertex commit XYZF2 and gs_stub's ras_fge applies the fog blend. Only + # for captured-FGE draws with --auth-fog on; FGE=0 draws are unchanged. + fog_draw = AUTH_FOG and bool(p.get('fge',0)) + fge_bit = (1<<5) if fog_draw else 0 + prim_word=(3 | (p['tme']<<4) | fge_bit | (p['abe']<<6) | (p['fst']<<8) | (p['ctxt']<<9)) if ALLOW_ABE else (3 | (1<<4) | fge_bit) + alpha_word=state['alpha'] if ALLOW_ABE else bake.alpha_pack(0,1,0,1) + # Preserve architectural TEST/ZBUF for the external LPDDR ROP. Older + # fixtures could use placeholders because the de25 wrapper hardwired + # ZTE=1/ZMSK=0; Ch405 carries these bits per fragment so authentic + # read-only-Z overlays (ZMSK=1) can coexist with opaque Z writers. + # The external framebuffer is relocated to FBP=0/FBW=10/PSMCT32, + # but authentic byte-granular FRAME.FBMSK remains part of the draw. + # The RTL transports its four byte enables alongside each fragment. + frame_word=bake.frame_1_psmct32(FBW) + if ALLOW_ABE: + frame_word |= state['frame'] & 0xFFFFFFFF00000000 + stg=[len(tris)|(1<<32), frame_word, alpha_word, + state['test'], state['zbuf'], + tex0_word(d['cbp_reloc'], state['tex0']['tfx'] if AUTH_COLOR_TFX else 1, + d.get('logical_tw',TW), d.get('logical_th',TH), d.get('tex_psm',0x13), + d.get('tex_tbw',8))] + if EMIT_CLAMP_HEADER: + stg[0] |= 1<<34 + stg += [state['clamp'], prim_word] + else: + stg += [prim_word] + for tri in tris: + ctri=canon(*tri); pscale=choose_pscale(ctri,d['idxw'],d['pal'],scale_mode,xy_mode,d['state']['clamp'], + d.get('logical_tw',TW),d.get('logical_th',TH)); scale_hist[pscale]=scale_hist.get(pscale,0)+1 + for v in ctri: + vw=vwords(v,pscale,xy_mode,d.get('logical_tw',TW),d.get('logical_th',TH),fge=fog_draw) + if AUTH_COLOR_TFX and ((vw[0]>>24)&0xFF) != ((v['rgba']>>24)&0xFF): + sys.exit(f"[{CH}] FAIL: epoch {d['k']} vertex alpha changed while packing RGBAQ") + stg += vw + if len(stg)>STG_WORDS: sys.exit(f"[Ch356] epoch {d['k']} staging {len(stg)} > {STG_WORDS}") + bake.write_feeder_stg_mem(f"feeder_{PFX}{d['k']}.mem", stg, + f"{CH} LOCAL epoch {d['k']} (idx{d['idx']}, TEX0 CBP={d['cbp_reloc']}) {len(tris)} tris. gitignored.", total=STG_WORDS) + if d['asset_k']==d['k']: + wmem(f"{PFX}{d['k']}_tex_lpddr.mem", d['idxw'], f"{CH} LOCAL epoch {d['k']} tex (idx{d['idx']}/tbp={d['tbp']}) LINEAR -> LPDDR. gitignored.") + wmem(f"{PFX}{d['k']}_idx.mem", d['idxw'], f"{CH} LOCAL epoch {d['k']} idx. gitignored.") + if d['pal_k']==d['k']: + wmem(f"{PFX}{d['k']}_pal.mem", [p&0xFFFFFFFF for p in d['pal']], f"{CH} LOCAL epoch {d['k']} de-gridded palette. gitignored.") + d['nwords']=len(stg) + d['scale_hist']=scale_hist + if (PSCALE_AUTO or PSCALE_LIST is not None) and (d['k']<10 or d['k']%100==0 or d['k']==N-1): + print(f"[{CH}] epoch {d['k']} per-triangle PSCALE hist {dict(sorted(scale_hist.items()))}") + + # INDEPENDENT composed reference (dump order, paint order) + per-epoch refmaps + per-pixel OWNER (epoch idx). + # refmap: [31]cov [30]int [28]multi(>=2 epochs) [26:24]owner_epoch [17:9]tu [8:0]tv + print(f"[{CH}] independent reference sample={REF_SAMPLE} ref_xy_quant={int(REF_XY_QUANT)}") + refmap=[0]*FB_WORDS; refpix=[(0,0,0)]*FB_WORDS; nep=[0]*FB_WORDS; lastep=[-1]*FB_WORDS + emit_perep = N <= 128 + perep=([[0]*FB_WORDS for _ in range(N)] if emit_perep else None) + for k,d in enumerate(descs): + idxlin=d['idxw']; palg=d['pal'] + logical_tw=d.get('logical_tw',TW); logical_th=d.get('logical_th',TH) + tex_psm=d.get('tex_psm',0x13) + tex_stride=d.get('tex_tbw',8)*64 + xy_mode = XY_QUANT_LIST[k] if XY_QUANT_LIST is not None else XY_QUANT_RAW.lower() + for (v0,v1,v2) in tris_of(d): + if REF_XY_QUANT: + v0=dict(v0, x=quant_xy(v0["x"],xy_mode), y=quant_xy(v0["y"],xy_mode)) + v1=dict(v1, x=quant_xy(v1["x"],xy_mode), y=quant_xy(v1["y"],xy_mode)) + v2=dict(v2, x=quant_xy(v2["x"],xy_mode), y=quant_xy(v2["y"],xy_mode)) + x0,y0=v0["x"],v0["y"]; x1,y1=v1["x"],v1["y"]; x2,y2=v2["x"],v2["y"]; ar=edge(x0,y0,x1,y1,x2,y2) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(x0,x1,x2))); maxx=min(FBPXW-1,int(max(x0,x1,x2))+1) + miny=max(0,int(min(y0,y1,y2))); maxy=min(H-1,int(max(y0,y1,y2))+1) + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(x1,y1,x2,y2,cx,cy)*inv; w1=edge(x2,y2,x0,y0,cx,cy)*inv; w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + sx=float(px)+0.5 if REF_SAMPLE=="center" else float(px) + sy=float(py)+0.5 if REF_SAMPLE=="center" else float(py) + a0=edge(x1,y1,x2,y2,sx,sy)*inv; a1=edge(x2,y2,x0,y0,sx,sy)*inv; a2=1.0-a0-a1 + S=a0*v0["s"]+a1*v1["s"]+a2*v2["s"]; T=a0*v0["t"]+a1*v1["t"]+a2*v2["t"]; Q=a0*v0["q"]+a1*v1["q"]+a2*v2["q"] + if abs(Q)<1e-12: continue + uf=(S/Q)*logical_tw; vf=(T/Q)*logical_th + tu,tv=(texel_uv(d['state']['clamp'], math.floor(uf), math.floor(vf), logical_tw, logical_th) + if d['state']['prim']['tme'] else (0,0)) + o=py*FBPXW+px; mw=min(w0,w1,w2); interior=1 if mw>0.04 else 0 + if d['state']['prim']['tme']: + col=tex_col(idxlin,palg,tu,tv,logical_tw,logical_th,tex_psm,tex_stride) + else: + vc=[] + for sh in (0,8,16): + c0=(v0['rgba']>>sh)&0xFF; c1=(v1['rgba']>>sh)&0xFF; c2=(v2['rgba']>>sh)&0xFF + vc.append(max(0,min(255,int(a0*c0+a1*c1+a2*c2)))) + col=vc[0]|(vc[1]<<8)|(vc[2]<<16) + if REF_BILINEAR and d['state']['prim']['tme']: + u_next,v_next=texel_uv(d['state']['clamp'], math.floor(uf)+1, math.floor(vf)+1, logical_tw, logical_th) + c00=col + c10=tex_col(idxlin,palg,u_next,tv,logical_tw,logical_th,tex_psm,tex_stride) + c01=tex_col(idxlin,palg,tu,v_next,logical_tw,logical_th,tex_psm,tex_stride) + c11=tex_col(idxlin,palg,u_next,v_next,logical_tw,logical_th,tex_psm,tex_stride) + fu=uf-math.floor(uf); fv=vf-math.floor(vf) + chans=[] + for sh in (0,8,16): + a=((c00>>sh)&255)*(1.0-fu)+((c10>>sh)&255)*fu + b=((c01>>sh)&255)*(1.0-fu)+((c11>>sh)&255)*fu + chans.append(max(0,min(255,int(a*(1.0-fv)+b*fv)))) + col=chans[0]|(chans[1]<<8)|(chans[2]<<16) + if AUTH_COLOR_TFX and d['state']['prim']['tme'] and d['state']['tex0']['tfx']==0: + vc=[] + for sh in (0,8,16): + c0=(v0['rgba']>>sh)&0xFF; c1=(v1['rgba']>>sh)&0xFF; c2=(v2['rgba']>>sh)&0xFF + vc.append(max(0,min(255,int(a0*c0+a1*c1+a2*c2)))) + tc=[col&0xFF,(col>>8)&0xFF,(col>>16)&0xFF] + mc=[min(255,(tc[j]*vc[j])>>7) for j in range(3)] + col=mc[0]|(mc[1]<<8)|(mc[2]<<16) + if lastep[o]!=k: nep[o]+=1; lastep[o]=k # distinct epochs covering this pixel + refmap[o]=(1<<31)|(interior<<30)|((k&0x7)<<24)|((tu&0x1FF)<<9)|(tv&0x1FF) # LAST epoch wins (paint order) + if emit_perep: + perep[k][o]=(1<<31)|(interior<<30)|((tu&0x1FF)<<9)|(tv&0x1FF) + refpix[o]=(col&0xFF,(col>>8)&0xFF,(col>>16)&0xFF) + for o in range(FB_WORDS): + if nep[o]>=2: refmap[o]|=(1<<28) # multi-epoch (>=2 distinct) pixel + multi_px=sum(1 for o in range(FB_WORDS) if refmap[o]&(1<<28)) + covered=sum(1 for w in refmap if w>>31) + print(f"[Ch356] independent composed reference: {covered} covered px, {multi_px} multi-epoch (>=2) px") + + wmem(f"{PFX}_refmap.mem", refmap, f"{CH} LOCAL composed per-pixel cov|int|multi|owner_epoch|tu|tv reference. gitignored.") + if emit_perep: + for k in range(N): wmem(f"{PFX}{k}_refmap.mem", perep[k], f"{CH} LOCAL epoch {k} per-pixel reference. gitignored.") + else: + print(f"[{CH}] skipped {N} per-epoch full-frame refmaps; composed reference remains emitted") + + # Bootlet preload is the legacy path. Runtime mode leaves the CLUT + # table empty and emits CLD=0 lists; the HPS scheduler stages each + # palette before its GO instead, removing the bootlet palette cap. + RAM_QWORDS=512; pay=[]; _seen_cbp=set() + for d in (() if RUNTIME_CLUT else (x for x in descs if not (x['cbp_reloc'] in _seen_cbp or _seen_cbp.add(x['cbp_reloc'])))): + clutw=[int.from_bytes(d['clut'][i*4:i*4+4],'little') for i in range(256)] + pay.append(bake.giftag(1,0,0,4,int('E'*4,16))) + pay.append(bake.aplusd(bake.R_BITBLTBUF, bake.bitbltbuf_pack(d['cbp_reloc'],1,0x00))) + pay.append(bake.aplusd(bake.R_TRXPOS, bake.trxpos_pack(0,0))) + pay.append(bake.aplusd(bake.R_TRXREG, bake.trxreg_pack(256,1))) + pay.append(bake.aplusd(bake.R_TRXDIR, bake.trxdir_pack(0))) + pay.append(bake.giftag(256//4,1,2,0,0)) + for q in range(256//4): + word=0 + for lane in range(4): word|=(clutw[q*4+lane]&0xFFFFFFFF)<<(32*lane) + pay.append(word) + qwc=len(pay); disp_hi=((H-1)<<12)|(FBPXW-1) + with open(os.path.join(DATA,f"payload_{PFX}.mem"),"w") as f: + f.write(f"// {CH} LOCAL {'runtime-CLUT empty' if RUNTIME_CLUT else f'{N}-CLUT preload'} payload (CBPs {[d['cbp_reloc'] for d in descs]}). gitignored. QWC={qwc}.\n") + for _ in range(16): f.write(f"{0:032x}\n") + for x in pay: f.write(f"{x&((1<<128)-1):032x}\n") + for _ in range(RAM_QWORDS-16-qwc): f.write(f"{0:032x}\n") + bake.write_bios_mem(f"bios_{PFX}.mem", bake.build_textured_demo_bootlet_disp(qwc, disp_hi, FBW), + f"{CH} LOCAL {N}-CLUT preload bootlet (QWC={qwc}, DISPLAY1={FBPXW}x{H}). gitignored.") + + # params + epoch descriptor table (for the host + TB) + with open(os.path.join(DATA,f"{PFX}_params.vh"),"w") as f: + f.write(f"// {CH} LOCAL generated params for the scheduler integration TB. gitignored.\n") + for kk,vv in (("FBW",FBW),("FBPXW",FBPXW),("FBH",H),("VRAM_BYTES_P",VRAM_BYTES),("NEW_TBP",NEW_TBP), + ("TEX_VRAM_BASE",TEX_VRAM_BASE),("TEX_BYTES",TW*TH),("N_BEATS",TW*TH//32),("STG_WORDS",STG_WORDS), + ("TW",TW),("TH",TH),("N_EPOCHS",N),("UNION_OX",OX),("UNION_OY",OY)): + f.write(f"localparam int {kk:<14}= {vv};\n") + f.write(f"localparam [29:0] LPDDR_TEX_BASE = 30'h{LPDDR_TEX_BASE:07x};\n") + for d in descs: + f.write(f"localparam int EP{d['k']}_NTRIS = {d['ntris']};\n") + f.write(f"localparam int EP{d['k']}_CBP = {d['cbp_reloc']};\n") + f.write(f"localparam [31:0] EP{d['k']}_CRC = 32'h{d['crc']:08x};\n") + f.write(f"localparam bit EP{d['k']}_REUSE = 1'b{d.get('reuse',0)};\n") + # The shared testbenches include this after declaring their descriptor arrays. Keeping the assignments as + # generated text avoids simulator-dependent function elaboration inside a loop while retaining one source TB. + with open(os.path.join(DATA, f"{PFX}_epoch_table.vh"), "w") as f: + f.write(f"// {CH} LOCAL generated descriptor assignments for the shared-epoch TB. gitignored.\n") + for d in descs: + k = d['k'] + f.write(f"EP_CRC[{k}] = EP{k}_CRC; EP_REC[{k}] = EP{k}_NTRIS; EP_REUSE[{k}] = EP{k}_REUSE;\n") + with open(os.path.join(DATA,f"{PFX}_epochs.txt"),"w") as f: + f.write(f"# {CH} epoch descriptor table ({N} epochs, dump order). CLUT={'runtime HPS staging' if RUNTIME_CLUT else 'bootlet preload'};\n") + f.write(f"# per epoch: upload tex -> LPDDR 0x{LPDDR_TEX_BASE:x}, fill+verify CRC, stream list, GO, fresh drain.\n") + f.write(f"# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the\n") + f.write(f"# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).\n") + f.write(f"META n_epochs {N} fbpxw {FBPXW} fbh {H} fbwords {FBPXW*H} lpddr_tex 0x{LPDDR_TEX_BASE:x} tex_words {TW*TH//4} n_beats {TW*TH//32}\n") + f.write(f"# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32\n") + for d in descs: + pal_file = f"{PFX}{d['pal_k']}_pal.mem" if RUNTIME_CLUT else "-" + pal_sum = sum(d['pal']) & 0xFFFFFFFF if RUNTIME_CLUT else 0 + f.write(f"{d['k']} {d['idx']} {d['tbp']} {d['cbp_reloc']} {PFX}{d['asset_k']}_tex_lpddr.mem 0x{LPDDR_TEX_BASE:x} {d['size']} " + f"0x{d['crc']:08x} feeder_{PFX}{d['k']}.mem {d['nwords']} {d['ntris']} {d.get('reuse',0)} {pal_file} 0x{pal_sum:08x}\n") + try: + from PIL import Image + im=Image.new("RGB",(FBPXW,H)); im.putdata(refpix); im.save(os.path.join(ROOT,"captures","gs","silenthill3","extracted","recon",f"{PFX}_ref.png")) + print(f"[{CH}] wrote {PFX}_ref.png") + except Exception as ex: print("(PIL skipped:", ex, ")") + print(f"[{CH}] emitted {N}-epoch scheduler fixtures -> {DATA}. FB {FBPXW}x{H} stride {STRIDE}; epochs CRCs {[hex(d['crc']) for d in descs]}") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_merge_scheduler_bootlets.py b/tools/gs_merge_scheduler_bootlets.py new file mode 100644 index 0000000..e307eaa --- /dev/null +++ b/tools/gs_merge_scheduler_bootlets.py @@ -0,0 +1,84 @@ +#!/usr/bin/env python3 +"""Build one scheduler bootlet that preloads the distinct CLUTs required by several fixture tags. + +Usage: gs_merge_scheduler_bootlets.py [ ...] +""" +import os +import re +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, DATA) +import bake + +RAM_QWORDS = 512 +HEADER_QWORDS = 16 +FBW = 10 +FBPXW = 640 +FBH = 480 + + +def read_payload(tag): + path = os.path.join(DATA, f"payload_sh3_{tag}.mem") + with open(path) as f: + lines = f.readlines() + header = next((line for line in lines if line.startswith("//")), "") + match = re.search(r"QWC=(\d+)", header) + if not match: + raise ValueError(f"{path}: missing QWC metadata") + cbp_match = re.search(r"CBPs \[([^]]*)\]", header) + if not cbp_match: + raise ValueError(f"{path}: missing CBP metadata") + cbps = [int(x.strip()) for x in cbp_match.group(1).split(",") if x.strip()] + words = [int(line.strip(), 16) for line in lines if line.strip() and not line.startswith("//")] + if len(words) != RAM_QWORDS: + raise ValueError(f"{path}: expected {RAM_QWORDS} qwords, got {len(words)}") + qwc = int(match.group(1)) + if qwc > RAM_QWORDS - HEADER_QWORDS: + raise ValueError(f"{path}: QWC {qwc} exceeds payload capacity") + return qwc, cbps, words[HEADER_QWORDS:HEADER_QWORDS + qwc] + + +def main(argv): + if len(argv) < 4: + print(__doc__.strip()) + return 2 + output_tag, input_tags = argv[1], argv[2:] + active = [] + seen_cbps = set() + for tag in input_tags: + qwc, cbps, words = read_payload(tag) + for cbp in set(cbps): + if cbp in seen_cbps: + raise ValueError(f"duplicate relocated CBP {cbp}: fixture {tag} aliases an earlier input") + seen_cbps.add(cbp) + if len(words) != qwc: + raise ValueError(f"payload word count mismatch for {tag}") + active.extend(words) + if len(active) > RAM_QWORDS - HEADER_QWORDS: + raise ValueError(f"combined QWC {len(active)} exceeds {RAM_QWORDS - HEADER_QWORDS}") + + payload_name = f"payload_sh3_{output_tag}.mem" + bios_name = f"bios_sh3_{output_tag}.mem" + with open(os.path.join(DATA, payload_name), "w") as f: + f.write(f"// combined scheduler CLUT preload tags={input_tags} CBPs={sorted(seen_cbps)} QWC={len(active)}. gitignored.\n") + for _ in range(HEADER_QWORDS): + f.write("00000000000000000000000000000000\n") + for word in active: + f.write(f"{word:032x}\n") + for _ in range(RAM_QWORDS - HEADER_QWORDS - len(active)): + f.write("00000000000000000000000000000000\n") + display1_hi = ((FBH - 1) << 12) | (FBPXW - 1) + bake.write_bios_mem( + bios_name, + bake.build_textured_demo_bootlet_disp(len(active), display1_hi, FBW), + f"combined scheduler CLUT preload tags={input_tags} QWC={len(active)} DISPLAY1={FBPXW}x{FBH}. gitignored.", + ) + print(f"[bootlet] emitted {bios_name} + {payload_name}: QWC={len(active)} CBPs={sorted(seen_cbps)}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_plan_sh3_coverage.py b/tools/gs_plan_sh3_coverage.py new file mode 100755 index 0000000..3f2d963 --- /dev/null +++ b/tools/gs_plan_sh3_coverage.py @@ -0,0 +1,180 @@ +#!/usr/bin/env python3 +"""Plan a chronological, staging-safe SH3 PSMT8 coverage fixture. + +This is the bridge from the draw census to gs_make_sh3_scheduler_fixture.py: +Select supported frame-1 textured draws, reconstruct texture/CLUT +identity in one local-memory replay, and group only consecutive draws whose +complete feeder state and sampled assets are identical. The raw-triangle +word bound is conservative; the generator repeats the exact clipped check. +The default remains the historical opaque-strip plan. Explicit switches can +also admit authentic ABE draws, triangle lists, and sprites for later fidelity +chapters. +""" +import argparse, hashlib, json, os, shlex, sys + +HERE=os.path.dirname(os.path.abspath(__file__)) +ROOT=os.path.normpath(os.path.join(HERE,"..")) +sys.path.insert(0,HERE) +import gs_make_sh3_multidraw_fixture as MD +import gs_sh3_draw_census as C +import gs_sh3_recon as RC +import gs_texture_residency as R + +STG_WORDS=2048 +HEADER_WORDS=8 + +def normalized_state(e): + s={k:e["state"].get(k) for k in ("prim","tex0","test","zbuf","clamp","alpha","texa","fogcol")} + s=json.loads(json.dumps(s,sort_keys=True)) + t=s["tex0"]; clamp=s["clamp"] + wms=clamp&3; wmt=(clamp>>2)&3 + minu=(clamp>>4)&0x3ff; maxu=(clamp>>14)&0x3ff + minv=(clamp>>24)&0x3ff; maxv=(clamp>>34)&0x3ff + if wms==2 and minu==0 and maxu==t["tw"]-1: clamp=(clamp&~3)|1 + if wmt==2 and minv==0 and maxv==t["th"]-1: clamp=(clamp&~12)|4 + s["clamp"]=clamp + return json.dumps(s,sort_keys=True,separators=(",",":")) + +def main(): + ap=argparse.ArgumentParser() + ap.add_argument("dump",nargs="?") + ap.add_argument("--census",default="/tmp/sh3_census.json") + ap.add_argument("--frame",type=int,default=1, + help="capture frame to select (default: 1)") + ap.add_argument("--tag",default="zsrt139f1") + ap.add_argument("--out",default="/tmp/sh3_opaque_coverage_plan.json") + ap.add_argument("--include-abe",action="store_true") + ap.add_argument("--untextured-only",action="store_true", + help="select only TME=0 draws and emit the opt-in untextured feeder path") + ap.add_argument("--prim-types",default="4", + help="comma-separated GS primitive types (3=triangles, 4=strip, 5=fan, 6=sprite)") + ap.add_argument("--psms",default="0x13", + help="comma-separated texture PSMs (0x00=PSMCT32, 0x13=PSMT8, 0x14=PSMT4)") + ap.add_argument("--min-idx",type=int) + ap.add_argument("--max-idx",type=int) + ap.add_argument("--native-fidelity",action="store_true", + help="emit the proven fog, bilinear, pixel-center, and native-12.4 flags") + ap.add_argument("--fast-fit-scale",action="store_true", + help="choose the largest representable STQ scale instead of optimizing per-triangle UV error") + ap.add_argument("--capacity-epoch-pixels",type=int,default=14500, + help="software coverage cap used by the 16-row capacity splitter") + ap.add_argument("--chapter",default="Ch409") + ns=ap.parse_args() + dump=ns.dump + if not dump: + import glob + hits=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not hits: sys.exit("no 224139 dump found") + dump=hits[0] + + collected=R.collect(dump,0) + if os.path.exists(ns.census) and not ns.untextured_only: + census=json.load(open(ns.census)) + else: + census,_,_=C.census(dump,frame_filter=ns.frame,collected=collected, + include_untextured=ns.untextured_only) + prim_types={int(x) for x in ns.prim_types.split(",")} + if not prim_types or not prim_types.issubset({3,4,5,6}): + sys.exit(f"--prim-types must be a nonempty subset of 3,4,5,6; got {sorted(prim_types)}") + psms={int(x,0) for x in ns.psms.split(",")} + if not psms or not psms.issubset({0x00,0x13,0x14}): + sys.exit(f"--psms must be a nonempty subset of 0x00,0x13,0x14; got {sorted(psms)}") + def supported_texture(d): + if ns.untextured_only: + return True + t=d["tex0"] + return (t["psm"] in psms and + ((t["psm"]==0x00 and t["tw"]==64 and t["th"]==64 and t["tbw"]==1) + or (t["psm"]==0x13 and t["tw"] in (128,256,512) and t["th"] in (128,256,512)) + or (t["psm"]==0x14 and t["tw"]==512 and t["th"]==1024))) + selected=sorted(d["first_idx"] for d in census + if d["frame"]==ns.frame and d.get("tex_resident") + and d["prim"]["type"] in prim_types + and d["prim"]["tme"]==(0 if ns.untextured_only else 1) + and (ns.untextured_only or d["prim"]["fst"]==0) + and d["prim"]["ctxt"]==0 + and (ns.include_abe or d["prim"]["abe"]==0) + and (ns.min_idx is None or d["first_idx"]>=ns.min_idx) + and (ns.max_idx is None or d["first_idx"]<=ns.max_idx) + and supported_texture(d)) + got,_=MD.load_draws(dump,selected,collected=collected, + allow_untextured=ns.untextured_only) + missing=sorted(set(selected)-set(got)) + if missing: sys.exit(f"capture lost selected draws: {missing[:10]}") + + rows=[] + for idx,mem in RC.iter_localmem_at(dump,selected,collected=collected): + e=got[idx]; t=e["state"]["tex0"] + if ns.untextured_only: + tex=bytes(512*512); clut=bytes(1024) + elif t["psm"]==0x00: + tex=b"".join(mem.read_ct32_word(t["tbp"],t["tbw"],x,y).to_bytes(4,"little") + for y in range(t["th"]) for x in range(t["tw"])) + elif t["psm"]==0x13: + tex=bytes(mem.read_psmt8(t["tbp"],t["tbw"],512,512)) + else: + unpacked=mem.read_psmt4(t["tbp"],t["tbw"],t["tw"],t["th"]) + tex=bytes((unpacked[n]&15)|((unpacked[n+1]&15)<<4) + for n in range(0,len(unpacked),2)) + if not ns.untextured_only: + clut=(b"" if t["psm"]==0x00 else + bytes(mem.m[t["cbp"]*256:t["cbp"]*256+1024])) + asset=hashlib.sha256(tex+clut).hexdigest() + ptype=e["state"]["prim"]["type"] + if ptype==3: + ntri=len(e["verts"])//3 + elif ptype==4: + ntri=max(0,len(e["verts"])-2) + elif ptype==5: + ntri=max(0,len(e["verts"])-2) + else: + # One GS sprite is a pair of opposing corners and expands into + # two independent triangles in the scheduler fixture. + ntri=len(e["verts"]) + words=HEADER_WORDS+9*ntri + if words>STG_WORDS: + sys.exit(f"idx{idx}: single draw raw bound {words}>{STG_WORDS}") + rows.append(dict(idx=idx,ntri=ntri,state=normalized_state(e),asset=asset)) + + groups=[]; cur=[]; cur_tris=0; cur_key=None + for r in rows: + key=(r["state"],r["asset"]) + if cur and (key!=cur_key or HEADER_WORDS+9*(cur_tris+r["ntri"])>STG_WORDS): + groups.append(cur); cur=[]; cur_tris=0 + cur.append(r); cur_tris+=r["ntri"]; cur_key=key + if cur: groups.append(cur) + + idxarg=",".join(str(r["idx"]) for r in rows) + grouparg=",".join(str(len(g)) for g in groups) + cmd=["python3","tools/gs_make_sh3_scheduler_fixture.py",dump, + "--draw-list",idxarg,"--group-sizes",grouparg,"--authz","--fb640", + "--tag",ns.tag,"--runtime-clut","--allow-abe","--auth-color-tfx", + "--emit-clamp-header","--normalize-full-region-clamp","--clip-fb-guardband","--auth-scissor-clip", + "--capacity-epochs",str(ns.capacity_epoch_pixels), + "--pscale",("1" if ns.untextured_only else "auto"), + "--skip-mixed-q-tris"] + if ns.fast_fit_scale: + cmd += ["--fast-fit-scale"] + if ns.untextured_only: + cmd += ["--allow-untextured","--coalesce-solid-sprites","--half-open-sprites"] + if ns.native_fidelity: + cmd += ["--auth-fog-black-fold","--ref-bilinear","--ref-sample","center","--subpixel-xy"] + cmd += ["--chapter",ns.chapter,"--emit"] + out=dict(dump=dump,tag=ns.tag,n_draws=len(rows),n_groups=len(groups), + max_group_draws=max(map(len,groups)),max_group_raw_words=max(HEADER_WORDS+9*sum(r["ntri"] for r in g) for g in groups), + include_abe=ns.include_abe,prim_types=sorted(prim_types),psms=sorted(psms), + untextured_only=ns.untextured_only, + frame=ns.frame, + min_idx=ns.min_idx,max_idx=ns.max_idx, + native_fidelity=ns.native_fidelity, + capacity_epoch_pixels=ns.capacity_epoch_pixels, + draw_ids=[r["idx"] for r in rows],group_sizes=[len(g) for g in groups],command=cmd) + with open(ns.out,"w") as f: json.dump(out,f,indent=2); f.write("\n") + mode="opaque" if not ns.include_abe else "opaque+ABE" + print(f"[{ns.chapter}] {len(rows)} {mode} indexed PSM {sorted(hex(x) for x in psms)} type {sorted(prim_types)} draws -> {len(groups)} exact-state/asset groups") + print(f"[{ns.chapter}] max group {out['max_group_draws']} draws; conservative max {out['max_group_raw_words']}/{STG_WORDS} words") + print(f"[{ns.chapter}] plan {ns.out}") + print(shlex.join(cmd)) + +if __name__=="__main__": + main() diff --git a/tools/gs_sh3_draw_census.py b/tools/gs_sh3_draw_census.py index fbe126d..956e0e3 100644 --- a/tools/gs_sh3_draw_census.py +++ b/tools/gs_sh3_draw_census.py @@ -29,10 +29,10 @@ def f32(bits): PRIMT = {0:"POINT",1:"LINE",2:"LINE_STRIP",3:"TRIANGLE",4:"TRI_STRIP",5:"TRI_FAN",6:"SPRITE",7:"INVALID"} VERTS_PER = {0:1,1:2,2:2,3:3,4:3,5:3,6:2,7:0} # min verts to kick a primitive -def census(dump, frame_filter=None, min_prims=1, collected=None): +def census(dump, frame_filter=None, min_prims=1, collected=None, include_untextured=False): d, h, events, uploads, runs, vram = collected if collected is not None else R.collect(dump, 0) # live GS state we latch as we walk - prim = dict(type=7, tme=0, fst=0, abe=0, ctxt=0) + prim = dict(type=7, tme=0, fge=0, fst=0, abe=0, ctxt=0) tex0 = {1:None, 2:None} ofx = {1:0.0, 2:0.0}; ofy = {1:0.0, 2:0.0} cur_st = (0.0, 0.0, 1.0) # S, T, Q @@ -72,7 +72,8 @@ def census(dump, frame_filter=None, min_prims=1, collected=None): r, v = e.reg, e.value if r == "PRIM": close() - prim = dict(type=v&7, tme=(v>>4)&1, fst=(v>>8)&1, abe=(v>>6)&1, ctxt=(v>>9)&1) + prim = dict(type=v&7, tme=(v>>4)&1, fge=(v>>5)&1, + fst=(v>>8)&1, abe=(v>>6)&1, ctxt=(v>>9)&1) vqueue = [] elif r == "PRMODE": # PRIM-less prim mode (rare); ignore topology change w/o reset pass @@ -94,13 +95,14 @@ def census(dump, frame_filter=None, min_prims=1, collected=None): z = (v>>32) & 0xFFFFFF else: z = (v>>32) & 0xFFFFFFFF - if not prim["tme"]: # only textured draws are Ch349 candidates + fogv = ((v>>56) & 0xFF) if r in ("XYZF2","XYZF3") else 255 + if not prim["tme"] and not include_untextured: continue if newkey() is None: continue if cur is None or cur["key"] != newkey(): close(); open_draw() - vtx = dict(x=x, y=y, z=z, s=cur_st[0], t=cur_st[1], q=cur_st[2], rgba=cur_rgba) + vtx = dict(x=x, y=y, z=z, fog=fogv, s=cur_st[0], t=cur_st[1], q=cur_st[2], rgba=cur_rgba) cur["verts"].append(vtx); cur["nvert"] += 1 cur["nprim"] += 1 # each kick completes one primitive in fan/strip/list cur["xmin"]=min(cur["xmin"],x); cur["xmax"]=max(cur["xmax"],x) @@ -119,9 +121,10 @@ def census(dump, frame_filter=None, min_prims=1, collected=None): if dr["nprim"] < min_prims: continue if frame_filter is not None and dr["frame"] != frame_filter: continue t0 = dr["tex0"] - snap = R.snapshot_present(vram, t0["tbp"], nb=512) + snap = (True if not dr["prim"]["tme"] else + R.snapshot_present(vram, t0["tbp"], nb=512)) clut = None - if t0["psm"] in R.INDEXED_PSMS: + if dr["prim"]["tme"] and t0["psm"] in R.INDEXED_PSMS: csnap = R.snapshot_present(vram, t0["cbp"], nb=1024, min_nz=64) clut = dict(cbp=t0["cbp"], cpsm=t0["cpsm"], cld=t0["cld"], resident=bool(csnap), distinct=(csnap["distinct"] if csnap else None)) @@ -156,6 +159,10 @@ def _score(dr): rectangle in perspective. Reward on-screen containment + sampled-texel span, NOT guard-band area.""" t0 = dr["tex0"] s = 0.0 + if not dr["prim"]["tme"]: + return (100.0 * dr["onscreen_frac"] + + min(dr["onscreen_area"]/200.0,120.0) + + min(dr["nprim"],48)) if not dr["tex_resident"]: return -1.0 # must be reconstructable if t0["psm"] in R.INDEXED_PSMS: if dr["clut"] and dr["clut"]["resident"]: s += 40.0 # indexed + resident CLUT == the real SH3 path @@ -204,7 +211,8 @@ def main(argv): def opt(n, dv=None): return argv[argv.index(n)+1] if n in argv else dv top = int(opt("--top","25")); minp = int(opt("--min-prims","1")) ff = int(opt("--frame")) if "--frame" in argv else None - draws, h, vram = census(dump, frame_filter=ff, min_prims=minp) + draws, h, vram = census(dump, frame_filter=ff, min_prims=minp, + include_untextured="--include-untextured" in argv) print(f"# Ch349 draw census: {os.path.basename(dump)}") print(f"# textured draws (>= {minp} prim): {len(draws)} vram_snapshot={'present' if vram is not None else 'ABSENT'}") cand = [d for d in draws if d["score"] > 0] diff --git a/tools/gs_sh3_frame_ref.py b/tools/gs_sh3_frame_ref.py index 8a91ba8..c92c56e 100644 --- a/tools/gs_sh3_frame_ref.py +++ b/tools/gs_sh3_frame_ref.py @@ -53,6 +53,10 @@ def main(argv): def opt(n, dv=None): return argv[argv.index(n)+1] if n in argv else dv frame = int(opt("--frame","1")); maxd = int(opt("--max-draws","100000")) min_area = float(opt("--min-area","0")) + no_z = ("--no-z" in argv) # diagnostic: paint in submission order, last draw wins (bypass z-buffer) + dofog = ("--fog" in argv) # apply authentic GS per-vertex fog (FOGCOL=0 black => color*F/256) on FGE draws + only_tbp = int(opt("--only-tbp","-1")) # diagnostic: render only draws bound to this texture base + only_idx = int(opt("--only-idx","-1")) # diagnostic: render only the draw with this first_idx outdir = opt("--out", os.path.join(os.path.dirname(os.path.dirname(os.path.abspath(__file__))), "captures","gs","silenthill3","extracted","recon")) os.makedirs(outdir, exist_ok=True) @@ -62,7 +66,9 @@ def main(argv): d, h, events, uploads, runs, vram = collected draws, _, _ = C.census(dump, frame_filter=frame, min_prims=1, collected=collected) draws = [dr for dr in draws if dr["prim"]["tme"] and dr["tex0"]["psm"] in (0x13,0x00) - and dr["onscreen_area"] >= min_area] + and dr["onscreen_area"] >= min_area + and (only_tbp < 0 or dr["tex0"]["tbp"] == only_tbp) + and (only_idx < 0 or dr["first_idx"] == only_idx)] draws.sort(key=lambda x: x["first_idx"]) print(f"[frameref] frame {frame}: {len(draws)} textured (PSMT8/CT32) draws, min_area={min_area}; " f"replaying uploads incrementally") @@ -97,6 +103,7 @@ def main(argv): if kind is None: continue tw, th = t0["tw"], t0["th"] verts = dr["verts"]; pt = dr["prim"]["type"] + draw_fge = dofog and bool(dr["prim"].get("fge",0)) def tri(i0,i1,i2): nonlocal painted_total v0,v1,v2 = verts[i0],verts[i1],verts[i2] @@ -120,8 +127,14 @@ def main(argv): u=(S/Q)*tw; vv=(T/Q)*th z=int(b0*v0["z"]+b1*v1["z"]+b2*v2["z"]) o=base+px - if z>=zb[o]: - zb[o]=z; fb[o]=sample(tex,pal,kind,tw,th,u,vv)+(255,); painted_total+=1 + if no_z or z>=zb[o]: + rgb=sample(tex,pal,kind,tw,th,u,vv) + if draw_fge: + F=int(b0*v0["fog"]+b1*v1["fog"]+b2*v2["fog"]) # affine per-vertex fog; FOGCOL=0 + if F<0: F=0 + elif F>255: F=255 + rgb=((rgb[0]*F)>>8, (rgb[1]*F)>>8, (rgb[2]*F)>>8) + zb[o]=z; fb[o]=rgb+(255,); painted_total+=1 if pt==4: for i in range(2,len(verts)): tri(i-2,i-1,i) elif pt==5: diff --git a/tools/gs_sh3_recon.py b/tools/gs_sh3_recon.py index bd90b18..cd8af56 100644 --- a/tools/gs_sh3_recon.py +++ b/tools/gs_sh3_recon.py @@ -41,6 +41,31 @@ def build_localmem_to(dump, draw_idx): replayed.append(u) return mem, replayed, uploads, events, vram +def iter_localmem_at(dump, draw_idxs, collected=None): + """Yield one mutable LocalMem at each ascending draw index in one replay. + + Callers must consume/copy the texture and CLUT bytes before advancing the + iterator. This is equivalent to repeated build_localmem_to() calls but + parses the dump once and applies each upload once, which makes full-frame + fixture generation practical. + """ + targets=list(draw_idxs) + if targets != sorted(targets) or len(targets) != len(set(targets)): + raise ValueError("draw_idxs must be unique and ascending") + d, h, events, uploads, runs, vram = collected if collected is not None else R.collect(dump,0) + if vram is None: + return + mem=LM.LocalMem(vram); up=0 + for draw_idx in targets: + while up < len(uploads) and uploads[up]["idx"] < draw_idx: + u=uploads[up]; up+=1 + if u["dpsm"] != 0x00: + continue + off,end=u["blob_range"]; blob=d[off:end] + words=[int.from_bytes(blob[i:i+4],"little") for i in range(0,len(blob)//4*4,4)] + mem.write_image_ct32(u["dbp"],u["dbw"],u["dx"],u["dy"],u["w"],u["h"],words) + yield draw_idx,mem + def read_clut32(mem, cbp, order="grid"): """Read a 256-entry PSMCT32 CLUT from the modelled VRAM. 'grid' = read as a 16x16 CT32 surface based at cbp (dbw=1) — the layout a CSM1 8-bit palette occupies; 'linear' = raw contiguous i*4 from cbp*256. diff --git a/tools/gs_sh3_z_census.py b/tools/gs_sh3_z_census.py new file mode 100644 index 0000000..fc180b1 --- /dev/null +++ b/tools/gs_sh3_z_census.py @@ -0,0 +1,164 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch357 follow-up: Z-usage CENSUS (read-only; no RTL, no board). + +Codex: "Census Z usage afterward; no speculative Z work." Measures whether the scheduler's draws actually rely on depth +testing, and whether cross-draw Z persistence would change the composite vs the paint-order we already ship. + +Reports, from the AUTHENTIC dump (NOT the flattened-Z fixtures): + * per target epoch: TEST.ZTE / TEST.ZTST, ZBUF.ZMSK / ZBP / PSM, and the real per-vertex Z range. + * scene-wide tally: for every textured draw kick, the active (ZTE, ZTST, ZMSK) — how much of the scene uses real Z. + * if any target epoch does REAL depth testing (ZTE=1, ZTST in {GEQUAL,GREATER}, ZMSK=0): a pairwise screen-overlap + + depth-order analysis — at pixels where a later draw overlaps an earlier one, does Z ever REJECT the later fragment + (i.e. would Z reorder the composite away from paint-order)? + * verdict: is cross-draw Z NEEDED for these draws, or is paint-order sufficient? + +Usage: gs_sh3_z_census.py [dump.gs.zst] [--draw-list i0,i1,i2] +""" +import sys, os +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +import gs_texture_residency as R # R.collect walks the GS event stream (same as the fixture tooling) +import gs_make_sh3_multidraw_fixture as MD + +DEFAULT_DRAWS=[11671, 19562, 89761] +ZTST_NAME={0:"NEVER",1:"ALWAYS",2:"GEQUAL",3:"GREATER"} +ZPSM_NAME={0x00:"PSMZ32",0x01:"PSMZ24",0x02:"PSMZ16",0x0A:"PSMZ16S"} + +def dec_test(t): return dict(ate=t&1, atst=(t>>1)&7, zte=(t>>16)&1, ztst=(t>>17)&3) +def dec_zbuf(z): return dict(zbp=z&0x1FF, psm=(z>>24)&0xF, zmsk=(z>>32)&1) + +def real_z(test,zbuf): + """A draw does REAL depth rejection iff Z-test is on, the method can actually reject (GEQUAL/GREATER), and Z is + being written (ZMSK=0). ZTE=0 or ZTST=ALWAYS/NEVER, or ZMSK=1 -> Z cannot reorder overlapping draws.""" + te=dec_test(test); zb=dec_zbuf(zbuf) + return te["zte"]==1 and te["ztst"] in (2,3) and zb["zmsk"]==0 + +def main(argv): + a=argv[1:]; dump=a[0] if a and not a[0].startswith("--") else None + idxs=[int(x) for x in a[a.index("--draw-list")+1].split(",")] if "--draw-list" in a else list(DEFAULT_DRAWS) + if dump is None: + import glob; c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") + dump=c[0] + print(f"[Zcensus] dump={os.path.basename(dump)} target epochs={idxs}") + + # ---- scene-wide tally: active (ZTE,ZTST,ZMSK) at every textured draw kick ---- + d,h,events,uploads,runs,vram = R.collect(dump, 0) + st=dict(PRIM=None, TEST_1=None, TEST_2=None, ZBUF_1=None, ZBUF_2=None) + prim=dict(tme=0,ctxt=0); cur_key=None + from collections import Counter + tally=Counter(); tally_f1=Counter(); nkick=0; nkick_f1=0; frame=0 + def ctx(): return 1 if prim["ctxt"]==0 else 2 + for e in events: + if e.kind=="FRAME_BOUNDARY": frame=e.frame+1; continue + if e.kind!="GSREG": continue + frame=e.frame; r,v=e.reg,e.value + if r=="PRIM": prim=dict(tme=(v>>4)&1, ctxt=(v>>9)&1); cur_key=None + elif r in ("TEST_1","TEST_2","ZBUF_1","ZBUF_2"): st[r]=v + elif r in ("XYZF2","XYZ2","XYZF3","XYZ3"): + if not prim["tme"]: continue + c=ctx(); test=st["TEST_%d"%c]; zbuf=st["ZBUF_%d"%c] + if test is None or zbuf is None: continue + # count ONE record per draw run (state latched at first kick of the run) + k=(id(e),) # unused; we key on run transitions via cur_key below + if cur_key is None: + te=dec_test(test); zb=dec_zbuf(zbuf) + key=(te["zte"], te["ztst"], zb["zmsk"]) + tally[key]+=1; nkick+=1 + if frame==1: tally_f1[key]+=1; nkick_f1+=1 + cur_key=key + def fmt_tally(t,n): + out=[] + for (zte,ztst,zmsk),c in sorted(t.items(), key=lambda kv:-kv[1]): + lbl = "Z-OFF" if zte==0 else f"ZTE zt={ZTST_NAME[ztst]} zmsk={zmsk}" + real = "REAL-DEPTH" if (zte==1 and ztst in (2,3) and zmsk==0) else "no-reorder" + out.append(f" {c:5d} ({100.0*c/max(n,1):4.1f}%) {lbl:24s} -> {real}") + return "\n".join(out) + print(f"\n[Zcensus] SCENE-WIDE draw-run tally (all frames, {nkick} runs):") + print(fmt_tally(tally,nkick)) + print(f"\n[Zcensus] frame f1 only ({nkick_f1} runs):") + print(fmt_tally(tally_f1,nkick_f1)) + + # ---- per-target-epoch detail ---- + got,_=MD.load_draws(dump, idxs) + for i in idxs: + if i not in got: sys.exit(f"[Zcensus] FAIL: idx{i} not found as a textured draw") + eps=[got[i] for i in idxs] + print(f"\n[Zcensus] TARGET epochs (authentic depth state + per-vertex Z):") + print(f" {'idx':>7} {'ZTE':>3} {'ZTST':>8} {'ZMSK':>4} {'ZBP':>4} {'ZPSM':>8} {'z_min':>10} {'z_max':>10} {'z_span':>8} real-depth?") + any_real=False + for e in eps: + te=dec_test(e["state"]["test"]); zb=dec_zbuf(e["state"]["zbuf"]) + zs=[v["z"] for v in e["verts"]]; zmin=min(zs); zmax=max(zs) + rz = real_z(e["state"]["test"], e["state"]["zbuf"]); any_real|=rz + print(f" {e['first_idx']:>7} {te['zte']:>3} {ZTST_NAME[te['ztst']]:>8} {zb['zmsk']:>4} {zb['zbp']:>4} " + f"{ZPSM_NAME.get(zb['psm'],hex(zb['psm'])):>8} {zmin:>10} {zmax:>10} {zmax-zmin:>8} {'YES' if rz else 'no'}") + + # ---- verdict ---- + print() + if not any_real: + # explain WHY paint-order is exactly the hardware behaviour for these draws + reasons=set() + for e in eps: + te=dec_test(e["state"]["test"]); zb=dec_zbuf(e["state"]["zbuf"]) + if te["zte"]==0: reasons.add("ZTE=0 (Z-test disabled)") + elif te["ztst"]==1: reasons.add("ZTST=ALWAYS (test never rejects)") + elif te["ztst"]==0: reasons.add("ZTST=NEVER") + if zb["zmsk"]==1: reasons.add("ZMSK=1 (Z buffer read-only, no depth written)") + print(f"[Zcensus] VERDICT: cross-draw Z is NOT needed for these draws — {', '.join(sorted(reasons))}.") + print(f"[Zcensus] The GS applies no depth rejection here, so paint-order (dump order) IS the hardware result.") + print(f"[Zcensus] Recommendation (matches Codex 'no speculative Z'): do NOT add Z for this scheduler scene.") + return 0 + + # real depth present -> pairwise screen-overlap + depth-order analysis (does Z reorder vs paint-order?) + print(f"[Zcensus] REAL depth testing present -> checking whether Z would REORDER the composite vs paint-order...") + edge=MD.edge + def raster_z(e): + """per-pixel {(x,y): z_interp} for a draw, using its authentic vertex Z (barycentric).""" + cov={} + fv=e["verts"] + for i in range(2,len(fv)): + v0,v1,v2=fv[i-2],fv[i-1],fv[i] + ar=edge(v0["x"],v0["y"],v1["x"],v1["y"],v2["x"],v2["y"]) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=int(min(v0["x"],v1["x"],v2["x"])); maxx=int(max(v0["x"],v1["x"],v2["x"]))+1 + miny=int(min(v0["y"],v1["y"],v2["y"])); maxy=int(max(v0["y"],v1["y"],v2["y"]))+1 + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(v1["x"],v1["y"],v2["x"],v2["y"],cx,cy)*inv + w1=edge(v2["x"],v2["y"],v0["x"],v0["y"],cx,cy)*inv + w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + z=w0*v0["z"]+w1*v1["z"]+w2*v2["z"] + cov[(px,py)]=z # last tri wins within a draw (fine for a coverage/Z sample) + return cov + zmaps=[raster_z(e) for e in eps] + reorder_total=0 + for bi in range(len(eps)): + for ai in range(bi): # A earlier (ai= (or >) zA. If it would be REJECTED + # (zB < zA) then Z keeps A -> differs from paint-order (which always takes B). + if zb < A[p]: diff+=1 + reorder_total+=diff + print(f"[Zcensus] pair A=idx{eps[ai]['first_idx']} over-drawn by B=idx{eps[bi]['first_idx']}: " + f"overlap {ov}px, Z-would-reject-B {diff}px ({100.0*diff/max(ov,1):.2f}% of overlap)") + print() + if reorder_total==0: + print(f"[Zcensus] VERDICT: real Z state present, but Z would reject the later draw at 0 overlapping pixels -> the " + f"depth order MATCHES paint-order for these draws. Cross-draw Z would NOT change the composite.") + print(f"[Zcensus] Recommendation: paint-order is sufficient for THIS scene; no Z needed (revisit only if a chosen " + f"scene shows reorder>0).") + else: + print(f"[Zcensus] VERDICT: Z WOULD reorder the composite at ~{reorder_total} pixels -> cross-draw Z IS needed to " + f"match the hardware for these draws. This justifies (non-speculative) Z work as the next rung.") + print(f"[Zcensus] CAVEAT: the exact px count uses a RAW vertex-Z compare; the precise value depends on the " + f"PSMZ16S quantization this census does not model. The ORDERING (near vs far cluster) is robust to that.") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_sh3_z_oracle.py b/tools/gs_sh3_z_oracle.py new file mode 100644 index 0000000..ec1e62b --- /dev/null +++ b/tools/gs_sh3_z_oracle.py @@ -0,0 +1,166 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch357 (re-scoped): PSMZ16S-accurate persistent-Z software ORACLE at the 384x381 scheduler geometry. + +Codex pre-RTL gate: build a PSMZ16S-accurate oracle (authentic per-vertex Z interpolation, quantization/storage, GEQUAL, +ZTE, ZMSK), replace constant-Z flattening with authentic XYZ2 Z, and produce an expected reject/owner map quantifying how +the Z-tested framebuffer must differ from paint order. + +MODEL (empirically grounded — see gs_sh3_z_census.py): + * geometry: the EXISTING Ch356 scheduler union FB, 384x381 (OX,OY union origin), draws translated into it. + * Z is interpolated LINEARLY in screen space (GS Z is screen-linear, NOT perspective-corrected). + * PSMZ16S quantization: Zq = (24-bit vertex Z) >> 8 -> the high 16 bits (the whole scene uses the full 24-bit range; + >>8 maps it onto 16 bits coherently; & 0xFFFF would wrap a surface). The signed "S" bias is order-preserving, so the + GEQUAL reject/owner outcome is invariant to it. + * shared PERSISTENT 16-bit Z buffer across ALL 3 epochs (cleared once to 0 = farthest). Per fragment: + ZTE=1: pass iff Zq >= zbuf[px] (GEQUAL, larger Z = nearer on PS2). + on pass: write owner=epoch; ZMSK=0 -> zbuf[px]=Zq. + * paint-order (what we ship today) = same coverage but ALWAYS overwrite (no Z test). + +Outputs (to sim/data/top_psmct32_raster_demo/, LOCAL/gitignored): + * sh3_zsched_zowner.mem — per pixel: [31]cov [30]rejected-vs-paint [26:24]z_owner_epoch [23:8]zq16 [ ... ] + * sh3_zsched_reject.mem — per pixel: paint_owner vs z_owner diff mask (the far-late rejects) + * a quantified report: covered px, pixels where Z rejects the paint-order winner, per-epoch owned counts (paint vs Z). + +Usage: gs_sh3_z_oracle.py [dump.gs.zst] [--draw-list i0,i1,i2] [--emit] +""" +import sys, os +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") +import gs_sh3_recon as RC +import gs_make_sh3_multidraw_fixture as MD # load_draws (verts incl z) + edge + +DEFAULT_DRAWS=[11671, 19562, 89761] + +# PSMZ16S 24/32-bit -> 16-bit reduction. NOT yet authoritatively pinned (Codex precondition): candidate hardware models +# give DIFFERENT reject maps, so the oracle is parameterized until ground-truth (PCSX2 dump replay) decides. +# shift8 : Zq = Z >> 8 (high 16 of the scene's 24-bit range; coherent, no wrap) +# mask16 : Zq = Z & 0xFFFF (low 16 — what PCSX2 WritePixel16 stores; WRAPS a 24-bit surface) +# clamp16: Zq = min(Z, 0xFFFF) (near draws collapse to 0xFFFF) +def zquant(z, model): + z=int(z) + if model=="mask16": return z & 0xFFFF + if model=="clamp16": return 0xFFFF if z>0xFFFF else (0 if z<0 else z) + q = z >> 8 # shift8 (default) + return 0xFFFF if q>0xFFFF else (0 if q<0 else q) + +def bbox(dr): + xs=[v["x"] for v in dr["verts"]]; ys=[v["y"] for v in dr["verts"]]; return (min(xs),min(ys),max(xs),max(ys)) + +def main(argv): + a=argv[1:]; dump=a[0] if a and not a[0].startswith("--") else None + idxs=[int(x) for x in a[a.index("--draw-list")+1].split(",")] if "--draw-list" in a else list(DEFAULT_DRAWS) + ZMODEL = a[a.index("--zmodel")+1] if "--zmodel" in a else "clamp16" + # KNOWN VECTORS pinned against the PCSX2 SOFTWARE RASTER path (authoritative; NOT the bare memory write): + # GSLocalMemory.cpp:199 PSMZ16S -> PSM_FMT_16 + # GSRendererSW.cpp:1439 z_max = 0xffffffff >> (fmt*8) = 0xFFFF + # GSDrawScanline…:1129 source_z = CLAMP(interpolated_z, z_max) ("Clamp Z to ZPSM_FMT_MAX") + # GSDrawScanline…:1157 dest_z = stored_z & 0xFFFF ; pass = source_z >= dest_z (GEQUAL) + # => the model is CLAMP16 (min with 0xFFFF), NOT mask16. WritePixel16((u16)c) is only the final store, after the clamp. + # The "S" in PSMZ16S = swizzled STORAGE layout, not signed depth (Codex) — address swizzle only, not the value reduction. + for zin,exp in ((0x00FED407,0xFFFF),(0x00015534,0xFFFF),(0x0000B2C2,0xB2C2),(0xFFFFFFFF,0xFFFF),(0x00008000,0x8000),(0,0)): + assert zquant(zin,"clamp16")==exp, f"clamp16 vector fail 0x{zin:x}->0x{zquant(zin,'clamp16'):x} exp 0x{exp:x}" + print("[Zoracle] PSMZ16S known-vector self-test PASS (clamp16 == PCSX2 SW raster source-clamp to 0xFFFF)") + if dump is None: + import glob; c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found; pass the .gs.zst path") + dump=c[0] + print(f"[Zoracle] dump={os.path.basename(dump)} epochs={idxs} (PSMZ16S zmodel={ZMODEL}, GEQUAL, persistent)") + + got,_=MD.load_draws(dump, idxs) + for i in idxs: + if i not in got: sys.exit(f"[Zoracle] FAIL: idx{i} not found as a textured draw") + eps=[got[i] for i in idxs] + + # depth state gate: all real GEQUAL, ZMSK=0, shared ZBP (the census precondition) + for e in eps: + t=e["state"]["test"]; z=e["state"]["zbuf"] + zte=(t>>16)&1; ztst=(t>>17)&3; zmsk=(z>>32)&1 + if not (zte==1 and ztst==2 and zmsk==0): + sys.exit(f"[Zoracle] FAIL: idx{e['first_idx']} not real GEQUAL depth (zte={zte} ztst={ztst} zmsk={zmsk})") + zbps={ (e['state']['zbuf']>>0)&0x1FF for e in eps } + print(f"[Zoracle] all epochs GEQUAL/ZMSK=0; shared ZBP={zbps} (single Z buffer)") + + # union geometry = the EXISTING Ch356 scheduler FB (384x381) + OX=int(min(bbox(e)[0] for e in eps)); OY=int(min(bbox(e)[1] for e in eps)) + UX=max(bbox(e)[2] for e in eps); UY=max(bbox(e)[3] for e in eps) + W=int(UX)-OX+1; H=int(UY)-OY+1; FBW=(W+63)//64; FBPXW=FBW*64 + print(f"[Zoracle] union origin=({OX},{OY}) -> FB {FBPXW}x{H} (FBW={FBW}) [existing Ch356 scheduler geometry]") + NPX=FBPXW*H; edge=MD.edge + + # per-epoch texture idx + palette (authentic), for color/owner readout + TEX=512*512; epdata=[] + for e in eps: + t0=e["state"]["tex0"]; mem,*_=RC.build_localmem_to(dump, e["first_idx"]) + idx=mem.read_psmt8(t0['tbp'], t0['tbw'], 512, 512) + pal=RC.read_clut32(mem, t0['cbp'], order="grid") + epdata.append(dict(idx=idx, pal=pal)) + + def tris(e): + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,z=v["z"],s=v["s"],t=v["t"],q=v["q"]) for v in e["verts"]] + return [(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv))] + + # buffers + zbuf=[-1]*NPX # stored Zq (16-bit); -1 = uninitialised (cleared "farther than any" => first frag passes) + z_owner=[-1]*NPX; z_zq=[0]*NPX # Z-tested owner epoch + its Zq + paint_owner=[-1]*NPX # paint-order owner (last covering, no Z) + cov=[0]*NPX + + for k,e in enumerate(eps): + for (v0,v1,v2) in tris(e): + ar=edge(v0["x"],v0["y"],v1["x"],v1["y"],v2["x"],v2["y"]) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(v0["x"],v1["x"],v2["x"]))); maxx=min(FBPXW-1,int(max(v0["x"],v1["x"],v2["x"]))+1) + miny=max(0,int(min(v0["y"],v1["y"],v2["y"]))); maxy=min(H-1,int(max(v0["y"],v1["y"],v2["y"]))+1) + for py in range(miny,maxy+1): + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(v1["x"],v1["y"],v2["x"],v2["y"],cx,cy)*inv + w1=edge(v2["x"],v2["y"],v0["x"],v0["y"],cx,cy)*inv + w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + o=py*FBPXW+px; cov[o]=1 + zf=w0*v0["z"]+w1*v1["z"]+w2*v2["z"] # screen-linear Z interp (24-bit) + zq=zquant(zf, ZMODEL) # PSMZ16S reduction (model-parameterized, see zquant) + paint_owner[o]=k # paint-order always overwrites + if zq >= zbuf[o]: # GEQUAL (>= handles uninit -1 too) + zbuf[o]=zq; z_owner[o]=k; z_zq[o]=zq # ZTE pass + ZMSK=0 write + + covered=sum(cov) + # reject vs paint-order: covered pixels where the Z-tested owner != the paint-order owner (far-late fragment rejected) + reject=[1 if (cov[o] and z_owner[o]!=paint_owner[o]) else 0 for o in range(NPX)] + nreject=sum(reject) + paint_ct=[0]*len(eps); z_ct=[0]*len(eps) + for o in range(NPX): + if cov[o]: + if paint_owner[o]>=0: paint_ct[paint_owner[o]]+=1 + if z_owner[o]>=0: z_ct[z_owner[o]]+=1 + + print(f"\n[Zoracle] covered px={covered}") + print(f"[Zoracle] per-epoch OWNED pixels (final, after all 3 epochs):") + for k,e in enumerate(eps): + print(f" epoch {k} idx{e['first_idx']:>6}: paint-order={paint_ct[k]:>7} Z-tested={z_ct[k]:>7} (delta {z_ct[k]-paint_ct[k]:+d})") + print(f"[Zoracle] pixels where Z REJECTS the paint-order winner (final FB MUST differ here): {nreject} " + f"({100.0*nreject/max(covered,1):.2f}% of covered)") + if nreject==0: + print("[Zoracle] (no difference — paint order would already match; Z not needed. Unexpected for this scene.)") + else: + print(f"[Zoracle] => the far-late draw is depth-rejected in the overlaps; paint-order output demonstrably differs.") + + if "--emit" in a: + def wmem(name, words, banner): + with open(os.path.join(DATA,name),"w") as f: + f.write(f"// {banner}\n") + for x in words: f.write(f"{x&0xFFFFFFFF:08x}\n") + # z-owner map: [31]cov [30]reject-vs-paint [27:24]z_owner(+1,0=none) [23:8]zq16 [3:0]paint_owner(+1) + owner=[] + for o in range(NPX): + zo=(z_owner[o]+1)&0xF; po=(paint_owner[o]+1)&0xF + owner.append((cov[o]<<31)|(reject[o]<<30)|(zo<<24)|((z_zq[o]&0xFFFF)<<8)|po) + wmem("sh3_zsched_zowner.mem", owner, "Ch357 LOCAL persistent-Z oracle: cov|reject|z_owner|zq16|paint_owner. gitignored.") + wmem("sh3_zsched_reject.mem", reject, "Ch357 LOCAL per-pixel reject-vs-paint mask (far-late Z rejects). gitignored.") + print(f"[Zoracle] emitted sh3_zsched_zowner.mem + sh3_zsched_reject.mem -> {DATA}") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/gs_sh3_z_rank.py b/tools/gs_sh3_z_rank.py new file mode 100644 index 0000000..07a7d54 --- /dev/null +++ b/tools/gs_sh3_z_rank.py @@ -0,0 +1,128 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch357: rank authentic supported draw GROUPS by clamp16 depth-rejection strength. + +Codex: "Before LPDDR-Z RTL, rank authentic supported draw groups using the corrected clamp16 model and select one with +stronger depth rejection if available. Keep the current trio as regression coverage." + +The reject map (z-tested owner != paint-order owner) depends ONLY on coverage + Z, not on the textures — so we rank fast +from the census verts (no per-epoch texture reconstruction). Model = clamp16 (PCSX2 SW raster: source_z=min(z,0xFFFF), +dest=stored&0xFFFF, GEQUAL). A strong acceptance group has heavy overlap where LATER-drawn draws are FARTHER (smaller Z) +so GEQUAL rejects them — paint-order and depth-order disagree. + +Constraints (scheduler-supported, like gs_make_sh3_scheduler_fixture): same frame f1; >=3 DISTINCT textures AND distinct +CLUTs; PSMT8 512x512 perspective TME (fst=0); resident tex+CLUT; on-screen; union bbox that fits the 384x381 rung. + +Usage: gs_sh3_z_rank.py [dump.gs.zst] [--topk N] [--max-fb 384x480] +""" +import sys, os, itertools +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +import gs_sh3_draw_census as C +import gs_make_sh3_multidraw_fixture as MD +edge=MD.edge + +def clamp16(z): z=int(z); return 0xFFFF if z>0xFFFF else (0 if z<0 else z) + +def bbox_overlap(a,b): + ox=min(a[2],b[2])-max(a[0],b[0]); oy=min(a[3],b[3])-max(a[1],b[1]) + return max(0.0,ox)*max(0.0,oy) + +def tris_of(verts, OX, OY): + fv=[dict(x=v["x"]-OX,y=v["y"]-OY,z=v["z"]) for v in verts] + return [(fv[i-2],fv[i-1],fv[i]) for i in range(2,len(fv))] + +def score_group(draws): + """clamp16 persistent-Z reject% over a group (dump order). Returns (covered, nreject, W, H).""" + OX=int(min(d["xmin"] for d in draws)); OY=int(min(d["ymin"] for d in draws)) + UX=max(d["xmax"] for d in draws); UY=max(d["ymax"] for d in draws) + W=int(UX)-OX+1; H=int(UY)-OY+1 + if W<=0 or H<=0 or W*H>700000: return (0,0,W,H) # skip degenerate/huge + NPX=W*H + zbuf=[-1]*NPX; z_owner=[-1]*NPX; paint_owner=[-1]*NPX; cov=bytearray(NPX) + for k,d in enumerate(draws): + for (v0,v1,v2) in tris_of(d["verts"],OX,OY): + ar=edge(v0["x"],v0["y"],v1["x"],v1["y"],v2["x"],v2["y"]) + if abs(ar)<1e-9: continue + inv=1.0/ar + minx=max(0,int(min(v0["x"],v1["x"],v2["x"]))); maxx=min(W-1,int(max(v0["x"],v1["x"],v2["x"]))+1) + miny=max(0,int(min(v0["y"],v1["y"],v2["y"]))); maxy=min(H-1,int(max(v0["y"],v1["y"],v2["y"]))+1) + for py in range(miny,maxy+1): + base=py*W + for px in range(minx,maxx+1): + cx,cy=px+0.5,py+0.5 + w0=edge(v1["x"],v1["y"],v2["x"],v2["y"],cx,cy)*inv + w1=edge(v2["x"],v2["y"],v0["x"],v0["y"],cx,cy)*inv + w2=1.0-w0-w1 + if w0<-0.001 or w1<-0.001 or w2<-0.001: continue + o=base+px; cov[o]=1 + zq=clamp16(w0*v0["z"]+w1*v1["z"]+w2*v2["z"]) + paint_owner[o]=k + if zq>=zbuf[o]: zbuf[o]=zq; z_owner[o]=k + covered=sum(cov); nreject=sum(1 for o in range(NPX) if cov[o] and z_owner[o]!=paint_owner[o]) + return (covered, nreject, W, H) + +def main(argv): + a=argv[1:]; dump=a[0] if a and not a[0].startswith("--") else None + topk=int(a[a.index("--topk")+1]) if "--topk" in a else 12 + maxfb=a[a.index("--max-fb")+1] if "--max-fb" in a else "448x480" + MW,MH=(int(x) for x in maxfb.split("x")) + if dump is None: + import glob; c=glob.glob(os.path.join(ROOT,"captures","gs","silenthill3","*224139*.gs.zst")) + if not c: sys.exit("no SH3 dump found"); + dump=c[0] + print(f"[Zrank] dump={os.path.basename(dump)} clamp16 depth-rejection ranking (fits<= {MW}x{MH})") + + draws,h,vram = C.census(dump, frame_filter=1, min_prims=8) + cand=[] + for d in draws: + t0=d["tex0"] + if not (t0["psm"]==0x13 and t0.get("tw")==512 and t0.get("th")==512): continue + if d["prim"]["tme"]!=1 or d["prim"]["fst"]!=0: continue + if not d["tex_resident"]: continue + if not (d["clut"] and d["clut"]["resident"]): continue + if d["onscreen_frac"]<0.5: continue + zc=[clamp16(v["z"]) for v in d["verts"]] + d["_funcl"]=sum(1 for z in zc if z<0xFFFF)/len(zc); d["_zmed"]=sorted(zc)[len(zc)//2] + d["_bbox"]=(d["xmin"],d["ymin"],d["xmax"],d["ymax"]); d["_area"]=(d["xmax"]-d["xmin"])*(d["ymax"]-d["ymin"]) + if d["_funcl"]>=0.5: cand.append(d) + print(f"[Zrank] {len(cand)} rich-depth supported candidates; textures={sorted(set(d['tex0']['tbp'] for d in cand))}") + + # per texture, keep a manageable set of the biggest/on-screen draws to bound the combinatorics + by_tex={} + for d in cand: by_tex.setdefault(d["tex0"]["tbp"], []).append(d) + for tb in by_tex: by_tex[tb]=sorted(by_tex[tb], key=lambda d:-d["_area"])[:8] + texs=sorted(by_tex) + + # enumerate distinct-texture triples with pairwise bbox overlap + a spread of depths; score with clamp16 raster + seen=set(); scored=[] + for t3 in itertools.combinations(texs,3): + for a0 in by_tex[t3[0]]: + for a1 in by_tex[t3[1]]: + if bbox_overlap(a0["_bbox"],a1["_bbox"])<200: continue + for a2 in by_tex[t3[2]]: + if bbox_overlap(a0["_bbox"],a2["_bbox"])<200 and bbox_overlap(a1["_bbox"],a2["_bbox"])<200: continue + grp=sorted([a0,a1,a2], key=lambda d:d["first_idx"]) # dump order = paint order + # distinct CLUTs required + if len({g["tex0"]["cbp"] for g in grp})<3: continue + key=tuple(g["first_idx"] for g in grp) + if key in seen: continue + seen.add(key) + OX=int(min(g["xmin"] for g in grp)); OY=int(min(g["ymin"] for g in grp)) + W=int(max(g["xmax"] for g in grp))-OX+1; Hh=int(max(g["ymax"] for g in grp))-OY+1 + if W>MW or Hh>MH: continue # must fit the target rung + cov,nrej,Wr,Hr=score_group(grp) + if cov<2000: continue + scored.append((nrej/max(cov,1), nrej, cov, key, [g["tex0"]["tbp"] for g in grp], Wr, Hr)) + scored.sort(reverse=True) + print(f"[Zrank] scored {len(scored)} distinct-texture overlapping triples (fit rung). TOP {topk} by reject-fraction:") + print(f" {'reject%':>8} {'reject':>7} {'covered':>8} {'FB':>9} draws (dump order) / textures") + for frac,nrej,cov,key,tbps,Wr,Hr in scored[:topk]: + print(f" {100*frac:7.2f}% {nrej:>7} {cov:>8} {Wr:>4}x{Hr:<4} {list(key)} tbp={tbps}") + # reference: the current trio + trio=[d for d in draws if d["first_idx"] in (11671,19562,89761)] + if len(trio)==3: + cov,nrej,Wr,Hr=score_group(sorted(trio,key=lambda d:d["first_idx"])) + print(f"[Zrank] current regression trio [11671,19562,89761]: {100*nrej/max(cov,1):.2f}% ({nrej}/{cov}) FB {Wr}x{Hr}") + return 0 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/merge_runtime_sched.py b/tools/merge_runtime_sched.py new file mode 100644 index 0000000..d06b838 --- /dev/null +++ b/tools/merge_runtime_sched.py @@ -0,0 +1,178 @@ +#!/usr/bin/env python3 +"""Concatenate runtime-CLUT scheduler fixtures without regenerating accepted epochs. + +Usage: merge_runtime_sched.py [--reference-inputs] OUTPUT_TAG INPUT_TAG[@START:END] [...] + +All inputs must use the same framebuffer and fixed 512x512 cache geometry. The +tool renumbers epochs and emits the descriptor/parameter headers consumed by +the shared RTL testbench and host. By default it copies generated assets under +OUTPUT_TAG. With --reference-inputs, the host descriptor retains the original +asset names (so repeated resident textures are staged only once), while cheap +local hard-link aliases satisfy the shared RTL testbench's epoch-local naming +contract. +""" +import os +import re +import shutil +import sys + +ROOT = os.path.normpath(os.path.join(os.path.dirname(__file__), "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") + + +def parse_table(tag): + path = os.path.join(DATA, f"sh3_{tag}_epochs.txt") + meta = None + rows = [] + with open(path) as f: + for line in f: + if line.startswith("META "): + meta = line.strip() + elif line and line[0].isdigit(): + fields = line.split() + if len(fields) != 14: + raise ValueError(f"{path}: expected 14 fields, got {len(fields)}") + rows.append(fields) + if meta is None: + raise ValueError(f"{path}: no META row") + return meta, rows + + +def parse_spec(spec): + if "@" not in spec: + tag=spec; bounds=None + else: + tag,bounds=spec.rsplit("@",1) + meta,rows=parse_table(tag) + if bounds is not None: + a,b=bounds.split(":",1) + start=int(a) if a else 0; end=int(b) if b else len(rows) + if start<0 or endlen(rows): + raise ValueError(f"{spec}: invalid row slice for {len(rows)} rows") + rows=rows[start:end] + return tag,meta,rows + + +def meta_dict(line): + p = line.split()[1:] + return dict(zip(p[0::2], p[1::2])) + + +def link_or_copy(src, dst): + """Create a local testbench alias without duplicating large texture files.""" + try: + os.unlink(dst) + except FileNotFoundError: + pass + try: + os.link(src, dst) + except OSError: + shutil.copyfile(src, dst) + + +def write_zero_pal(dst): + """Satisfy the shared RTL harness for direct-color epochs. + + Host descriptors keep '-' so no runtime CLUT upload occurs. The generic + testbench still opens an epoch-local palette filename before TEX0.PSM is + known; a deterministic unused zero table avoids a misleading readmem + warning without changing the fixture contract. + """ + with open(dst, "w") as f: + f.write("// unused direct-color palette placeholder\n") + for _ in range(256): + f.write("00000000\n") + + +def main(argv): + reference_inputs = "--reference-inputs" in argv + args = [x for x in argv[1:] if x != "--reference-inputs"] + if len(args) < 3: + print(__doc__.strip()) + return 2 + out, tags = args[0], args[1:] + parsed = [(spec, *parse_spec(spec)) for spec in tags] + metas = [meta_dict(x[2]) for x in parsed] + fixed = ("fbpxw", "fbh", "fbwords", "lpddr_tex", "tex_words", "n_beats") + for key in fixed: + vals = {m[key] for m in metas} + if len(vals) != 1: + raise ValueError(f"input fixtures disagree on {key}: {sorted(vals)}") + + out_rows = [] + nk = 0 + for spec, tag, _meta, rows in parsed: + for old in rows: + oldk = int(old[0]) + tex_src = os.path.join(DATA, old[4]) + list_src = os.path.join(DATA, old[8]) + has_pal = old[12] != "-" + pal_src = os.path.join(DATA, old[12]) if has_pal else None + tex_alias = f"sh3_{out}{nk}_tex_lpddr.mem" + list_alias = f"feeder_sh3_{out}{nk}.mem" + pal_alias = f"sh3_{out}{nk}_pal.mem" + if reference_inputs: + tex_name, list_name, pal_name = old[4], old[8], old[12] + assets = [(tex_src, tex_alias), (list_src, list_alias)] + if has_pal: + assets.append((pal_src, pal_alias)) + for src, name in assets: + link_or_copy(src, os.path.join(DATA, name)) + if not has_pal: + write_zero_pal(os.path.join(DATA, pal_alias)) + else: + tex_name, list_name = tex_alias, list_alias + pal_name = pal_alias if has_pal else "-" + assets = [(tex_src, tex_name), (list_src, list_name)] + if has_pal: + assets.append((pal_src, pal_name)) + for src, name in assets: + shutil.copyfile(src, os.path.join(DATA, name)) + if not has_pal: + write_zero_pal(os.path.join(DATA, pal_alias)) + row = list(old) + row[0] = str(nk) + row[4], row[8], row[12] = tex_name, list_name, pal_name + # A sliced input can begin with reuse=1 even though the preceding + # output row came from another fixture and holds another texture. + # Never carry that stale residency promise across a merge seam. + if row[11] == "1" and (not out_rows or out_rows[-1][7] != row[7]): + row[11] = "0" + out_rows.append(row) + nk += 1 + + m = metas[0] + with open(os.path.join(DATA, f"sh3_{out}_epochs.txt"), "w") as f: + f.write(f"# merged runtime-CLUT scheduler fixture: {tags}\n") + f.write("# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32\n") + f.write("META n_epochs %d fbpxw %s fbh %s fbwords %s lpddr_tex %s tex_words %s n_beats %s\n" % + (nk, m["fbpxw"], m["fbh"], m["fbwords"], m["lpddr_tex"], m["tex_words"], m["n_beats"])) + for row in out_rows: + f.write(" ".join(row) + "\n") + + first_tag=parsed[0][1] + base_params = open(os.path.join(DATA, f"sh3_{first_tag}_params.vh")).read() + globals_only = re.split(r"localparam int\s+EP0_NTRIS", base_params, maxsplit=1)[0] + globals_only = re.sub(r"(localparam int N_EPOCHS\s*=\s*)\d+", rf"\g<1>{nk}", globals_only) + with open(os.path.join(DATA, f"sh3_{out}_params.vh"), "w") as f: + f.write(f"// merged runtime scheduler params: {tags}\n") + f.write(globals_only) + for k, row in enumerate(out_rows): + f.write(f"localparam int EP{k}_NTRIS = {row[10]};\n") + f.write(f"localparam int EP{k}_CBP = {row[3]};\n") + f.write(f"localparam [31:0] EP{k}_CRC = 32'h{int(row[7], 16):08x};\n") + f.write(f"localparam bit EP{k}_REUSE = 1'b{row[11]};\n") + with open(os.path.join(DATA, f"sh3_{out}_epoch_table.vh"), "w") as f: + f.write(f"// merged runtime scheduler table: {tags}\n") + for k in range(nk): + f.write(f"EP_CRC[{k}] = EP{k}_CRC; EP_REC[{k}] = EP{k}_NTRIS; EP_REUSE[{k}] = EP{k}_REUSE;\n") + + for stem in ("bios", "payload"): + shutil.copyfile(os.path.join(DATA, f"{stem}_sh3_{first_tag}.mem"), + os.path.join(DATA, f"{stem}_sh3_{out}.mem")) + print(f"[merge_sched] {tags} -> {out}: {nk} epochs ({'referenced inputs' if reference_inputs else 'copied assets'})") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/patch_runtime_sched_test.py b/tools/patch_runtime_sched_test.py new file mode 100644 index 0000000..73f6121 --- /dev/null +++ b/tools/patch_runtime_sched_test.py @@ -0,0 +1,101 @@ +#!/usr/bin/env python3 +"""Clone a runtime scheduler fixture while patching TEST.ZTST in selected epochs. + +This is a diagnostic fixture transform. It leaves accepted generated assets +untouched, creates cheap local aliases for the shared RTL harness, and rewrites +only the selected feeder lists. + +Usage: patch_runtime_sched_test.py OUT IN --epochs START:END --ztst N +""" +import os +import re +import shutil +import sys + +ROOT=os.path.normpath(os.path.join(os.path.dirname(__file__),"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") + + +def link_or_copy(src,dst): + try: os.unlink(dst) + except FileNotFoundError: pass + try: os.link(src,dst) + except OSError: shutil.copyfile(src,dst) + + +def read_table(tag): + path=os.path.join(DATA,f"sh3_{tag}_epochs.txt") + comments=[]; meta=None; rows=[] + for line in open(path): + if line.startswith("META "): meta=line.strip() + elif line and line[0].isdigit(): rows.append(line.split()) + else: comments.append(line) + if meta is None: raise ValueError(f"{path}: missing META") + return comments,meta,rows + + +def patch_list(src,dst,ztst): + lines=open(src).readlines(); word_lines=[] + for i,line in enumerate(lines): + s=line.strip() + if s and not s.startswith("//"): + word_lines.append(i) + if len(word_lines)<4: raise ValueError(f"{src}: feeder list shorter than TEST header") + li=word_lines[3]; test=int(lines[li].strip(),16) + test=(test&~(3<<17))|((ztst&3)<<17) + lines[li]=f"{test:016x}\n" + with open(dst,"w") as f: f.writelines(lines) + + +def main(argv): + if len(argv)<7 or argv[3]!="--epochs" or argv[5]!="--ztst": + print(__doc__.strip()); return 2 + out,src_tag=argv[1],argv[2] + a,b=argv[4].split(":",1); start=int(a); end=int(b); ztst=int(argv[6],0) + if ztst not in range(4): raise ValueError("ZTST must be 0..3") + comments,meta,rows=read_table(src_tag) + if start<0 or endlen(rows): + raise ValueError(f"invalid epoch slice {start}:{end} for {len(rows)} rows") + + out_rows=[] + for row in rows: + k=int(row[0]); old=list(row) + tex_src=os.path.join(DATA,old[4]); list_src=os.path.join(DATA,old[8]) + tex_alias=f"sh3_{out}{k}_tex_lpddr.mem" + list_alias=f"feeder_sh3_{out}{k}.mem" + pal_alias=f"sh3_{out}{k}_pal.mem" + link_or_copy(tex_src,os.path.join(DATA,tex_alias)) + if start<=k {out}: epochs {start}:{end} ZTST={ztst}; {len(rows)} total") + return 0 + + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/patch_runtime_sched_zstate.py b/tools/patch_runtime_sched_zstate.py new file mode 100755 index 0000000..1af7dc3 --- /dev/null +++ b/tools/patch_runtime_sched_zstate.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python3 +"""Backfill authentic TEST_1/ZBUF_1 words into an existing scheduler fixture. + +Ch357-Ch404 fixtures used placeholder words because the board wrapper supplied +ZTE/ZMSK constants to the external LPDDR ROP. Ch405 carries that state from +the feeder list, so accepted fixture geometry can be retained byte-for-byte +while only header words 3 and 4 are restored from the capture. +""" +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) +import gs_make_sh3_multidraw_fixture as MD + + +def rows(path): + with open(path, encoding="utf-8") as f: + for line in f: + s = line.strip() + if s and not s.startswith("#") and not s.startswith("META"): + fields = s.split() + if fields[0].isdigit(): + yield int(fields[1]), fields[8] + + +def main(argv): + if len(argv) < 3: + raise SystemExit("usage: patch_runtime_sched_zstate.py dump.gs.zst epochs.txt [epochs.txt ...]") + dump = argv[1] + tables = argv[2:] + entries = [(idx, name) for table in tables for idx, name in rows(table)] + got, _ = MD.load_draws(dump, [idx for idx, _ in entries]) + for idx, name in entries: + if idx not in got: + raise SystemExit(f"missing captured draw idx{idx}") + path = os.path.join(DATA, name) + with open(path, encoding="utf-8") as f: + lines = f.readlines() + slots = [i for i, line in enumerate(lines) + if line.strip() and not line.lstrip().startswith("//")] + if len(slots) < 5: + raise SystemExit(f"{name}: truncated staging image") + state = got[idx]["state"] + lines[slots[3]] = f"{state['test'] & 0xffffffffffffffff:016x}\n" + lines[slots[4]] = f"{state['zbuf'] & 0xffffffffffffffff:016x}\n" + with open(path, "w", encoding="utf-8") as f: + f.writelines(lines) + print(f"[zstate] {name}: idx{idx} TEST={state['test']:016x} ZBUF={state['zbuf']:016x}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/preview_scanout_ch418.py b/tools/preview_scanout_ch418.py new file mode 100644 index 0000000..5a2a342 --- /dev/null +++ b/tools/preview_scanout_ch418.py @@ -0,0 +1,48 @@ +#!/usr/bin/env python3 +"""Preview and score the Ch418 captured SH3 scanout presentation map. + +RTL maps source_x=floor(output_x*4/5) and +source_y=32+floor(output_y*14/15). This host utility applies the same +integer mapping to a 640x480 framebuffer PNG, saves the expected HDMI +presentation, and reports RGB MAE/RMSE against a 640x480 reference. +""" +import math +import sys +from PIL import Image + + +def score(a, b): + ae = 0 + se = 0 + n = a.width * a.height * 3 + for pa, pb in zip(a.getdata(), b.getdata()): + for ca, cb in zip(pa, pb): + d = int(ca) - int(cb) + ae += abs(d) + se += d * d + return ae / n, math.sqrt(se / n) + + +def main(argv): + if len(argv) != 4: + raise SystemExit("usage: preview_scanout_ch418.py ") + src = Image.open(argv[1]).convert("RGB") + if src.size != (640, 480): + raise SystemExit(f"expected 640x480 framebuffer, got {src.size}") + ref = Image.open(argv[2]).convert("RGB").resize((640, 480), Image.Resampling.BILINEAR) + mapped = Image.new("RGB", (640, 480)) + mapped.putdata([ + src.getpixel(((x * 4) // 5, 32 + (y * 14) // 15)) + for y in range(480) for x in range(640) + ]) + mapped.save(argv[3]) + raw_mae, raw_rmse = score(src, ref) + map_mae, map_rmse = score(mapped, ref) + print(f"raw MAE={raw_mae:.4f} RMSE={raw_rmse:.4f}") + print(f"mapped MAE={map_mae:.4f} RMSE={map_rmse:.4f}") + print(f"delta MAE={map_mae-raw_mae:+.4f} RMSE={map_rmse-raw_rmse:+.4f}") + print(f"wrote {argv[3]}") + + +if __name__ == "__main__": + main(sys.argv) diff --git a/tools/preview_scanout_ch436.py b/tools/preview_scanout_ch436.py new file mode 100755 index 0000000..3819c9d --- /dev/null +++ b/tools/preview_scanout_ch436.py @@ -0,0 +1,58 @@ +#!/usr/bin/env python3 +"""Preview the exact Ch436 vertical-linear SH3 scanout map.""" +import math +import sys + +from PIL import Image + + +def blend(a, b, frac, denom): + return tuple(((denom - frac) * x + frac * y + denom // 2) // denom + for x, y in zip(a, b)) + + +def score(a, b): + ae = 0 + se = 0 + n = a.width * a.height * 3 + for pa, pb in zip(a.getdata(), b.getdata()): + for ca, cb in zip(pa, pb): + d = int(ca) - int(cb) + ae += abs(d) + se += d * d + return ae / n, math.sqrt(se / n) + + +def main(argv): + if len(argv) != 4: + raise SystemExit( + "usage: preview_scanout_ch436.py " + ) + + src = Image.open(argv[1]).convert("RGB") + if src.size != (640, 480): + raise SystemExit(f"expected 640x480 framebuffer, got {src.size}") + ref = Image.open(argv[2]).convert("RGB").resize( + (640, 480), Image.Resampling.BILINEAR + ) + + out = Image.new("RGB", (640, 480)) + px = out.load() + for y in range(480): + yn = y * 14 + y0 = 32 + yn // 15 + yf = yn % 15 + y1 = min(y0 + 1, 479) + for x in range(640): + x0 = (x * 4) // 5 + px[x, y] = blend(src.getpixel((x0, y0)), + src.getpixel((x0, y1)), yf, 15) + + out.save(argv[3]) + mae, rmse = score(out, ref) + print(f"linear MAE={mae:.4f} RMSE={rmse:.4f}") + print(f"wrote {argv[3]}") + + +if __name__ == "__main__": + main(sys.argv) diff --git a/tools/preview_scanout_ch437.py b/tools/preview_scanout_ch437.py new file mode 100644 index 0000000..a5c6b06 --- /dev/null +++ b/tools/preview_scanout_ch437.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python3 +"""Preview the exact Ch437 separable-linear SH3 scanout map.""" +import math +import sys + +from PIL import Image + + +def blend(a, b, frac, denom): + return tuple(((denom - frac) * x + frac * y + denom // 2) // denom + for x, y in zip(a, b)) + + +def score(a, b): + ae = 0 + se = 0 + n = a.width * a.height * 3 + for pa, pb in zip(a.getdata(), b.getdata()): + for ca, cb in zip(pa, pb): + d = int(ca) - int(cb) + ae += abs(d) + se += d * d + return ae / n, math.sqrt(se / n) + + +def main(argv): + if len(argv) != 4: + raise SystemExit( + "usage: preview_scanout_ch437.py " + ) + + src = Image.open(argv[1]).convert("RGB") + if src.size != (640, 480): + raise SystemExit(f"expected 640x480 framebuffer, got {src.size}") + ref = Image.open(argv[2]).convert("RGB").resize( + (640, 480), Image.Resampling.BILINEAR + ) + + out = Image.new("RGB", (640, 480)) + px = out.load() + for y in range(480): + yn = y * 14 + y0 = 32 + yn // 15 + yf = yn % 15 + y1 = min(y0 + 1, 479) + for x in range(640): + xn = x * 4 + x0 = xn // 5 + xf = xn % 5 + x1 = min(x0 + 1, 511) + left = blend(src.getpixel((x0, y0)), + src.getpixel((x0, y1)), yf, 15) + right = blend(src.getpixel((x1, y0)), + src.getpixel((x1, y1)), yf, 15) + px[x, y] = blend(left, right, xf, 5) + + out.save(argv[3]) + mae, rmse = score(out, ref) + print(f"bilinear MAE={mae:.4f} RMSE={rmse:.4f}") + print(f"wrote {argv[3]}") + + +if __name__ == "__main__": + main(sys.argv) diff --git a/tools/preview_scanout_ch438.py b/tools/preview_scanout_ch438.py new file mode 100644 index 0000000..095149f --- /dev/null +++ b/tools/preview_scanout_ch438.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python3 +"""Preview the exact Ch438 source-space 3x3 binomial scanout.""" +import math +import sys + +from PIL import Image + + +def binom3(a, b, c): + return tuple((x + 2 * y + z + 2) // 4 for x, y, z in zip(a, b, c)) + + +def score(a, b): + ae = 0 + se = 0 + n = a.width * a.height * 3 + for pa, pb in zip(a.getdata(), b.getdata()): + for ca, cb in zip(pa, pb): + d = int(ca) - int(cb) + ae += abs(d) + se += d * d + return ae / n, math.sqrt(se / n) + + +def main(argv): + if len(argv) != 4: + raise SystemExit( + "usage: preview_scanout_ch438.py " + ) + + src = Image.open(argv[1]).convert("RGB") + if src.size != (640, 480): + raise SystemExit(f"expected 640x480 framebuffer, got {src.size}") + ref = Image.open(argv[2]).convert("RGB").resize( + (640, 480), Image.Resampling.BILINEAR + ) + + # RTL rounds after each separable pass, so mirror that order exactly. + horizontal = Image.new("RGB", src.size) + hp = horizontal.load() + for y in range(480): + for x in range(512): + xm1 = max(0, x - 1) + xp1 = min(511, x + 1) + hp[x, y] = binom3(src.getpixel((xm1, y)), + src.getpixel((x, y)), + src.getpixel((xp1, y))) + + filtered = Image.new("RGB", src.size) + fp = filtered.load() + for y in range(32, 480): + ym1 = max(32, y - 1) + yp1 = min(479, y + 1) + for x in range(512): + fp[x, y] = binom3(horizontal.getpixel((x, ym1)), + horizontal.getpixel((x, y)), + horizontal.getpixel((x, yp1))) + + out = Image.new("RGB", (640, 480)) + px = out.load() + for y in range(480): + sy = 32 + (y * 14) // 15 + for x in range(640): + sx = (x * 4) // 5 + px[x, y] = filtered.getpixel((sx, sy)) + + out.save(argv[3]) + mae, rmse = score(out, ref) + print(f"binomial3x3 MAE={mae:.4f} RMSE={rmse:.4f}") + print(f"wrote {argv[3]}") + + +if __name__ == "__main__": + main(sys.argv) diff --git a/tools/ps2_sh3_multitex.c b/tools/ps2_sh3_multitex.c new file mode 100644 index 0000000..93c8317 --- /dev/null +++ b/tools/ps2_sh3_multitex.c @@ -0,0 +1,170 @@ +// retroDE_ps2 — ps2_sh3_multitex (Ch355 Brick 1 host two-group RUNTIME-STAGING flow) +// +// Composites two authentic SH3 draws with DIFFERENT textures/CLUTs (A=idx19562, B=idx89761) into ONE LPDDR +// framebuffer (320x381) via scene-level texture rebind + staged-list retriggering: +// preclear ONCE -> fill+CRC tex A -> STREAM list A -> GO A + fresh drain -> REFILL+CRC tex B -> STREAM list B -> +// GO B + frame_drained high->low->high (anti-stale) -> enable scanout after the 2nd fresh drain. +// Requires the frame_drained diagnostic bit (0x02C[6]) — bundled since Ch354's fit. +// +// Build on the board: gcc -O2 -o ps2_sh3_multitex ps2_sh3_multitex.c +// Run (after fit+boot): sudo ./ps2_sh3_multitex sh3_mtA_tex_lpddr.mem sh3_mtB_tex_lpddr.mem feeder_sh3_mtA.mem feeder_sh3_mtB.mem +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OFF_LPDDR_CTRL 0x018 // W: [0]arm [1]canary [2]video_src [3]scanout_lb +#define OFF_LPDDR_FBBASE 0x01C +#define OFF_LPDDR_STATUS 0x02C // R: [0]idle [6]frame_drained (STABLE ordered ack) +#define OFF_LPDDR_BYTES 0x030 +#define OFF_WRADDR 0x04C +#define OFF_WRDATA 0x050 +#define OFF_TEX_FILL 0x054 // W[0] arm fill ; R[0] fill_done [2] write_pending +#define OFF_TEX_BEATS 0x058 +#define OFF_TEX_BYTES 0x05C +#define OFF_TEX_RDERRS 0x068 +#define OFF_WR_ERRS 0x06C +#define OFF_TEX_CRC 0x070 +#define OFF_STG_STATUS 0x0D8 // R[0] feeder ready ; W reset staging write address +#define OFF_STG_LO 0x0DC // W low32 ; R current staging addr +#define OFF_STG_HI 0x0E4 // W high32 (commits {hi,lo}, ++addr) ; R records emitted +#define OFF_GO 0x0E8 // W[0] trigger feeder +#define FRAME_DRAINED 0x40 // 0x02C[6] +#define IDLE_BIT 0x01 +#define WR_PENDING 0x04 // 0x054[2] +#define READY_BIT 0x01 + +#define N_TEX 65536 // 512x512 PSMT8 / 4 +#define TEX_BYTES 262144 +#define N_BEATS 8192 +#define STG_MAX 2048 +#define FB_WORDS (320*381) // 121920 ; bytes = 0x77100 + +typedef struct { volatile uint8_t *base; int dry; } br_t; +static void wr32(br_t*b,int o,uint32_t v){ if(!b->dry) *(volatile uint32_t*)(b->base+o)=v; } +static uint32_t rd32(br_t*b,int o){ return b->dry?0:*(volatile uint32_t*)(b->base+o); } + +// NOTE: buffer must exceed the longest banner line; skip any line whose first non-space char isn't a hex digit +// (comments/blank) — a too-small buffer that splits a long comment must NOT parse the tail as a data word. +static int load32(const char*p, uint32_t*a, int n){ + FILE*f=fopen(p,"r"); if(!f){fprintf(stderr,"open %s: %s\n",p,strerror(errno));return -1;} + int k=0; char ln[512]; + while(kdry){int g=0; while((rd32(b,OFF_TEX_FILL)&WR_PENDING)&&g<2000000)g++;} } + uint32_t e=rd32(b,OFF_WR_ERRS); + printf("[mt] preclear FB %u words (0..0x%x) wr_bresp_errs=%u\n", FB_WORDS, FB_WORDS*4, e); + return e?-1:0; +} +// upload a texture to LPDDR (write-probe), then arm a FRESH cache fill and verify crc/beats/bytes/rd_errs. +static int upload_and_fill(br_t*b, const char*nm, uint32_t*tex, uint32_t exp_crc){ + wr32(b, OFF_WRADDR, 0x200000u); + for (int i=0;idry){int g=0; while((rd32(b,OFF_TEX_FILL)&WR_PENDING)&&g<2000000)g++;} } + uint32_t werr=rd32(b,OFF_WR_ERRS); + // FRESH fill: arm, then require fill_done low->high (cache rearm), not a lingering high. + wr32(b, OFF_TEX_FILL, 0x1); + if(!b->dry){ int g=0; while((rd32(b,OFF_TEX_FILL)&0x1)&&g<2000)g++; // drops (busy) + g=0; while(!(rd32(b,OFF_TEX_FILL)&0x1)&&g<400000)g++; } // rises (done) + uint32_t crc=rd32(b,OFF_TEX_CRC), beats=rd32(b,OFF_TEX_BEATS), bytes=rd32(b,OFF_TEX_BYTES), rderr=rd32(b,OFF_TEX_RDERRS); + printf("[mt] tex %s: upload wr_errs=%u ; fill crc=0x%08x (exp 0x%08x) beats=%u (exp %d) bytes=%u (exp %d) rd_errs=%u\n", + nm, werr, crc, exp_crc, beats, N_BEATS, bytes, TEX_BYTES, rderr); + if(b->dry) return 0; + if(werr || crc!=exp_crc || beats!=N_BEATS || bytes!=TEX_BYTES || rderr){ fprintf(stderr," FAIL tex %s fill mismatch\n", nm); return -1; } + return 0; +} +static int wait_ready(br_t*b){ if(b->dry)return 0; for(int i=0;i<3000000;i++) if(rd32(b,OFF_STG_STATUS)&READY_BIT) return 0; + fprintf(stderr," FAIL: feeder never reached C_READY\n"); return -1; } +// stream a 64-bit staging list over the bridge; report words + the 12-bit address bound. +static int stream_list(br_t*b, const char*nm, uint64_t*list, int nwords){ + if (nwords > 4095){ fprintf(stderr," FAIL list %s %d words exceeds 12-bit bridge addr\n", nm, nwords); return -1; } + if (wait_ready(b)) return -1; // feeder in C_READY before staging + wr32(b, OFF_STG_STATUS, 0); // reset staging write address to 0 (value MUST be 0 — matches ps2_feeder) + for (int i=0;i>32)); } + if (wait_ready(b)) return -1; // staging accepted + uint32_t addr=rd32(b,OFF_STG_LO); + printf("[mt] staged list %s: %d words written, staged_addr=%u (exp %d, < 4096)\n", nm, nwords, addr, nwords); + if (!b->dry && addr!=(uint32_t)nwords) fprintf(stderr," warn: staged_addr=%u != %d (addressing off)\n", addr, nwords); + return 0; +} +// GO + await a fresh ordered drain. expect_stale: frame_drained is HIGH from a prior scene -> require high->low->high. +// After the drain, the feeder returns to C_READY (whole scene drained); records_emitted then reads the tri count. +static int go_await_drain(br_t*b, const char*nm, int exp_records, int expect_stale){ + wr32(b, OFF_GO, 0x1); + if(b->dry){ printf("[mt] scene %s: GO (dry-run)\n", nm); return 0; } + int g; + if (expect_stale){ g=0; while((rd32(b,OFF_LPDDR_STATUS)&FRAME_DRAINED)&&g<40000000)g++; // wait the FALL (fresh render) + if (rd32(b,OFF_LPDDR_STATUS)&FRAME_DRAINED){ fprintf(stderr," FAIL %s: frame_drained never fell — STALE drain\n", nm); return -1; } } + g=0; while(!(rd32(b,OFF_LPDDR_STATUS)&FRAME_DRAINED)&&g<40000000)g++; // wait the RISE (drained) + if (wait_ready(b)) return -1; // feeder back to C_READY + uint32_t fd=rd32(b,OFF_LPDDR_STATUS)&FRAME_DRAINED, by=rd32(b,OFF_LPDDR_BYTES), recs=rd32(b,OFF_STG_HI); + printf("[mt] scene %s: GO -> fresh drain frame_drained=%u, records_emitted=%u (exp %d), FB beats written=%u\n", + nm, fd?1:0, recs, exp_records, by); + if (fd==0 || by==0){ fprintf(stderr," FAIL %s: empty render (frame_drained=%u beats=%u)\n", nm, fd?1:0, by); return -1; } + if (!b->dry && (int)recs!=exp_records) fprintf(stderr," warn %s: records=%u != %d\n", nm, recs, exp_records); + return 0; +} + +int main(int argc, char**argv){ + unsigned long base=0x40000000UL; int dry=0; char*env=getenv("PS2_BRIDGE_BASE"); if(env) base=strtoul(env,NULL,0); + const char *fa="sh3_mtA_tex_lpddr.mem",*fb="sh3_mtB_tex_lpddr.mem",*la="feeder_sh3_mtA.mem",*lb="feeder_sh3_mtB.mem"; + int ai=1; + for (int i=1;i not stale) + rc|=upload_and_fill(&br,"A",texA,crcA); + rc|=stream_list(&br,"A",listA,nwA); + wr32(&br, OFF_LPDDR_CTRL, 0x1); // arm writer (video_src OFF) + rc|=go_await_drain(&br,"A",ntA,0); + // (4) scene B: REFILL tex B (cache rearm), stream list B, GO B, high->low->high fresh drain (stale from A) + rc|=upload_and_fill(&br,"B",texB,crcB); + rc|=stream_list(&br,"B",listB,nwB); + rc|=go_await_drain(&br,"B",ntB,1); + // (5) enable scanout ONLY after the 2nd fresh drain + wr32(&br, OFF_LPDDR_CTRL, 0x1|0x4); // arm + video_src + printf("[mt] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (320x381, A+B composited)\n"); + + if(!dry){ munmap(map,0x2000); close(fd); } + printf("[mt] DONE rc=%d %s\n", rc, rc?"(a gate failed above)":"(all gates passed)"); + return rc?1:0; +} diff --git a/tools/ps2_sh3_sched.c b/tools/ps2_sh3_sched.c new file mode 100644 index 0000000..ac38208 --- /dev/null +++ b/tools/ps2_sh3_sched.c @@ -0,0 +1,462 @@ +// retroDE_ps2 — ps2_sh3_sched (Ch356 N-TEXTURE SCHEDULER host, data-driven epoch descriptors) +// +// Generalizes Ch355's hard-coded two-group flow (ps2_sh3_multitex) to a DATA-DRIVEN scheduler that reads an epoch +// descriptor table (sh3_sched_epochs.txt) and iterates it: N authentic SH3 draws with DIFFERENT textures/CLUTs +// composite into ONE LPDDR framebuffer via scene-level texture rebind + staged-list retriggering. The CLUT table is +// preloaded by the bootlet (all N relocated CLUTs) — runtime CLUT upload is OUT of scope; the scheduler SELECTS a +// preloaded palette per epoch (via each list's TEX0 CBP). +// +// wait ready -> FB base 0 -> preclear ONCE -> for each epoch k: +// upload tex_k -> LPDDR (single region) -> FRESH cache fill + verify CRC/beats/bytes/rd_errs +// STREAM list_k over the bridge (0x0D8=0 reset, 0x0DC/0x0E4 commit) -> arm writer (k==0) -> GO +// await FRESH ordered drain (k==0: low->high; k>0: high->low->high anti-stale) -> records == tris +// -> enable scanout (video_src) ONLY after the LAST fresh drain. +// Requires the frame_drained diagnostic bit (0x02C[6]). +// +// Build on the board: gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +// Run (after fit+boot): sudo ./ps2_sh3_sched (reads sh3_sched_epochs.txt in the cwd) +// or: sudo ./ps2_sh3_sched [--datadir DIR] +// Optional framebuffer readback: +// sudo ./ps2_sh3_sched --zbuf sh3_zsched_epochs.txt --dump-fb sh3_zsched_board_fb.mem +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OFF_LPDDR_CTRL 0x018 // W: [0]arm [1]canary [2]video_src [3]scanout_lb +#define OFF_LPDDR_FBBASE 0x01C +#define OFF_LPDDR_STATUS 0x02C // R: [0]idle [3]rd_pending [6]frame_drained (STABLE ordered ack) +#define OFF_LPDDR_BYTES 0x030 +#define OFF_LPDDR_RDADDR 0x03C // W: read byte addr + trigger ; R: latched read data +#define OFF_WRADDR 0x04C +#define OFF_WRDATA 0x050 +#define OFF_TEX_FILL 0x054 // W[0] arm fill ; R[0] fill_done [2] write_pending +#define OFF_TEX_BEATS 0x058 +#define OFF_TEX_BYTES 0x05C +#define OFF_TEX_RDERRS 0x068 +#define OFF_WR_ERRS 0x06C +#define OFF_TEX_CRC 0x070 +#define OFF_STG_STATUS 0x0D8 // R[0] feeder ready ; W reset staging write address (value MUST be 0) +#define OFF_STG_LO 0x0DC // W low32 ; R current staging addr +#define OFF_STG_HI 0x0E4 // W high32 (commits {hi,lo}, ++addr) ; R records emitted +#define OFF_GO 0x0E8 // W[0] trigger feeder +#define OFF_CLUT_CTRL 0x1E0 // R[0] busy R[1] done-toggle; W[0] commit staged palette +#define OFF_CLUT_EXPECT 0x1E4 // W expected palette sum32; R readback +#define OFF_CLUT_RESULT 0x1E8 // R completed palette sum32 +#define OFF_CLUT_STAGE 0x200 // W 256 x 32-bit palette entries (0x200..0x5FC) +#define FRAME_DRAINED 0x40 // 0x02C[6] +#define CLEAR_DONE 0x80 // 0x02C[7] — Ch357 persistent-Z preclear complete (host waits before first GO) +#define DROPS_NONZERO 0x100 // 0x02C[8] — Ch357 sticky: a fragment was EVER dropped (fail-closed) +#define OFF_FRAG_DROPS 0x0EC // R: Ch357 persistent-Z dropped-fragment snapshot (per-scene delta must be 0) +#define RD_PENDING 0x08 // 0x02C[3] +#define WR_PENDING 0x04 // 0x054[2] +#define READY_BIT 0x01 +#define CLUT_BUSY 0x01 +#define CLUT_DONE 0x02 + +#define MAX_EPOCHS 8192 // descriptors are small; epoch payloads are streamed from disk one at a time +#define STG_MAX 2048 +#define TEX_MAX 65536 // 512x512 PSMT8 / 4 = 65536 words +#define MAX_SEQUENCE_SCENES 16 + +typedef struct { volatile uint8_t *base; int dry; } br_t; +static void wr32(br_t*b,int o,uint32_t v){ if(!b->dry) *(volatile uint32_t*)(b->base+o)=v; } +static uint32_t rd32(br_t*b,int o){ return b->dry?0:*(volatile uint32_t*)(b->base+o); } + +// Polling the lightweight HPS bridge flat-out can consume the entire host-side +// transaction window while a large LPDDR scene is draining. Use elapsed time, +// not a CPU/bridge-speed-dependent read count, and yield briefly between reads. +static int wait_status_level(br_t*b, uint32_t mask, int want_set, int timeout_ms){ + struct timespec t0, tn; + clock_gettime(CLOCK_MONOTONIC, &t0); + for(;;){ + if (!!(rd32(b,OFF_LPDDR_STATUS)&mask) == !!want_set) return 0; + usleep(10); + clock_gettime(CLOCK_MONOTONIC, &tn); + int64_t elapsed_ms=(int64_t)(tn.tv_sec-t0.tv_sec)*1000 + (tn.tv_nsec-t0.tv_nsec)/1000000; + if(elapsed_ms >= timeout_ms) return -1; + } +} + +// buffer must exceed the longest banner line; skip any line whose first non-space char isn't a hex digit. +static int load32(const char*p, uint32_t*a, int n){ + FILE*f=fopen(p,"r"); if(!f){fprintf(stderr,"open %s: %s\n",p,strerror(errno));return -1;} + int k=0; char ln[512]; + while(kn_epochs); + if((p=strstr(ln,"fbpxw"))) sscanf(p+5," %d",&s->fbpxw); + if((p=strstr(ln,"fbh"))) sscanf(p+3," %d",&s->fbh); + if((p=strstr(ln,"fbwords"))) sscanf(p+7," %d",&s->fbwords); + if((p=strstr(ln,"tex_words"))) sscanf(p+9," %d",&s->tex_words); + if((p=strstr(ln,"n_beats"))) sscanf(p+7," %d",&s->n_beats); + if((p=strstr(ln,"lpddr_tex"))) sscanf(p+9," %lx",&s->lpddr_tex); + continue; + } + char*c=ln; while(*c==' '||*c=='\t')c++; if(*c=='#'||*c=='\n'||*c==0)continue; // comment/blank + if(ne>=MAX_EPOCHS){fprintf(stderr,"too many epochs\n");fclose(f);return -1;} + epoch_t*e=&s->ep[ne]; + // k idx tbp cbp_reloc tex_file lpddr size crc list_file words records [reuse [pal_file pal_sum32]] + // Ch359 — trailing EXPLICIT reuse flag (1 = texture cache already resident; SKIP upload+fill, VERIFY the + // resident CRC register instead). Older tables (zsched/zs640) have no column -> reuse=0 (back-compatible). + e->reuse=0; snprintf(e->pal,sizeof e->pal,"-"); e->pal_crc=0; + int got=sscanf(ln,"%d %d %d %d %127s %lx %*d %x %127s %d %d %d %127s %x", + &e->k,&e->idx,&e->tbp,&e->cbp,e->tex,&e->lpddr,&e->crc,e->list,&e->words,&e->records,&e->reuse,e->pal,&e->pal_crc); + if(got!=10 && got!=11 && got!=13){fprintf(stderr,"bad epoch row (got %d): %s",got,ln);fclose(f);return -1;} + if(e->reuse && ne==0){fprintf(stderr,"epoch 0 cannot be reuse=1 (nothing resident yet)\n");fclose(f);return -1;} + ne++; + } + fclose(f); + if(s->n_epochs==0) s->n_epochs=ne; + if(s->n_epochs!=ne){fprintf(stderr,"META n_epochs=%d != %d rows\n",s->n_epochs,ne);return -1;} + if(s->fbwords<=0||s->tex_words<=0||s->n_beats<=0){fprintf(stderr,"META missing fbwords/tex_words/n_beats\n");return -1;} + return ne; +} +// Ch367 -- stage exactly one PSMCT32 CLUT and wait for the design-clock +// copier's done toggle. `pal_sum` is a sum32 over the 256 host words, the +// same simple integrity contract used by the LPDDR texture-fill gate. +static int upload_palette(br_t*b, int k, const uint32_t *pal, uint32_t pal_sum){ + uint32_t before=rd32(b,OFF_CLUT_CTRL)&CLUT_DONE; + if(!b->dry && (rd32(b,OFF_CLUT_CTRL)&CLUT_BUSY)){ + fprintf(stderr," FAIL epoch %d: CLUT copier busy before palette commit\n",k); return -1; + } + wr32(b,OFF_CLUT_EXPECT,pal_sum); + for(int i=0;i<256;i++) wr32(b,OFF_CLUT_STAGE+i*4,pal[i]); + wr32(b,OFF_CLUT_CTRL,1); + if(!b->dry){ + int g=0; while(((rd32(b,OFF_CLUT_CTRL)&CLUT_DONE)==before) && g<400000) g++; + if((rd32(b,OFF_CLUT_CTRL)&CLUT_DONE)==before){ + fprintf(stderr," FAIL epoch %d: CLUT copier completion timeout\n",k); return -1; + } + } + uint32_t got=rd32(b,OFF_CLUT_RESULT); + printf("[sched] epoch %d pal: runtime copy sum32=0x%08x (exp 0x%08x)\n",k,got,pal_sum); + if(!b->dry && got!=pal_sum){ fprintf(stderr," FAIL epoch %d: CLUT palette sum mismatch\n",k); return -1; } + return 0; +} + +static int preclear_range(br_t*b, uint32_t base, int words, const char*tag){ + wr32(b, OFF_WRADDR, base); // write-probe auto-increments WRADDR per WRDATA write + for (int i=0;idry){int g=0; while((rd32(b,OFF_TEX_FILL)&WR_PENDING)&&g<2000000)g++;} } + uint32_t e=rd32(b,OFF_WR_ERRS); + printf("[sched] preclear %s %d words (0x%x..0x%x) wr_bresp_errs=%u\n", tag, words, base, base+words*4, e); + return e?-1:0; +} +static int preclear_fb(br_t*b, int fbwords){ return preclear_range(b, 0, fbwords, "COLOR"); } +static int upload_and_fill(br_t*b, int k, uint32_t*tex, int texw, unsigned long lpddr, uint32_t exp_crc, int nbeats){ + wr32(b, OFF_WRADDR, (uint32_t)lpddr); + for (int i=0;idry){int g=0; while((rd32(b,OFF_TEX_FILL)&WR_PENDING)&&g<2000000)g++;} } + uint32_t werr=rd32(b,OFF_WR_ERRS); + wr32(b, OFF_TEX_FILL, 0x1); // FRESH fill: low->high rearm + if(!b->dry){ int g=0; while((rd32(b,OFF_TEX_FILL)&0x1)&&g<2000)g++; + g=0; while(!(rd32(b,OFF_TEX_FILL)&0x1)&&g<400000)g++; } + uint32_t crc=rd32(b,OFF_TEX_CRC), beats=rd32(b,OFF_TEX_BEATS), bytes=rd32(b,OFF_TEX_BYTES), rderr=rd32(b,OFF_TEX_RDERRS); + printf("[sched] epoch %d tex: upload wr_errs=%u ; fill crc=0x%08x (exp 0x%08x) beats=%u (exp %d) bytes=%u rd_errs=%u\n", + k, werr, crc, exp_crc, beats, nbeats, bytes, rderr); + if(b->dry) return 0; + if(werr || crc!=exp_crc || beats!=(uint32_t)nbeats || rderr){ fprintf(stderr," FAIL epoch %d fill mismatch\n", k); return -1; } + return 0; +} +static int wait_ready(br_t*b){ if(b->dry)return 0; for(int i=0;i<3000000;i++) if(rd32(b,OFF_STG_STATUS)&READY_BIT) return 0; + fprintf(stderr," FAIL: feeder never reached C_READY\n"); return -1; } +static int stream_list(br_t*b, int k, uint64_t*list, int nwords){ + if (nwords > 4095){ fprintf(stderr," FAIL epoch %d %d words exceeds 12-bit bridge addr\n", k, nwords); return -1; } + if (wait_ready(b)) return -1; + wr32(b, OFF_STG_STATUS, 0); // reset staging addr to 0 + for (int i=0;i>32)); } + if (wait_ready(b)) return -1; + uint32_t addr=rd32(b,OFF_STG_LO); + printf("[sched] epoch %d: streamed %d words, staged_addr=%u (exp %d, < 4096)\n", k, nwords, addr, nwords); + if (!b->dry && addr!=(uint32_t)nwords) fprintf(stderr," warn epoch %d: staged_addr=%u != %d\n", k, addr, nwords); + return 0; +} +// Ch357 — wait for the persistent-Z preclear (z_rmw clear_start) to finish before the FIRST GO. The host arms EARLY so +// this overlaps the texture uploads, but it must be EXPLICITLY confirmed (a broken clear-wait was already found in sim). +static int wait_clear_done(br_t*b){ + if(b->dry){ printf("[sched] zbuf: clear_done wait (dry-run)\n"); return 0; } + int g=0; while(!(rd32(b,OFF_LPDDR_STATUS)&CLEAR_DONE)&&g<40000000)g++; + if(!(rd32(b,OFF_LPDDR_STATUS)&CLEAR_DONE)){ fprintf(stderr," FAIL: persistent-Z clear_done never rose (Z preclear stuck)\n"); return -1; } + printf("[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO\n"); + return 0; +} +// Ch357 — fail-closed drop gate: the per-scene snapshot delta MUST be 0 and the sticky flag MUST be clear. Any dropped +// fragment (request-FIFO overflow) fails the run here rather than silently corrupting the frame. +static int check_no_drops(br_t*b, int k, uint32_t before){ + if(b->dry) return 0; + uint32_t after=rd32(b,OFF_FRAG_DROPS), st=rd32(b,OFF_LPDDR_STATUS); + if(after!=before || (st&DROPS_NONZERO)){ + fprintf(stderr," FAIL epoch %d: %u fragment(s) DROPPED this scene (snap %u->%u, sticky=%u)\n", + k, after-before, before, after, (st&DROPS_NONZERO)?1:0); + return -1; + } + printf("[sched] epoch %d: zero fragment drops (snap=%u, sticky=0)\n", k, after); + return 0; +} +static int go_await_drain(br_t*b, int k, int exp_records, int expect_stale){ + uint32_t recs_before=b->dry?0:rd32(b,OFF_STG_HI); + uint32_t beats_before=b->dry?0:rd32(b,OFF_LPDDR_BYTES); + wr32(b, OFF_GO, 0x1); + if(b->dry){ printf("[sched] epoch %d: GO (dry-run)\n", k); return 0; } + if (expect_stale && wait_status_level(b,FRAME_DRAINED,0,1000)){ + // A very short draw can clear and reassert frame_drained entirely + // between two HPS bridge reads. Accept that missed-low case only + // when the per-GO completion counters prove that new work finished; + // otherwise retain the fail-closed stale-drain gate. + uint32_t st=rd32(b,OFF_LPDDR_STATUS), recs=rd32(b,OFF_STG_HI), beats=rd32(b,OFF_LPDDR_BYTES); + if (!(st&FRAME_DRAINED) || recs!=(uint32_t)exp_records || + (recs==recs_before && beats==beats_before)) { + fprintf(stderr," FAIL epoch %d: frame_drained never fell — STALE drain" + " (records %u->%u, FB beats %u->%u)\n", + k,recs_before,recs,beats_before,beats); + return -1; + } + printf("[sched] epoch %d: drain low pulse completed between host polls;" + " counters advanced (records %u->%u, FB beats %u->%u)\n", + k,recs_before,recs,beats_before,beats); + } + if (wait_status_level(b,FRAME_DRAINED,1,120000)) + fprintf(stderr," FAIL epoch %d: frame_drained rise timeout after 120 s\n", k); + if (wait_ready(b)) return -1; + uint32_t fd=rd32(b,OFF_LPDDR_STATUS)&FRAME_DRAINED, by=rd32(b,OFF_LPDDR_BYTES), recs=rd32(b,OFF_STG_HI); + printf("[sched] epoch %d: GO -> fresh drain frame_drained=%u, records=%u (exp %d), FB beats=%u\n", + k, fd?1:0, recs, exp_records, by); + if (fd==0 || by==0){ fprintf(stderr," FAIL epoch %d: empty render (frame_drained=%u beats=%u)\n", k, fd?1:0, by); return -1; } + if ((int)recs!=exp_records) fprintf(stderr," warn epoch %d: records=%u != %d\n", k, recs, exp_records); + return 0; +} + +// Optional board evidence: dump the rendered linear PSMCT32 LPDDR framebuffer at base 0 before HDMI scanout is enabled. +// This uses the same HPS read-probe contract as ps2_sh3_tex_upload.c: write byte address, wait rd_pending clear, +// then read the latched word back from OFF_LPDDR_RDADDR. +static int dump_fb(br_t*b, const char*path, int fbwords, int fbpxw, int fbh){ + if(!path) return 0; + if(b->dry){ printf("[sched] dump-fb %s (%d words, dry-run)\n", path, fbwords); return 0; } + FILE*f=fopen(path,"w"); + if(!f){ fprintf(stderr," FAIL: open dump-fb %s: %s\n", path, strerror(errno)); return -1; } + + uint32_t sum=0, xr=0, nonzero=0; + int minx=-1, miny=-1, maxx=-1, maxy=-1, timeouts=0; + for(int i=0;i0){ + int x=i%fbpxw, y=i/fbpxw; + if(minx<0 || xmaxx) maxx=x; + if(miny<0 || ymaxy) maxy=y; + } + } + } + if(fclose(f)){ fprintf(stderr," FAIL: close dump-fb %s: %s\n", path, strerror(errno)); return -1; } + printf("[sched] dump-fb: wrote %d words -> %s sum32=0x%08x xor32=0x%08x nonzero=%u", + fbwords, path, sum, xr, nonzero); + if(fbpxw>0 && fbh>0 && minx>=0) printf(" bounds=(%d,%d)..(%d,%d) FB=%dx%d", minx,miny,maxx,maxy,fbpxw,fbh); + if(timeouts) printf(" rd_pending_timeouts=%d", timeouts); + printf("\n"); + return timeouts ? -1 : 0; +} + +// Run one complete descriptor table as a frame. A scene boundary deliberately drops arm/video before preclear so +// the following arm rise invalidates and clears persistent Z again; prior_scene makes the first GO demand a fresh +// high->low->high drain rather than accepting the preceding frame's stale completion. +static int run_scene(br_t*br, const char*epf, const char*datadir, int zbuf, const char*dump_fb_path, + int prior_scene, int present_ms){ + static sched_t S; if (parse_epochs(epf,&S)<0) return 1; + printf("[sched] scene %s: %d epochs, FB %d words, tex %d words/%d beats%s\n", + epf, S.n_epochs, S.fbwords, S.tex_words, S.n_beats, prior_scene?" (fresh after prior frame)":""); + + // Keep memory bounded as coverage scales into thousands of epochs. The + // old [MAX_EPOCHS][TEX_MAX] preload consumed 128 MiB at 512 epochs and + // would exceed 2 GiB at 8192. Validate with one scratch set, then reload + // that epoch immediately before it is sent to the board. + static uint32_t tex[TEX_MAX], pal[256]; static uint64_t list[STG_MAX]; + uint32_t last_fill_crc=0; + for (int k=0;kdry) usleep(1000); + int rc=0; + wr32(br, OFF_LPDDR_FBBASE, 0); + rc|=preclear_fb(br, S.fbwords); + if (zbuf){ + rc|=preclear_range(br, 0x140000, S.fbwords/2, "Z"); + wr32(br, OFF_LPDDR_CTRL, 0x1); + printf("[sched] zbuf: armed early for fresh frame Z-preclear\n"); + } + for (int k=0;kdry && (rcrc!=S.ep[k].crc || rbeats!=(uint32_t)S.n_beats)){ + fprintf(stderr," FAIL epoch %d: resident texture cache disturbed (residency broken)\n",k); rc|=1; } + } else { + if(load32(pt,tex,S.tex_words)!=S.tex_words){fprintf(stderr,"tex reload failed epoch %d\n",k);return 1;} + rc|=upload_and_fill(br,k,tex,S.tex_words,S.ep[k].lpddr,S.ep[k].crc,S.n_beats); + } + if (strcmp(S.ep[k].pal,"-")) { + char pp[256]; snprintf(pp,sizeof pp,"%s/%s",datadir,S.ep[k].pal); + if(load32(pp,pal,256)!=256){fprintf(stderr,"palette reload failed epoch %d\n",k);return 1;} + rc|=upload_palette(br,k,pal,S.ep[k].pal_crc); + } + rc|=stream_list(br,k,list,nw); + if (k==0 && !zbuf) wr32(br, OFF_LPDDR_CTRL, 0x1); + if (zbuf && k==0) rc|=wait_clear_done(br); + uint32_t drops0 = (zbuf && !br->dry) ? rd32(br,OFF_FRAG_DROPS) : 0; + rc|=go_await_drain(br,k,S.ep[k].records,(k>0)||prior_scene); + if (zbuf) rc|=check_no_drops(br,k,drops0); + } + rc|=dump_fb(br, dump_fb_path, S.fbwords, S.fbpxw, S.fbh); + wr32(br, OFF_LPDDR_CTRL, 0x1|0x4); + printf("[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (%d-epoch composite)\n", S.n_epochs); + if (present_ms>0 && !br->dry){ printf("[sched] presenting for %d ms\n",present_ms); usleep((useconds_t)present_ms*1000u); } + return rc; +} + +int main(int argc, char**argv){ + unsigned long base=0x40000000UL; int dry=0; char*env=getenv("PS2_BRIDGE_BASE"); if(env) base=strtoul(env,NULL,0); + const char *epf="sh3_sched_epochs.txt", *datadir=".", *dump_fb_path=NULL, *dump_prefix=NULL, *sequence=NULL; + int loops=1, frame_ms=100; + int zbuf=0; // Ch357 GS_SH3_LPDDR_FB_Z: also preclear the LPDDR Z region + ARM EARLY (so z_rmw's clear_start + // Z-preclear overlaps the ~1.6ms texture uploads and completes long before the first GO — no drops). + for (int i=1;i= 1, and --frame-ms >= 0\n"); rc=1; } + if(!rc) { + for(int n=0;n0, + final_scene ? 0 : frame_ms); + } + } + } + } else { + rc|=run_scene(&br,epf,datadir,zbuf,dump_fb_path,0,0); + } + + if(!dry){ munmap(map,0x2000); close(fd); } + printf("[sched] DONE rc=%d %s\n", rc, rc?"(a gate failed above)":"(all gates passed)"); + return rc?1:0; +} diff --git a/tools/ps2_sh3_tex_upload.c b/tools/ps2_sh3_tex_upload.c index 865fcce..0d39546 100644 --- a/tools/ps2_sh3_tex_upload.c +++ b/tools/ps2_sh3_tex_upload.c @@ -35,10 +35,21 @@ #define OFF_TEX_RD_ERRS 0x068 // R: fill non-OKAY read responses (expect 0) #define OFF_TEX_FILL_CRC 0x070 // R: sum32 of EVERY word the cache wrote into tex_mem (must == file sum32) #define OFF_FEEDER_GO 0x0E8 // W[0]: trigger/retrigger the feeder +// Ch353 — GS_SH3_LPDDR_FB (--lpddr-fb) additions: preclear the LPDDR framebuffer + drive Codex's host-start sequence. +#define OFF_LPDDR_CTRL 0x018 // W: [0]arm [1]canary [2]video_src [3]scanout_lb (arm/base/canary latch on write) +#define OFF_LPDDR_FB_BASE 0x01C // W: FB base byte addr (writer fb_base); set BEFORE the 0x018 arm-commit +#define OFF_LPDDR_STATUS 0x02C // R: [0]idle (writer drained, stable post-render) [3]rd_pending +#define OFF_LPDDR_BYTES 0x030 // R: FB writer beats written (snapped at idle) — non-zero after a real render +#define OFF_FEEDER_STATUS 0x0D8 // R: [0] feeder control FSM in C_READY (setup + CLUT done) +#define IDLE_BIT 0x1 // 0x02C bit0 — writer idle (TRANSIENT: pulses between feeder render batches) +#define FRAME_DRAINED_BIT 0x40 // 0x02C bit6 — Ch353 STABLE ordered drain ack (poll THIS, not idle) +#define READY_BIT 0x1 // 0x0D8 bit0 #define N_WORDS 65536 // 512*512 PSMT8 / 4 #define TEX_BYTES 262144 #define N_BEATS 8192 // TEX_BYTES / 32 +#define FB_WORDS 85504 // Ch353 — 256*334 PSMCT32 framebuffer (0x000000..0x0537FF) +#define FB_BYTES 342016 typedef struct { volatile uint8_t *base; int dry; } bridge_t; static void wr32(bridge_t *b, int off, uint32_t v){ if(!b->dry) *(volatile uint32_t*)(b->base+off)=v; } @@ -48,7 +59,7 @@ int main(int argc, char **argv){ unsigned long base = 0x40000000UL; // PS2 HPS-bridge base (override --base or PS2_BRIDGE_BASE) unsigned long lpddr_base = 0x00200000; // EMIF byte base where the texture is staged (= TEX_LPDDR_BASE RTL) const char *texfile = "sh3_real_tex_lpddr.mem"; - int dry=0, do_fill=1, do_retrig=1; + int dry=0, do_fill=1, do_retrig=1, lpddr_fb=0, fb_rows=334; // fb_rows: 334 (Ch353 single) / 338 (Ch354 multi) char *env = getenv("PS2_BRIDGE_BASE"); if (env) base = strtoul(env,NULL,0); for (int i=1;i ONE frame_drained, which HARD-gates the line-buffer scanout (no timeout; failure stays + // black). Confirm the drain via LPDDR_STATUS[0] idle (stable post-render) + LPDDR_BYTES!=0 (a frame was written). ---- + if (lpddr_fb && !dry){ + wr32(&br, OFF_LPDDR_FB_BASE, 0x00000000u); // step 5: FB base 0 ... + wr32(&br, OFF_LPDDR_CTRL, 0x1); // ... canary off, ARM the writer (commit snapshots base/arm) + wr32(&br, OFF_FEEDER_GO, 0x1); // step 6: GO -> render epoch -> one EOF -> one frame_drained + printf("[ps2_sh3_tex_upload] (lpddr-fb) writer armed (base 0, canary off), feeder GO issued.\n"); + // step 7: await the ORDERED drain ack (0x02C[6] frame_drained) — STABLE, asserts only after the EOF marker's + // last BRESP. Do NOT poll [0]idle: it pulses between the feeder's render batches and reads a mid-render count. + { int g=0; while(!(rd32(&br,OFF_LPDDR_STATUS)&FRAME_DRAINED_BIT) && g<40000000) g++; } + uint32_t fd = (rd32(&br,OFF_LPDDR_STATUS)&FRAME_DRAINED_BIT)?1:0, fbb = rd32(&br,OFF_LPDDR_BYTES); + printf("[ps2_sh3_tex_upload] (lpddr-fb) drain: frame_drained=%u, FB beats written=%u (exp ~6500 for the full frame)\n", fd, fbb); + if (!fd || fbb==0) + fprintf(stderr,"WARN: drain not confirmed (frame_drained=%u beats=%u) — display stays BLACK (hard gate, no timeout).\n", fd, fbb); + wr32(&br, OFF_LPDDR_CTRL, 0x1|0x4); // step 8: arm=1 + video_src=1 -> HDMI sources the LPDDR scanout + printf("[ps2_sh3_tex_upload] (lpddr-fb) video_src=1 -> HDMI now sources the LPDDR line-buffer scanout (256x%u).\n", (unsigned)fb_rows); + } + // ---- (4) retrigger the feeder so the scene re-renders with the warm cache (crop profile path) ---- + else if (do_retrig && !dry){ wr32(&br, OFF_FEEDER_GO, 0x1); printf("[ps2_sh3_tex_upload] feeder retriggered.\n"); } if (!dry){ munmap(map,0x1000); close(fd); } printf("[ps2_sh3_tex_upload] DONE — check HDMI vs the crop reference (recon/sh3_real_ref.png).\n"); diff --git a/tools/rank_sched_triangle_coverage.py b/tools/rank_sched_triangle_coverage.py new file mode 100755 index 0000000..9a9e647 --- /dev/null +++ b/tools/rank_sched_triangle_coverage.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python3 +"""Rank one-triangle runtime-scheduler epochs by 640x480 pixel coverage. + +Usage: rank_sched_triangle_coverage.py TAG [--top N] + +The generated feeder format stores an eight-word header followed by three +{RGBAQ, ST, XYZ2} vertex triplets. This is a capacity preflight: it uses the +same center-sample inside test as the fixture reference and reports epochs +whose unthrottled fragment burst may exceed the production request FIFO. +""" +import os +import sys + +ROOT = os.path.normpath(os.path.join(os.path.dirname(__file__), "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") + + +def edge(ax, ay, bx, by, px, py): + return (px - ax) * (by - ay) - (py - ay) * (bx - ax) + + +def coverage(vertices, width=640, height=480): + (x0, y0), (x1, y1), (x2, y2) = vertices + area = edge(x0, y0, x1, y1, x2, y2) + if not area: + return 0 + inv = 1.0 / area + minx = max(0, int(min(x0, x1, x2))) + maxx = min(width - 1, int(max(x0, x1, x2)) + 1) + miny = max(0, int(min(y0, y1, y2))) + maxy = min(height - 1, int(max(y0, y1, y2)) + 1) + count = 0 + for py in range(miny, maxy + 1): + cy = py + 0.5 + for px in range(minx, maxx + 1): + cx = px + 0.5 + w0 = edge(x1, y1, x2, y2, cx, cy) * inv + w1 = edge(x2, y2, x0, y0, cx, cy) * inv + w2 = 1.0 - w0 - w1 + if w0 >= -0.001 and w1 >= -0.001 and w2 >= -0.001: + count += 1 + return count + + +def main(argv): + if len(argv) < 2: + print(__doc__.strip()) + return 2 + tag = argv[1] + top = int(argv[argv.index("--top") + 1]) if "--top" in argv else 12 + rows = [] + table = os.path.join(DATA, f"sh3_{tag}_epochs.txt") + with open(table) as source: + for line in source: + fields = line.split() + if not fields or not fields[0].isdigit(): + continue + epoch, list_name, ntris = int(fields[0]), fields[8], int(fields[10]) + words = [] + with open(os.path.join(DATA, list_name)) as feeder: + for text in feeder: + text = text.strip() + if text and not text.startswith("//"): + words.append(int(text, 16)) + total = 0 + peak = 0 + peak_vertices = None + for ti in range(ntris): + base = 8 + ti * 9 + xyz = [words[base + 2], words[base + 5], words[base + 8]] + vertices = [((word >> 4) & 0xFFF, (word >> 20) & 0xFFF) for word in xyz] + count = coverage(vertices) + total += count + if count > peak: + peak = count + peak_vertices = vertices + rows.append((total, epoch, ntris, peak, peak_vertices)) + rows.sort(reverse=True) + print(f"[coverage] tag={tag} epochs={len(rows)}") + for count, epoch, ntris, peak, vertices in rows[:top]: + print(f"[coverage] epoch={epoch:4d} pixels={count:6d} tris={ntris:3d} peak_tri={peak:6d} vertices={vertices}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/report_zsched_issue_uv.py b/tools/report_zsched_issue_uv.py new file mode 100644 index 0000000..a57349b --- /dev/null +++ b/tools/report_zsched_issue_uv.py @@ -0,0 +1,104 @@ +#!/usr/bin/env python3 +"""Compact ZSCHED trace-vs-model summary. + +Use after tb_top_psmct32_sh3_zsched regenerates sim/traces/rtl/zsched_*.txt. +It compares the current feeder-derived fixed-point model against the RTL issue +and fragment traces, split by epoch. +""" +import contextlib +import io +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +sys.path.insert(0, HERE) + +with contextlib.redirect_stdout(io.StringIO()): + import diagnose_zsched_persp as D + + +def load_frags(path): + out = [] + with open(path) as f: + for ln in f: + p = ln.split() + if len(p) >= 5: + out.append((int(p[0]), int(p[1]), int(p[2]), int(p[3]), int(p[4], 16) & 0xFFFFFF)) + return out + + +def load_issue(path): + out = [] + with open(path) as f: + for ln in f: + p = ln.split() + if len(p) >= 7: + out.append((int(p[0]), int(p[1]), int(p[2]), int(p[3]), int(p[4]), int(p[5]), int(p[6]))) + return out + + +def pct(ok, n): + return 100.0 * ok / n if n else 0.0 + + +def main(argv): + trace_dir = os.path.join(ROOT, "sim", "traces", "rtl") + frag_path = argv[1] if len(argv) > 1 else os.path.join(trace_dir, "zsched_frags.txt") + issue_path = argv[2] if len(argv) > 2 else os.path.join(trace_dir, "zsched_issue.txt") + + with contextlib.redirect_stdout(io.StringIO()): + _draw_idxs, _tris, _fb, _owner, _emitted, _accepted, model = D.render("zsched") + frags = load_frags(frag_path) + issue = load_issue(issue_path) + n = min(len(model), len(frags), len(issue)) + + by_ep = {} + coord_miss = z_miss = 0 + for i in range(n): + me = model[i] + hwf = frags[i] + hwi = issue[i] + ep = hwf[0] + st = by_ep.setdefault(ep, { + "n": 0, "color": 0, "u": 0, "v": 0, "uv": 0, + "u_ge512": 0, "v_ge512": 0, + }) + st["n"] += 1 + if me[:3] != hwf[:3]: + coord_miss += 1 + if abs(me[3] - hwf[3]) > 256: + z_miss += 1 + if (me[4] & 0xFFFFFF) != hwf[4]: + st["color"] += 1 + if me[5] != hwi[4]: + st["u"] += 1 + if me[6] != hwi[5]: + st["v"] += 1 + if me[5] != hwi[4] or me[6] != hwi[5]: + st["uv"] += 1 + if hwi[4] >= 512: + st["u_ge512"] += 1 + if hwi[5] >= 512: + st["v_ge512"] += 1 + + print(f"[uv] model={len(model)} frags={len(frags)} issue={len(issue)} compared={n} coord_miss={coord_miss} z_gt256={z_miss}") + for ep in sorted(by_ep): + st = by_ep[ep] + n_ep = st["n"] + u_ok = n_ep - st["u"] + v_ok = n_ep - st["v"] + uv_ok = n_ep - st["uv"] + c_ok = n_ep - st["color"] + print( + f"[uv] e{ep}: n={n_ep} " + f"color_ok={c_ok}/{n_ep} ({pct(c_ok,n_ep):.2f}%) " + f"u_ok={u_ok}/{n_ep} ({pct(u_ok,n_ep):.2f}%) " + f"v_ok={v_ok}/{n_ep} ({pct(v_ok,n_ep):.2f}%) " + f"uv_ok={uv_ok}/{n_ep} ({pct(uv_ok,n_ep):.2f}%) " + f"rtl_u_ge512={st['u_ge512']} rtl_v_ge512={st['v_ge512']}" + ) + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/score_zsched_model_oracle.py b/tools/score_zsched_model_oracle.py new file mode 100644 index 0000000..744dd30 --- /dev/null +++ b/tools/score_zsched_model_oracle.py @@ -0,0 +1,84 @@ +#!/usr/bin/env python3 +"""Score the feeder-derived fixed-point ZSCHED model with the TB oracle rule.""" +import contextlib +import io +import os +import sys + +HERE = os.path.dirname(os.path.abspath(__file__)) +ROOT = os.path.normpath(os.path.join(HERE, "..")) +DATA = os.path.join(ROOT, "sim", "data", "top_psmct32_raster_demo") +sys.path.insert(0, HERE) + +with contextlib.redirect_stdout(io.StringIO()): + import diagnose_zsched_persp as D + + +def load_mem(path): + out = [] + with open(path) as f: + for line in f: + s = line.strip() + if s and not s.startswith("//"): + out.append(int(s, 16) & 0xFFFFFFFF) + return out + + +def cell(idx_words, pal, u, v): + if not (0 <= u < D.TW and 0 <= v < D.TH): + return None + lin = v * D.TW + u + ci = (idx_words[lin // 4] >> (8 * (lin % 4))) & 0xFF + return pal[ci] & 0xFFFFFF + + +def main(argv): + tag = argv[1] if len(argv) > 1 else "zsched" + with contextlib.redirect_stdout(io.StringIO()): + draw_idxs, _tris, fb, _owner, _emitted, _accepted, _frags = D.render(tag) + + idx = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_idx.mem")) for e in range(len(draw_idxs))] + pal = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_pal.mem")) for e in range(len(draw_idxs))] + refmap = load_mem(os.path.join(DATA, f"sh3_{tag}_refmap.mem")) + ref_ep = [load_mem(os.path.join(DATA, f"sh3_{tag}{e}_refmap.mem")) for e in range(len(draw_idxs))] + + all_tot = all_ok = multi_tot = multi_ok = clut_bad = 0 + for o, rw in enumerate(refmap): + if not (rw >> 31): + continue + fbc = fb[o] & 0xFFFFFF + all_tot += 1 + matched = False + for e in range(len(draw_idxs)): + ew = ref_ep[e][o] + if not (ew >> 31): + continue + tu = (ew >> 9) & 0x1FF + tv = ew & 0x1FF + for rad in range(2): + for du in range(-rad, rad + 1): + for dv in range(-rad, rad + 1): + if max(abs(du), abs(dv)) != rad: + continue + if cell(idx[e], pal[e], tu + du, tv + dv) == fbc: + matched = True + if matched: + all_ok += 1 + if rw & (1 << 28): + multi_tot += 1 + if matched: + multi_ok += 1 + if fbc != 0: + in_pal = any((p & 0xFFFFFF) == fbc for pp in pal for p in pp) + if not in_pal: + clut_bad += 1 + + all_pct = 100.0 * all_ok / all_tot if all_tot else 0.0 + multi_pct = 100.0 * multi_ok / multi_tot if multi_tot else 0.0 + print(f"[model-oracle] tag={tag} ALL={all_ok}/{all_tot} ({all_pct:.2f}%) " + f"MULTI={multi_ok}/{multi_tot} ({multi_pct:.2f}%) clut_bad={clut_bad}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/scp_ch357_to_board.sh b/tools/scp_ch357_to_board.sh new file mode 100755 index 0000000..cdaa209 --- /dev/null +++ b/tools/scp_ch357_to_board.sh @@ -0,0 +1,45 @@ +#!/bin/sh +# retroDE_ps2 — copy the Ch357 (native 640x480) board-side files to the DE25. +# +# One scp invocation => a single password prompt. Copies to the home dir so the host runs from ~ and the descriptor +# table (sh3_s640_epochs.txt) finds the tex/list files by their relative names. +# +# ./tools/scp_ch357_to_board.sh # default terasic@192.168.50.161:~ +# ./tools/scp_ch357_to_board.sh user@host:dir # override destination +# +# On the board afterward: +# gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +# sudo ./ps2_sh3_sched sh3_s640_epochs.txt +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_s640_epochs.txt +$DATA/sh3_s6400_tex_lpddr.mem +$DATA/sh3_s6401_tex_lpddr.mem +$DATA/sh3_s6402_tex_lpddr.mem +$DATA/feeder_sh3_s6400.mem +$DATA/feeder_sh3_s6401.mem +$DATA/feeder_sh3_s6402.mem +" + +# fail early with a clear message if anything is missing (e.g. fixtures not emitted yet) +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "" >&2 + echo "Regenerate the LOCAL 640 fixtures first:" >&2 + echo " python3 tools/gs_make_sh3_scheduler_fixture.py --fb640 --emit" >&2 + exit 1 +fi + +echo "Copying 8 files -> $DEST (one password prompt):" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640_to_board.sh b/tools/scp_zs640_to_board.sh new file mode 100755 index 0000000..311f8ac --- /dev/null +++ b/tools/scp_zs640_to_board.sh @@ -0,0 +1,71 @@ +#!/bin/sh +# retroDE_ps2 — copy the Ch358 persistent-Z NATIVE-640x480 (GS_SH3_LPDDR_FB_Z + GS_SH3_LPDDR_FB_640) board files to the DE25. +# +# This is the file set for the ZS640 profile (sh3_zs640_epochs.txt, fbpxw 640 fbh 480) — the strong-reject persistent-Z +# scene at authentic native screen coordinates, built by the GS_SH3_LPDDR_FB_Z+_640 RBF. (NOT sh3_zsched=256x210 or the +# paint-order sh3_s640; those are other profiles.) Copies to the home dir so the host runs from ~ and the epoch +# descriptor finds the tex/list files by their relative names. +# +# ./tools/scp_zs640_to_board.sh # default terasic@192.168.50.161:~ +# ./tools/scp_zs640_to_board.sh user@host:dir # override destination +# +# STEP 0 — LOAD THE FRESH CORE FIRST. This script copies the 8 host/data files ONLY, NOT the RBF. +# Deploy output_files/retroDE_ps2.core.rbf (verify its timestamp is from the signoff-clean fit!) via the usual +# core loader and confirm it is LIVE before trusting any host run: the Ch358 core scans out 640x480 (Ch357's +# zsched core was 256x210), and the host dump must report bounds=(407,97)..(619,306). +# +# On the board afterward (persistent-Z needs --zbuf: preclear the LPDDR Z region + arm EARLY): +# gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +# sudo ./ps2_sh3_sched --zbuf sh3_zs640_epochs.txt +# +# Board framebuffer readback for the Ch358 board proof (PSMCT32 linear, 640x480 for this profile): +# sudo ./ps2_sh3_sched --zbuf sh3_zs640_epochs.txt --dump-fb sh3_zs640_board_fb.mem +# scp terasic@192.168.50.161:~/sh3_zs640_board_fb.mem sim/data/top_psmct32_raster_demo/ +# python3 tools/gs_fb_to_png.py sim/data/top_psmct32_raster_demo/sh3_zs640_board_fb.mem \ +# sim/data/top_psmct32_raster_demo/sh3_zs640_board_fb.png 640 480 3 +# make -C sim sh3_zs640_board_compare +# +# Exact emitted-fragment color replay (also run by sh3_zs640_board_compare): +# python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zs640_board_fb.mem \ +# --tag zs640 --owner replay-color --frags sim/traces/rtl/zs640_frags.txt +# +# Regenerate the LOCAL zs640 fixtures with the signoff reference contract: +# make -C sim sh3_zs640_fixture +# Equivalent explicit emit: +# python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 8634,12757,145742 --authz --fb640 --tag zs640 \ +# --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zs640_epochs.txt +$DATA/sh3_zs6400_tex_lpddr.mem +$DATA/sh3_zs6401_tex_lpddr.mem +$DATA/sh3_zs6402_tex_lpddr.mem +$DATA/feeder_sh3_zs6400.mem +$DATA/feeder_sh3_zs6401.mem +$DATA/feeder_sh3_zs6402.mem +" + +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "" >&2 + echo "Regenerate the LOCAL zs640 fixtures first (dump-derived, local-only):" >&2 + echo " make -C sim sh3_zs640_fixture" >&2 + echo " # or:" >&2 + echo " python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 8634,12757,145742 --authz --fb640 --tag zs640 \\" >&2 + echo " --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit" >&2 + exit 1 +fi + +echo "Copying 8 files -> $DEST (one password prompt):" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640c12_to_board.sh b/tools/scp_zs640c12_to_board.sh new file mode 100755 index 0000000..f4f8f12 --- /dev/null +++ b/tools/scp_zs640c12_to_board.sh @@ -0,0 +1,67 @@ +#!/bin/sh +# retroDE_ps2 — copy the Ch360 shared-texture persistent-Z NATIVE-640x480 board files to the DE25. +# +# This is the C12 file set (sh3_zs640c12_epochs.txt, fbpxw 640 fbh 480): twelve authentic SH3 draws in FOUR ordered, +# shared-texture epochs at native screen coordinates. The C12 bootlet words are byte-identical to the loaded C6 RBF's +# bootlet words, so no re-fit is needed. Copies go to the home dir so the host can resolve relative texture/list paths. +# +# ./tools/scp_zs640c12_to_board.sh # default terasic@192.168.50.161:~ +# ./tools/scp_zs640c12_to_board.sh user@host:dir # override destination +# +# STEP 0 — CONFIRM THE C6-SIGNOFF CORE IS LIVE. This script copies the 7 host/data files ONLY, NOT the RBF. +# C12 reuses its exact bootlet memory words. The host run must report four epochs, one fill, three reuses, and zero drops. +# +# On the board afterward (persistent-Z needs --zbuf: preclear the LPDDR Z region + arm EARLY): +# gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +# sudo ./ps2_sh3_sched --zbuf sh3_zs640c12_epochs.txt +# +# Board framebuffer readback for the Ch360 C12 board proof (PSMCT32 linear, 640x480): +# sudo ./ps2_sh3_sched --zbuf sh3_zs640c12_epochs.txt --dump-fb sh3_zs640c12_board_fb.mem +# scp terasic@192.168.50.161:~/sh3_zs640c12_board_fb.mem sim/data/top_psmct32_raster_demo/ +# python3 tools/gs_fb_to_png.py sim/data/top_psmct32_raster_demo/sh3_zs640c12_board_fb.mem \ +# sim/data/top_psmct32_raster_demo/sh3_zs640c12_board_fb.png 640 480 3 +# make -C sim sh3_zs640c12_board_compare +# +# Exact emitted-fragment color replay (also run by sh3_zs640c12_board_compare): +# python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zs640c12_board_fb.mem \ +# --tag zs640c12 --owner replay-color --frags sim/traces/rtl/zs640c12_frags.txt +# +# Regenerate the LOCAL zs640c12 fixtures with the signoff reference contract: +# make -C sim sh3_zs640c12_fixture +# Equivalent explicit emit: +# python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814 --group-size 3 --authz --fb640 --tag zs640c12 \ +# --pscale 1024,1024,1024,1024 --xy-quant round,round,round,round --ref-xy-quant --emit +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zs640c12_epochs.txt +$DATA/sh3_zs640c120_tex_lpddr.mem +$DATA/feeder_sh3_zs640c120.mem +$DATA/feeder_sh3_zs640c121.mem +$DATA/feeder_sh3_zs640c122.mem +$DATA/feeder_sh3_zs640c123.mem +" + +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "" >&2 + echo "Regenerate the LOCAL zs640c12 fixtures first (dump-derived, local-only):" >&2 + echo " make -C sim sh3_zs640c12_fixture" >&2 + echo " # or:" >&2 + echo " python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 119471,119684,119897,120110,120323,120536,120749,120962,121175,121388,121601,121814 --group-size 3 --authz --fb640 --tag zs640c12 \\" >&2 + echo " --pscale 1024,1024,1024,1024 --xy-quant round,round,round,round --ref-xy-quant --emit" >&2 + exit 1 +fi + +echo "Copying 7 files -> $DEST (one password prompt):" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640c18_to_board.sh b/tools/scp_zs640c18_to_board.sh new file mode 100755 index 0000000..0a2907c --- /dev/null +++ b/tools/scp_zs640c18_to_board.sh @@ -0,0 +1,31 @@ +#!/bin/sh +# Copy Ch361 C18 host data only. Its bootlet words are byte-identical to the loaded C6 core; no RBF is copied. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zs640c18_epochs.txt +$DATA/sh3_zs640c180_tex_lpddr.mem +$DATA/feeder_sh3_zs640c180.mem +$DATA/feeder_sh3_zs640c181.mem +$DATA/feeder_sh3_zs640c182.mem +$DATA/feeder_sh3_zs640c183.mem +$DATA/feeder_sh3_zs640c184.mem +$DATA/feeder_sh3_zs640c185.mem +" + +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "Regenerate C18 first: make -C sim sh3_zs640c18_fixture" >&2 + exit 1 +fi + +echo "Copying 9 C18 host/data files -> $DEST" +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640c6_to_board.sh b/tools/scp_zs640c6_to_board.sh new file mode 100755 index 0000000..a651f0c --- /dev/null +++ b/tools/scp_zs640c6_to_board.sh @@ -0,0 +1,67 @@ +#!/bin/sh +# retroDE_ps2 — copy the Ch359 shared-texture persistent-Z NATIVE-640x480 board files to the DE25. +# +# This is the C6 file set (sh3_zs640c6_epochs.txt, fbpxw 640 fbh 480): six authentic SH3 draws in two ordered, +# shared-texture epochs at native screen coordinates. It requires the sh3_lpddr_fb_z640c6 RBF so the bootlet +# preloads the matching C6 CLUT. Copies go to the home dir so the host can resolve relative texture/list paths. +# +# ./tools/scp_zs640c6_to_board.sh # default terasic@192.168.50.161:~ +# ./tools/scp_zs640c6_to_board.sh user@host:dir # override destination +# +# STEP 0 — LOAD THE FRESH CORE FIRST. This script copies the 5 host/data files ONLY, NOT the RBF. +# Deploy output_files/retroDE_ps2.core.rbf (verify its timestamp is from the signoff-clean fit!) via the usual +# core loader and confirm it is LIVE before trusting any host run. The C6 host dump must report +# bounds=(84,101)..(340,301); a different bound means the wrong fixture or core is live. +# +# On the board afterward (persistent-Z needs --zbuf: preclear the LPDDR Z region + arm EARLY): +# gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +# sudo ./ps2_sh3_sched --zbuf sh3_zs640c6_epochs.txt +# +# Board framebuffer readback for the Ch359 C6 board proof (PSMCT32 linear, 640x480): +# sudo ./ps2_sh3_sched --zbuf sh3_zs640c6_epochs.txt --dump-fb sh3_zs640c6_board_fb.mem +# scp terasic@192.168.50.161:~/sh3_zs640c6_board_fb.mem sim/data/top_psmct32_raster_demo/ +# python3 tools/gs_fb_to_png.py sim/data/top_psmct32_raster_demo/sh3_zs640c6_board_fb.mem \ +# sim/data/top_psmct32_raster_demo/sh3_zs640c6_board_fb.png 640 480 3 +# make -C sim sh3_zs640c6_board_compare +# +# Exact emitted-fragment color replay (also run by sh3_zs640c6_board_compare): +# python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zs640c6_board_fb.mem \ +# --tag zs640c6 --owner replay-color --frags sim/traces/rtl/zs640c6_frags.txt +# +# Regenerate the LOCAL zs640c6 fixtures with the signoff reference contract: +# make -C sim sh3_zs640c6_fixture +# Equivalent explicit emit: +# python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 119471,119684,119897,120110,120323,120536 --group-size 3 --authz --fb640 --tag zs640c6 \ +# --pscale auto,auto --xy-quant round,round --ref-xy-quant --emit +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zs640c6_epochs.txt +$DATA/sh3_zs640c60_tex_lpddr.mem +$DATA/feeder_sh3_zs640c60.mem +$DATA/feeder_sh3_zs640c61.mem +" + +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "" >&2 + echo "Regenerate the LOCAL zs640c6 fixtures first (dump-derived, local-only):" >&2 + echo " make -C sim sh3_zs640c6_fixture" >&2 + echo " # or:" >&2 + echo " python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 119471,119684,119897,120110,120323,120536 --group-size 3 --authz --fb640 --tag zs640c6 \\" >&2 + echo " --pscale auto,auto --xy-quant round,round --ref-xy-quant --emit" >&2 + exit 1 +fi + +echo "Copying 5 files -> $DEST (one password prompt):" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640m28_to_board.sh b/tools/scp_zs640m28_to_board.sh new file mode 100755 index 0000000..ae14a2d --- /dev/null +++ b/tools/scp_zs640m28_to_board.sh @@ -0,0 +1,20 @@ +#!/bin/sh +# Copy Ch364's mixed-residency scheduler host data. The fitted MT5 RBF is valid: bootlet words match exactly. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zs640m28_epochs.txt" + +for k in 0 1 2 3 4 5 6 7 8 9 10 11; do + FILES="$FILES $DATA/sh3_zs640m28${k}_tex_lpddr.mem $DATA/feeder_sh3_zs640m28${k}.mem" +done + +for f in $FILES; do + test -f "$f" || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch364 mixed-residency host/data files -> $DEST" +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640motion_to_board.sh b/tools/scp_zs640motion_to_board.sh new file mode 100755 index 0000000..cff49ee --- /dev/null +++ b/tools/scp_zs640motion_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Copy the Ch365 A-to-B motion scheduler inputs to the DE25 board. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zs640m28_epochs.txt $DATA/sh3_zs640b24_epochs.txt $DATA/sh3_zs640c24c_epochs.txt" + +for k in 0 1 2 3 4 5 6 7 8 9 10 11; do + FILES="$FILES $DATA/sh3_zs640m28${k}_tex_lpddr.mem $DATA/feeder_sh3_zs640m28${k}.mem" +done + +for k in 0 1 2 3 4 5 6 7; do + FILES="$FILES $DATA/sh3_zs640b24${k}_tex_lpddr.mem $DATA/feeder_sh3_zs640b24${k}.mem" +done + +for k in 0 1 2 3 4 5 6 7; do + FILES="$FILES $DATA/sh3_zs640c24c${k}_tex_lpddr.mem $DATA/feeder_sh3_zs640c24c${k}.mem" +done + +for f in $FILES; do + test -f "$f" || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch365 motion host/data files -> $DEST" +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zs640mt5_to_board.sh b/tools/scp_zs640mt5_to_board.sh new file mode 100755 index 0000000..0daac8b --- /dev/null +++ b/tools/scp_zs640mt5_to_board.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# Copy Ch363's five-texture scheduler host data. Load the matching RBF first. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zs640mt5_epochs.txt +$DATA/sh3_zs640mt50_tex_lpddr.mem +$DATA/sh3_zs640mt51_tex_lpddr.mem +$DATA/sh3_zs640mt52_tex_lpddr.mem +$DATA/sh3_zs640mt53_tex_lpddr.mem +$DATA/sh3_zs640mt54_tex_lpddr.mem +$DATA/feeder_sh3_zs640mt50.mem +$DATA/feeder_sh3_zs640mt51.mem +$DATA/feeder_sh3_zs640mt52.mem +$DATA/feeder_sh3_zs640mt53.mem +$DATA/feeder_sh3_zs640mt54.mem +" + +for f in $FILES; do + test -f "$f" || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch363 MT5 host/data files -> $DEST" +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsched_to_board.sh b/tools/scp_zsched_to_board.sh new file mode 100755 index 0000000..bf6b993 --- /dev/null +++ b/tools/scp_zsched_to_board.sh @@ -0,0 +1,70 @@ +#!/bin/sh +# retroDE_ps2 — copy the Ch357 persistent-Z (256x210, GS_SH3_LPDDR_FB_Z) board-side files to the DE25. +# +# This is the file set for the ZSCHED profile (sh3_zsched_epochs.txt, fbpxw 256 fbh 210) — the one built by the +# GS_SH3_LPDDR_FB_Z RBF. (NOT sh3_sched=384 or sh3_s640=640; those are other profiles.) Copies to the home dir so the +# host runs from ~ and the epoch descriptor finds the tex/list files by their relative names. +# +# ./tools/scp_zsched_to_board.sh # default terasic@192.168.50.161:~ +# ./tools/scp_zsched_to_board.sh user@host:dir # override destination +# +# On the board afterward (persistent-Z needs --zbuf: preclear the LPDDR Z region + arm EARLY): +# gcc -O2 -o ps2_sh3_sched ps2_sh3_sched.c +# sudo ./ps2_sh3_sched --zbuf sh3_zsched_epochs.txt +# +# Optional board framebuffer readback (PSMCT32 linear, 256x210 for this profile): +# sudo ./ps2_sh3_sched --zbuf sh3_zsched_epochs.txt --dump-fb sh3_zsched_board_fb.mem +# scp terasic@192.168.50.161:~/sh3_zsched_board_fb.mem sim/data/top_psmct32_raster_demo/ +# python3 tools/gs_fb_to_png.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ +# sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.png 256 210 3 +# make -C sim sh3_zsched_board_compare +# +# Exact emitted-fragment color replay (also run by sh3_zsched_board_compare): +# python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ +# --owner replay-color --frags sim/traces/rtl/zsched_frags.txt +# +# Optional texture/refmap oracle diagnostic maps: +# make -C sim tb_top_psmct32_sh3_zsched +# python3 tools/analyze_zsched_fb.py sim/data/top_psmct32_raster_demo/sh3_zsched_board_fb.mem \ +# --owner replay --frags sim/traces/rtl/zsched_frags.txt --maps +# +# Regenerate the LOCAL zsched fixtures with the signoff reference contract: +# make -C sim sh3_zsched_fixture +# Equivalent explicit emit: +# python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 8634,12757,145742 --authz --tag zsched \ +# --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsched_epochs.txt +$DATA/sh3_zsched0_tex_lpddr.mem +$DATA/sh3_zsched1_tex_lpddr.mem +$DATA/sh3_zsched2_tex_lpddr.mem +$DATA/feeder_sh3_zsched0.mem +$DATA/feeder_sh3_zsched1.mem +$DATA/feeder_sh3_zsched2.mem +" + +missing=0 +for f in $FILES; do + if [ ! -f "$f" ]; then echo "MISSING: $f" >&2; missing=1; fi +done +if [ "$missing" -ne 0 ]; then + echo "" >&2 + echo "Regenerate the LOCAL zsched fixtures first (dump-derived, local-only):" >&2 + echo " make -C sim sh3_zsched_fixture" >&2 + echo " # or:" >&2 + echo " python3 tools/gs_make_sh3_scheduler_fixture.py --draw-list 8634,12757,145742 --authz --tag zsched \\" >&2 + echo " --pscale auto,auto,384 --xy-quant round,round,round --ref-xy-quant --emit" >&2 + exit 1 +fi + +echo "Copying 8 files -> $DEST (one password prompt):" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a1_to_board.sh b/tools/scp_zsrt139a1_to_board.sh new file mode 100755 index 0000000..33ac2a5 --- /dev/null +++ b/tools/scp_zsrt139a1_to_board.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# Ch395: wider 224139 opaque A1 upload set for ps2_sh3_sched.c. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a1_epochs.txt" +for k in 0 1 2 3 4; do + FILES="$FILES $DATA/sh3_zsrt139a1${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a1${k}.mem $DATA/sh3_zsrt139a1${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a2_to_board.sh b/tools/scp_zsrt139a2_to_board.sh new file mode 100755 index 0000000..8a7d3a9 --- /dev/null +++ b/tools/scp_zsrt139a2_to_board.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# Ch396: wider 224139 opaque A2 upload set for ps2_sh3_sched.c. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a2_epochs.txt" +for k in 0 1 2 3 4 5; do + FILES="$FILES $DATA/sh3_zsrt139a2${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a2${k}.mem $DATA/sh3_zsrt139a2${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a3_to_board.sh b/tools/scp_zsrt139a3_to_board.sh new file mode 100755 index 0000000..2964ff2 --- /dev/null +++ b/tools/scp_zsrt139a3_to_board.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# Ch397: first authentic LPDDR-alpha 224139 upload set for ps2_sh3_sched.c. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a3_epochs.txt" +for k in 0 1 2; do + FILES="$FILES $DATA/sh3_zsrt139a3${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a3${k}.mem $DATA/sh3_zsrt139a3${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a4_to_board.sh b/tools/scp_zsrt139a4_to_board.sh new file mode 100755 index 0000000..3b24b3a --- /dev/null +++ b/tools/scp_zsrt139a4_to_board.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# Ch398: six authentic LPDDR-alpha draws in five ordered epochs. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a4_epochs.txt" +for k in 0 1 2 3 4; do + FILES="$FILES $DATA/sh3_zsrt139a4${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a4${k}.mem $DATA/sh3_zsrt139a4${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a5_to_board.sh b/tools/scp_zsrt139a5_to_board.sh new file mode 100755 index 0000000..95f273e --- /dev/null +++ b/tools/scp_zsrt139a5_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch399: full first in-bounds authentic LPDDR-alpha family, 16 epochs. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a5_epochs.txt" +k=0 +while [ "$k" -lt 16 ]; do + FILES="$FILES $DATA/sh3_zsrt139a5${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a5${k}.mem $DATA/sh3_zsrt139a5${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a6_to_board.sh b/tools/scp_zsrt139a6_to_board.sh new file mode 100755 index 0000000..caf0f7d --- /dev/null +++ b/tools/scp_zsrt139a6_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch400: chronological in-bounds base geometry plus bounded alpha tail. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a6_epochs.txt" +k=0 +while [ "$k" -lt 20 ]; do + FILES="$FILES $DATA/sh3_zsrt139a6${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a6${k}.mem $DATA/sh3_zsrt139a6${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a7_to_board.sh b/tools/scp_zsrt139a7_to_board.sh new file mode 100755 index 0000000..693de85 --- /dev/null +++ b/tools/scp_zsrt139a7_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch401: fuller 56-draw chronological/high-coverage static frame. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a7_epochs.txt" +k=0 +while [ "$k" -lt 28 ]; do + FILES="$FILES $DATA/sh3_zsrt139a7${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a7${k}.mem $DATA/sh3_zsrt139a7${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a8_to_board.sh b/tools/scp_zsrt139a8_to_board.sh new file mode 100755 index 0000000..ce56ed6 --- /dev/null +++ b/tools/scp_zsrt139a8_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch402: Ch401 scene plus four authentic character epochs. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a8_epochs.txt" +k=0 +while [ "$k" -lt 40 ]; do + FILES="$FILES $DATA/sh3_zsrt139a8${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a8${k}.mem $DATA/sh3_zsrt139a8${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139a9_to_board.sh b/tools/scp_zsrt139a9_to_board.sh new file mode 100755 index 0000000..332fcab --- /dev/null +++ b/tools/scp_zsrt139a9_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch403: Ch402 geometry with authentic vertex lighting modulation. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139a9_epochs.txt" +k=0 +while [ "$k" -lt 40 ]; do + FILES="$FILES $DATA/sh3_zsrt139a9${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139a9${k}.mem $DATA/sh3_zsrt139a9${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139b2_to_board.sh b/tools/scp_zsrt139b2_to_board.sh new file mode 100755 index 0000000..356557e --- /dev/null +++ b/tools/scp_zsrt139b2_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch404: accepted Ch403 base plus chronological character-detail tail. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139b2_epochs.txt" +k=0 +while [ "$k" -lt 75 ]; do + FILES="$FILES $DATA/sh3_zsrt139b2${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139b2${k}.mem $DATA/sh3_zsrt139b2${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139c4_to_board.sh b/tools/scp_zsrt139c4_to_board.sh new file mode 100755 index 0000000..bc5c46f --- /dev/null +++ b/tools/scp_zsrt139c4_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch405: bounded-burst Ch404 base plus authentic Z-read-only alpha-fan overlays. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139c4_epochs.txt" +k=0 +while [ "$k" -lt 287 ]; do + FILES="$FILES $DATA/sh3_zsrt139c4${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139c4${k}.mem $DATA/sh3_zsrt139c4${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139d2_to_board.sh b/tools/scp_zsrt139d2_to_board.sh new file mode 100755 index 0000000..6151875 --- /dev/null +++ b/tools/scp_zsrt139d2_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch407: Ch405 base plus remaining supported PSMT8 alpha-fan continuation. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139d2_epochs.txt" +k=0 +while [ "$k" -lt 454 ]; do + FILES="$FILES $DATA/sh3_zsrt139d2${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139d2${k}.mem $DATA/sh3_zsrt139d2${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139d4_to_board.sh b/tools/scp_zsrt139d4_to_board.sh new file mode 100755 index 0000000..d9af334 --- /dev/null +++ b/tools/scp_zsrt139d4_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch407: accepted Ch405 base plus capacity-safe PSMT8 alpha-fan continuation. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139d4_epochs.txt" +k=0 +while [ "$k" -lt 474 ]; do + FILES="$FILES $DATA/sh3_zsrt139d4${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139d4${k}.mem $DATA/sh3_zsrt139d4${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139d6_to_board.sh b/tools/scp_zsrt139d6_to_board.sh new file mode 100755 index 0000000..1f2a438 --- /dev/null +++ b/tools/scp_zsrt139d6_to_board.sh @@ -0,0 +1,14 @@ +#!/bin/sh +# Ch407: accepted Ch405 base plus authentic-scissor, capacity-safe continuation. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139d6_epochs.txt" +k=0 +while [ "$k" -lt 434 ]; do + FILES="$FILES $DATA/sh3_zsrt139d6${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139d6${k}.mem $DATA/sh3_zsrt139d6${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139e2_to_board.sh b/tools/scp_zsrt139e2_to_board.sh new file mode 100755 index 0000000..6f15a9b --- /dev/null +++ b/tools/scp_zsrt139e2_to_board.sh @@ -0,0 +1,16 @@ +#!/bin/sh +# Ch408: D6 scene plus authentic capacity-safe PSMT4 overlay. The board +# already has all D6 assets, so upload only the reference-input merged table +# and the 18 new E1 epochs rather than duplicating 434 texture files. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139e3_epochs.txt" +k=0 +while [ "$k" -lt 18 ]; do + FILES="$FILES $DATA/sh3_zsrt139e1${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139e1${k}.mem $DATA/sh3_zsrt139e1${k}_pal.mem" + k=$((k + 1)) +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f16_to_board.sh b/tools/scp_zsrt139f16_to_board.sh new file mode 100755 index 0000000..8b09691 --- /dev/null +++ b/tools/scp_zsrt139f16_to_board.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# Ch415: authentic vertex-fog fold plus indexed perspective bilinear fixture. +# Upload each shared texture/palette asset only once, while retaining every +# epoch's distinct feeder list. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f16_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f17_to_board.sh b/tools/scp_zsrt139f17_to_board.sh new file mode 100755 index 0000000..bbbcc32 --- /dev/null +++ b/tools/scp_zsrt139f17_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Ch416: full native-12.4 scene fixture and runtime assets. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f17_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f18_to_board.sh b/tools/scp_zsrt139f18_to_board.sh new file mode 100755 index 0000000..3915b82 --- /dev/null +++ b/tools/scp_zsrt139f18_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Ch419: accepted Ch417 scene plus the bounded rabbit/bench completion tail. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f18_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f19_to_board.sh b/tools/scp_zsrt139f19_to_board.sh new file mode 100755 index 0000000..64b89a4 --- /dev/null +++ b/tools/scp_zsrt139f19_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Ch424: complete 766-draw grouped scene with native 12.4 coverage. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f19_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f23_to_board.sh b/tools/scp_zsrt139f23_to_board.sh new file mode 100755 index 0000000..07be8f9 --- /dev/null +++ b/tools/scp_zsrt139f23_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Ch426: Ch424 scene + CT32 darken + corrected authentic-alpha fog fans. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f23_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f28_to_board.sh b/tools/scp_zsrt139f28_to_board.sh new file mode 100755 index 0000000..53bb486 --- /dev/null +++ b/tools/scp_zsrt139f28_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Ch427: Ch424 + CT32 + all 93 corrected authentic-alpha fog fans. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f28_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f33_to_board.sh b/tools/scp_zsrt139f33_to_board.sh new file mode 100755 index 0000000..f383a76 --- /dev/null +++ b/tools/scp_zsrt139f33_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch428: accepted Ch427 baseline plus the recovered 256x256 PSMT8 +# character-detail triangle-list family. No RBF change is required. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f33_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f36_to_board.sh b/tools/scp_zsrt139f36_to_board.sh new file mode 100755 index 0000000..52708c6 --- /dev/null +++ b/tools/scp_zsrt139f36_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch429: f33 plus the native 512x1024 PSMT4 foreground-character strips. +# Uses the timing-clean Ch423 RBF; fixture assets only. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f36_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f42_to_board.sh b/tools/scp_zsrt139f42_to_board.sh new file mode 100755 index 0000000..cd68715 --- /dev/null +++ b/tools/scp_zsrt139f42_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch431: f36 plus two chronology-correct PSMCT32 character highlights. +# Uses the timing-clean Ch423 RBF; fixture assets only. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f42_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f43_to_board.sh b/tools/scp_zsrt139f43_to_board.sh new file mode 100755 index 0000000..e86d945 --- /dev/null +++ b/tools/scp_zsrt139f43_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch433: f19 draw population with per-triangle UV-error-optimized STQ scale. +# Assets only; runs on the accepted, timing-clean Ch432 RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f43_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f44_to_board.sh b/tools/scp_zsrt139f44_to_board.sh new file mode 100755 index 0000000..62dc53e --- /dev/null +++ b/tools/scp_zsrt139f44_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch433: complete f42 composition with the UV-optimized f43 base slices. +# Assets only; runs on the accepted, timing-clean Ch432 RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f44_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f46_to_board.sh b/tools/scp_zsrt139f46_to_board.sh new file mode 100755 index 0000000..b3dda5c --- /dev/null +++ b/tools/scp_zsrt139f46_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch434: Ch433 complete composition plus authentic TME=0 additive/subtractive +# light-volume geometry. Assets only; runs on the accepted clean Ch432 RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f46_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f48_to_board.sh b/tools/scp_zsrt139f48_to_board.sh new file mode 100755 index 0000000..81250c7 --- /dev/null +++ b/tools/scp_zsrt139f48_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch434: Ch433 scene plus the reconstructed current-frame light-buffer +# composite and the existing textured-alpha tail. Assets only; unchanged RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f48_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f49_to_board.sh b/tools/scp_zsrt139f49_to_board.sh new file mode 100755 index 0000000..4ca7839 --- /dev/null +++ b/tools/scp_zsrt139f49_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch434: topology-correct current-frame light-buffer composite plus the +# accepted Ch433 scene and textured-alpha tail. Assets only; unchanged RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f49_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139f52_to_board.sh b/tools/scp_zsrt139f52_to_board.sh new file mode 100755 index 0000000..165ae14 --- /dev/null +++ b/tools/scp_zsrt139f52_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch435: current-frame light-buffer composite with FRAME.FBMSK-correct alpha +# at the static reconstruction boundary. Assets only; unchanged Ch432 RBF. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139f52_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139l3f_to_board.sh b/tools/scp_zsrt139l3f_to_board.sh new file mode 100755 index 0000000..bf6ee3d --- /dev/null +++ b/tools/scp_zsrt139l3f_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Ch435: native FRAME.FBMSK acceptance fixture. Draw 195973 preserves the +# destination alpha byte produced by draw 195957. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +EPOCHS="$DATA/sh3_zsrt139l3f_epochs.txt" + +FILES="$ROOT/tools/ps2_sh3_sched.c $EPOCHS" +add_file() { + case " $FILES " in + *" $1 "*) ;; + *) FILES="$FILES $1" ;; + esac +} + +while read -r k idx tbp cbp tex lpddr size crc list words records reuse pal palsum rest; do + case "$k" in ''|'#'*) continue ;; META) continue ;; esac + add_file "$DATA/$tex" + add_file "$DATA/$list" + [ "$pal" = "-" ] || add_file "$DATA/$pal" +done < "$EPOCHS" + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt139o6_to_board.sh b/tools/scp_zsrt139o6_to_board.sh new file mode 100755 index 0000000..417e9e8 --- /dev/null +++ b/tools/scp_zsrt139o6_to_board.sh @@ -0,0 +1,12 @@ +#!/bin/sh +# Ch394: 224139 opaque A0 upload set for ps2_sh3_sched.c. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrt139o6_epochs.txt" +for k in 0 1 2; do + FILES="$FILES $DATA/sh3_zsrt139o6${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrt139o6${k}.mem $DATA/sh3_zsrt139o6${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt24_to_board.sh b/tools/scp_zsrt24_to_board.sh new file mode 100755 index 0000000..91d992d --- /dev/null +++ b/tools/scp_zsrt24_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Copy Ch367's 24-draw runtime-CLUT fixture. Run only after the GUI-fitted +# core with REQ_DEPTH=2048 has a clean STA report. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrt24_epochs.txt +" +for k in 0 1 2 3 4 5 6 7; do + FILES="$FILES +$DATA/sh3_zsrt24${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrt24${k}.mem +$DATA/sh3_zsrt24${k}_pal.mem" +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch367 runtime-CLUT 24-draw fixture files -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrt3_to_board.sh b/tools/scp_zsrt3_to_board.sh new file mode 100755 index 0000000..2a12bb7 --- /dev/null +++ b/tools/scp_zsrt3_to_board.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# Copy the Ch367 runtime-CLUT proof fixture. The matching GUI-fit core must +# use the sh3_lpddr_fb_z640_runtime_clut profile before this host run. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrt3_epochs.txt +" +for k in 0 1 2; do + FILES="$FILES +$DATA/sh3_zsrt3${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrt3${k}.mem +$DATA/sh3_zsrt3${k}_pal.mem" +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying runtime-CLUT fixture files -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtc24_to_board.sh b/tools/scp_zsrtc24_to_board.sh new file mode 100755 index 0000000..3f4a723 --- /dev/null +++ b/tools/scp_zsrtc24_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Copy Ch370's runtime-CLUT Frame C fixture to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrtc24_epochs.txt +" +for k in 0 1 2 3 4 5 6 7; do + FILES="$FILES +$DATA/sh3_zsrtc24${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrtc24${k}.mem +$DATA/sh3_zsrtc24${k}_pal.mem" +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch370 runtime-CLUT Frame C files -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte11_to_board.sh b/tools/scp_zsrte11_to_board.sh new file mode 100755 index 0000000..d869a97 --- /dev/null +++ b/tools/scp_zsrte11_to_board.sh @@ -0,0 +1,22 @@ +#!/bin/sh +# Copy Ch374's earlier-capture eleven-draw runtime-CLUT fixture to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrte11_epochs.txt +" +for k in 0 1 2 3; do + FILES="$FILES +$DATA/sh3_zsrte11${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrte11${k}.mem +$DATA/sh3_zsrte11${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +echo "Copying Ch374 earlier-capture eleven-draw fixture -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte14_to_board.sh b/tools/scp_zsrte14_to_board.sh new file mode 100755 index 0000000..9a6abf5 --- /dev/null +++ b/tools/scp_zsrte14_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch375's earlier-capture fourteen-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte14_epochs.txt" +for k in 0 1 2 3 4; do FILES="$FILES $DATA/sh3_zsrte14${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte14${k}.mem $DATA/sh3_zsrte14${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte17_to_board.sh b/tools/scp_zsrte17_to_board.sh new file mode 100755 index 0000000..31a62fb --- /dev/null +++ b/tools/scp_zsrte17_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch376's seventeen-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte17_epochs.txt" +for k in 0 1 2 3 4 5; do FILES="$FILES $DATA/sh3_zsrte17${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte17${k}.mem $DATA/sh3_zsrte17${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte18_to_board.sh b/tools/scp_zsrte18_to_board.sh new file mode 100755 index 0000000..06dc8d5 --- /dev/null +++ b/tools/scp_zsrte18_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch377's eighteen-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte18_epochs.txt" +for k in 0 1 2 3 4 5 6; do FILES="$FILES $DATA/sh3_zsrte18${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte18${k}.mem $DATA/sh3_zsrte18${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte19_to_board.sh b/tools/scp_zsrte19_to_board.sh new file mode 100755 index 0000000..5c55861 --- /dev/null +++ b/tools/scp_zsrte19_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch378's nineteen-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte19_epochs.txt" +for k in 0 1 2 3 4 5 6 7; do FILES="$FILES $DATA/sh3_zsrte19${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte19${k}.mem $DATA/sh3_zsrte19${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte22_to_board.sh b/tools/scp_zsrte22_to_board.sh new file mode 100755 index 0000000..3006088 --- /dev/null +++ b/tools/scp_zsrte22_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch379's twenty-two-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte22_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8; do FILES="$FILES $DATA/sh3_zsrte22${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte22${k}.mem $DATA/sh3_zsrte22${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte25_to_board.sh b/tools/scp_zsrte25_to_board.sh new file mode 100755 index 0000000..a181aa2 --- /dev/null +++ b/tools/scp_zsrte25_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch380's twenty-five-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte25_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9; do FILES="$FILES $DATA/sh3_zsrte25${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte25${k}.mem $DATA/sh3_zsrte25${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte28_to_board.sh b/tools/scp_zsrte28_to_board.sh new file mode 100755 index 0000000..9a9373a --- /dev/null +++ b/tools/scp_zsrte28_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch381's twenty-eight-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte28_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9 10; do FILES="$FILES $DATA/sh3_zsrte28${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte28${k}.mem $DATA/sh3_zsrte28${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte31_to_board.sh b/tools/scp_zsrte31_to_board.sh new file mode 100755 index 0000000..dd334fc --- /dev/null +++ b/tools/scp_zsrte31_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch382's thirty-one-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte31_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9 10 11; do FILES="$FILES $DATA/sh3_zsrte31${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte31${k}.mem $DATA/sh3_zsrte31${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte34_to_board.sh b/tools/scp_zsrte34_to_board.sh new file mode 100755 index 0000000..5979120 --- /dev/null +++ b/tools/scp_zsrte34_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch383's thirty-four-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte34_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9 10 11 12; do FILES="$FILES $DATA/sh3_zsrte34${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte34${k}.mem $DATA/sh3_zsrte34${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte3_to_board.sh b/tools/scp_zsrte3_to_board.sh new file mode 100755 index 0000000..ab94299 --- /dev/null +++ b/tools/scp_zsrte3_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Copy Ch371's earlier-capture runtime-CLUT probe to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrte3_epochs.txt +" +for k in 0 1; do + FILES="$FILES +$DATA/sh3_zsrte3${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrte3${k}.mem +$DATA/sh3_zsrte3${k}_pal.mem" +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch371 earlier-capture runtime-CLUT probe -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte43_to_board.sh b/tools/scp_zsrte43_to_board.sh new file mode 100755 index 0000000..6c086e0 --- /dev/null +++ b/tools/scp_zsrte43_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch384's forty-three-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte43_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15; do FILES="$FILES $DATA/sh3_zsrte43${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte43${k}.mem $DATA/sh3_zsrte43${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte45_to_board.sh b/tools/scp_zsrte45_to_board.sh new file mode 100755 index 0000000..26580aa --- /dev/null +++ b/tools/scp_zsrte45_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch385's forty-five-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrte45_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16; do FILES="$FILES $DATA/sh3_zsrte45${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrte45${k}.mem $DATA/sh3_zsrte45${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte6_to_board.sh b/tools/scp_zsrte6_to_board.sh new file mode 100755 index 0000000..1c0d70b --- /dev/null +++ b/tools/scp_zsrte6_to_board.sh @@ -0,0 +1,22 @@ +#!/bin/sh +# Copy Ch372's earlier-capture six-draw runtime-CLUT fixture to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrte6_epochs.txt +" +for k in 0 1; do + FILES="$FILES +$DATA/sh3_zsrte6${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrte6${k}.mem +$DATA/sh3_zsrte6${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +echo "Copying Ch372 earlier-capture six-draw fixture -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrte8_to_board.sh b/tools/scp_zsrte8_to_board.sh new file mode 100755 index 0000000..4582d57 --- /dev/null +++ b/tools/scp_zsrte8_to_board.sh @@ -0,0 +1,22 @@ +#!/bin/sh +# Copy Ch373's earlier-capture eight-draw runtime-CLUT fixture to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrte8_epochs.txt +" +for k in 0 1 2; do + FILES="$FILES +$DATA/sh3_zsrte8${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrte8${k}.mem +$DATA/sh3_zsrte8${k}_pal.mem" +done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +echo "Copying Ch373 earlier-capture eight-draw fixture -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c30_to_board.sh b/tools/scp_zsrtf3c30_to_board.sh new file mode 100755 index 0000000..e18f696 --- /dev/null +++ b/tools/scp_zsrtf3c30_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch388's frame-3 thirty-draw runtime-CLUT composition to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c30_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8; do FILES="$FILES $DATA/sh3_zsrtf3c30${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c30${k}.mem $DATA/sh3_zsrtf3c30${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c34_to_board.sh b/tools/scp_zsrtf3c34_to_board.sh new file mode 100755 index 0000000..eda4678 --- /dev/null +++ b/tools/scp_zsrtf3c34_to_board.sh @@ -0,0 +1,9 @@ +#!/bin/sh +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c34_epochs.txt" +for k in 0 1 2 3 4 5 6 7 8 9; do FILES="$FILES $DATA/sh3_zsrtf3c34${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c34${k}.mem $DATA/sh3_zsrtf3c34${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c41_to_board.sh b/tools/scp_zsrtf3c41_to_board.sh new file mode 100755 index 0000000..4eb9054 --- /dev/null +++ b/tools/scp_zsrtf3c41_to_board.sh @@ -0,0 +1,13 @@ +#!/bin/sh +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c41_epochs.txt" +for k in 0 1; do + FILES="$FILES $DATA/sh3_zsrtf3c41${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c41${k}.mem $DATA/sh3_zsrtf3c41${k}_pal.mem" +done +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c49_to_board.sh b/tools/scp_zsrtf3c49_to_board.sh new file mode 100755 index 0000000..91f9d96 --- /dev/null +++ b/tools/scp_zsrtf3c49_to_board.sh @@ -0,0 +1,13 @@ +#!/bin/sh +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c49_epochs.txt" +for k in 0 1 2 3; do + FILES="$FILES $DATA/sh3_zsrtf3c49${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c49${k}.mem $DATA/sh3_zsrtf3c49${k}_pal.mem" +done +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c57_to_board.sh b/tools/scp_zsrtf3c57_to_board.sh new file mode 100755 index 0000000..e06c8da --- /dev/null +++ b/tools/scp_zsrtf3c57_to_board.sh @@ -0,0 +1,9 @@ +#!/bin/sh +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c57_epochs.txt" +for k in 0 1 2 3; do FILES="$FILES $DATA/sh3_zsrtf3c57${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c57${k}.mem $DATA/sh3_zsrtf3c57${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3c57x_to_board.sh b/tools/scp_zsrtf3c57x_to_board.sh new file mode 100755 index 0000000..d99c586 --- /dev/null +++ b/tools/scp_zsrtf3c57x_to_board.sh @@ -0,0 +1,9 @@ +#!/bin/sh +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3c57x_epochs.txt" +for k in $(seq 0 19); do FILES="$FILES $DATA/sh3_zsrtf3c57x${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3c57x${k}.mem $DATA/sh3_zsrtf3c57x${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3e18_to_board.sh b/tools/scp_zsrtf3e18_to_board.sh new file mode 100755 index 0000000..df279bb --- /dev/null +++ b/tools/scp_zsrtf3e18_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch386's frame-3 eighteen-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3e18_epochs.txt" +for k in 0 1 2 3 4; do FILES="$FILES $DATA/sh3_zsrtf3e18${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3e18${k}.mem $DATA/sh3_zsrtf3e18${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtf3e30_to_board.sh b/tools/scp_zsrtf3e30_to_board.sh new file mode 100755 index 0000000..a703dac --- /dev/null +++ b/tools/scp_zsrtf3e30_to_board.sh @@ -0,0 +1,10 @@ +#!/bin/sh +# Copy Ch387's frame-3 thirty-draw runtime-CLUT fixture to the DE25. +set -eu +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" +FILES="$ROOT/tools/ps2_sh3_sched.c $DATA/sh3_zsrtf3e30_epochs.txt" +for k in 0 1 2 3; do FILES="$FILES $DATA/sh3_zsrtf3e30${k}_tex_lpddr.mem $DATA/feeder_sh3_zsrtf3e30${k}.mem $DATA/sh3_zsrtf3e30${k}_pal.mem"; done +for f in $FILES; do [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; }; done +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtm28_to_board.sh b/tools/scp_zsrtm28_to_board.sh new file mode 100755 index 0000000..1fcc131 --- /dev/null +++ b/tools/scp_zsrtm28_to_board.sh @@ -0,0 +1,27 @@ +#!/bin/sh +# Copy Ch369's runtime-CLUT 28-draw mixed-residency fixture to the DE25. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrtm28_epochs.txt +" +for k in 0 1 2 3 4 5 6 7 8 9 10 11; do + FILES="$FILES +$DATA/sh3_zsrtm28${k}_tex_lpddr.mem +$DATA/feeder_sh3_zsrtm28${k}.mem +$DATA/sh3_zsrtm28${k}_pal.mem" +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch369 runtime-CLUT mixed-residency files -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/scp_zsrtmotionab_to_board.sh b/tools/scp_zsrtmotionab_to_board.sh new file mode 100755 index 0000000..25732b4 --- /dev/null +++ b/tools/scp_zsrtmotionab_to_board.sh @@ -0,0 +1,31 @@ +#!/bin/sh +# Copy Ch368's runtime-CLUT adjacent-frame A/B motion fixture. Run only after +# the GUI-fitted core with REQ_DEPTH=4096 has a clean STA report. +set -eu + +DEST="${1:-terasic@192.168.50.161:~}" +ROOT="$(cd "$(dirname "$0")/.." && pwd)" +DATA="$ROOT/sim/data/top_psmct32_raster_demo" + +FILES=" +$ROOT/tools/ps2_sh3_sched.c +$DATA/sh3_zsrt24_epochs.txt +$DATA/sh3_zsrtb24_epochs.txt +" +for tag in zsrt24 zsrtb24; do + for k in 0 1 2 3 4 5 6 7; do + FILES="$FILES +$DATA/sh3_${tag}${k}_tex_lpddr.mem +$DATA/feeder_sh3_${tag}${k}.mem +$DATA/sh3_${tag}${k}_pal.mem" + done +done + +for f in $FILES; do + [ -f "$f" ] || { echo "MISSING: $f" >&2; exit 1; } +done + +echo "Copying Ch368 runtime-CLUT A/B motion files -> $DEST:" +for f in $FILES; do echo " $(basename "$f")"; done +# shellcheck disable=SC2086 +exec scp $FILES "$DEST" diff --git a/tools/verify_persp_z.py b/tools/verify_persp_z.py new file mode 100644 index 0000000..f00b250 --- /dev/null +++ b/tools/verify_persp_z.py @@ -0,0 +1,77 @@ +#!/usr/bin/env python3 +"""retroDE_ps2 — Ch357: verify the RASTER's emitted per-fragment Z (persp_z5) end-to-end. + +Replays the captured raster fragment stream {epoch, x, y, persp_z, color} (from tb_top_psmct32_sh3_zsched -> zsched_frags.txt) +through the SAME clamp16 persistent-Z model the RTL ROP (gs_lpddr_zc_emit) implements, and compares the resulting per-pixel +OWNER + reject-vs-paint-order to the software oracle (gs_sh3_z_oracle emits sh3_zsched_zowner.mem / _reject.mem). + +If persp_z5 is the authentic screen-linear Z (right value, right pixel), the replay reproduces the oracle: covered=21692, +reject=3971 for the primary [8634,12757,145742]. A wrong Z value or a pipeline-stage misalignment shows up as a reject/owner +mismatch — so this is the decisive check on the new gs_stub RTL, independent of the (separately unit-proven) ROP. + +Usage: verify_persp_z.py [frags.txt] [--tag zsched] [--fbpxw 256] +""" +import sys, os +HERE=os.path.dirname(os.path.abspath(__file__)); ROOT=os.path.normpath(os.path.join(HERE,"..")) +DATA=os.path.join(ROOT,"sim","data","top_psmct32_raster_demo") + +def clamp16(z): z=int(z); return 0xFFFF if z>0xFFFF else (0 if z<0 else z) + +def main(argv): + a=argv[1:] + frags = a[0] if a and not a[0].startswith("--") else os.path.join(ROOT,"sim","traces","rtl","zsched_frags.txt") + tag = a[a.index("--tag")+1] if "--tag" in a else "zsched" + if not os.path.exists(frags): sys.exit(f"[perspZ] no fragment capture at {frags} (run make tb_top_psmct32_sh3_zsched)") + + # load the oracle owner map: [31]cov [30]reject [27:24]z_owner(+1) [23:8]zq16 [3:0]paint_owner(+1) + owner_fn=os.path.join(DATA,f"sh3_{tag}_zowner.mem") + if not os.path.exists(owner_fn): sys.exit(f"[perspZ] no oracle map {owner_fn} (run gs_sh3_z_oracle.py --draw-list ... --emit)") + orc=[int(l,16)&0xFFFFFFFF for l in open(owner_fn) if l.strip() and not l.startswith("//")] + NPX=len(orc) + # infer FB width: prefer param, else from the oracle geometry note isn't stored — require --fbpxw or default 256 + FBPXW = int(a[a.index("--fbpxw")+1]) if "--fbpxw" in a else 256 + + # replay the captured fragments (in emit order == dump/paint order across epochs) through persistent clamp16 GEQUAL + zbuf=[-1]*NPX; z_owner=[-1]*NPX; paint_owner=[-1]*NPX; cov=[0]*NPX + nfr=0; oob=0 + for ln in open(frags): + p=ln.split() + if len(p)<5: continue + ep=int(p[0]); x=int(p[1]); y=int(p[2]); z=int(p[3]) + o=y*FBPXW+x + if o<0 or o>=NPX: oob+=1; continue + nfr+=1; cov[o]=1 + zq=clamp16(z) + paint_owner[o]=ep + if zq>=zbuf[o]: zbuf[o]=zq; z_owner[o]=ep # GEQUAL, persistent across epochs, ZMSK=0 + + # compare to the oracle + covered=sum(cov); reject=sum(1 for o in range(NPX) if cov[o] and z_owner[o]!=paint_owner[o]) + # oracle covered/reject + orc_cov=sum(1 for w in orc if w>>31); orc_rej=sum(1 for w in orc if (w>>30)&1) + # per-pixel owner agreement (where both cover) + owner_mismatch=0; both=0 + for o in range(NPX): + if cov[o] and (orc[o]>>31): + both+=1 + orc_owner=((orc[o]>>24)&0xF)-1 + if z_owner[o]!=orc_owner: owner_mismatch+=1 + + print(f"[perspZ] replayed {nfr} captured fragments (oob={oob}); FBPXW={FBPXW}, NPX={NPX}") + print(f"[perspZ] REPLAY : covered={covered} reject-vs-paint={reject}") + print(f"[perspZ] ORACLE : covered={orc_cov} reject={orc_rej}") + agree = 100.0*(both-owner_mismatch)/max(both,1) + rej_ratio = reject/max(orc_rej,1) + print(f"[perspZ] per-pixel z-owner agreement (both-covered {both}): {agree:.2f}% ({owner_mismatch} mismatch)") + print(f"[perspZ] reject ratio replay/oracle = {rej_ratio:.3f} (1.0 = persp_z5 authentic; ~0 or >>1 = broken/misaligned)") + # tolerate RTL-vs-float edge/coverage + fixed-point-Z noise; catch a GROSS persp_z5 error (wrong stage/value). + ok = (agree >= 95.0) and (0.80 <= rej_ratio <= 1.20) + if ok: + print(f"[perspZ] PASS — the raster's persp_z5 reproduces the clamp16 oracle owner/reject within edge tolerance. " + f"persp_z5 is the authentic screen-linear Z, correctly aligned to the emit.") + return 0 + print(f"[perspZ] FAIL — persp_z5 diverges from the oracle (wrong Z value or pipeline-stage misalignment). Numbers above.") + return 1 + +if __name__=="__main__": + raise SystemExit(main(sys.argv)) diff --git a/tools/verify_runtime_fabric_fit.py b/tools/verify_runtime_fabric_fit.py new file mode 100644 index 0000000..0af68e9 --- /dev/null +++ b/tools/verify_runtime_fabric_fit.py @@ -0,0 +1,98 @@ +#!/usr/bin/env python3 +"""Fail closed if a runtime-CLUT fit has timed out a required fabric branch.""" + +from __future__ import annotations + +import argparse +import re +import sys +from pathlib import Path + + +DEFAULT_OUTPUT = Path( + "synth/de25_nano/top_psmct32_raster_demo/output_files" +) +REVISION = "de25_nano_psmct32_raster_demo_top" + + +def read(path: Path) -> str: + try: + return path.read_text(encoding="utf-8", errors="replace") + except OSError as exc: + raise SystemExit(f"FAIL: cannot read {path}: {exc}") from exc + + +def summary_value(text: str, label: str) -> int: + match = re.search(rf"^{re.escape(label)}\s*:\s*([0-9,]+)\s*/", text, re.M) + if not match: + raise SystemExit(f"FAIL: missing '{label}' in fit summary") + return int(match.group(1).replace(",", "")) + + +def main() -> int: + parser = argparse.ArgumentParser() + parser.add_argument("--output-dir", type=Path, default=DEFAULT_OUTPUT) + args = parser.parse_args() + + fit_summary = args.output_dir / f"{REVISION}.fit.summary" + fit_report = args.output_dir / f"{REVISION}.fit.rpt" + sta_summary = args.output_dir / f"{REVISION}.sta.summary" + summary = read(fit_summary) + fit = read(fit_report) + sta = read(sta_summary) + + failures: list[str] = [] + if "Fitter Status : Successful" not in summary: + failures.append("fitter did not report success") + + alms = summary_value(summary, "Logic utilization (in ALMs)") + rams = summary_value(summary, "Total RAM Blocks") + # A 640x480 persistent-Z runtime scene normally consumes roughly 79% ALMs + # and 74% M20Ks. These deliberately loose floors catch path pruning, not + # healthy placement variation. + if alms < 20_000: + failures.append(f"only {alms:,} ALMs; runtime raster fabric appears pruned") + if rams < 150: + failures.append(f"only {rams} RAM blocks; runtime texture/Z fabric appears pruned") + + for name in ("u_demo|g_feeder", "u_texcache|tex_mem", "u_zc_emit|u_req"): + if name not in fit: + failures.append(f"required fitted hierarchy missing: {name}") + + for warning in ( + "feeder staging RAM dest EMPTY", + "tex_mem dst matched 0 keepers", + ): + if warning in fit: + failures.append(f"runtime SDC endpoint missing: {warning}") + + emif_setup = re.search( + r"Type\s*:\s*Setup 'u_emif_lpddr4b\|iopll\|iopll_0_outclk0'\s*\n" + r"Slack\s*:\s*([+-]?[0-9.]+)\s*\n" + r"TNS\s*:\s*([+-]?[0-9.]+)", + sta, + ) + if not emif_setup: + failures.append("missing 310 MHz EMIF setup summary") + else: + setup_slack, setup_tns = map(float, emif_setup.groups()) + if setup_slack < 0 or setup_tns < 0: + failures.append( + f"310 MHz setup fails: slack {setup_slack:+.3f} ns, TNS {setup_tns:+.3f} ns" + ) + + if failures: + print("RUNTIME FABRIC FIT: FAIL") + for failure in failures: + print(f"- {failure}") + return 1 + + print( + "RUNTIME FABRIC FIT: PASS " + f"({alms:,} ALMs, {rams} RAM blocks, feeder/texture/Z present, 310 MHz setup met)" + ) + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/traces/rtl/rtl/platform b/traces/rtl/rtl/platform new file mode 120000 index 0000000..a09aa78 --- /dev/null +++ b/traces/rtl/rtl/platform @@ -0,0 +1 @@ +/home/ubuntu/retroDE_splash/rtl/platform \ No newline at end of file